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spirv: assembler

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spirv: introduce SpvModule.Fn to generate function code into

spirv: assembler error message setup

spirv: runtime spec info

spirv: inline assembly tokenizer

spirv: inline assembly lhs result/opcode parsing

spirv: forgot to fmt

spirv: tokenize opcodes and assigned result-ids

spirv: operand parsing setup

spirv: assembler string literals

spirv: assembler integer literals

spirv: assembler value enums

spirv: assembler bit masks

spirv: update assembler to new asm air format

spirv: target 1.5 for now

Current vulkan sdk version (1.3.204) ships spirv tools targetting 1.5,
and so these do not work with binaries targetting 1.6 yet. In the
future, this version number should be decided by the target.

spirv: store operands in flat arraylist.

Instead of having dedicated Operand variants for variadic operands,
just flatten them and store them in the normal inst.operands list.
This is a little simpler, but is not easily decodable in the operand
data representation.

spirv: parse variadic assembly operands

spirv: improve assembler result-id tokenization

spirv: begin instruction processing

spirv: only remove decl if it was actually allocated

spirv: work around weird miscompilation

Seems like there are problems with switch in anonymous struct literals.

spirv: begin resolving some types in assembler

spirv: improve instruction processing

spirv: rename some types + process OpTypeInt

spirv: process OpTypeVector

spirv: process OpTypeMatrix and OpTypeSampler

spirv: add opcode class to spec, remove @exclude'd instructions

spirv: process more type instructions

spirv: OpTypeFunction

spirv: OpTypeOpaque

spirv: parse LiteralContextDependentNumber operands

spirv: emit assembly instruction into right section

spirv: parse OpPhi parameters

spirv: inline assembly inputs

spirv: also copy air types

spirv: inline assembly outputs

spirv: spir-v address spaces

spirv: basic vector constants/types and shuffle

spirv: assembler OpTypeImage

spirv: some stuff

spirv: remove spirv address spaces for now
This commit is contained in:
Robin Voetter
2022-01-30 20:48:16 +01:00
parent 32ce2f91a9
commit 074ba69ba6
11 changed files with 5965 additions and 404 deletions
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11
src/codegen/spirv/Section.zig
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@@ -36,14 +36,19 @@ pub fn append(section: *Section, allocator: Allocator, other_section: Section) !
try section.instructions.appendSlice(allocator, other_section.instructions.items);
}
/// Ensure capacity of at least `capacity` more words in this section.
pub fn ensureUnusedCapacity(section: *Section, allocator: Allocator, capacity: usize) !void {
try section.instructions.ensureUnusedCapacity(allocator, capacity);
}
/// Write an instruction and size, operands are to be inserted manually.
pub fn emitRaw(
section: *Section,
allocator: Allocator,
opcode: Opcode,
operands: usize, // opcode itself not included
operand_words: usize, // opcode itself not included
) !void {
const word_count = 1 + operands;
const word_count = 1 + operand_words;
try section.instructions.ensureUnusedCapacity(allocator, word_count);
section.writeWord((@intCast(Word, word_count << 16)) | @enumToInt(opcode));
}
@@ -96,7 +101,7 @@ pub fn writeWords(section: *Section, words: []const Word) void {
section.instructions.appendSliceAssumeCapacity(words);
}
fn writeDoubleWord(section: *Section, dword: DoubleWord) void {
pub fn writeDoubleWord(section: *Section, dword: DoubleWord) void {
section.writeWords(&.{
@truncate(Word, dword),
@truncate(Word, dword >> @bitSizeOf(Word)),