std: update std.builtin.Type fields to follow naming conventions
The compiler actually doesn't need any functional changes for this: Sema does reification based on the tag indices of `std.builtin.Type` already! So, no zig1.wasm update is necessary. This change is necessary to disallow name clashes between fields and decls on a type, which is a prerequisite of #9938.
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@@ -37,7 +37,7 @@ modules: if (native_os == .windows) std.ArrayListUnmanaged(WindowsModule) else v
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pub const OpenError = error{
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MissingDebugInfo,
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UnsupportedOperatingSystem,
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} || @typeInfo(@typeInfo(@TypeOf(SelfInfo.init)).Fn.return_type.?).ErrorUnion.error_set;
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} || @typeInfo(@typeInfo(@TypeOf(SelfInfo.init)).@"fn".return_type.?).error_union.error_set;
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pub fn open(allocator: Allocator) OpenError!SelfInfo {
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nosuspend {
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@@ -582,7 +582,7 @@ pub const Module = switch (native_os) {
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if (!std.mem.eql(u8, "__DWARF", sect.segName())) continue;
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var section_index: ?usize = null;
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inline for (@typeInfo(Dwarf.Section.Id).Enum.fields, 0..) |section, i| {
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inline for (@typeInfo(Dwarf.Section.Id).@"enum".fields, 0..) |section, i| {
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if (mem.eql(u8, "__" ++ section.name, sect.sectName())) section_index = i;
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}
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if (section_index == null) continue;
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@@ -981,7 +981,7 @@ fn readCoffDebugInfo(allocator: Allocator, coff_obj: *coff.Coff) !Module {
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var sections: Dwarf.SectionArray = Dwarf.null_section_array;
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errdefer for (sections) |section| if (section) |s| if (s.owned) allocator.free(s.data);
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inline for (@typeInfo(Dwarf.Section.Id).Enum.fields, 0..) |section, i| {
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inline for (@typeInfo(Dwarf.Section.Id).@"enum".fields, 0..) |section, i| {
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sections[i] = if (coff_obj.getSectionByName("." ++ section.name)) |section_header| blk: {
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break :blk .{
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.data = try coff_obj.getSectionDataAlloc(section_header, allocator),
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@@ -1443,7 +1443,7 @@ pub fn unwindFrameMachO(
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if (ma.load(usize, new_sp) == null or ma.load(usize, min_reg_addr) == null) return error.InvalidUnwindInfo;
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var reg_addr = fp - @sizeOf(usize);
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inline for (@typeInfo(@TypeOf(encoding.value.arm64.frame.x_reg_pairs)).Struct.fields, 0..) |field, i| {
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inline for (@typeInfo(@TypeOf(encoding.value.arm64.frame.x_reg_pairs)).@"struct".fields, 0..) |field, i| {
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if (@field(encoding.value.arm64.frame.x_reg_pairs, field.name) != 0) {
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(try regValueNative(context.thread_context, 19 + i, reg_context)).* = @as(*const usize, @ptrFromInt(reg_addr)).*;
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reg_addr += @sizeOf(usize);
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@@ -1452,7 +1452,7 @@ pub fn unwindFrameMachO(
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}
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}
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inline for (@typeInfo(@TypeOf(encoding.value.arm64.frame.d_reg_pairs)).Struct.fields, 0..) |field, i| {
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inline for (@typeInfo(@TypeOf(encoding.value.arm64.frame.d_reg_pairs)).@"struct".fields, 0..) |field, i| {
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if (@field(encoding.value.arm64.frame.d_reg_pairs, field.name) != 0) {
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// Only the lower half of the 128-bit V registers are restored during unwinding
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@memcpy(
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