motiejus/zig
1
Fork 0
Code Releases Activity

change the default ABI of riscv64-linux-musl

Browse Source 
Before, this would cause a link failure when mixing Zig and C code for
RISC-V targets.

Now, the ABIs match and Zig and C code can be mixed successfully.

I will file a follow-up issue for the ability to deal more explicitly
with ABIs.

closes #4863
This commit is contained in:
Andrew Kelley
2020-04-03 11:02:22 -04:00
parent 203d6554b1
commit 11b50e3ad8
4 changed files with 47 additions and 12 deletions
Download Patch File Download Diff File Expand all files Collapse all files

16
src/codegen.cpp
View File

@@ -8940,10 +8940,24 @@ static void init(CodeGen *g) {
fprintf(stderr, "name=%s target_specific_cpu_args=%s\n", buf_ptr(g->root_out_name), target_specific_cpu_args);
fprintf(stderr, "name=%s target_specific_features=%s\n", buf_ptr(g->root_out_name), target_specific_features);
}
// TODO handle float ABI better- it should depend on the ABI portion of std.Target
ZigLLVMABIType float_abi = ZigLLVMABITypeDefault;
// TODO a way to override this as part of std.Target ABI?
const char *abi_name = nullptr;
if (target_is_riscv(g->zig_target)) {
// RISC-V Linux defaults to ilp32d/lp64d
if (g->zig_target->os == OsLinux) {
abi_name = (g->zig_target->arch == ZigLLVM_riscv32) ? "ilp32d" : "lp64d";
} else {
abi_name = (g->zig_target->arch == ZigLLVM_riscv32) ? "ilp32" : "lp64";
}
}
g->target_machine = ZigLLVMCreateTargetMachine(target_ref, buf_ptr(&g->llvm_triple_str),
target_specific_cpu_args, target_specific_features, opt_level, reloc_mode,
to_llvm_code_model(g), g->function_sections);
to_llvm_code_model(g), g->function_sections, float_abi, abi_name);
g->target_data_ref = LLVMCreateTargetDataLayout(g->target_machine);