diff --git a/src/arch/riscv64/CodeGen.zig b/src/arch/riscv64/CodeGen.zig
index ed177ed1f1..762251bc44 100644
--- a/src/arch/riscv64/CodeGen.zig
+++ b/src/arch/riscv64/CodeGen.zig
@@ -3592,7 +3592,7 @@ fn genCall(
 
                             _ = try sym.getOrCreateZigGotEntry(sym_index, elf_file);
                             const got_addr = sym.zigGotAddress(elf_file);
-                            try self.genSetReg(Type.usize, .ra, .{ .memory = got_addr });
+                            try self.genSetReg(Type.usize, .ra, .{ .memory = @intCast(got_addr) });
 
                             _ = try self.addInst(.{
                                 .tag = .jalr,