astgen: switchExprErrUnion, decl_val rvalue, identAsString ordering
Port switchExprErrUnion optimization for both catch and if patterns, fix missing rvalue call in decl table lookup, fix identAsString ordering for underscore error captures, and fill value_placeholder with 0xaa to match upstream undefined pattern. Enables corpus build.zig test. Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
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@@ -243,7 +243,21 @@ fn expectEqualZir(gpa: Allocator, ref: Zir, got: c.Zir) !void {
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const ref_datas = ref.instructions.items(.data);
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// 1. Compare lengths.
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try std.testing.expectEqual(ref_len, got.inst_len);
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if (ref_len != got.inst_len) {
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std.debug.print("inst_len mismatch: ref={d} got={d}\n", .{ ref_len, got.inst_len });
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var ref_counts: [265]u32 = .{0} ** 265;
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var got_counts: [265]u32 = .{0} ** 265;
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for (0..ref_len) |i| ref_counts[@intFromEnum(ref_tags[i])] += 1;
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for (0..got.inst_len) |i| got_counts[got.inst_tags[i]] += 1;
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for (0..265) |t| {
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if (ref_counts[t] != got_counts[t])
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std.debug.print("tag {d}: ref={d} got={d} (diff={d})\n", .{
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t, ref_counts[t], got_counts[t],
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@as(i32, @intCast(got_counts[t])) - @as(i32, @intCast(ref_counts[t])),
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});
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}
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return error.TestExpectedEqual;
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}
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// 2. Compare instruction tags.
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for (0..ref_len) |i| {
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@@ -793,10 +807,6 @@ test "astgen: corpus test_all.zig" {
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}
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test "astgen: corpus build.zig" {
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// TODO: 6 extra instructions — missing switchExprErrUnion optimization
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// (catch |err| switch(err) pattern emits SWITCH_BLOCK instead of
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// SWITCH_BLOCK_ERR_UNION).
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if (true) return error.SkipZigTest;
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const gpa = std.testing.allocator;
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try corpusCheck(gpa, @embedFile("../build.zig"));
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}
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