fix code formatting

2022-09-15 22:42:31 +02:00
parent e35a16c7e0
commit 2c971f0085
1 changed files with 1 additions and 2 deletions
--- a/src/arch/aarch64/Emit.zig
+++ b/src/arch/aarch64/Emit.zig
@@ -845,8 +845,7 @@ fn mirLoadMemoryPie(emit: *Emit, inst: Mir.Inst.Index) !void {
    try emit.writeInstruction(Instruction.adrp(reg.to64(), 0));

    switch (tag) {
-        .load_memory_got,
-        => {
+        .load_memory_got => {
            // ldr reg, reg, offset
            try emit.writeInstruction(Instruction.ldr(
                reg,