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Merge pull request #21843 from alexrp/callconv-followup

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Some follow-up work for #21697
This commit is contained in:
Alex Rønne Petersen
2024-11-03 14:27:09 +01:00
committed by GitHub
parent 2f003f39b2 e4e3d7ab41
commit 3054486d1d
24 changed files with 420 additions and 334 deletions
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35
src/codegen/c.zig
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@@ -7622,11 +7622,44 @@ fn toCallingConvention(cc: std.builtin.CallingConvention, zcu: *Zcu) ?[]const u8
.aarch64_vfabi => "aarch64_vector_pcs",
.aarch64_vfabi_sve => "aarch64_sve_pcs",
.arm_aapcs => "pcs(\"aapcs\")",
.arm_aapcs_vfp => "pcs(\"aapcs-vfp\")",
.arm_aapcs_vfp, .arm_aapcs16_vfp => "pcs(\"aapcs-vfp\")",
.arm_interrupt => |opts| switch (opts.type) {
.generic => "interrupt",
.irq => "interrupt(\"IRQ\")",
.fiq => "interrupt(\"FIQ\")",
.swi => "interrupt(\"SWI\")",
.abort => "interrupt(\"ABORT\")",
.undef => "interrupt(\"UNDEF\")",
},
.avr_signal => "signal",
.mips_interrupt,
.mips64_interrupt,
=> |opts| switch (opts.mode) {
inline else => |m| "interrupt(\"" ++ @tagName(m) ++ "\")",
},
.riscv64_lp64_v, .riscv32_ilp32_v => "riscv_vector_cc",
.riscv32_interrupt,
.riscv64_interrupt,
=> |opts| switch (opts.mode) {
inline else => |m| "interrupt(\"" ++ @tagName(m) ++ "\")",
},
.m68k_rtd => "m68k_rtd",
.avr_interrupt,
.csky_interrupt,
.m68k_interrupt,
.x86_interrupt,
.x86_64_interrupt,
=> "interrupt",
else => unreachable, // `Zcu.callconvSupported`
};
}

16
src/codegen/llvm.zig
View File

@@ -11749,7 +11749,14 @@ fn toLlvmCallConvTag(cc_tag: std.builtin.CallingConvention.Tag, target: std.Targ
.aarch64_vfabi_sve => .aarch64_sve_vector_pcs,
.arm_apcs => .arm_apcscc,
.arm_aapcs => .arm_aapcscc,
.arm_aapcs_vfp => .arm_aapcs_vfpcc,
.arm_aapcs_vfp => if (target.os.tag != .watchos)
.arm_aapcs_vfpcc
else
null,
.arm_aapcs16_vfp => if (target.os.tag == .watchos)
.arm_aapcs_vfpcc
else
null,
.riscv64_lp64_v => .riscv_vectorcallcc,
.riscv32_ilp32_v => .riscv_vectorcallcc,
.avr_builtin => .avr_builtincc,
@@ -11779,7 +11786,6 @@ fn toLlvmCallConvTag(cc_tag: std.builtin.CallingConvention.Tag, target: std.Targ
.aarch64_aapcs,
.aarch64_aapcs_darwin,
.aarch64_aapcs_win,
.arm_aapcs16_vfp,
.mips64_n64,
.mips64_n32,
.mips_o32,
@@ -11977,7 +11983,7 @@ fn firstParamSRet(fn_info: InternPool.Key.FuncType, zcu: *Zcu, target: std.Targe
.aarch64_aapcs_darwin,
.aarch64_aapcs_win,
=> aarch64_c_abi.classifyType(return_type, zcu) == .memory,
.arm_aapcs, .arm_aapcs_vfp => switch (arm_c_abi.classifyType(return_type, zcu, .ret)) {
.arm_aapcs, .arm_aapcs_vfp, .arm_aapcs16_vfp => switch (arm_c_abi.classifyType(return_type, zcu, .ret)) {
.memory, .i64_array => true,
.i32_array => |size| size != 1,
.byval => false,
@@ -12027,7 +12033,7 @@ fn lowerFnRetTy(o: *Object, fn_info: InternPool.Key.FuncType) Allocator.Error!Bu
.integer => return o.builder.intType(@intCast(return_type.bitSize(zcu))),
.double_integer => return o.builder.arrayType(2, .i64),
},
.arm_aapcs, .arm_aapcs_vfp => switch (arm_c_abi.classifyType(return_type, zcu, .ret)) {
.arm_aapcs, .arm_aapcs_vfp, .arm_aapcs16_vfp => switch (arm_c_abi.classifyType(return_type, zcu, .ret)) {
.memory, .i64_array => return .void,
.i32_array => |len| return if (len == 1) .i32 else .void,
.byval => return o.lowerType(return_type),
@@ -12276,7 +12282,7 @@ const ParamTypeIterator = struct {
.double_integer => return Lowering{ .i64_array = 2 },
}
},
.arm_aapcs, .arm_aapcs_vfp => {
.arm_aapcs, .arm_aapcs_vfp, .arm_aapcs16_vfp => {
it.zig_index += 1;
it.llvm_index += 1;
switch (arm_c_abi.classifyType(ty, zcu, .arg)) {