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behavior: additional llvm fixes

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This commit is contained in:
Jacob Young
2023-05-28 10:33:59 -04:00
committed by Andrew Kelley
parent 3b6ca1d35b
commit 3064d2aa7b
13 changed files with 161 additions and 138 deletions
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8
src/codegen/llvm.zig
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@@ -2773,7 +2773,7 @@ pub const DeclGen = struct {
return dg.context.intType(info.bits);
},
.Enum => {
const int_ty = try t.intTagType(mod);
const int_ty = t.intTagType(mod);
const bit_count = int_ty.intInfo(mod).bits;
assert(bit_count != 0);
return dg.context.intType(bit_count);
@@ -4148,9 +4148,7 @@ pub const DeclGen = struct {
const mod = dg.module;
const int_ty = switch (ty.zigTypeTag(mod)) {
.Int => ty,
.Enum => ty.intTagType(mod) catch |err| switch (err) {
error.OutOfMemory => @panic("OOM"),
},
.Enum => ty.intTagType(mod),
.Float => {
if (!is_rmw_xchg) return null;
return dg.context.intType(@intCast(c_uint, ty.abiSize(mod) * 8));
@@ -5100,7 +5098,7 @@ pub const FuncGen = struct {
const mod = self.dg.module;
const scalar_ty = operand_ty.scalarType(mod);
const int_ty = switch (scalar_ty.zigTypeTag(mod)) {
.Enum => try scalar_ty.intTagType(mod),
.Enum => scalar_ty.intTagType(mod),
.Int, .Bool, .Pointer, .ErrorSet => scalar_ty,
.Optional => blk: {
const payload_ty = operand_ty.optionalChild(mod);

6
src/codegen/spirv.zig
View File

@@ -700,7 +700,7 @@ pub const DeclGen = struct {
.enum_tag => {
const int_val = try val.enumToInt(ty, mod);
const int_ty = try ty.intTagType(mod);
const int_ty = ty.intTagType(mod);
try self.lower(int_ty, int_val);
},
@@ -1156,7 +1156,7 @@ pub const DeclGen = struct {
return try self.intType(int_info.signedness, int_info.bits);
},
.Enum => {
const tag_ty = try ty.intTagType(mod);
const tag_ty = ty.intTagType(mod);
return self.resolveType(tag_ty, repr);
},
.Float => {
@@ -3053,7 +3053,7 @@ pub const DeclGen = struct {
break :blk if (backing_bits <= 32) @as(u32, 1) else 2;
},
.Enum => blk: {
const int_ty = try cond_ty.intTagType(mod);
const int_ty = cond_ty.intTagType(mod);
const int_info = int_ty.intInfo(mod);
const backing_bits = self.backingIntBits(int_info.bits) orelse {
return self.todo("implement composite int switch", .{});