x86_64: implement write register splitting
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@@ -12071,7 +12071,7 @@ fn firstParamSRet(fn_info: InternPool.Key.FuncType, zcu: *Zcu, target: std.Targe
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}
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fn firstParamSRetSystemV(ty: Type, zcu: *Zcu, target: std.Target) bool {
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const class = x86_64_abi.classifySystemV(ty, zcu, target, .ret);
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const class = x86_64_abi.classifySystemV(ty, zcu, &target, .ret);
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if (class[0] == .memory) return true;
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if (class[0] == .x87 and class[2] != .none) return true;
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return false;
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@@ -12181,7 +12181,7 @@ fn lowerSystemVFnRetTy(o: *Object, fn_info: InternPool.Key.FuncType) Allocator.E
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return o.lowerType(return_type);
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}
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const target = zcu.getTarget();
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const classes = x86_64_abi.classifySystemV(return_type, zcu, target, .ret);
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const classes = x86_64_abi.classifySystemV(return_type, zcu, &target, .ret);
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if (classes[0] == .memory) return .void;
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var types_index: u32 = 0;
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var types_buffer: [8]Builder.Type = undefined;
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@@ -12459,7 +12459,7 @@ const ParamTypeIterator = struct {
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const zcu = it.object.pt.zcu;
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const ip = &zcu.intern_pool;
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const target = zcu.getTarget();
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const classes = x86_64_abi.classifySystemV(ty, zcu, target, .arg);
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const classes = x86_64_abi.classifySystemV(ty, zcu, &target, .arg);
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if (classes[0] == .memory) {
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it.zig_index += 1;
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it.llvm_index += 1;
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