From 5672cd73bc50948cd1cdd2ee898b4e6333ebbfb1 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Motiejus=20Jak=C5=A1tys?= Date: Fri, 13 Feb 2026 22:05:01 +0000 Subject: [PATCH] astgen: fix builtin_call ensure_result_used bit position BuiltinCall.Flags has ensure_result_used at bit 1, not bit 3 like Call/FieldCall. Separate the case to use the correct bit. Co-Authored-By: Claude Opus 4.6 --- astgen.c | 16 +++++++++++----- 1 file changed, 11 insertions(+), 5 deletions(-) diff --git a/astgen.c b/astgen.c index 8f000d2e28..5fa717f394 100644 --- a/astgen.c +++ b/astgen.c @@ -6560,17 +6560,23 @@ static bool addEnsureResult( uint32_t inst = maybe_unused_result - ZIR_REF_START_INDEX; ZirInstTag tag = ag->inst_tags[inst]; switch (tag) { - // For call/field_call/builtin_call: set ensure_result_used flag - // (bit 3 of flags at offset 0). Flags *must* be at offset 0 in all - // three structs (AstGen.zig:2658-2665, Zir.zig:3022). + // For call/field_call: set ensure_result_used flag + // (bit 3 of flags at offset 0). Flags *must* be at offset 0 + // (AstGen.zig:2658-2665, Zir.zig:3022). case ZIR_INST_CALL: - case ZIR_INST_FIELD_CALL: - case ZIR_INST_BUILTIN_CALL: { + case ZIR_INST_FIELD_CALL: { uint32_t pi = ag->inst_datas[inst].pl_node.payload_index; ag->extra[pi] |= (1u << 3); // ensure_result_used elide_check = true; break; } + // For builtin_call: ensure_result_used is at bit 1, not bit 3. + case ZIR_INST_BUILTIN_CALL: { + uint32_t pi = ag->inst_datas[inst].pl_node.payload_index; + ag->extra[pi] |= (1u << 1); // ensure_result_used + elide_check = true; + break; + } // Always noreturn → elide (AstGen.zig:2909). case ZIR_INST_BREAK: case ZIR_INST_BREAK_INLINE: