diff --git a/build.zig b/build.zig
index c4d2ebf352..af9f5898c5 100644
--- a/build.zig
+++ b/build.zig
@@ -663,10 +663,25 @@ pub fn build(b: *std.Build) !void {
     const zig0_target = blk: {
         if (!zig0_valgrind) break :blk target;
         var query = target.query;
-        //const arch = query.cpu_arch orelse @import("builtin").cpu.arch;
-        //if (arch == .x86_64) {
-        query.cpu_features_sub.addFeature(@intFromEnum(std.Target.x86.Feature.avx512f));
-        //}
+        const arch = query.cpu_arch orelse @import("builtin").cpu.arch;
+        if (arch == .x86_64) {
+            // Valgrind doesn't support AVX-512 instructions (EVEX prefix).
+            // Subtract all AVX-512 features so the zig CC won't emit them.
+            const F = std.Target.x86.Feature;
+            const avx512_features = [_]F{
+                .avx512f,          .avx512bw,
+                .avx512cd,         .avx512dq,
+                .avx512vl,         .avx512bf16,
+                .avx512bitalg,     .avx512er,
+                .avx512fp16,       .avx512ifma,
+                .avx512pf,         .avx512vbmi,
+                .avx512vbmi2,      .avx512vnni,
+                .avx512vp2intersect, .avx512vpopcntdq,
+                .evex512,
+            };
+            for (avx512_features) |f|
+                query.cpu_features_sub.addFeature(@intFromEnum(f));
+        }
         break :blk b.resolveTargetQuery(query);
     };