From 5e0b4836a1f48181b0d6df2b272add5aa79654c3 Mon Sep 17 00:00:00 2001 From: Veikka Tuominen Date: Sat, 22 Oct 2022 13:05:28 +0300 Subject: [PATCH] stage2: implement RISCV C ABI --- src/arch/aarch64/abi.zig | 4 +-- src/arch/arm/abi.zig | 3 +- src/arch/riscv64/abi.zig | 69 ++++++++++++++++++++++++++++++++++++++++ src/codegen/llvm.zig | 60 +++++++++++++++++++++++++--------- test/c_abi/cfuncs.c | 30 +++++++++++------ test/c_abi/main.zig | 15 +-------- 6 files changed, 138 insertions(+), 43 deletions(-) diff --git a/src/arch/aarch64/abi.zig b/src/arch/aarch64/abi.zig index 9471bb57f9..e83cc0444a 100644 --- a/src/arch/aarch64/abi.zig +++ b/src/arch/aarch64/abi.zig @@ -10,13 +10,13 @@ pub const Class = union(enum) { byval, integer, double_integer, - none, float_array: u8, }; /// For `float_array` the second element will be the amount of floats. pub fn classifyType(ty: Type, target: std.Target) Class { - if (!ty.hasRuntimeBitsIgnoreComptime()) return .none; + std.debug.assert(ty.hasRuntimeBitsIgnoreComptime()); + var maybe_float_bits: ?u16 = null; switch (ty.zigTypeTag()) { .Struct => { diff --git a/src/arch/arm/abi.zig b/src/arch/arm/abi.zig index 2ffca4e848..d8bbc5d1d1 100644 --- a/src/arch/arm/abi.zig +++ b/src/arch/arm/abi.zig @@ -7,7 +7,6 @@ const Type = @import("../../type.zig").Type; pub const Class = union(enum) { memory, byval, - none, i32_array: u8, i64_array: u8, @@ -24,7 +23,7 @@ pub const Class = union(enum) { pub const Context = enum { ret, arg }; pub fn classifyType(ty: Type, target: std.Target, ctx: Context) Class { - if (!ty.hasRuntimeBitsIgnoreComptime()) return .none; + std.debug.assert(ty.hasRuntimeBitsIgnoreComptime()); var maybe_float_bits: ?u16 = null; const max_byval_size = 512; diff --git a/src/arch/riscv64/abi.zig b/src/arch/riscv64/abi.zig index 3792c4ab18..8a560f4596 100644 --- a/src/arch/riscv64/abi.zig +++ b/src/arch/riscv64/abi.zig @@ -2,6 +2,75 @@ const std = @import("std"); const bits = @import("bits.zig"); const Register = bits.Register; const RegisterManagerFn = @import("../../register_manager.zig").RegisterManager; +const Type = @import("../../type.zig").Type; + +pub const Class = enum { memory, byval, integer, double_integer }; + +pub fn classifyType(ty: Type, target: std.Target) Class { + std.debug.assert(ty.hasRuntimeBitsIgnoreComptime()); + + const max_byval_size = target.cpu.arch.ptrBitWidth() * 2; + switch (ty.zigTypeTag()) { + .Struct => { + const bit_size = ty.bitSize(target); + if (ty.containerLayout() == .Packed) { + if (bit_size > max_byval_size) return .memory; + return .byval; + } + // TODO this doesn't exactly match what clang produces but its better than nothing + if (bit_size > max_byval_size) return .memory; + if (bit_size > max_byval_size / 2) return .double_integer; + return .integer; + }, + .Union => { + const bit_size = ty.bitSize(target); + if (ty.containerLayout() == .Packed) { + if (bit_size > max_byval_size) return .memory; + return .byval; + } + // TODO this doesn't exactly match what clang produces but its better than nothing + if (bit_size > max_byval_size) return .memory; + if (bit_size > max_byval_size / 2) return .double_integer; + return .integer; + }, + .Bool => return .integer, + .Float => return .byval, + .Int, .Enum, .ErrorSet => { + const bit_size = ty.bitSize(target); + if (bit_size > max_byval_size) return .memory; + return .byval; + }, + .Vector => { + const bit_size = ty.bitSize(target); + if (bit_size > max_byval_size) return .memory; + return .integer; + }, + .Optional => { + std.debug.assert(ty.isPtrLikeOptional()); + return .byval; + }, + .Pointer => { + std.debug.assert(!ty.isSlice()); + return .byval; + }, + .ErrorUnion, + .Frame, + .AnyFrame, + .NoReturn, + .Void, + .Type, + .ComptimeFloat, + .ComptimeInt, + .Undefined, + .Null, + .BoundFn, + .Fn, + .Opaque, + .EnumLiteral, + .Array, + => unreachable, + } +} pub const callee_preserved_regs = [_]Register{ .s0, .s1, .s2, .s3, .s4, .s5, .s6, .s7, .s8, .s9, .s10, .s11, diff --git a/src/codegen/llvm.zig b/src/codegen/llvm.zig index cc8ab10e4b..8b10895068 100644 --- a/src/codegen/llvm.zig +++ b/src/codegen/llvm.zig @@ -25,6 +25,7 @@ const x86_64_abi = @import("../arch/x86_64/abi.zig"); const wasm_c_abi = @import("../arch/wasm/abi.zig"); const aarch64_c_abi = @import("../arch/aarch64/abi.zig"); const arm_c_abi = @import("../arch/arm/abi.zig"); +const riscv_c_abi = @import("../arch/riscv64/abi.zig"); const Error = error{ OutOfMemory, CodegenFail }; @@ -10117,8 +10118,9 @@ fn firstParamSRet(fn_info: Type.Payload.Function.Data, target: std.Target) bool .arm, .armeb => switch (arm_c_abi.classifyType(fn_info.return_type, target, .ret)) { .memory, .i64_array => return true, .i32_array => |size| return size != 1, - .none, .byval => return false, + .byval => return false, }, + .riscv32, .riscv64 => return riscv_c_abi.classifyType(fn_info.return_type, target) == .memory, else => return false, // TODO investigate C ABI for other architectures }, else => return false, @@ -10230,7 +10232,7 @@ fn lowerFnRetTy(dg: *DeclGen, fn_info: Type.Payload.Function.Data) !*llvm.Type { }, .aarch64, .aarch64_be => { switch (aarch64_c_abi.classifyType(fn_info.return_type, target)) { - .memory, .none => return dg.context.voidType(), + .memory => return dg.context.voidType(), .float_array => return dg.lowerType(fn_info.return_type), .byval => return dg.lowerType(fn_info.return_type), .integer => { @@ -10249,7 +10251,23 @@ fn lowerFnRetTy(dg: *DeclGen, fn_info: Type.Payload.Function.Data) !*llvm.Type { return dg.context.voidType(); }, .byval => return dg.lowerType(fn_info.return_type), - .none => unreachable, + } + }, + .riscv32, .riscv64 => { + switch (riscv_c_abi.classifyType(fn_info.return_type, target)) { + .memory => return dg.context.voidType(), + .integer => { + const bit_size = fn_info.return_type.bitSize(target); + return dg.context.intType(@intCast(c_uint, bit_size)); + }, + .double_integer => { + var llvm_types_buffer: [2]*llvm.Type = .{ + dg.context.intType(64), + dg.context.intType(64), + }; + return dg.context.structType(&llvm_types_buffer, 2, .False); + }, + .byval => return dg.lowerType(fn_info.return_type), } }, // TODO investigate C ABI for other architectures @@ -10328,15 +10346,6 @@ const ParamTypeIterator = struct { .C => { const is_scalar = isScalar(ty); switch (it.target.cpu.arch) { - .riscv32, .riscv64 => { - it.zig_index += 1; - it.llvm_index += 1; - if (ty.tag() == .f16) { - return .as_u16; - } else { - return .byval; - } - }, .mips, .mipsel => { it.zig_index += 1; it.llvm_index += 1; @@ -10451,7 +10460,6 @@ const ParamTypeIterator = struct { it.zig_index += 1; it.llvm_index += 1; switch (aarch64_c_abi.classifyType(ty, it.target)) { - .none => unreachable, .memory => return .byref, .float_array => |len| return Lowering{ .float_array = len }, .byval => return .byval, @@ -10467,7 +10475,6 @@ const ParamTypeIterator = struct { it.zig_index += 1; it.llvm_index += 1; switch (arm_c_abi.classifyType(ty, it.target, .arg)) { - .none => unreachable, .memory => { it.byval_attr = true; return .byref; @@ -10477,6 +10484,21 @@ const ParamTypeIterator = struct { .i64_array => |size| return Lowering{ .i64_array = size }, } }, + .riscv32, .riscv64 => { + it.zig_index += 1; + it.llvm_index += 1; + if (ty.tag() == .f16) { + return .as_u16; + } + switch (riscv_c_abi.classifyType(ty, it.target)) { + .memory => { + return .byref; + }, + .byval => return .byval, + .integer => return .abi_sized_int, + .double_integer => return Lowering{ .i64_array = 2 }, + } + }, // TODO investigate C ABI for other architectures else => { it.zig_index += 1; @@ -10523,8 +10545,16 @@ fn ccAbiPromoteInt( }; if (int_info.bits <= 16) return int_info.signedness; switch (target.cpu.arch) { + .riscv64 => { + if (int_info.bits == 32) { + // LLVM always signextends 32 bit ints, unsure if bug. + return .signed; + } + if (int_info.bits < 64) { + return int_info.signedness; + } + }, .sparc64, - .riscv64, .powerpc64, .powerpc64le, => { diff --git a/test/c_abi/cfuncs.c b/test/c_abi/cfuncs.c index a6457a1f15..c47f89ebaf 100644 --- a/test/c_abi/cfuncs.c +++ b/test/c_abi/cfuncs.c @@ -16,6 +16,10 @@ static void assert_or_panic(bool ok) { # define ZIG_PPC32 #endif +#if defined __riscv && defined _ILP32 +# define ZIG_RISCV32 +#endif + #ifdef __i386__ # define ZIG_NO_I128 #endif @@ -32,6 +36,10 @@ static void assert_or_panic(bool ok) { # define ZIG_NO_I128 #endif +#ifdef ZIG_RISCV32 +# define ZIG_NO_I128 +#endif + #ifdef __i386__ # define ZIG_NO_COMPLEX #endif @@ -48,6 +56,10 @@ static void assert_or_panic(bool ok) { # define ZIG_NO_COMPLEX #endif +#ifdef __riscv +# define ZIG_NO_COMPLEX +#endif + #ifndef ZIG_NO_I128 struct i128 { __int128 value; @@ -265,7 +277,7 @@ void run_c_tests(void) { } #endif -#if !defined __mips__ && !defined __riscv && !defined ZIG_PPC32 +#if !defined __mips__ && !defined ZIG_PPC32 { struct BigStruct s = {1, 2, 3, 4, 5}; zig_big_struct(s); @@ -273,7 +285,7 @@ void run_c_tests(void) { #endif #if !defined __i386__ && !defined __arm__ && !defined __mips__ && \ - !defined __riscv && !defined ZIG_PPC32 && !defined _ARCH_PPC64 + !defined ZIG_PPC32 && !defined _ARCH_PPC64 { struct SmallStructInts s = {1, 2, 3, 4}; zig_small_struct_ints(s); @@ -299,14 +311,14 @@ void run_c_tests(void) { } #if !defined __i386__ && !defined __arm__ && !defined __mips__ && \ - !defined __riscv && !defined ZIG_PPC32 && !defined _ARCH_PPC64 + !defined ZIG_PPC32 && !defined _ARCH_PPC64 { struct SplitStructInts s = {1234, 100, 1337}; zig_split_struct_ints(s); } #endif -#if !defined __arm__ && !defined __riscv && !defined ZIG_PPC32 && !defined _ARCH_PPC64 +#if !defined __arm__ && !defined ZIG_PPC32 && !defined _ARCH_PPC64 { struct MedStructMixed s = {1234, 100.0f, 1337.0f}; zig_med_struct_mixed(s); @@ -314,14 +326,14 @@ void run_c_tests(void) { #endif #if !defined __i386__ && !defined __arm__ && !defined __mips__ && \ - !defined __riscv && !defined ZIG_PPC32 && !defined _ARCH_PPC64 + !defined ZIG_PPC32 && !defined _ARCH_PPC64 { struct SplitStructMixed s = {1234, 100, 1337.0f}; zig_split_struct_mixed(s); } #endif -#if !defined __mips__ && !defined __riscv && !defined ZIG_PPC32 +#if !defined __mips__ && !defined ZIG_PPC32 { struct BigStruct s = {30, 31, 32, 33, 34}; struct BigStruct res = zig_big_struct_both(s); @@ -333,7 +345,7 @@ void run_c_tests(void) { } #endif -#if !defined __riscv && !defined ZIG_PPC32 && !defined _ARCH_PPC64 +#if !defined ZIG_PPC32 && !defined _ARCH_PPC64 { struct Rect r1 = {1, 21, 16, 4}; struct Rect r2 = {178, 189, 21, 15}; @@ -341,7 +353,7 @@ void run_c_tests(void) { } #endif -#if !defined __mips__ && !defined __riscv && !defined ZIG_PPC32 +#if !defined __mips__ && !defined ZIG_PPC32 { struct FloatRect r1 = {1, 21, 16, 4}; struct FloatRect r2 = {178, 189, 21, 15}; @@ -354,9 +366,7 @@ void run_c_tests(void) { assert_or_panic(zig_ret_u8() == 0xff); assert_or_panic(zig_ret_u16() == 0xffff); -#ifndef __riscv assert_or_panic(zig_ret_u32() == 0xffffffff); -#endif assert_or_panic(zig_ret_u64() == 0xffffffffffffffff); assert_or_panic(zig_ret_i8() == -1); diff --git a/test/c_abi/main.zig b/test/c_abi/main.zig index 14364d34f8..bd2b057c38 100644 --- a/test/c_abi/main.zig +++ b/test/c_abi/main.zig @@ -171,7 +171,7 @@ extern fn c_cmultf(a: ComplexFloat, b: ComplexFloat) ComplexFloat; extern fn c_cmultd(a: ComplexDouble, b: ComplexDouble) ComplexDouble; const complex_abi_compatible = builtin.cpu.arch != .i386 and !builtin.cpu.arch.isMIPS() and - !builtin.cpu.arch.isARM() and !builtin.cpu.arch.isPPC(); + !builtin.cpu.arch.isARM() and !builtin.cpu.arch.isPPC() and !builtin.cpu.arch.isRISCV(); test "C ABI complex float" { if (!complex_abi_compatible) return error.SkipZigTest; @@ -265,7 +265,6 @@ extern fn c_big_struct(BigStruct) void; test "C ABI big struct" { if (comptime builtin.cpu.arch.isMIPS()) return error.SkipZigTest; - if (comptime builtin.cpu.arch.isRISCV()) return error.SkipZigTest; if (comptime builtin.cpu.arch.isPPC()) return error.SkipZigTest; var s = BigStruct{ @@ -292,7 +291,6 @@ const BigUnion = extern union { extern fn c_big_union(BigUnion) void; test "C ABI big union" { - if (comptime builtin.cpu.arch.isRISCV()) return error.SkipZigTest; if (comptime builtin.cpu.arch.isPPC()) return error.SkipZigTest; var x = BigUnion{ @@ -327,7 +325,6 @@ extern fn c_ret_med_struct_mixed() MedStructMixed; test "C ABI medium struct of ints and floats" { if (builtin.cpu.arch == .i386) return error.SkipZigTest; if (comptime builtin.cpu.arch.isMIPS()) return error.SkipZigTest; - if (comptime builtin.cpu.arch.isRISCV()) return error.SkipZigTest; if (comptime builtin.cpu.arch.isPPC()) return error.SkipZigTest; if (comptime builtin.cpu.arch.isPPC64()) return error.SkipZigTest; @@ -361,7 +358,6 @@ extern fn c_ret_small_struct_ints() SmallStructInts; test "C ABI small struct of ints" { if (builtin.cpu.arch == .i386) return error.SkipZigTest; if (comptime builtin.cpu.arch.isMIPS()) return error.SkipZigTest; - if (comptime builtin.cpu.arch.isRISCV()) return error.SkipZigTest; if (comptime builtin.cpu.arch.isPPC()) return error.SkipZigTest; if (comptime builtin.cpu.arch.isPPC64()) return error.SkipZigTest; @@ -444,7 +440,6 @@ extern fn c_split_struct_ints(SplitStructInt) void; test "C ABI split struct of ints" { if (builtin.cpu.arch == .i386) return error.SkipZigTest; if (comptime builtin.cpu.arch.isMIPS()) return error.SkipZigTest; - if (comptime builtin.cpu.arch.isRISCV()) return error.SkipZigTest; if (comptime builtin.cpu.arch.isPPC()) return error.SkipZigTest; if (comptime builtin.cpu.arch.isPPC64()) return error.SkipZigTest; @@ -473,7 +468,6 @@ extern fn c_ret_split_struct_mixed() SplitStructMixed; test "C ABI split struct of ints and floats" { if (builtin.cpu.arch == .i386) return error.SkipZigTest; if (comptime builtin.cpu.arch.isMIPS()) return error.SkipZigTest; - if (comptime builtin.cpu.arch.isRISCV()) return error.SkipZigTest; if (comptime builtin.cpu.arch.isPPC()) return error.SkipZigTest; if (comptime builtin.cpu.arch.isPPC64()) return error.SkipZigTest; @@ -502,7 +496,6 @@ extern fn c_multiple_struct_floats(FloatRect, FloatRect) void; test "C ABI sret and byval together" { if (comptime builtin.cpu.arch.isMIPS()) return error.SkipZigTest; - if (comptime builtin.cpu.arch.isRISCV()) return error.SkipZigTest; if (comptime builtin.cpu.arch.isPPC()) return error.SkipZigTest; var s = BigStruct{ @@ -555,7 +548,6 @@ extern fn c_big_struct_floats(Vector5) void; test "C ABI structs of floats as parameter" { if (comptime builtin.cpu.arch.isMIPS()) return error.SkipZigTest; - if (comptime builtin.cpu.arch.isRISCV()) return error.SkipZigTest; if (comptime builtin.cpu.arch.isPPC()) return error.SkipZigTest; if (comptime builtin.cpu.arch.isPPC64()) return error.SkipZigTest; @@ -596,7 +588,6 @@ export fn zig_multiple_struct_ints(x: Rect, y: Rect) void { } test "C ABI structs of ints as multiple parameters" { - if (comptime builtin.cpu.arch.isRISCV()) return error.SkipZigTest; if (comptime builtin.cpu.arch.isPPC()) return error.SkipZigTest; if (comptime builtin.cpu.arch.isPPC64()) return error.SkipZigTest; @@ -635,7 +626,6 @@ export fn zig_multiple_struct_floats(x: FloatRect, y: FloatRect) void { test "C ABI structs of floats as multiple parameters" { if (comptime builtin.cpu.arch.isMIPS()) return error.SkipZigTest; - if (comptime builtin.cpu.arch.isRISCV()) return error.SkipZigTest; if (comptime builtin.cpu.arch.isPPC()) return error.SkipZigTest; var r1 = FloatRect{ @@ -741,7 +731,6 @@ extern fn c_ret_struct_with_array() StructWithArray; test "Struct with array as padding." { if (builtin.cpu.arch == .i386) return error.SkipZigTest; if (comptime builtin.cpu.arch.isMIPS()) return error.SkipZigTest; - if (comptime builtin.cpu.arch.isRISCV()) return error.SkipZigTest; if (comptime builtin.cpu.arch.isPPC()) return error.SkipZigTest; if (comptime builtin.cpu.arch.isPPC64()) return error.SkipZigTest; @@ -768,7 +757,6 @@ extern fn c_ret_float_array_struct() FloatArrayStruct; test "Float array like struct" { if (comptime builtin.cpu.arch.isMIPS()) return error.SkipZigTest; - if (comptime builtin.cpu.arch.isRISCV()) return error.SkipZigTest; if (comptime builtin.cpu.arch.isPPC()) return error.SkipZigTest; c_float_array_struct(.{ @@ -796,7 +784,6 @@ extern fn c_ret_small_vec() SmallVec; test "small simd vector" { if (builtin.cpu.arch == .i386) return error.SkipZigTest; - if (comptime builtin.cpu.arch.isRISCV()) return error.SkipZigTest; if (comptime builtin.cpu.arch.isPPC64()) return error.SkipZigTest; c_small_vec(.{ 1, 2 });