stage1: fix f80 negation
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@@ -4139,13 +4139,9 @@ static LLVMValueRef ir_render_binary_not(CodeGen *g, Stage1Air *executable,
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static LLVMValueRef ir_gen_soft_f80_neg(CodeGen *g, ZigType *op_type, LLVMValueRef operand) {
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uint32_t vector_len = op_type->id == ZigTypeIdVector ? op_type->data.vector.len : 0;
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uint64_t buf[2] = {0, 0};
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if (g->is_big_endian != native_is_big_endian) {
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buf[1] = 0x8000000000000000;
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} else {
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buf[1] = 0x8000;
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}
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LLVMValueRef sign_mask = LLVMConstIntOfArbitraryPrecision(LLVMInt128Type(), 2, buf);
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LLVMTypeRef llvm_i80 = LLVMIntType(80);
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LLVMValueRef sign_mask = LLVMConstInt(llvm_i80, 1, false);
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sign_mask = LLVMConstShl(sign_mask, LLVMConstInt(llvm_i80, 79, false));
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LLVMValueRef result;
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if (vector_len == 0) {
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