diff --git a/stage0/astgen.c b/stage0/astgen.c
index 6fd0598854..1be087fe45 100644
--- a/stage0/astgen.c
+++ b/stage0/astgen.c
@@ -7541,8 +7541,16 @@ static uint32_t boolBinOp(
     uint32_t lhs_node = nd.lhs;
     uint32_t rhs_node = nd.rhs;
 
+    // coerced_bool_ri (AstGen.zig:392).
+    ResultLoc coerced_bool_ri = {
+        .tag = RL_COERCED_TY,
+        .data = ZIR_REF_BOOL_TYPE,
+        .src_node = 0,
+        .ctx = RI_CTX_NONE,
+    };
+
     // Evaluate LHS (AstGen.zig:6285).
-    uint32_t lhs = expr(gz, scope, lhs_node);
+    uint32_t lhs = exprRl(gz, scope, coerced_bool_ri, lhs_node);
 
     // Reserve the bool_br instruction (payload set later)
     // (AstGen.zig:6286).
@@ -7551,9 +7559,10 @@ static uint32_t boolBinOp(
 
     // Evaluate RHS in sub-block (AstGen.zig:6288-6293).
     GenZir rhs_scope = makeSubBlock(gz, scope);
-    uint32_t rhs = expr(&rhs_scope, &rhs_scope.base, rhs_node);
+    uint32_t rhs
+        = fullBodyExpr(&rhs_scope, &rhs_scope.base, coerced_bool_ri, rhs_node);
 
-    if (!ag->has_compile_errors) {
+    if (!refIsNoReturn(&rhs_scope, rhs)) {
         // break_inline from rhs to bool_br (AstGen.zig:6292).
         makeBreakInline(&rhs_scope, bool_br, rhs,
             (int32_t)rhs_node - (int32_t)rhs_scope.decl_node_index);
diff --git a/stage0/astgen_test.zig b/stage0/astgen_test.zig
index 282f4f2102..3610c981af 100644
--- a/stage0/astgen_test.zig
+++ b/stage0/astgen_test.zig
@@ -1221,7 +1221,7 @@ const corpus_files = .{
     "../test/behavior/bitcast.zig",
     "../test/behavior/bitreverse.zig",
     "../test/behavior/bit_shifting.zig",
-    //"../test/behavior/bool.zig",
+    "../test/behavior/bool.zig",
     //"../test/behavior/builtin_functions_returning_void_or_noreturn.zig",
     "../test/behavior/byteswap.zig",
     "../test/behavior/byval_arg_var.zig",