riscv: fix register clobber in certain edge cases

This commit is contained in:
David Rubin
2024-05-10 23:21:53 -07:00
parent 381a1043eb
commit 7ed2f2156f
4 changed files with 12 additions and 16 deletions

View File

@@ -618,7 +618,6 @@ test "enum with specified tag values" {
test "non-exhaustive enum" {
if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest;
if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
const S = struct {
const E = enum(u8) { a, b, _ };
@@ -683,7 +682,6 @@ test "empty non-exhaustive enum" {
test "single field non-exhaustive enum" {
if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest;
if (builtin.zig_backend == .stage2_sparc64) return error.SkipZigTest; // TODO
if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
const S = struct {
const E = enum(u8) { a, _ };