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Merge remote-tracking branch 'origin/master' into llvm9

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This commit is contained in:
Andrew Kelley
2019-09-19 17:02:32 -04:00
parent 5e34fb3597 925ffbce7f
commit 8a30edcde8
23 changed files with 1201 additions and 181 deletions
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30
src/all_types.hpp
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@@ -1351,7 +1351,7 @@ struct ZigTypeBoundFn {
};
struct ZigTypeVector {
// The type must be a pointer, integer, or float
// The type must be a pointer, integer, bool, or float
ZigType *elem_type;
uint32_t len;
};
@@ -1611,6 +1611,8 @@ enum BuiltinFnId {
BuiltinFnIdIntToEnum,
BuiltinFnIdIntType,
BuiltinFnIdVectorType,
BuiltinFnIdShuffle,
BuiltinFnIdSplat,
BuiltinFnIdSetCold,
BuiltinFnIdSetRuntimeSafety,
BuiltinFnIdSetFloatMode,
@@ -1770,6 +1772,7 @@ struct ZigLLVMFnKey {
} overflow_arithmetic;
struct {
uint32_t bit_count;
uint32_t vector_len; // 0 means not a vector
} bswap;
struct {
uint32_t bit_count;
@@ -2428,6 +2431,9 @@ enum IrInstructionId {
IrInstructionIdBoolToInt,
IrInstructionIdIntType,
IrInstructionIdVectorType,
IrInstructionIdShuffleVector,
IrInstructionIdSplatSrc,
IrInstructionIdSplatGen,
IrInstructionIdBoolNot,
IrInstructionIdMemset,
IrInstructionIdMemcpy,
@@ -3669,6 +3675,28 @@ struct IrInstructionVectorToArray {
IrInstruction *result_loc;
};
struct IrInstructionShuffleVector {
IrInstruction base;
IrInstruction *scalar_type;
IrInstruction *a;
IrInstruction *b;
IrInstruction *mask; // This is in zig-format, not llvm format
};
struct IrInstructionSplatSrc {
IrInstruction base;
IrInstruction *len;
IrInstruction *scalar;
};
struct IrInstructionSplatGen {
IrInstruction base;
IrInstruction *scalar;
};
struct IrInstructionAssertZero {
IrInstruction base;

9
src/analyze.cpp
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@@ -4708,6 +4708,7 @@ ZigType *get_int_type(CodeGen *g, bool is_signed, uint32_t size_in_bits) {
bool is_valid_vector_elem_type(ZigType *elem_type) {
return elem_type->id == ZigTypeIdInt ||
elem_type->id == ZigTypeIdFloat ||
elem_type->id == ZigTypeIdBool ||
get_codegen_ptr_type(elem_type) != nullptr;
}
@@ -4727,7 +4728,7 @@ ZigType *get_vector_type(CodeGen *g, uint32_t len, ZigType *elem_type) {
ZigType *entry = new_type_table_entry(ZigTypeIdVector);
if ((len != 0) && type_has_bits(elem_type)) {
// Vectors can only be ints, floats, or pointers. ints and floats have trivially resolvable
// Vectors can only be ints, floats, bools, or pointers. ints (inc. bools) and floats have trivially resolvable
// llvm type refs. pointers we will use usize instead.
LLVMTypeRef example_vector_llvm_type;
if (elem_type->id == ZigTypeIdPointer) {
@@ -6895,7 +6896,8 @@ uint32_t zig_llvm_fn_key_hash(ZigLLVMFnKey x) {
return (uint32_t)(x.data.floating.bit_count) * ((uint32_t)x.id + 1025) +
(uint32_t)(x.data.floating.vector_len) * (((uint32_t)x.id << 5) + 1025);
case ZigLLVMFnIdBswap:
return (uint32_t)(x.data.bswap.bit_count) * (uint32_t)3661994335;
return (uint32_t)(x.data.bswap.bit_count) * ((uint32_t)3661994335) +
(uint32_t)(x.data.bswap.vector_len) * (((uint32_t)x.id << 5) + 1025);
case ZigLLVMFnIdBitReverse:
return (uint32_t)(x.data.bit_reverse.bit_count) * (uint32_t)2621398431;
case ZigLLVMFnIdOverflowArithmetic:
@@ -6918,7 +6920,8 @@ bool zig_llvm_fn_key_eql(ZigLLVMFnKey a, ZigLLVMFnKey b) {
case ZigLLVMFnIdPopCount:
return a.data.pop_count.bit_count == b.data.pop_count.bit_count;
case ZigLLVMFnIdBswap:
return a.data.bswap.bit_count == b.data.bswap.bit_count;
return a.data.bswap.bit_count == b.data.bswap.bit_count &&
a.data.bswap.vector_len == b.data.bswap.vector_len;
case ZigLLVMFnIdBitReverse:
return a.data.bit_reverse.bit_count == b.data.bit_reverse.bit_count;
case ZigLLVMFnIdFloatOp:

151
src/codegen.cpp
View File

@@ -4505,7 +4505,11 @@ static LLVMValueRef ir_render_optional_unwrap_ptr(CodeGen *g, IrExecutable *exec
}
}
static LLVMValueRef get_int_builtin_fn(CodeGen *g, ZigType *int_type, BuiltinFnId fn_id) {
static LLVMValueRef get_int_builtin_fn(CodeGen *g, ZigType *expr_type, BuiltinFnId fn_id) {
bool is_vector = expr_type->id == ZigTypeIdVector;
ZigType *int_type = is_vector ? expr_type->data.vector.elem_type : expr_type;
assert(int_type->id == ZigTypeIdInt);
uint32_t vector_len = is_vector ? expr_type->data.vector.len : 0;
ZigLLVMFnKey key = {};
const char *fn_name;
uint32_t n_args;
@@ -4529,6 +4533,7 @@ static LLVMValueRef get_int_builtin_fn(CodeGen *g, ZigType *int_type, BuiltinFnI
n_args = 1;
key.id = ZigLLVMFnIdBswap;
key.data.bswap.bit_count = (uint32_t)int_type->data.integral.bit_count;
key.data.bswap.vector_len = vector_len;
} else if (fn_id == BuiltinFnIdBitReverse) {
fn_name = "bitreverse";
n_args = 1;
@@ -4543,12 +4548,15 @@ static LLVMValueRef get_int_builtin_fn(CodeGen *g, ZigType *int_type, BuiltinFnI
return existing_entry->value;
char llvm_name[64];
sprintf(llvm_name, "llvm.%s.i%" PRIu32, fn_name, int_type->data.integral.bit_count);
if (is_vector)
sprintf(llvm_name, "llvm.%s.v%" PRIu32 "i%" PRIu32, fn_name, vector_len, int_type->data.integral.bit_count);
else
sprintf(llvm_name, "llvm.%s.i%" PRIu32, fn_name, int_type->data.integral.bit_count);
LLVMTypeRef param_types[] = {
get_llvm_type(g, int_type),
get_llvm_type(g, expr_type),
LLVMInt1Type(),
};
LLVMTypeRef fn_type = LLVMFunctionType(get_llvm_type(g, int_type), param_types, n_args, false);
LLVMTypeRef fn_type = LLVMFunctionType(get_llvm_type(g, expr_type), param_types, n_args, false);
LLVMValueRef fn_val = LLVMAddFunction(g->module, llvm_name, fn_type);
assert(LLVMGetIntrinsicID(fn_val));
@@ -4581,6 +4589,48 @@ static LLVMValueRef ir_render_ctz(CodeGen *g, IrExecutable *executable, IrInstru
return gen_widen_or_shorten(g, false, int_type, instruction->base.value.type, wrong_size_int);
}
static LLVMValueRef ir_render_shuffle_vector(CodeGen *g, IrExecutable *executable, IrInstructionShuffleVector *instruction) {
uint64_t len_a = instruction->a->value.type->data.vector.len;
uint64_t len_mask = instruction->mask->value.type->data.vector.len;
// LLVM uses integers larger than the length of the first array to
// index into the second array. This was deemed unnecessarily fragile
// when changing code, so Zig uses negative numbers to index the
// second vector. These start at -1 and go down, and are easiest to use
// with the ~ operator. Here we convert between the two formats.
IrInstruction *mask = instruction->mask;
LLVMValueRef *values = allocate<LLVMValueRef>(len_mask);
for (uint64_t i = 0; i < len_mask; i++) {
if (mask->value.data.x_array.data.s_none.elements[i].special == ConstValSpecialUndef) {
values[i] = LLVMGetUndef(LLVMInt32Type());
} else {
int32_t v = bigint_as_signed(&mask->value.data.x_array.data.s_none.elements[i].data.x_bigint);
uint32_t index_val = (v >= 0) ? (uint32_t)v : (uint32_t)~v + (uint32_t)len_a;
values[i] = LLVMConstInt(LLVMInt32Type(), index_val, false);
}
}
LLVMValueRef llvm_mask_value = LLVMConstVector(values, len_mask);
free(values);
return LLVMBuildShuffleVector(g->builder,
ir_llvm_value(g, instruction->a),
ir_llvm_value(g, instruction->b),
llvm_mask_value, "");
}
static LLVMValueRef ir_render_splat(CodeGen *g, IrExecutable *executable, IrInstructionSplatGen *instruction) {
ZigType *result_type = instruction->base.value.type;
src_assert(result_type->id == ZigTypeIdVector, instruction->base.source_node);
uint32_t len = result_type->data.vector.len;
LLVMTypeRef op_llvm_type = LLVMVectorType(get_llvm_type(g, instruction->scalar->value.type), 1);
LLVMTypeRef mask_llvm_type = LLVMVectorType(LLVMInt32Type(), len);
LLVMValueRef undef_vector = LLVMGetUndef(op_llvm_type);
LLVMValueRef op_vector = LLVMBuildInsertElement(g->builder, undef_vector,
ir_llvm_value(g, instruction->scalar), LLVMConstInt(LLVMInt32Type(), 0, false), "");
return LLVMBuildShuffleVector(g->builder, op_vector, undef_vector, LLVMConstNull(mask_llvm_type), "");
}
static LLVMValueRef ir_render_pop_count(CodeGen *g, IrExecutable *executable, IrInstructionPopCount *instruction) {
ZigType *int_type = instruction->op->value.type;
LLVMValueRef fn_val = get_int_builtin_fn(g, int_type, BuiltinFnIdPopCount);
@@ -5512,25 +5562,36 @@ static LLVMValueRef ir_render_mul_add(CodeGen *g, IrExecutable *executable, IrIn
static LLVMValueRef ir_render_bswap(CodeGen *g, IrExecutable *executable, IrInstructionBswap *instruction) {
LLVMValueRef op = ir_llvm_value(g, instruction->op);
ZigType *int_type = instruction->base.value.type;
ZigType *expr_type = instruction->base.value.type;
bool is_vector = expr_type->id == ZigTypeIdVector;
ZigType *int_type = is_vector ? expr_type->data.vector.elem_type : expr_type;
assert(int_type->id == ZigTypeIdInt);
if (int_type->data.integral.bit_count % 16 == 0) {
LLVMValueRef fn_val = get_int_builtin_fn(g, instruction->base.value.type, BuiltinFnIdBswap);
LLVMValueRef fn_val = get_int_builtin_fn(g, expr_type, BuiltinFnIdBswap);
return LLVMBuildCall(g->builder, fn_val, &op, 1, "");
}
// Not an even number of bytes, so we zext 1 byte, then bswap, shift right 1 byte, truncate
ZigType *extended_type = get_int_type(g, int_type->data.integral.is_signed,
int_type->data.integral.bit_count + 8);
LLVMValueRef shift_amt = LLVMConstInt(get_llvm_type(g, extended_type), 8, false);
if (is_vector) {
extended_type = get_vector_type(g, expr_type->data.vector.len, extended_type);
LLVMValueRef *values = allocate_nonzero<LLVMValueRef>(expr_type->data.vector.len);
for (uint32_t i = 0; i < expr_type->data.vector.len; i += 1) {
values[i] = shift_amt;
}
shift_amt = LLVMConstVector(values, expr_type->data.vector.len);
free(values);
}
// aabbcc
LLVMValueRef extended = LLVMBuildZExt(g->builder, op, get_llvm_type(g, extended_type), "");
// 00aabbcc
LLVMValueRef fn_val = get_int_builtin_fn(g, extended_type, BuiltinFnIdBswap);
LLVMValueRef swapped = LLVMBuildCall(g->builder, fn_val, &extended, 1, "");
// ccbbaa00
LLVMValueRef shifted = ZigLLVMBuildLShrExact(g->builder, swapped,
LLVMConstInt(get_llvm_type(g, extended_type), 8, false), "");
LLVMValueRef shifted = ZigLLVMBuildLShrExact(g->builder, swapped, shift_amt, "");
// 00ccbbaa
return LLVMBuildTrunc(g->builder, shifted, get_llvm_type(g, int_type), "");
return LLVMBuildTrunc(g->builder, shifted, get_llvm_type(g, expr_type), "");
}
static LLVMValueRef ir_render_bit_reverse(CodeGen *g, IrExecutable *executable, IrInstructionBitReverse *instruction) {
@@ -5549,10 +5610,29 @@ static LLVMValueRef ir_render_vector_to_array(CodeGen *g, IrExecutable *executab
assert(handle_is_ptr(array_type));
LLVMValueRef result_loc = ir_llvm_value(g, instruction->result_loc);
LLVMValueRef vector = ir_llvm_value(g, instruction->vector);
LLVMValueRef casted_ptr = LLVMBuildBitCast(g->builder, result_loc,
LLVMPointerType(get_llvm_type(g, instruction->vector->value.type), 0), "");
uint32_t alignment = get_ptr_align(g, instruction->result_loc->value.type);
gen_store_untyped(g, vector, casted_ptr, alignment, false);
ZigType *elem_type = array_type->data.array.child_type;
bool bitcast_ok = elem_type->size_in_bits == elem_type->abi_size * 8;
if (bitcast_ok) {
LLVMValueRef casted_ptr = LLVMBuildBitCast(g->builder, result_loc,
LLVMPointerType(get_llvm_type(g, instruction->vector->value.type), 0), "");
uint32_t alignment = get_ptr_align(g, instruction->result_loc->value.type);
gen_store_untyped(g, vector, casted_ptr, alignment, false);
} else {
// If the ABI size of the element type is not evenly divisible by size_in_bits, a simple bitcast
// will not work, and we fall back to extractelement.
LLVMTypeRef usize_type_ref = g->builtin_types.entry_usize->llvm_type;
LLVMTypeRef u32_type_ref = LLVMInt32Type();
LLVMValueRef zero = LLVMConstInt(usize_type_ref, 0, false);
for (uintptr_t i = 0; i < instruction->vector->value.type->data.vector.len; i++) {
LLVMValueRef index_usize = LLVMConstInt(usize_type_ref, i, false);
LLVMValueRef index_u32 = LLVMConstInt(u32_type_ref, i, false);
LLVMValueRef indexes[] = { zero, index_usize };
LLVMValueRef elem_ptr = LLVMBuildInBoundsGEP(g->builder, result_loc, indexes, 2, "");
LLVMValueRef elem = LLVMBuildExtractElement(g->builder, vector, index_u32, "");
LLVMBuildStore(g->builder, elem, elem_ptr);
}
}
return result_loc;
}
@@ -5563,12 +5643,34 @@ static LLVMValueRef ir_render_array_to_vector(CodeGen *g, IrExecutable *executab
assert(vector_type->id == ZigTypeIdVector);
assert(!handle_is_ptr(vector_type));
LLVMValueRef array_ptr = ir_llvm_value(g, instruction->array);
LLVMValueRef casted_ptr = LLVMBuildBitCast(g->builder, array_ptr,
LLVMPointerType(get_llvm_type(g, vector_type), 0), "");
ZigType *array_type = instruction->array->value.type;
assert(array_type->id == ZigTypeIdArray);
uint32_t alignment = get_abi_alignment(g, array_type->data.array.child_type);
return gen_load_untyped(g, casted_ptr, alignment, false, "");
LLVMTypeRef vector_type_ref = get_llvm_type(g, vector_type);
ZigType *elem_type = vector_type->data.vector.elem_type;
bool bitcast_ok = elem_type->size_in_bits == elem_type->abi_size * 8;
if (bitcast_ok) {
LLVMValueRef casted_ptr = LLVMBuildBitCast(g->builder, array_ptr,
LLVMPointerType(vector_type_ref, 0), "");
ZigType *array_type = instruction->array->value.type;
assert(array_type->id == ZigTypeIdArray);
uint32_t alignment = get_abi_alignment(g, array_type->data.array.child_type);
return gen_load_untyped(g, casted_ptr, alignment, false, "");
} else {
// If the ABI size of the element type is not evenly divisible by size_in_bits, a simple bitcast
// will not work, and we fall back to insertelement.
LLVMTypeRef usize_type_ref = g->builtin_types.entry_usize->llvm_type;
LLVMTypeRef u32_type_ref = LLVMInt32Type();
LLVMValueRef zero = LLVMConstInt(usize_type_ref, 0, false);
LLVMValueRef vector = LLVMGetUndef(vector_type_ref);
for (uintptr_t i = 0; i < instruction->base.value.type->data.vector.len; i++) {
LLVMValueRef index_usize = LLVMConstInt(usize_type_ref, i, false);
LLVMValueRef index_u32 = LLVMConstInt(u32_type_ref, i, false);
LLVMValueRef indexes[] = { zero, index_usize };
LLVMValueRef elem_ptr = LLVMBuildInBoundsGEP(g->builder, array_ptr, indexes, 2, "");
LLVMValueRef elem = LLVMBuildLoad(g->builder, elem_ptr, "");
vector = LLVMBuildInsertElement(g->builder, vector, elem, index_u32, "");
}
return vector;
}
}
static LLVMValueRef ir_render_assert_zero(CodeGen *g, IrExecutable *executable,
@@ -5896,6 +5998,7 @@ static LLVMValueRef ir_render_instruction(CodeGen *g, IrExecutable *executable,
case IrInstructionIdFrameSizeSrc:
case IrInstructionIdAllocaGen:
case IrInstructionIdAwaitSrc:
case IrInstructionIdSplatSrc:
zig_unreachable();
case IrInstructionIdDeclVarGen:
@@ -6054,6 +6157,10 @@ static LLVMValueRef ir_render_instruction(CodeGen *g, IrExecutable *executable,
return ir_render_spill_begin(g, executable, (IrInstructionSpillBegin *)instruction);
case IrInstructionIdSpillEnd:
return ir_render_spill_end(g, executable, (IrInstructionSpillEnd *)instruction);
case IrInstructionIdShuffleVector:
return ir_render_shuffle_vector(g, executable, (IrInstructionShuffleVector *) instruction);
case IrInstructionIdSplatGen:
return ir_render_splat(g, executable, (IrInstructionSplatGen *) instruction);
}
zig_unreachable();
}
@@ -7419,7 +7526,9 @@ static void do_code_gen(CodeGen *g) {
}
char *error = nullptr;
LLVMVerifyModule(g->module, LLVMAbortProcessAction, &error);
if (LLVMVerifyModule(g->module, LLVMReturnStatusAction, &error)) {
zig_panic("broken LLVM module found: %s", error);
}
}
static void zig_llvm_emit_output(CodeGen *g) {
@@ -7744,6 +7853,8 @@ static void define_builtin_fns(CodeGen *g) {
create_builtin_fn(g, BuiltinFnIdCompileLog, "compileLog", SIZE_MAX);
create_builtin_fn(g, BuiltinFnIdIntType, "IntType", 2); // TODO rename to Int
create_builtin_fn(g, BuiltinFnIdVectorType, "Vector", 2);
create_builtin_fn(g, BuiltinFnIdShuffle, "shuffle", 4);
create_builtin_fn(g, BuiltinFnIdSplat, "splat", 2);
create_builtin_fn(g, BuiltinFnIdSetCold, "setCold", 1);
create_builtin_fn(g, BuiltinFnIdSetRuntimeSafety, "setRuntimeSafety", 1);
create_builtin_fn(g, BuiltinFnIdSetFloatMode, "setFloatMode", 1);

568
src/ir.cpp
View File

@@ -717,6 +717,18 @@ static constexpr IrInstructionId ir_instruction_id(IrInstructionVectorType *) {
return IrInstructionIdVectorType;
}
static constexpr IrInstructionId ir_instruction_id(IrInstructionShuffleVector *) {
return IrInstructionIdShuffleVector;
}
static constexpr IrInstructionId ir_instruction_id(IrInstructionSplatSrc *) {
return IrInstructionIdSplatSrc;
}
static constexpr IrInstructionId ir_instruction_id(IrInstructionSplatGen *) {
return IrInstructionIdSplatGen;
}
static constexpr IrInstructionId ir_instruction_id(IrInstructionBoolNot *) {
return IrInstructionIdBoolNot;
}
@@ -2277,6 +2289,38 @@ static IrInstruction *ir_build_vector_type(IrBuilder *irb, Scope *scope, AstNode
return &instruction->base;
}
static IrInstruction *ir_build_shuffle_vector(IrBuilder *irb, Scope *scope, AstNode *source_node,
IrInstruction *scalar_type, IrInstruction *a, IrInstruction *b, IrInstruction *mask)
{
IrInstructionShuffleVector *instruction = ir_build_instruction<IrInstructionShuffleVector>(irb, scope, source_node);
instruction->scalar_type = scalar_type;
instruction->a = a;
instruction->b = b;
instruction->mask = mask;
if (scalar_type != nullptr) {
ir_ref_instruction(scalar_type, irb->current_basic_block);
}
ir_ref_instruction(a, irb->current_basic_block);
ir_ref_instruction(b, irb->current_basic_block);
ir_ref_instruction(mask, irb->current_basic_block);
return &instruction->base;
}
static IrInstruction *ir_build_splat_src(IrBuilder *irb, Scope *scope, AstNode *source_node,
IrInstruction *len, IrInstruction *scalar)
{
IrInstructionSplatSrc *instruction = ir_build_instruction<IrInstructionSplatSrc>(irb, scope, source_node);
instruction->len = len;
instruction->scalar = scalar;
ir_ref_instruction(len, irb->current_basic_block);
ir_ref_instruction(scalar, irb->current_basic_block);
return &instruction->base;
}
static IrInstruction *ir_build_bool_not(IrBuilder *irb, Scope *scope, AstNode *source_node, IrInstruction *value) {
IrInstructionBoolNot *instruction = ir_build_instruction<IrInstructionBoolNot>(irb, scope, source_node);
instruction->value = value;
@@ -2333,6 +2377,19 @@ static IrInstruction *ir_build_slice_src(IrBuilder *irb, Scope *scope, AstNode *
return &instruction->base;
}
static IrInstruction *ir_build_splat_gen(IrAnalyze *ira, IrInstruction *source_instruction, ZigType *result_type,
IrInstruction *scalar)
{
IrInstructionSplatGen *instruction = ir_build_instruction<IrInstructionSplatGen>(
&ira->new_irb, source_instruction->scope, source_instruction->source_node);
instruction->base.value.type = result_type;
instruction->scalar = scalar;
ir_ref_instruction(scalar, ira->new_irb.current_basic_block);
return &instruction->base;
}
static IrInstruction *ir_build_slice_gen(IrAnalyze *ira, IrInstruction *source_instruction, ZigType *slice_type,
IrInstruction *ptr, IrInstruction *start, IrInstruction *end, bool safety_check_on, IrInstruction *result_loc)
{
@@ -4936,6 +4993,48 @@ static IrInstruction *ir_gen_builtin_fn_call(IrBuilder *irb, Scope *scope, AstNo
IrInstruction *vector_type = ir_build_vector_type(irb, scope, node, arg0_value, arg1_value);
return ir_lval_wrap(irb, scope, vector_type, lval, result_loc);
}
case BuiltinFnIdShuffle:
{
AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
if (arg0_value == irb->codegen->invalid_instruction)
return arg0_value;
AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
if (arg1_value == irb->codegen->invalid_instruction)
return arg1_value;
AstNode *arg2_node = node->data.fn_call_expr.params.at(2);
IrInstruction *arg2_value = ir_gen_node(irb, arg2_node, scope);
if (arg2_value == irb->codegen->invalid_instruction)
return arg2_value;
AstNode *arg3_node = node->data.fn_call_expr.params.at(3);
IrInstruction *arg3_value = ir_gen_node(irb, arg3_node, scope);
if (arg3_value == irb->codegen->invalid_instruction)
return arg3_value;
IrInstruction *shuffle_vector = ir_build_shuffle_vector(irb, scope, node,
arg0_value, arg1_value, arg2_value, arg3_value);
return ir_lval_wrap(irb, scope, shuffle_vector, lval, result_loc);
}
case BuiltinFnIdSplat:
{
AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
IrInstruction *arg0_value = ir_gen_node(irb, arg0_node, scope);
if (arg0_value == irb->codegen->invalid_instruction)
return arg0_value;
AstNode *arg1_node = node->data.fn_call_expr.params.at(1);
IrInstruction *arg1_value = ir_gen_node(irb, arg1_node, scope);
if (arg1_value == irb->codegen->invalid_instruction)
return arg1_value;
IrInstruction *splat = ir_build_splat_src(irb, scope, node,
arg0_value, arg1_value);
return ir_lval_wrap(irb, scope, splat, lval, result_loc);
}
case BuiltinFnIdMemcpy:
{
AstNode *arg0_node = node->data.fn_call_expr.params.at(0);
@@ -11000,14 +11099,41 @@ static ZigType *ir_resolve_type(IrAnalyze *ira, IrInstruction *type_value) {
return ir_resolve_const_type(ira->codegen, ira->new_irb.exec, type_value->source_node, val);
}
static Error ir_validate_vector_elem_type(IrAnalyze *ira, IrInstruction *source_instr, ZigType *elem_type) {
if (!is_valid_vector_elem_type(elem_type)) {
ir_add_error(ira, source_instr,
buf_sprintf("vector element type must be integer, float, bool, or pointer; '%s' is invalid",
buf_ptr(&elem_type->name)));
return ErrorSemanticAnalyzeFail;
}
return ErrorNone;
}
static ZigType *ir_resolve_vector_elem_type(IrAnalyze *ira, IrInstruction *elem_type_value) {
Error err;
ZigType *elem_type = ir_resolve_type(ira, elem_type_value);
if (type_is_invalid(elem_type))
return ira->codegen->builtin_types.entry_invalid;
if ((err = ir_validate_vector_elem_type(ira, elem_type_value, elem_type)))
return ira->codegen->builtin_types.entry_invalid;
return elem_type;
}
static ZigType *ir_resolve_int_type(IrAnalyze *ira, IrInstruction *type_value) {
ZigType *ty = ir_resolve_type(ira, type_value);
if (type_is_invalid(ty))
return ira->codegen->builtin_types.entry_invalid;
if (ty->id != ZigTypeIdInt) {
ir_add_error(ira, type_value,
ErrorMsg *msg = ir_add_error(ira, type_value,
buf_sprintf("expected integer type, found '%s'", buf_ptr(&ty->name)));
if (ty->id == ZigTypeIdVector &&
ty->data.vector.elem_type->id == ZigTypeIdInt)
{
add_error_note(ira->codegen, msg, type_value->source_node,
buf_sprintf("represent vectors with their element types, i.e. '%s'",
buf_ptr(&ty->data.vector.elem_type->name)));
}
return ira->codegen->builtin_types.entry_invalid;
}
@@ -13092,6 +13218,59 @@ static bool optional_value_is_null(ConstExprValue *val) {
}
}
static IrInstruction *ir_evaluate_bin_op_cmp(IrAnalyze *ira, ZigType *resolved_type,
ConstExprValue *op1_val, ConstExprValue *op2_val, IrInstructionBinOp *bin_op_instruction, IrBinOp op_id,
bool one_possible_value) {
if (op1_val->special == ConstValSpecialUndef ||
op2_val->special == ConstValSpecialUndef)
return ir_const_undef(ira, &bin_op_instruction->base, resolved_type);
if (resolved_type->id == ZigTypeIdComptimeFloat || resolved_type->id == ZigTypeIdFloat) {
if (float_is_nan(op1_val) || float_is_nan(op2_val)) {
return ir_const_bool(ira, &bin_op_instruction->base, op_id == IrBinOpCmpNotEq);
}
Cmp cmp_result = float_cmp(op1_val, op2_val);
bool answer = resolve_cmp_op_id(op_id, cmp_result);
return ir_const_bool(ira, &bin_op_instruction->base, answer);
} else if (resolved_type->id == ZigTypeIdComptimeInt || resolved_type->id == ZigTypeIdInt) {
Cmp cmp_result = bigint_cmp(&op1_val->data.x_bigint, &op2_val->data.x_bigint);
bool answer = resolve_cmp_op_id(op_id, cmp_result);
return ir_const_bool(ira, &bin_op_instruction->base, answer);
} else if (resolved_type->id == ZigTypeIdPointer && op_id != IrBinOpCmpEq && op_id != IrBinOpCmpNotEq) {
if ((op1_val->data.x_ptr.special == ConstPtrSpecialHardCodedAddr ||
op1_val->data.x_ptr.special == ConstPtrSpecialNull) &&
(op2_val->data.x_ptr.special == ConstPtrSpecialHardCodedAddr ||
op2_val->data.x_ptr.special == ConstPtrSpecialNull))
{
uint64_t op1_addr = op1_val->data.x_ptr.special == ConstPtrSpecialNull ?
0 : op1_val->data.x_ptr.data.hard_coded_addr.addr;
uint64_t op2_addr = op2_val->data.x_ptr.special == ConstPtrSpecialNull ?
0 : op2_val->data.x_ptr.data.hard_coded_addr.addr;
Cmp cmp_result;
if (op1_addr > op2_addr) {
cmp_result = CmpGT;
} else if (op1_addr < op2_addr) {
cmp_result = CmpLT;
} else {
cmp_result = CmpEQ;
}
bool answer = resolve_cmp_op_id(op_id, cmp_result);
return ir_const_bool(ira, &bin_op_instruction->base, answer);
}
} else {
bool are_equal = one_possible_value || const_values_equal(ira->codegen, op1_val, op2_val);
bool answer;
if (op_id == IrBinOpCmpEq) {
answer = are_equal;
} else if (op_id == IrBinOpCmpNotEq) {
answer = !are_equal;
} else {
zig_unreachable();
}
return ir_const_bool(ira, &bin_op_instruction->base, answer);
}
zig_unreachable();
}
// Returns ErrorNotLazy when the value cannot be determined
static Error lazy_cmp_zero(AstNode *source_node, ConstExprValue *val, Cmp *result) {
Error err;
@@ -13477,51 +13656,22 @@ never_mind_just_calculate_it_normally:
ConstExprValue *op2_val = one_possible_value ? &casted_op2->value : ir_resolve_const(ira, casted_op2, UndefBad);
if (op2_val == nullptr)
return ira->codegen->invalid_instruction;
if (resolved_type->id != ZigTypeIdVector)
return ir_evaluate_bin_op_cmp(ira, resolved_type, op1_val, op2_val, bin_op_instruction, op_id, one_possible_value);
IrInstruction *result = ir_const(ira, &bin_op_instruction->base,
get_vector_type(ira->codegen, resolved_type->data.vector.len, ira->codegen->builtin_types.entry_bool));
result->value.data.x_array.data.s_none.elements =
create_const_vals(resolved_type->data.vector.len);
if (resolved_type->id == ZigTypeIdComptimeFloat || resolved_type->id == ZigTypeIdFloat) {
if (float_is_nan(op1_val) || float_is_nan(op2_val)) {
return ir_const_bool(ira, &bin_op_instruction->base, op_id == IrBinOpCmpNotEq);
}
Cmp cmp_result = float_cmp(op1_val, op2_val);
bool answer = resolve_cmp_op_id(op_id, cmp_result);
return ir_const_bool(ira, &bin_op_instruction->base, answer);
} else if (resolved_type->id == ZigTypeIdComptimeInt || resolved_type->id == ZigTypeIdInt) {
Cmp cmp_result = bigint_cmp(&op1_val->data.x_bigint, &op2_val->data.x_bigint);
bool answer = resolve_cmp_op_id(op_id, cmp_result);
return ir_const_bool(ira, &bin_op_instruction->base, answer);
} else if (resolved_type->id == ZigTypeIdPointer && op_id != IrBinOpCmpEq && op_id != IrBinOpCmpNotEq) {
if ((op1_val->data.x_ptr.special == ConstPtrSpecialHardCodedAddr ||
op1_val->data.x_ptr.special == ConstPtrSpecialNull) &&
(op2_val->data.x_ptr.special == ConstPtrSpecialHardCodedAddr ||
op2_val->data.x_ptr.special == ConstPtrSpecialNull))
{
uint64_t op1_addr = op1_val->data.x_ptr.special == ConstPtrSpecialNull ?
0 : op1_val->data.x_ptr.data.hard_coded_addr.addr;
uint64_t op2_addr = op2_val->data.x_ptr.special == ConstPtrSpecialNull ?
0 : op2_val->data.x_ptr.data.hard_coded_addr.addr;
Cmp cmp_result;
if (op1_addr > op2_addr) {
cmp_result = CmpGT;
} else if (op1_addr < op2_addr) {
cmp_result = CmpLT;
} else {
cmp_result = CmpEQ;
}
bool answer = resolve_cmp_op_id(op_id, cmp_result);
return ir_const_bool(ira, &bin_op_instruction->base, answer);
}
} else {
bool are_equal = one_possible_value || const_values_equal(ira->codegen, op1_val, op2_val);
bool answer;
if (op_id == IrBinOpCmpEq) {
answer = are_equal;
} else if (op_id == IrBinOpCmpNotEq) {
answer = !are_equal;
} else {
zig_unreachable();
}
return ir_const_bool(ira, &bin_op_instruction->base, answer);
expand_undef_array(ira->codegen, &result->value);
for (size_t i = 0;i < resolved_type->data.vector.len;i++) {
IrInstruction *cur_res = ir_evaluate_bin_op_cmp(ira, resolved_type->data.vector.elem_type,
&op1_val->data.x_array.data.s_none.elements[i],
&op2_val->data.x_array.data.s_none.elements[i],
bin_op_instruction, op_id, one_possible_value);
copy_const_val(&result->value.data.x_array.data.s_none.elements[i], &cur_res->value, false);
}
return result;
}
// some comparisons with unsigned numbers can be evaluated
@@ -13564,7 +13714,12 @@ never_mind_just_calculate_it_normally:
IrInstruction *result = ir_build_bin_op(&ira->new_irb,
bin_op_instruction->base.scope, bin_op_instruction->base.source_node,
op_id, casted_op1, casted_op2, bin_op_instruction->safety_check_on);
result->value.type = ira->codegen->builtin_types.entry_bool;
if (resolved_type->id == ZigTypeIdVector) {
result->value.type = get_vector_type(ira->codegen, resolved_type->data.vector.len,
ira->codegen->builtin_types.entry_bool);
} else {
result->value.type = ira->codegen->builtin_types.entry_bool;
}
return result;
}
@@ -15198,7 +15353,7 @@ static IrInstruction *ir_resolve_result_raw(IrAnalyze *ira, IrInstruction *suspe
}
peer_parent->skipped = true;
return ir_resolve_result(ira, suspend_source_instr, peer_parent->parent,
value_type, value, force_runtime, true, true);
value_type, value, force_runtime || !is_comptime, true, true);
}
if (peer_parent->resolved_type == nullptr) {
@@ -22018,22 +22173,253 @@ static IrInstruction *ir_analyze_instruction_vector_type(IrAnalyze *ira, IrInstr
if (!ir_resolve_unsigned(ira, instruction->len->child, ira->codegen->builtin_types.entry_u32, &len))
return ira->codegen->invalid_instruction;
ZigType *elem_type = ir_resolve_type(ira, instruction->elem_type->child);
ZigType *elem_type = ir_resolve_vector_elem_type(ira, instruction->elem_type->child);
if (type_is_invalid(elem_type))
return ira->codegen->invalid_instruction;
if (!is_valid_vector_elem_type(elem_type)) {
ir_add_error(ira, instruction->elem_type,
buf_sprintf("vector element type must be integer, float, or pointer; '%s' is invalid",
buf_ptr(&elem_type->name)));
return ira->codegen->invalid_instruction;
}
ZigType *vector_type = get_vector_type(ira->codegen, len, elem_type);
return ir_const_type(ira, &instruction->base, vector_type);
}
static IrInstruction *ir_analyze_shuffle_vector(IrAnalyze *ira, IrInstruction *source_instr,
ZigType *scalar_type, IrInstruction *a, IrInstruction *b, IrInstruction *mask)
{
ir_assert(source_instr && scalar_type && a && b && mask, source_instr);
ir_assert(is_valid_vector_elem_type(scalar_type), source_instr);
uint32_t len_mask;
if (mask->value.type->id == ZigTypeIdVector) {
len_mask = mask->value.type->data.vector.len;
} else if (mask->value.type->id == ZigTypeIdArray) {
len_mask = mask->value.type->data.array.len;
} else {
ir_add_error(ira, mask,
buf_sprintf("expected vector or array, found '%s'",
buf_ptr(&mask->value.type->name)));
return ira->codegen->invalid_instruction;
}
mask = ir_implicit_cast(ira, mask, get_vector_type(ira->codegen, len_mask,
ira->codegen->builtin_types.entry_i32));
if (type_is_invalid(mask->value.type))
return ira->codegen->invalid_instruction;
uint32_t len_a;
if (a->value.type->id == ZigTypeIdVector) {
len_a = a->value.type->data.vector.len;
} else if (a->value.type->id == ZigTypeIdArray) {
len_a = a->value.type->data.array.len;
} else if (a->value.type->id == ZigTypeIdUndefined) {
len_a = UINT32_MAX;
} else {
ir_add_error(ira, a,
buf_sprintf("expected vector or array with element type '%s', found '%s'",
buf_ptr(&scalar_type->name),
buf_ptr(&a->value.type->name)));
return ira->codegen->invalid_instruction;
}
uint32_t len_b;
if (b->value.type->id == ZigTypeIdVector) {
len_b = b->value.type->data.vector.len;
} else if (b->value.type->id == ZigTypeIdArray) {
len_b = b->value.type->data.array.len;
} else if (b->value.type->id == ZigTypeIdUndefined) {
len_b = UINT32_MAX;
} else {
ir_add_error(ira, b,
buf_sprintf("expected vector or array with element type '%s', found '%s'",
buf_ptr(&scalar_type->name),
buf_ptr(&b->value.type->name)));
return ira->codegen->invalid_instruction;
}
if (len_a == UINT32_MAX && len_b == UINT32_MAX) {
return ir_const_undef(ira, a, get_vector_type(ira->codegen, len_mask, scalar_type));
}
if (len_a == UINT32_MAX) {
len_a = len_b;
a = ir_const_undef(ira, a, get_vector_type(ira->codegen, len_a, scalar_type));
} else {
a = ir_implicit_cast(ira, a, get_vector_type(ira->codegen, len_a, scalar_type));
if (type_is_invalid(a->value.type))
return ira->codegen->invalid_instruction;
}
if (len_b == UINT32_MAX) {
len_b = len_a;
b = ir_const_undef(ira, b, get_vector_type(ira->codegen, len_b, scalar_type));
} else {
b = ir_implicit_cast(ira, b, get_vector_type(ira->codegen, len_b, scalar_type));
if (type_is_invalid(b->value.type))
return ira->codegen->invalid_instruction;
}
ConstExprValue *mask_val = ir_resolve_const(ira, mask, UndefOk);
if (mask_val == nullptr)
return ira->codegen->invalid_instruction;
expand_undef_array(ira->codegen, mask_val);
for (uint32_t i = 0; i < len_mask; i += 1) {
ConstExprValue *mask_elem_val = &mask_val->data.x_array.data.s_none.elements[i];
if (mask_elem_val->special == ConstValSpecialUndef)
continue;
int32_t v_i32 = bigint_as_signed(&mask_elem_val->data.x_bigint);
uint32_t v;
IrInstruction *chosen_operand;
if (v_i32 >= 0) {
v = (uint32_t)v_i32;
chosen_operand = a;
} else {
v = (uint32_t)~v_i32;
chosen_operand = b;
}
if (v >= chosen_operand->value.type->data.vector.len) {
ErrorMsg *msg = ir_add_error(ira, mask,
buf_sprintf("mask index '%u' has out-of-bounds selection", i));
add_error_note(ira->codegen, msg, chosen_operand->source_node,
buf_sprintf("selected index '%u' out of bounds of %s", v,
buf_ptr(&chosen_operand->value.type->name)));
if (chosen_operand == a && v < len_a + len_b) {
add_error_note(ira->codegen, msg, b->source_node,
buf_create_from_str("selections from the second vector are specified with negative numbers"));
}
return ira->codegen->invalid_instruction;
}
}
ZigType *result_type = get_vector_type(ira->codegen, len_mask, scalar_type);
if (instr_is_comptime(a) && instr_is_comptime(b)) {
ConstExprValue *a_val = ir_resolve_const(ira, a, UndefOk);
if (a_val == nullptr)
return ira->codegen->invalid_instruction;
ConstExprValue *b_val = ir_resolve_const(ira, b, UndefOk);
if (b_val == nullptr)
return ira->codegen->invalid_instruction;
expand_undef_array(ira->codegen, a_val);
expand_undef_array(ira->codegen, b_val);
IrInstruction *result = ir_const(ira, source_instr, result_type);
result->value.data.x_array.data.s_none.elements = create_const_vals(len_mask);
for (uint32_t i = 0; i < mask_val->type->data.vector.len; i += 1) {
ConstExprValue *mask_elem_val = &mask_val->data.x_array.data.s_none.elements[i];
ConstExprValue *result_elem_val = &result->value.data.x_array.data.s_none.elements[i];
if (mask_elem_val->special == ConstValSpecialUndef) {
result_elem_val->special = ConstValSpecialUndef;
continue;
}
int32_t v = bigint_as_signed(&mask_elem_val->data.x_bigint);
// We've already checked for and emitted compile errors for index out of bounds here.
ConstExprValue *src_elem_val = (v >= 0) ?
&a->value.data.x_array.data.s_none.elements[v] :
&b->value.data.x_array.data.s_none.elements[~v];
copy_const_val(result_elem_val, src_elem_val, false);
ir_assert(result_elem_val->special == ConstValSpecialStatic, source_instr);
}
result->value.special = ConstValSpecialStatic;
return result;
}
// All static analysis passed, and not comptime.
// For runtime codegen, vectors a and b must be the same length. Here we
// recursively @shuffle the smaller vector to append undefined elements
// to it up to the length of the longer vector. This recursion terminates
// in 1 call because these calls to ir_analyze_shuffle_vector guarantee
// len_a == len_b.
if (len_a != len_b) {
uint32_t len_min = min(len_a, len_b);
uint32_t len_max = max(len_a, len_b);
IrInstruction *expand_mask = ir_const(ira, mask,
get_vector_type(ira->codegen, len_max, ira->codegen->builtin_types.entry_i32));
expand_mask->value.data.x_array.data.s_none.elements = create_const_vals(len_max);
uint32_t i = 0;
for (; i < len_min; i += 1)
bigint_init_unsigned(&expand_mask->value.data.x_array.data.s_none.elements[i].data.x_bigint, i);
for (; i < len_max; i += 1)
bigint_init_signed(&expand_mask->value.data.x_array.data.s_none.elements[i].data.x_bigint, -1);
IrInstruction *undef = ir_const_undef(ira, source_instr,
get_vector_type(ira->codegen, len_min, scalar_type));
if (len_b < len_a) {
b = ir_analyze_shuffle_vector(ira, source_instr, scalar_type, b, undef, expand_mask);
} else {
a = ir_analyze_shuffle_vector(ira, source_instr, scalar_type, a, undef, expand_mask);
}
}
IrInstruction *result = ir_build_shuffle_vector(&ira->new_irb,
source_instr->scope, source_instr->source_node,
nullptr, a, b, mask);
result->value.type = result_type;
return result;
}
static IrInstruction *ir_analyze_instruction_shuffle_vector(IrAnalyze *ira, IrInstructionShuffleVector *instruction) {
ZigType *scalar_type = ir_resolve_vector_elem_type(ira, instruction->scalar_type);
if (type_is_invalid(scalar_type))
return ira->codegen->invalid_instruction;
IrInstruction *a = instruction->a->child;
if (type_is_invalid(a->value.type))
return ira->codegen->invalid_instruction;
IrInstruction *b = instruction->b->child;
if (type_is_invalid(b->value.type))
return ira->codegen->invalid_instruction;
IrInstruction *mask = instruction->mask->child;
if (type_is_invalid(mask->value.type))
return ira->codegen->invalid_instruction;
return ir_analyze_shuffle_vector(ira, &instruction->base, scalar_type, a, b, mask);
}
static IrInstruction *ir_analyze_instruction_splat(IrAnalyze *ira, IrInstructionSplatSrc *instruction) {
Error err;
IrInstruction *len = instruction->len->child;
if (type_is_invalid(len->value.type))
return ira->codegen->invalid_instruction;
IrInstruction *scalar = instruction->scalar->child;
if (type_is_invalid(scalar->value.type))
return ira->codegen->invalid_instruction;
uint64_t len_u64;
if (!ir_resolve_unsigned(ira, len, ira->codegen->builtin_types.entry_u32, &len_u64))
return ira->codegen->invalid_instruction;
uint32_t len_int = len_u64;
if ((err = ir_validate_vector_elem_type(ira, scalar, scalar->value.type)))
return ira->codegen->invalid_instruction;
ZigType *return_type = get_vector_type(ira->codegen, len_int, scalar->value.type);
if (instr_is_comptime(scalar)) {
ConstExprValue *scalar_val = ir_resolve_const(ira, scalar, UndefOk);
if (scalar_val == nullptr)
return ira->codegen->invalid_instruction;
if (scalar_val->special == ConstValSpecialUndef)
return ir_const_undef(ira, &instruction->base, return_type);
IrInstruction *result = ir_const(ira, &instruction->base, return_type);
result->value.data.x_array.data.s_none.elements = create_const_vals(len_int);
for (uint32_t i = 0; i < len_int; i += 1) {
copy_const_val(&result->value.data.x_array.data.s_none.elements[i], scalar_val, false);
}
return result;
}
return ir_build_splat_gen(ira, &instruction->base, return_type, scalar);
}
static IrInstruction *ir_analyze_instruction_bool_not(IrAnalyze *ira, IrInstructionBoolNot *instruction) {
IrInstruction *value = instruction->value->child;
if (type_is_invalid(value->value.type))
@@ -24970,21 +25356,35 @@ static IrInstruction *ir_analyze_instruction_float_op(IrAnalyze *ira, IrInstruct
}
static IrInstruction *ir_analyze_instruction_bswap(IrAnalyze *ira, IrInstructionBswap *instruction) {
Error err;
ZigType *int_type = ir_resolve_int_type(ira, instruction->type->child);
if (type_is_invalid(int_type))
return ira->codegen->invalid_instruction;
IrInstruction *op = ir_implicit_cast(ira, instruction->op->child, int_type);
IrInstruction *uncasted_op = instruction->op->child;
if (type_is_invalid(uncasted_op->value.type))
return ira->codegen->invalid_instruction;
uint32_t vector_len; // UINT32_MAX means not a vector
if (uncasted_op->value.type->id == ZigTypeIdArray &&
is_valid_vector_elem_type(uncasted_op->value.type->data.array.child_type))
{
vector_len = uncasted_op->value.type->data.array.len;
} else if (uncasted_op->value.type->id == ZigTypeIdVector) {
vector_len = uncasted_op->value.type->data.vector.len;
} else {
vector_len = UINT32_MAX;
}
bool is_vector = (vector_len != UINT32_MAX);
ZigType *op_type = is_vector ? get_vector_type(ira->codegen, vector_len, int_type) : int_type;
IrInstruction *op = ir_implicit_cast(ira, uncasted_op, op_type);
if (type_is_invalid(op->value.type))
return ira->codegen->invalid_instruction;
if (int_type->data.integral.bit_count == 0) {
IrInstruction *result = ir_const(ira, &instruction->base, int_type);
bigint_init_unsigned(&result->value.data.x_bigint, 0);
return result;
}
if (int_type->data.integral.bit_count == 8)
if (int_type->data.integral.bit_count == 8 || int_type->data.integral.bit_count == 0)
return op;
if (int_type->data.integral.bit_count % 8 != 0) {
@@ -24999,20 +25399,44 @@ static IrInstruction *ir_analyze_instruction_bswap(IrAnalyze *ira, IrInstruction
if (val == nullptr)
return ira->codegen->invalid_instruction;
if (val->special == ConstValSpecialUndef)
return ir_const_undef(ira, &instruction->base, int_type);
return ir_const_undef(ira, &instruction->base, op_type);
IrInstruction *result = ir_const(ira, &instruction->base, int_type);
IrInstruction *result = ir_const(ira, &instruction->base, op_type);
size_t buf_size = int_type->data.integral.bit_count / 8;
uint8_t *buf = allocate_nonzero<uint8_t>(buf_size);
bigint_write_twos_complement(&val->data.x_bigint, buf, int_type->data.integral.bit_count, true);
bigint_read_twos_complement(&result->value.data.x_bigint, buf, int_type->data.integral.bit_count, false,
int_type->data.integral.is_signed);
if (is_vector) {
expand_undef_array(ira->codegen, val);
result->value.data.x_array.data.s_none.elements = create_const_vals(op_type->data.vector.len);
for (unsigned i = 0; i < op_type->data.vector.len; i += 1) {
ConstExprValue *op_elem_val = &val->data.x_array.data.s_none.elements[i];
if ((err = ir_resolve_const_val(ira->codegen, ira->new_irb.exec, instruction->base.source_node,
op_elem_val, UndefOk)))
{
return ira->codegen->invalid_instruction;
}
ConstExprValue *result_elem_val = &result->value.data.x_array.data.s_none.elements[i];
result_elem_val->type = int_type;
result_elem_val->special = op_elem_val->special;
if (op_elem_val->special == ConstValSpecialUndef)
continue;
bigint_write_twos_complement(&op_elem_val->data.x_bigint, buf, int_type->data.integral.bit_count, true);
bigint_read_twos_complement(&result->value.data.x_array.data.s_none.elements[i].data.x_bigint,
buf, int_type->data.integral.bit_count, false,
int_type->data.integral.is_signed);
}
} else {
bigint_write_twos_complement(&val->data.x_bigint, buf, int_type->data.integral.bit_count, true);
bigint_read_twos_complement(&result->value.data.x_bigint, buf, int_type->data.integral.bit_count, false,
int_type->data.integral.is_signed);
}
free(buf);
return result;
}
IrInstruction *result = ir_build_bswap(&ira->new_irb, instruction->base.scope,
instruction->base.source_node, nullptr, op);
result->value.type = int_type;
result->value.type = op_type;
return result;
}
@@ -25450,6 +25874,7 @@ static IrInstruction *ir_analyze_instruction_base(IrAnalyze *ira, IrInstruction
case IrInstructionIdTestErrGen:
case IrInstructionIdFrameSizeGen:
case IrInstructionIdAwaitGen:
case IrInstructionIdSplatGen:
zig_unreachable();
case IrInstructionIdReturn:
@@ -25578,6 +26003,10 @@ static IrInstruction *ir_analyze_instruction_base(IrAnalyze *ira, IrInstruction
return ir_analyze_instruction_int_type(ira, (IrInstructionIntType *)instruction);
case IrInstructionIdVectorType:
return ir_analyze_instruction_vector_type(ira, (IrInstructionVectorType *)instruction);
case IrInstructionIdShuffleVector:
return ir_analyze_instruction_shuffle_vector(ira, (IrInstructionShuffleVector *)instruction);
case IrInstructionIdSplatSrc:
return ir_analyze_instruction_splat(ira, (IrInstructionSplatSrc *)instruction);
case IrInstructionIdBoolNot:
return ir_analyze_instruction_bool_not(ira, (IrInstructionBoolNot *)instruction);
case IrInstructionIdMemset:
@@ -25913,6 +26342,9 @@ bool ir_has_side_effects(IrInstruction *instruction) {
case IrInstructionIdTruncate:
case IrInstructionIdIntType:
case IrInstructionIdVectorType:
case IrInstructionIdShuffleVector:
case IrInstructionIdSplatSrc:
case IrInstructionIdSplatGen:
case IrInstructionIdBoolNot:
case IrInstructionIdSliceSrc:
case IrInstructionIdMemberCount:

41
src/ir_print.cpp
View File

@@ -42,6 +42,12 @@ static const char* ir_instruction_type_str(IrInstruction* instruction) {
switch (instruction->id) {
case IrInstructionIdInvalid:
return "Invalid";
case IrInstructionIdShuffleVector:
return "Shuffle";
case IrInstructionIdSplatSrc:
return "SplatSrc";
case IrInstructionIdSplatGen:
return "SplatGen";
case IrInstructionIdDeclVarSrc:
return "DeclVarSrc";
case IrInstructionIdDeclVarGen:
@@ -1208,6 +1214,32 @@ static void ir_print_vector_type(IrPrint *irp, IrInstructionVectorType *instruct
fprintf(irp->f, ")");
}
static void ir_print_shuffle_vector(IrPrint *irp, IrInstructionShuffleVector *instruction) {
fprintf(irp->f, "@shuffle(");
ir_print_other_instruction(irp, instruction->scalar_type);
fprintf(irp->f, ", ");
ir_print_other_instruction(irp, instruction->a);
fprintf(irp->f, ", ");
ir_print_other_instruction(irp, instruction->b);
fprintf(irp->f, ", ");
ir_print_other_instruction(irp, instruction->mask);
fprintf(irp->f, ")");
}
static void ir_print_splat_src(IrPrint *irp, IrInstructionSplatSrc *instruction) {
fprintf(irp->f, "@splat(");
ir_print_other_instruction(irp, instruction->len);
fprintf(irp->f, ", ");
ir_print_other_instruction(irp, instruction->scalar);
fprintf(irp->f, ")");
}
static void ir_print_splat_gen(IrPrint *irp, IrInstructionSplatGen *instruction) {
fprintf(irp->f, "@splat(");
ir_print_other_instruction(irp, instruction->scalar);
fprintf(irp->f, ")");
}
static void ir_print_bool_not(IrPrint *irp, IrInstructionBoolNot *instruction) {
fprintf(irp->f, "! ");
ir_print_other_instruction(irp, instruction->value);
@@ -2143,6 +2175,15 @@ static void ir_print_instruction(IrPrint *irp, IrInstruction *instruction, bool
case IrInstructionIdVectorType:
ir_print_vector_type(irp, (IrInstructionVectorType *)instruction);
break;
case IrInstructionIdShuffleVector:
ir_print_shuffle_vector(irp, (IrInstructionShuffleVector *)instruction);
break;
case IrInstructionIdSplatSrc:
ir_print_splat_src(irp, (IrInstructionSplatSrc *)instruction);
break;
case IrInstructionIdSplatGen:
ir_print_splat_gen(irp, (IrInstructionSplatGen *)instruction);
break;
case IrInstructionIdBoolNot:
ir_print_bool_not(irp, (IrInstructionBoolNot *)instruction);
break;

2
src/list.hpp
View File

@@ -15,7 +15,7 @@ struct ZigList {
void deinit() {
free(items);
}
void append(T item) {
void append(const T& item) {
ensure_capacity(length + 1);
items[length++] = item;
}

2
src/main.cpp
View File

@@ -90,7 +90,7 @@ static int print_full_usage(const char *arg0, FILE *file, int return_code) {
" -mllvm [arg] (unsupported) forward an arg to LLVM's option processing\n"
" --override-std-dir [arg] override path to Zig standard library\n"
" --override-lib-dir [arg] override path to Zig lib library\n"
" -ffunction-sections places each function in a seperate section\n"
" -ffunction-sections places each function in a separate section\n"
"\n"
"Link Options:\n"
" --bundle-compiler-rt for static libraries, include compiler-rt symbols\n"