stage2: dump generated zir with --verbose-ir
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@@ -1054,6 +1054,10 @@ fn astGenAndAnalyzeDecl(self: *Module, decl: *Decl) !bool {
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.param_types = param_types,
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}, .{});
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if (self.comp.verbose_ir) {
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zir.dumpZir(self.gpa, "fn_type", decl.name, fn_type_scope.instructions.items) catch {};
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}
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// We need the memory for the Type to go into the arena for the Decl
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var decl_arena = std.heap.ArenaAllocator.init(self.gpa);
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errdefer decl_arena.deinit();
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@@ -1127,6 +1131,10 @@ fn astGenAndAnalyzeDecl(self: *Module, decl: *Decl) !bool {
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_ = try astgen.addZIRNoOp(self, &gen_scope.base, src, .returnvoid);
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}
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if (self.comp.verbose_ir) {
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zir.dumpZir(self.gpa, "fn_body", decl.name, gen_scope.instructions.items) catch {};
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}
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const fn_zir = try gen_scope_arena.allocator.create(Fn.ZIR);
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fn_zir.* = .{
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.body = .{
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@@ -1258,6 +1266,9 @@ fn astGenAndAnalyzeDecl(self: *Module, decl: *Decl) !bool {
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const src = tree.token_locs[init_node.firstToken()].start;
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const init_inst = try astgen.expr(self, &gen_scope.base, init_result_loc, init_node);
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if (self.comp.verbose_ir) {
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zir.dumpZir(self.gpa, "var_init", decl.name, gen_scope.instructions.items) catch {};
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}
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var inner_block: Scope.Block = .{
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.parent = null,
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@@ -1299,6 +1310,10 @@ fn astGenAndAnalyzeDecl(self: *Module, decl: *Decl) !bool {
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.val = Value.initTag(.type_type),
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});
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const var_type = try astgen.expr(self, &type_scope.base, .{ .ty = type_type }, type_node);
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if (self.comp.verbose_ir) {
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zir.dumpZir(self.gpa, "var_type", decl.name, type_scope.instructions.items) catch {};
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}
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const ty = try zir_sema.analyzeBodyValueAsType(self, &block_scope, var_type, .{
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.instructions = type_scope.instructions.items,
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});
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@@ -1372,6 +1387,9 @@ fn astGenAndAnalyzeDecl(self: *Module, decl: *Decl) !bool {
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defer gen_scope.instructions.deinit(self.gpa);
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_ = try astgen.comptimeExpr(self, &gen_scope.base, .none, comptime_decl.expr);
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if (self.comp.verbose_ir) {
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zir.dumpZir(self.gpa, "comptime_block", decl.name, gen_scope.instructions.items) catch {};
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}
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var block_scope: Scope.Block = .{
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.parent = null,
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