zig

commit 9bebdc77d66369fc7cf6c1de7c9559fdd0c2c561 (tree)
parent d97981f6fd4e98506404de4259230dc157cc50dd
Author: LemonBoy <thatlemon@gmail.com>
Date:   Sun, 11 Apr 2021 18:40:08 +0200

std: Fix TLS definitions for 32bit PowerPC targets

Correct some silly errors and add the missing piece to set the thread
pointer (r2).

Diffstat:
M
lib/std/os/linux/tls.zig
 | 
11
+++++++++--

1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/lib/std/os/linux/tls.zig b/lib/std/os/linux/tls.zig
@@ -69,7 +69,7 @@ const tls_tcb_size = switch (builtin.arch) {
 
 // Controls if the TP points to the end of the TCB instead of its beginning
 const tls_tp_points_past_tcb = switch (builtin.arch) {
-    .riscv32, .riscv64, .mips, .mipsel, .powerpc64, .powerpc64le => true,
+    .riscv32, .riscv64, .mips, .mipsel, .powerpc, .powerpc64, .powerpc64le => true,
     else => false,
 };
 
@@ -165,7 +165,14 @@ pub fn setThreadPointer(addr: usize) void {
             const rc = std.os.linux.syscall1(.set_thread_area, addr);
             assert(rc == 0);
         },
-        .powerpc, .powerpc64, .powerpc64le => {
+        .powerpc => {
+            asm volatile (
+                \\ mr 2, %[addr]
+                :
+                : [addr] "r" (addr)
+            );
+        },
+        .powerpc64, .powerpc64le => {
             asm volatile (
                 \\ mr 13, %[addr]
                 :