commit 9ff15e24f8691e216194c0fc3dc890eb86a00bc6 (tree)
parent 6f0cfdb8206026f239ca079a9f3eebae20bd5310
Author: Michael Dusan <michael.dusan@gmail.com>
Date: Thu, 17 Jun 2021 21:47:19 -0400
fix oob during riscv64 feature processing
Diffstat:
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/Compilation.zig b/src/Compilation.zig
@@ -3015,7 +3015,7 @@ pub fn addCCArgs(
const prefix: []const u8 = if (target.cpu.arch == .riscv64) "rv64" else "rv32";
const prefix_len = 4;
assert(prefix.len == prefix_len);
- var march_buf: [prefix_len + letters.len]u8 = undefined;
+ var march_buf: [prefix_len + letters.len + 1]u8 = undefined;
var march_index: usize = prefix_len;
mem.copy(u8, &march_buf, prefix);