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Sema: only ABI sized packed structs are extern compatible

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This commit is contained in:
Veikka Tuominen
2022-09-02 20:26:33 +03:00
parent 6aee07c144
commit b83c037f9f
9 changed files with 116 additions and 125 deletions
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57
src/codegen/llvm.zig
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@@ -9674,22 +9674,7 @@ fn lowerFnRetTy(dg: *DeclGen, fn_info: Type.Payload.Function.Data) !*const llvm.
}
},
.C => {
const is_scalar = switch (fn_info.return_type.zigTypeTag()) {
.Void,
.Bool,
.NoReturn,
.Int,
.Float,
.Pointer,
.Optional,
.ErrorSet,
.Enum,
.AnyFrame,
.Vector,
=> true,
else => false,
};
const is_scalar = isScalar(fn_info.return_type);
switch (target.cpu.arch) {
.mips, .mipsel => return dg.lowerType(fn_info.return_type),
.x86_64 => switch (target.os.tag) {
@@ -9837,24 +9822,7 @@ const ParamTypeIterator = struct {
@panic("TODO implement async function lowering in the LLVM backend");
},
.C => {
const is_scalar = switch (ty.zigTypeTag()) {
.Void,
.Bool,
.NoReturn,
.Int,
.Float,
.Pointer,
.Optional,
.ErrorSet,
.Enum,
.AnyFrame,
.Vector,
=> true,
.Struct => ty.containerLayout() == .Packed,
.Union => ty.containerLayout() == .Packed,
else => false,
};
const is_scalar = isScalar(ty);
switch (it.target.cpu.arch) {
.riscv32, .riscv64 => {
it.zig_index += 1;
@@ -10108,6 +10076,27 @@ fn isByRef(ty: Type) bool {
}
}
fn isScalar(ty: Type) bool {
return switch (ty.zigTypeTag()) {
.Void,
.Bool,
.NoReturn,
.Int,
.Float,
.Pointer,
.Optional,
.ErrorSet,
.Enum,
.AnyFrame,
.Vector,
=> true,
.Struct => ty.containerLayout() == .Packed,
.Union => ty.containerLayout() == .Packed,
else => false,
};
}
/// This function returns true if we expect LLVM to lower x86_fp80 correctly
/// and false if we expect LLVM to crash if it counters an x86_fp80 type.
fn backendSupportsF80(target: std.Target) bool {