target: add missing switch case

2019-08-16 16:52:45 -04:00
parent 6529658ad8
commit c39bb3ebc4
1 changed files with 2 additions and 0 deletions
--- a/src/target.cpp
+++ b/src/target.cpp
@@ -686,6 +686,8 @@ const char *target_subarch_name(ZigLLVM_SubArchType subarch) {
            return "v8m_baseline";
        case ZigLLVM_ARMSubArch_v8m_mainline:
            return "v8m_mainline";
+        case ZigLLVM_ARMSubArch_v8_1m_mainline:
+            return "v8_1m_mainline";
        case ZigLLVM_ARMSubArch_v7:
            return "v7";
        case ZigLLVM_ARMSubArch_v7em: