lol that's never going to happen in stage1
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@@ -2720,8 +2720,7 @@ enum IrInstGenId {
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IrInstGenIdExtern,
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};
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// Common fields between IrInstSrc and IrInstGen. This allows future passes
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// after pass2 to be added to zig.
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// Common fields between IrInstSrc and IrInstGen.
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struct IrInst {
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// if ref_count is zero and the instruction has no side effects,
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// the instruction can be omitted in codegen
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