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stage1: memory/report overhaul

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- split util_base.hpp from util.hpp
- new namespaces: `mem` and `heap`
- new `mem::Allocator` interface
- new `heap::CAllocator` impl with global `heap::c_allocator`
- new `heap::ArenaAllocator` impl
- new `mem::TypeInfo` extracts names without RTTI
- name extraction is enabled w/ ZIG_ENABLE_MEM_PROFILE=1
- new `mem::List` takes explicit `Allocator&` parameter
- new `mem::HashMap` takes explicit `Allocator&` parameter
- add Codegen.pass1_arena and use for all `ZigValue` allocs
- deinit Codegen.pass1_arena early in `zig_llvm_emit_output()`
This commit is contained in:
Michael Dusan
2020-02-10 21:08:08 -05:00
parent 1cdefeb10b
commit edb210905d
33 changed files with 2210 additions and 1082 deletions
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4
src/userland.cpp
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@@ -101,7 +101,7 @@ Error stage2_cpu_features_parse(struct Stage2CpuFeatures **out, const char *zig_
const char *cpu_name, const char *cpu_features)
{
if (zig_triple == nullptr) {
Stage2CpuFeatures *result = allocate<Stage2CpuFeatures>(1, "Stage2CpuFeatures");
Stage2CpuFeatures *result = heap::c_allocator.create<Stage2CpuFeatures>();
result->llvm_cpu_name = ZigLLVMGetHostCPUName();
result->llvm_cpu_features = ZigLLVMGetNativeFeatures();
result->builtin_str = "arch.getBaselineCpuFeatures();\n";
@@ -110,7 +110,7 @@ Error stage2_cpu_features_parse(struct Stage2CpuFeatures **out, const char *zig_
return ErrorNone;
}
if (cpu_name == nullptr && cpu_features == nullptr) {
Stage2CpuFeatures *result = allocate<Stage2CpuFeatures>(1, "Stage2CpuFeatures");
Stage2CpuFeatures *result = heap::c_allocator.create<Stage2CpuFeatures>();
result->builtin_str = "arch.getBaselineCpuFeatures();\n";
result->cache_hash = "\n\n";
*out = result;