diff --git a/stage0/.claude/skills/port-astgen/SKILL.md b/stage0/.claude/skills/port-astgen/SKILL.md index 6ebf62da2f..3007ce1291 100644 --- a/stage0/.claude/skills/port-astgen/SKILL.md +++ b/stage0/.claude/skills/port-astgen/SKILL.md @@ -13,11 +13,11 @@ from Zig, copy the Zig structure into C. ## Key files -- `astgen.c` — C implementation (modify this) -- `astgen_test.zig` — corpus tests (enable/skip tests here) -- `~/code/zig/lib/std/zig/AstGen.zig` — upstream reference (~14k lines) -- `~/code/zig/lib/std/zig/Ast.zig` — AST node accessors -- `~/code/zig/lib/std/zig/Zir.zig` — ZIR instruction definitions +- `stage0/astgen.c` — C implementation (modify this) +- `stage0/astgen_test.zig` — corpus tests (enable/skip tests here) +- `lib/std/zig/AstGen.zig` — upstream reference (~14k lines) +- `lib/std/zig/Ast.zig` — AST node accessors +- `lib/std/zig/Zir.zig` — ZIR instruction definitions ## Loop @@ -39,7 +39,7 @@ Remove or comment out the `if (true) return error.SkipZigTest` line. ### Step 3: Run tests ```sh -zig build test 2>&1 +zig build test-zig0 2>&1 ``` Record the output. If tests pass, go to Step 7. @@ -75,7 +75,7 @@ mechanically. ### Step 6: Port the fix Apply the minimal mechanical change to `astgen.c` to match the upstream. -Run `zig build test` after each change to check for progress. +Run `zig build test-zig0` after each change to check for progress. **Progress** means any of: - `inst_len` diff decreased @@ -92,7 +92,8 @@ continue to Step 7 (commit progress, re-skip). a TODO comment describing the remaining diff. 2. Remove ALL `fprintf`/`printf` debug statements from `astgen.c`. 3. Remove `#include ` if it was added for debugging. -4. Verify: `zig build fmt && zig build all` must exit 0 with no unexpected output. +4. Verify: `zig build fmt-zig0 && zig build all-zig0 -Dvalgrind` must exit 0 + with no unexpected output. 5. Commit: ```sh git add astgen.c astgen_test.zig