Port scope chain infrastructure, function parameters, local var_decl,
control flow (if/for/while/switch/orelse/catch/defer), labeled blocks,
break/continue, comparison/boolean/unary operators, array access,
field access rvalue, rvalue type coercion optimization, and many
builtins from upstream AstGen.zig. test_all.zig corpus passes;
4 remaining corpus files still have mismatches (WIP).
Also fix cppcheck/lint issues: safe realloc pattern, null checks,
const correctness, enable inline suppressions, comment out test
debug output for clean `zig build`.
Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
Valgrind 3.26.0 cannot decode AVX-512 instructions. On AVX-512 capable
CPUs (e.g. Zen 4), Zig's standard library emits these instructions when
targeting native, causing immediate crashes. Subtract avx512f from the
CPU features when -Dvalgrind is set.
Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
Introduce zir.h/zir.c with ZIR instruction types (269 tags, 56 extended
opcodes, 8-byte Data union) ported from lib/std/zig/Zir.zig, and
astgen.h/astgen.c implementing the empty-container fast path that produces
correct ZIR for empty source files.
The test infrastructure in astgen_test.zig compares C astGen() output
field-by-field against Zig's std.zig.AstGen.generate() using tag-based
dispatch, avoiding raw byte comparison since Zig's Data union has no
guaranteed in-memory layout.
Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
Implement in parser.c:
- forPrefix: parse for input expressions and capture variables
- parseForExpr: for_simple and for AST nodes with optional else
- Handle for and while in parsePrimaryTypeExpr for top-level usage
Remove stale cppcheck knownConditionTrueFalse suppression.
Port test "top-level for/while loop".
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
