Added std.coff.MachineType
Added image characteristic and section flag valued to std.coff
Added std.Target.Cpu.Arch.toCoffMachine
Fixed stage2 --watch flag on windows
* Move branch-local register and stack allocation metadata to the
function-local struct. Conditional branches clone this data in order
to restore it after generating machine code for a branch.
Branch-local data is now only the instruction table mapping *ir.Inst
to MCValue.
* Implement conditional branching
- Process operand deaths
- Handle register and stack allocation metadata
* Avoid storing unreferenced or void typed instructions into
the branch-local instruction table.
* Fix integer types reporting the wrong value for hasCodeGenBits.
* Remove the codegen optimization for eliding length-0 jumps. I need to
reexamine how this works because it was causing invalid jumps to be
emitted.
* move SPU code from std to self hosted compiler
* change std lib comments to be descriptive rather than prescriptive
* avoid usingnamespace
* fix case style of error codes
* remove duplication of producer_string
* generalize handling of less than 64 bit arch pointers
* clean up SPU II related test harness code
See #6113 for an alternate way of doing this that we didn't end up
following.
Closes#6079.
I also took the opportunity here to extract C.zig and Elf.zig from
link.zig.
