r00ster91
aac2d6b56f
std.builtin: rename Type.UnionField and Type.StructField's field_type to type
2022-12-17 14:11:33 +01:00
Veikka Tuominen
8a0a6b7387
port packed vector elem ptr logic from stage1
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Closes #12812
Closes #13925
2022-12-15 21:06:35 -05:00
Veikka Tuominen
7b2a936173
remove stack option from @call
2022-12-13 12:52:21 +02:00
Veikka Tuominen
9d93b2ccf1
Eliminate BoundFn type from the language
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Closes #9484
2022-12-09 20:37:18 -07:00
Jakub Konka
12e34e7037
dwarf: pull out debug line program internals into DeclState helpers
2022-12-05 22:35:07 +01:00
Andrew Kelley
fdbb0fb7b9
Merge pull request #13744 from Vexu/stage2-fixes
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Improve error messages, fix dependency loops
2022-12-03 00:42:11 -05:00
Veikka Tuominen
0e38cc16d5
Sema: fix comparisons between lazy and runtime values
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Closes #12498
2022-12-03 00:09:23 +02:00
Jakub Konka
bfd36cbf97
dwarf: pass linker Tag and owner Decl.Index instead of *Atom
2022-12-02 13:17:52 +01:00
Jakub Konka
3ec0520bac
dwarf: use common DI union object for arg and var gen
2022-12-02 12:22:17 +01:00
Jakub Konka
4120332577
dwarf: fix typos after refactoring dbi gen
2022-12-01 17:23:28 +01:00
Jakub Konka
5bffc17c42
codegen: make LinkerLoad a common struct shared by backends
2022-12-01 16:32:09 +01:00
Jakub Konka
00016ab6a0
dwarf: extract common logic for generating func var dbg info
2022-12-01 15:28:22 +01:00
Jakub Konka
7d0af639d8
dwarf: update arm and riscv codegens to the new model
2022-12-01 14:32:09 +01:00
Jakub Konka
5ee99f862a
dwarf: extract common logic for generating func arg dbg info
2022-12-01 14:06:24 +01:00
Andrew Kelley
ceb0a632cf
std.mem.Allocator: allow shrink to fail
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closes #13535
2022-11-29 23:30:38 -07:00
Stevie Hryciw
04f3067a79
run zig fmt on everything checked by CI
2022-11-18 19:22:42 +00:00
Jakub Konka
4b3637820d
Merge pull request #13495 from ziglang/macho-dsym
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stage2: misc DWARF debug info fixes and additions for x86_64 and aarch64
2022-11-10 16:50:57 +01:00
Jakub Konka
31e755df6f
aarch64: handle .stack_argument_offset as a valid local var
2022-11-09 19:58:14 +01:00
Jakub Konka
02852098ee
aarch64: emit DWARF debug info for fn params and locals
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We postpone emitting debug info until *after* we generate the function
so that we have an idea of the consumed stack space. The stack offsets
encoded within DWARF are with respect to the frame pointer `.fp`.
2022-11-09 18:35:06 +01:00
Jakub Konka
179f16904f
aarch64: circumvent zig0 inference problems
2022-11-08 13:59:06 +01:00
Jakub Konka
32ad218f5a
aarch64: revert changes to .call
2022-11-08 13:50:30 +01:00
Jakub Konka
45f65c8445
aarch64: fix implementation of .is_null and .is_non_null
2022-11-08 13:42:58 +01:00
Jakub Konka
0d556877af
aarch64: implement .wrap_optional always saving to the stack
2022-11-08 13:42:58 +01:00
Jakub Konka
a07449450f
aarch64: implement optionalPayload when mcv is register
2022-11-08 13:42:58 +01:00
Jakub Konka
35bd5363ee
aarch64: implement isNull() for non-pointer optionals
2022-11-08 13:42:58 +01:00
Jakub Konka
0de56d1722
aarch64: partially implement optionalPayload()
2022-11-08 13:42:58 +01:00
Jakub Konka
cd7cbed651
aarch64: partially implement isNull()
2022-11-08 13:42:58 +01:00
Jakub Konka
83d89a05b7
coff: compile and link simple exit program on arm64
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* make image base target dependent
* fix relocs to imports
2022-11-05 10:15:01 +01:00
Jakub Konka
53a9661c1a
coff: generate relocations for branch, GOT, direct refs
2022-11-05 10:15:00 +01:00
Jakub Konka
62ae365308
aarch64: implement airCall for COFF
2022-11-05 10:15:00 +01:00
Jakub Konka
1fe0b58942
aarch64: extract atom index for both COFF and MachO
2022-11-05 10:14:59 +01:00
Jakub Konka
df0212bf47
aarch64: handle register downgrading in truncRegister
2022-11-05 10:14:59 +01:00
joachimschmidt557
3051fab97c
stage2 AArch64: misc fixes, enable printing in test runner
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- Fixed missing airRetPtr implementation
- Fixed wrong pop_regs order
- Fixed wrong source and destination register in store
2022-11-01 20:44:18 +01:00
joachimschmidt557
4e0779813b
stage2 AArch64: add inline memset
2022-11-01 20:43:27 +01:00
joachimschmidt557
8a022d9c92
stage2 AArch64: implement wrap_errunion_{err,payload}
2022-11-01 20:43:27 +01:00
joachimschmidt557
3ecec50f0c
stage2 AArch64: implement basic switch statements
2022-11-01 20:43:27 +01:00
joachimschmidt557
d2a5a36cab
stage2 AArch64: implement min/max
2022-11-01 20:43:27 +01:00
Veikka Tuominen
d03c47bf85
Sema: use runtime_value instead of creating allocs
2022-10-27 21:08:25 -04:00
Andrew Kelley
04472af328
Merge pull request #13251 from Vexu/c-abi
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implement ARM C ABI, separate C ABI tests from standalone tests
2022-10-23 12:16:58 -07:00
Veikka Tuominen
5e0b4836a1
stage2: implement RISCV C ABI
2022-10-22 14:52:26 +03:00
Veikka Tuominen
031c768cc8
add C ABI tests for simd vectors
2022-10-22 11:31:41 +03:00
Cody Tapscott
724d753638
stage2: Add .save_err_return_trace_index AIR op
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This is encoded as a primitive AIR instruction to resolve one corner
case: A function may include a `catch { ... }` or `else |err| { ... }`
block but not call any errorable fn. In that case, there is no error
return trace to save the index of and codegen needs to avoid
interacting with the non-existing error trace.
By using a primitive AIR op, we can depend on Liveness to mark this
unused in this corner case.
2022-10-21 10:44:20 -07:00
Veikka Tuominen
3981250b84
aarch64 C ABI: return union instead of array of two enums
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The result is much cleaner and the second element was unused most of the time.
2022-10-21 20:30:45 +03:00
Veikka Tuominen
7622078127
aarc64 C ABI: fix handling of packed structs and unions
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* Packed unions were not handled at all previously.
* Packed unions and structs are integers so their floats should not be counted.
2022-10-21 17:51:54 +03:00
Veikka Tuominen
972c39e2c0
Merge pull request #13219 from Vexu/stage2-fixes
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Stage2 bug fixes
2022-10-21 12:11:49 +02:00
Veikka Tuominen
646d927c79
stage2: fix handling of aarch64 C ABI float array like structs
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Closes #11702
Closes #13125
2022-10-20 20:11:12 +03:00
joachimschmidt557
67941926b2
stage2 AArch64: Remove remaining legacy binOp code
2022-10-20 16:14:52 +02:00
joachimschmidt557
dd62d5941e
stage2 AArch64: move remaining operations out of binOp
2022-10-20 16:14:52 +02:00
joachimschmidt557
3800bb538a
stage2 AArch64: mov mul,div,mod to new allocRegs mechanism
2022-10-20 16:14:52 +02:00
joachimschmidt557
ea7a60116d
stage2 AArch64: move add+sub to new allocRegs mechanism
2022-10-20 16:14:52 +02:00
