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bridge.h (8029B) - Raw


      1 /*-
      2  * SPDX-License-Identifier: BSD-2-Clause
      3  *
      4  * Copyright (c) 2006 M. Warner Losh <imp@FreeBSD.org>
      5  *
      6  * Redistribution and use in source and binary forms, with or without
      7  * modification, are permitted provided that the following conditions
      8  * are met:
      9  * 1. Redistributions of source code must retain the above copyright
     10  *    notice, this list of conditions and the following disclaimer.
     11  * 2. Redistributions in binary form must reproduce the above copyright
     12  *    notice, this list of conditions and the following disclaimer in the
     13  *    documentation and/or other materials provided with the distribution.
     14  *
     15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     16  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     17  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     18  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     19  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     20  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     21  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     22  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     23  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     24  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     25  *
     26  * Portions of this software may have been developed with reference to
     27  * the SD Simplified Specification.  The following disclaimer may apply:
     28  *
     29  * The following conditions apply to the release of the simplified
     30  * specification ("Simplified Specification") by the SD Card Association and
     31  * the SD Group. The Simplified Specification is a subset of the complete SD
     32  * Specification which is owned by the SD Card Association and the SD
     33  * Group. This Simplified Specification is provided on a non-confidential
     34  * basis subject to the disclaimers below. Any implementation of the
     35  * Simplified Specification may require a license from the SD Card
     36  * Association, SD Group, SD-3C LLC or other third parties.
     37  *
     38  * Disclaimers:
     39  *
     40  * The information contained in the Simplified Specification is presented only
     41  * as a standard specification for SD Cards and SD Host/Ancillary products and
     42  * is provided "AS-IS" without any representations or warranties of any
     43  * kind. No responsibility is assumed by the SD Group, SD-3C LLC or the SD
     44  * Card Association for any damages, any infringements of patents or other
     45  * right of the SD Group, SD-3C LLC, the SD Card Association or any third
     46  * parties, which may result from its use. No license is granted by
     47  * implication, estoppel or otherwise under any patent or other rights of the
     48  * SD Group, SD-3C LLC, the SD Card Association or any third party. Nothing
     49  * herein shall be construed as an obligation by the SD Group, the SD-3C LLC
     50  * or the SD Card Association to disclose or distribute any technical
     51  * information, know-how or other confidential information to any third party.
     52  */
     53 
     54 #ifndef DEV_MMC_BRIDGE_H
     55 #define	DEV_MMC_BRIDGE_H
     56 
     57 #include <sys/bus.h>
     58 
     59 /*
     60  * This file defines interfaces for the mmc bridge.  The names chosen
     61  * are similar to or the same as the names used in Linux to allow for
     62  * easy porting of what Linux calls mmc host drivers.  I use the
     63  * FreeBSD terminology of bridge and bus for consistency with other
     64  * drivers in the system.  This file corresponds roughly to the Linux
     65  * linux/mmc/host.h file.
     66  *
     67  * A mmc bridge is a chipset that can have one or more mmc and/or sd
     68  * cards attached to it.  mmc devices are attached on a bus topology,
     69  * while sd and sdio cards usually are attached using a star topology
     70  * (meaning in practice each sd card has its own, independent slot).
     71  * Since SDHCI v3.00, buses for esd and esdio are possible, though.
     72  *
     73  * Attached to the mmc bridge is an mmcbus.  The mmcbus is described
     74  * in dev/mmc/mmcbus_if.m.
     75  */
     76 
     77 /*
     78  * mmc_ios is a structure that is used to store the state of the mmc/sd
     79  * bus configuration.  This include the bus' clock speed, its voltage,
     80  * the bus mode for command output, the SPI chip select, some power
     81  * states and the bus width.
     82  */
     83 enum mmc_vdd {
     84 	vdd_150 = 0, vdd_155, vdd_160, vdd_165, vdd_170, vdd_180,
     85 	vdd_190, vdd_200, vdd_210, vdd_220, vdd_230, vdd_240, vdd_250,
     86 	vdd_260, vdd_270, vdd_280, vdd_290, vdd_300, vdd_310, vdd_320,
     87 	vdd_330, vdd_340, vdd_350, vdd_360
     88 };
     89 
     90 enum mmc_vccq {
     91 	vccq_120 = 0, vccq_180, vccq_330
     92 };
     93 
     94 enum mmc_power_mode {
     95 	power_off = 0, power_up, power_on
     96 };
     97 
     98 enum mmc_bus_mode {
     99 	opendrain = 1, pushpull
    100 };
    101 
    102 enum mmc_chip_select {
    103 	cs_dontcare = 0, cs_high, cs_low
    104 };
    105 
    106 enum mmc_bus_width {
    107 	bus_width_1 = 0, bus_width_4 = 2, bus_width_8 = 3
    108 };
    109 
    110 enum mmc_drv_type {
    111 	drv_type_b = 0, drv_type_a, drv_type_c, drv_type_d
    112 };
    113 
    114 enum mmc_bus_timing {
    115 	bus_timing_normal = 0, bus_timing_hs, bus_timing_uhs_sdr12,
    116 	bus_timing_uhs_sdr25, bus_timing_uhs_sdr50, bus_timing_uhs_ddr50,
    117 	bus_timing_uhs_sdr104, bus_timing_mmc_ddr52, bus_timing_mmc_hs200,
    118 	bus_timing_mmc_hs400, bus_timing_mmc_hs400es, bus_timing_max =
    119 	bus_timing_mmc_hs400es
    120 };
    121 
    122 struct mmc_ios {
    123 	uint32_t	clock;	/* Speed of the clock in Hz to move data */
    124 	enum mmc_vdd	vdd;	/* Voltage to apply to the power pins */
    125 	enum mmc_vccq	vccq;	/* Voltage to use for signaling */
    126 	enum mmc_bus_mode bus_mode;
    127 	enum mmc_chip_select chip_select;
    128 	enum mmc_bus_width bus_width;
    129 	enum mmc_power_mode power_mode;
    130 	enum mmc_bus_timing timing;
    131 	enum mmc_drv_type drv_type;
    132 };
    133 
    134 enum mmc_card_mode {
    135 	mode_mmc, mode_sd
    136 };
    137 
    138 enum mmc_retune_req {
    139 	retune_req_none = 0, retune_req_normal, retune_req_reset
    140 };
    141 
    142 struct mmc_host {
    143 	int f_min;
    144 	int f_max;
    145 	uint32_t host_ocr;
    146 	uint32_t ocr;
    147 	uint32_t caps;
    148 #define	MMC_CAP_4_BIT_DATA	(1 <<  0) /* Can do 4-bit data transfers */
    149 #define	MMC_CAP_8_BIT_DATA	(1 <<  1) /* Can do 8-bit data transfers */
    150 #define	MMC_CAP_HSPEED		(1 <<  2) /* Can do High Speed transfers */
    151 #define	MMC_CAP_BOOT_NOACC	(1 <<  4) /* Cannot access boot partitions */
    152 #define	MMC_CAP_WAIT_WHILE_BUSY	(1 <<  5) /* Host waits for busy responses */
    153 #define	MMC_CAP_UHS_SDR12	(1 <<  6) /* Can do UHS SDR12 */
    154 #define	MMC_CAP_UHS_SDR25	(1 <<  7) /* Can do UHS SDR25 */
    155 #define	MMC_CAP_UHS_SDR50	(1 <<  8) /* Can do UHS SDR50 */
    156 #define	MMC_CAP_UHS_SDR104	(1 <<  9) /* Can do UHS SDR104 */
    157 #define	MMC_CAP_UHS_DDR50	(1 << 10) /* Can do UHS DDR50 */
    158 #define	MMC_CAP_MMC_DDR52_120	(1 << 11) /* Can do eMMC DDR52 at 1.2 V */
    159 #define	MMC_CAP_MMC_DDR52_180	(1 << 12) /* Can do eMMC DDR52 at 1.8 V */
    160 #define	MMC_CAP_MMC_DDR52	(MMC_CAP_MMC_DDR52_120 | MMC_CAP_MMC_DDR52_180)
    161 #define	MMC_CAP_MMC_HS200_120	(1 << 13) /* Can do eMMC HS200 at 1.2 V */
    162 #define	MMC_CAP_MMC_HS200_180	(1 << 14) /* Can do eMMC HS200 at 1.8 V */
    163 #define	MMC_CAP_MMC_HS200	(MMC_CAP_MMC_HS200_120| MMC_CAP_MMC_HS200_180)
    164 #define	MMC_CAP_MMC_HS400_120	(1 << 15) /* Can do eMMC HS400 at 1.2 V */
    165 #define	MMC_CAP_MMC_HS400_180	(1 << 16) /* Can do eMMC HS400 at 1.8 V */
    166 #define	MMC_CAP_MMC_HS400	(MMC_CAP_MMC_HS400_120 | MMC_CAP_MMC_HS400_180)
    167 #define	MMC_CAP_MMC_HSX00_120	(MMC_CAP_MMC_HS200_120 | MMC_CAP_MMC_HS400_120)
    168 #define	MMC_CAP_MMC_ENH_STROBE	(1 << 17) /* Can do eMMC Enhanced Strobe */
    169 #define	MMC_CAP_SIGNALING_120	(1 << 18) /* Can do signaling at 1.2 V */
    170 #define	MMC_CAP_SIGNALING_180	(1 << 19) /* Can do signaling at 1.8 V */
    171 #define	MMC_CAP_SIGNALING_330	(1 << 20) /* Can do signaling at 3.3 V */
    172 #define	MMC_CAP_DRIVER_TYPE_A	(1 << 21) /* Can do Driver Type A */
    173 #define	MMC_CAP_DRIVER_TYPE_C	(1 << 22) /* Can do Driver Type C */
    174 #define	MMC_CAP_DRIVER_TYPE_D	(1 << 23) /* Can do Driver Type D */
    175 	enum mmc_card_mode mode;
    176 	struct mmc_ios ios;	/* Current state of the host */
    177 };
    178 
    179 #ifdef _KERNEL
    180 extern driver_t   mmc_driver;
    181 
    182 #define	MMC_VERSION	5
    183 
    184 #define	MMC_DECLARE_BRIDGE(name)					\
    185     DRIVER_MODULE(mmc, name, mmc_driver, NULL, NULL);			\
    186     MODULE_DEPEND(name, mmc, MMC_VERSION, MMC_VERSION, MMC_VERSION);
    187 #define	MMC_DEPEND(name)						\
    188     MODULE_DEPEND(name, mmc, MMC_VERSION, MMC_VERSION, MMC_VERSION);
    189 #endif /* _KERNEL */
    190 
    191 #endif /* DEV_MMC_BRIDGE_H */