The RoundMode packed struct had Direction as enum(u4) occupying bits 3:0,
which pushed the precision exception suppress field to bit 4. Per Intel
SDM, the ROUNDSS/VROUNDSS/VCVTPS2PH immediate layout is:
bits 1:0 = rounding mode
bit 2 = rounding source (MXCSR.RC vs immediate)
bit 3 = precision exception suppress
bits 7:4 = reserved (must be 0)
The old encoding emitted e.g. vroundss $0x12 for ceil-suppress (bit 4
set, reserved), which CPUs silently ignore but valgrind 3.26.0 correctly
rejects with SIGILL. Fix by changing Direction to enum(u3) so precision
lands at bit 3, producing the correct $0x0a encoding.
Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
Motiejus Jakštys
d8b3451f12