2078 lines
82 KiB
Zig
2078 lines
82 KiB
Zig
//! SPARCv9 codegen.
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//! This lowers AIR into MIR.
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//! For now this only implements medium/low code model with absolute addressing.
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//! TODO add support for other code models.
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const std = @import("std");
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const assert = std.debug.assert;
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const log = std.log.scoped(.codegen);
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const math = std.math;
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const mem = std.mem;
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const Allocator = mem.Allocator;
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const builtin = @import("builtin");
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const link = @import("../../link.zig");
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const Module = @import("../../Module.zig");
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const TypedValue = @import("../../TypedValue.zig");
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const ErrorMsg = Module.ErrorMsg;
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const Air = @import("../../Air.zig");
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const Mir = @import("Mir.zig");
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const Emit = @import("Emit.zig");
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const Liveness = @import("../../Liveness.zig");
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const Type = @import("../../type.zig").Type;
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const GenerateSymbolError = @import("../../codegen.zig").GenerateSymbolError;
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const FnResult = @import("../../codegen.zig").FnResult;
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const DebugInfoOutput = @import("../../codegen.zig").DebugInfoOutput;
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const RegisterManagerFn = @import("../../register_manager.zig").RegisterManager;
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const RegisterManager = RegisterManagerFn(Self, Register, &abi.allocatable_regs);
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const build_options = @import("build_options");
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const bits = @import("bits.zig");
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const abi = @import("abi.zig");
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const Instruction = bits.Instruction;
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const Register = bits.Register;
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const Self = @This();
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const InnerError = error{
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OutOfMemory,
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CodegenFail,
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OutOfRegisters,
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};
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const RegisterView = enum(u1) {
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caller,
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callee,
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};
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gpa: Allocator,
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air: Air,
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liveness: Liveness,
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bin_file: *link.File,
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target: *const std.Target,
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mod_fn: *const Module.Fn,
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code: *std.ArrayList(u8),
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debug_output: DebugInfoOutput,
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err_msg: ?*ErrorMsg,
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args: []MCValue,
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ret_mcv: MCValue,
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fn_type: Type,
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arg_index: usize,
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src_loc: Module.SrcLoc,
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stack_align: u32,
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/// MIR Instructions
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mir_instructions: std.MultiArrayList(Mir.Inst) = .{},
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/// MIR extra data
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mir_extra: std.ArrayListUnmanaged(u32) = .{},
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/// Byte offset within the source file of the ending curly.
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end_di_line: u32,
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end_di_column: u32,
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/// The value is an offset into the `Function` `code` from the beginning.
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/// To perform the reloc, write 32-bit signed little-endian integer
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/// which is a relative jump, based on the address following the reloc.
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exitlude_jump_relocs: std.ArrayListUnmanaged(usize) = .{},
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/// Whenever there is a runtime branch, we push a Branch onto this stack,
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/// and pop it off when the runtime branch joins. This provides an "overlay"
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/// of the table of mappings from instructions to `MCValue` from within the branch.
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/// This way we can modify the `MCValue` for an instruction in different ways
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/// within different branches. Special consideration is needed when a branch
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/// joins with its parent, to make sure all instructions have the same MCValue
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/// across each runtime branch upon joining.
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branch_stack: *std.ArrayList(Branch),
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// Key is the block instruction
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blocks: std.AutoHashMapUnmanaged(Air.Inst.Index, BlockData) = .{},
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register_manager: RegisterManager = .{},
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/// Maps offset to what is stored there.
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stack: std.AutoHashMapUnmanaged(u32, StackAllocation) = .{},
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/// Tracks the current instruction allocated to the compare flags
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compare_flags_inst: ?Air.Inst.Index = null,
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/// Offset from the stack base, representing the end of the stack frame.
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max_end_stack: u32 = 0,
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/// Represents the current end stack offset. If there is no existing slot
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/// to place a new stack allocation, it goes here, and then bumps `max_end_stack`.
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next_stack_offset: u32 = 0,
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/// Debug field, used to find bugs in the compiler.
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air_bookkeeping: @TypeOf(air_bookkeeping_init) = air_bookkeeping_init,
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const air_bookkeeping_init = if (std.debug.runtime_safety) @as(usize, 0) else {};
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const MCValue = union(enum) {
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/// No runtime bits. `void` types, empty structs, u0, enums with 1 tag, etc.
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/// TODO Look into deleting this tag and using `dead` instead, since every use
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/// of MCValue.none should be instead looking at the type and noticing it is 0 bits.
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none,
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/// Control flow will not allow this value to be observed.
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unreach,
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/// No more references to this value remain.
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dead,
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/// The value is undefined.
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undef,
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/// A pointer-sized integer that fits in a register.
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/// If the type is a pointer, this is the pointer address in virtual address space.
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immediate: u64,
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/// The value is in a target-specific register.
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register: Register,
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/// The value is in memory at a hard-coded address.
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/// If the type is a pointer, it means the pointer address is at this memory location.
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memory: u64,
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/// The value is one of the stack variables.
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/// If the type is a pointer, it means the pointer address is in the stack at this offset.
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stack_offset: u32,
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/// The value is a pointer to one of the stack variables (payload is stack offset).
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ptr_stack_offset: u32,
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/// The value is in the compare flags assuming an unsigned operation,
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/// with this operator applied on top of it.
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compare_flags_unsigned: math.CompareOperator,
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/// The value is in the compare flags assuming a signed operation,
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/// with this operator applied on top of it.
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compare_flags_signed: math.CompareOperator,
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fn isMemory(mcv: MCValue) bool {
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return switch (mcv) {
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.memory, .stack_offset => true,
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else => false,
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};
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}
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fn isImmediate(mcv: MCValue) bool {
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return switch (mcv) {
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.immediate => true,
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else => false,
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};
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}
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fn isMutable(mcv: MCValue) bool {
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return switch (mcv) {
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.none => unreachable,
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.unreach => unreachable,
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.dead => unreachable,
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.immediate,
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.memory,
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.ptr_stack_offset,
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.undef,
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=> false,
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.register,
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.stack_offset,
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=> true,
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};
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}
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};
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const Branch = struct {
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inst_table: std.AutoArrayHashMapUnmanaged(Air.Inst.Index, MCValue) = .{},
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fn deinit(self: *Branch, gpa: Allocator) void {
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self.inst_table.deinit(gpa);
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self.* = undefined;
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}
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};
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const StackAllocation = struct {
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inst: Air.Inst.Index,
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/// TODO do we need size? should be determined by inst.ty.abiSize()
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size: u32,
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};
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const BlockData = struct {
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relocs: std.ArrayListUnmanaged(Mir.Inst.Index),
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/// The first break instruction encounters `null` here and chooses a
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/// machine code value for the block result, populating this field.
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/// Following break instructions encounter that value and use it for
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/// the location to store their block results.
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mcv: MCValue,
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};
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const CallMCValues = struct {
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args: []MCValue,
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return_value: MCValue,
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stack_byte_count: u32,
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stack_align: u32,
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fn deinit(self: *CallMCValues, func: *Self) void {
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func.gpa.free(self.args);
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self.* = undefined;
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}
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};
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const BigTomb = struct {
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function: *Self,
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inst: Air.Inst.Index,
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tomb_bits: Liveness.Bpi,
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big_tomb_bits: u32,
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bit_index: usize,
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fn feed(bt: *BigTomb, op_ref: Air.Inst.Ref) void {
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const this_bit_index = bt.bit_index;
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bt.bit_index += 1;
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const op_int = @enumToInt(op_ref);
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if (op_int < Air.Inst.Ref.typed_value_map.len) return;
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const op_index = @intCast(Air.Inst.Index, op_int - Air.Inst.Ref.typed_value_map.len);
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if (this_bit_index < Liveness.bpi - 1) {
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const dies = @truncate(u1, bt.tomb_bits >> @intCast(Liveness.OperandInt, this_bit_index)) != 0;
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if (!dies) return;
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} else {
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const big_bit_index = @intCast(u5, this_bit_index - (Liveness.bpi - 1));
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const dies = @truncate(u1, bt.big_tomb_bits >> big_bit_index) != 0;
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if (!dies) return;
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}
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bt.function.processDeath(op_index);
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}
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fn finishAir(bt: *BigTomb, result: MCValue) void {
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const is_used = !bt.function.liveness.isUnused(bt.inst);
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if (is_used) {
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log.debug("%{d} => {}", .{ bt.inst, result });
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const branch = &bt.function.branch_stack.items[bt.function.branch_stack.items.len - 1];
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branch.inst_table.putAssumeCapacityNoClobber(bt.inst, result);
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}
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bt.function.finishAirBookkeeping();
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}
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};
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pub fn generate(
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bin_file: *link.File,
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src_loc: Module.SrcLoc,
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module_fn: *Module.Fn,
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air: Air,
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liveness: Liveness,
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code: *std.ArrayList(u8),
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debug_output: DebugInfoOutput,
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) GenerateSymbolError!FnResult {
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if (build_options.skip_non_native and builtin.cpu.arch != bin_file.options.target.cpu.arch) {
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@panic("Attempted to compile for architecture that was disabled by build configuration");
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}
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const mod = bin_file.options.module.?;
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const fn_owner_decl = mod.declPtr(module_fn.owner_decl);
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assert(fn_owner_decl.has_tv);
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const fn_type = fn_owner_decl.ty;
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var branch_stack = std.ArrayList(Branch).init(bin_file.allocator);
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defer {
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assert(branch_stack.items.len == 1);
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branch_stack.items[0].deinit(bin_file.allocator);
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branch_stack.deinit();
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}
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try branch_stack.append(.{});
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var function = Self{
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.gpa = bin_file.allocator,
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.air = air,
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.liveness = liveness,
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.target = &bin_file.options.target,
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.bin_file = bin_file,
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.mod_fn = module_fn,
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.code = code,
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.debug_output = debug_output,
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.err_msg = null,
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.args = undefined, // populated after `resolveCallingConventionValues`
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.ret_mcv = undefined, // populated after `resolveCallingConventionValues`
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.fn_type = fn_type,
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.arg_index = 0,
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.branch_stack = &branch_stack,
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.src_loc = src_loc,
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.stack_align = undefined,
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.end_di_line = module_fn.rbrace_line,
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.end_di_column = module_fn.rbrace_column,
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};
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defer function.stack.deinit(bin_file.allocator);
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defer function.blocks.deinit(bin_file.allocator);
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defer function.exitlude_jump_relocs.deinit(bin_file.allocator);
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var call_info = function.resolveCallingConventionValues(fn_type, .callee) catch |err| switch (err) {
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error.CodegenFail => return FnResult{ .fail = function.err_msg.? },
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error.OutOfRegisters => return FnResult{
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.fail = try ErrorMsg.create(bin_file.allocator, src_loc, "CodeGen ran out of registers. This is a bug in the Zig compiler.", .{}),
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},
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else => |e| return e,
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};
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defer call_info.deinit(&function);
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function.args = call_info.args;
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function.ret_mcv = call_info.return_value;
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function.stack_align = call_info.stack_align;
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function.max_end_stack = call_info.stack_byte_count;
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function.gen() catch |err| switch (err) {
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error.CodegenFail => return FnResult{ .fail = function.err_msg.? },
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error.OutOfRegisters => return FnResult{
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.fail = try ErrorMsg.create(bin_file.allocator, src_loc, "CodeGen ran out of registers. This is a bug in the Zig compiler.", .{}),
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},
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else => |e| return e,
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};
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var mir = Mir{
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.instructions = function.mir_instructions.toOwnedSlice(),
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.extra = function.mir_extra.toOwnedSlice(bin_file.allocator),
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};
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defer mir.deinit(bin_file.allocator);
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var emit = Emit{
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.mir = mir,
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.bin_file = bin_file,
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.debug_output = debug_output,
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.target = &bin_file.options.target,
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.src_loc = src_loc,
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.code = code,
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.prev_di_pc = 0,
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.prev_di_line = module_fn.lbrace_line,
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.prev_di_column = module_fn.lbrace_column,
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};
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defer emit.deinit();
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emit.emitMir() catch |err| switch (err) {
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error.EmitFail => return FnResult{ .fail = emit.err_msg.? },
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else => |e| return e,
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};
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if (function.err_msg) |em| {
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return FnResult{ .fail = em };
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} else {
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return FnResult{ .appended = {} };
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}
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}
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fn gen(self: *Self) !void {
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const cc = self.fn_type.fnCallingConvention();
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if (cc != .Naked) {
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// TODO Finish function prologue and epilogue for sparc64.
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// save %sp, stack_save_area, %sp
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const save_inst = try self.addInst(.{
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.tag = .save,
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.data = .{
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.arithmetic_3op = .{
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.is_imm = true,
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.rd = .sp,
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.rs1 = .sp,
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.rs2_or_imm = .{ .imm = -abi.stack_save_area },
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},
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},
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});
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_ = try self.addInst(.{
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.tag = .dbg_prologue_end,
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.data = .{ .nop = {} },
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});
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try self.genBody(self.air.getMainBody());
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_ = try self.addInst(.{
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.tag = .dbg_epilogue_begin,
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.data = .{ .nop = {} },
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});
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// exitlude jumps
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if (self.exitlude_jump_relocs.items.len > 0 and
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self.exitlude_jump_relocs.items[self.exitlude_jump_relocs.items.len - 1] == self.mir_instructions.len - 3)
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{
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// If the last Mir instruction (apart from the
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// dbg_epilogue_begin) is the last exitlude jump
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// relocation (which would just jump two instructions
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// further), it can be safely removed
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const index = self.exitlude_jump_relocs.pop();
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// First, remove the delay slot, then remove
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// the branch instruction itself.
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self.mir_instructions.orderedRemove(index + 1);
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self.mir_instructions.orderedRemove(index);
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}
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for (self.exitlude_jump_relocs.items) |jmp_reloc| {
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self.mir_instructions.set(jmp_reloc, .{
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.tag = .bpcc,
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.data = .{
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.branch_predict_int = .{
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.ccr = .xcc,
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.cond = .al,
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.inst = @intCast(u32, self.mir_instructions.len),
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},
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},
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});
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}
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// Backpatch stack offset
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const total_stack_size = self.max_end_stack + abi.stack_save_area; // TODO + self.saved_regs_stack_space;
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const stack_size = mem.alignForwardGeneric(u32, total_stack_size, self.stack_align);
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if (math.cast(i13, stack_size)) |size| {
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self.mir_instructions.set(save_inst, .{
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.tag = .save,
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.data = .{
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.arithmetic_3op = .{
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.is_imm = true,
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.rd = .sp,
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.rs1 = .sp,
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.rs2_or_imm = .{ .imm = -size },
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},
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},
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});
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} else |_| {
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// TODO for large stacks, replace the prologue with:
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// setx stack_size, %g1
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// save %sp, %g1, %sp
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return self.fail("TODO SPARCv9: allow larger stacks", .{});
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}
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// return %i7 + 8
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_ = try self.addInst(.{
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.tag = .@"return",
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.data = .{
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.arithmetic_2op = .{
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.is_imm = true,
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.rs1 = .@"i7",
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.rs2_or_imm = .{ .imm = 8 },
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},
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},
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});
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// Branches in SPARC have a delay slot, that is, the instruction
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// following it will unconditionally be executed.
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// See: Section 3.2.3 Control Transfer in SPARCv9 manual.
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// See also: https://arcb.csc.ncsu.edu/~mueller/codeopt/codeopt00/notes/delaybra.html
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// TODO Find a way to fill this delay slot
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// nop
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_ = try self.addInst(.{
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.tag = .nop,
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.data = .{ .nop = {} },
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});
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} else {
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_ = try self.addInst(.{
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.tag = .dbg_prologue_end,
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.data = .{ .nop = {} },
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});
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try self.genBody(self.air.getMainBody());
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_ = try self.addInst(.{
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.tag = .dbg_epilogue_begin,
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.data = .{ .nop = {} },
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});
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}
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// Drop them off at the rbrace.
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_ = try self.addInst(.{
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.tag = .dbg_line,
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.data = .{ .dbg_line_column = .{
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.line = self.end_di_line,
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.column = self.end_di_column,
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} },
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});
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}
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fn genBody(self: *Self, body: []const Air.Inst.Index) InnerError!void {
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const air_tags = self.air.instructions.items(.tag);
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for (body) |inst| {
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const old_air_bookkeeping = self.air_bookkeeping;
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try self.ensureProcessDeathCapacity(Liveness.bpi);
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switch (air_tags[inst]) {
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// zig fmt: off
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.add, .ptr_add => @panic("TODO try self.airBinOp(inst)"),
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.addwrap => @panic("TODO try self.airAddWrap(inst)"),
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.add_sat => @panic("TODO try self.airAddSat(inst)"),
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.sub, .ptr_sub => @panic("TODO try self.airBinOp(inst)"),
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.subwrap => @panic("TODO try self.airSubWrap(inst)"),
|
|
.sub_sat => @panic("TODO try self.airSubSat(inst)"),
|
|
.mul => @panic("TODO try self.airMul(inst)"),
|
|
.mulwrap => @panic("TODO try self.airMulWrap(inst)"),
|
|
.mul_sat => @panic("TODO try self.airMulSat(inst)"),
|
|
.rem => @panic("TODO try self.airRem(inst)"),
|
|
.mod => @panic("TODO try self.airMod(inst)"),
|
|
.shl, .shl_exact => @panic("TODO try self.airShl(inst)"),
|
|
.shl_sat => @panic("TODO try self.airShlSat(inst)"),
|
|
.min => @panic("TODO try self.airMin(inst)"),
|
|
.max => @panic("TODO try self.airMax(inst)"),
|
|
.slice => @panic("TODO try self.airSlice(inst)"),
|
|
|
|
.sqrt,
|
|
.sin,
|
|
.cos,
|
|
.tan,
|
|
.exp,
|
|
.exp2,
|
|
.log,
|
|
.log2,
|
|
.log10,
|
|
.fabs,
|
|
.floor,
|
|
.ceil,
|
|
.round,
|
|
.trunc_float,
|
|
=> @panic("TODO try self.airUnaryMath(inst)"),
|
|
|
|
.add_with_overflow => @panic("TODO try self.airAddWithOverflow(inst)"),
|
|
.sub_with_overflow => @panic("TODO try self.airSubWithOverflow(inst)"),
|
|
.mul_with_overflow => @panic("TODO try self.airMulWithOverflow(inst)"),
|
|
.shl_with_overflow => @panic("TODO try self.airShlWithOverflow(inst)"),
|
|
|
|
.div_float, .div_trunc, .div_floor, .div_exact => try self.airDiv(inst),
|
|
|
|
.cmp_lt => @panic("TODO try self.airCmp(inst, .lt)"),
|
|
.cmp_lte => @panic("TODO try self.airCmp(inst, .lte)"),
|
|
.cmp_eq => @panic("TODO try self.airCmp(inst, .eq)"),
|
|
.cmp_gte => @panic("TODO try self.airCmp(inst, .gte)"),
|
|
.cmp_gt => @panic("TODO try self.airCmp(inst, .gt)"),
|
|
.cmp_neq => @panic("TODO try self.airCmp(inst, .neq)"),
|
|
.cmp_vector => @panic("TODO try self.airCmpVector(inst)"),
|
|
.cmp_lt_errors_len => @panic("TODO try self.airCmpLtErrorsLen(inst)"),
|
|
|
|
.bool_and => @panic("TODO try self.airBoolOp(inst)"),
|
|
.bool_or => @panic("TODO try self.airBoolOp(inst)"),
|
|
.bit_and => @panic("TODO try self.airBitAnd(inst)"),
|
|
.bit_or => @panic("TODO try self.airBitOr(inst)"),
|
|
.xor => @panic("TODO try self.airXor(inst)"),
|
|
.shr, .shr_exact => @panic("TODO try self.airShr(inst)"),
|
|
|
|
.alloc => @panic("TODO try self.airAlloc(inst)"),
|
|
.ret_ptr => try self.airRetPtr(inst),
|
|
.arg => try self.airArg(inst),
|
|
.assembly => try self.airAsm(inst),
|
|
.bitcast => @panic("TODO try self.airBitCast(inst)"),
|
|
.block => try self.airBlock(inst),
|
|
.br => @panic("TODO try self.airBr(inst)"),
|
|
.breakpoint => try self.airBreakpoint(),
|
|
.ret_addr => @panic("TODO try self.airRetAddr(inst)"),
|
|
.frame_addr => @panic("TODO try self.airFrameAddress(inst)"),
|
|
.fence => @panic("TODO try self.airFence()"),
|
|
.cond_br => try self.airCondBr(inst),
|
|
.dbg_stmt => try self.airDbgStmt(inst),
|
|
.fptrunc => @panic("TODO try self.airFptrunc(inst)"),
|
|
.fpext => @panic("TODO try self.airFpext(inst)"),
|
|
.intcast => @panic("TODO try self.airIntCast(inst)"),
|
|
.trunc => @panic("TODO try self.airTrunc(inst)"),
|
|
.bool_to_int => @panic("TODO try self.airBoolToInt(inst)"),
|
|
.is_non_null => @panic("TODO try self.airIsNonNull(inst)"),
|
|
.is_non_null_ptr => @panic("TODO try self.airIsNonNullPtr(inst)"),
|
|
.is_null => @panic("TODO try self.airIsNull(inst)"),
|
|
.is_null_ptr => @panic("TODO try self.airIsNullPtr(inst)"),
|
|
.is_non_err => try self.airIsNonErr(inst),
|
|
.is_non_err_ptr => @panic("TODO try self.airIsNonErrPtr(inst)"),
|
|
.is_err => try self.airIsErr(inst),
|
|
.is_err_ptr => @panic("TODO try self.airIsErrPtr(inst)"),
|
|
.load => @panic("TODO try self.airLoad(inst)"),
|
|
.loop => @panic("TODO try self.airLoop(inst)"),
|
|
.not => @panic("TODO try self.airNot(inst)"),
|
|
.ptrtoint => @panic("TODO try self.airPtrToInt(inst)"),
|
|
.ret => try self.airRet(inst),
|
|
.ret_load => try self.airRetLoad(inst),
|
|
.store => try self.airStore(inst),
|
|
.struct_field_ptr=> @panic("TODO try self.airStructFieldPtr(inst)"),
|
|
.struct_field_val=> @panic("TODO try self.airStructFieldVal(inst)"),
|
|
.array_to_slice => @panic("TODO try self.airArrayToSlice(inst)"),
|
|
.int_to_float => @panic("TODO try self.airIntToFloat(inst)"),
|
|
.float_to_int => @panic("TODO try self.airFloatToInt(inst)"),
|
|
.cmpxchg_strong => @panic("TODO try self.airCmpxchg(inst)"),
|
|
.cmpxchg_weak => @panic("TODO try self.airCmpxchg(inst)"),
|
|
.atomic_rmw => @panic("TODO try self.airAtomicRmw(inst)"),
|
|
.atomic_load => @panic("TODO try self.airAtomicLoad(inst)"),
|
|
.memcpy => @panic("TODO try self.airMemcpy(inst)"),
|
|
.memset => @panic("TODO try self.airMemset(inst)"),
|
|
.set_union_tag => @panic("TODO try self.airSetUnionTag(inst)"),
|
|
.get_union_tag => @panic("TODO try self.airGetUnionTag(inst)"),
|
|
.clz => @panic("TODO try self.airClz(inst)"),
|
|
.ctz => @panic("TODO try self.airCtz(inst)"),
|
|
.popcount => @panic("TODO try self.airPopcount(inst)"),
|
|
.byte_swap => @panic("TODO try self.airByteSwap(inst)"),
|
|
.bit_reverse => @panic("TODO try self.airBitReverse(inst)"),
|
|
.tag_name => @panic("TODO try self.airTagName(inst)"),
|
|
.error_name => @panic("TODO try self.airErrorName(inst)"),
|
|
.splat => @panic("TODO try self.airSplat(inst)"),
|
|
.select => @panic("TODO try self.airSelect(inst)"),
|
|
.shuffle => @panic("TODO try self.airShuffle(inst)"),
|
|
.reduce => @panic("TODO try self.airReduce(inst)"),
|
|
.aggregate_init => @panic("TODO try self.airAggregateInit(inst)"),
|
|
.union_init => @panic("TODO try self.airUnionInit(inst)"),
|
|
.prefetch => @panic("TODO try self.airPrefetch(inst)"),
|
|
.mul_add => @panic("TODO try self.airMulAdd(inst)"),
|
|
|
|
.dbg_var_ptr,
|
|
.dbg_var_val,
|
|
=> try self.airDbgVar(inst),
|
|
|
|
.dbg_inline_begin,
|
|
.dbg_inline_end,
|
|
=> try self.airDbgInline(inst),
|
|
|
|
.dbg_block_begin,
|
|
.dbg_block_end,
|
|
=> try self.airDbgBlock(inst),
|
|
|
|
.call => try self.airCall(inst, .auto),
|
|
.call_always_tail => try self.airCall(inst, .always_tail),
|
|
.call_never_tail => try self.airCall(inst, .never_tail),
|
|
.call_never_inline => try self.airCall(inst, .never_inline),
|
|
|
|
.atomic_store_unordered => @panic("TODO try self.airAtomicStore(inst, .Unordered)"),
|
|
.atomic_store_monotonic => @panic("TODO try self.airAtomicStore(inst, .Monotonic)"),
|
|
.atomic_store_release => @panic("TODO try self.airAtomicStore(inst, .Release)"),
|
|
.atomic_store_seq_cst => @panic("TODO try self.airAtomicStore(inst, .SeqCst)"),
|
|
|
|
.struct_field_ptr_index_0 => @panic("TODO try self.airStructFieldPtrIndex(inst, 0)"),
|
|
.struct_field_ptr_index_1 => @panic("TODO try self.airStructFieldPtrIndex(inst, 1)"),
|
|
.struct_field_ptr_index_2 => @panic("TODO try self.airStructFieldPtrIndex(inst, 2)"),
|
|
.struct_field_ptr_index_3 => @panic("TODO try self.airStructFieldPtrIndex(inst, 3)"),
|
|
|
|
.field_parent_ptr => @panic("TODO try self.airFieldParentPtr(inst)"),
|
|
|
|
.switch_br => try self.airSwitch(inst),
|
|
.slice_ptr => @panic("TODO try self.airSlicePtr(inst)"),
|
|
.slice_len => @panic("TODO try self.airSliceLen(inst)"),
|
|
|
|
.ptr_slice_len_ptr => @panic("TODO try self.airPtrSliceLenPtr(inst)"),
|
|
.ptr_slice_ptr_ptr => @panic("TODO try self.airPtrSlicePtrPtr(inst)"),
|
|
|
|
.array_elem_val => @panic("TODO try self.airArrayElemVal(inst)"),
|
|
.slice_elem_val => @panic("TODO try self.airSliceElemVal(inst)"),
|
|
.slice_elem_ptr => @panic("TODO try self.airSliceElemPtr(inst)"),
|
|
.ptr_elem_val => @panic("TODO try self.airPtrElemVal(inst)"),
|
|
.ptr_elem_ptr => @panic("TODO try self.airPtrElemPtr(inst)"),
|
|
|
|
.constant => unreachable, // excluded from function bodies
|
|
.const_ty => unreachable, // excluded from function bodies
|
|
.unreach => self.finishAirBookkeeping(),
|
|
|
|
.optional_payload => @panic("TODO try self.airOptionalPayload(inst)"),
|
|
.optional_payload_ptr => @panic("TODO try self.airOptionalPayloadPtr(inst)"),
|
|
.optional_payload_ptr_set => @panic("TODO try self.airOptionalPayloadPtrSet(inst)"),
|
|
.unwrap_errunion_err => @panic("TODO try self.airUnwrapErrErr(inst)"),
|
|
.unwrap_errunion_payload => @panic("TODO try self.airUnwrapErrPayload(inst)"),
|
|
.unwrap_errunion_err_ptr => @panic("TODO try self.airUnwrapErrErrPtr(inst)"),
|
|
.unwrap_errunion_payload_ptr=> @panic("TODO try self.airUnwrapErrPayloadPtr(inst)"),
|
|
.errunion_payload_ptr_set => @panic("TODO try self.airErrUnionPayloadPtrSet(inst)"),
|
|
|
|
.wrap_optional => @panic("TODO try self.airWrapOptional(inst)"),
|
|
.wrap_errunion_payload => @panic("TODO try self.airWrapErrUnionPayload(inst)"),
|
|
.wrap_errunion_err => @panic("TODO try self.airWrapErrUnionErr(inst)"),
|
|
|
|
.wasm_memory_size => unreachable,
|
|
.wasm_memory_grow => unreachable,
|
|
// zig fmt: on
|
|
}
|
|
|
|
if (std.debug.runtime_safety) {
|
|
if (self.air_bookkeeping < old_air_bookkeeping + 1) {
|
|
std.debug.panic("in codegen.zig, handling of AIR instruction %{d} ('{}') did not do proper bookkeeping. Look for a missing call to finishAir.", .{ inst, air_tags[inst] });
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
fn airAsm(self: *Self, inst: Air.Inst.Index) !void {
|
|
const ty_pl = self.air.instructions.items(.data)[inst].ty_pl;
|
|
const extra = self.air.extraData(Air.Asm, ty_pl.payload);
|
|
const is_volatile = (extra.data.flags & 0x80000000) != 0;
|
|
const clobbers_len = @truncate(u31, extra.data.flags);
|
|
var extra_i: usize = extra.end;
|
|
const outputs = @ptrCast([]const Air.Inst.Ref, self.air.extra[extra_i .. extra_i + extra.data.outputs_len]);
|
|
extra_i += outputs.len;
|
|
const inputs = @ptrCast([]const Air.Inst.Ref, self.air.extra[extra_i .. extra_i + extra.data.inputs_len]);
|
|
extra_i += inputs.len;
|
|
|
|
const dead = !is_volatile and self.liveness.isUnused(inst);
|
|
const result: MCValue = if (dead) .dead else result: {
|
|
if (outputs.len > 1) {
|
|
return self.fail("TODO implement codegen for asm with more than 1 output", .{});
|
|
}
|
|
|
|
const output_constraint: ?[]const u8 = for (outputs) |output| {
|
|
if (output != .none) {
|
|
return self.fail("TODO implement codegen for non-expr asm", .{});
|
|
}
|
|
const extra_bytes = std.mem.sliceAsBytes(self.air.extra[extra_i..]);
|
|
const constraint = std.mem.sliceTo(std.mem.sliceAsBytes(self.air.extra[extra_i..]), 0);
|
|
const name = std.mem.sliceTo(extra_bytes[constraint.len + 1 ..], 0);
|
|
// This equation accounts for the fact that even if we have exactly 4 bytes
|
|
// for the string, we still use the next u32 for the null terminator.
|
|
extra_i += (constraint.len + name.len + (2 + 3)) / 4;
|
|
|
|
break constraint;
|
|
} else null;
|
|
|
|
for (inputs) |input| {
|
|
const input_bytes = std.mem.sliceAsBytes(self.air.extra[extra_i..]);
|
|
const constraint = std.mem.sliceTo(input_bytes, 0);
|
|
const name = std.mem.sliceTo(input_bytes[constraint.len + 1 ..], 0);
|
|
// This equation accounts for the fact that even if we have exactly 4 bytes
|
|
// for the string, we still use the next u32 for the null terminator.
|
|
extra_i += (constraint.len + name.len + (2 + 3)) / 4;
|
|
|
|
if (constraint.len < 3 or constraint[0] != '{' or constraint[constraint.len - 1] != '}') {
|
|
return self.fail("unrecognized asm input constraint: '{s}'", .{constraint});
|
|
}
|
|
const reg_name = constraint[1 .. constraint.len - 1];
|
|
const reg = parseRegName(reg_name) orelse
|
|
return self.fail("unrecognized register: '{s}'", .{reg_name});
|
|
|
|
const arg_mcv = try self.resolveInst(input);
|
|
try self.register_manager.getReg(reg, null);
|
|
try self.genSetReg(self.air.typeOf(input), reg, arg_mcv);
|
|
}
|
|
|
|
{
|
|
var clobber_i: u32 = 0;
|
|
while (clobber_i < clobbers_len) : (clobber_i += 1) {
|
|
const clobber = std.mem.sliceTo(std.mem.sliceAsBytes(self.air.extra[extra_i..]), 0);
|
|
// This equation accounts for the fact that even if we have exactly 4 bytes
|
|
// for the string, we still use the next u32 for the null terminator.
|
|
extra_i += clobber.len / 4 + 1;
|
|
|
|
// TODO honor these
|
|
}
|
|
}
|
|
|
|
const asm_source = std.mem.sliceAsBytes(self.air.extra[extra_i..])[0..extra.data.source_len];
|
|
|
|
if (mem.eql(u8, asm_source, "ta 0x6d")) {
|
|
_ = try self.addInst(.{
|
|
.tag = .tcc,
|
|
.data = .{
|
|
.trap = .{
|
|
.is_imm = true,
|
|
.cond = .al,
|
|
.rs2_or_imm = .{ .imm = 0x6d },
|
|
},
|
|
},
|
|
});
|
|
} else {
|
|
return self.fail("TODO implement a full SPARCv9 assembly parsing", .{});
|
|
}
|
|
|
|
if (output_constraint) |output| {
|
|
if (output.len < 4 or output[0] != '=' or output[1] != '{' or output[output.len - 1] != '}') {
|
|
return self.fail("unrecognized asm output constraint: '{s}'", .{output});
|
|
}
|
|
const reg_name = output[2 .. output.len - 1];
|
|
const reg = parseRegName(reg_name) orelse
|
|
return self.fail("unrecognized register: '{s}'", .{reg_name});
|
|
break :result MCValue{ .register = reg };
|
|
} else {
|
|
break :result MCValue{ .none = {} };
|
|
}
|
|
};
|
|
|
|
simple: {
|
|
var buf = [1]Air.Inst.Ref{.none} ** (Liveness.bpi - 1);
|
|
var buf_index: usize = 0;
|
|
for (outputs) |output| {
|
|
if (output == .none) continue;
|
|
|
|
if (buf_index >= buf.len) break :simple;
|
|
buf[buf_index] = output;
|
|
buf_index += 1;
|
|
}
|
|
if (buf_index + inputs.len > buf.len) break :simple;
|
|
std.mem.copy(Air.Inst.Ref, buf[buf_index..], inputs);
|
|
return self.finishAir(inst, result, buf);
|
|
}
|
|
|
|
var bt = try self.iterateBigTomb(inst, outputs.len + inputs.len);
|
|
for (outputs) |output| {
|
|
if (output == .none) continue;
|
|
|
|
bt.feed(output);
|
|
}
|
|
for (inputs) |input| {
|
|
bt.feed(input);
|
|
}
|
|
return bt.finishAir(result);
|
|
}
|
|
|
|
fn airArg(self: *Self, inst: Air.Inst.Index) !void {
|
|
const arg_index = self.arg_index;
|
|
self.arg_index += 1;
|
|
|
|
const ty = self.air.typeOfIndex(inst);
|
|
_ = ty;
|
|
|
|
const result = self.args[arg_index];
|
|
// TODO support stack-only arguments
|
|
// TODO Copy registers to the stack
|
|
const mcv = result;
|
|
|
|
try self.genArgDbgInfo(inst, mcv, @intCast(u32, arg_index));
|
|
|
|
if (self.liveness.isUnused(inst))
|
|
return self.finishAirBookkeeping();
|
|
|
|
switch (mcv) {
|
|
.register => |reg| {
|
|
self.register_manager.getRegAssumeFree(reg, inst);
|
|
},
|
|
else => {},
|
|
}
|
|
|
|
return self.finishAir(inst, mcv, .{ .none, .none, .none });
|
|
}
|
|
|
|
fn airBlock(self: *Self, inst: Air.Inst.Index) !void {
|
|
try self.blocks.putNoClobber(self.gpa, inst, .{
|
|
// A block is a setup to be able to jump to the end.
|
|
.relocs = .{},
|
|
// It also acts as a receptacle for break operands.
|
|
// Here we use `MCValue.none` to represent a null value so that the first
|
|
// break instruction will choose a MCValue for the block result and overwrite
|
|
// this field. Following break instructions will use that MCValue to put their
|
|
// block results.
|
|
.mcv = MCValue{ .none = {} },
|
|
});
|
|
defer self.blocks.getPtr(inst).?.relocs.deinit(self.gpa);
|
|
|
|
const ty_pl = self.air.instructions.items(.data)[inst].ty_pl;
|
|
const extra = self.air.extraData(Air.Block, ty_pl.payload);
|
|
const body = self.air.extra[extra.end..][0..extra.data.body_len];
|
|
try self.genBody(body);
|
|
|
|
// relocations for `bpcc` instructions
|
|
const relocs = &self.blocks.getPtr(inst).?.relocs;
|
|
if (relocs.items.len > 0 and relocs.items[relocs.items.len - 1] == self.mir_instructions.len - 1) {
|
|
// If the last Mir instruction is the last relocation (which
|
|
// would just jump one instruction further), it can be safely
|
|
// removed
|
|
self.mir_instructions.orderedRemove(relocs.pop());
|
|
}
|
|
for (relocs.items) |reloc| {
|
|
try self.performReloc(reloc);
|
|
}
|
|
|
|
const result = self.blocks.getPtr(inst).?.mcv;
|
|
return self.finishAir(inst, result, .{ .none, .none, .none });
|
|
}
|
|
|
|
fn airBreakpoint(self: *Self) !void {
|
|
// ta 0x01
|
|
_ = try self.addInst(.{
|
|
.tag = .tcc,
|
|
.data = .{
|
|
.trap = .{
|
|
.is_imm = true,
|
|
.cond = .al,
|
|
.rs2_or_imm = .{ .imm = 0x01 },
|
|
},
|
|
},
|
|
});
|
|
return self.finishAirBookkeeping();
|
|
}
|
|
|
|
fn airCall(self: *Self, inst: Air.Inst.Index, modifier: std.builtin.CallOptions.Modifier) !void {
|
|
if (modifier == .always_tail) return self.fail("TODO implement tail calls for {}", .{self.target.cpu.arch});
|
|
|
|
const pl_op = self.air.instructions.items(.data)[inst].pl_op;
|
|
const callee = pl_op.operand;
|
|
const extra = self.air.extraData(Air.Call, pl_op.payload);
|
|
const args = @ptrCast([]const Air.Inst.Ref, self.air.extra[extra.end .. extra.end + extra.data.args_len]);
|
|
const ty = self.air.typeOf(callee);
|
|
const fn_ty = switch (ty.zigTypeTag()) {
|
|
.Fn => ty,
|
|
.Pointer => ty.childType(),
|
|
else => unreachable,
|
|
};
|
|
|
|
var info = try self.resolveCallingConventionValues(fn_ty, .caller);
|
|
defer info.deinit(self);
|
|
for (info.args) |mc_arg, arg_i| {
|
|
const arg = args[arg_i];
|
|
const arg_ty = self.air.typeOf(arg);
|
|
const arg_mcv = try self.resolveInst(arg);
|
|
|
|
switch (mc_arg) {
|
|
.none => continue,
|
|
.undef => unreachable,
|
|
.immediate => unreachable,
|
|
.unreach => unreachable,
|
|
.dead => unreachable,
|
|
.memory => unreachable,
|
|
.compare_flags_signed => unreachable,
|
|
.compare_flags_unsigned => unreachable,
|
|
.register => |reg| {
|
|
try self.register_manager.getReg(reg, null);
|
|
try self.genSetReg(arg_ty, reg, arg_mcv);
|
|
},
|
|
.stack_offset => {
|
|
return self.fail("TODO implement calling with parameters in memory", .{});
|
|
},
|
|
.ptr_stack_offset => {
|
|
return self.fail("TODO implement calling with MCValue.ptr_stack_offset arg", .{});
|
|
},
|
|
}
|
|
}
|
|
|
|
// Due to incremental compilation, how function calls are generated depends
|
|
// on linking.
|
|
if (self.air.value(callee)) |func_value| {
|
|
if (self.bin_file.tag == link.File.Elf.base_tag) {
|
|
if (func_value.castTag(.function)) |func_payload| {
|
|
const func = func_payload.data;
|
|
const ptr_bits = self.target.cpu.arch.ptrBitWidth();
|
|
const ptr_bytes: u64 = @divExact(ptr_bits, 8);
|
|
const got_addr = if (self.bin_file.cast(link.File.Elf)) |elf_file| blk: {
|
|
const got = &elf_file.program_headers.items[elf_file.phdr_got_index.?];
|
|
const mod = self.bin_file.options.module.?;
|
|
break :blk @intCast(u32, got.p_vaddr + mod.declPtr(func.owner_decl).link.elf.offset_table_index * ptr_bytes);
|
|
} else unreachable;
|
|
|
|
try self.genSetReg(Type.initTag(.usize), .o7, .{ .memory = got_addr });
|
|
|
|
_ = try self.addInst(.{
|
|
.tag = .jmpl,
|
|
.data = .{
|
|
.arithmetic_3op = .{
|
|
.is_imm = false,
|
|
.rd = .o7,
|
|
.rs1 = .o7,
|
|
.rs2_or_imm = .{ .rs2 = .g0 },
|
|
},
|
|
},
|
|
});
|
|
|
|
// TODO Find a way to fill this delay slot
|
|
_ = try self.addInst(.{
|
|
.tag = .nop,
|
|
.data = .{ .nop = {} },
|
|
});
|
|
} else if (func_value.castTag(.extern_fn)) |_| {
|
|
return self.fail("TODO implement calling extern functions", .{});
|
|
} else {
|
|
return self.fail("TODO implement calling bitcasted functions", .{});
|
|
}
|
|
} else @panic("TODO SPARCv9 currently does not support non-ELF binaries");
|
|
} else {
|
|
assert(ty.zigTypeTag() == .Pointer);
|
|
const mcv = try self.resolveInst(callee);
|
|
try self.genSetReg(ty, .o7, mcv);
|
|
|
|
_ = try self.addInst(.{
|
|
.tag = .jmpl,
|
|
.data = .{
|
|
.arithmetic_3op = .{
|
|
.is_imm = false,
|
|
.rd = .o7,
|
|
.rs1 = .o7,
|
|
.rs2_or_imm = .{ .rs2 = .g0 },
|
|
},
|
|
},
|
|
});
|
|
|
|
// TODO Find a way to fill this delay slot
|
|
_ = try self.addInst(.{
|
|
.tag = .nop,
|
|
.data = .{ .nop = {} },
|
|
});
|
|
}
|
|
|
|
const result = info.return_value;
|
|
|
|
if (args.len + 1 <= Liveness.bpi - 1) {
|
|
var buf = [1]Air.Inst.Ref{.none} ** (Liveness.bpi - 1);
|
|
buf[0] = callee;
|
|
std.mem.copy(Air.Inst.Ref, buf[1..], args);
|
|
return self.finishAir(inst, result, buf);
|
|
}
|
|
|
|
@panic("TODO handle return value with BigTomb");
|
|
}
|
|
|
|
fn airCondBr(self: *Self, inst: Air.Inst.Index) !void {
|
|
const pl_op = self.air.instructions.items(.data)[inst].pl_op;
|
|
const cond = try self.resolveInst(pl_op.operand);
|
|
const extra = self.air.extraData(Air.CondBr, pl_op.payload);
|
|
const then_body = self.air.extra[extra.end..][0..extra.data.then_body_len];
|
|
const else_body = self.air.extra[extra.end + then_body.len ..][0..extra.data.else_body_len];
|
|
const liveness_condbr = self.liveness.getCondBr(inst);
|
|
|
|
// Here we either emit a BPcc for branching on CCR content,
|
|
// or emit a BPr to branch on register content.
|
|
const reloc: Mir.Inst.Index = switch (cond) {
|
|
.compare_flags_signed,
|
|
.compare_flags_unsigned,
|
|
=> try self.addInst(.{
|
|
.tag = .bpcc,
|
|
.data = .{
|
|
.branch_predict_int = .{
|
|
.ccr = .xcc,
|
|
.cond = switch (cond) {
|
|
.compare_flags_signed => |cmp_op| blk: {
|
|
// Here we map to the opposite condition because the jump is to the false branch.
|
|
const condition = Instruction.ICondition.fromCompareOperatorSigned(cmp_op);
|
|
break :blk condition.negate();
|
|
},
|
|
.compare_flags_unsigned => |cmp_op| blk: {
|
|
// Here we map to the opposite condition because the jump is to the false branch.
|
|
const condition = Instruction.ICondition.fromCompareOperatorUnsigned(cmp_op);
|
|
break :blk condition.negate();
|
|
},
|
|
else => unreachable,
|
|
},
|
|
.inst = undefined, // Will be filled by performReloc
|
|
},
|
|
},
|
|
}),
|
|
else => return self.fail("TODO branch on register content (BPr)", .{}),
|
|
};
|
|
|
|
// Regardless of the branch type that's emitted, we need to reserve
|
|
// a space for the delay slot.
|
|
// TODO Find a way to fill this delay slot
|
|
_ = try self.addInst(.{
|
|
.tag = .nop,
|
|
.data = .{ .nop = {} },
|
|
});
|
|
|
|
// If the condition dies here in this condbr instruction, process
|
|
// that death now instead of later as this has an effect on
|
|
// whether it needs to be spilled in the branches
|
|
if (self.liveness.operandDies(inst, 0)) {
|
|
const op_int = @enumToInt(pl_op.operand);
|
|
if (op_int >= Air.Inst.Ref.typed_value_map.len) {
|
|
const op_index = @intCast(Air.Inst.Index, op_int - Air.Inst.Ref.typed_value_map.len);
|
|
self.processDeath(op_index);
|
|
}
|
|
}
|
|
|
|
// Capture the state of register and stack allocation state so that we can revert to it.
|
|
const parent_next_stack_offset = self.next_stack_offset;
|
|
const parent_free_registers = self.register_manager.free_registers;
|
|
var parent_stack = try self.stack.clone(self.gpa);
|
|
defer parent_stack.deinit(self.gpa);
|
|
const parent_registers = self.register_manager.registers;
|
|
const parent_compare_flags_inst = self.compare_flags_inst;
|
|
|
|
try self.branch_stack.append(.{});
|
|
errdefer {
|
|
_ = self.branch_stack.pop();
|
|
}
|
|
|
|
try self.ensureProcessDeathCapacity(liveness_condbr.then_deaths.len);
|
|
for (liveness_condbr.then_deaths) |operand| {
|
|
self.processDeath(operand);
|
|
}
|
|
try self.genBody(then_body);
|
|
|
|
// Revert to the previous register and stack allocation state.
|
|
|
|
var saved_then_branch = self.branch_stack.pop();
|
|
defer saved_then_branch.deinit(self.gpa);
|
|
|
|
self.register_manager.registers = parent_registers;
|
|
self.compare_flags_inst = parent_compare_flags_inst;
|
|
|
|
self.stack.deinit(self.gpa);
|
|
self.stack = parent_stack;
|
|
parent_stack = .{};
|
|
|
|
self.next_stack_offset = parent_next_stack_offset;
|
|
self.register_manager.free_registers = parent_free_registers;
|
|
|
|
try self.performReloc(reloc);
|
|
const else_branch = self.branch_stack.addOneAssumeCapacity();
|
|
else_branch.* = .{};
|
|
|
|
try self.ensureProcessDeathCapacity(liveness_condbr.else_deaths.len);
|
|
for (liveness_condbr.else_deaths) |operand| {
|
|
self.processDeath(operand);
|
|
}
|
|
try self.genBody(else_body);
|
|
|
|
// At this point, each branch will possibly have conflicting values for where
|
|
// each instruction is stored. They agree, however, on which instructions are alive/dead.
|
|
// We use the first ("then") branch as canonical, and here emit
|
|
// instructions into the second ("else") branch to make it conform.
|
|
// We continue respect the data structure semantic guarantees of the else_branch so
|
|
// that we can use all the code emitting abstractions. This is why at the bottom we
|
|
// assert that parent_branch.free_registers equals the saved_then_branch.free_registers
|
|
// rather than assigning it.
|
|
const parent_branch = &self.branch_stack.items[self.branch_stack.items.len - 2];
|
|
try parent_branch.inst_table.ensureUnusedCapacity(self.gpa, else_branch.inst_table.count());
|
|
|
|
const else_slice = else_branch.inst_table.entries.slice();
|
|
const else_keys = else_slice.items(.key);
|
|
const else_values = else_slice.items(.value);
|
|
for (else_keys) |else_key, else_idx| {
|
|
const else_value = else_values[else_idx];
|
|
const canon_mcv = if (saved_then_branch.inst_table.fetchSwapRemove(else_key)) |then_entry| blk: {
|
|
// The instruction's MCValue is overridden in both branches.
|
|
parent_branch.inst_table.putAssumeCapacity(else_key, then_entry.value);
|
|
if (else_value == .dead) {
|
|
assert(then_entry.value == .dead);
|
|
continue;
|
|
}
|
|
break :blk then_entry.value;
|
|
} else blk: {
|
|
if (else_value == .dead)
|
|
continue;
|
|
// The instruction is only overridden in the else branch.
|
|
var i: usize = self.branch_stack.items.len - 2;
|
|
while (true) {
|
|
i -= 1; // If this overflows, the question is: why wasn't the instruction marked dead?
|
|
if (self.branch_stack.items[i].inst_table.get(else_key)) |mcv| {
|
|
assert(mcv != .dead);
|
|
break :blk mcv;
|
|
}
|
|
}
|
|
};
|
|
log.debug("consolidating else_entry {d} {}=>{}", .{ else_key, else_value, canon_mcv });
|
|
// TODO make sure the destination stack offset / register does not already have something
|
|
// going on there.
|
|
try self.setRegOrMem(self.air.typeOfIndex(else_key), canon_mcv, else_value);
|
|
// TODO track the new register / stack allocation
|
|
}
|
|
try parent_branch.inst_table.ensureUnusedCapacity(self.gpa, saved_then_branch.inst_table.count());
|
|
const then_slice = saved_then_branch.inst_table.entries.slice();
|
|
const then_keys = then_slice.items(.key);
|
|
const then_values = then_slice.items(.value);
|
|
for (then_keys) |then_key, then_idx| {
|
|
const then_value = then_values[then_idx];
|
|
// We already deleted the items from this table that matched the else_branch.
|
|
// So these are all instructions that are only overridden in the then branch.
|
|
parent_branch.inst_table.putAssumeCapacity(then_key, then_value);
|
|
if (then_value == .dead)
|
|
continue;
|
|
const parent_mcv = blk: {
|
|
var i: usize = self.branch_stack.items.len - 2;
|
|
while (true) {
|
|
i -= 1;
|
|
if (self.branch_stack.items[i].inst_table.get(then_key)) |mcv| {
|
|
assert(mcv != .dead);
|
|
break :blk mcv;
|
|
}
|
|
}
|
|
};
|
|
log.debug("consolidating then_entry {d} {}=>{}", .{ then_key, parent_mcv, then_value });
|
|
// TODO make sure the destination stack offset / register does not already have something
|
|
// going on there.
|
|
try self.setRegOrMem(self.air.typeOfIndex(then_key), parent_mcv, then_value);
|
|
// TODO track the new register / stack allocation
|
|
}
|
|
|
|
{
|
|
var item = self.branch_stack.pop();
|
|
item.deinit(self.gpa);
|
|
}
|
|
|
|
// We already took care of pl_op.operand earlier, so we're going
|
|
// to pass .none here
|
|
return self.finishAir(inst, .unreach, .{ .none, .none, .none });
|
|
}
|
|
|
|
fn airDbgBlock(self: *Self, inst: Air.Inst.Index) !void {
|
|
// TODO emit debug info lexical block
|
|
return self.finishAir(inst, .dead, .{ .none, .none, .none });
|
|
}
|
|
|
|
fn airDbgInline(self: *Self, inst: Air.Inst.Index) !void {
|
|
const ty_pl = self.air.instructions.items(.data)[inst].ty_pl;
|
|
const function = self.air.values[ty_pl.payload].castTag(.function).?.data;
|
|
// TODO emit debug info for function change
|
|
_ = function;
|
|
return self.finishAir(inst, .dead, .{ .none, .none, .none });
|
|
}
|
|
|
|
fn airDbgStmt(self: *Self, inst: Air.Inst.Index) !void {
|
|
const dbg_stmt = self.air.instructions.items(.data)[inst].dbg_stmt;
|
|
|
|
_ = try self.addInst(.{
|
|
.tag = .dbg_line,
|
|
.data = .{
|
|
.dbg_line_column = .{
|
|
.line = dbg_stmt.line,
|
|
.column = dbg_stmt.column,
|
|
},
|
|
},
|
|
});
|
|
|
|
return self.finishAirBookkeeping();
|
|
}
|
|
|
|
fn airDbgVar(self: *Self, inst: Air.Inst.Index) !void {
|
|
const pl_op = self.air.instructions.items(.data)[inst].pl_op;
|
|
const name = self.air.nullTerminatedString(pl_op.payload);
|
|
const operand = pl_op.operand;
|
|
// TODO emit debug info for this variable
|
|
_ = name;
|
|
return self.finishAir(inst, .dead, .{ operand, .none, .none });
|
|
}
|
|
|
|
fn airDiv(self: *Self, inst: Air.Inst.Index) !void {
|
|
const bin_op = self.air.instructions.items(.data)[inst].bin_op;
|
|
const result: MCValue = if (self.liveness.isUnused(inst)) .dead else return self.fail("TODO implement div for {}", .{self.target.cpu.arch});
|
|
return self.finishAir(inst, result, .{ bin_op.lhs, bin_op.rhs, .none });
|
|
}
|
|
|
|
fn airIsErr(self: *Self, inst: Air.Inst.Index) !void {
|
|
const un_op = self.air.instructions.items(.data)[inst].un_op;
|
|
const result: MCValue = if (self.liveness.isUnused(inst)) .dead else result: {
|
|
const operand = try self.resolveInst(un_op);
|
|
const ty = self.air.typeOf(un_op);
|
|
break :result try self.isErr(ty, operand);
|
|
};
|
|
return self.finishAir(inst, result, .{ un_op, .none, .none });
|
|
}
|
|
|
|
fn airIsNonErr(self: *Self, inst: Air.Inst.Index) !void {
|
|
const un_op = self.air.instructions.items(.data)[inst].un_op;
|
|
const result: MCValue = if (self.liveness.isUnused(inst)) .dead else result: {
|
|
const operand = try self.resolveInst(un_op);
|
|
const ty = self.air.typeOf(un_op);
|
|
break :result try self.isNonErr(ty, operand);
|
|
};
|
|
return self.finishAir(inst, result, .{ un_op, .none, .none });
|
|
}
|
|
|
|
fn airRet(self: *Self, inst: Air.Inst.Index) !void {
|
|
const un_op = self.air.instructions.items(.data)[inst].un_op;
|
|
const operand = try self.resolveInst(un_op);
|
|
try self.ret(operand);
|
|
return self.finishAir(inst, .dead, .{ un_op, .none, .none });
|
|
}
|
|
|
|
fn airRetLoad(self: *Self, inst: Air.Inst.Index) !void {
|
|
const un_op = self.air.instructions.items(.data)[inst].un_op;
|
|
const ptr = try self.resolveInst(un_op);
|
|
_ = ptr;
|
|
return self.fail("TODO implement airRetLoad for {}", .{self.target.cpu.arch});
|
|
//return self.finishAir(inst, .dead, .{ un_op, .none, .none });
|
|
}
|
|
|
|
fn airRetPtr(self: *Self, inst: Air.Inst.Index) !void {
|
|
const stack_offset = try self.allocMemPtr(inst);
|
|
return self.finishAir(inst, .{ .ptr_stack_offset = stack_offset }, .{ .none, .none, .none });
|
|
}
|
|
|
|
fn airStore(self: *Self, inst: Air.Inst.Index) !void {
|
|
_ = self;
|
|
_ = inst;
|
|
|
|
return self.fail("TODO implement store for {}", .{self.target.cpu.arch});
|
|
}
|
|
|
|
fn airSwitch(self: *Self, inst: Air.Inst.Index) !void {
|
|
_ = self;
|
|
_ = inst;
|
|
|
|
return self.fail("TODO implement switch for {}", .{self.target.cpu.arch});
|
|
}
|
|
|
|
// Common helper functions
|
|
|
|
/// Adds a Type to the .debug_info at the current position. The bytes will be populated later,
|
|
/// after codegen for this symbol is done.
|
|
fn addDbgInfoTypeReloc(self: *Self, ty: Type) !void {
|
|
switch (self.debug_output) {
|
|
.dwarf => |dw| {
|
|
assert(ty.hasRuntimeBits());
|
|
const dbg_info = &dw.dbg_info;
|
|
const index = dbg_info.items.len;
|
|
try dbg_info.resize(index + 4); // DW.AT.type, DW.FORM.ref4
|
|
const mod = self.bin_file.options.module.?;
|
|
const atom = switch (self.bin_file.tag) {
|
|
.elf => &mod.declPtr(self.mod_fn.owner_decl).link.elf.dbg_info_atom,
|
|
else => unreachable,
|
|
};
|
|
try dw.addTypeReloc(atom, ty, @intCast(u32, index), null);
|
|
},
|
|
else => {},
|
|
}
|
|
}
|
|
|
|
fn addInst(self: *Self, inst: Mir.Inst) error{OutOfMemory}!Mir.Inst.Index {
|
|
const gpa = self.gpa;
|
|
try self.mir_instructions.ensureUnusedCapacity(gpa, 1);
|
|
const result_index = @intCast(Air.Inst.Index, self.mir_instructions.len);
|
|
self.mir_instructions.appendAssumeCapacity(inst);
|
|
return result_index;
|
|
}
|
|
|
|
fn allocMem(self: *Self, inst: Air.Inst.Index, abi_size: u32, abi_align: u32) !u32 {
|
|
if (abi_align > self.stack_align)
|
|
self.stack_align = abi_align;
|
|
// TODO find a free slot instead of always appending
|
|
const offset = mem.alignForwardGeneric(u32, self.next_stack_offset, abi_align);
|
|
self.next_stack_offset = offset + abi_size;
|
|
if (self.next_stack_offset > self.max_end_stack)
|
|
self.max_end_stack = self.next_stack_offset;
|
|
try self.stack.putNoClobber(self.gpa, offset, .{
|
|
.inst = inst,
|
|
.size = abi_size,
|
|
});
|
|
return offset;
|
|
}
|
|
|
|
/// Use a pointer instruction as the basis for allocating stack memory.
|
|
fn allocMemPtr(self: *Self, inst: Air.Inst.Index) !u32 {
|
|
const elem_ty = self.air.typeOfIndex(inst).elemType();
|
|
|
|
if (!elem_ty.hasRuntimeBits()) {
|
|
// As this stack item will never be dereferenced at runtime,
|
|
// return the stack offset 0. Stack offset 0 will be where all
|
|
// zero-sized stack allocations live as non-zero-sized
|
|
// allocations will always have an offset > 0.
|
|
return @as(u32, 0);
|
|
}
|
|
|
|
const abi_size = math.cast(u32, elem_ty.abiSize(self.target.*)) catch {
|
|
const mod = self.bin_file.options.module.?;
|
|
return self.fail("type '{}' too big to fit into stack frame", .{elem_ty.fmt(mod)});
|
|
};
|
|
// TODO swap this for inst.ty.ptrAlign
|
|
const abi_align = elem_ty.abiAlignment(self.target.*);
|
|
return self.allocMem(inst, abi_size, abi_align);
|
|
}
|
|
|
|
fn allocRegOrMem(self: *Self, inst: Air.Inst.Index, reg_ok: bool) !MCValue {
|
|
const elem_ty = self.air.typeOfIndex(inst);
|
|
const abi_size = math.cast(u32, elem_ty.abiSize(self.target.*)) catch {
|
|
const mod = self.bin_file.options.module.?;
|
|
return self.fail("type '{}' too big to fit into stack frame", .{elem_ty.fmt(mod)});
|
|
};
|
|
const abi_align = elem_ty.abiAlignment(self.target.*);
|
|
if (abi_align > self.stack_align)
|
|
self.stack_align = abi_align;
|
|
|
|
if (reg_ok) {
|
|
// Make sure the type can fit in a register before we try to allocate one.
|
|
if (abi_size <= 8) {
|
|
if (self.register_manager.tryAllocReg(inst)) |reg| {
|
|
return MCValue{ .register = reg };
|
|
}
|
|
}
|
|
}
|
|
const stack_offset = try self.allocMem(inst, abi_size, abi_align);
|
|
return MCValue{ .stack_offset = stack_offset };
|
|
}
|
|
|
|
/// Copies a value to a register without tracking the register. The register is not considered
|
|
/// allocated. A second call to `copyToTmpRegister` may return the same register.
|
|
/// This can have a side effect of spilling instructions to the stack to free up a register.
|
|
fn copyToTmpRegister(self: *Self, ty: Type, mcv: MCValue) !Register {
|
|
const reg = try self.register_manager.allocReg(null);
|
|
try self.genSetReg(ty, reg, mcv);
|
|
return reg;
|
|
}
|
|
|
|
fn ensureProcessDeathCapacity(self: *Self, additional_count: usize) !void {
|
|
const table = &self.branch_stack.items[self.branch_stack.items.len - 1].inst_table;
|
|
try table.ensureUnusedCapacity(self.gpa, additional_count);
|
|
}
|
|
|
|
fn fail(self: *Self, comptime format: []const u8, args: anytype) InnerError {
|
|
@setCold(true);
|
|
assert(self.err_msg == null);
|
|
self.err_msg = try ErrorMsg.create(self.bin_file.allocator, self.src_loc, format, args);
|
|
return error.CodegenFail;
|
|
}
|
|
|
|
/// Called when there are no operands, and the instruction is always unreferenced.
|
|
fn finishAirBookkeeping(self: *Self) void {
|
|
if (std.debug.runtime_safety) {
|
|
self.air_bookkeeping += 1;
|
|
}
|
|
}
|
|
|
|
fn finishAir(self: *Self, inst: Air.Inst.Index, result: MCValue, operands: [Liveness.bpi - 1]Air.Inst.Ref) void {
|
|
var tomb_bits = self.liveness.getTombBits(inst);
|
|
for (operands) |op| {
|
|
const dies = @truncate(u1, tomb_bits) != 0;
|
|
tomb_bits >>= 1;
|
|
if (!dies) continue;
|
|
const op_int = @enumToInt(op);
|
|
if (op_int < Air.Inst.Ref.typed_value_map.len) continue;
|
|
const op_index = @intCast(Air.Inst.Index, op_int - Air.Inst.Ref.typed_value_map.len);
|
|
self.processDeath(op_index);
|
|
}
|
|
const is_used = @truncate(u1, tomb_bits) == 0;
|
|
if (is_used) {
|
|
log.debug("%{d} => {}", .{ inst, result });
|
|
const branch = &self.branch_stack.items[self.branch_stack.items.len - 1];
|
|
branch.inst_table.putAssumeCapacityNoClobber(inst, result);
|
|
|
|
switch (result) {
|
|
.register => |reg| {
|
|
// In some cases (such as bitcast), an operand
|
|
// may be the same MCValue as the result. If
|
|
// that operand died and was a register, it
|
|
// was freed by processDeath. We have to
|
|
// "re-allocate" the register.
|
|
if (self.register_manager.isRegFree(reg)) {
|
|
self.register_manager.getRegAssumeFree(reg, inst);
|
|
}
|
|
},
|
|
else => {},
|
|
}
|
|
}
|
|
self.finishAirBookkeeping();
|
|
}
|
|
|
|
fn genArgDbgInfo(self: *Self, inst: Air.Inst.Index, mcv: MCValue, arg_index: u32) !void {
|
|
const ty = self.air.instructions.items(.data)[inst].ty;
|
|
const name = self.mod_fn.getParamName(arg_index);
|
|
const name_with_null = name.ptr[0 .. name.len + 1];
|
|
|
|
switch (mcv) {
|
|
.register => |reg| {
|
|
switch (self.debug_output) {
|
|
.dwarf => |dw| {
|
|
const dbg_info = &dw.dbg_info;
|
|
try dbg_info.ensureUnusedCapacity(3);
|
|
dbg_info.appendAssumeCapacity(@enumToInt(link.File.Dwarf.AbbrevKind.parameter));
|
|
dbg_info.appendSliceAssumeCapacity(&[2]u8{ // DW.AT.location, DW.FORM.exprloc
|
|
1, // ULEB128 dwarf expression length
|
|
reg.dwarfLocOp(),
|
|
});
|
|
try dbg_info.ensureUnusedCapacity(5 + name_with_null.len);
|
|
try self.addDbgInfoTypeReloc(ty); // DW.AT.type, DW.FORM.ref4
|
|
dbg_info.appendSliceAssumeCapacity(name_with_null); // DW.AT.name, DW.FORM.string
|
|
},
|
|
else => {},
|
|
}
|
|
},
|
|
.stack_offset => |offset| {
|
|
_ = offset;
|
|
switch (self.debug_output) {
|
|
.dwarf => {},
|
|
else => {},
|
|
}
|
|
},
|
|
else => {},
|
|
}
|
|
}
|
|
|
|
fn genLoad(self: *Self, value_reg: Register, addr_reg: Register, comptime off_type: type, off: off_type, abi_size: u64) !void {
|
|
assert(off_type == Register or off_type == i13);
|
|
|
|
const is_imm = (off_type == i13);
|
|
const rs2_or_imm = if (is_imm) .{ .imm = off } else .{ .rs2 = off };
|
|
|
|
switch (abi_size) {
|
|
1, 2, 4, 8 => {
|
|
const tag: Mir.Inst.Tag = switch (abi_size) {
|
|
1 => .ldub,
|
|
2 => .lduh,
|
|
4 => .lduw,
|
|
8 => .ldx,
|
|
else => unreachable, // unexpected abi size
|
|
};
|
|
|
|
_ = try self.addInst(.{
|
|
.tag = tag,
|
|
.data = .{
|
|
.arithmetic_3op = .{
|
|
.is_imm = is_imm,
|
|
.rd = value_reg,
|
|
.rs1 = addr_reg,
|
|
.rs2_or_imm = rs2_or_imm,
|
|
},
|
|
},
|
|
});
|
|
},
|
|
3, 5, 6, 7 => return self.fail("TODO: genLoad for more abi_sizes", .{}),
|
|
else => unreachable,
|
|
}
|
|
}
|
|
|
|
fn genSetReg(self: *Self, ty: Type, reg: Register, mcv: MCValue) InnerError!void {
|
|
switch (mcv) {
|
|
.dead => unreachable,
|
|
.unreach, .none => return, // Nothing to do.
|
|
.compare_flags_signed => return self.fail("TODO: genSetReg for compare_flags_signed", .{}),
|
|
.compare_flags_unsigned => return self.fail("TODO: genSetReg for compare_flags_unsigned", .{}),
|
|
.undef => {
|
|
if (!self.wantSafety())
|
|
return; // The already existing value will do just fine.
|
|
// Write the debug undefined value.
|
|
return self.genSetReg(ty, reg, .{ .immediate = 0xaaaaaaaaaaaaaaaa });
|
|
},
|
|
.ptr_stack_offset => |off| {
|
|
const simm13 = math.cast(u12, off) catch
|
|
return self.fail("TODO larger stack offsets", .{});
|
|
|
|
_ = try self.addInst(.{
|
|
.tag = .add,
|
|
.data = .{
|
|
.arithmetic_3op = .{
|
|
.is_imm = true,
|
|
.rd = reg,
|
|
.rs1 = .sp,
|
|
.rs2_or_imm = .{ .imm = simm13 },
|
|
},
|
|
},
|
|
});
|
|
},
|
|
.immediate => |x| {
|
|
if (x <= math.maxInt(u12)) {
|
|
_ = try self.addInst(.{
|
|
.tag = .@"or",
|
|
.data = .{
|
|
.arithmetic_3op = .{
|
|
.is_imm = true,
|
|
.rd = reg,
|
|
.rs1 = .g0,
|
|
.rs2_or_imm = .{ .imm = @truncate(u12, x) },
|
|
},
|
|
},
|
|
});
|
|
} else if (x <= math.maxInt(u32)) {
|
|
_ = try self.addInst(.{
|
|
.tag = .sethi,
|
|
.data = .{
|
|
.sethi = .{
|
|
.rd = reg,
|
|
.imm = @truncate(u22, x >> 10),
|
|
},
|
|
},
|
|
});
|
|
|
|
_ = try self.addInst(.{
|
|
.tag = .@"or",
|
|
.data = .{
|
|
.arithmetic_3op = .{
|
|
.is_imm = true,
|
|
.rd = reg,
|
|
.rs1 = reg,
|
|
.rs2_or_imm = .{ .imm = @truncate(u10, x) },
|
|
},
|
|
},
|
|
});
|
|
} else if (x <= math.maxInt(u44)) {
|
|
try self.genSetReg(ty, reg, .{ .immediate = @truncate(u32, x >> 12) });
|
|
|
|
_ = try self.addInst(.{
|
|
.tag = .sllx,
|
|
.data = .{
|
|
.shift = .{
|
|
.is_imm = true,
|
|
.width = .shift64,
|
|
.rd = reg,
|
|
.rs1 = reg,
|
|
.rs2_or_imm = .{ .imm = 12 },
|
|
},
|
|
},
|
|
});
|
|
|
|
_ = try self.addInst(.{
|
|
.tag = .@"or",
|
|
.data = .{
|
|
.arithmetic_3op = .{
|
|
.is_imm = true,
|
|
.rd = reg,
|
|
.rs1 = reg,
|
|
.rs2_or_imm = .{ .imm = @truncate(u12, x) },
|
|
},
|
|
},
|
|
});
|
|
} else {
|
|
// Need to allocate a temporary register to load 64-bit immediates.
|
|
const tmp_reg = try self.register_manager.allocReg(null);
|
|
|
|
try self.genSetReg(ty, tmp_reg, .{ .immediate = @truncate(u32, x) });
|
|
try self.genSetReg(ty, reg, .{ .immediate = @truncate(u32, x >> 32) });
|
|
|
|
_ = try self.addInst(.{
|
|
.tag = .sllx,
|
|
.data = .{
|
|
.shift = .{
|
|
.is_imm = true,
|
|
.width = .shift64,
|
|
.rd = reg,
|
|
.rs1 = reg,
|
|
.rs2_or_imm = .{ .imm = 32 },
|
|
},
|
|
},
|
|
});
|
|
|
|
_ = try self.addInst(.{
|
|
.tag = .@"or",
|
|
.data = .{
|
|
.arithmetic_3op = .{
|
|
.is_imm = false,
|
|
.rd = reg,
|
|
.rs1 = reg,
|
|
.rs2_or_imm = .{ .rs2 = tmp_reg },
|
|
},
|
|
},
|
|
});
|
|
}
|
|
},
|
|
.register => |src_reg| {
|
|
// If the registers are the same, nothing to do.
|
|
if (src_reg.id() == reg.id())
|
|
return;
|
|
|
|
// or %g0, src, dst (aka mov src, dst)
|
|
_ = try self.addInst(.{
|
|
.tag = .@"or",
|
|
.data = .{
|
|
.arithmetic_3op = .{
|
|
.is_imm = false,
|
|
.rd = reg,
|
|
.rs1 = .g0,
|
|
.rs2_or_imm = .{ .rs2 = src_reg },
|
|
},
|
|
},
|
|
});
|
|
},
|
|
.memory => |addr| {
|
|
// The value is in memory at a hard-coded address.
|
|
// If the type is a pointer, it means the pointer address is at this memory location.
|
|
try self.genSetReg(ty, reg, .{ .immediate = addr });
|
|
try self.genLoad(reg, reg, i13, 0, ty.abiSize(self.target.*));
|
|
},
|
|
.stack_offset => |off| {
|
|
const real_offset = off + abi.stack_bias + abi.stack_save_area;
|
|
const simm13 = math.cast(i13, real_offset) catch
|
|
return self.fail("TODO larger stack offsets", .{});
|
|
try self.genLoad(reg, .sp, i13, simm13, ty.abiSize(self.target.*));
|
|
},
|
|
}
|
|
}
|
|
|
|
fn genSetStack(self: *Self, ty: Type, stack_offset: u32, mcv: MCValue) InnerError!void {
|
|
const abi_size = ty.abiSize(self.target.*);
|
|
switch (mcv) {
|
|
.dead => unreachable,
|
|
.unreach, .none => return, // Nothing to do.
|
|
.undef => {
|
|
if (!self.wantSafety())
|
|
return; // The already existing value will do just fine.
|
|
// TODO Upgrade this to a memset call when we have that available.
|
|
switch (ty.abiSize(self.target.*)) {
|
|
1 => return self.genSetStack(ty, stack_offset, .{ .immediate = 0xaa }),
|
|
2 => return self.genSetStack(ty, stack_offset, .{ .immediate = 0xaaaa }),
|
|
4 => return self.genSetStack(ty, stack_offset, .{ .immediate = 0xaaaaaaaa }),
|
|
8 => return self.genSetStack(ty, stack_offset, .{ .immediate = 0xaaaaaaaaaaaaaaaa }),
|
|
else => return self.fail("TODO implement memset", .{}),
|
|
}
|
|
},
|
|
.compare_flags_unsigned,
|
|
.compare_flags_signed,
|
|
.immediate,
|
|
.ptr_stack_offset,
|
|
=> {
|
|
const reg = try self.copyToTmpRegister(ty, mcv);
|
|
return self.genSetStack(ty, stack_offset, MCValue{ .register = reg });
|
|
},
|
|
.register => |reg| {
|
|
const real_offset = stack_offset + abi.stack_bias + abi.stack_save_area;
|
|
const simm13 = math.cast(i13, real_offset) catch
|
|
return self.fail("TODO larger stack offsets", .{});
|
|
return self.genStore(reg, .sp, i13, simm13, abi_size);
|
|
},
|
|
.memory, .stack_offset => return self.fail("TODO implement memcpy", .{}),
|
|
}
|
|
}
|
|
|
|
fn genStore(self: *Self, value_reg: Register, addr_reg: Register, comptime off_type: type, off: off_type, abi_size: u64) !void {
|
|
assert(off_type == Register or off_type == i13);
|
|
|
|
const is_imm = (off_type == i13);
|
|
const rs2_or_imm = if (is_imm) .{ .imm = off } else .{ .rs2 = off };
|
|
|
|
switch (abi_size) {
|
|
1, 2, 4, 8 => {
|
|
const tag: Mir.Inst.Tag = switch (abi_size) {
|
|
1 => .stb,
|
|
2 => .sth,
|
|
4 => .stw,
|
|
8 => .stx,
|
|
else => unreachable, // unexpected abi size
|
|
};
|
|
|
|
_ = try self.addInst(.{
|
|
.tag = tag,
|
|
.data = .{
|
|
.arithmetic_3op = .{
|
|
.is_imm = is_imm,
|
|
.rd = value_reg,
|
|
.rs1 = addr_reg,
|
|
.rs2_or_imm = rs2_or_imm,
|
|
},
|
|
},
|
|
});
|
|
},
|
|
3, 5, 6, 7 => return self.fail("TODO: genLoad for more abi_sizes", .{}),
|
|
else => unreachable,
|
|
}
|
|
}
|
|
|
|
fn genTypedValue(self: *Self, typed_value: TypedValue) InnerError!MCValue {
|
|
if (typed_value.val.isUndef())
|
|
return MCValue{ .undef = {} };
|
|
|
|
if (typed_value.val.castTag(.decl_ref)) |payload| {
|
|
return self.lowerDeclRef(typed_value, payload.data);
|
|
}
|
|
if (typed_value.val.castTag(.decl_ref_mut)) |payload| {
|
|
return self.lowerDeclRef(typed_value, payload.data.decl_index);
|
|
}
|
|
const target = self.target.*;
|
|
|
|
switch (typed_value.ty.zigTypeTag()) {
|
|
.Int => {
|
|
const info = typed_value.ty.intInfo(self.target.*);
|
|
if (info.bits <= 64) {
|
|
const unsigned = switch (info.signedness) {
|
|
.signed => blk: {
|
|
const signed = typed_value.val.toSignedInt();
|
|
break :blk @bitCast(u64, signed);
|
|
},
|
|
.unsigned => typed_value.val.toUnsignedInt(target),
|
|
};
|
|
|
|
return MCValue{ .immediate = unsigned };
|
|
} else {
|
|
return self.fail("TODO implement int genTypedValue of > 64 bits", .{});
|
|
}
|
|
},
|
|
.ComptimeInt => unreachable, // semantic analysis prevents this
|
|
.ComptimeFloat => unreachable, // semantic analysis prevents this
|
|
else => return self.fail("TODO implement const of type '{}'", .{typed_value.ty.fmtDebug()}),
|
|
}
|
|
}
|
|
|
|
fn getResolvedInstValue(self: *Self, inst: Air.Inst.Index) MCValue {
|
|
// Treat each stack item as a "layer" on top of the previous one.
|
|
var i: usize = self.branch_stack.items.len;
|
|
while (true) {
|
|
i -= 1;
|
|
if (self.branch_stack.items[i].inst_table.get(inst)) |mcv| {
|
|
assert(mcv != .dead);
|
|
return mcv;
|
|
}
|
|
}
|
|
}
|
|
|
|
fn isErr(self: *Self, ty: Type, operand: MCValue) !MCValue {
|
|
const error_type = ty.errorUnionSet();
|
|
const payload_type = ty.errorUnionPayload();
|
|
|
|
if (!error_type.hasRuntimeBits()) {
|
|
return MCValue{ .immediate = 0 }; // always false
|
|
} else if (!payload_type.hasRuntimeBits()) {
|
|
if (error_type.abiSize(self.target.*) <= 8) {
|
|
const reg_mcv: MCValue = switch (operand) {
|
|
.register => operand,
|
|
else => .{ .register = try self.copyToTmpRegister(error_type, operand) },
|
|
};
|
|
|
|
_ = try self.addInst(.{
|
|
.tag = .subcc,
|
|
.data = .{ .arithmetic_3op = .{
|
|
.is_imm = true,
|
|
.rs1 = reg_mcv.register,
|
|
.rs2_or_imm = .{ .imm = 0 },
|
|
.rd = .g0,
|
|
} },
|
|
});
|
|
|
|
return MCValue{ .compare_flags_unsigned = .gt };
|
|
} else {
|
|
return self.fail("TODO isErr for errors with size > 8", .{});
|
|
}
|
|
} else {
|
|
return self.fail("TODO isErr for non-empty payloads", .{});
|
|
}
|
|
}
|
|
|
|
fn isNonErr(self: *Self, ty: Type, operand: MCValue) !MCValue {
|
|
// Call isErr, then negate the result.
|
|
const is_err_result = try self.isErr(ty, operand);
|
|
switch (is_err_result) {
|
|
.compare_flags_unsigned => |op| {
|
|
assert(op == .gt);
|
|
return MCValue{ .compare_flags_unsigned = .lte };
|
|
},
|
|
.immediate => |imm| {
|
|
assert(imm == 0);
|
|
return MCValue{ .immediate = 1 };
|
|
},
|
|
else => unreachable,
|
|
}
|
|
}
|
|
|
|
fn iterateBigTomb(self: *Self, inst: Air.Inst.Index, operand_count: usize) !BigTomb {
|
|
try self.ensureProcessDeathCapacity(operand_count + 1);
|
|
return BigTomb{
|
|
.function = self,
|
|
.inst = inst,
|
|
.tomb_bits = self.liveness.getTombBits(inst),
|
|
.big_tomb_bits = self.liveness.special.get(inst) orelse 0,
|
|
.bit_index = 0,
|
|
};
|
|
}
|
|
|
|
fn lowerDeclRef(self: *Self, tv: TypedValue, decl_index: Module.Decl.Index) InnerError!MCValue {
|
|
const ptr_bits = self.target.cpu.arch.ptrBitWidth();
|
|
const ptr_bytes: u64 = @divExact(ptr_bits, 8);
|
|
|
|
// TODO this feels clunky. Perhaps we should check for it in `genTypedValue`?
|
|
if (tv.ty.zigTypeTag() == .Pointer) blk: {
|
|
if (tv.ty.castPtrToFn()) |_| break :blk;
|
|
if (!tv.ty.elemType2().hasRuntimeBits()) {
|
|
return MCValue.none;
|
|
}
|
|
}
|
|
|
|
const mod = self.bin_file.options.module.?;
|
|
const decl = mod.declPtr(decl_index);
|
|
|
|
mod.markDeclAlive(decl);
|
|
if (self.bin_file.cast(link.File.Elf)) |elf_file| {
|
|
const got = &elf_file.program_headers.items[elf_file.phdr_got_index.?];
|
|
const got_addr = got.p_vaddr + decl.link.elf.offset_table_index * ptr_bytes;
|
|
return MCValue{ .memory = got_addr };
|
|
} else {
|
|
return self.fail("TODO codegen non-ELF const Decl pointer", .{});
|
|
}
|
|
}
|
|
|
|
fn parseRegName(name: []const u8) ?Register {
|
|
if (@hasDecl(Register, "parseRegName")) {
|
|
return Register.parseRegName(name);
|
|
}
|
|
return std.meta.stringToEnum(Register, name);
|
|
}
|
|
|
|
fn performReloc(self: *Self, inst: Mir.Inst.Index) !void {
|
|
const tag = self.mir_instructions.items(.tag)[inst];
|
|
switch (tag) {
|
|
.bpcc => self.mir_instructions.items(.data)[inst].branch_predict_int.inst = @intCast(Mir.Inst.Index, self.mir_instructions.len),
|
|
else => unreachable,
|
|
}
|
|
}
|
|
|
|
/// Asserts there is already capacity to insert into top branch inst_table.
|
|
fn processDeath(self: *Self, inst: Air.Inst.Index) void {
|
|
const air_tags = self.air.instructions.items(.tag);
|
|
if (air_tags[inst] == .constant) return; // Constants are immortal.
|
|
// When editing this function, note that the logic must synchronize with `reuseOperand`.
|
|
const prev_value = self.getResolvedInstValue(inst);
|
|
const branch = &self.branch_stack.items[self.branch_stack.items.len - 1];
|
|
branch.inst_table.putAssumeCapacity(inst, .dead);
|
|
switch (prev_value) {
|
|
.register => |reg| {
|
|
self.register_manager.freeReg(reg);
|
|
},
|
|
else => {}, // TODO process stack allocation death
|
|
}
|
|
}
|
|
|
|
/// Caller must call `CallMCValues.deinit`.
|
|
fn resolveCallingConventionValues(self: *Self, fn_ty: Type, role: RegisterView) !CallMCValues {
|
|
const cc = fn_ty.fnCallingConvention();
|
|
const param_types = try self.gpa.alloc(Type, fn_ty.fnParamLen());
|
|
defer self.gpa.free(param_types);
|
|
fn_ty.fnParamTypes(param_types);
|
|
var result: CallMCValues = .{
|
|
.args = try self.gpa.alloc(MCValue, param_types.len),
|
|
// These undefined values must be populated before returning from this function.
|
|
.return_value = undefined,
|
|
.stack_byte_count = undefined,
|
|
.stack_align = undefined,
|
|
};
|
|
errdefer self.gpa.free(result.args);
|
|
|
|
const ret_ty = fn_ty.fnReturnType();
|
|
|
|
switch (cc) {
|
|
.Naked => {
|
|
assert(result.args.len == 0);
|
|
result.return_value = .{ .unreach = {} };
|
|
result.stack_byte_count = 0;
|
|
result.stack_align = 1;
|
|
return result;
|
|
},
|
|
.Unspecified, .C => {
|
|
// SPARC Compliance Definition 2.4.1, Chapter 3
|
|
// Low-Level System Information (64-bit psABI) - Function Calling Sequence
|
|
|
|
var next_register: usize = 0;
|
|
var next_stack_offset: u32 = 0;
|
|
|
|
// The caller puts the argument in %o0-%o5, which becomes %i0-%i5 inside the callee.
|
|
const argument_registers = switch (role) {
|
|
.caller => abi.c_abi_int_param_regs_caller_view,
|
|
.callee => abi.c_abi_int_param_regs_callee_view,
|
|
};
|
|
|
|
for (param_types) |ty, i| {
|
|
const param_size = @intCast(u32, ty.abiSize(self.target.*));
|
|
if (param_size <= 8) {
|
|
if (next_register < argument_registers.len) {
|
|
result.args[i] = .{ .register = argument_registers[next_register] };
|
|
next_register += 1;
|
|
} else {
|
|
result.args[i] = .{ .stack_offset = next_stack_offset };
|
|
next_register += next_stack_offset;
|
|
}
|
|
} else if (param_size <= 16) {
|
|
if (next_register < argument_registers.len - 1) {
|
|
return self.fail("TODO MCValues with 2 registers", .{});
|
|
} else if (next_register < argument_registers.len) {
|
|
return self.fail("TODO MCValues split register + stack", .{});
|
|
} else {
|
|
result.args[i] = .{ .stack_offset = next_stack_offset };
|
|
next_register += next_stack_offset;
|
|
}
|
|
} else {
|
|
result.args[i] = .{ .stack_offset = next_stack_offset };
|
|
next_register += next_stack_offset;
|
|
}
|
|
}
|
|
|
|
result.stack_byte_count = next_stack_offset;
|
|
result.stack_align = 16;
|
|
|
|
if (ret_ty.zigTypeTag() == .NoReturn) {
|
|
result.return_value = .{ .unreach = {} };
|
|
} else if (!ret_ty.hasRuntimeBits()) {
|
|
result.return_value = .{ .none = {} };
|
|
} else {
|
|
const ret_ty_size = @intCast(u32, ret_ty.abiSize(self.target.*));
|
|
// The callee puts the return values in %i0-%i3, which becomes %o0-%o3 inside the caller.
|
|
if (ret_ty_size <= 8) {
|
|
result.return_value = switch (role) {
|
|
.caller => .{ .register = abi.c_abi_int_return_regs_caller_view[0] },
|
|
.callee => .{ .register = abi.c_abi_int_return_regs_callee_view[0] },
|
|
};
|
|
} else {
|
|
return self.fail("TODO support more return values for sparc64", .{});
|
|
}
|
|
}
|
|
},
|
|
else => return self.fail("TODO implement function parameters for {} on sparc64", .{cc}),
|
|
}
|
|
|
|
return result;
|
|
}
|
|
|
|
fn resolveInst(self: *Self, inst: Air.Inst.Ref) InnerError!MCValue {
|
|
// First section of indexes correspond to a set number of constant values.
|
|
const ref_int = @enumToInt(inst);
|
|
if (ref_int < Air.Inst.Ref.typed_value_map.len) {
|
|
const tv = Air.Inst.Ref.typed_value_map[ref_int];
|
|
if (!tv.ty.hasRuntimeBits()) {
|
|
return MCValue{ .none = {} };
|
|
}
|
|
return self.genTypedValue(tv);
|
|
}
|
|
|
|
// If the type has no codegen bits, no need to store it.
|
|
const inst_ty = self.air.typeOf(inst);
|
|
if (!inst_ty.hasRuntimeBits())
|
|
return MCValue{ .none = {} };
|
|
|
|
const inst_index = @intCast(Air.Inst.Index, ref_int - Air.Inst.Ref.typed_value_map.len);
|
|
switch (self.air.instructions.items(.tag)[inst_index]) {
|
|
.constant => {
|
|
// Constants have static lifetimes, so they are always memoized in the outer most table.
|
|
const branch = &self.branch_stack.items[0];
|
|
const gop = try branch.inst_table.getOrPut(self.gpa, inst_index);
|
|
if (!gop.found_existing) {
|
|
const ty_pl = self.air.instructions.items(.data)[inst_index].ty_pl;
|
|
gop.value_ptr.* = try self.genTypedValue(.{
|
|
.ty = inst_ty,
|
|
.val = self.air.values[ty_pl.payload],
|
|
});
|
|
}
|
|
return gop.value_ptr.*;
|
|
},
|
|
.const_ty => unreachable,
|
|
else => return self.getResolvedInstValue(inst_index),
|
|
}
|
|
}
|
|
|
|
fn ret(self: *Self, mcv: MCValue) !void {
|
|
const ret_ty = self.fn_type.fnReturnType();
|
|
try self.setRegOrMem(ret_ty, self.ret_mcv, mcv);
|
|
|
|
// Just add space for a branch instruction, patch this later
|
|
const index = try self.addInst(.{
|
|
.tag = .nop,
|
|
.data = .{ .nop = {} },
|
|
});
|
|
|
|
// Reserve space for the delay slot too
|
|
// TODO find out a way to fill this
|
|
_ = try self.addInst(.{
|
|
.tag = .nop,
|
|
.data = .{ .nop = {} },
|
|
});
|
|
try self.exitlude_jump_relocs.append(self.gpa, index);
|
|
}
|
|
|
|
fn reuseOperand(self: *Self, inst: Air.Inst.Index, operand: Air.Inst.Ref, op_index: Liveness.OperandInt, mcv: MCValue) bool {
|
|
if (!self.liveness.operandDies(inst, op_index))
|
|
return false;
|
|
|
|
switch (mcv) {
|
|
.register => |reg| {
|
|
// If it's in the registers table, need to associate the register with the
|
|
// new instruction.
|
|
if (RegisterManager.indexOfRegIntoTracked(reg)) |index| {
|
|
if (!self.register_manager.isRegFree(reg)) {
|
|
self.register_manager.registers[index] = inst;
|
|
}
|
|
}
|
|
log.debug("%{d} => {} (reused)", .{ inst, reg });
|
|
},
|
|
.stack_offset => |off| {
|
|
log.debug("%{d} => stack offset {d} (reused)", .{ inst, off });
|
|
},
|
|
else => return false,
|
|
}
|
|
|
|
// Prevent the operand deaths processing code from deallocating it.
|
|
self.liveness.clearOperandDeath(inst, op_index);
|
|
|
|
// That makes us responsible for doing the rest of the stuff that processDeath would have done.
|
|
const branch = &self.branch_stack.items[self.branch_stack.items.len - 1];
|
|
branch.inst_table.putAssumeCapacity(Air.refToIndex(operand).?, .dead);
|
|
|
|
return true;
|
|
}
|
|
|
|
/// Sets the value without any modifications to register allocation metadata or stack allocation metadata.
|
|
fn setRegOrMem(self: *Self, ty: Type, loc: MCValue, val: MCValue) !void {
|
|
switch (loc) {
|
|
.none => return,
|
|
.register => |reg| return self.genSetReg(ty, reg, val),
|
|
.stack_offset => |off| return self.genSetStack(ty, off, val),
|
|
.memory => {
|
|
return self.fail("TODO implement setRegOrMem for memory", .{});
|
|
},
|
|
else => unreachable,
|
|
}
|
|
}
|
|
|
|
pub fn spillInstruction(self: *Self, reg: Register, inst: Air.Inst.Index) !void {
|
|
const stack_mcv = try self.allocRegOrMem(inst, false);
|
|
log.debug("spilling {d} to stack mcv {any}", .{ inst, stack_mcv });
|
|
const reg_mcv = self.getResolvedInstValue(inst);
|
|
assert(reg == reg_mcv.register);
|
|
const branch = &self.branch_stack.items[self.branch_stack.items.len - 1];
|
|
try branch.inst_table.put(self.gpa, inst, stack_mcv);
|
|
try self.genSetStack(self.air.typeOfIndex(inst), stack_mcv.stack_offset, reg_mcv);
|
|
}
|
|
|
|
/// TODO support scope overrides. Also note this logic is duplicated with `Module.wantSafety`.
|
|
fn wantSafety(self: *Self) bool {
|
|
return switch (self.bin_file.options.optimize_mode) {
|
|
.Debug => true,
|
|
.ReleaseSafe => true,
|
|
.ReleaseFast => false,
|
|
.ReleaseSmall => false,
|
|
};
|
|
}
|