David Rubin a1f6a8ef90 riscv: airAsm rewrite ...

with this rewrite we can call functions inside of
inline assembly, enabling us to use the default start.zig logic

all that's left is to implement lr/sc loops for atomically manipulating
1 and 2 byte values, after which we can use the segfault handler logic.

2024-07-26 04:19:55 -07:00

..

compiler

riscv: clean up and unify encoding logic

2024-07-26 04:19:13 -07:00

compiler_rt

compiler_rt: disable test for stage2_wasm

2024-07-23 17:10:36 +02:00

docs

autodoc: Preserve whitespace in inline code spans

2024-07-23 10:02:54 -07:00

include

update C language headers to LLVM 18

2024-05-08 19:37:28 -07:00

init

add a missing comment in build.zig.zon

2024-07-15 10:47:36 -07:00

libc

glibc headers: arc4random* functions added in glibc 2.36

2024-07-03 02:57:24 -04:00

libcxx

update libcxx and libcxxabi to llvm 18.1.6

2024-05-20 16:12:36 -04:00

libcxxabi

update libcxx and libcxxabi to llvm 18.1.6

2024-05-20 16:12:36 -04:00

libunwind

libunwind: update to LLVM 18

2024-05-08 19:37:29 -07:00

std

riscv: airAsm rewrite

2024-07-26 04:19:55 -07:00

tsan

tsan: update rtl files to LLVM 17.0.6

2024-01-10 01:00:37 -07:00

c.zig

std.builtin: make link mode fields lowercase

2024-03-11 07:09:10 -07:00

compiler_rt.zig

stage2-wasm: bit_reverse

2024-06-16 11:53:33 +02:00

fuzzer.zig

fuzzer: use the cmp values

2024-07-25 18:52:21 -07:00

zig.h

zig.h: expand zig_msvc_atomic_load_ into version for relaxed, acquire, and seq_cst

2024-07-13 19:45:45 -04:00