240d0b68f6
Part of #19063. Primarily, this moves Aro from deps/ to lib/compiler/ so that it can be lazily compiled from source. src/aro_translate_c.zig is moved to lib/compiler/aro_translate_c.zig and some of Zig CLI logic moved to a main() function there. aro_translate_c.zig becomes the "common" import for clang-based translate-c. Not all of the compiler was able to be detangled from Aro, however, so it still, for now, remains being compiled with the main compiler sources due to the clang-based translate-c depending on it. Once aro-based translate-c achieves feature parity with the clang-based translate-c implementation, the clang-based one can be removed from Zig. Aro made it unnecessarily difficult to depend on with these .def files and all these Zig module requirements. I looked at the .def files and made these observations: - The canonical source is llvm .def files. - Therefore there is an update process to sync with llvm that involves regenerating the .def files in Aro. - Therefore you might as well just regenerate the .zig files directly and check those into Aro. - Also with a small amount of tinkering, the file size on disk of these generated .zig files can be made many times smaller, without compromising type safety in the usage of the data. This would make things much easier on Zig as downstream project, particularly we could remove those pesky stubs when bootstrapping. I have gone ahead with these changes since they unblock me and I will have a chat with Vexu to see what he thinks.
672 lines
30 KiB
Zig
Vendored
672 lines
30 KiB
Zig
Vendored
//! Record layout code adapted from https://github.com/mahkoh/repr-c
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//! Licensed under MIT license: https://github.com/mahkoh/repr-c/tree/master/repc/facade
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const std = @import("std");
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const Type = @import("Type.zig");
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const Attribute = @import("Attribute.zig");
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const Compilation = @import("Compilation.zig");
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const Parser = @import("Parser.zig");
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const Record = Type.Record;
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const Field = Record.Field;
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const TypeLayout = Type.TypeLayout;
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const FieldLayout = Type.FieldLayout;
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const target_util = @import("target.zig");
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const BITS_PER_BYTE = 8;
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const OngoingBitfield = struct {
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size_bits: u64,
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unused_size_bits: u64,
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};
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const SysVContext = struct {
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/// Does the record have an __attribute__((packed)) annotation.
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attr_packed: bool,
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/// The value of #pragma pack(N) at the type level if any.
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max_field_align_bits: ?u64,
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/// The alignment of this record.
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aligned_bits: u32,
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is_union: bool,
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/// The size of the record. This might not be a multiple of 8 if the record contains bit-fields.
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/// For structs, this is also the offset of the first bit after the last field.
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size_bits: u64,
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/// non-null if the previous field was a non-zero-sized bit-field. Only used by MinGW.
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ongoing_bitfield: ?OngoingBitfield,
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comp: *const Compilation,
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fn init(ty: Type, comp: *const Compilation, pragma_pack: ?u8) SysVContext {
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var pack_value: ?u64 = null;
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if (pragma_pack) |pak| {
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pack_value = pak * BITS_PER_BYTE;
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}
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var req_align: u29 = BITS_PER_BYTE;
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if (ty.requestedAlignment(comp)) |aln| {
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req_align = aln * BITS_PER_BYTE;
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}
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return SysVContext{
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.attr_packed = ty.hasAttribute(.@"packed"),
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.max_field_align_bits = pack_value,
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.aligned_bits = req_align,
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.is_union = ty.is(.@"union"),
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.size_bits = 0,
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.comp = comp,
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.ongoing_bitfield = null,
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};
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}
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fn layoutFields(self: *SysVContext, rec: *const Record) void {
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for (rec.fields, 0..) |*fld, fld_indx| {
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if (fld.ty.specifier == .invalid) continue;
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const type_layout = computeLayout(fld.ty, self.comp);
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var field_attrs: ?[]const Attribute = null;
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if (rec.field_attributes) |attrs| {
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field_attrs = attrs[fld_indx];
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}
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if (self.comp.target.isMinGW()) {
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fld.layout = self.layoutMinGWField(fld, field_attrs, type_layout);
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} else {
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if (fld.isRegularField()) {
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fld.layout = self.layoutRegularField(field_attrs, type_layout);
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} else {
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fld.layout = self.layoutBitField(field_attrs, type_layout, fld.isNamed(), fld.specifiedBitWidth());
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}
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}
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}
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}
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/// On MinGW the alignment of the field is calculated in the usual way except that the alignment of
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/// the underlying type is ignored in three cases
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/// - the field is packed
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/// - the field is a bit-field and the previous field was a non-zero-sized bit-field with the same type size
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/// - the field is a zero-sized bit-field and the previous field was not a non-zero-sized bit-field
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/// See test case 0068.
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fn ignoreTypeAlignment(is_attr_packed: bool, bit_width: ?u32, ongoing_bitfield: ?OngoingBitfield, fld_layout: TypeLayout) bool {
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if (is_attr_packed) return true;
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if (bit_width) |width| {
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if (ongoing_bitfield) |ongoing| {
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if (ongoing.size_bits == fld_layout.size_bits) return true;
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} else {
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if (width == 0) return true;
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}
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}
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return false;
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}
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fn layoutMinGWField(
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self: *SysVContext,
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field: *const Field,
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field_attrs: ?[]const Attribute,
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field_layout: TypeLayout,
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) FieldLayout {
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const annotation_alignment_bits = BITS_PER_BYTE * (Type.annotationAlignment(self.comp, field_attrs) orelse 1);
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const is_attr_packed = self.attr_packed or isPacked(field_attrs);
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const ignore_type_alignment = ignoreTypeAlignment(is_attr_packed, field.bit_width, self.ongoing_bitfield, field_layout);
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var field_alignment_bits: u64 = field_layout.field_alignment_bits;
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if (ignore_type_alignment) {
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field_alignment_bits = BITS_PER_BYTE;
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}
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field_alignment_bits = @max(field_alignment_bits, annotation_alignment_bits);
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if (self.max_field_align_bits) |bits| {
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field_alignment_bits = @min(field_alignment_bits, bits);
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}
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// The field affects the record alignment in one of three cases
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// - the field is a regular field
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// - the field is a zero-width bit-field following a non-zero-width bit-field
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// - the field is a non-zero-width bit-field and not packed.
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// See test case 0069.
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const update_record_alignment =
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field.isRegularField() or
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(field.specifiedBitWidth() == 0 and self.ongoing_bitfield != null) or
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(field.specifiedBitWidth() != 0 and !is_attr_packed);
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// If a field affects the alignment of a record, the alignment is calculated in the
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// usual way except that __attribute__((packed)) is ignored on a zero-width bit-field.
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// See test case 0068.
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if (update_record_alignment) {
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var ty_alignment_bits = field_layout.field_alignment_bits;
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if (is_attr_packed and (field.isRegularField() or field.specifiedBitWidth() != 0)) {
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ty_alignment_bits = BITS_PER_BYTE;
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}
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ty_alignment_bits = @max(ty_alignment_bits, annotation_alignment_bits);
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if (self.max_field_align_bits) |bits| {
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ty_alignment_bits = @intCast(@min(ty_alignment_bits, bits));
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}
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self.aligned_bits = @max(self.aligned_bits, ty_alignment_bits);
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}
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// NOTE: ty_alignment_bits and field_alignment_bits are different in the following case:
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// Y = { size: 64, alignment: 64 }struct {
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// { offset: 0, size: 1 }c { size: 8, alignment: 8 }char:1,
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// @attr_packed _ { size: 64, alignment: 64 }long long:0,
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// { offset: 8, size: 8 }d { size: 8, alignment: 8 }char,
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// }
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if (field.isRegularField()) {
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return self.layoutRegularFieldMinGW(field_layout.size_bits, field_alignment_bits);
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} else {
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return self.layoutBitFieldMinGW(field_layout.size_bits, field_alignment_bits, field.isNamed(), field.specifiedBitWidth());
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}
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}
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fn layoutBitFieldMinGW(
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self: *SysVContext,
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ty_size_bits: u64,
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field_alignment_bits: u64,
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is_named: bool,
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width: u64,
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) FieldLayout {
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std.debug.assert(width <= ty_size_bits); // validated in parser
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// In a union, the size of the underlying type does not affect the size of the union.
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// See test case 0070.
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if (self.is_union) {
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self.size_bits = @max(self.size_bits, width);
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if (!is_named) return .{};
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return .{
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.offset_bits = 0,
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.size_bits = width,
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};
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}
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if (width == 0) {
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self.ongoing_bitfield = null;
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} else {
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// If there is an ongoing bit-field in a struct whose underlying type has the same size and
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// if there is enough space left to place this bit-field, then this bit-field is placed in
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// the ongoing bit-field and the size of the struct is not affected by this
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// bit-field. See test case 0037.
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if (self.ongoing_bitfield) |*ongoing| {
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if (ongoing.size_bits == ty_size_bits and ongoing.unused_size_bits >= width) {
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const offset_bits = self.size_bits - ongoing.unused_size_bits;
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ongoing.unused_size_bits -= width;
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if (!is_named) return .{};
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return .{
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.offset_bits = offset_bits,
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.size_bits = width,
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};
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}
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}
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// Otherwise this field is part of a new ongoing bit-field.
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self.ongoing_bitfield = .{
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.size_bits = ty_size_bits,
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.unused_size_bits = ty_size_bits - width,
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};
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}
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const offset_bits = std.mem.alignForward(u64, self.size_bits, field_alignment_bits);
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self.size_bits = if (width == 0) offset_bits else offset_bits + ty_size_bits;
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if (!is_named) return .{};
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return .{
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.offset_bits = offset_bits,
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.size_bits = width,
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};
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}
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fn layoutRegularFieldMinGW(
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self: *SysVContext,
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ty_size_bits: u64,
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field_alignment_bits: u64,
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) FieldLayout {
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self.ongoing_bitfield = null;
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// A struct field starts at the next offset in the struct that is properly
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// aligned with respect to the start of the struct. See test case 0033.
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// A union field always starts at offset 0.
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const offset_bits = if (self.is_union) 0 else std.mem.alignForward(u64, self.size_bits, field_alignment_bits);
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// Set the size of the record to the maximum of the current size and the end of
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// the field. See test case 0034.
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self.size_bits = @max(self.size_bits, offset_bits + ty_size_bits);
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return .{
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.offset_bits = offset_bits,
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.size_bits = ty_size_bits,
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};
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}
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fn layoutRegularField(
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self: *SysVContext,
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fld_attrs: ?[]const Attribute,
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fld_layout: TypeLayout,
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) FieldLayout {
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var fld_align_bits = fld_layout.field_alignment_bits;
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// If the struct or the field is packed, then the alignment of the underlying type is
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// ignored. See test case 0084.
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if (self.attr_packed or isPacked(fld_attrs)) {
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fld_align_bits = BITS_PER_BYTE;
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}
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// The field alignment can be increased by __attribute__((aligned)) annotations on the
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// field. See test case 0085.
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if (Type.annotationAlignment(self.comp, fld_attrs)) |anno| {
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fld_align_bits = @max(fld_align_bits, anno * BITS_PER_BYTE);
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}
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// #pragma pack takes precedence over all other attributes. See test cases 0084 and
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// 0085.
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if (self.max_field_align_bits) |req_bits| {
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fld_align_bits = @intCast(@min(fld_align_bits, req_bits));
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}
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// A struct field starts at the next offset in the struct that is properly
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// aligned with respect to the start of the struct.
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const offset_bits = if (self.is_union) 0 else std.mem.alignForward(u64, self.size_bits, fld_align_bits);
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const size_bits = fld_layout.size_bits;
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// The alignment of a record is the maximum of its field alignments. See test cases
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// 0084, 0085, 0086.
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self.size_bits = @max(self.size_bits, offset_bits + size_bits);
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self.aligned_bits = @max(self.aligned_bits, fld_align_bits);
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return .{
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.offset_bits = offset_bits,
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.size_bits = size_bits,
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};
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}
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fn layoutBitField(
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self: *SysVContext,
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fld_attrs: ?[]const Attribute,
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fld_layout: TypeLayout,
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is_named: bool,
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bit_width: u64,
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) FieldLayout {
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const ty_size_bits = fld_layout.size_bits;
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var ty_fld_algn_bits: u32 = fld_layout.field_alignment_bits;
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if (bit_width > 0) {
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std.debug.assert(bit_width <= ty_size_bits); // Checked in parser
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// Some targets ignore the alignment of the underlying type when laying out
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// non-zero-sized bit-fields. See test case 0072. On such targets, bit-fields never
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// cross a storage boundary. See test case 0081.
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if (target_util.ignoreNonZeroSizedBitfieldTypeAlignment(self.comp.target)) {
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ty_fld_algn_bits = 1;
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}
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} else {
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// Some targets ignore the alignment of the underlying type when laying out
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// zero-sized bit-fields. See test case 0073.
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if (target_util.ignoreZeroSizedBitfieldTypeAlignment(self.comp.target)) {
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ty_fld_algn_bits = 1;
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}
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// Some targets have a minimum alignment of zero-sized bit-fields. See test case
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// 0074.
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if (target_util.minZeroWidthBitfieldAlignment(self.comp.target)) |target_align| {
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ty_fld_algn_bits = @max(ty_fld_algn_bits, target_align);
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}
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}
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// __attribute__((packed)) on the record is identical to __attribute__((packed)) on each
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// field. See test case 0067.
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const attr_packed = self.attr_packed or isPacked(fld_attrs);
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const has_packing_annotation = attr_packed or self.max_field_align_bits != null;
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const annotation_alignment: u32 = if (Type.annotationAlignment(self.comp, fld_attrs)) |anno| anno * BITS_PER_BYTE else 1;
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const first_unused_bit: u64 = if (self.is_union) 0 else self.size_bits;
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var field_align_bits: u64 = 1;
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if (bit_width == 0) {
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field_align_bits = @max(ty_fld_algn_bits, annotation_alignment);
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} else if (self.comp.langopts.emulate == .gcc) {
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// On GCC, the field alignment is at least the alignment requested by annotations
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// except as restricted by #pragma pack. See test case 0083.
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field_align_bits = annotation_alignment;
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if (self.max_field_align_bits) |max_bits| {
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field_align_bits = @min(annotation_alignment, max_bits);
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}
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// On GCC, if there are no packing annotations and
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// - the field would otherwise start at an offset such that it would cross a
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// storage boundary or
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// - the alignment of the type is larger than its size,
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// then it is aligned to the type's field alignment. See test case 0083.
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if (!has_packing_annotation) {
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const start_bit = std.mem.alignForward(u64, first_unused_bit, field_align_bits);
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const does_field_cross_boundary = start_bit % ty_fld_algn_bits + bit_width > ty_size_bits;
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if (ty_fld_algn_bits > ty_size_bits or does_field_cross_boundary) {
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field_align_bits = @max(field_align_bits, ty_fld_algn_bits);
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}
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}
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} else {
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std.debug.assert(self.comp.langopts.emulate == .clang);
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// On Clang, the alignment requested by annotations is not respected if it is
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// larger than the value of #pragma pack. See test case 0083.
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if (annotation_alignment <= self.max_field_align_bits orelse std.math.maxInt(u29)) {
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field_align_bits = @max(field_align_bits, annotation_alignment);
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}
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// On Clang, if there are no packing annotations and the field would cross a
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// storage boundary if it were positioned at the first unused bit in the record,
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// it is aligned to the type's field alignment. See test case 0083.
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if (!has_packing_annotation) {
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const does_field_cross_boundary = first_unused_bit % ty_fld_algn_bits + bit_width > ty_size_bits;
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if (does_field_cross_boundary)
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field_align_bits = @max(field_align_bits, ty_fld_algn_bits);
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}
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}
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const offset_bits = std.mem.alignForward(u64, first_unused_bit, field_align_bits);
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self.size_bits = @max(self.size_bits, offset_bits + bit_width);
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// Unnamed fields do not contribute to the record alignment except on a few targets.
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// See test case 0079.
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if (is_named or target_util.unnamedFieldAffectsAlignment(self.comp.target)) {
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var inherited_align_bits: u32 = undefined;
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if (bit_width == 0) {
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// If the width is 0, #pragma pack and __attribute__((packed)) are ignored.
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// See test case 0075.
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inherited_align_bits = @max(ty_fld_algn_bits, annotation_alignment);
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} else if (self.max_field_align_bits) |max_align_bits| {
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// Otherwise, if a #pragma pack is in effect, __attribute__((packed)) on the field or
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// record is ignored. See test case 0076.
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inherited_align_bits = @max(ty_fld_algn_bits, annotation_alignment);
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inherited_align_bits = @intCast(@min(inherited_align_bits, max_align_bits));
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} else if (attr_packed) {
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// Otherwise, if the field or the record is packed, the field alignment is 1 bit unless
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// it is explicitly increased with __attribute__((aligned)). See test case 0077.
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inherited_align_bits = annotation_alignment;
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} else {
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// Otherwise, the field alignment is the field alignment of the underlying type unless
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// it is explicitly increased with __attribute__((aligned)). See test case 0078.
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inherited_align_bits = @max(ty_fld_algn_bits, annotation_alignment);
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}
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self.aligned_bits = @max(self.aligned_bits, inherited_align_bits);
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}
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if (!is_named) return .{};
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return .{
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.size_bits = bit_width,
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.offset_bits = offset_bits,
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};
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}
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};
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const MsvcContext = struct {
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req_align_bits: u32,
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max_field_align_bits: ?u32,
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/// The alignment of pointers that point to an object of this type. This is greater than or equal
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/// to the required alignment. Once all fields have been laid out, the size of the record will be
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/// rounded up to this value.
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pointer_align_bits: u32,
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/// The alignment of this type when it is used as a record field. This is greater than or equal to
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/// the pointer alignment.
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field_align_bits: u32,
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size_bits: u64,
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ongoing_bitfield: ?OngoingBitfield,
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contains_non_bitfield: bool,
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is_union: bool,
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comp: *const Compilation,
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fn init(ty: Type, comp: *const Compilation, pragma_pack: ?u8) MsvcContext {
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var pack_value: ?u32 = null;
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if (ty.hasAttribute(.@"packed")) {
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// __attribute__((packed)) behaves like #pragma pack(1) in clang. See test case 0056.
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pack_value = BITS_PER_BYTE;
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}
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if (pack_value == null) {
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if (pragma_pack) |pack| {
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pack_value = pack * BITS_PER_BYTE;
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}
|
|
}
|
|
if (pack_value) |pack| {
|
|
pack_value = msvcPragmaPack(comp, pack);
|
|
}
|
|
|
|
// The required alignment can be increased by adding a __declspec(align)
|
|
// annotation. See test case 0023.
|
|
var must_align: u29 = BITS_PER_BYTE;
|
|
if (ty.requestedAlignment(comp)) |req_align| {
|
|
must_align = req_align * BITS_PER_BYTE;
|
|
}
|
|
return MsvcContext{
|
|
.req_align_bits = must_align,
|
|
.pointer_align_bits = must_align,
|
|
.field_align_bits = must_align,
|
|
.size_bits = 0,
|
|
.max_field_align_bits = pack_value,
|
|
.ongoing_bitfield = null,
|
|
.contains_non_bitfield = false,
|
|
.is_union = ty.is(.@"union"),
|
|
.comp = comp,
|
|
};
|
|
}
|
|
|
|
fn layoutField(self: *MsvcContext, fld: *const Field, fld_attrs: ?[]const Attribute) FieldLayout {
|
|
const type_layout = computeLayout(fld.ty, self.comp);
|
|
|
|
// The required alignment of the field is the maximum of the required alignment of the
|
|
// underlying type and the __declspec(align) annotation on the field itself.
|
|
// See test case 0028.
|
|
var req_align = type_layout.required_alignment_bits;
|
|
if (Type.annotationAlignment(self.comp, fld_attrs)) |anno| {
|
|
req_align = @max(anno * BITS_PER_BYTE, req_align);
|
|
}
|
|
|
|
// The required alignment of a record is the maximum of the required alignments of its
|
|
// fields except that the required alignment of bitfields is ignored.
|
|
// See test case 0029.
|
|
if (fld.isRegularField()) {
|
|
self.req_align_bits = @max(self.req_align_bits, req_align);
|
|
}
|
|
|
|
// The offset of the field is based on the field alignment of the underlying type.
|
|
// See test case 0027.
|
|
var fld_align_bits = type_layout.field_alignment_bits;
|
|
if (self.max_field_align_bits) |max_align| {
|
|
fld_align_bits = @min(fld_align_bits, max_align);
|
|
}
|
|
// check the requested alignment of the field type.
|
|
if (fld.ty.requestedAlignment(self.comp)) |type_req_align| {
|
|
fld_align_bits = @max(fld_align_bits, type_req_align * 8);
|
|
}
|
|
|
|
if (isPacked(fld_attrs)) {
|
|
// __attribute__((packed)) on a field is a clang extension. It behaves as if #pragma
|
|
// pack(1) had been applied only to this field. See test case 0057.
|
|
fld_align_bits = BITS_PER_BYTE;
|
|
}
|
|
// __attribute__((packed)) on a field is a clang extension. It behaves as if #pragma
|
|
// pack(1) had been applied only to this field. See test case 0057.
|
|
fld_align_bits = @max(fld_align_bits, req_align);
|
|
if (fld.isRegularField()) {
|
|
return self.layoutRegularField(type_layout.size_bits, fld_align_bits);
|
|
} else {
|
|
return self.layoutBitField(type_layout.size_bits, fld_align_bits, fld.specifiedBitWidth());
|
|
}
|
|
}
|
|
|
|
fn layoutBitField(self: *MsvcContext, ty_size_bits: u64, field_align: u32, bit_width: u32) FieldLayout {
|
|
if (bit_width == 0) {
|
|
// A zero-sized bit-field that does not follow a non-zero-sized bit-field does not affect
|
|
// the overall layout of the record. Even in a union where the order would otherwise
|
|
// not matter. See test case 0035.
|
|
if (self.ongoing_bitfield) |_| {
|
|
self.ongoing_bitfield = null;
|
|
} else {
|
|
// this field takes 0 space.
|
|
return .{ .offset_bits = self.size_bits, .size_bits = bit_width };
|
|
}
|
|
} else {
|
|
std.debug.assert(bit_width <= ty_size_bits);
|
|
// If there is an ongoing bit-field in a struct whose underlying type has the same size and
|
|
// if there is enough space left to place this bit-field, then this bit-field is placed in
|
|
// the ongoing bit-field and the overall layout of the struct is not affected by this
|
|
// bit-field. See test case 0037.
|
|
if (!self.is_union) {
|
|
if (self.ongoing_bitfield) |*p| {
|
|
if (p.size_bits == ty_size_bits and p.unused_size_bits >= bit_width) {
|
|
const offset_bits = self.size_bits - p.unused_size_bits;
|
|
p.unused_size_bits -= bit_width;
|
|
return .{ .offset_bits = offset_bits, .size_bits = bit_width };
|
|
}
|
|
}
|
|
}
|
|
// Otherwise this field is part of a new ongoing bit-field.
|
|
self.ongoing_bitfield = .{ .size_bits = ty_size_bits, .unused_size_bits = ty_size_bits - bit_width };
|
|
}
|
|
const offset_bits = if (!self.is_union) bits: {
|
|
// This is the one place in the layout of a record where the pointer alignment might
|
|
// get assigned a smaller value than the field alignment. This can only happen if
|
|
// the field or the type of the field has a required alignment. Otherwise the value
|
|
// of field_alignment_bits is already bound by max_field_alignment_bits.
|
|
// See test case 0038.
|
|
const p_align = if (self.max_field_align_bits) |max_fld_align|
|
|
@min(max_fld_align, field_align)
|
|
else
|
|
field_align;
|
|
self.pointer_align_bits = @max(self.pointer_align_bits, p_align);
|
|
self.field_align_bits = @max(self.field_align_bits, field_align);
|
|
|
|
const offset_bits = std.mem.alignForward(u64, self.size_bits, field_align);
|
|
self.size_bits = if (bit_width == 0) offset_bits else offset_bits + ty_size_bits;
|
|
|
|
break :bits offset_bits;
|
|
} else bits: {
|
|
// Bit-fields do not affect the alignment of a union. See test case 0041.
|
|
self.size_bits = @max(self.size_bits, ty_size_bits);
|
|
break :bits 0;
|
|
};
|
|
return .{ .offset_bits = offset_bits, .size_bits = bit_width };
|
|
}
|
|
|
|
fn layoutRegularField(self: *MsvcContext, size_bits: u64, field_align: u32) FieldLayout {
|
|
self.contains_non_bitfield = true;
|
|
self.ongoing_bitfield = null;
|
|
// The alignment of the field affects both the pointer alignment and the field
|
|
// alignment of the record. See test case 0032.
|
|
self.pointer_align_bits = @max(self.pointer_align_bits, field_align);
|
|
self.field_align_bits = @max(self.field_align_bits, field_align);
|
|
const offset_bits = switch (self.is_union) {
|
|
true => 0,
|
|
false => std.mem.alignForward(u64, self.size_bits, field_align),
|
|
};
|
|
self.size_bits = @max(self.size_bits, offset_bits + size_bits);
|
|
return .{ .offset_bits = offset_bits, .size_bits = size_bits };
|
|
}
|
|
fn handleZeroSizedRecord(self: *MsvcContext) void {
|
|
if (self.is_union) {
|
|
// MSVC does not allow unions without fields.
|
|
// If all fields in a union have size 0, the size of the union is set to
|
|
// - its field alignment if it contains at least one non-bitfield
|
|
// - 4 bytes if it contains only bitfields
|
|
// See test case 0025.
|
|
if (self.contains_non_bitfield) {
|
|
self.size_bits = self.field_align_bits;
|
|
} else {
|
|
self.size_bits = 4 * BITS_PER_BYTE;
|
|
}
|
|
} else {
|
|
// If all fields in a struct have size 0, its size is set to its required alignment
|
|
// but at least to 4 bytes. See test case 0026.
|
|
self.size_bits = @max(self.req_align_bits, 4 * BITS_PER_BYTE);
|
|
self.pointer_align_bits = @intCast(@min(self.pointer_align_bits, self.size_bits));
|
|
}
|
|
}
|
|
};
|
|
|
|
pub fn compute(rec: *Type.Record, ty: Type, comp: *const Compilation, pragma_pack: ?u8) void {
|
|
switch (comp.langopts.emulate) {
|
|
.gcc, .clang => {
|
|
var context = SysVContext.init(ty, comp, pragma_pack);
|
|
|
|
context.layoutFields(rec);
|
|
|
|
context.size_bits = std.mem.alignForward(u64, context.size_bits, context.aligned_bits);
|
|
|
|
rec.type_layout = .{
|
|
.size_bits = context.size_bits,
|
|
.field_alignment_bits = context.aligned_bits,
|
|
.pointer_alignment_bits = context.aligned_bits,
|
|
.required_alignment_bits = BITS_PER_BYTE,
|
|
};
|
|
},
|
|
.msvc => {
|
|
var context = MsvcContext.init(ty, comp, pragma_pack);
|
|
for (rec.fields, 0..) |*fld, fld_indx| {
|
|
if (fld.ty.specifier == .invalid) continue;
|
|
var field_attrs: ?[]const Attribute = null;
|
|
if (rec.field_attributes) |attrs| {
|
|
field_attrs = attrs[fld_indx];
|
|
}
|
|
|
|
fld.layout = context.layoutField(fld, field_attrs);
|
|
}
|
|
if (context.size_bits == 0) {
|
|
// As an extension, MSVC allows records that only contain zero-sized bitfields and empty
|
|
// arrays. Such records would be zero-sized but this case is handled here separately to
|
|
// ensure that there are no zero-sized records.
|
|
context.handleZeroSizedRecord();
|
|
}
|
|
context.size_bits = std.mem.alignForward(u64, context.size_bits, context.pointer_align_bits);
|
|
rec.type_layout = .{
|
|
.size_bits = context.size_bits,
|
|
.field_alignment_bits = context.field_align_bits,
|
|
.pointer_alignment_bits = context.pointer_align_bits,
|
|
.required_alignment_bits = context.req_align_bits,
|
|
};
|
|
},
|
|
}
|
|
}
|
|
|
|
fn computeLayout(ty: Type, comp: *const Compilation) TypeLayout {
|
|
if (ty.getRecord()) |rec| {
|
|
const requested = BITS_PER_BYTE * (ty.requestedAlignment(comp) orelse 0);
|
|
return .{
|
|
.size_bits = rec.type_layout.size_bits,
|
|
.pointer_alignment_bits = @max(requested, rec.type_layout.pointer_alignment_bits),
|
|
.field_alignment_bits = @max(requested, rec.type_layout.field_alignment_bits),
|
|
.required_alignment_bits = rec.type_layout.required_alignment_bits,
|
|
};
|
|
} else {
|
|
const type_align = ty.alignof(comp) * BITS_PER_BYTE;
|
|
return .{
|
|
.size_bits = ty.bitSizeof(comp) orelse 0,
|
|
.pointer_alignment_bits = type_align,
|
|
.field_alignment_bits = type_align,
|
|
.required_alignment_bits = BITS_PER_BYTE,
|
|
};
|
|
}
|
|
}
|
|
|
|
fn isPacked(attrs: ?[]const Attribute) bool {
|
|
const a = attrs orelse return false;
|
|
|
|
for (a) |attribute| {
|
|
if (attribute.tag != .@"packed") continue;
|
|
return true;
|
|
}
|
|
return false;
|
|
}
|
|
|
|
// The effect of #pragma pack(N) depends on the target.
|
|
//
|
|
// x86: By default, there is no maximum field alignment. N={1,2,4} set the maximum field
|
|
// alignment to that value. All other N activate the default.
|
|
// x64: By default, there is no maximum field alignment. N={1,2,4,8} set the maximum field
|
|
// alignment to that value. All other N activate the default.
|
|
// arm: By default, the maximum field alignment is 8. N={1,2,4,8,16} set the maximum field
|
|
// alignment to that value. All other N activate the default.
|
|
// arm64: By default, the maximum field alignment is 8. N={1,2,4,8} set the maximum field
|
|
// alignment to that value. N=16 disables the maximum field alignment. All other N
|
|
// activate the default.
|
|
//
|
|
// See test case 0020.
|
|
pub fn msvcPragmaPack(comp: *const Compilation, pack: u32) ?u32 {
|
|
return switch (pack) {
|
|
8, 16, 32 => pack,
|
|
64 => if (comp.target.cpu.arch == .x86) null else pack,
|
|
128 => if (comp.target.cpu.arch == .thumb) pack else null,
|
|
else => {
|
|
return switch (comp.target.cpu.arch) {
|
|
.thumb, .aarch64 => 64,
|
|
else => null,
|
|
};
|
|
},
|
|
};
|
|
}
|