commit 06a6b9a910fbe47bbb91f6e18a8cadad7517dfab (tree)
parent ad993716bd592737724bf679b182ca6790c7e0ac
Author: Motiejus Jakštys <motiejus@jakstys.lt>
Date: Tue, 24 Feb 2026 10:04:04 +0200
bring src/ to 0.15.2
Since we now are at arms' length with the upstream compiler.
Diffstat:
2 files changed, 8 insertions(+), 16 deletions(-)
diff --git a/src/Zcu.zig b/src/Zcu.zig
@@ -2932,12 +2932,6 @@ pub fn saveZirCache(gpa: Allocator, cache_file: std.fs.File, stat: std.fs.File.S
const as_struct: *const HackDataLayout = @ptrCast(data);
safety_buffer[i] = as_struct.data;
}
- // Union variants smaller than 8 bytes leave padding uninitialised.
- // The copy above propagates those V-bits into safety_buffer, so
- // valgrind flags the subsequent pwritev. The padding is never
- // interpreted on read-back (the tag array determines the active
- // variant), so tell valgrind the buffer contents are intentional.
- std.valgrind.memcheck.makeMemDefined(std.mem.sliceAsBytes(safety_buffer));
}
const header: Zir.Header = .{
diff --git a/src/arch/x86_64/bits.zig b/src/arch/x86_64/bits.zig
@@ -178,27 +178,25 @@ pub const Condition = enum(u5) {
}
};
-/// The immediate operand of vroundss/vroundps/vcvtps2ph.
-/// Intel SDM layout: bits 1:0 = rounding mode, bit 2 = use MXCSR.RC,
-/// bit 3 = precision exception suppress.
-pub const RoundMode = packed struct(u4) {
+/// The immediate operand of vcvtps2ph.
+pub const RoundMode = packed struct(u5) {
direction: Direction = .mxcsr,
precision: enum(u1) {
normal = 0b0,
inexact = 0b1,
} = .normal,
- pub const Direction = enum(u3) {
+ pub const Direction = enum(u4) {
/// Round to nearest (even)
- nearest = 0b000,
+ nearest = 0b0_00,
/// Round down (toward -∞)
- down = 0b001,
+ down = 0b0_01,
/// Round up (toward +∞)
- up = 0b010,
+ up = 0b0_10,
/// Round toward zero (truncate)
- zero = 0b011,
+ zero = 0b0_11,
/// Use current rounding mode of MXCSR.RC
- mxcsr = 0b100,
+ mxcsr = 0b1_00,
};
pub fn imm(mode: RoundMode) Immediate {