commit 072534bb2ab27addea2c8ffa2574e5c267b9de44 (tree)
parent c646f0e182d0161946be607a1c310767291f0722
Author: Andrew Kelley <andrew@ziglang.org>
Date: Fri, 26 Jun 2026 16:07:24 -0700
std.hash.crc: restore auto-generated status
Diffstat:
3 files changed, 62 insertions(+), 67 deletions(-)
diff --git a/lib/std/hash/crc.zig b/lib/std/hash/crc.zig
@@ -2,17 +2,6 @@
const builtin = @import("builtin");
-pub const @"CRC-32/ISCSI" = if (builtin.cpu.hasAll(.x86, &.{ .@"64bit", .crc32 }))
- @import("crc/Crc32c.zig")
-else
- Generic(u32, .{
- .polynomial = 0x1edc6f41,
- .initial = 0xffffffff,
- .reflect_input = true,
- .reflect_output = true,
- .xor_output = 0xffffffff,
- });
-
pub const @"CRC-3/GSM" = Generic(u3, .{
.polynomial = 0x3,
.initial = 0x0,
@@ -797,6 +786,17 @@ pub const @"CRC-32/CKSUM" = Generic(u32, .{
.xor_output = 0xffffffff,
});
+pub const @"CRC-32/ISCSI" = if (builtin.cpu.hasAll(.x86, &.{ .@"64bit", .crc32 }))
+ @import("crc/Crc32c.zig")
+else
+ Generic(u32, .{
+ .polynomial = 0x1edc6f41,
+ .initial = 0xffffffff,
+ .reflect_input = true,
+ .reflect_output = true,
+ .xor_output = 0xffffffff,
+ });
+
pub const @"CRC-32/ISO-HDLC" = Generic(u32, .{
.polynomial = 0x04c11db7,
.initial = 0xffffffff,
diff --git a/lib/std/hash/crc/test.zig b/lib/std/hash/crc/test.zig
@@ -26,17 +26,6 @@ test "crc32 koopman regression" {
try testing.expectEqual(Crc.hash("abc"), 0xba2322ac);
}
-test "CRC-32/ISCSI" {
- const Crc = crc.@"CRC-32/ISCSI";
-
- try testing.expectEqual(@as(u32, 0xe3069283), Crc.hash("123456789"));
-
- var c = Crc.init();
- c.update("1234");
- c.update("56789");
- try testing.expectEqual(@as(u32, 0xe3069283), c.final());
-}
-
test "CRC-3/GSM" {
const Crc = crc.@"CRC-3/GSM";
@@ -1115,6 +1104,17 @@ test "CRC-32/CKSUM" {
try testing.expectEqual(@as(u32, 0x765e7680), c.final());
}
+test "CRC-32/ISCSI" {
+ const Crc = crc.@"CRC-32/ISCSI";
+
+ try testing.expectEqual(@as(u32, 0xe3069283), Crc.hash("123456789"));
+
+ var c = Crc.init();
+ c.update("1234");
+ c.update("56789");
+ try testing.expectEqual(@as(u32, 0xe3069283), c.final());
+}
+
test "CRC-32/ISO-HDLC" {
const Crc = crc.@"CRC-32/ISO-HDLC";
diff --git a/tools/update_crc_catalog.zig b/tools/update_crc_catalog.zig
@@ -41,17 +41,6 @@ fn @"i like cheese"(arena: std.mem.Allocator, io: Io, args: []const []const u8)
\\
\\const builtin = @import("builtin");
\\
- \\pub const Crc32Iscsi = if (builtin.cpu.hasAll(.x86, &.{ .@"64bit", .crc32 }))
- \\ @import("crc/Crc32c.zig")
- \\else
- \\ Generic(u32, .{
- \\ .polynomial = 0x1edc6f41,
- \\ .initial = 0xffffffff,
- \\ .reflect_input = true,
- \\ .reflect_output = true,
- \\ .xor_output = 0xffffffff,
- \\ });
- \\
);
var zig_test_file = try crc_target_dir.createFile(io, "test.zig", .{});
@@ -70,35 +59,24 @@ fn @"i like cheese"(arena: std.mem.Allocator, io: Io, args: []const []const u8)
\\const crc = @import("../crc.zig");
\\
\\test "crc32 ieee regression" {
- \\ const crc32 = crc.Crc32IsoHdlc;
- \\ try testing.expectEqual(crc32.hash(""), 0x00000000);
- \\ try testing.expectEqual(crc32.hash("a"), 0xe8b7be43);
- \\ try testing.expectEqual(crc32.hash("abc"), 0x352441c2);
+ \\ const Crc = crc.@"CRC-32/ISO-HDLC";
+ \\ try testing.expectEqual(Crc.hash(""), 0x00000000);
+ \\ try testing.expectEqual(Crc.hash("a"), 0xe8b7be43);
+ \\ try testing.expectEqual(Crc.hash("abc"), 0x352441c2);
\\}
\\
\\test "crc32 castagnoli regression" {
- \\ const crc32 = crc.Crc32Iscsi;
- \\ try testing.expectEqual(crc32.hash(""), 0x00000000);
- \\ try testing.expectEqual(crc32.hash("a"), 0xc1d04330);
- \\ try testing.expectEqual(crc32.hash("abc"), 0x364b3fb7);
+ \\ const Crc = crc.@"CRC-32/ISCSI";
+ \\ try testing.expectEqual(Crc.hash(""), 0x00000000);
+ \\ try testing.expectEqual(Crc.hash("a"), 0xc1d04330);
+ \\ try testing.expectEqual(Crc.hash("abc"), 0x364b3fb7);
\\}
\\
\\test "crc32 koopman regression" {
- \\ const crc32 = crc.Crc32Koopman;
- \\ try testing.expectEqual(crc32.hash(""), 0x00000000);
- \\ try testing.expectEqual(crc32.hash("a"), 0x0da2aa8a);
- \\ try testing.expectEqual(crc32.hash("abc"), 0xba2322ac);
- \\}
- \\
- \\test "CRC-32/ISCSI" {
- \\ const Crc32Iscsi = crc.Crc32Iscsi;
- \\
- \\ try testing.expectEqual(@as(u32, 0xe3069283), Crc32Iscsi.hash("123456789"));
- \\
- \\ var c = Crc32Iscsi.init();
- \\ c.update("1234");
- \\ c.update("56789");
- \\ try testing.expectEqual(@as(u32, 0xe3069283), c.final());
+ \\ const Crc = crc.@"CRC-32/KOOPMAN";
+ \\ try testing.expectEqual(Crc.hash(""), 0x00000000);
+ \\ try testing.expectEqual(Crc.hash("a"), 0x0da2aa8a);
+ \\ try testing.expectEqual(Crc.hash("abc"), 0xba2322ac);
\\}
\\
);
@@ -147,17 +125,34 @@ fn @"i like cheese"(arena: std.mem.Allocator, io: Io, args: []const []const u8)
}
}
- try code_writer.print(
- \\
- \\pub const {f} = Generic(u{s}, .{{
- \\ .polynomial = {s},
- \\ .initial = {s},
- \\ .reflect_input = {s},
- \\ .reflect_output = {s},
- \\ .xor_output = {s},
- \\}});
- \\
- , .{ std.zig.fmtId(name), width, poly, init, refin, refout, xorout });
+ if (mem.eql(u8, name, "CRC-32/ISCSI")) {
+ try code_writer.print(
+ \\
+ \\pub const {f} = if (builtin.cpu.hasAll(.x86, &.{{ .@"64bit", .crc32 }}))
+ \\ @import("crc/Crc32c.zig")
+ \\else
+ \\ Generic(u{s}, .{{
+ \\ .polynomial = {s},
+ \\ .initial = {s},
+ \\ .reflect_input = {s},
+ \\ .reflect_output = {s},
+ \\ .xor_output = {s},
+ \\ }});
+ \\
+ , .{ std.zig.fmtId(name), width, poly, init, refin, refout, xorout });
+ } else {
+ try code_writer.print(
+ \\
+ \\pub const {f} = Generic(u{s}, .{{
+ \\ .polynomial = {s},
+ \\ .initial = {s},
+ \\ .reflect_input = {s},
+ \\ .reflect_output = {s},
+ \\ .xor_output = {s},
+ \\}});
+ \\
+ , .{ std.zig.fmtId(name), width, poly, init, refin, refout, xorout });
+ }
try test_writer.print(
\\
