zig

commit 0a9f666ea62829607d782dc0cac5d10099def180 (tree)
parent 1231aa9719856320359392e99e330aa78b718c50
Author: Alex Rønne Petersen <alex@alexrp.com>
Date:   Sun, 23 Nov 2025 07:26:56 +0100

cbe: translate sparc ccr/icc/xcc registers to icc

C compilers do not distinguish between these.

Diffstat:
M
src/codegen/c.zig
 | 
4
++++

1 file changed, 4 insertions(+), 0 deletions(-)
diff --git a/src/codegen/c.zig b/src/codegen/c.zig
@@ -5672,6 +5672,10 @@ fn airAsm(f: *Function, inst: Air.Inst.Index) !CValue {
                             c_name_buf[0] = '$';
                             @memcpy((&c_name_buf)[1..][0..field_name.len], field_name);
                             break :name (&c_name_buf)[0 .. 1 + field_name.len];
+                        } else if (target.cpu.arch.isSPARC() and
+                        (mem.eql(u8, field_name, "ccr") or mem.eql(u8, field_name, "icc") or mem.eql(u8, field_name, "xcc"))) name: {
+                            // C compilers just use `icc` to encompass all of these.
+                            break :name "icc";
                         } else field_name;
 
                     try w.print(" {f}", .{fmtStringLiteral(name, null)});