zig

commit 0b67463b9285158d818d6cd196c5f2ba9961a05e (tree)
parent c172877b81f4eff50cf214eb553c9df108fbd9eb
Author: Alex Rønne Petersen <alex@alexrp.com>
Date:   Wed, 13 Nov 2024 11:15:56 +0100

riscv64: Support the fp alias for register s0 in inline assembly.

Diffstat:
M
src/arch/riscv64/CodeGen.zig
 | 
4
++++

1 file changed, 4 insertions(+), 0 deletions(-)
diff --git a/src/arch/riscv64/CodeGen.zig b/src/arch/riscv64/CodeGen.zig
@@ -8442,6 +8442,10 @@ fn failSymbol(func: *Func, comptime format: []const u8, args: anytype) InnerErro
 }
 
 fn parseRegName(name: []const u8) ?Register {
+    // The `fp` alias for `s0` is awkward to fit into the current `Register` scheme, so for now we
+    // special-case it here.
+    if (std.mem.eql(u8, name, "fp")) return .s0;
+
     return std.meta.stringToEnum(Register, name);
 }