commit 0d2d51dd8c00af71e19626aeb50dd7d9ff63ccf7 (tree)
parent afc6e88413a19b62413c2027d78b1ba561f75491
Author: Alex Rønne Petersen <alex@alexrp.com>
Date: Sat, 18 Oct 2025 15:00:05 +0200
std.start: add or1k support
Diffstat:
1 file changed, 9 insertions(+), 0 deletions(-)
diff --git a/lib/std/start.zig b/lib/std/start.zig
@@ -202,6 +202,7 @@ fn _start() callconv(.naked) noreturn {
.loongarch32, .loongarch64 => ".cfi_undefined 1",
.m68k => ".cfi_undefined %%pc",
.mips, .mipsel, .mips64, .mips64el => ".cfi_undefined $ra",
+ .or1k => ".cfi_undefined r9",
.powerpc, .powerpcle, .powerpc64, .powerpc64le => ".cfi_undefined lr",
.riscv32, .riscv32be, .riscv64, .riscv64be => if (builtin.zig_backend == .stage2_riscv64)
""
@@ -305,6 +306,14 @@ fn _start() callconv(.naked) noreturn {
\\ bstrins.d $sp, $zero, 3, 0
\\ b %[posixCallMainAndExit]
,
+ .or1k =>
+ // r1 = SP, r2 = FP, r9 = LR
+ \\ l.ori r2, r0, 0
+ \\ l.ori r9, r0, 0
+ \\ l.ori r3, r1, 0
+ \\ l.andi r1, r1, -4
+ \\ l.jal %[posixCallMainAndExit]
+ ,
.riscv32, .riscv32be, .riscv64, .riscv64be =>
\\ li fp, 0
\\ li ra, 0