zig

commit 0e1c68d90a39142c7ba73aa5cb0dddaebe96b6c1 (tree)
parent 0464512f2efe67d9fe853c8f4fac6448d8f48b9c
Author: Koakuma <koachan@protonmail.com>
Date:   Sat,  9 Jul 2022 18:44:35 +0700

stage2: sparc64: Don't track condition_flags_inst in checked binOps

This stops the emission of spurious CCR spills.

Diffstat:
M
src/arch/sparc64/CodeGen.zig
 | 
3
---

1 file changed, 0 insertions(+), 3 deletions(-)
diff --git a/src/arch/sparc64/CodeGen.zig b/src/arch/sparc64/CodeGen.zig
@@ -765,7 +765,6 @@ fn airAddSubWithOverflow(self: *Self, inst: Air.Inst.Index) !void {
                         };
 
                         try self.spillConditionFlagsIfOccupied();
-                        self.condition_flags_inst = inst;
 
                         const dest = blk: {
                             if (rhs_immediate_ok) {
@@ -1825,7 +1824,6 @@ fn airMulWithOverflow(self: *Self, inst: Air.Inst.Index) !void {
                 switch (int_info.bits) {
                     1...32 => {
                         try self.spillConditionFlagsIfOccupied();
-                        self.condition_flags_inst = inst;
 
                         const dest = try self.binOp(.mul, lhs, rhs, lhs_ty, rhs_ty, null);
 
@@ -2037,7 +2035,6 @@ fn airShlWithOverflow(self: *Self, inst: Air.Inst.Index) !void {
                 const int_info = lhs_ty.intInfo(self.target.*);
                 if (int_info.bits <= 64) {
                     try self.spillConditionFlagsIfOccupied();
-                    self.condition_flags_inst = inst;
 
                     const lhs_lock: ?RegisterLock = if (lhs == .register)
                         self.register_manager.lockRegAssumeUnused(lhs.register)