zig

commit 0e71e6ee0fb5e1bace0a32b48961b358a1f47621 (tree)
parent bfe3558efe9faf20d68b947c9dc077963b1f87ad
Author: d18g <gootvilig.davidhai@gmail.com>
Date:   Thu, 17 Jun 2021 23:37:38 +0300

Fix `lakemont` CpuModel (#9099)

Lakemont has no x86, no MMX, no SSE and no way of handling any fp-math. In theory LLVM is able to implicitly use the soft-float emulation library calls to legalize any such operation but, given Zig's use of many non-standard features, sometimes we hit a weak spot in the X86 codegen backend.

Consider this as a work-around for this LLVM problem, fixing the problem in LLVM is not so high in my todo list as the target is pretty niche and Intel axed it in '19.

(Commit message by @LemonBoy)
Diffstat:
M
lib/std/target/x86.zig
 | 
1
+
M
tools/update_cpu_features.zig
 | 
4
++++

2 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/lib/std/target/x86.zig b/lib/std/target/x86.zig
@@ -2241,6 +2241,7 @@ pub const cpu = struct {
             .cx8,
             .slow_unaligned_mem_16,
             .vzeroupper,
+            .soft_float,
         }),
     };
     pub const nehalem = CpuModel{
diff --git a/tools/update_cpu_features.zig b/tools/update_cpu_features.zig
@@ -754,6 +754,10 @@ const llvm_targets = [_]LlvmTarget{
                 .llvm_name = "i686",
                 .zig_name = "_i686",
             },
+            .{
+                .llvm_name = "lakemont",
+                .extra_deps = &.{"soft_float"},
+            },
         },
     },
     .{