zig

commit 152462e2e1513ca9d7db5c2d6a2a61b547c5151c (tree)
parent 902dc8c721c762bc5d1b9786bad47b21da45042c
Author: Andrew Kelley <andrew@ziglang.org>
Date:   Thu, 30 Jun 2022 14:31:46 -0700

stage2: object format affects whether LLVM can be used

Diffstat:
M
src/Compilation.zig
 | 
6
+-----
M
src/target.zig
 | 
19
++++++++++++++++++-

2 files changed, 19 insertions(+), 6 deletions(-)
diff --git a/src/Compilation.zig b/src/Compilation.zig
@@ -1024,10 +1024,6 @@ pub fn create(gpa: Allocator, options: InitOptions) !*Compilation {
             if (options.use_llvm) |explicit|
                 break :blk explicit;
 
-            // If we are outputting .c code we must use Zig backend.
-            if (ofmt == .c)
-                break :blk false;
-
             // If emitting to LLVM bitcode object format, must use LLVM backend.
             if (options.emit_llvm_ir != null or options.emit_llvm_bc != null)
                 break :blk true;
@@ -1042,7 +1038,7 @@ pub fn create(gpa: Allocator, options: InitOptions) !*Compilation {
                 break :blk true;
 
             // If LLVM does not support the target, then we can't use it.
-            if (!target_util.hasLlvmSupport(options.target))
+            if (!target_util.hasLlvmSupport(options.target, ofmt))
                 break :blk false;
 
             // Prefer LLVM for release builds.
diff --git a/src/target.zig b/src/target.zig
@@ -204,7 +204,24 @@ pub fn hasValgrindSupport(target: std.Target) bool {
 /// The set of targets that LLVM has non-experimental support for.
 /// Used to select between LLVM backend and self-hosted backend when compiling in
 /// release modes.
-pub fn hasLlvmSupport(target: std.Target) bool {
+pub fn hasLlvmSupport(target: std.Target, ofmt: std.Target.ObjectFormat) bool {
+    switch (ofmt) {
+        // LLVM does not support these object formats:
+        .c,
+        .plan9,
+        => return false,
+
+        .coff,
+        .elf,
+        .macho,
+        .wasm,
+        .spirv,
+        .hex,
+        .raw,
+        .nvptx,
+        => {},
+    }
+
     return switch (target.cpu.arch) {
         .arm,
         .armeb,