x64: separate ptr_add and ptr_sub from normal bin ops
This commit is contained in:
Jakub Konka
@@ -582,10 +582,10 @@ fn genBody(self: *Self, body: []const Air.Inst.Index) InnerError!void {
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switch (air_tags[inst]) {
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// zig fmt: off
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.add, .ptr_add => try self.airAdd(inst),
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.add => try self.airAdd(inst),
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.addwrap => try self.airAddWrap(inst),
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.add_sat => try self.airAddSat(inst),
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.sub, .ptr_sub => try self.airSub(inst),
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.sub => try self.airSub(inst),
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.subwrap => try self.airSubWrap(inst),
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.sub_sat => try self.airSubSat(inst),
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.mul => try self.airMul(inst),
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@@ -597,6 +597,8 @@ fn genBody(self: *Self, body: []const Air.Inst.Index) InnerError!void {
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.shl_sat => try self.airShlSat(inst),
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.min => try self.airMin(inst),
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.max => try self.airMax(inst),
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.ptr_add => try self.airPtrAdd(inst),
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.ptr_sub => try self.airPtrSub(inst),
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.slice => try self.airSlice(inst),
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.sqrt,
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@@ -1068,6 +1070,70 @@ fn airMax(self: *Self, inst: Air.Inst.Index) !void {
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return self.finishAir(inst, result, .{ bin_op.lhs, bin_op.rhs, .none });
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}
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fn airPtrAdd(self: *Self, inst: Air.Inst.Index) !void {
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const bin_op = self.air.instructions.items(.data)[inst].bin_op;
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if (self.liveness.isUnused(inst)) {
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return self.finishAir(inst, .dead, .{ bin_op.lhs, bin_op.rhs, .none });
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}
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const mcvs = try self.mcvsForBinMathOp(inst, bin_op.lhs, bin_op.rhs);
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var dst_mcv = mcvs.dst;
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const src_mcv = mcvs.src;
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// TODO clean this up
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// TODO take into account alignment
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const dst_ty = self.air.typeOfIndex(inst);
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const elem_size = dst_ty.elemType2().abiSize(self.target.*);
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const dst_reg = blk: {
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switch (dst_mcv) {
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.register => |reg| break :blk reg,
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else => {
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src_mcv.freezeIfRegister(&self.register_manager);
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defer src_mcv.freezeIfRegister(&self.register_manager);
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const reg = try self.copyToTmpRegister(dst_ty, dst_mcv);
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break :blk reg;
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},
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}
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};
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try self.genIMulOpMir(dst_ty, .{ .register = dst_reg }, .{ .immediate = elem_size });
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dst_mcv = .{ .register = dst_reg };
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try self.genBinMathOpMir(.add, dst_ty, dst_mcv, src_mcv);
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return self.finishAir(inst, dst_mcv, .{ bin_op.lhs, bin_op.rhs, .none });
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}
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fn airPtrSub(self: *Self, inst: Air.Inst.Index) !void {
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const bin_op = self.air.instructions.items(.data)[inst].bin_op;
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if (self.liveness.isUnused(inst)) {
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return self.finishAir(inst, .dead, .{ bin_op.lhs, bin_op.rhs, .none });
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}
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const mcvs = try self.mcvsForBinMathOp(inst, bin_op.lhs, bin_op.rhs);
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var dst_mcv = mcvs.dst;
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const src_mcv = mcvs.src;
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// TODO clean this up
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// TODO take into account alignment
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const dst_ty = self.air.typeOfIndex(inst);
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const elem_size = dst_ty.elemType2().abiSize(self.target.*);
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const dst_reg = blk: {
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switch (dst_mcv) {
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.register => |reg| break :blk reg,
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else => {
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src_mcv.freezeIfRegister(&self.register_manager);
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defer src_mcv.freezeIfRegister(&self.register_manager);
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const reg = try self.copyToTmpRegister(dst_ty, dst_mcv);
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break :blk reg;
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},
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}
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};
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try self.genIMulOpMir(dst_ty, .{ .register = dst_reg }, .{ .immediate = elem_size });
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dst_mcv = .{ .register = dst_reg };
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try self.genBinMathOpMir(.sub, dst_ty, dst_mcv, src_mcv);
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return self.finishAir(inst, dst_mcv, .{ bin_op.lhs, bin_op.rhs, .none });
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}
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fn airSlice(self: *Self, inst: Air.Inst.Index) !void {
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const ty_pl = self.air.instructions.items(.data)[inst].ty_pl;
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const bin_op = self.air.extraData(Air.Bin, ty_pl.payload).data;
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@@ -2148,18 +2214,17 @@ fn airStructFieldVal(self: *Self, inst: Air.Inst.Index) !void {
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return self.finishAir(inst, result, .{ extra.struct_operand, .none, .none });
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}
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/// Perform "binary" operators, excluding comparisons.
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/// Currently, the following ops are supported:
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/// ADD, SUB, XOR, OR, AND
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fn genBinMathOp(self: *Self, inst: Air.Inst.Index, op_lhs: Air.Inst.Ref, op_rhs: Air.Inst.Ref) !MCValue {
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// We'll handle these ops in two steps.
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// 1) Prepare an output location (register or memory)
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// This location will be the location of the operand that dies (if one exists)
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// or just a temporary register (if one doesn't exist)
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// 2) Perform the op with the other argument
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// 3) Sometimes, the output location is memory but the op doesn't support it.
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// In this case, copy that location to a register, then perform the op to that register instead.
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//
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const BinMathOpMCValuePair = struct {
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dst: MCValue,
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src: MCValue,
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};
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fn mcvsForBinMathOp(
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self: *Self,
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inst: Air.Inst.Index,
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op_lhs: Air.Inst.Ref,
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op_rhs: Air.Inst.Ref,
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) !BinMathOpMCValuePair {
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// TODO: make this algorithm less bad
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const lhs = try self.resolveInst(op_lhs);
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const rhs = try self.resolveInst(op_rhs);
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@@ -2218,35 +2283,26 @@ fn genBinMathOp(self: *Self, inst: Air.Inst.Index, op_lhs: Air.Inst.Ref, op_rhs:
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dst_mcv.freezeIfRegister(&self.register_manager);
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defer dst_mcv.unfreezeIfRegister(&self.register_manager);
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const tmp_reg = try self.copyToTmpRegister(Type.u64, src_mcv);
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src_mcv = MCValue{ .register = tmp_reg };
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src_mcv = try self.copyToNewRegister(inst, Type.u64, src_mcv);
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}
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},
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else => {},
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}
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// Now for step 2, we assing an MIR instruction
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const air_tags = self.air.instructions.items(.tag);
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switch (air_tags[inst]) {
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.ptr_add => {
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// TODO clean this up
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// TODO take into account alignment
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const elem_size = dst_ty.elemType2().abiSize(self.target.*);
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const dst_reg = blk: {
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switch (dst_mcv) {
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.register => |reg| break :blk reg,
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else => {
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src_mcv.freezeIfRegister(&self.register_manager);
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defer src_mcv.freezeIfRegister(&self.register_manager);
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const reg = try self.copyToTmpRegister(dst_ty, dst_mcv);
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break :blk reg;
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},
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}
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};
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try self.genIMulOpMir(dst_ty, .{ .register = dst_reg }, .{ .immediate = elem_size });
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dst_mcv = MCValue{ .register = dst_reg };
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try self.genBinMathOpMir(.add, dst_ty, dst_mcv, src_mcv);
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},
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return BinMathOpMCValuePair{ .dst = dst_mcv, .src = src_mcv };
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}
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/// Perform "binary" operators, excluding comparisons.
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/// Currently, the following ops are supported:
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/// ADD, SUB, XOR, OR, AND
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fn genBinMathOp(self: *Self, inst: Air.Inst.Index, op_lhs: Air.Inst.Ref, op_rhs: Air.Inst.Ref) !MCValue {
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const dst_ty = self.air.typeOfIndex(inst);
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const mcvs = try self.mcvsForBinMathOp(inst, op_lhs, op_rhs);
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const dst_mcv = mcvs.dst;
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const src_mcv = mcvs.src;
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log.warn("dst_mcv = {}, src_mcv = {}", .{ dst_mcv, src_mcv });
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const tag = self.air.instructions.items(.tag)[inst];
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switch (tag) {
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.add, .addwrap => try self.genBinMathOpMir(.add, dst_ty, dst_mcv, src_mcv),
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.bool_or, .bit_or => try self.genBinMathOpMir(.@"or", dst_ty, dst_mcv, src_mcv),
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.bool_and, .bit_and => try self.genBinMathOpMir(.@"and", dst_ty, dst_mcv, src_mcv),
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@@ -2255,7 +2311,6 @@ fn genBinMathOp(self: *Self, inst: Air.Inst.Index, op_lhs: Air.Inst.Ref, op_rhs:
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.mul, .mulwrap => try self.genIMulOpMir(dst_ty, dst_mcv, src_mcv),
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else => unreachable,
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}
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return dst_mcv;
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}
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