commit 1e2bac615399e0631c5474bcc952b6de3b0df8a7 (tree) parent 0511b3cc9bc49809f0e88cca4da75da790a04dd7 Author: Alex Rønne Petersen <alex@alexrp.com> Date: Tue, 26 May 2026 13:40:20 +0200 libc: update NetBSD headers to 11.0 Diffstat:
711 files changed, 36733 insertions(+), 22875 deletions(-)
diff --git a/lib/libc/include/aarch64-netbsd-none/aarch64/armreg.h b/lib/libc/include/aarch64-netbsd-none/aarch64/armreg.h @@ -1,4 +1,4 @@ -/* $NetBSD: armreg.h,v 1.63 2022/12/01 00:32:52 ryo Exp $ */ +/* $NetBSD: armreg.h,v 1.67 2025/02/27 08:39:54 andvar Exp $ */ /*- * Copyright (c) 2014 The NetBSD Foundation, Inc. @@ -229,7 +229,13 @@ AARCH64REG_READ_INLINE(clidr_el1) #define CLIDR_TYPE_IDCACHE 3 // Separate inst and data caches #define CLIDR_TYPE_UNIFIEDCACHE 4 // Unified cache +AARCH64REG_READ_INLINE(contextidr_el1) +AARCH64REG_WRITE_INLINE(contextidr_el1) + AARCH64REG_READ_INLINE(currentel) + +#define CURRENTEL_EL __BITS(3,2) // Current exception Level + AARCH64REG_READ_INLINE(id_aa64afr0_el1) AARCH64REG_READ_INLINE(id_aa64afr1_el1) AARCH64REG_READ_INLINE(id_aa64dfr0_el1) @@ -619,7 +625,7 @@ AARCH64REG_WRITE_INLINE3(APGAKeyHi_EL1, apgakeyhi_el1, ATTR_ARCH("armv8.3-a")) AARCH64REG_READ_INLINE3(pan, pan, ATTR_ARCH("armv8.1-a")) AARCH64REG_WRITE_INLINE3(pan, pan, ATTR_ARCH("armv8.1-a")) -AARCH64REG_READ_INLINE(cpacr_el1) // Coprocessor Access Control Regiser +AARCH64REG_READ_INLINE(cpacr_el1) // Coprocessor Access Control Register AARCH64REG_WRITE_INLINE(cpacr_el1) #define CPACR_TTA __BIT(28) // System Register Access Traps @@ -661,6 +667,8 @@ AARCH64REG_WRITE_INLINE(esr_el1) #define ESR_EC_CP14_DT 0x06 // A32: LDC/STC access to CP14 #define ESR_EC_FP_ACCESS 0x07 // AXX: Access to SIMD/FP Registers #define ESR_EC_FPID 0x08 // A32: MCR/MRC access to CP10 !EC=7 +#define ESR_EC_PAUTH 0x09 // A64: Pointer auth trap (FEAT_PAUTH) +#define ESR_EC_LS64 0x0a // AXX: LD64B/ST64B instruction (FEAT_LS64) // XXXNH #define ESR_EC_CP14_RRT 0x0c // A32: MRRC access to CP14 #define ESR_EC_BTE_A64 0x0d // A64: Branch Target Exception (V8.5) #define ESR_EC_ILL_STATE 0x0e // AXX: Illegal Execution State @@ -671,29 +679,54 @@ AARCH64REG_WRITE_INLINE(esr_el1) #define ESR_EC_HVC_A64 0x16 // A64: HVC Instruction Execution #define ESR_EC_SMC_A64 0x17 // A64: SMC Instruction Execution #define ESR_EC_SYS_REG 0x18 // A64: MSR/MRS/SYS instruction (!EC0/1/7) -#define ESR_EC_INSN_ABT_EL0 0x20 // AXX: Instruction Abort (EL0) -#define ESR_EC_INSN_ABT_EL1 0x21 // AXX: Instruction Abort (EL1) +#define ESR_EC_SVE 0x19 // AXX: SVE Instruction Execution (FEAT_SVE) +#define ESR_EC_PAUTH_ERET 0x1a // A64: ERET/ERETAA/ERETAB (FEAT_PAUTH and FEAT_NV) +#define ESR_EC_TME 0x1b // A64: TSTART instruction (FEAT_TME) +#define ESR_EC_FRAC 0x1c // A64: Pointer auth trap (FEAT_FPAC) +#define ESR_EC_SME 0x1d // AXX: Access to SME (FEAT_SME) +#define ESR_EC_RME 0x1e // A64: Granule Protection Check (FEAT_RME) +#define ESR_EC_INSN_ABT_EL_LOW 0x20 // AXX: Instruction Abort from lower level +#define ESR_EC_INSN_ABT_EL_CUR 0x21 // AXX: Instruction Abort from current level #define ESR_EC_PC_ALIGNMENT 0x22 // AXX: Misaligned PC -#define ESR_EC_DATA_ABT_EL0 0x24 // AXX: Data Abort (EL0) -#define ESR_EC_DATA_ABT_EL1 0x25 // AXX: Data Abort (EL1) -#define ESR_EC_SP_ALIGNMENT 0x26 // AXX: Misaligned SP +#define ESR_EC_DATA_ABT_EL_LOW 0x24 // AXX: Data Abort from lower level +#define ESR_EC_DATA_ABT_EL_CUR 0x25 // AXX: Data Abort from current level +#define ESR_EC_SP_ALIGNMENT 0x26 // AXX: Misaligned SP +#define ESR_EC_MOPS 0x27 // A64: Memory Operation Exception (FEAT_MOPS) #define ESR_EC_FP_TRAP_A32 0x28 // A32: FP Exception #define ESR_EC_FP_TRAP_A64 0x2c // A64: FP Exception -#define ESR_EC_SERROR 0x2f // AXX: SError Interrupt -#define ESR_EC_BRKPNT_EL0 0x30 // AXX: Breakpoint Exception (EL0) -#define ESR_EC_BRKPNT_EL1 0x31 // AXX: Breakpoint Exception (EL1) -#define ESR_EC_SW_STEP_EL0 0x32 // AXX: Software Step (EL0) -#define ESR_EC_SW_STEP_EL1 0x33 // AXX: Software Step (EL1) -#define ESR_EC_WTCHPNT_EL0 0x34 // AXX: Watchpoint (EL0) -#define ESR_EC_WTCHPNT_EL1 0x35 // AXX: Watchpoint (EL1) +#define ESR_EC_SERROR 0x2f // AXX: SError Interrupt +#define ESR_EC_BRKPNT_EL_LOW 0x30 // AXX: Breakpoint Exception from lower level +#define ESR_EC_BRKPNT_EL_CUR 0x31 // AXX: Breakpoint Exception from current level +#define ESR_EC_SW_STEP_EL_LOW 0x32 // AXX: Software Step from lower level +#define ESR_EC_SW_STEP_EL_CUR 0x33 // AXX: Software Step from current level +#define ESR_EC_WTCHPNT_EL_LOW 0x34 // AXX: Watchpoint from lower level +#define ESR_EC_WTCHPNT_EL_CUR 0x35 // AXX: Watchpoint from current level #define ESR_EC_BKPT_INSN_A32 0x38 // A32: BKPT Instruction Execution #define ESR_EC_VECTOR_CATCH 0x3a // A32: Vector Catch Exception #define ESR_EC_BKPT_INSN_A64 0x3c // A64: BKPT Instruction Execution +/* alias for EL1 kernel */ +#define ESR_EC_INSN_ABT_EL0 ESR_EC_INSN_ABT_EL_LOW +#define ESR_EC_INSN_ABT_EL1 ESR_EC_INSN_ABT_EL_CUR +#define ESR_EC_DATA_ABT_EL0 ESR_EC_DATA_ABT_EL_LOW +#define ESR_EC_DATA_ABT_EL1 ESR_EC_DATA_ABT_EL_CUR +#define ESR_EC_BRKPNT_EL0 ESR_EC_BRKPNT_EL_LOW +#define ESR_EC_BRKPNT_EL1 ESR_EC_BRKPNT_EL_CUR +#define ESR_EC_SW_STEP_EL0 ESR_EC_SW_STEP_EL_LOW +#define ESR_EC_SW_STEP_EL1 ESR_EC_SW_STEP_EL_CUR +#define ESR_EC_WTCHPNT_EL0 ESR_EC_WTCHPNT_EL_LOW +#define ESR_EC_WTCHPNT_EL1 ESR_EC_WTCHPNT_EL_CUR #define ESR_IL __BIT(25) // Instruction Length (1=32-bit) #define ESR_ISS __BITS(24,0) // Instruction Specific Syndrome #define ESR_ISS_CV __BIT(24) // common #define ESR_ISS_COND __BITS(23,20) // common #define ESR_ISS_WFX_TRAP_INSN __BIT(0) // for ESR_EC_WFX +#define ESR_ISS_SYSREG_OP0 __BITS(21,20) // for ESR_EC_SYS_REG +#define ESR_ISS_SYSREG_OP2 __BITS(19,17) // for ESR_EC_SYS_REG +#define ESR_ISS_SYSREG_OP1 __BITS(16,14) // for ESR_EC_SYS_REG +#define ESR_ISS_SYSREG_CRN __BITS(13,10) // for ESR_EC_SYS_REG +#define ESR_ISS_SYSREG_RT __BITS(9,5) // for ESR_EC_SYS_REG +#define ESR_ISS_SYSREG_CRM __BITS(4,1) // for ESR_EC_SYS_REG +#define ESR_ISS_SYSREG_DIRECTION __BIT(0) // for ESR_EC_SYS_REG #define ESR_ISS_MRC_OPC2 __BITS(19,17) // for ESR_EC_CP15_RT #define ESR_ISS_MRC_OPC1 __BITS(16,14) // for ESR_EC_CP15_RT #define ESR_ISS_MRC_CRN __BITS(13,10) // for ESR_EC_CP15_RT @@ -713,7 +746,7 @@ AARCH64REG_WRITE_INLINE(esr_el1) #define ESR_ISS_DATAABORT_ISV __BIT(24) // for ESC_RC_DATA_ABT_EL[01] #define ESR_ISS_DATAABORT_SAS __BITS(23,22) // for ESC_RC_DATA_ABT_EL[01] #define ESR_ISS_DATAABORT_SSE __BIT(21) // for ESC_RC_DATA_ABT_EL[01] -#define ESR_ISS_DATAABORT_SRT __BITS(19,16) // for ESC_RC_DATA_ABT_EL[01] +#define ESR_ISS_DATAABORT_SRT __BITS(20,16) // for ESC_RC_DATA_ABT_EL[01] #define ESR_ISS_DATAABORT_SF __BIT(15) // for ESC_RC_DATA_ABT_EL[01] #define ESR_ISS_DATAABORT_AR __BIT(14) // for ESC_RC_DATA_ABT_EL[01] #define ESR_ISS_DATAABORT_EA __BIT(9) // for ESC_RC_DATA_ABT_EL[01] @@ -758,6 +791,101 @@ AARCH64REG_WRITE_INLINE(esr_el1) AARCH64REG_READ_INLINE(far_el1) // Fault Address Register AARCH64REG_WRITE_INLINE(far_el1) +AARCH64REG_READ_INLINE(far_el2) +AARCH64REG_WRITE_INLINE(far_el2) + +AARCH64REG_READ_INLINE(hcr_el2) // Hypervisor Configuration Register +AARCH64REG_WRITE_INLINE(hcr_el2) + +#define HCR_EL2_TWEDEL __BITS(63,60) // TWE Delay (FEAT_TWED) +#define HCR_EL2_TWEDEN __BIT(59) // TWE Delay Enable (FEAT_TWED) +#define HCR_EL2_TID5 __BIT(58) // Trap ID group 5 (FEAT_MTE2) +#define HCR_EL2_DCT __BIT(57) // Default Cacheability Tagging (FEAT_MTE2) +#define HCR_EL2_ATA __BIT(56) // Allocation Tag Access (FEAT_MTE2) +#define HCR_EL2_TTLBOS __BIT(55) // Trap TLB maintenance OS (FEAT_EVT) +#define HCR_EL2_TTLBIS __BIT(54) // Trap TLB maintenance IS (FEAT_EVT) +#define HCR_EL2_ENSCXT __BIT(53) // Enable SCXTNUM_EL[01] access (FEAT_CSV2) +#define HCR_EL2_TOCU __BIT(52) // Trap PoU cache maintenance +#define HCR_EL2_AMVOFFEN __BIT(51) // Activity Monitors Virtual Offsets Enable (FEAT_AMUv1p1) +#define HCR_EL2_TICAB __BIT(50) // Trap IC all broadcast maintenance. +#define HCR_EL2_TID4 __BIT(49) // Trap ID group 4 (FEAT_EVT) +#define HCR_EL2_GPF __BIT(48) // Granule Protection Faults (FEAT_RME) +#define HCR_EL2_FIEN __BIT(47) // Fault Injection Enable (FEAT_RASv1p1) +#define HCR_EL2_FWB __BIT(46) // Forced Write-Back (FEAT_S2FWB) +#define HCR_EL2_NV2 __BIT(45) // Nested Virtualization (FEAT_NV2) +#define HCR_EL2_AT __BIT(44) // Address Translation (FEAT_NV) +#define HCR_EL2_NV1 __BIT(43) // Nested Virtualization (FEAT_NV2/FEAT_NV) +#define HCR_EL2_NV __BIT(42) // Nested Virtualization (FEAT_NV2/FEAT_NV) +#define HCR_EL2_API __BIT(41) // Pointer Authentication instruction (FEAT_PAuth) +#define HCR_EL2_APK __BIT(40) // Pointer Authentication key (FEAT_PAuth) +#define HCR_EL2_TME __BIT(39) // TME enable (FEAT_TME) +#define HCR_EL2_MIOCNCE __BIT(38) // Mismatched Inner/Outer Cacheable Non-Coherency Enable, +#define HCR_EL2_TEA __BIT(37) // Route synchronous External abort exceptions to EL2 (FEAT_RAS) +#define HCR_EL2_TERR __BIT(36) // Trap accesses of Error Record registers (FEAT_RAS) +#define HCR_EL2_TLOR __BIT(35) // Trap LOR registers (FEAT_LOR) +#define HCR_EL2_VHE __BIT(34) // EL2 Host (FEAT_VHE) +#define HCR_EL2_ID __BIT(33) // stage2 IC disable +#define HCR_EL2_CD __BIT(32) // stage2 DC disable +#define HCR_EL2_RW __BIT(31) // register width +#define HCR_EL2_TRVM __BIT(30) // trap VM control regs read +#define HCR_EL2_HCD __BIT(29) // HVC disable +#define HCR_EL2_TDZ __BIT(28) // trap DC ZVA +#define HCR_EL2_TGE __BIT(27) // trap general exceptions +#define HCR_EL2_TVM __BIT(26) // trap VM control regs write +#define HCR_EL2_TTLB __BIT(25) // trap TLB maintenance op +#define HCR_EL2_TPU __BIT(24) // trap IC {IVAU,IALLU,IALLUIS},DC CVAU +#define HCR_EL2_TPC __BIT(23) // trap DC {IVAC,CIVAC,CVAC} +#define HCR_EL2_TSW __BIT(22) // trap DC {ISW,CSW,CISW} +#define HCR_EL2_TACR __BIT(21) // trap ACTRL_EL1 access +#define HCR_EL2_TIDCP __BIT(20) // trap IMPLEMENTATION DEFINED system regs +#define HCR_EL2_TSC __BIT(19) // trap SMC +#define HCR_EL2_TID3 __BIT(18) // trap ID group3 regs +#define HCR_EL2_TID2 __BIT(17) // trap ID group2 regs +#define HCR_EL2_TID1 __BIT(16) // trap ID group1 regs +#define HCR_EL2_TID0 __BIT(15) // trap ID group0 regs +#define HCR_EL2_TWE __BIT(14) // trap WFE +#define HCR_EL2_TWI __BIT(13) // trap WFI +#define HCR_EL2_DC __BIT(12) // default cacheablility +#define HCR_EL2_BSU __BITS(11,10) // barrier shareability upgrade +#define HCR_EL2_FB __BIT(9) // force broadcast TLBI and IC +#define HCR_EL2_VSE __BIT(8) // inject Virtual SError +#define HCR_EL2_VI __BIT(7) // inject Virtual IRQ +#define HCR_EL2_VF __BIT(6) // inject Virtual FIQ +#define HCR_EL2_AMO __BIT(5) // trap SError/AsyncAbort +#define HCR_EL2_IMO __BIT(4) // trap IRQ +#define HCR_EL2_FMO __BIT(3) // trap FIQ +#define HCR_EL2_PTW __BIT(2) // Protect table walk +#define HCR_EL2_SWIO __BIT(1) // override DC ISW to DC CISW +#define HCR_EL2_VM __BIT(0) // enable stage2 translation + +AARCH64REG_READ_INLINE(hpfar_el2) // Hypervisor IPA Fault Address Register +AARCH64REG_WRITE_INLINE(hpfar_el2) + +#define HPFAR_EL2_NS __BIT(63) // Faulting IPA address space (FEAT_SEL2) +#define HPFAR_EL2_FIPA_D128 __BITS(47,4) // Faulting Intermediate Physical Address Bits [55:12] +#define HPFAR_EL2_FIPA __BITS(43,4) // Faulting Intermediate Physical Address Bits [51:12] +#define HPFAR_EL2_FIPA_BITSHIFT 12 + + +AARCH64REG_READ_INLINE(hstr_el2) // Hypervisor System Trap Register +AARCH64REG_WRITE_INLINE(hstr_el2) + +#define HSTR_EL2_T15 __BIT(15) +// __BIT(14) Res0 +#define HSTR_EL2_T13 __BIT(13) +#define HSTR_EL2_T12 __BIT(12) +#define HSTR_EL2_T11 __BIT(11) +#define HSTR_EL2_T10 __BIT(10) +#define HSTR_EL2_T9 __BIT(9) +#define HSTR_EL2_T8 __BIT(8) +#define HSTR_EL2_T7 __BIT(7) +#define HSTR_EL2_T6 __BIT(6) +#define HSTR_EL2_T5 __BIT(5) +// __BIT(4) Res0 +#define HSTR_EL2_T3 __BIT(3) +#define HSTR_EL2_T2 __BIT(2) +#define HSTR_EL2_T1 __BIT(1) +#define HSTR_EL2_T0 __BIT(0) AARCH64REG_READ_INLINE2(l2ctlr_el1, s3_1_c11_c0_2) // Cortex-A53,57,72,73 AARCH64REG_WRITE_INLINE2(l2ctlr_el1, s3_1_c11_c0_2) // Cortex-A53,57,72,73 @@ -770,6 +898,12 @@ AARCH64REG_WRITE_INLINE2(l2ctlr_el1, s3_1_c11_c0_2) // Cortex-A53,57,72,73 AARCH64REG_READ_INLINE(mair_el1) // Memory Attribute Indirection Register AARCH64REG_WRITE_INLINE(mair_el1) +AARCH64REG_READ_INLINE(mair_el2) +AARCH64REG_WRITE_INLINE(mair_el2) +AARCH64REG_READ_INLINE(amair_el1) // Auxiliary MAIR +AARCH64REG_WRITE_INLINE(amair_el1) +AARCH64REG_READ_INLINE(amair_el2) +AARCH64REG_WRITE_INLINE(amair_el2) #define MAIR_ATTR0 __BITS(7,0) #define MAIR_ATTR1 __BITS(15,8) @@ -791,6 +925,7 @@ AARCH64REG_WRITE_INLINE(par_el1) #define PAR_ATTR __BITS(63,56) // F=0 memory attributes #define PAR_PA __BITS(51,12) // F=0 physical address #define PAR_PA_SHIFT 12 +#define PAR_PA_LOWMASK __BITS(11,0) #define PAR_NS __BIT(9) // F=0 non-secure #define PAR_SH __BITS(8,7) // F=0 shareability attribute #define PAR_SH_NONE 0 @@ -808,13 +943,19 @@ AARCH64REG_WRITE_INLINE(rmr_el1) AARCH64REG_READ_INLINE(rvbar_el1) // Reset Vector Base Address Register AARCH64REG_WRITE_INLINE(rvbar_el1) -AARCH64REG_ATWRITE_INLINE(s1e0r); // Address Translate Stages 1 -AARCH64REG_ATWRITE_INLINE(s1e0w); -AARCH64REG_ATWRITE_INLINE(s1e1r); -AARCH64REG_ATWRITE_INLINE(s1e1w); +AARCH64REG_ATWRITE_INLINE(s1e0r) // Address Translate Stages 1 EL0 +AARCH64REG_ATWRITE_INLINE(s1e0w) +AARCH64REG_ATWRITE_INLINE(s1e1r) // Address Translate Stages 1 EL1 +AARCH64REG_ATWRITE_INLINE(s1e1w) +AARCH64REG_ATWRITE_INLINE(s12e0r) // Address Translate Stages 1 and 2 EL0 +AARCH64REG_ATWRITE_INLINE(s12e0w) +AARCH64REG_ATWRITE_INLINE(s12e1r) // Address Translate Stages 1 and 2 EL1 +AARCH64REG_ATWRITE_INLINE(s12e1w) AARCH64REG_READ_INLINE(sctlr_el1) // System Control Register AARCH64REG_WRITE_INLINE(sctlr_el1) +AARCH64REG_READ_INLINE(sctlr_el2) +AARCH64REG_WRITE_INLINE(sctlr_el2) #define SCTLR_RES0 0xc8222400 // Reserved ARMv8.0, write 0 #define SCTLR_RES1 0x30d00800 // Reserved ARMv8.0, write 1 @@ -869,6 +1010,8 @@ reg_sp_read(void) AARCH64REG_READ_INLINE(sp_el0) // EL0 Stack Pointer AARCH64REG_WRITE_INLINE(sp_el0) +AARCH64REG_READ_INLINE(sp_el1) // EL1 Stack Pointer +AARCH64REG_WRITE_INLINE(sp_el1) AARCH64REG_READ_INLINE(spsel) // Stack Pointer Select AARCH64REG_WRITE_INLINE(spsel) @@ -921,10 +1064,12 @@ AARCH64REG_WRITE_INLINE(spsr_el1) #define SPSR_M_FIQ32 0x11 #define SPSR_M_USR32 0x10 +#define SPSR_USER_P(spsr) (((spsr) & (SPSR_M & ~SPSR_A32)) == 0) +#define SPSR_PRIVILEGED_P(spsr) (!SPSR_USER_P((spsr))) + AARCH64REG_READ_INLINE(tcr_el1) // Translation Control Register AARCH64REG_WRITE_INLINE(tcr_el1) - /* TCR_EL1 - Translation Control Register */ #define TCR_TCMA1 __BIT(58) /* ARMv8.5-MemTag control when ADDR[59:55] = 0b11111 */ #define TCR_TCMA0 __BIT(57) /* ARMv8.5-MemTag control when ADDR[59:55] = 0b00000 */ @@ -999,15 +1144,60 @@ AARCH64REG_WRITE_INLINE(tcr_el1) #define TCR_EPD0 __BIT(7) /* Walk Disable for TTBR0 */ #define TCR_T0SZ __BITS(5,0) /* Size offset for TTBR0_EL1 */ +AARCH64REG_READ_INLINE(tcr_el2) // Translation Control Register EL2 +AARCH64REG_WRITE_INLINE(tcr_el2) + +/* TCR_EL2 - Translation Control Register */ +// __BITS(63, 34) // Res0 +#define TCR_EL2_MTX __BIT(33) // Extended memory tag checking +#define TCR_EL2_DS __BIT(32) // 52-bit output address (FEAT_LPA2) +// __BIT(31) // Res1 +#define TCR_EL2_TCMA __BIT(30) // Unchecked accesses control (FEAT_MTE2) +#define TCR_EL2_TBID __BIT(29) // Top Byte Instruction address matching (FEAT_PAuth) +#define TCR_EL2_HWU62 __BIT(28) // Hardware use bit 62 (FEAT_HPDS2) +#define TCR_EL2_HWU61 __BIT(27) // Hardware use bit 61 (FEAT_HPDS2) +#define TCR_EL2_HWU60 __BIT(26) // Hardware use bit 60 (FEAT_HPDS2) +#define TCR_EL2_HWU59 __BIT(25) // Hardware use bit 59 (FEAT_HPDS2) +#define TCR_EL2_HPD __BIT(24) // Hierarchical Permission Disables (FEAT_HPDS) +// __BIT(23) // Res1 +#define TCR_EL2_HD __BIT(22) // Hardware management of dirty state (FEAT_HAFDBS) +#define TCR_EL2_HA __BIT(21) // Hardware Access flag update (FEAT_HAFDBS) +#define TCR_EL2_TBI __BIT(20) // Top Byte Ignored +// __BIT(19) // Res1 +#define TCR_EL2_PS __BITS(18,16) // Physical Address Size +#define TCR_EL2_TG0 __BITS(15,14) // TTBR0_EL2 Granule size +#define TCR_EL2_TG0_4KB __SHIFTIN(0,TCR_EL2_TG0) // 4KB page size +#define TCR_EL2_TG0_64KB __SHIFTIN(1,TCR_EL2_TG0) // 64KB page size +#define TCR_EL2_TG0_16KB __SHIFTIN(2,TCR_EL2_TG0) // 16KB page size +#define TCR_EL2_SH0 __BITS(13,12) // TTBR0_EL2 Shareability attribute +#define TCR_EL2_SH0_NONE __SHIFTIN(0,TCR_EL2_SH0) // non-shareable +#define TCR_EL2_SH0_OUTER __SHIFTIN(2,TCR_EL2_SH0) // Outer shareable +#define TCR_EL2_SH0_INNER __SHIFTIN(3,TCR_EL2_SH0) // Inner shareable +#define TCR_EL2_ORGN0 __BITS(11,10) // TTBR0_EL2 Outer cacheability attribute +#define TCR_EL2_ORGN0_NC __SHIFTIN(0,TCR_EL2_ORGN0) // Non Cacheable +#define TCR_EL2_ORGN0_WB_WA __SHIFTIN(1,TCR_EL2_ORGN0) // WriteBack WriteAllocate +#define TCR_EL2_ORGN0_WT __SHIFTIN(2,TCR_EL2_ORGN0) // WriteThrough +#define TCR_EL2_ORGN0_WB __SHIFTIN(3,TCR_EL2_ORGN0) // WriteBack +#define TCR_EL2_IRGN0 __BITS(9,8) // TTBR0_EL2 Inner cacheability attribute +#define TCR_EL2_IRGN0_NC __SHIFTIN(0,TCR_EL2_IRGN0) // Non Cacheable +#define TCR_EL2_IRGN0_WB_WA __SHIFTIN(1,TCR_EL2_IRGN0) // WriteBack WriteAllocate +#define TCR_EL2_IRGN0_WT __SHIFTIN(2,TCR_EL2_IRGN0) // WriteThrough +#define TCR_EL2_IRGN0_WB __SHIFTIN(3,TCR_EL2_IRGN0) // WriteBack +#define TCR_EL2_T0SZ __BITS(5,0) // TTBR0_EL2 Size offset + AARCH64REG_READ_INLINE(tpidr_el1) // Thread ID Register (EL1) AARCH64REG_WRITE_INLINE(tpidr_el1) +AARCH64REG_READ_INLINE(tpidr_el2) // Thread ID Register (EL2) +AARCH64REG_WRITE_INLINE(tpidr_el2) AARCH64REG_WRITE_INLINE(tpidrro_el0) // Thread ID Register (RO for EL0) -AARCH64REG_READ_INLINE(ttbr0_el1) // Translation Table Base Register 0 EL1 +AARCH64REG_READ_INLINE(ttbr0_el1) // Translation Table Base Register 0 EL1 AARCH64REG_WRITE_INLINE(ttbr0_el1) +AARCH64REG_READ_INLINE(ttbr0_el2) // Translation Table Base Register 0 EL2 +AARCH64REG_WRITE_INLINE(ttbr0_el2) -AARCH64REG_READ_INLINE(ttbr1_el1) // Translation Table Base Register 1 EL1 +AARCH64REG_READ_INLINE(ttbr1_el1) // Translation Table Base Register 1 EL1 AARCH64REG_WRITE_INLINE(ttbr1_el1) #define TTBR_ASID __BITS(63,48) @@ -1015,6 +1205,53 @@ AARCH64REG_WRITE_INLINE(ttbr1_el1) AARCH64REG_READ_INLINE(vbar_el1) // Vector Base Address Register AARCH64REG_WRITE_INLINE(vbar_el1) +AARCH64REG_READ_INLINE(vbar_el2) +AARCH64REG_WRITE_INLINE(vbar_el2) + +AARCH64REG_READ_INLINE(vpidr_el2) // Virtualization Processor ID Register +AARCH64REG_WRITE_INLINE(vpidr_el2) +AARCH64REG_READ_INLINE(vmpidr_el2) // Virtualization Multiprocessor ID Register +AARCH64REG_WRITE_INLINE(vmpidr_el2) +AARCH64REG_READ_INLINE(vtcr_el2) // Virtualization Translation Control Register +AARCH64REG_WRITE_INLINE(vtcr_el2) + +#define VTCR_EL2_HAFT __BIT(44) // Hardware managed Access Flag (FEAT_HAFT) +// __BITS(43, 42) // Res0 +#define VTCR_EL2_TL0 __BIT(41) // TopLevel0 permission attribute control (FEAT_THE) +#define VTCR_EL2_GCSH __BIT(40) // Assured translations for guarded control stacks (FEAT_THE+FEAT_GCS) +// __BIT(39) // Res0 +#define VTCR_EL2_D128 __BIT(38) // VMSAv9-128 (FEAT_D128) +#define VTCR_EL2_S2POE __BIT(37) // Enable stage 2 Permission Overlay (FEAT_S2POE) +#define VTCR_EL2_S2PIE __BIT(36) // Select Permission Model. (FEAT_S2PIE) +#define VTCR_EL2_TL1 __BIT(35) // TopLevel1 permission attribute control (FEAT_THE) +#define VTCR_EL2_AO __BIT(34) // AssuredOnly attribute enable (FEAT_THE) +#define VTCR_EL2_SL2 __BIT(33) // Stage 2 starting level (FEAT_LPA2) +#define VTCR_EL2_DS __BIT(32) // 52-bit output address (FEAT_LPA2) +// __BIT(31) // Res1 +#define VTCR_EL2_NSA __BIT(30) // Non-secure S2 translation output address space (FEAT_SEL2) +#define VTCR_EL2_NSW __BIT(29) // Non-secure S2 translation table address space (FEAT_SEL2) +#define VTCR_EL2_HWU62 __BIT(28) // Hardware use bit 62 (FEAT_HPDS2) +#define VTCR_EL2_HWU61 __BIT(27) // Hardware use bit 61 (FEAT_HPDS2) +#define VTCR_EL2_HWU60 __BIT(26) // Hardware use bit 60 (FEAT_HPDS2) +#define VTCR_EL2_HWU59 __BIT(25) // Hardware use bit 59 (FEAT_HPDS2) +// __BITS(24, 23) // Res0 +#define VTCR_EL2_HD __BIT(22) // Hardware Dirty state management (FEAT_HAFDBS) +#define VTCR_EL2_HA __BIT(21) // Hardware Access flag management (FEAT_HAFDBS) +#define VTCR_EL2_VS __BIT(19) // VMID size (FEAT_VMID16) +#define VTCR_EL2_PS __BITS(18,16) // Physical address Size +#define VTCR_EL2_TG0 __BITS(15,14) // VTTBR_EL2 Granule size +#define VTCR_EL2_SH0 __BITS(13,12) // V{,S}TTBR_EL2 shareability attribute +#define VTCR_EL2_ORGN0 __BITS(11,10) // V{,S}TTBR_EL2 outer cacheability +#define VTCR_EL2_IRGN0 __BITS(9,8) // V{,S}TTBR_EL2 inner cacheability +#define VTCR_EL2_SL0 __BITS(7,6) // Start Level of S2 translation lookup. +#define VTCR_EL2_T0SZ __BITS(5,0) // VTTBR_EL2 Size offset + + +AARCH64REG_READ_INLINE(vttbr_el2) // Virtualization Translation Table Base Register +AARCH64REG_WRITE_INLINE(vttbr_el2) + +#define VTTBR_VIMD __BITS(55,48) +#define VTTBR_BADDR __BITS(47,0) /* * From here on, these are DEBUG registers diff --git a/lib/libc/include/aarch64-netbsd-none/aarch64/byte_swap.h b/lib/libc/include/aarch64-netbsd-none/aarch64/byte_swap.h @@ -1,4 +1,4 @@ -/* $NetBSD: byte_swap.h,v 1.4 2017/01/17 11:09:36 rin Exp $ */ +/* $NetBSD: byte_swap.h,v 1.4.52.1 2025/12/18 19:57:53 martin Exp $ */ /*- * Copyright (c) 2014 The NetBSD Foundation, Inc. @@ -46,7 +46,8 @@ #else #ifdef __GNUC__ -#include <sys/types.h> +#include <sys/stdint.h> + __BEGIN_DECLS #define __BYTE_SWAP_U64_VARIABLE __byte_swap_u64_variable diff --git a/lib/libc/include/aarch64-netbsd-none/aarch64/cpu.h b/lib/libc/include/aarch64-netbsd-none/aarch64/cpu.h @@ -1,4 +1,4 @@ -/* $NetBSD: cpu.h,v 1.48.2.1 2024/10/13 10:43:11 martin Exp $ */ +/* $NetBSD: cpu.h,v 1.53 2024/12/30 19:17:21 jmcneill Exp $ */ /*- * Copyright (c) 2014, 2020 The NetBSD Foundation, Inc. @@ -99,6 +99,21 @@ struct aarch64_cache_info { struct aarch64_cache_unit dcache; }; +struct aarch64_low_power_idle { + uint32_t min_res; /* minimum residency */ + uint32_t wakeup_latency; /* worst case */ + uint32_t save_restore_flags; +#define LPI_SAVE_RESTORE_CORE __BIT(0) +#define LPI_SAVE_RESTORE_TRACE __BIT(1) +#define LPI_SAVE_RESTORE_GICR __BIT(2) +#define LPI_SAVE_RESTORE_GICD __BIT(3) + uint32_t reg_addr; +#define LPI_REG_ADDR_WFI 0xffffffff + + char *name; + struct evcnt events; +}; + struct cpu_info { struct cpu_data ci_data; device_t ci_dev; @@ -166,12 +181,18 @@ struct cpu_info { /* ACPI */ uint32_t ci_acpiid; /* ACPI Processor Unique ID */ + /* ACPI low power idle */ + uint32_t ci_nlpi; + struct aarch64_low_power_idle *ci_lpi; + uint64_t ci_last_idle; + /* cached system registers */ uint64_t ci_sctlr_el1; uint64_t ci_sctlr_el2; /* sysctl(9) exposed system registers */ struct aarch64_sysctl_cpu_id ci_id; +#define ci_midr ci_id.ac_midr /* cache information and function pointers */ struct aarch64_cache_info ci_cacheinfo[MAX_CACHE_LEVEL]; @@ -243,10 +264,14 @@ static inline void cpu_dosoftints(void) { #if defined(__HAVE_FAST_SOFTINTS) && !defined(__HAVE_PIC_FAST_SOFTINTS) + KDASSERT(kpreempt_disabled()); cpu_dosoftints_ci(curcpu()); #endif } +struct cpufeature_attach_args { + struct cpu_info *ci; +}; #endif /* _KERNEL */ diff --git a/lib/libc/include/aarch64-netbsd-none/aarch64/lwp_private.h b/lib/libc/include/aarch64-netbsd-none/aarch64/lwp_private.h @@ -0,0 +1,3 @@ +/* $NetBSD: lwp_private.h,v 1.1 2024/11/30 01:04:05 christos Exp $ */ + +#include <arm/lwp_private.h> +\ No newline at end of file diff --git a/lib/libc/include/aarch64-netbsd-none/aarch64/pmap.h b/lib/libc/include/aarch64-netbsd-none/aarch64/pmap.h @@ -1,4 +1,4 @@ -/* $NetBSD: pmap.h,v 1.57 2022/11/03 09:04:56 skrll Exp $ */ +/* $NetBSD: pmap.h,v 1.59 2023/08/02 15:57:21 skrll Exp $ */ /*- * Copyright (c) 2014 The NetBSD Foundation, Inc. @@ -59,12 +59,6 @@ /* Maximum number of ASIDs. Some CPUs have less.*/ #define PMAP_TLB_NUM_PIDS 65536 #define PMAP_TLB_BITMAP_LENGTH PMAP_TLB_NUM_PIDS -#define cpu_set_tlb_info(ci, ti) ((void)((ci)->ci_tlb_info = (ti))) -#if PMAP_TLB_MAX > 1 -#define cpu_tlb_info(ci) ((ci)->ci_tlb_info) -#else -#define cpu_tlb_info(ci) (&pmap_tlb0_info) -#endif static inline tlb_asid_t pmap_md_tlb_asid_max(void) @@ -80,6 +74,7 @@ pmap_md_tlb_asid_max(void) } #include <uvm/pmap/tlb.h> +#include <uvm/pmap/pmap_devmap.h> #include <uvm/pmap/pmap_tlb.h> #define KERNEL_PID 0 /* The kernel uses ASID 0 */ @@ -161,22 +156,6 @@ pmap_kvattr(pt_entry_t *ptep, vm_prot_t prot) return opte; } -/* devmap */ -struct pmap_devmap { - vaddr_t pd_va; /* virtual address */ - paddr_t pd_pa; /* physical address */ - psize_t pd_size; /* size of region */ - vm_prot_t pd_prot; /* protection code */ - u_int pd_flags; /* flags for pmap_kenter_pa() */ -}; - -void pmap_devmap_register(const struct pmap_devmap *); -void pmap_devmap_bootstrap(vaddr_t, const struct pmap_devmap *); -const struct pmap_devmap *pmap_devmap_find_pa(paddr_t, psize_t); -const struct pmap_devmap *pmap_devmap_find_va(vaddr_t, vsize_t); -vaddr_t pmap_devmap_phystov(paddr_t); -paddr_t pmap_devmap_vtophys(paddr_t); - #define L1_TRUNC_BLOCK(x) ((x) & L1_FRAME) #define L1_ROUND_BLOCK(x) L1_TRUNC_BLOCK((x) + L1_SIZE - 1) #define L2_TRUNC_BLOCK(x) ((x) & L2_FRAME) @@ -186,16 +165,7 @@ paddr_t pmap_devmap_vtophys(paddr_t); #define DEVMAP_ALIGN(x) L3_TRUNC_BLOCK((x)) #define DEVMAP_SIZE(x) L3_ROUND_BLOCK((x)) - -#define DEVMAP_ENTRY(va, pa, sz) \ - { \ - .pd_va = DEVMAP_ALIGN(va), \ - .pd_pa = DEVMAP_ALIGN(pa), \ - .pd_size = DEVMAP_SIZE(sz), \ - .pd_prot = VM_PROT_READ | VM_PROT_WRITE, \ - .pd_flags = PMAP_DEV \ - } -#define DEVMAP_ENTRY_END { 0 } +#define DEVMAP_FLAGS PMAP_DEV /* Hooks for the pool allocator */ paddr_t vtophys(vaddr_t); @@ -268,6 +238,8 @@ void pmapboot_enter_range(vaddr_t, paddr_t, psize_t, pt_entry_t, void (*)(const char *, ...) __printflike(1, 2)); int pmapboot_protect(vaddr_t, vaddr_t, vm_prot_t); +vsize_t pmap_map_chunk(vaddr_t, vaddr_t, paddr_t, vsize_t, vm_prot_t, u_int); + #if defined(DDB) void pmap_db_pte_print(pt_entry_t, int, void (*)(const char *, ...) __printflike(1, 2)); void pmap_db_pteinfo(vaddr_t, void (*)(const char *, ...) __printflike(1, 2)); @@ -415,6 +387,8 @@ void pmap_pv_track(paddr_t, psize_t); void pmap_pv_untrack(paddr_t, psize_t); void pmap_pv_protect(paddr_t, vm_prot_t); +vsize_t pmap_kenter_range(vaddr_t, paddr_t, vsize_t, vm_prot_t, u_int); + #define PMAP_MAPSIZE1 L2_SIZE /* for ddb */ diff --git a/lib/libc/include/aarch64-netbsd-none/aarch64/sljit_machdep.h b/lib/libc/include/aarch64-netbsd-none/aarch64/sljit_machdep.h @@ -1,4 +1,4 @@ -/* $NetBSD: sljit_machdep.h,v 1.3.18.2 2024/05/11 14:08:32 martin Exp $ */ +/* $NetBSD: sljit_machdep.h,v 1.5 2024/05/05 15:18:10 riastradh Exp $ */ /*- * Copyright (c) 2014 Alexander Nasonov. diff --git a/lib/libc/include/aarch64-netbsd-none/aarch64/vmparam.h b/lib/libc/include/aarch64-netbsd-none/aarch64/vmparam.h @@ -1,4 +1,4 @@ -/* $NetBSD: vmparam.h,v 1.19.4.1 2024/07/03 19:13:20 martin Exp $ */ +/* $NetBSD: vmparam.h,v 1.21 2024/06/30 09:36:43 jmcneill Exp $ */ /*- * Copyright (c) 2014 The NetBSD Foundation, Inc. @@ -151,11 +151,11 @@ * last 254MB of kernel vm area (0xfffffffff0000000-0xffffffffffe00000) * may be used for devmap. see aarch64/pmap.c:pmap_devmap_* */ -#define VM_KERNEL_IO_ADDRESS 0xfffffffff0000000L -#define VM_KERNEL_IO_SIZE (VM_MAX_KERNEL_ADDRESS - VM_KERNEL_IO_ADDRESS) +#define VM_KERNEL_IO_BASE 0xfffffffff0000000L +#define VM_KERNEL_IO_SIZE (VM_MAX_KERNEL_ADDRESS - VM_KERNEL_IO_BASE) #define VM_KERNEL_VM_BASE (0xffffc00040000000L) -#define VM_KERNEL_VM_SIZE (VM_KERNEL_IO_ADDRESS - VM_KERNEL_VM_BASE) +#define VM_KERNEL_VM_SIZE (VM_KERNEL_IO_BASE - VM_KERNEL_VM_BASE) /* virtual sizes (bytes) for various kernel submaps */ #define USRIOSIZE (PAGE_SIZE / 8) diff --git a/lib/libc/include/aarch64-netbsd-none/machine/armreg.h b/lib/libc/include/aarch64-netbsd-none/machine/armreg.h @@ -1,4 +1,4 @@ -/* $NetBSD: armreg.h,v 1.63 2022/12/01 00:32:52 ryo Exp $ */ +/* $NetBSD: armreg.h,v 1.67 2025/02/27 08:39:54 andvar Exp $ */ /*- * Copyright (c) 2014 The NetBSD Foundation, Inc. @@ -229,7 +229,13 @@ AARCH64REG_READ_INLINE(clidr_el1) #define CLIDR_TYPE_IDCACHE 3 // Separate inst and data caches #define CLIDR_TYPE_UNIFIEDCACHE 4 // Unified cache +AARCH64REG_READ_INLINE(contextidr_el1) +AARCH64REG_WRITE_INLINE(contextidr_el1) + AARCH64REG_READ_INLINE(currentel) + +#define CURRENTEL_EL __BITS(3,2) // Current exception Level + AARCH64REG_READ_INLINE(id_aa64afr0_el1) AARCH64REG_READ_INLINE(id_aa64afr1_el1) AARCH64REG_READ_INLINE(id_aa64dfr0_el1) @@ -619,7 +625,7 @@ AARCH64REG_WRITE_INLINE3(APGAKeyHi_EL1, apgakeyhi_el1, ATTR_ARCH("armv8.3-a")) AARCH64REG_READ_INLINE3(pan, pan, ATTR_ARCH("armv8.1-a")) AARCH64REG_WRITE_INLINE3(pan, pan, ATTR_ARCH("armv8.1-a")) -AARCH64REG_READ_INLINE(cpacr_el1) // Coprocessor Access Control Regiser +AARCH64REG_READ_INLINE(cpacr_el1) // Coprocessor Access Control Register AARCH64REG_WRITE_INLINE(cpacr_el1) #define CPACR_TTA __BIT(28) // System Register Access Traps @@ -661,6 +667,8 @@ AARCH64REG_WRITE_INLINE(esr_el1) #define ESR_EC_CP14_DT 0x06 // A32: LDC/STC access to CP14 #define ESR_EC_FP_ACCESS 0x07 // AXX: Access to SIMD/FP Registers #define ESR_EC_FPID 0x08 // A32: MCR/MRC access to CP10 !EC=7 +#define ESR_EC_PAUTH 0x09 // A64: Pointer auth trap (FEAT_PAUTH) +#define ESR_EC_LS64 0x0a // AXX: LD64B/ST64B instruction (FEAT_LS64) // XXXNH #define ESR_EC_CP14_RRT 0x0c // A32: MRRC access to CP14 #define ESR_EC_BTE_A64 0x0d // A64: Branch Target Exception (V8.5) #define ESR_EC_ILL_STATE 0x0e // AXX: Illegal Execution State @@ -671,29 +679,54 @@ AARCH64REG_WRITE_INLINE(esr_el1) #define ESR_EC_HVC_A64 0x16 // A64: HVC Instruction Execution #define ESR_EC_SMC_A64 0x17 // A64: SMC Instruction Execution #define ESR_EC_SYS_REG 0x18 // A64: MSR/MRS/SYS instruction (!EC0/1/7) -#define ESR_EC_INSN_ABT_EL0 0x20 // AXX: Instruction Abort (EL0) -#define ESR_EC_INSN_ABT_EL1 0x21 // AXX: Instruction Abort (EL1) +#define ESR_EC_SVE 0x19 // AXX: SVE Instruction Execution (FEAT_SVE) +#define ESR_EC_PAUTH_ERET 0x1a // A64: ERET/ERETAA/ERETAB (FEAT_PAUTH and FEAT_NV) +#define ESR_EC_TME 0x1b // A64: TSTART instruction (FEAT_TME) +#define ESR_EC_FRAC 0x1c // A64: Pointer auth trap (FEAT_FPAC) +#define ESR_EC_SME 0x1d // AXX: Access to SME (FEAT_SME) +#define ESR_EC_RME 0x1e // A64: Granule Protection Check (FEAT_RME) +#define ESR_EC_INSN_ABT_EL_LOW 0x20 // AXX: Instruction Abort from lower level +#define ESR_EC_INSN_ABT_EL_CUR 0x21 // AXX: Instruction Abort from current level #define ESR_EC_PC_ALIGNMENT 0x22 // AXX: Misaligned PC -#define ESR_EC_DATA_ABT_EL0 0x24 // AXX: Data Abort (EL0) -#define ESR_EC_DATA_ABT_EL1 0x25 // AXX: Data Abort (EL1) -#define ESR_EC_SP_ALIGNMENT 0x26 // AXX: Misaligned SP +#define ESR_EC_DATA_ABT_EL_LOW 0x24 // AXX: Data Abort from lower level +#define ESR_EC_DATA_ABT_EL_CUR 0x25 // AXX: Data Abort from current level +#define ESR_EC_SP_ALIGNMENT 0x26 // AXX: Misaligned SP +#define ESR_EC_MOPS 0x27 // A64: Memory Operation Exception (FEAT_MOPS) #define ESR_EC_FP_TRAP_A32 0x28 // A32: FP Exception #define ESR_EC_FP_TRAP_A64 0x2c // A64: FP Exception -#define ESR_EC_SERROR 0x2f // AXX: SError Interrupt -#define ESR_EC_BRKPNT_EL0 0x30 // AXX: Breakpoint Exception (EL0) -#define ESR_EC_BRKPNT_EL1 0x31 // AXX: Breakpoint Exception (EL1) -#define ESR_EC_SW_STEP_EL0 0x32 // AXX: Software Step (EL0) -#define ESR_EC_SW_STEP_EL1 0x33 // AXX: Software Step (EL1) -#define ESR_EC_WTCHPNT_EL0 0x34 // AXX: Watchpoint (EL0) -#define ESR_EC_WTCHPNT_EL1 0x35 // AXX: Watchpoint (EL1) +#define ESR_EC_SERROR 0x2f // AXX: SError Interrupt +#define ESR_EC_BRKPNT_EL_LOW 0x30 // AXX: Breakpoint Exception from lower level +#define ESR_EC_BRKPNT_EL_CUR 0x31 // AXX: Breakpoint Exception from current level +#define ESR_EC_SW_STEP_EL_LOW 0x32 // AXX: Software Step from lower level +#define ESR_EC_SW_STEP_EL_CUR 0x33 // AXX: Software Step from current level +#define ESR_EC_WTCHPNT_EL_LOW 0x34 // AXX: Watchpoint from lower level +#define ESR_EC_WTCHPNT_EL_CUR 0x35 // AXX: Watchpoint from current level #define ESR_EC_BKPT_INSN_A32 0x38 // A32: BKPT Instruction Execution #define ESR_EC_VECTOR_CATCH 0x3a // A32: Vector Catch Exception #define ESR_EC_BKPT_INSN_A64 0x3c // A64: BKPT Instruction Execution +/* alias for EL1 kernel */ +#define ESR_EC_INSN_ABT_EL0 ESR_EC_INSN_ABT_EL_LOW +#define ESR_EC_INSN_ABT_EL1 ESR_EC_INSN_ABT_EL_CUR +#define ESR_EC_DATA_ABT_EL0 ESR_EC_DATA_ABT_EL_LOW +#define ESR_EC_DATA_ABT_EL1 ESR_EC_DATA_ABT_EL_CUR +#define ESR_EC_BRKPNT_EL0 ESR_EC_BRKPNT_EL_LOW +#define ESR_EC_BRKPNT_EL1 ESR_EC_BRKPNT_EL_CUR +#define ESR_EC_SW_STEP_EL0 ESR_EC_SW_STEP_EL_LOW +#define ESR_EC_SW_STEP_EL1 ESR_EC_SW_STEP_EL_CUR +#define ESR_EC_WTCHPNT_EL0 ESR_EC_WTCHPNT_EL_LOW +#define ESR_EC_WTCHPNT_EL1 ESR_EC_WTCHPNT_EL_CUR #define ESR_IL __BIT(25) // Instruction Length (1=32-bit) #define ESR_ISS __BITS(24,0) // Instruction Specific Syndrome #define ESR_ISS_CV __BIT(24) // common #define ESR_ISS_COND __BITS(23,20) // common #define ESR_ISS_WFX_TRAP_INSN __BIT(0) // for ESR_EC_WFX +#define ESR_ISS_SYSREG_OP0 __BITS(21,20) // for ESR_EC_SYS_REG +#define ESR_ISS_SYSREG_OP2 __BITS(19,17) // for ESR_EC_SYS_REG +#define ESR_ISS_SYSREG_OP1 __BITS(16,14) // for ESR_EC_SYS_REG +#define ESR_ISS_SYSREG_CRN __BITS(13,10) // for ESR_EC_SYS_REG +#define ESR_ISS_SYSREG_RT __BITS(9,5) // for ESR_EC_SYS_REG +#define ESR_ISS_SYSREG_CRM __BITS(4,1) // for ESR_EC_SYS_REG +#define ESR_ISS_SYSREG_DIRECTION __BIT(0) // for ESR_EC_SYS_REG #define ESR_ISS_MRC_OPC2 __BITS(19,17) // for ESR_EC_CP15_RT #define ESR_ISS_MRC_OPC1 __BITS(16,14) // for ESR_EC_CP15_RT #define ESR_ISS_MRC_CRN __BITS(13,10) // for ESR_EC_CP15_RT @@ -713,7 +746,7 @@ AARCH64REG_WRITE_INLINE(esr_el1) #define ESR_ISS_DATAABORT_ISV __BIT(24) // for ESC_RC_DATA_ABT_EL[01] #define ESR_ISS_DATAABORT_SAS __BITS(23,22) // for ESC_RC_DATA_ABT_EL[01] #define ESR_ISS_DATAABORT_SSE __BIT(21) // for ESC_RC_DATA_ABT_EL[01] -#define ESR_ISS_DATAABORT_SRT __BITS(19,16) // for ESC_RC_DATA_ABT_EL[01] +#define ESR_ISS_DATAABORT_SRT __BITS(20,16) // for ESC_RC_DATA_ABT_EL[01] #define ESR_ISS_DATAABORT_SF __BIT(15) // for ESC_RC_DATA_ABT_EL[01] #define ESR_ISS_DATAABORT_AR __BIT(14) // for ESC_RC_DATA_ABT_EL[01] #define ESR_ISS_DATAABORT_EA __BIT(9) // for ESC_RC_DATA_ABT_EL[01] @@ -758,6 +791,101 @@ AARCH64REG_WRITE_INLINE(esr_el1) AARCH64REG_READ_INLINE(far_el1) // Fault Address Register AARCH64REG_WRITE_INLINE(far_el1) +AARCH64REG_READ_INLINE(far_el2) +AARCH64REG_WRITE_INLINE(far_el2) + +AARCH64REG_READ_INLINE(hcr_el2) // Hypervisor Configuration Register +AARCH64REG_WRITE_INLINE(hcr_el2) + +#define HCR_EL2_TWEDEL __BITS(63,60) // TWE Delay (FEAT_TWED) +#define HCR_EL2_TWEDEN __BIT(59) // TWE Delay Enable (FEAT_TWED) +#define HCR_EL2_TID5 __BIT(58) // Trap ID group 5 (FEAT_MTE2) +#define HCR_EL2_DCT __BIT(57) // Default Cacheability Tagging (FEAT_MTE2) +#define HCR_EL2_ATA __BIT(56) // Allocation Tag Access (FEAT_MTE2) +#define HCR_EL2_TTLBOS __BIT(55) // Trap TLB maintenance OS (FEAT_EVT) +#define HCR_EL2_TTLBIS __BIT(54) // Trap TLB maintenance IS (FEAT_EVT) +#define HCR_EL2_ENSCXT __BIT(53) // Enable SCXTNUM_EL[01] access (FEAT_CSV2) +#define HCR_EL2_TOCU __BIT(52) // Trap PoU cache maintenance +#define HCR_EL2_AMVOFFEN __BIT(51) // Activity Monitors Virtual Offsets Enable (FEAT_AMUv1p1) +#define HCR_EL2_TICAB __BIT(50) // Trap IC all broadcast maintenance. +#define HCR_EL2_TID4 __BIT(49) // Trap ID group 4 (FEAT_EVT) +#define HCR_EL2_GPF __BIT(48) // Granule Protection Faults (FEAT_RME) +#define HCR_EL2_FIEN __BIT(47) // Fault Injection Enable (FEAT_RASv1p1) +#define HCR_EL2_FWB __BIT(46) // Forced Write-Back (FEAT_S2FWB) +#define HCR_EL2_NV2 __BIT(45) // Nested Virtualization (FEAT_NV2) +#define HCR_EL2_AT __BIT(44) // Address Translation (FEAT_NV) +#define HCR_EL2_NV1 __BIT(43) // Nested Virtualization (FEAT_NV2/FEAT_NV) +#define HCR_EL2_NV __BIT(42) // Nested Virtualization (FEAT_NV2/FEAT_NV) +#define HCR_EL2_API __BIT(41) // Pointer Authentication instruction (FEAT_PAuth) +#define HCR_EL2_APK __BIT(40) // Pointer Authentication key (FEAT_PAuth) +#define HCR_EL2_TME __BIT(39) // TME enable (FEAT_TME) +#define HCR_EL2_MIOCNCE __BIT(38) // Mismatched Inner/Outer Cacheable Non-Coherency Enable, +#define HCR_EL2_TEA __BIT(37) // Route synchronous External abort exceptions to EL2 (FEAT_RAS) +#define HCR_EL2_TERR __BIT(36) // Trap accesses of Error Record registers (FEAT_RAS) +#define HCR_EL2_TLOR __BIT(35) // Trap LOR registers (FEAT_LOR) +#define HCR_EL2_VHE __BIT(34) // EL2 Host (FEAT_VHE) +#define HCR_EL2_ID __BIT(33) // stage2 IC disable +#define HCR_EL2_CD __BIT(32) // stage2 DC disable +#define HCR_EL2_RW __BIT(31) // register width +#define HCR_EL2_TRVM __BIT(30) // trap VM control regs read +#define HCR_EL2_HCD __BIT(29) // HVC disable +#define HCR_EL2_TDZ __BIT(28) // trap DC ZVA +#define HCR_EL2_TGE __BIT(27) // trap general exceptions +#define HCR_EL2_TVM __BIT(26) // trap VM control regs write +#define HCR_EL2_TTLB __BIT(25) // trap TLB maintenance op +#define HCR_EL2_TPU __BIT(24) // trap IC {IVAU,IALLU,IALLUIS},DC CVAU +#define HCR_EL2_TPC __BIT(23) // trap DC {IVAC,CIVAC,CVAC} +#define HCR_EL2_TSW __BIT(22) // trap DC {ISW,CSW,CISW} +#define HCR_EL2_TACR __BIT(21) // trap ACTRL_EL1 access +#define HCR_EL2_TIDCP __BIT(20) // trap IMPLEMENTATION DEFINED system regs +#define HCR_EL2_TSC __BIT(19) // trap SMC +#define HCR_EL2_TID3 __BIT(18) // trap ID group3 regs +#define HCR_EL2_TID2 __BIT(17) // trap ID group2 regs +#define HCR_EL2_TID1 __BIT(16) // trap ID group1 regs +#define HCR_EL2_TID0 __BIT(15) // trap ID group0 regs +#define HCR_EL2_TWE __BIT(14) // trap WFE +#define HCR_EL2_TWI __BIT(13) // trap WFI +#define HCR_EL2_DC __BIT(12) // default cacheablility +#define HCR_EL2_BSU __BITS(11,10) // barrier shareability upgrade +#define HCR_EL2_FB __BIT(9) // force broadcast TLBI and IC +#define HCR_EL2_VSE __BIT(8) // inject Virtual SError +#define HCR_EL2_VI __BIT(7) // inject Virtual IRQ +#define HCR_EL2_VF __BIT(6) // inject Virtual FIQ +#define HCR_EL2_AMO __BIT(5) // trap SError/AsyncAbort +#define HCR_EL2_IMO __BIT(4) // trap IRQ +#define HCR_EL2_FMO __BIT(3) // trap FIQ +#define HCR_EL2_PTW __BIT(2) // Protect table walk +#define HCR_EL2_SWIO __BIT(1) // override DC ISW to DC CISW +#define HCR_EL2_VM __BIT(0) // enable stage2 translation + +AARCH64REG_READ_INLINE(hpfar_el2) // Hypervisor IPA Fault Address Register +AARCH64REG_WRITE_INLINE(hpfar_el2) + +#define HPFAR_EL2_NS __BIT(63) // Faulting IPA address space (FEAT_SEL2) +#define HPFAR_EL2_FIPA_D128 __BITS(47,4) // Faulting Intermediate Physical Address Bits [55:12] +#define HPFAR_EL2_FIPA __BITS(43,4) // Faulting Intermediate Physical Address Bits [51:12] +#define HPFAR_EL2_FIPA_BITSHIFT 12 + + +AARCH64REG_READ_INLINE(hstr_el2) // Hypervisor System Trap Register +AARCH64REG_WRITE_INLINE(hstr_el2) + +#define HSTR_EL2_T15 __BIT(15) +// __BIT(14) Res0 +#define HSTR_EL2_T13 __BIT(13) +#define HSTR_EL2_T12 __BIT(12) +#define HSTR_EL2_T11 __BIT(11) +#define HSTR_EL2_T10 __BIT(10) +#define HSTR_EL2_T9 __BIT(9) +#define HSTR_EL2_T8 __BIT(8) +#define HSTR_EL2_T7 __BIT(7) +#define HSTR_EL2_T6 __BIT(6) +#define HSTR_EL2_T5 __BIT(5) +// __BIT(4) Res0 +#define HSTR_EL2_T3 __BIT(3) +#define HSTR_EL2_T2 __BIT(2) +#define HSTR_EL2_T1 __BIT(1) +#define HSTR_EL2_T0 __BIT(0) AARCH64REG_READ_INLINE2(l2ctlr_el1, s3_1_c11_c0_2) // Cortex-A53,57,72,73 AARCH64REG_WRITE_INLINE2(l2ctlr_el1, s3_1_c11_c0_2) // Cortex-A53,57,72,73 @@ -770,6 +898,12 @@ AARCH64REG_WRITE_INLINE2(l2ctlr_el1, s3_1_c11_c0_2) // Cortex-A53,57,72,73 AARCH64REG_READ_INLINE(mair_el1) // Memory Attribute Indirection Register AARCH64REG_WRITE_INLINE(mair_el1) +AARCH64REG_READ_INLINE(mair_el2) +AARCH64REG_WRITE_INLINE(mair_el2) +AARCH64REG_READ_INLINE(amair_el1) // Auxiliary MAIR +AARCH64REG_WRITE_INLINE(amair_el1) +AARCH64REG_READ_INLINE(amair_el2) +AARCH64REG_WRITE_INLINE(amair_el2) #define MAIR_ATTR0 __BITS(7,0) #define MAIR_ATTR1 __BITS(15,8) @@ -791,6 +925,7 @@ AARCH64REG_WRITE_INLINE(par_el1) #define PAR_ATTR __BITS(63,56) // F=0 memory attributes #define PAR_PA __BITS(51,12) // F=0 physical address #define PAR_PA_SHIFT 12 +#define PAR_PA_LOWMASK __BITS(11,0) #define PAR_NS __BIT(9) // F=0 non-secure #define PAR_SH __BITS(8,7) // F=0 shareability attribute #define PAR_SH_NONE 0 @@ -808,13 +943,19 @@ AARCH64REG_WRITE_INLINE(rmr_el1) AARCH64REG_READ_INLINE(rvbar_el1) // Reset Vector Base Address Register AARCH64REG_WRITE_INLINE(rvbar_el1) -AARCH64REG_ATWRITE_INLINE(s1e0r); // Address Translate Stages 1 -AARCH64REG_ATWRITE_INLINE(s1e0w); -AARCH64REG_ATWRITE_INLINE(s1e1r); -AARCH64REG_ATWRITE_INLINE(s1e1w); +AARCH64REG_ATWRITE_INLINE(s1e0r) // Address Translate Stages 1 EL0 +AARCH64REG_ATWRITE_INLINE(s1e0w) +AARCH64REG_ATWRITE_INLINE(s1e1r) // Address Translate Stages 1 EL1 +AARCH64REG_ATWRITE_INLINE(s1e1w) +AARCH64REG_ATWRITE_INLINE(s12e0r) // Address Translate Stages 1 and 2 EL0 +AARCH64REG_ATWRITE_INLINE(s12e0w) +AARCH64REG_ATWRITE_INLINE(s12e1r) // Address Translate Stages 1 and 2 EL1 +AARCH64REG_ATWRITE_INLINE(s12e1w) AARCH64REG_READ_INLINE(sctlr_el1) // System Control Register AARCH64REG_WRITE_INLINE(sctlr_el1) +AARCH64REG_READ_INLINE(sctlr_el2) +AARCH64REG_WRITE_INLINE(sctlr_el2) #define SCTLR_RES0 0xc8222400 // Reserved ARMv8.0, write 0 #define SCTLR_RES1 0x30d00800 // Reserved ARMv8.0, write 1 @@ -869,6 +1010,8 @@ reg_sp_read(void) AARCH64REG_READ_INLINE(sp_el0) // EL0 Stack Pointer AARCH64REG_WRITE_INLINE(sp_el0) +AARCH64REG_READ_INLINE(sp_el1) // EL1 Stack Pointer +AARCH64REG_WRITE_INLINE(sp_el1) AARCH64REG_READ_INLINE(spsel) // Stack Pointer Select AARCH64REG_WRITE_INLINE(spsel) @@ -921,10 +1064,12 @@ AARCH64REG_WRITE_INLINE(spsr_el1) #define SPSR_M_FIQ32 0x11 #define SPSR_M_USR32 0x10 +#define SPSR_USER_P(spsr) (((spsr) & (SPSR_M & ~SPSR_A32)) == 0) +#define SPSR_PRIVILEGED_P(spsr) (!SPSR_USER_P((spsr))) + AARCH64REG_READ_INLINE(tcr_el1) // Translation Control Register AARCH64REG_WRITE_INLINE(tcr_el1) - /* TCR_EL1 - Translation Control Register */ #define TCR_TCMA1 __BIT(58) /* ARMv8.5-MemTag control when ADDR[59:55] = 0b11111 */ #define TCR_TCMA0 __BIT(57) /* ARMv8.5-MemTag control when ADDR[59:55] = 0b00000 */ @@ -999,15 +1144,60 @@ AARCH64REG_WRITE_INLINE(tcr_el1) #define TCR_EPD0 __BIT(7) /* Walk Disable for TTBR0 */ #define TCR_T0SZ __BITS(5,0) /* Size offset for TTBR0_EL1 */ +AARCH64REG_READ_INLINE(tcr_el2) // Translation Control Register EL2 +AARCH64REG_WRITE_INLINE(tcr_el2) + +/* TCR_EL2 - Translation Control Register */ +// __BITS(63, 34) // Res0 +#define TCR_EL2_MTX __BIT(33) // Extended memory tag checking +#define TCR_EL2_DS __BIT(32) // 52-bit output address (FEAT_LPA2) +// __BIT(31) // Res1 +#define TCR_EL2_TCMA __BIT(30) // Unchecked accesses control (FEAT_MTE2) +#define TCR_EL2_TBID __BIT(29) // Top Byte Instruction address matching (FEAT_PAuth) +#define TCR_EL2_HWU62 __BIT(28) // Hardware use bit 62 (FEAT_HPDS2) +#define TCR_EL2_HWU61 __BIT(27) // Hardware use bit 61 (FEAT_HPDS2) +#define TCR_EL2_HWU60 __BIT(26) // Hardware use bit 60 (FEAT_HPDS2) +#define TCR_EL2_HWU59 __BIT(25) // Hardware use bit 59 (FEAT_HPDS2) +#define TCR_EL2_HPD __BIT(24) // Hierarchical Permission Disables (FEAT_HPDS) +// __BIT(23) // Res1 +#define TCR_EL2_HD __BIT(22) // Hardware management of dirty state (FEAT_HAFDBS) +#define TCR_EL2_HA __BIT(21) // Hardware Access flag update (FEAT_HAFDBS) +#define TCR_EL2_TBI __BIT(20) // Top Byte Ignored +// __BIT(19) // Res1 +#define TCR_EL2_PS __BITS(18,16) // Physical Address Size +#define TCR_EL2_TG0 __BITS(15,14) // TTBR0_EL2 Granule size +#define TCR_EL2_TG0_4KB __SHIFTIN(0,TCR_EL2_TG0) // 4KB page size +#define TCR_EL2_TG0_64KB __SHIFTIN(1,TCR_EL2_TG0) // 64KB page size +#define TCR_EL2_TG0_16KB __SHIFTIN(2,TCR_EL2_TG0) // 16KB page size +#define TCR_EL2_SH0 __BITS(13,12) // TTBR0_EL2 Shareability attribute +#define TCR_EL2_SH0_NONE __SHIFTIN(0,TCR_EL2_SH0) // non-shareable +#define TCR_EL2_SH0_OUTER __SHIFTIN(2,TCR_EL2_SH0) // Outer shareable +#define TCR_EL2_SH0_INNER __SHIFTIN(3,TCR_EL2_SH0) // Inner shareable +#define TCR_EL2_ORGN0 __BITS(11,10) // TTBR0_EL2 Outer cacheability attribute +#define TCR_EL2_ORGN0_NC __SHIFTIN(0,TCR_EL2_ORGN0) // Non Cacheable +#define TCR_EL2_ORGN0_WB_WA __SHIFTIN(1,TCR_EL2_ORGN0) // WriteBack WriteAllocate +#define TCR_EL2_ORGN0_WT __SHIFTIN(2,TCR_EL2_ORGN0) // WriteThrough +#define TCR_EL2_ORGN0_WB __SHIFTIN(3,TCR_EL2_ORGN0) // WriteBack +#define TCR_EL2_IRGN0 __BITS(9,8) // TTBR0_EL2 Inner cacheability attribute +#define TCR_EL2_IRGN0_NC __SHIFTIN(0,TCR_EL2_IRGN0) // Non Cacheable +#define TCR_EL2_IRGN0_WB_WA __SHIFTIN(1,TCR_EL2_IRGN0) // WriteBack WriteAllocate +#define TCR_EL2_IRGN0_WT __SHIFTIN(2,TCR_EL2_IRGN0) // WriteThrough +#define TCR_EL2_IRGN0_WB __SHIFTIN(3,TCR_EL2_IRGN0) // WriteBack +#define TCR_EL2_T0SZ __BITS(5,0) // TTBR0_EL2 Size offset + AARCH64REG_READ_INLINE(tpidr_el1) // Thread ID Register (EL1) AARCH64REG_WRITE_INLINE(tpidr_el1) +AARCH64REG_READ_INLINE(tpidr_el2) // Thread ID Register (EL2) +AARCH64REG_WRITE_INLINE(tpidr_el2) AARCH64REG_WRITE_INLINE(tpidrro_el0) // Thread ID Register (RO for EL0) -AARCH64REG_READ_INLINE(ttbr0_el1) // Translation Table Base Register 0 EL1 +AARCH64REG_READ_INLINE(ttbr0_el1) // Translation Table Base Register 0 EL1 AARCH64REG_WRITE_INLINE(ttbr0_el1) +AARCH64REG_READ_INLINE(ttbr0_el2) // Translation Table Base Register 0 EL2 +AARCH64REG_WRITE_INLINE(ttbr0_el2) -AARCH64REG_READ_INLINE(ttbr1_el1) // Translation Table Base Register 1 EL1 +AARCH64REG_READ_INLINE(ttbr1_el1) // Translation Table Base Register 1 EL1 AARCH64REG_WRITE_INLINE(ttbr1_el1) #define TTBR_ASID __BITS(63,48) @@ -1015,6 +1205,53 @@ AARCH64REG_WRITE_INLINE(ttbr1_el1) AARCH64REG_READ_INLINE(vbar_el1) // Vector Base Address Register AARCH64REG_WRITE_INLINE(vbar_el1) +AARCH64REG_READ_INLINE(vbar_el2) +AARCH64REG_WRITE_INLINE(vbar_el2) + +AARCH64REG_READ_INLINE(vpidr_el2) // Virtualization Processor ID Register +AARCH64REG_WRITE_INLINE(vpidr_el2) +AARCH64REG_READ_INLINE(vmpidr_el2) // Virtualization Multiprocessor ID Register +AARCH64REG_WRITE_INLINE(vmpidr_el2) +AARCH64REG_READ_INLINE(vtcr_el2) // Virtualization Translation Control Register +AARCH64REG_WRITE_INLINE(vtcr_el2) + +#define VTCR_EL2_HAFT __BIT(44) // Hardware managed Access Flag (FEAT_HAFT) +// __BITS(43, 42) // Res0 +#define VTCR_EL2_TL0 __BIT(41) // TopLevel0 permission attribute control (FEAT_THE) +#define VTCR_EL2_GCSH __BIT(40) // Assured translations for guarded control stacks (FEAT_THE+FEAT_GCS) +// __BIT(39) // Res0 +#define VTCR_EL2_D128 __BIT(38) // VMSAv9-128 (FEAT_D128) +#define VTCR_EL2_S2POE __BIT(37) // Enable stage 2 Permission Overlay (FEAT_S2POE) +#define VTCR_EL2_S2PIE __BIT(36) // Select Permission Model. (FEAT_S2PIE) +#define VTCR_EL2_TL1 __BIT(35) // TopLevel1 permission attribute control (FEAT_THE) +#define VTCR_EL2_AO __BIT(34) // AssuredOnly attribute enable (FEAT_THE) +#define VTCR_EL2_SL2 __BIT(33) // Stage 2 starting level (FEAT_LPA2) +#define VTCR_EL2_DS __BIT(32) // 52-bit output address (FEAT_LPA2) +// __BIT(31) // Res1 +#define VTCR_EL2_NSA __BIT(30) // Non-secure S2 translation output address space (FEAT_SEL2) +#define VTCR_EL2_NSW __BIT(29) // Non-secure S2 translation table address space (FEAT_SEL2) +#define VTCR_EL2_HWU62 __BIT(28) // Hardware use bit 62 (FEAT_HPDS2) +#define VTCR_EL2_HWU61 __BIT(27) // Hardware use bit 61 (FEAT_HPDS2) +#define VTCR_EL2_HWU60 __BIT(26) // Hardware use bit 60 (FEAT_HPDS2) +#define VTCR_EL2_HWU59 __BIT(25) // Hardware use bit 59 (FEAT_HPDS2) +// __BITS(24, 23) // Res0 +#define VTCR_EL2_HD __BIT(22) // Hardware Dirty state management (FEAT_HAFDBS) +#define VTCR_EL2_HA __BIT(21) // Hardware Access flag management (FEAT_HAFDBS) +#define VTCR_EL2_VS __BIT(19) // VMID size (FEAT_VMID16) +#define VTCR_EL2_PS __BITS(18,16) // Physical address Size +#define VTCR_EL2_TG0 __BITS(15,14) // VTTBR_EL2 Granule size +#define VTCR_EL2_SH0 __BITS(13,12) // V{,S}TTBR_EL2 shareability attribute +#define VTCR_EL2_ORGN0 __BITS(11,10) // V{,S}TTBR_EL2 outer cacheability +#define VTCR_EL2_IRGN0 __BITS(9,8) // V{,S}TTBR_EL2 inner cacheability +#define VTCR_EL2_SL0 __BITS(7,6) // Start Level of S2 translation lookup. +#define VTCR_EL2_T0SZ __BITS(5,0) // VTTBR_EL2 Size offset + + +AARCH64REG_READ_INLINE(vttbr_el2) // Virtualization Translation Table Base Register +AARCH64REG_WRITE_INLINE(vttbr_el2) + +#define VTTBR_VIMD __BITS(55,48) +#define VTTBR_BADDR __BITS(47,0) /* * From here on, these are DEBUG registers diff --git a/lib/libc/include/aarch64-netbsd-none/machine/byte_swap.h b/lib/libc/include/aarch64-netbsd-none/machine/byte_swap.h @@ -1,4 +1,4 @@ -/* $NetBSD: byte_swap.h,v 1.4 2017/01/17 11:09:36 rin Exp $ */ +/* $NetBSD: byte_swap.h,v 1.4.52.1 2025/12/18 19:57:53 martin Exp $ */ /*- * Copyright (c) 2014 The NetBSD Foundation, Inc. @@ -46,7 +46,8 @@ #else #ifdef __GNUC__ -#include <sys/types.h> +#include <sys/stdint.h> + __BEGIN_DECLS #define __BYTE_SWAP_U64_VARIABLE __byte_swap_u64_variable diff --git a/lib/libc/include/aarch64-netbsd-none/machine/cpu.h b/lib/libc/include/aarch64-netbsd-none/machine/cpu.h @@ -1,4 +1,4 @@ -/* $NetBSD: cpu.h,v 1.48.2.1 2024/10/13 10:43:11 martin Exp $ */ +/* $NetBSD: cpu.h,v 1.53 2024/12/30 19:17:21 jmcneill Exp $ */ /*- * Copyright (c) 2014, 2020 The NetBSD Foundation, Inc. @@ -99,6 +99,21 @@ struct aarch64_cache_info { struct aarch64_cache_unit dcache; }; +struct aarch64_low_power_idle { + uint32_t min_res; /* minimum residency */ + uint32_t wakeup_latency; /* worst case */ + uint32_t save_restore_flags; +#define LPI_SAVE_RESTORE_CORE __BIT(0) +#define LPI_SAVE_RESTORE_TRACE __BIT(1) +#define LPI_SAVE_RESTORE_GICR __BIT(2) +#define LPI_SAVE_RESTORE_GICD __BIT(3) + uint32_t reg_addr; +#define LPI_REG_ADDR_WFI 0xffffffff + + char *name; + struct evcnt events; +}; + struct cpu_info { struct cpu_data ci_data; device_t ci_dev; @@ -166,12 +181,18 @@ struct cpu_info { /* ACPI */ uint32_t ci_acpiid; /* ACPI Processor Unique ID */ + /* ACPI low power idle */ + uint32_t ci_nlpi; + struct aarch64_low_power_idle *ci_lpi; + uint64_t ci_last_idle; + /* cached system registers */ uint64_t ci_sctlr_el1; uint64_t ci_sctlr_el2; /* sysctl(9) exposed system registers */ struct aarch64_sysctl_cpu_id ci_id; +#define ci_midr ci_id.ac_midr /* cache information and function pointers */ struct aarch64_cache_info ci_cacheinfo[MAX_CACHE_LEVEL]; @@ -243,10 +264,14 @@ static inline void cpu_dosoftints(void) { #if defined(__HAVE_FAST_SOFTINTS) && !defined(__HAVE_PIC_FAST_SOFTINTS) + KDASSERT(kpreempt_disabled()); cpu_dosoftints_ci(curcpu()); #endif } +struct cpufeature_attach_args { + struct cpu_info *ci; +}; #endif /* _KERNEL */ diff --git a/lib/libc/include/aarch64-netbsd-none/machine/lwp_private.h b/lib/libc/include/aarch64-netbsd-none/machine/lwp_private.h @@ -0,0 +1,3 @@ +/* $NetBSD: lwp_private.h,v 1.1 2024/11/30 01:04:05 christos Exp $ */ + +#include <arm/lwp_private.h> +\ No newline at end of file diff --git a/lib/libc/include/aarch64-netbsd-none/machine/pmap.h b/lib/libc/include/aarch64-netbsd-none/machine/pmap.h @@ -1,4 +1,4 @@ -/* $NetBSD: pmap.h,v 1.57 2022/11/03 09:04:56 skrll Exp $ */ +/* $NetBSD: pmap.h,v 1.59 2023/08/02 15:57:21 skrll Exp $ */ /*- * Copyright (c) 2014 The NetBSD Foundation, Inc. @@ -59,12 +59,6 @@ /* Maximum number of ASIDs. Some CPUs have less.*/ #define PMAP_TLB_NUM_PIDS 65536 #define PMAP_TLB_BITMAP_LENGTH PMAP_TLB_NUM_PIDS -#define cpu_set_tlb_info(ci, ti) ((void)((ci)->ci_tlb_info = (ti))) -#if PMAP_TLB_MAX > 1 -#define cpu_tlb_info(ci) ((ci)->ci_tlb_info) -#else -#define cpu_tlb_info(ci) (&pmap_tlb0_info) -#endif static inline tlb_asid_t pmap_md_tlb_asid_max(void) @@ -80,6 +74,7 @@ pmap_md_tlb_asid_max(void) } #include <uvm/pmap/tlb.h> +#include <uvm/pmap/pmap_devmap.h> #include <uvm/pmap/pmap_tlb.h> #define KERNEL_PID 0 /* The kernel uses ASID 0 */ @@ -161,22 +156,6 @@ pmap_kvattr(pt_entry_t *ptep, vm_prot_t prot) return opte; } -/* devmap */ -struct pmap_devmap { - vaddr_t pd_va; /* virtual address */ - paddr_t pd_pa; /* physical address */ - psize_t pd_size; /* size of region */ - vm_prot_t pd_prot; /* protection code */ - u_int pd_flags; /* flags for pmap_kenter_pa() */ -}; - -void pmap_devmap_register(const struct pmap_devmap *); -void pmap_devmap_bootstrap(vaddr_t, const struct pmap_devmap *); -const struct pmap_devmap *pmap_devmap_find_pa(paddr_t, psize_t); -const struct pmap_devmap *pmap_devmap_find_va(vaddr_t, vsize_t); -vaddr_t pmap_devmap_phystov(paddr_t); -paddr_t pmap_devmap_vtophys(paddr_t); - #define L1_TRUNC_BLOCK(x) ((x) & L1_FRAME) #define L1_ROUND_BLOCK(x) L1_TRUNC_BLOCK((x) + L1_SIZE - 1) #define L2_TRUNC_BLOCK(x) ((x) & L2_FRAME) @@ -186,16 +165,7 @@ paddr_t pmap_devmap_vtophys(paddr_t); #define DEVMAP_ALIGN(x) L3_TRUNC_BLOCK((x)) #define DEVMAP_SIZE(x) L3_ROUND_BLOCK((x)) - -#define DEVMAP_ENTRY(va, pa, sz) \ - { \ - .pd_va = DEVMAP_ALIGN(va), \ - .pd_pa = DEVMAP_ALIGN(pa), \ - .pd_size = DEVMAP_SIZE(sz), \ - .pd_prot = VM_PROT_READ | VM_PROT_WRITE, \ - .pd_flags = PMAP_DEV \ - } -#define DEVMAP_ENTRY_END { 0 } +#define DEVMAP_FLAGS PMAP_DEV /* Hooks for the pool allocator */ paddr_t vtophys(vaddr_t); @@ -268,6 +238,8 @@ void pmapboot_enter_range(vaddr_t, paddr_t, psize_t, pt_entry_t, void (*)(const char *, ...) __printflike(1, 2)); int pmapboot_protect(vaddr_t, vaddr_t, vm_prot_t); +vsize_t pmap_map_chunk(vaddr_t, vaddr_t, paddr_t, vsize_t, vm_prot_t, u_int); + #if defined(DDB) void pmap_db_pte_print(pt_entry_t, int, void (*)(const char *, ...) __printflike(1, 2)); void pmap_db_pteinfo(vaddr_t, void (*)(const char *, ...) __printflike(1, 2)); @@ -415,6 +387,8 @@ void pmap_pv_track(paddr_t, psize_t); void pmap_pv_untrack(paddr_t, psize_t); void pmap_pv_protect(paddr_t, vm_prot_t); +vsize_t pmap_kenter_range(vaddr_t, paddr_t, vsize_t, vm_prot_t, u_int); + #define PMAP_MAPSIZE1 L2_SIZE /* for ddb */ diff --git a/lib/libc/include/aarch64-netbsd-none/machine/sljit_machdep.h b/lib/libc/include/aarch64-netbsd-none/machine/sljit_machdep.h @@ -1,4 +1,4 @@ -/* $NetBSD: sljit_machdep.h,v 1.3.18.2 2024/05/11 14:08:32 martin Exp $ */ +/* $NetBSD: sljit_machdep.h,v 1.5 2024/05/05 15:18:10 riastradh Exp $ */ /*- * Copyright (c) 2014 Alexander Nasonov. diff --git a/lib/libc/include/aarch64-netbsd-none/machine/vmparam.h b/lib/libc/include/aarch64-netbsd-none/machine/vmparam.h @@ -1,4 +1,4 @@ -/* $NetBSD: vmparam.h,v 1.19.4.1 2024/07/03 19:13:20 martin Exp $ */ +/* $NetBSD: vmparam.h,v 1.21 2024/06/30 09:36:43 jmcneill Exp $ */ /*- * Copyright (c) 2014 The NetBSD Foundation, Inc. @@ -151,11 +151,11 @@ * last 254MB of kernel vm area (0xfffffffff0000000-0xffffffffffe00000) * may be used for devmap. see aarch64/pmap.c:pmap_devmap_* */ -#define VM_KERNEL_IO_ADDRESS 0xfffffffff0000000L -#define VM_KERNEL_IO_SIZE (VM_MAX_KERNEL_ADDRESS - VM_KERNEL_IO_ADDRESS) +#define VM_KERNEL_IO_BASE 0xfffffffff0000000L +#define VM_KERNEL_IO_SIZE (VM_MAX_KERNEL_ADDRESS - VM_KERNEL_IO_BASE) #define VM_KERNEL_VM_BASE (0xffffc00040000000L) -#define VM_KERNEL_VM_SIZE (VM_KERNEL_IO_ADDRESS - VM_KERNEL_VM_BASE) +#define VM_KERNEL_VM_SIZE (VM_KERNEL_IO_BASE - VM_KERNEL_VM_BASE) /* virtual sizes (bytes) for various kernel submaps */ #define USRIOSIZE (PAGE_SIZE / 8) diff --git a/lib/libc/include/arm-netbsd-eabi/float.h b/lib/libc/include/arm-netbsd-eabi/float.h @@ -1,4 +1,4 @@ -/* $NetBSD: float.h,v 1.8 2014/01/29 01:10:36 matt Exp $ */ +/* $NetBSD: float.h,v 1.9 2024/10/30 15:56:11 riastradh Exp $ */ /*- * Copyright (c) 2014 The NetBSD Foundation, Inc. @@ -33,6 +33,7 @@ #define _ARM_FLOAT_H_ #include <sys/cdefs.h> +#include <sys/featuretest.h> #ifdef __ARM_PCS_AAPCS64 diff --git a/lib/libc/include/arm-netbsd-eabi/machine/asm.h b/lib/libc/include/arm-netbsd-eabi/machine/asm.h @@ -1,4 +1,4 @@ -/* $NetBSD: asm.h,v 1.34 2020/04/23 23:22:41 jakllsch Exp $ */ +/* $NetBSD: asm.h,v 1.39.2.1 2026/04/02 19:12:03 martin Exp $ */ /*- * Copyright (c) 2014 The NetBSD Foundation, Inc. @@ -73,8 +73,10 @@ #ifdef __thumb__ #define THUMB_INSN(n) n +#define _INSN_SIZE (2) #else #define THUMB_INSN(n) +#define _INSN_SIZE (4) #endif #define __BIT(n) (1 << (n)) @@ -130,7 +132,7 @@ #ifdef GPROF # define _PROF_PROLOGUE \ - mov ip, lr; bl __mcount + push {lr}; bl __gnu_mcount_nc #else # define _PROF_PROLOGUE #endif @@ -194,21 +196,25 @@ #define GOT_GET(x,got,sym) \ ldr x, sym; \ ldr x, [x, got] -#define GOT_INIT(got,gotsym,pclabel) \ - ldr got, gotsym; \ - pclabel: add got, got, pc -#ifdef __thumb__ -#define GOT_INITSYM(gotsym,pclabel) \ - .align 0; \ - gotsym: .word _C_LABEL(_GLOBAL_OFFSET_TABLE_) - (pclabel+4) -#else -#define GOT_INITSYM(gotsym,pclabel) \ + +/* + * Load _GLOBAL_OFFSET_TABLE_ address into register: + * + * 0: GOT_INIT(rX, .Lgot) + * ... + * + * // and in the data after the function + * GOT_INITSYM(.Lgot, 0b) + */ +#define GOT_INIT(Rgot, gotsym) \ + ldr Rgot, gotsym ; \ + add Rgot, Rgot, pc +#define GOT_INITSYM(gotsym, initlabel) \ .align 0; \ - gotsym: .word _C_LABEL(_GLOBAL_OFFSET_TABLE_) - (pclabel+8) -#endif + gotsym: .word _C_LABEL(_GLOBAL_OFFSET_TABLE_) - (initlabel+(1+2)*_INSN_SIZE) #ifdef __STDC__ -#define PIC_SYM(x,y) x ## ( ## y ## ) +#define PIC_SYM(x,y) x(y) #else #define PIC_SYM(x,y) x/**/(/**/y/**/) #endif @@ -219,15 +225,38 @@ #define GOT_SYM(x) x #define GOT_GET(x,got,sym) \ ldr x, sym; -#define GOT_INIT(got,gotsym,pclabel) -#define GOT_INITSYM(gotsym,pclabel) +#define GOT_INIT(Rgot, gotsym) +#define GOT_INITSYM(gotsym, initlabel) #define PIC_SYM(x,y) x #endif /* __PIC__ */ -#define RCSID(x) .pushsection ".ident","MS",%progbits,1; \ - .asciz x; \ +/* + * Annoyingly, gas on arm seems to generate _two_ NUL-terminated + * strings for + * + * .asciz "foo" "bar" + * + * instead of concatenating it into a single NUL-terminated string as + * on other architectures. + * + * To work around this, we concatenate into a single NUL-terminated by: + * + * .ascii "foo" + * .asciz "bar" + */ +#define _IDENTSTR(x) .pushsection ".ident","MS",%progbits,1; \ + x; \ .popsection +#ifdef _NETBSD_REVISIONID +#define RCSID(_s) \ + _IDENTSTR(.asciz _s); \ + _IDENTSTR(.ascii "$"; .ascii "NetBSD: "; .ascii __FILE__; \ + .ascii " "; .ascii _NETBSD_REVISIONID; .asciz " $") +#else +#define RCSID(_s) _IDENTSTR(.asciz _s) +#endif + #define WEAK_ALIAS(alias,sym) \ .weak alias; \ alias = sym @@ -241,7 +270,7 @@ #ifdef __STDC__ #define WARN_REFERENCES(sym,msg) \ - .pushsection .gnu.warning. ## sym; \ + .pushsection .gnu.warning.sym; \ .ascii msg; \ .popsection #else diff --git a/lib/libc/include/arm-netbsd-eabi/machine/byte_swap.h b/lib/libc/include/arm-netbsd-eabi/machine/byte_swap.h @@ -0,0 +1,121 @@ +/* $NetBSD: byte_swap.h,v 1.16.52.1 2025/12/18 19:57:52 martin Exp $ */ + +/*- + * Copyright (c) 1997, 1999, 2002 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Charles M. Hannum, Neil A. Carson, and Jason R. Thorpe. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _ARM_BYTE_SWAP_H_ +#define _ARM_BYTE_SWAP_H_ + +#ifdef _LOCORE + +#if defined(_ARM_ARCH_6) || defined(_ARM_ARCH_7) + +#define BSWAP16(_src, _dst, _tmp) \ + rev16 _dst, _src +#define BSWAP32(_src, _dst, _tmp) \ + rev _dst, _src + +#else + +#define BSWAP16(_src, _dst, _tmp) \ + mov _tmp, _src, ror #8 ;\ + orr _tmp, _tmp, _tmp, lsr #16 ;\ + bic _dst, _tmp, _tmp, lsl #16 + +#define BSWAP32(_src, _dst, _tmp) \ + eor _tmp, _src, _src, ror #16 ;\ + bic _tmp, _tmp, #0x00FF0000 ;\ + mov _dst, _src, ror #8 ;\ + eor _dst, _dst, _tmp, lsr #8 + +#endif + + +#else + +#ifdef __GNUC__ +#include <sys/stdint.h> +__BEGIN_DECLS + +#define __BYTE_SWAP_U32_VARIABLE __byte_swap_u32_variable +static __inline uint32_t +__byte_swap_u32_variable(uint32_t v) +{ + uint32_t t1; + +#ifdef _ARM_ARCH_6 + if (!__builtin_constant_p(v)) { + __asm("rev\t%0, %1" : "=r" (v) : "0" (v)); + return v; + } +#endif + + t1 = v ^ ((v << 16) | (v >> 16)); + t1 &= 0xff00ffffU; + v = (v >> 8) | (v << 24); + v ^= (t1 >> 8); + + return v; +} + +#define __BYTE_SWAP_U16_VARIABLE __byte_swap_u16_variable +static __inline uint16_t +__byte_swap_u16_variable(uint16_t v) +{ + +#ifdef _ARM_ARCH_6 + if (!__builtin_constant_p(v)) { + uint32_t v32 = v; + __asm("rev16\t%0, %1" : "=r" (v32) : "0" (v32)); + return (uint16_t)v32; + } +#elif !defined(__thumb__) && 0 /* gcc produces decent code for this */ + if (!__builtin_constant_p(v)) { + uint32_t v0 = v; + __asm volatile( + "mov %0, %1, ror #8\n" + "orr %0, %0, %0, lsr #16\n" + "bic %0, %0, %0, lsl #16" + : "=&r" (v0) + : "0" (v0)); + return (uint16_t)v0; + } +#endif + v &= 0xffff; + v = (uint16_t)((v >> 8) | (v << 8)); + + return v; +} + +__END_DECLS +#endif + +#endif /* _LOCORE */ + +#endif /* _ARM_BYTE_SWAP_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/arm-netbsd-eabi/machine/cpu.h b/lib/libc/include/arm-netbsd-eabi/machine/cpu.h @@ -1,4 +1,4 @@ -/* $NetBSD: cpu.h,v 1.123.4.1 2023/08/09 17:42:01 martin Exp $ */ +/* $NetBSD: cpu.h,v 1.125 2023/07/11 11:01:18 riastradh Exp $ */ /* * Copyright (c) 1994-1996 Mark Brinicombe. @@ -236,8 +236,6 @@ struct cpu_info { uint32_t ci_vfp_id; uint64_t ci_lastintr; - struct pmap_tlb_info * - ci_tlb_info; struct pmap * ci_pmap_lastuser; struct pmap * ci_pmap_cur; tlb_asid_t ci_pmap_asid_cur; diff --git a/lib/libc/include/arm-netbsd-eabi/machine/float.h b/lib/libc/include/arm-netbsd-eabi/machine/float.h @@ -1,4 +1,4 @@ -/* $NetBSD: float.h,v 1.8 2014/01/29 01:10:36 matt Exp $ */ +/* $NetBSD: float.h,v 1.9 2024/10/30 15:56:11 riastradh Exp $ */ /*- * Copyright (c) 2014 The NetBSD Foundation, Inc. @@ -33,6 +33,7 @@ #define _ARM_FLOAT_H_ #include <sys/cdefs.h> +#include <sys/featuretest.h> #ifdef __ARM_PCS_AAPCS64 diff --git a/lib/libc/include/arm-netbsd-eabi/machine/frame.h b/lib/libc/include/arm-netbsd-eabi/machine/frame.h @@ -1,130 +0,0 @@ -/* $NetBSD: frame.h,v 1.23 2022/04/02 11:16:07 skrll Exp $ */ - -/* - * Copyright (c) 1994-1997 Mark Brinicombe. - * Copyright (c) 1994 Brini. - * All rights reserved. - * - * This code is derived from software written for Brini by Mark Brinicombe - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by Brini. - * 4. The name of the company nor the name of the author may be used to - * endorse or promote products derived from this software without specific - * prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ -/* - * arm/frame.h - Stack frames structures - */ - -#ifndef _ARM_FRAME_H_ -#define _ARM_FRAME_H_ - -#ifndef _LOCORE - -#include <sys/signal.h> -#include <sys/ucontext.h> - -/* - * Trap frame. Pushed onto the kernel stack on a trap (synchronous exception). - */ - -typedef struct trapframe { - register_t tf_spsr; - register_t tf_fill; /* fill here so r0 will be dword aligned */ - register_t tf_r0; - register_t tf_r1; - register_t tf_r2; - register_t tf_r3; - register_t tf_r4; - register_t tf_r5; - register_t tf_r6; - register_t tf_r7; - register_t tf_r8; - register_t tf_r9; - register_t tf_r10; - register_t tf_r11; - register_t tf_r12; - register_t tf_usr_sp; - register_t tf_usr_lr; - register_t tf_svc_sp; - register_t tf_svc_lr; - register_t tf_pc; -} trapframe_t; - -/* Register numbers */ -#define tf_ip tf_r12 -#define tf_r13 tf_usr_sp -#define tf_r14 tf_usr_lr -#define tf_r15 tf_pc - -#define TRAP_USERMODE(tf) (((tf)->tf_spsr & PSR_MODE) == PSR_USR32_MODE) - -#define FB_R4 0 -#define FB_R5 1 -#define FB_R6 2 -#define FB_R7 3 -#define FB_R8 4 -#define FB_R9 5 -#define FB_R10 6 -#define FB_R11 7 -#define FB_R12 8 -#define FB_R13 9 -#define FB_R14 10 -#define FB_MAX 11 -struct faultbuf { - register_t fb_reg[FB_MAX]; -}; - -/* - * Signal frame. Pushed onto user stack before calling sigcode. - */ -#ifdef COMPAT_16 -struct sigframe_sigcontext { - struct sigcontext sf_sc; -}; -#endif - -/* the pointers are use in the trampoline code to locate the ucontext */ -struct sigframe_siginfo { - siginfo_t sf_si; /* actual saved siginfo */ - ucontext_t sf_uc; /* actual saved ucontext */ -}; - -#if defined(_KERNEL) || defined(_KMEMUSER) -#ifdef _KERNEL -__BEGIN_DECLS -void sendsig_sigcontext(const ksiginfo_t *, const sigset_t *); -void *getframe(struct lwp *, int, int *); -__END_DECLS -#define lwp_settrapframe(l, tf) ((l)->l_md.md_tf = (tf)) -#endif -#define lwp_trapframe(l) ((l)->l_md.md_tf) -#endif /* _KERNEL || _KMEMUSER */ - -#endif /* _LOCORE */ - -#endif /* _ARM_FRAME_H_ */ - -/* End of frame.h */ -\ No newline at end of file diff --git a/lib/libc/include/arm-netbsd-eabi/machine/lwp_private.h b/lib/libc/include/arm-netbsd-eabi/machine/lwp_private.h @@ -0,0 +1,81 @@ +/* $NetBSD: lwp_private.h,v 1.1 2024/11/30 01:04:07 christos Exp $ */ + +/*- + * Copyright (c) 2001, 2002 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Klaus Klein and by Jason R. Thorpe of Wasabi Systems, Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _ARM_LWP_PRIVATE_H_ +#define _ARM_LWP_PRIVATE_H_ + +#include <sys/cdefs.h> +#include <sys/tls.h> + +#include <lwp.h> + +#if defined(__aarch64__) + +__BEGIN_DECLS +static __inline void * +__lwp_getprivate_fast(void) +{ + void *__tpidr; + __asm __volatile("mrs\t%0, tpidr_el0" : "=r"(__tpidr)); + return __tpidr; +} +__END_DECLS + +#elif defined(__arm__) + +#if defined(__thumb__) && !defined(_ARM_ARCH_T2) +#include <arm/eabi.h> +#endif + +__BEGIN_DECLS +static __inline void * +__lwp_getprivate_fast(void) +{ +#if !defined(__thumb__) || defined(_ARM_ARCH_T2) + void *rv; + __asm("mrc p15, 0, %0, c13, c0, 3" : "=r"(rv)); + if (__predict_true(rv)) + return rv; + /* + * Some ARM cores are broken and don't raise an undefined fault when an + * unrecogized mrc instruction is encountered, but just return zero. + * To do deal with that, if we get a zero we (re-)fetch the value using + * syscall. + */ + return _lwp_getprivate(); +#else + return __aeabi_read_tp(); +#endif /* !__thumb__ || _ARM_ARCH_T2 */ +} +__END_DECLS +#endif + +#endif /* !_ARM_LWP_PRIVATE_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/arm-netbsd-eabi/machine/mcontext.h b/lib/libc/include/arm-netbsd-eabi/machine/mcontext.h @@ -1,4 +1,4 @@ -/* $NetBSD: mcontext.h,v 1.23 2021/10/06 05:33:15 skrll Exp $ */ +/* $NetBSD: mcontext.h,v 1.27 2024/11/30 01:04:07 christos Exp $ */ /*- * Copyright (c) 2001, 2002 The NetBSD Foundation, Inc. @@ -210,61 +210,15 @@ typedef struct { #endif -#if defined(_RTLD_SOURCE) || defined(_LIBC_SOURCE) || \ - defined(__LIBPTHREAD_SOURCE__) - -#include <sys/tls.h> - -#if defined(__aarch64__) - -__BEGIN_DECLS -static __inline void * -__lwp_getprivate_fast(void) -{ - void *__tpidr; - __asm __volatile("mrs\t%0, tpidr_el0" : "=r"(__tpidr)); - return __tpidr; -} -__END_DECLS - -#elif defined(__arm__) - -__BEGIN_DECLS -static __inline void * -__lwp_getprivate_fast(void) -{ -#if !defined(__thumb__) || defined(_ARM_ARCH_T2) - extern void *_lwp_getprivate(void); - void *rv; - __asm("mrc p15, 0, %0, c13, c0, 3" : "=r"(rv)); - if (__predict_true(rv)) - return rv; - /* - * Some ARM cores are broken and don't raise an undefined fault when an - * unrecogized mrc instruction is encountered, but just return zero. - * To do deal with that, if we get a zero we (re-)fetch the value using - * syscall. - */ - return _lwp_getprivate(); -#else - extern void *__aeabi_read_tp(void); - return __aeabi_read_tp(); -#endif /* !__thumb__ || _ARM_ARCH_T2 */ -} -__END_DECLS -#endif - -#endif /* _RTLD_SOURCE || _LIBC_SOURCE || __LIBPTHREAD_SOURCE__ */ - /* Machine-dependent uc_flags */ -#define _UC_TLSBASE 0x00080000 /* see <sys/ucontext.h> */ +#define _UC_TLSBASE _UC_MD_BIT19 /* see <sys/ucontext.h> */ /* Machine-dependent uc_flags for arm */ -#define _UC_ARM_VFP 0x00010000 /* FPU field is VFP */ +#define _UC_ARM_VFP _UC_MD_BIT16 /* FPU field is VFP */ /* used by signal delivery to indicate status of signal stack */ -#define _UC_SETSTACK 0x00020000 -#define _UC_CLRSTACK 0x00040000 +#define _UC_SETSTACK _UC_MD_BIT17 +#define _UC_CLRSTACK _UC_MD_BIT18 #define _UC_MACHINE_SP(uc) ((uc)->uc_mcontext.__gregs[_REG_SP]) #define _UC_MACHINE_FP(uc) ((uc)->uc_mcontext.__gregs[_REG_FP]) diff --git a/lib/libc/include/arm-netbsd-eabi/machine/mutex.h b/lib/libc/include/arm-netbsd-eabi/machine/mutex.h @@ -1,4 +1,4 @@ -/* $NetBSD: mutex.h,v 1.27.4.1 2023/08/09 17:42:01 martin Exp $ */ +/* $NetBSD: mutex.h,v 1.29 2023/07/12 12:50:12 riastradh Exp $ */ /*- * Copyright (c) 2002, 2007 The NetBSD Foundation, Inc. diff --git a/lib/libc/include/arm-netbsd-eabi/machine/proc.h b/lib/libc/include/arm-netbsd-eabi/machine/proc.h @@ -1,4 +1,4 @@ -/* $NetBSD: proc.h,v 1.19 2020/08/14 16:18:36 skrll Exp $ */ +/* $NetBSD: proc.h,v 1.20 2024/02/10 18:43:51 andvar Exp $ */ /* * Copyright (c) 1994 Mark Brinicombe. @@ -48,7 +48,7 @@ struct mdlwp { volatile uint32_t md_astpending; }; -/* Flags setttings for md_flags */ +/* Flags settings for md_flags */ #define MDLWP_NOALIGNFLT 0x00000002 /* For EXEC_AOUT */ #define MDLWP_VFPINTR 0x00000004 /* VFP used in intr */ diff --git a/lib/libc/include/arm-netbsd-eabi/machine/profile.h b/lib/libc/include/arm-netbsd-eabi/machine/profile.h @@ -1,4 +1,4 @@ -/* $NetBSD: profile.h,v 1.18 2018/01/24 09:04:45 skrll Exp $ */ +/* $NetBSD: profile.h,v 1.18.42.1 2026/04/02 19:12:03 martin Exp $ */ /* * Copyright (c) 2001 Ben Harris @@ -38,90 +38,25 @@ * prologue. */ -#define MCOUNT_ASM_NAME "__mcount" #define PLTSYM -#if !defined(__ARM_EABI__) -#define MCOUNT \ - __asm(".text"); \ - __asm(".align 0"); \ - __asm(".arm"); \ - __asm(".type " MCOUNT_ASM_NAME ",%function"); \ - __asm(".global " MCOUNT_ASM_NAME); \ - __asm(MCOUNT_ASM_NAME ":"); \ - /* \ - * Preserve registers that are trashed during mcount \ - */ \ - __asm("push {r0-r3, ip, lr}"); \ - /* Check what mode we're in. EQ => 32, NE => 26 */ \ - __asm("teq r0, r0"); \ - __asm("teq pc, r15"); \ - /* \ - * find the return address for mcount, \ - * and the return address for mcount's caller. \ - * \ - * frompcindex = pc pushed by call into self. \ - */ \ - __asm("moveq r0, ip"); \ - __asm("bicne r0, ip, #0xfc000003"); \ - /* \ - * selfpc = pc pushed by mcount call \ - */ \ - __asm("moveq r1, lr"); \ - __asm("bicne r1, lr, #0xfc000003"); \ - /* \ - * Call the real mcount code \ - */ \ - __asm("bl " ___STRING(_C_LABEL(_mcount)) PLTSYM); \ - /* \ - * Restore registers that were trashed during mcount \ - */ \ - __asm("pop {r0-r3, lr}"); \ - __asm("pop {pc}"); \ - __asm(".size " MCOUNT_ASM_NAME ", .-" MCOUNT_ASM_NAME); -#elif defined(__ARM_DWARF_EH__) -#define MCOUNT \ - __asm(".text"); \ - __asm(".align 0"); \ - __asm(".arm"); \ - __asm(".type " MCOUNT_ASM_NAME ",%function"); \ - __asm(".global " MCOUNT_ASM_NAME); \ - __asm(MCOUNT_ASM_NAME ":"); \ - __asm(".cfi_startproc"); \ - /* \ - * Preserve registers that are trashed during mcount \ - */ \ - __asm("push {r0-r3, ip, lr}"); \ - __asm(".cfi_def_cfa_offset 24"); \ - __asm(".cfi_offset 14, -4"); \ - __asm(".cfi_offset 12, -8"); \ - __asm(".cfi_offset 3, -12"); \ - __asm(".cfi_offset 2, -16"); \ - __asm(".cfi_offset 1, -20"); \ - __asm(".cfi_offset 0, -24"); \ - /* \ - * find the return address for mcount, \ - * and the return address for mcount's caller. \ - * \ - * frompcindex = pc pushed by call into self. \ - */ \ - __asm("mov r0, ip"); \ - /* \ - * selfpc = pc pushed by mcount call \ - */ \ - __asm("mov r1, lr"); \ - /* \ - * Call the real mcount code \ - */ \ - __asm("bl " ___STRING(_C_LABEL(_mcount)) PLTSYM); \ - /* \ - * Restore registers that were trashed during mcount \ - */ \ - __asm("pop {r0-r3, lr}"); \ - __asm("pop {pc}"); \ - __asm(".cfi_endproc"); \ - __asm(".size " MCOUNT_ASM_NAME ", .-" MCOUNT_ASM_NAME); +#if defined (_ARM_ARCH_4T) +# define RET "bx ip" +#else +# define RET "mov pc, ip" +#endif + +#if defined(__ARM_DWARF_EH__) +#define _PROF_UNWINDER_SAVE "" +#define _PROF_UNWINDER_START "" +#define _PROF_UNWINDER_END "" #else +#define _PROF_UNWINDER_SAVE ".save {r0-r3, lr}\n" +#define _PROF_UNWINDER_START ".fnstart\n" +#define _PROF_UNWINDER_END ".fnend\n" +#endif + +#define MCOUNT_ASM_NAME "__gnu_mcount_nc" #define MCOUNT \ __asm(".text"); \ __asm(".align 0"); \ @@ -129,27 +64,26 @@ __asm(".type " MCOUNT_ASM_NAME ",%function"); \ __asm(".global " MCOUNT_ASM_NAME); \ __asm(MCOUNT_ASM_NAME ":"); \ - __asm(".fnstart"); \ + __asm(_PROF_UNWINDER_START); \ __asm(".cfi_startproc"); \ /* \ * Preserve registers that are trashed during mcount \ */ \ - __asm("push {r0-r3, ip, lr}"); \ - __asm(".save {r0-r3, lr}"); \ - __asm(".cfi_def_cfa_offset 24"); \ + __asm("push {r0-r3, lr}"); \ + __asm(_PROF_UNWINDER_SAVE); \ + __asm(".cfi_def_cfa_offset 20"); \ __asm(".cfi_offset 14, -4"); \ - __asm(".cfi_offset 12, -8"); \ - __asm(".cfi_offset 3, -12"); \ - __asm(".cfi_offset 2, -16"); \ - __asm(".cfi_offset 1, -20"); \ - __asm(".cfi_offset 0, -24"); \ + __asm(".cfi_offset 3, -8"); \ + __asm(".cfi_offset 2, -12"); \ + __asm(".cfi_offset 1, -16"); \ + __asm(".cfi_offset 0, -20"); \ /* \ * find the return address for mcount, \ * and the return address for mcount's caller. \ * \ * frompcindex = pc pushed by call into self. \ */ \ - __asm("mov r0, ip"); \ + __asm("ldr r0, [sp, #20]"); \ /* \ * selfpc = pc pushed by mcount call \ */ \ @@ -161,12 +95,10 @@ /* \ * Restore registers that were trashed during mcount \ */ \ - __asm("pop {r0-r3, lr}"); \ - __asm("pop {pc}"); \ + __asm("pop {r0-r3, ip, lr}"); \ + __asm(RET); \ __asm(".cfi_endproc"); \ - __asm(".fnend"); \ __asm(".size " MCOUNT_ASM_NAME ", .-" MCOUNT_ASM_NAME); -#endif #ifdef _KERNEL #include <arm/cpufunc.h> diff --git a/lib/libc/include/arm-netbsd-eabi/machine/setjmp.h b/lib/libc/include/arm-netbsd-eabi/machine/setjmp.h @@ -1,4 +1,4 @@ -/* $NetBSD: setjmp.h,v 1.5 2013/01/11 13:56:32 matt Exp $ */ +/* $NetBSD: setjmp.h,v 1.6 2024/05/06 07:29:30 skrll Exp $ */ /* * machine/setjmp.h: machine dependent setjmp-related information. @@ -10,11 +10,12 @@ * NOTE: The internal structure of a jmp_buf is *PRIVATE* * This information is provided as there is software * that fiddles with this with obtain the stack pointer - * (yes really ! and its commercial !). + * (yes really ! and it's commercial !). * * Description of the setjmp buffer * - * word 0 magic number (dependent on creator) + * Word Field Comment + * 0 magic number (dependent on creator) * 13 fpscr vfp status control register * 14 r4 register 4 * 15 r5 register 5 @@ -47,13 +48,13 @@ * A side note I should mention - Please do not tamper * with the floating point fields. While they are * always saved and restored at the moment this cannot - * be garenteed especially if the compiler happens + * be guaranteed especially if the compiler happens * to be generating soft-float code so no fp * registers will be used. * - * Whilst this can be seen an encouraging people to + * Whilst this can be seen as encouraging people to * use the setjmp buffer in this way I think that it - * is for the best then if changes occur compiles will + * is for the best then, if changes occur, compiles will * break rather than just having new builds falling over * mysteriously. */ diff --git a/lib/libc/include/generic-netbsd/machine/sysarch.h b/lib/libc/include/arm-netbsd-eabi/machine/sysarch.h diff --git a/lib/libc/include/generic-netbsd/altq/altq.h b/lib/libc/include/generic-netbsd/altq/altq.h @@ -1,4 +1,4 @@ -/* $NetBSD: altq.h,v 1.4 2006/10/12 19:59:08 peter Exp $ */ +/* $NetBSD: altq.h,v 1.5 2024/12/24 08:35:28 ozaki-r Exp $ */ /* $KAME: altq.h,v 1.10 2003/07/10 12:07:47 kjc Exp $ */ /* @@ -74,7 +74,7 @@ struct altqreq { /* simple token backet meter profile */ struct tb_profile { - u_int rate; /* rate in bit-per-sec */ + uint64_t rate; /* rate in bit-per-sec */ u_int depth; /* depth in bytes */ }; diff --git a/lib/libc/include/generic-netbsd/altq/altq_afmap.h b/lib/libc/include/generic-netbsd/altq/altq_afmap.h @@ -1,4 +1,4 @@ -/* $NetBSD: altq_afmap.h,v 1.3 2006/10/12 19:59:08 peter Exp $ */ +/* $NetBSD: altq_afmap.h,v 1.4 2025/01/14 13:49:17 joe Exp $ */ /* $KAME: altq_afmap.h,v 1.6 2002/04/03 05:38:50 kjc Exp $ */ /* @@ -98,6 +98,7 @@ int afm_remove(struct afm *); int afm_removeall(struct ifnet *); struct afm *afm_lookup(struct ifnet *, int, int); struct afm *afm_match(struct ifnet *, struct flowinfo *); +struct afm_head *afmhead_if(struct ifnet *); #endif /* _KERNEL */ diff --git a/lib/libc/include/generic-netbsd/altq/altq_classq.h b/lib/libc/include/generic-netbsd/altq/altq_classq.h @@ -1,4 +1,4 @@ -/* $NetBSD: altq_classq.h,v 1.8 2018/04/19 21:50:06 christos Exp $ */ +/* $NetBSD: altq_classq.h,v 1.12 2025/01/22 22:41:38 joe Exp $ */ /* $KAME: altq_classq.h,v 1.6 2003/01/07 07:33:38 kjc Exp $ */ /* @@ -53,6 +53,8 @@ extern "C" { #ifdef _KERNEL +#include <sys/cprng.h> + /* * Packet Queue structures and macros to manipulate them. */ @@ -109,14 +111,14 @@ _getq(class_queue_t *q) struct mbuf *m, *m0; if ((m = qtail(q)) == NULL) - return (NULL); + return NULL; if ((m0 = m->m_nextpkt) != m) m->m_nextpkt = m0->m_nextpkt; else qtail(q) = NULL; qlen(q)--; m0->m_nextpkt = NULL; - return (m0); + return m0; } /* drop a packet at the tail of the queue */ @@ -138,7 +140,7 @@ _getq_tail(class_queue_t *q) qtail(q) = prev; qlen(q)--; m->m_nextpkt = NULL; - return (m); + return m; } /* randomly select a packet in the queue */ @@ -155,7 +157,7 @@ _getq_random(class_queue_t *q) else { struct mbuf *prev = NULL; - n = random() % qlen(q) + 1; + n = cprng_fast32() % qlen(q) + 1; for (i = 0; i < n; i++) { prev = m; m = m->m_nextpkt; @@ -166,7 +168,7 @@ _getq_random(class_queue_t *q) } qlen(q)--; m->m_nextpkt = NULL; - return (m); + return m; } static __inline void diff --git a/lib/libc/include/generic-netbsd/altq/altq_jobs.h b/lib/libc/include/generic-netbsd/altq/altq_jobs.h @@ -1,58 +1,58 @@ -/* $NetBSD: altq_jobs.h,v 1.5 2010/04/09 19:32:45 plunky Exp $ */ +/* $NetBSD: altq_jobs.h,v 1.6 2025/02/10 19:12:49 joe Exp $ */ /* $KAME: altq_jobs.h,v 1.6 2003/07/10 12:07:48 kjc Exp $ */ /* - * Copyright (c) 2001, Rector and Visitors of the University of + * Copyright (c) 2001, Rector and Visitors of the University of * Virginia. * All rights reserved. * - * Redistribution and use in source and binary forms, - * with or without modification, are permitted provided + * Redistribution and use in source and binary forms, + * with or without modification, are permitted provided * that the following conditions are met: * - * Redistributions of source code must retain the above - * copyright notice, this list of conditions and the following - * disclaimer. + * Redistributions of source code must retain the above + * copyright notice, this list of conditions and the following + * disclaimer. * - * Redistributions in binary form must reproduce the above - * copyright notice, this list of conditions and the following - * disclaimer in the documentation and/or other materials provided - * with the distribution. + * Redistributions in binary form must reproduce the above + * copyright notice, this list of conditions and the following + * disclaimer in the documentation and/or other materials provided + * with the distribution. * - * Neither the name of the University of Virginia nor the names - * of its contributors may be used to endorse or promote products - * derived from this software without specific prior written - * permission. + * Neither the name of the University of Virginia nor the names + * of its contributors may be used to endorse or promote products + * derived from this software without specific prior written + * permission. * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND - * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, - * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, - * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING - * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND + * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, + * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF * THE POSSIBILITY OF SUCH DAMAGE. */ -/* - * JoBS - altq prototype implementation - * +/* + * JoBS - altq prototype implementation + * * Author: Nicolas Christin <nicolas@cs.virginia.edu> * - * JoBS algorithms originally devised and proposed by + * JoBS algorithms originally devised and proposed by * Nicolas Christin and Jorg Liebeherr. - * Grateful Acknowledgments to Tarek Abdelzaher for his help and + * Grateful Acknowledgments to Tarek Abdelzaher for his help and * comments, and to Kenjiro Cho for some helpful advice. * Contributed by the Multimedia Networks Group at the University - * of Virginia. + * of Virginia. * - * Papers and additional info can be found at + * Papers and additional info can be found at * http://qosbox.cs.virginia.edu - * - */ + * + */ #ifndef _ALTQ_ALTQ_JOBS_H_ #define _ALTQ_ALTQ_JOBS_H_ @@ -73,7 +73,7 @@ extern "C" { /* list of packet arrival times */ struct _tsentry; -typedef TAILQ_HEAD(_timestamps, _tsentry) TSLIST; +typedef TAILQ_HEAD(_timestamps, _tsentry) TSLIST; typedef struct _tsentry { TAILQ_ENTRY(_tsentry) ts_list; uint64_t timestamp; diff --git a/lib/libc/include/generic-netbsd/altq/altq_rmclass.h b/lib/libc/include/generic-netbsd/altq/altq_rmclass.h @@ -1,4 +1,4 @@ -/* $NetBSD: altq_rmclass.h,v 1.13 2022/05/24 20:50:18 andvar Exp $ */ +/* $NetBSD: altq_rmclass.h,v 1.14 2025/02/03 07:40:24 ozaki-r Exp $ */ /* $KAME: altq_rmclass.h,v 1.10 2003/08/20 23:30:23 itojun Exp $ */ /* @@ -82,14 +82,14 @@ struct red; } while (0) #define TS_ADD_DELTA(a, delta, res) do { \ - register long xxns = (a)->tv_nsec + (long)(delta); \ - \ - (res)->tv_sec = (a)->tv_sec; \ - while (xxns >= 1000000000) { \ - ++((res)->tv_sec); \ - xxns -= 1000000000; \ + KASSERT(delta >= 0); \ + (res)->tv_sec = (a)->tv_sec + (delta) / 1000000000L; \ + (res)->tv_nsec = (a)->tv_nsec + (long)((delta) % 1000000000L); \ + if ((res)->tv_nsec >= 1000000000L) { \ + (res)->tv_nsec -= 1000000000L; \ + (res)->tv_sec++; \ } \ - (res)->tv_nsec = xxns; \ + KASSERT((res)->tv_nsec >= 0); \ } while (0) #define RM_TIMEOUT 2 /* 1 Clock tick. */ diff --git a/lib/libc/include/generic-netbsd/altq/altq_var.h b/lib/libc/include/generic-netbsd/altq/altq_var.h @@ -1,4 +1,4 @@ -/* $NetBSD: altq_var.h,v 1.12 2008/11/25 15:59:10 tsutsui Exp $ */ +/* $NetBSD: altq_var.h,v 1.13 2024/12/07 07:45:43 andvar Exp $ */ /* $KAME: altq_var.h,v 1.18 2005/04/13 03:44:25 suz Exp $ */ /* @@ -191,7 +191,7 @@ struct callout { /* dummy callout structure */ struct callout { void *c_arg; /* function argument */ - void (*c_func)(void *); /* functiuon to call */ + void (*c_func)(void *); /* function to call */ }; #define CALLOUT_INIT(c) do { (void)memset((c), 0, sizeof(*(c))); } while (/*CONSTCOND*/ 0) #define CALLOUT_RESET(c,t,f,a) do { (c)->c_arg = (a); \ diff --git a/lib/libc/include/generic-netbsd/arm/arm32/pmap.h b/lib/libc/include/generic-netbsd/arm/arm32/pmap.h @@ -1,4 +1,4 @@ -/* $NetBSD: pmap.h,v 1.173.4.1 2023/10/14 06:52:17 martin Exp $ */ +/* $NetBSD: pmap.h,v 1.177 2023/10/12 11:33:37 skrll Exp $ */ /* * Copyright (c) 2002, 2003 Wasabi Systems, Inc. @@ -79,7 +79,10 @@ #endif #include <arm/cpufunc.h> #include <arm/locore.h> + #include <uvm/uvm_object.h> + +#include <uvm/pmap/pmap_devmap.h> #include <uvm/pmap/pmap_pvt.h> #endif @@ -91,12 +94,7 @@ #endif #define PMAP_TLB_FLUSH_ASID_ON_RESET arm_has_tlbiasid_p #define PMAP_TLB_NUM_PIDS 256 -#define cpu_set_tlb_info(ci, ti) ((void)((ci)->ci_tlb_info = (ti))) -#if PMAP_TLB_MAX > 1 -#define cpu_tlb_info(ci) ((ci)->ci_tlb_info) -#else -#define cpu_tlb_info(ci) (&pmap_tlb0_info) -#endif + #define pmap_md_tlb_asid_max() (PMAP_TLB_NUM_PIDS - 1) #include <uvm/pmap/tlb.h> #include <uvm/pmap/pmap_tlb.h> @@ -201,29 +199,10 @@ union pmap_cache_state { #define PMAP_CACHE_STATE_ALL 0xffffffffu #endif /* !ARM_MMU_EXTENDED */ -/* - * This structure is used by machine-dependent code to describe - * static mappings of devices, created at bootstrap time. - */ -struct pmap_devmap { - vaddr_t pd_va; /* virtual address */ - paddr_t pd_pa; /* physical address */ - psize_t pd_size; /* size of region */ - vm_prot_t pd_prot; /* protection code */ - int pd_cache; /* cache attributes */ -}; #define DEVMAP_ALIGN(a) ((a) & ~L1_S_OFFSET) #define DEVMAP_SIZE(s) roundup2((s), L1_S_SIZE) -#define DEVMAP_ENTRY(va, pa, sz) \ - { \ - .pd_va = DEVMAP_ALIGN(va), \ - .pd_pa = DEVMAP_ALIGN(pa), \ - .pd_size = DEVMAP_SIZE(sz), \ - .pd_prot = VM_PROT_READ|VM_PROT_WRITE, \ - .pd_cache = PTE_DEV \ - } -#define DEVMAP_ENTRY_END { 0 } +#define DEVMAP_FLAGS PMAP_DEV /* * The pmap structure itself @@ -419,17 +398,14 @@ void pmap_postinit(void); void vector_page_setprot(int); -const struct pmap_devmap *pmap_devmap_find_pa(paddr_t, psize_t); -const struct pmap_devmap *pmap_devmap_find_va(vaddr_t, vsize_t); - /* Bootstrapping routines. */ void pmap_map_section(vaddr_t, vaddr_t, paddr_t, int, int); void pmap_map_entry(vaddr_t, vaddr_t, paddr_t, int, int); vsize_t pmap_map_chunk(vaddr_t, vaddr_t, paddr_t, vsize_t, int, int); void pmap_unmap_chunk(vaddr_t, vaddr_t, vsize_t); void pmap_link_l2pt(vaddr_t, vaddr_t, pv_addr_t *); -void pmap_devmap_bootstrap(vaddr_t, const struct pmap_devmap *); -void pmap_devmap_register(const struct pmap_devmap *); + +vsize_t pmap_kenter_range(vaddr_t, paddr_t, vsize_t, vm_prot_t, u_int); /* * Special page zero routine for use by the idle loop (no cache cleans). diff --git a/lib/libc/include/generic-netbsd/arm/arm32/vmparam.h b/lib/libc/include/generic-netbsd/arm/arm32/vmparam.h @@ -1,4 +1,4 @@ -/* $NetBSD: vmparam.h,v 1.56 2020/10/08 12:49:06 he Exp $ */ +/* $NetBSD: vmparam.h,v 1.58 2024/09/07 06:17:37 andvar Exp $ */ /* * Copyright (c) 2001, 2002 Wasabi Systems, Inc. @@ -54,7 +54,7 @@ #define USRSTACK VM_MAXUSER_ADDRESS /* - * ARMv4 systems are normaly configured for 256MB KVA only, so restrict + * ARMv4 systems are normally configured for 256MB KVA only, so restrict * the size of the pager map to 4MB. */ #ifndef _ARM_ARCH_5 @@ -131,7 +131,7 @@ #define VM_KERNEL_KASAN_END (VM_KERNEL_KASAN_BASE + VM_KERNEL_KASAN_SIZE) #define VM_KERNEL_VM_END VM_KERNEL_KASAN_BASE #else -#define VM_KERNEL_VM_END VM_KERNEL_IO_ADDRESS +#define VM_KERNEL_VM_END VM_KERNEL_IO_BASE #endif #ifdef __HAVE_MM_MD_DIRECT_MAPPED_PHYS @@ -146,8 +146,8 @@ #define VM_KERNEL_ADDR_SIZE (VM_KERNEL_VM_END - KERNEL_BASE) #define VM_KERNEL_VM_SIZE (VM_KERNEL_VM_END - VM_KERNEL_VM_BASE) -#define VM_KERNEL_IO_ADDRESS 0xf0000000 -#define VM_KERNEL_IO_SIZE (VM_MAX_KERNEL_ADDRESS - VM_KERNEL_IO_ADDRESS) +#define VM_KERNEL_IO_BASE 0xf0000000 +#define VM_KERNEL_IO_SIZE (VM_MAX_KERNEL_ADDRESS - VM_KERNEL_IO_BASE) #endif #endif /* _ARM_ARM32_VMPARAM_H_ */ \ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/arm/asm.h b/lib/libc/include/generic-netbsd/arm/asm.h @@ -1,4 +1,4 @@ -/* $NetBSD: asm.h,v 1.34 2020/04/23 23:22:41 jakllsch Exp $ */ +/* $NetBSD: asm.h,v 1.39.2.1 2026/04/02 19:12:03 martin Exp $ */ /*- * Copyright (c) 2014 The NetBSD Foundation, Inc. @@ -73,8 +73,10 @@ #ifdef __thumb__ #define THUMB_INSN(n) n +#define _INSN_SIZE (2) #else #define THUMB_INSN(n) +#define _INSN_SIZE (4) #endif #define __BIT(n) (1 << (n)) @@ -130,7 +132,7 @@ #ifdef GPROF # define _PROF_PROLOGUE \ - mov ip, lr; bl __mcount + push {lr}; bl __gnu_mcount_nc #else # define _PROF_PROLOGUE #endif @@ -194,21 +196,25 @@ #define GOT_GET(x,got,sym) \ ldr x, sym; \ ldr x, [x, got] -#define GOT_INIT(got,gotsym,pclabel) \ - ldr got, gotsym; \ - pclabel: add got, got, pc -#ifdef __thumb__ -#define GOT_INITSYM(gotsym,pclabel) \ - .align 0; \ - gotsym: .word _C_LABEL(_GLOBAL_OFFSET_TABLE_) - (pclabel+4) -#else -#define GOT_INITSYM(gotsym,pclabel) \ + +/* + * Load _GLOBAL_OFFSET_TABLE_ address into register: + * + * 0: GOT_INIT(rX, .Lgot) + * ... + * + * // and in the data after the function + * GOT_INITSYM(.Lgot, 0b) + */ +#define GOT_INIT(Rgot, gotsym) \ + ldr Rgot, gotsym ; \ + add Rgot, Rgot, pc +#define GOT_INITSYM(gotsym, initlabel) \ .align 0; \ - gotsym: .word _C_LABEL(_GLOBAL_OFFSET_TABLE_) - (pclabel+8) -#endif + gotsym: .word _C_LABEL(_GLOBAL_OFFSET_TABLE_) - (initlabel+(1+2)*_INSN_SIZE) #ifdef __STDC__ -#define PIC_SYM(x,y) x ## ( ## y ## ) +#define PIC_SYM(x,y) x(y) #else #define PIC_SYM(x,y) x/**/(/**/y/**/) #endif @@ -219,15 +225,38 @@ #define GOT_SYM(x) x #define GOT_GET(x,got,sym) \ ldr x, sym; -#define GOT_INIT(got,gotsym,pclabel) -#define GOT_INITSYM(gotsym,pclabel) +#define GOT_INIT(Rgot, gotsym) +#define GOT_INITSYM(gotsym, initlabel) #define PIC_SYM(x,y) x #endif /* __PIC__ */ -#define RCSID(x) .pushsection ".ident","MS",%progbits,1; \ - .asciz x; \ +/* + * Annoyingly, gas on arm seems to generate _two_ NUL-terminated + * strings for + * + * .asciz "foo" "bar" + * + * instead of concatenating it into a single NUL-terminated string as + * on other architectures. + * + * To work around this, we concatenate into a single NUL-terminated by: + * + * .ascii "foo" + * .asciz "bar" + */ +#define _IDENTSTR(x) .pushsection ".ident","MS",%progbits,1; \ + x; \ .popsection +#ifdef _NETBSD_REVISIONID +#define RCSID(_s) \ + _IDENTSTR(.asciz _s); \ + _IDENTSTR(.ascii "$"; .ascii "NetBSD: "; .ascii __FILE__; \ + .ascii " "; .ascii _NETBSD_REVISIONID; .asciz " $") +#else +#define RCSID(_s) _IDENTSTR(.asciz _s) +#endif + #define WEAK_ALIAS(alias,sym) \ .weak alias; \ alias = sym @@ -241,7 +270,7 @@ #ifdef __STDC__ #define WARN_REFERENCES(sym,msg) \ - .pushsection .gnu.warning. ## sym; \ + .pushsection .gnu.warning.sym; \ .ascii msg; \ .popsection #else diff --git a/lib/libc/include/generic-netbsd/arm/byte_swap.h b/lib/libc/include/generic-netbsd/arm/byte_swap.h @@ -1,4 +1,4 @@ -/* $NetBSD: byte_swap.h,v 1.16 2017/01/17 11:08:50 rin Exp $ */ +/* $NetBSD: byte_swap.h,v 1.16.52.1 2025/12/18 19:57:52 martin Exp $ */ /*- * Copyright (c) 1997, 1999, 2002 The NetBSD Foundation, Inc. @@ -60,7 +60,7 @@ #else #ifdef __GNUC__ -#include <sys/types.h> +#include <sys/stdint.h> __BEGIN_DECLS #define __BYTE_SWAP_U32_VARIABLE __byte_swap_u32_variable diff --git a/lib/libc/include/generic-netbsd/arm/cpu.h b/lib/libc/include/generic-netbsd/arm/cpu.h @@ -1,4 +1,4 @@ -/* $NetBSD: cpu.h,v 1.123.4.1 2023/08/09 17:42:01 martin Exp $ */ +/* $NetBSD: cpu.h,v 1.125 2023/07/11 11:01:18 riastradh Exp $ */ /* * Copyright (c) 1994-1996 Mark Brinicombe. @@ -236,8 +236,6 @@ struct cpu_info { uint32_t ci_vfp_id; uint64_t ci_lastintr; - struct pmap_tlb_info * - ci_tlb_info; struct pmap * ci_pmap_lastuser; struct pmap * ci_pmap_cur; tlb_asid_t ci_pmap_asid_cur; diff --git a/lib/libc/include/generic-netbsd/arm/cputypes.h b/lib/libc/include/generic-netbsd/arm/cputypes.h @@ -1,4 +1,4 @@ -/* $NetBSD: cputypes.h,v 1.16.4.1 2024/10/03 16:11:36 martin Exp $ */ +/* $NetBSD: cputypes.h,v 1.20 2025/01/31 11:47:34 jmcneill Exp $ */ /* * Copyright (c) 1998, 2001 Ben Harris @@ -50,6 +50,7 @@ #define CPU_ID_BROADCOM 0x42000000 /* 'B' */ #define CPU_ID_CAVIUM 0x43000000 /* 'C' */ #define CPU_ID_DEC 0x44000000 /* 'D' */ +#define CPU_ID_FUJITSU 0x46000000 /* 'F' */ #define CPU_ID_INFINEON 0x49000000 /* 'I' */ #define CPU_ID_MOTOROLA 0x4d000000 /* 'M' */ #define CPU_ID_NVIDIA 0x4e000000 /* 'N' */ @@ -177,6 +178,11 @@ #define CPU_ID_NEOVERSEN1R3 0x413fd0c0 #define CPU_ID_NEOVERSEE1R1 0x411fd4a0 #define CPU_ID_CORTEXA77R0 0x410fd0d0 +#define CPU_ID_NEOVERSEV1R1 0x411fd400 +#define CPU_ID_CORTEXA710R2 0x412fd470 +#define CPU_ID_NEOVERSEN2R0 0x410fd490 +#define CPU_ID_CORTEXA520R0 0x410fd800 +#define CPU_ID_CORTEXA720R0 0x410fd810 #define CPU_ID_CORTEX_P(n) ((n & 0xff0fe000) == 0x410fc000) #define CPU_ID_CORTEX_A5_P(n) ((n & 0xff0ff0f0) == 0x410fc050) @@ -209,9 +215,14 @@ #define CPU_ID_THUNDERX83XXRX 0x43000a30 #define CPU_ID_THUNDERX2RX 0x43000af0 +#define CPU_ID_A64FX 0x460f0010 + #define CPU_ID_AMPERE1 0xc00fac30 #define CPU_ID_AMPERE1A 0xc00fac40 +#define CPU_ID_ORYON 0x510f0010 +#define CPU_ID_ORYON_P(n) ((n & 0xff0ffff0) == CPU_ID_ORYON) + /* * Chip-specific errata. These defines are intended to be * booleans used within if statements. When an appropriate diff --git a/lib/libc/include/generic-netbsd/arm/float.h b/lib/libc/include/generic-netbsd/arm/float.h @@ -1,4 +1,4 @@ -/* $NetBSD: float.h,v 1.8 2014/01/29 01:10:36 matt Exp $ */ +/* $NetBSD: float.h,v 1.9 2024/10/30 15:56:11 riastradh Exp $ */ /*- * Copyright (c) 2014 The NetBSD Foundation, Inc. @@ -33,6 +33,7 @@ #define _ARM_FLOAT_H_ #include <sys/cdefs.h> +#include <sys/featuretest.h> #ifdef __ARM_PCS_AAPCS64 diff --git a/lib/libc/include/generic-netbsd/arm/lwp_private.h b/lib/libc/include/generic-netbsd/arm/lwp_private.h @@ -0,0 +1,81 @@ +/* $NetBSD: lwp_private.h,v 1.1 2024/11/30 01:04:07 christos Exp $ */ + +/*- + * Copyright (c) 2001, 2002 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Klaus Klein and by Jason R. Thorpe of Wasabi Systems, Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _ARM_LWP_PRIVATE_H_ +#define _ARM_LWP_PRIVATE_H_ + +#include <sys/cdefs.h> +#include <sys/tls.h> + +#include <lwp.h> + +#if defined(__aarch64__) + +__BEGIN_DECLS +static __inline void * +__lwp_getprivate_fast(void) +{ + void *__tpidr; + __asm __volatile("mrs\t%0, tpidr_el0" : "=r"(__tpidr)); + return __tpidr; +} +__END_DECLS + +#elif defined(__arm__) + +#if defined(__thumb__) && !defined(_ARM_ARCH_T2) +#include <arm/eabi.h> +#endif + +__BEGIN_DECLS +static __inline void * +__lwp_getprivate_fast(void) +{ +#if !defined(__thumb__) || defined(_ARM_ARCH_T2) + void *rv; + __asm("mrc p15, 0, %0, c13, c0, 3" : "=r"(rv)); + if (__predict_true(rv)) + return rv; + /* + * Some ARM cores are broken and don't raise an undefined fault when an + * unrecogized mrc instruction is encountered, but just return zero. + * To do deal with that, if we get a zero we (re-)fetch the value using + * syscall. + */ + return _lwp_getprivate(); +#else + return __aeabi_read_tp(); +#endif /* !__thumb__ || _ARM_ARCH_T2 */ +} +__END_DECLS +#endif + +#endif /* !_ARM_LWP_PRIVATE_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/arm/mcontext.h b/lib/libc/include/generic-netbsd/arm/mcontext.h @@ -1,4 +1,4 @@ -/* $NetBSD: mcontext.h,v 1.23 2021/10/06 05:33:15 skrll Exp $ */ +/* $NetBSD: mcontext.h,v 1.27 2024/11/30 01:04:07 christos Exp $ */ /*- * Copyright (c) 2001, 2002 The NetBSD Foundation, Inc. @@ -210,61 +210,15 @@ typedef struct { #endif -#if defined(_RTLD_SOURCE) || defined(_LIBC_SOURCE) || \ - defined(__LIBPTHREAD_SOURCE__) - -#include <sys/tls.h> - -#if defined(__aarch64__) - -__BEGIN_DECLS -static __inline void * -__lwp_getprivate_fast(void) -{ - void *__tpidr; - __asm __volatile("mrs\t%0, tpidr_el0" : "=r"(__tpidr)); - return __tpidr; -} -__END_DECLS - -#elif defined(__arm__) - -__BEGIN_DECLS -static __inline void * -__lwp_getprivate_fast(void) -{ -#if !defined(__thumb__) || defined(_ARM_ARCH_T2) - extern void *_lwp_getprivate(void); - void *rv; - __asm("mrc p15, 0, %0, c13, c0, 3" : "=r"(rv)); - if (__predict_true(rv)) - return rv; - /* - * Some ARM cores are broken and don't raise an undefined fault when an - * unrecogized mrc instruction is encountered, but just return zero. - * To do deal with that, if we get a zero we (re-)fetch the value using - * syscall. - */ - return _lwp_getprivate(); -#else - extern void *__aeabi_read_tp(void); - return __aeabi_read_tp(); -#endif /* !__thumb__ || _ARM_ARCH_T2 */ -} -__END_DECLS -#endif - -#endif /* _RTLD_SOURCE || _LIBC_SOURCE || __LIBPTHREAD_SOURCE__ */ - /* Machine-dependent uc_flags */ -#define _UC_TLSBASE 0x00080000 /* see <sys/ucontext.h> */ +#define _UC_TLSBASE _UC_MD_BIT19 /* see <sys/ucontext.h> */ /* Machine-dependent uc_flags for arm */ -#define _UC_ARM_VFP 0x00010000 /* FPU field is VFP */ +#define _UC_ARM_VFP _UC_MD_BIT16 /* FPU field is VFP */ /* used by signal delivery to indicate status of signal stack */ -#define _UC_SETSTACK 0x00020000 -#define _UC_CLRSTACK 0x00040000 +#define _UC_SETSTACK _UC_MD_BIT17 +#define _UC_CLRSTACK _UC_MD_BIT18 #define _UC_MACHINE_SP(uc) ((uc)->uc_mcontext.__gregs[_REG_SP]) #define _UC_MACHINE_FP(uc) ((uc)->uc_mcontext.__gregs[_REG_FP]) diff --git a/lib/libc/include/generic-netbsd/arm/mutex.h b/lib/libc/include/generic-netbsd/arm/mutex.h @@ -1,4 +1,4 @@ -/* $NetBSD: mutex.h,v 1.27.4.1 2023/08/09 17:42:01 martin Exp $ */ +/* $NetBSD: mutex.h,v 1.29 2023/07/12 12:50:12 riastradh Exp $ */ /*- * Copyright (c) 2002, 2007 The NetBSD Foundation, Inc. diff --git a/lib/libc/include/generic-netbsd/arm/proc.h b/lib/libc/include/generic-netbsd/arm/proc.h @@ -1,4 +1,4 @@ -/* $NetBSD: proc.h,v 1.19 2020/08/14 16:18:36 skrll Exp $ */ +/* $NetBSD: proc.h,v 1.20 2024/02/10 18:43:51 andvar Exp $ */ /* * Copyright (c) 1994 Mark Brinicombe. @@ -48,7 +48,7 @@ struct mdlwp { volatile uint32_t md_astpending; }; -/* Flags setttings for md_flags */ +/* Flags settings for md_flags */ #define MDLWP_NOALIGNFLT 0x00000002 /* For EXEC_AOUT */ #define MDLWP_VFPINTR 0x00000004 /* VFP used in intr */ diff --git a/lib/libc/include/generic-netbsd/arm/profile.h b/lib/libc/include/generic-netbsd/arm/profile.h @@ -1,4 +1,4 @@ -/* $NetBSD: profile.h,v 1.18 2018/01/24 09:04:45 skrll Exp $ */ +/* $NetBSD: profile.h,v 1.18.42.1 2026/04/02 19:12:03 martin Exp $ */ /* * Copyright (c) 2001 Ben Harris @@ -38,90 +38,25 @@ * prologue. */ -#define MCOUNT_ASM_NAME "__mcount" #define PLTSYM -#if !defined(__ARM_EABI__) -#define MCOUNT \ - __asm(".text"); \ - __asm(".align 0"); \ - __asm(".arm"); \ - __asm(".type " MCOUNT_ASM_NAME ",%function"); \ - __asm(".global " MCOUNT_ASM_NAME); \ - __asm(MCOUNT_ASM_NAME ":"); \ - /* \ - * Preserve registers that are trashed during mcount \ - */ \ - __asm("push {r0-r3, ip, lr}"); \ - /* Check what mode we're in. EQ => 32, NE => 26 */ \ - __asm("teq r0, r0"); \ - __asm("teq pc, r15"); \ - /* \ - * find the return address for mcount, \ - * and the return address for mcount's caller. \ - * \ - * frompcindex = pc pushed by call into self. \ - */ \ - __asm("moveq r0, ip"); \ - __asm("bicne r0, ip, #0xfc000003"); \ - /* \ - * selfpc = pc pushed by mcount call \ - */ \ - __asm("moveq r1, lr"); \ - __asm("bicne r1, lr, #0xfc000003"); \ - /* \ - * Call the real mcount code \ - */ \ - __asm("bl " ___STRING(_C_LABEL(_mcount)) PLTSYM); \ - /* \ - * Restore registers that were trashed during mcount \ - */ \ - __asm("pop {r0-r3, lr}"); \ - __asm("pop {pc}"); \ - __asm(".size " MCOUNT_ASM_NAME ", .-" MCOUNT_ASM_NAME); -#elif defined(__ARM_DWARF_EH__) -#define MCOUNT \ - __asm(".text"); \ - __asm(".align 0"); \ - __asm(".arm"); \ - __asm(".type " MCOUNT_ASM_NAME ",%function"); \ - __asm(".global " MCOUNT_ASM_NAME); \ - __asm(MCOUNT_ASM_NAME ":"); \ - __asm(".cfi_startproc"); \ - /* \ - * Preserve registers that are trashed during mcount \ - */ \ - __asm("push {r0-r3, ip, lr}"); \ - __asm(".cfi_def_cfa_offset 24"); \ - __asm(".cfi_offset 14, -4"); \ - __asm(".cfi_offset 12, -8"); \ - __asm(".cfi_offset 3, -12"); \ - __asm(".cfi_offset 2, -16"); \ - __asm(".cfi_offset 1, -20"); \ - __asm(".cfi_offset 0, -24"); \ - /* \ - * find the return address for mcount, \ - * and the return address for mcount's caller. \ - * \ - * frompcindex = pc pushed by call into self. \ - */ \ - __asm("mov r0, ip"); \ - /* \ - * selfpc = pc pushed by mcount call \ - */ \ - __asm("mov r1, lr"); \ - /* \ - * Call the real mcount code \ - */ \ - __asm("bl " ___STRING(_C_LABEL(_mcount)) PLTSYM); \ - /* \ - * Restore registers that were trashed during mcount \ - */ \ - __asm("pop {r0-r3, lr}"); \ - __asm("pop {pc}"); \ - __asm(".cfi_endproc"); \ - __asm(".size " MCOUNT_ASM_NAME ", .-" MCOUNT_ASM_NAME); +#if defined (_ARM_ARCH_4T) +# define RET "bx ip" +#else +# define RET "mov pc, ip" +#endif + +#if defined(__ARM_DWARF_EH__) +#define _PROF_UNWINDER_SAVE "" +#define _PROF_UNWINDER_START "" +#define _PROF_UNWINDER_END "" #else +#define _PROF_UNWINDER_SAVE ".save {r0-r3, lr}\n" +#define _PROF_UNWINDER_START ".fnstart\n" +#define _PROF_UNWINDER_END ".fnend\n" +#endif + +#define MCOUNT_ASM_NAME "__gnu_mcount_nc" #define MCOUNT \ __asm(".text"); \ __asm(".align 0"); \ @@ -129,27 +64,26 @@ __asm(".type " MCOUNT_ASM_NAME ",%function"); \ __asm(".global " MCOUNT_ASM_NAME); \ __asm(MCOUNT_ASM_NAME ":"); \ - __asm(".fnstart"); \ + __asm(_PROF_UNWINDER_START); \ __asm(".cfi_startproc"); \ /* \ * Preserve registers that are trashed during mcount \ */ \ - __asm("push {r0-r3, ip, lr}"); \ - __asm(".save {r0-r3, lr}"); \ - __asm(".cfi_def_cfa_offset 24"); \ + __asm("push {r0-r3, lr}"); \ + __asm(_PROF_UNWINDER_SAVE); \ + __asm(".cfi_def_cfa_offset 20"); \ __asm(".cfi_offset 14, -4"); \ - __asm(".cfi_offset 12, -8"); \ - __asm(".cfi_offset 3, -12"); \ - __asm(".cfi_offset 2, -16"); \ - __asm(".cfi_offset 1, -20"); \ - __asm(".cfi_offset 0, -24"); \ + __asm(".cfi_offset 3, -8"); \ + __asm(".cfi_offset 2, -12"); \ + __asm(".cfi_offset 1, -16"); \ + __asm(".cfi_offset 0, -20"); \ /* \ * find the return address for mcount, \ * and the return address for mcount's caller. \ * \ * frompcindex = pc pushed by call into self. \ */ \ - __asm("mov r0, ip"); \ + __asm("ldr r0, [sp, #20]"); \ /* \ * selfpc = pc pushed by mcount call \ */ \ @@ -161,12 +95,10 @@ /* \ * Restore registers that were trashed during mcount \ */ \ - __asm("pop {r0-r3, lr}"); \ - __asm("pop {pc}"); \ + __asm("pop {r0-r3, ip, lr}"); \ + __asm(RET); \ __asm(".cfi_endproc"); \ - __asm(".fnend"); \ __asm(".size " MCOUNT_ASM_NAME ", .-" MCOUNT_ASM_NAME); -#endif #ifdef _KERNEL #include <arm/cpufunc.h> diff --git a/lib/libc/include/generic-netbsd/arm/setjmp.h b/lib/libc/include/generic-netbsd/arm/setjmp.h @@ -1,4 +1,4 @@ -/* $NetBSD: setjmp.h,v 1.5 2013/01/11 13:56:32 matt Exp $ */ +/* $NetBSD: setjmp.h,v 1.6 2024/05/06 07:29:30 skrll Exp $ */ /* * machine/setjmp.h: machine dependent setjmp-related information. @@ -10,11 +10,12 @@ * NOTE: The internal structure of a jmp_buf is *PRIVATE* * This information is provided as there is software * that fiddles with this with obtain the stack pointer - * (yes really ! and its commercial !). + * (yes really ! and it's commercial !). * * Description of the setjmp buffer * - * word 0 magic number (dependent on creator) + * Word Field Comment + * 0 magic number (dependent on creator) * 13 fpscr vfp status control register * 14 r4 register 4 * 15 r5 register 5 @@ -47,13 +48,13 @@ * A side note I should mention - Please do not tamper * with the floating point fields. While they are * always saved and restored at the moment this cannot - * be garenteed especially if the compiler happens + * be guaranteed especially if the compiler happens * to be generating soft-float code so no fp * registers will be used. * - * Whilst this can be seen an encouraging people to + * Whilst this can be seen as encouraging people to * use the setjmp buffer in this way I think that it - * is for the best then if changes occur compiles will + * is for the best then, if changes occur, compiles will * break rather than just having new builds falling over * mysteriously. */ diff --git a/lib/libc/include/generic-netbsd/arpa/nameser.h b/lib/libc/include/generic-netbsd/arpa/nameser.h @@ -1,4 +1,4 @@ -/* $NetBSD: nameser.h,v 1.27 2021/12/08 20:50:01 andvar Exp $ */ +/* $NetBSD: nameser.h,v 1.29 2025/07/15 22:15:04 andvar Exp $ */ /* * Portions Copyright (C) 2004, 2005, 2008, 2009 Internet Systems Consortium, Inc. ("ISC") @@ -343,7 +343,7 @@ typedef enum __ns_type { ns_t_rrsig = 46, /*%< RRset Signature */ ns_t_nsec = 47, /*%< Negative security */ ns_t_dnskey = 48, /*%< DNS Key */ - ns_t_dhcid = 49, /*%< Dynamic host configuratin identifier */ + ns_t_dhcid = 49, /*%< Dynamic host configuration identifier */ ns_t_nsec3 = 50, /*%< Negative security type 3 */ ns_t_nsec3param = 51, /*%< Negative security type 3 parameters */ ns_t_hip = 55, /*%< Host Identity Protocol */ @@ -356,7 +356,7 @@ typedef enum __ns_type { ns_t_maila = 254, /*%< Transfer mail agent records. */ ns_t_any = 255, /*%< Wildcard match. */ ns_t_zxfr = 256, /*%< BIND-specific, nonstandard. */ - ns_t_dlv = 32769, /*%< DNSSEC look-aside validatation. */ + ns_t_dlv = 32769, /*%< DNSSEC look-aside validation. */ ns_t_max = 65536 } ns_type; diff --git a/lib/libc/include/generic-netbsd/arpa/nameser_compat.h b/lib/libc/include/generic-netbsd/arpa/nameser_compat.h @@ -1,4 +1,4 @@ -/* $NetBSD: nameser_compat.h,v 1.9 2022/04/21 04:03:54 gutteridge Exp $ */ +/* $NetBSD: nameser_compat.h,v 1.10 2024/02/05 21:46:05 andvar Exp $ */ /* Copyright (c) 1983, 1989 * The Regents of the University of California. All rights reserved. @@ -64,7 +64,7 @@ typedef struct { /* fields in third byte */ unsigned qr: 1; /*%< response flag */ unsigned opcode: 4; /*%< purpose of message */ - unsigned aa: 1; /*%< authoritive answer */ + unsigned aa: 1; /*%< authoritative answer */ unsigned tc: 1; /*%< truncated message */ unsigned rd: 1; /*%< recursion desired */ /* fields in fourth byte */ @@ -78,7 +78,7 @@ typedef struct { /* fields in third byte */ unsigned rd :1; /*%< recursion desired */ unsigned tc :1; /*%< truncated message */ - unsigned aa :1; /*%< authoritive answer */ + unsigned aa :1; /*%< authoritative answer */ unsigned opcode :4; /*%< purpose of message */ unsigned qr :1; /*%< response flag */ /* fields in fourth byte */ diff --git a/lib/libc/include/generic-netbsd/assert.h b/lib/libc/include/generic-netbsd/assert.h @@ -1,4 +1,4 @@ -/* $NetBSD: assert.h,v 1.25 2020/04/17 15:22:34 kamil Exp $ */ +/* $NetBSD: assert.h,v 1.27 2025/03/29 01:43:38 riastradh Exp $ */ /*- * Copyright (c) 1992, 1993 @@ -48,46 +48,36 @@ #undef assert #ifdef NDEBUG -# ifndef __lint__ -# define assert(e) (__static_cast(void,0)) -# else /* !__lint__ */ -# define assert(e) -# endif /* __lint__ */ +# define assert(e) (__static_cast(void,0)) #else /* !NDEBUG */ # if __STDC__ # define assert(e) \ - ((e) ? __static_cast(void,0) : __assert13(__FILE__, __LINE__, \ - __assert_function__, #e)) + (__predict_true(e) ? __static_cast(void,0) \ + : __assert13(__FILE__, __LINE__, __assert_function__, #e)) # else /* PCC */ # define assert(e) \ - ((e) ? __static_cast(void,0) : __assert13(__FILE__, __LINE__, \ - __assert_function__, "e")) + (__predict_true(e) ? __static_cast(void,0) \ + : __assert13(__FILE__, __LINE__, __assert_function__, "e")) # endif /* !__STDC__ */ #endif /* NDEBUG */ #undef _DIAGASSERT #if !defined(_DIAGNOSTIC) -# if !defined(__lint__) -# define _DIAGASSERT(e) (__static_cast(void,0)) -# else /* !__lint__ */ -# define _DIAGASSERT(e) -# endif /* __lint__ */ +# define _DIAGASSERT(e) (__static_cast(void,0)) #else /* _DIAGNOSTIC */ # if __STDC__ # define _DIAGASSERT(e) \ - ((e) ? __static_cast(void,0) : __diagassert13(__FILE__, __LINE__, \ - __assert_function__, #e)) + (__predict_true(e) ? __static_cast(void,0) \ + : __diagassert13(__FILE__, __LINE__, __assert_function__, #e)) # else /* !__STDC__ */ # define _DIAGASSERT(e) \ - ((e) ? __static_cast(void,0) : __diagassert13(__FILE__, __LINE__, \ - __assert_function__, "e")) + (__predict_true(e) ? __static_cast(void,0) \ + : __diagassert13(__FILE__, __LINE__, __assert_function__, "e")) # endif #endif /* _DIAGNOSTIC */ -#if defined(__lint__) -#define __assert_function__ (__static_cast(const void *,0)) -#elif defined(__STDC_VERSION__) && __STDC_VERSION__ >= 199901L +#if defined(__STDC_VERSION__) && __STDC_VERSION__ >= 199901L #define __assert_function__ __func__ #elif __GNUC_PREREQ__(2, 6) #define __assert_function__ __PRETTY_FUNCTION__ diff --git a/lib/libc/include/generic-netbsd/bitstring.h b/lib/libc/include/generic-netbsd/bitstring.h @@ -1,4 +1,4 @@ -/* $NetBSD: bitstring.h,v 1.14 2016/03/17 02:25:32 christos Exp $ */ +/* $NetBSD: bitstring.h,v 1.15 2024/05/12 10:41:23 rillig Exp $ */ /* * Copyright (c) 1989, 1993 @@ -98,7 +98,7 @@ typedef unsigned char bitstr_t; bit_clear(_name, _start); \ _start++; \ } \ -} while(/*CONSTCOND*/0) +} while (0) /* set bits start ... stop in bitstring */ #define bit_nset(name, start, stop) do { \ @@ -108,7 +108,7 @@ typedef unsigned char bitstr_t; bit_set(_name, _start); \ _start++; \ } \ -} while(/*CONSTCOND*/0) +} while (0) /* find first bit clear in name */ #define bit_ffc(name, nbits, value) do { \ @@ -121,7 +121,7 @@ typedef unsigned char bitstr_t; break; \ } \ *(value) = _value; \ -} while(/*CONSTCOND*/0) +} while (0) /* find first bit set in name */ #define bit_ffs(name, nbits, value) do { \ @@ -134,6 +134,6 @@ typedef unsigned char bitstr_t; break; \ } \ *(value) = _value; \ -} while(/*CONSTCOND*/0) +} while (0) #endif /* !_BITSTRING_H_ */ \ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/cdbw.h b/lib/libc/include/generic-netbsd/cdbw.h @@ -1,4 +1,4 @@ -/* $NetBSD: cdbw.h,v 1.2 2012/06/03 21:21:45 joerg Exp $ */ +/* $NetBSD: cdbw.h,v 1.3 2023/08/08 10:34:08 riastradh Exp $ */ /*- * Copyright (c) 2010 The NetBSD Foundation, Inc. * All rights reserved. @@ -50,7 +50,7 @@ int cdbw_put_data(struct cdbw *, const void *, size_t, int cdbw_put_key(struct cdbw *, const void *, size_t, uint32_t); uint32_t cdbw_stable_seeder(void); -int cdbw_output(struct cdbw *, int, const char[16], +int cdbw_output(struct cdbw *, int, const char *, uint32_t (*)(void)); void cdbw_close(struct cdbw *); diff --git a/lib/libc/include/generic-netbsd/crypto/cryptodev.h b/lib/libc/include/generic-netbsd/crypto/cryptodev.h @@ -1,4 +1,4 @@ -/* $NetBSD: cryptodev.h,v 1.50.4.1 2023/08/09 17:42:03 martin Exp $ */ +/* $NetBSD: cryptodev.h,v 1.51.8.1 2026/05/07 14:40:13 martin Exp $ */ /* $FreeBSD: src/sys/opencrypto/cryptodev.h,v 1.2.2.6 2003/07/02 17:04:50 sam Exp $ */ /* $OpenBSD: cryptodev.h,v 1.33 2002/07/17 23:52:39 art Exp $ */ @@ -159,48 +159,48 @@ #define CRYPTO_ALG_FLAG_DSA_SHA 0x04 /* Can do SHA on msg */ struct session_op { - u_int32_t cipher; /* ie. CRYPTO_DES_CBC */ - u_int32_t mac; /* ie. CRYPTO_MD5_HMAC */ - u_int32_t comp_alg; /* ie. CRYPTO_GZIP_COMP */ + uint32_t cipher; /* ie. CRYPTO_DES_CBC */ + uint32_t mac; /* ie. CRYPTO_MD5_HMAC */ + uint32_t comp_alg; /* ie. CRYPTO_GZIP_COMP */ - u_int32_t keylen; /* cipher key */ + uint32_t keylen; /* cipher key */ void * key; - int mackeylen; /* mac key */ + uint32_t mackeylen; /* mac key */ void * mackey; - u_int32_t ses; /* returns: session # */ + uint32_t ses; /* returns: session # */ }; /* to support multiple session creation */ struct session_n_op { - u_int32_t cipher; /* ie. CRYPTO_DES_CBC */ - u_int32_t mac; /* ie. CRYPTO_MD5_HMAC */ - u_int32_t comp_alg; /* ie. CRYPTO_GZIP_COMP */ + uint32_t cipher; /* ie. CRYPTO_DES_CBC */ + uint32_t mac; /* ie. CRYPTO_MD5_HMAC */ + uint32_t comp_alg; /* ie. CRYPTO_GZIP_COMP */ - u_int32_t keylen; /* cipher key */ + uint32_t keylen; /* cipher key */ void * key; - int mackeylen; /* mac key */ + uint32_t mackeylen; /* mac key */ void * mackey; - u_int32_t ses; /* returns: session # */ + uint32_t ses; /* returns: session # */ int status; }; struct crypt_op { - u_int32_t ses; - u_int16_t op; /* i.e. COP_ENCRYPT */ + uint32_t ses; + uint16_t op; /* i.e. COP_ENCRYPT */ #define COP_ENCRYPT 1 #define COP_DECRYPT 2 #define COP_COMP 3 #define COP_DECOMP 4 - u_int16_t flags; + uint16_t flags; #define COP_F_BATCH 0x0008 /* Dispatch as quickly as possible */ - u_int len; /* src len */ + uint32_t len; /* src len */ void * src, *dst; /* become iov[] inside kernel */ void * mac; /* must be big enough for chosen MAC */ void * iv; - u_int dst_len; /* dst len if not 0 */ + uint32_t dst_len; /* dst len if not 0 */ }; /* to support multiple session creation */ @@ -219,27 +219,27 @@ struct crypt_op { */ struct crypt_n_op { - u_int32_t ses; - u_int16_t op; /* i.e. COP_ENCRYPT */ + uint32_t ses; + uint16_t op; /* i.e. COP_ENCRYPT */ #define COP_ENCRYPT 1 #define COP_DECRYPT 2 - u_int16_t flags; + uint16_t flags; #define COP_F_BATCH 0x0008 /* Dispatch as quickly as possible */ #define COP_F_MORE 0x0010 /* more data to follow */ - u_int len; /* src len */ + uint32_t len; /* src len */ - u_int32_t reqid; /* request id */ + uint32_t reqid; /* request id */ int status; /* status of request -accepted or not */ void *opaque; /* opaque pointer returned to user */ - u_int32_t keylen; /* cipher key - optional */ + uint32_t keylen; /* cipher key - optional */ void * key; - u_int32_t mackeylen; /* also optional */ + uint32_t mackeylen; /* also optional */ void * mackey; void * src, *dst; /* become iov[] inside kernel */ void * mac; /* must be big enough for chosen MAC */ void * iv; - u_int dst_len; /* dst len if not 0 */ + uint32_t dst_len; /* dst len if not 0 */ }; /* CIOCNCRYPTM ioctl argument, supporting one or more asynchronous @@ -255,7 +255,7 @@ struct crypt_mop { struct crypt_sfop { size_t count; - u_int32_t *sesid; + uint32_t *sesid; }; struct crypt_sgop { @@ -268,17 +268,17 @@ struct crypt_sgop { /* bignum parameter, in packed bytes, ... */ struct crparam { void * crp_p; - u_int crp_nbits; + uint32_t crp_nbits; }; #define CRK_MAXPARAM 8 struct crypt_kop { - u_int crk_op; /* ie. CRK_MOD_EXP or other */ - u_int crk_status; /* return status */ - u_short crk_iparams; /* # of input parameters */ - u_short crk_oparams; /* # of output parameters */ - u_int crk_pad1; + uint32_t crk_op; /* ie. CRK_MOD_EXP or other */ + uint32_t crk_status; /* return status */ + uint16_t crk_iparams; /* # of input parameters */ + uint16_t crk_oparams; /* # of output parameters */ + uint32_t crk_pad1; struct crparam crk_param[CRK_MAXPARAM]; }; @@ -295,11 +295,11 @@ struct crypt_kop { * user application. */ struct crypt_n_kop { - u_int crk_op; /* ie. CRK_MOD_EXP or other */ - u_int crk_status; /* return status */ - u_short crk_iparams; /* # of input parameters */ - u_short crk_oparams; /* # of output parameters */ - u_int32_t crk_reqid; /* request id */ + uint32_t crk_op; /* ie. CRK_MOD_EXP or other */ + uint32_t crk_status; /* return status */ + uint16_t crk_iparams; /* # of input parameters */ + uint16_t crk_oparams; /* # of output parameters */ + uint32_t crk_reqid; /* request id */ struct crparam crk_param[CRK_MAXPARAM]; void *crk_opaque; /* opaque pointer returned to user */ }; @@ -314,8 +314,8 @@ struct crypt_mkop { * not in the original crypt_kop structure (crk_status). */ struct crypt_result { - u_int32_t reqid; /* request id */ - u_int32_t status; /* status of request: 0 if successful */ + uint32_t reqid; /* request id */ + uint32_t status; /* status of request: 0 if successful */ void * opaque; /* Opaque pointer from the user, passed along */ }; @@ -364,10 +364,10 @@ struct cryptret { * Please use F_SETFD against the cloned descriptor. But this ioctl * is obsolete (the device now clones): please, just don't use it. */ -#define CRIOGET _IOWR('c', 100, u_int32_t) +#define CRIOGET _IOWR('c', 100, uint32_t) /* the following are done against the cloned descriptor */ -#define CIOCFSESSION _IOW('c', 102, u_int32_t) +#define CIOCFSESSION _IOW('c', 102, uint32_t) #define CIOCKEY _IOWR('c', 104, struct crypt_kop) #define CIOCNFKEYM _IOWR('c', 108, struct crypt_mkop) #define CIOCNFSESSION _IOW('c', 109, struct crypt_sfop) @@ -379,24 +379,24 @@ struct cryptret { #define CIOCCRYPT _IOWR('c', 114, struct crypt_op) #define CIOCNCRYPTM _IOWR('c', 115, struct crypt_mop) -#define CIOCASYMFEAT _IOR('c', 105, u_int32_t) +#define CIOCASYMFEAT _IOR('c', 105, uint32_t) struct cryptotstat { struct timespec acc; /* total accumulated time */ struct timespec min; /* max time */ struct timespec max; /* max time */ - u_int32_t count; /* number of observations */ + uint32_t count; /* number of observations */ }; struct cryptostats { - u_int32_t cs_ops; /* symmetric crypto ops submitted */ - u_int32_t cs_errs; /* symmetric crypto ops that failed */ - u_int32_t cs_kops; /* asymmetric/key ops submitted */ - u_int32_t cs_kerrs; /* asymmetric/key ops that failed */ - u_int32_t cs_intrs; /* crypto swi thread activations */ - u_int32_t cs_rets; /* crypto return thread activations */ - u_int32_t cs_blocks; /* symmetric op driver block */ - u_int32_t cs_kblocks; /* symmetric op driver block */ + uint32_t cs_ops; /* symmetric crypto ops submitted */ + uint32_t cs_errs; /* symmetric crypto ops that failed */ + uint32_t cs_kops; /* asymmetric/key ops submitted */ + uint32_t cs_kerrs; /* asymmetric/key ops that failed */ + uint32_t cs_intrs; /* crypto swi thread activations */ + uint32_t cs_rets; /* crypto return thread activations */ + uint32_t cs_blocks; /* symmetric op driver block */ + uint32_t cs_kblocks; /* symmetric op driver block */ /* * When CRYPTO_TIMING is defined at compile time and the * sysctl debug.crypto is set to 1, the crypto system will @@ -423,18 +423,18 @@ struct uio; /* Standard initialization structure beginning */ struct cryptoini { int cri_alg; /* Algorithm to use */ - int cri_klen; /* Key length, in bits */ - int cri_rnd; /* Algorithm rounds, where relevant */ + uint32_t cri_klen; /* Key length, in bits */ + uint32_t cri_rnd; /* Algorithm rounds, where relevant */ char *cri_key; /* key to use */ - u_int8_t cri_iv[EALG_MAX_BLOCK_LEN]; /* IV to use */ + uint8_t cri_iv[EALG_MAX_BLOCK_LEN]; /* IV to use */ struct cryptoini *cri_next; }; /* Describe boundaries of a single crypto operation */ struct cryptodesc { - int crd_skip; /* How many bytes to ignore from start */ - int crd_len; /* How many bytes to process */ - int crd_inject; /* Where to inject results, if applicable */ + uint32_t crd_skip; /* How many bytes to ignore from start */ + uint32_t crd_len; /* How many bytes to process */ + uint32_t crd_inject; /* Where to inject results, if applicable */ int crd_flags; #define CRD_F_ENCRYPT 0x01 /* Set when doing encryption */ @@ -454,13 +454,20 @@ struct cryptodesc { struct cryptodesc *crd_next; }; +struct cryptop_data { + struct csession *cse; + struct iovec iovec[1]; /* user requests never have more */ + struct uio uio; + size_t iov_len; +}; + /* Structure describing complete operation */ struct cryptop { TAILQ_ENTRY(cryptop) crp_next; - u_int64_t crp_sid; /* Session ID */ + uint64_t crp_sid; /* Session ID */ - int crp_ilen; /* Input data total length */ - int crp_olen; /* Result total length */ + uint32_t crp_ilen; /* Input data total length */ + uint32_t crp_olen; /* Result total length */ int crp_etype; /* * Error type (zero means no error). @@ -505,19 +512,18 @@ struct cryptop { /* * everything below is private to crypto(4) */ - u_int32_t crp_reqid; /* request id */ + uint32_t crp_reqid; /* request id */ void * crp_usropaque; /* Opaque pointer from user, passed along */ struct timespec crp_tstamp; /* performance time stamp */ kcondvar_t crp_cv; struct fcrypt *fcrp; void * dst; void * mac; - u_int len; + uint32_t len; u_char tmp_iv[EALG_MAX_BLOCK_LEN]; u_char tmp_mac[CRYPTO_MAX_MAC_LEN]; - struct iovec iovec[1]; - struct uio uio; + struct cryptop_data cod; uint32_t magic; struct cpu_info *reqcpu; /* * save requested CPU to do cryptoret @@ -540,14 +546,15 @@ struct cryptop { struct cryptkop { TAILQ_ENTRY(cryptkop) krp_next; - u_int32_t krp_reqid; /* request id */ + uint32_t krp_reqid; /* request id */ void * krp_usropaque; /* Opaque pointer from user, passed along */ - u_int krp_op; /* ie. CRK_MOD_EXP or other */ - u_int krp_status; /* return status */ - u_short krp_iparams; /* # of input parameters */ - u_short krp_oparams; /* # of output parameters */ - u_int32_t krp_hid; + uint32_t krp_op; /* ie. CRK_MOD_EXP or other */ + uint32_t krp_status; /* return status */ + uint16_t krp_iparams; /* # of input parameters */ + uint16_t krp_oparams; /* # of output parameters */ + uint32_t krp_hid; + kmutex_t krp_lock; struct crparam krp_param[CRK_MAXPARAM]; /* kvm */ void (*krp_callback)(struct cryptkop *); /* * Callback function. @@ -564,29 +571,29 @@ struct cryptkop { /* Crypto capabilities structure */ struct cryptocap { - u_int32_t cc_sessions; + uint32_t cc_sessions; /* * Largest possible operator length (in bits) for each type of * encryption algorithm. */ - u_int16_t cc_max_op_len[CRYPTO_ALGORITHM_MAX + 1]; + uint16_t cc_max_op_len[CRYPTO_ALGORITHM_MAX + 1]; - u_int8_t cc_alg[CRYPTO_ALGORITHM_MAX + 1]; + uint8_t cc_alg[CRYPTO_ALGORITHM_MAX + 1]; - u_int8_t cc_kalg[CRK_ALGORITHM_MAX + 1]; + uint8_t cc_kalg[CRK_ALGORITHM_MAX + 1]; - u_int8_t cc_flags; - u_int8_t cc_qblocked; /* symmetric q blocked */ - u_int8_t cc_kqblocked; /* asymmetric q blocked */ + uint8_t cc_flags; + uint8_t cc_qblocked; /* symmetric q blocked */ + uint8_t cc_kqblocked; /* asymmetric q blocked */ #define CRYPTOCAP_F_CLEANUP 0x01 /* needs resource cleanup */ #define CRYPTOCAP_F_SOFTWARE 0x02 /* software implementation */ #define CRYPTOCAP_F_SYNC 0x04 /* operates synchronously */ void *cc_arg; /* callback argument */ - int (*cc_newsession)(void*, u_int32_t*, struct cryptoini*); + int (*cc_newsession)(void*, uint32_t*, struct cryptoini*); int (*cc_process) (void*, struct cryptop *, int); - void (*cc_freesession) (void *, u_int64_t); + void (*cc_freesession) (void *, uint64_t); void *cc_karg; /* callback argument */ int (*cc_kprocess) (void*, struct cryptkop *, int); @@ -602,29 +609,29 @@ struct cryptocap { */ #define CRYPTO_SESID2HID(_sid) ((((_sid) >> 32) & 0xffffff) - 1) #define CRYPTO_SESID2CAPS(_sid) (((_sid) >> 56) & 0xff) -#define CRYPTO_SESID2LID(_sid) (((u_int32_t) (_sid)) & 0xffffffff) +#define CRYPTO_SESID2LID(_sid) (((uint32_t) (_sid)) & 0xffffffff) MALLOC_DECLARE(M_CRYPTO_DATA); -extern int crypto_newsession(u_int64_t *sid, struct cryptoini *cri, int hard); -extern void crypto_freesession(u_int64_t sid); -extern int32_t crypto_get_driverid(u_int32_t flags); -extern int crypto_register(u_int32_t driverid, int alg, u_int16_t maxoplen, - u_int32_t flags, - int (*newses)(void*, u_int32_t*, struct cryptoini*), - void (*freeses)(void *, u_int64_t), +extern int crypto_newsession(uint64_t *sid, struct cryptoini *cri, int hard); +extern void crypto_freesession(uint64_t sid); +extern int32_t crypto_get_driverid(uint32_t flags); +extern int crypto_register(uint32_t driverid, int alg, uint16_t maxoplen, + uint32_t flags, + int (*newses)(void*, uint32_t*, struct cryptoini*), + void (*freeses)(void *, uint64_t), int (*process)(void*, struct cryptop *, int), void *arg); -extern int crypto_kregister(u_int32_t, int, u_int32_t, +extern int crypto_kregister(uint32_t, int, uint32_t, int (*)(void*, struct cryptkop *, int), void *arg); -extern int crypto_unregister(u_int32_t driverid, int alg); -extern int crypto_unregister_all(u_int32_t driverid); +extern int crypto_unregister(uint32_t driverid, int alg); +extern int crypto_unregister_all(uint32_t driverid); extern void crypto_dispatch(struct cryptop *crp); extern void crypto_kdispatch(struct cryptkop *); #define CRYPTO_SYMQ 0x1 #define CRYPTO_ASYMQ 0x2 -extern int crypto_unblock(u_int32_t, int); +extern int crypto_unblock(uint32_t, int); extern void crypto_done(struct cryptop *crp); extern void crypto_kdone(struct cryptkop *); extern int crypto_getfeat(int *); diff --git a/lib/libc/include/generic-netbsd/dev/i2c/emcfaninfo.h b/lib/libc/include/generic-netbsd/dev/i2c/emcfaninfo.h @@ -0,0 +1,234 @@ +/* $NetBSD: emcfaninfo.h,v 1.1 2025/03/11 13:56:46 brad Exp $ */ + +/* + * Copyright (c) 2025 Brad Spencer <brad@anduin.eldar.org> + * + * Permission to use, copy, modify, and distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#ifndef _DEV_I2C_EMCFANINFO_H_ +#define _DEV_I2C_EMCFANINFO_H_ + +#include <sys/gpio.h> + +struct emcfan_chip_info { + const int family; /* The EMC chipset family, 210X or 230X */ + const uint8_t product_id; /* The product ID as read from the chip */ + const char *name; /* What we are calling this chip */ + const int num_tachs; /* The number of tachometers */ + const int num_fans; /* The number of fans. This may be different than the number of tachometers. */ + const uint8_t fan_drive_registers[5]; /* The registers used to drive the fans, one for each */ + const uint8_t fan_divider_registers[5]; /* The divider registers, one for each possible fan */ + const bool internal_temp_zone; /* Does the chip have an internal temperature zone */ + const int num_external_temp_zones; /* The number of external temperature zones except for ones that are VIN4 */ + const bool vin4_temp_zone; /* Does the chip have a VIN4 temperature zone */ + const int num_gpio_pins; /* The number of gpio pins that this chip has */ + const int gpio_pin_ability[6]; /* The abilities for each gpio pin */ + const char *gpio_names[6]; /* The default names of the gpio pins */ + const uint64_t register_void[4]; /* 4 64 bit values that specify if a particular register is valid */ +}; + +static struct emcfan_chip_info emcfan_chip_infos[] = { + { + .family = EMCFAN_FAMILY_210X, + .product_id = EMCFAN_PRODUCT_2101, + .name = "EMC2101", + .num_tachs = 1, + .num_fans = 1, + .fan_drive_registers = { EMCFAN_2101_FAN_DRIVE }, + .fan_divider_registers = { EMCFAN_2101_FAN_DIVIDE }, + .internal_temp_zone = true, + .num_external_temp_zones = 1, + .vin4_temp_zone = false, + .num_gpio_pins = 0, + .register_void[0] = 0b0000000000000000000000000000001000000011110111111111111110111111, + .register_void[1] = 0b0000000000000000000000000000000011111111111111111111111111000000, + .register_void[2] = 0b1000000000000000000000000000000000000000000000000000000000000000, + .register_void[3] = 0b1110000000000000000000000000000000000000000000000000000000000000, + }, + { + .family = EMCFAN_FAMILY_210X, + .product_id = EMCFAN_PRODUCT_2101R, + .name = "EMC2101-R", + .num_tachs = 1, + .num_fans = 1, + .fan_drive_registers = { EMCFAN_2101_FAN_DRIVE }, + .fan_divider_registers = { EMCFAN_2101_FAN_DIVIDE }, + .internal_temp_zone = true, + .num_external_temp_zones = 1, + .vin4_temp_zone = false, + .num_gpio_pins = 0, + .register_void[0] = 0b0000000000000000000000000000001000000011110111111111111110111111, + .register_void[1] = 0b0000000000000000000000000000000011111111111111111111111111000000, + .register_void[2] = 0b1000000000000000000000000000000000000000000000000000000000000000, + .register_void[3] = 0b1110000000000000000000000000000000000000000000000000000000000000, + }, + { + .family = EMCFAN_FAMILY_210X, + .product_id = EMCFAN_PRODUCT_2103_1, + .name = "EMC2103-1", + .num_tachs = 1, + .num_fans = 1, + .fan_drive_registers = { EMCFAN_210_346_FAN_1_DRIVE }, + .fan_divider_registers = { EMCFAN_210_346_FAN_1_DIVIDE }, + .internal_temp_zone = true, + .num_external_temp_zones = 1, + .vin4_temp_zone = false, + .num_gpio_pins = 0, + .register_void[0] = 0b0001000100010001000011111111101110100010100100110011010000001111, + .register_void[1] = 0b0000001111111111111111111111111111111111111111111111111111101111, + .register_void[2] = 0b0000000000000000000000000000000000000000000000000000000000000000, + .register_void[3] = 0b1111000000000000100000000000000000000000000000000000000000000000, + }, + { + .family = EMCFAN_FAMILY_210X, + .product_id = EMCFAN_PRODUCT_2103_24, + .name = "EMC2103-2/4", + .num_tachs = 1, + .num_fans = 1, + .fan_drive_registers = { EMCFAN_210_346_FAN_1_DRIVE }, + .fan_divider_registers = { EMCFAN_210_346_FAN_1_DIVIDE }, + .internal_temp_zone = true, + .num_external_temp_zones = 3, + .vin4_temp_zone = false, + .num_gpio_pins = 2, + .gpio_pin_ability = { + GPIO_PIN_INPUT | GPIO_PIN_OUTPUT | GPIO_PIN_OPENDRAIN | GPIO_PIN_PUSHPULL, + GPIO_PIN_INPUT | GPIO_PIN_OUTPUT | GPIO_PIN_OPENDRAIN | GPIO_PIN_PUSHPULL + }, + .gpio_names = { "GPIO1", "GPIO2" }, + .register_void[0] = 0b0001011100010111000011111111101110101110101101110011010011111111, + .register_void[1] = 0b0000001111111111111111111111111111111111111111111111111111101111, + .register_void[2] = 0b0000000000000000000000000000000000000000000000000000000000000000, + .register_void[3] = 0b1111000000000000100000000111111000000000000000000000000000000000, + }, + { + .family = EMCFAN_FAMILY_210X, + .product_id = EMCFAN_PRODUCT_2104, + .name = "EMC2104", + .num_tachs = 2, + .num_fans = 2, + .fan_drive_registers = { EMCFAN_210_346_FAN_1_DRIVE, EMCFAN_210_346_FAN_2_DRIVE }, + .fan_divider_registers = { EMCFAN_210_346_FAN_1_DIVIDE, EMCFAN_210_346_FAN_1_DIVIDE }, + .internal_temp_zone = true, + .num_external_temp_zones = 4, + .vin4_temp_zone = true, + .num_gpio_pins = 3, + .gpio_pin_ability = { + GPIO_PIN_INPUT | GPIO_PIN_OUTPUT | GPIO_PIN_OPENDRAIN | GPIO_PIN_PUSHPULL | GPIO_PIN_ALT0, + GPIO_PIN_INPUT | GPIO_PIN_OUTPUT | GPIO_PIN_OPENDRAIN | GPIO_PIN_PUSHPULL | GPIO_PIN_ALT0, + GPIO_PIN_INPUT | GPIO_PIN_OUTPUT | GPIO_PIN_OPENDRAIN | GPIO_PIN_PUSHPULL | GPIO_PIN_ALT0 + }, + .gpio_names = { "CLK_IN / GPIO1", "TACH2 / GPIO2", "PWM2 / GPIO3" }, + .register_void[0] = 0b0011111100111111000011111111111110111111111100011111011111111111, + .register_void[1] = 0b0000001111111111111111111111111111111111111111111111111111101111, + .register_void[2] = 0b0000001111111111111111111111111111111111111111111111111111101111, + .register_void[3] = 0b1111000000000000100000000111111100000000000000000000000000000000, + }, + { + .family = EMCFAN_FAMILY_210X, + .product_id = EMCFAN_PRODUCT_2106, + .name = "EMC2106", + .num_tachs = 2, + .num_fans = 4, + .fan_drive_registers = { EMCFAN_210_346_FAN_1_DRIVE, EMCFAN_210_346_FAN_2_DRIVE, EMCFAN_2106_FAN_3_DRIVE, EMCFAN_2106_FAN_4_DRIVE }, + .fan_divider_registers = { EMCFAN_210_346_FAN_1_DIVIDE, EMCFAN_210_346_FAN_1_DIVIDE, EMCFAN_2106_FAN_3_DIVIDE, EMCFAN_2106_FAN_4_DIVIDE }, + .internal_temp_zone = true, + .num_external_temp_zones = 4, + .vin4_temp_zone = true, + .num_gpio_pins = 6, + .gpio_pin_ability = { + GPIO_PIN_INPUT | GPIO_PIN_OUTPUT | GPIO_PIN_OPENDRAIN | GPIO_PIN_PUSHPULL | GPIO_PIN_ALT0, + GPIO_PIN_INPUT | GPIO_PIN_OUTPUT | GPIO_PIN_OPENDRAIN | GPIO_PIN_PUSHPULL | GPIO_PIN_ALT0, + GPIO_PIN_INPUT | GPIO_PIN_OUTPUT | GPIO_PIN_OPENDRAIN | GPIO_PIN_PUSHPULL | GPIO_PIN_ALT0, + GPIO_PIN_INPUT | GPIO_PIN_OUTPUT | GPIO_PIN_OPENDRAIN | GPIO_PIN_PUSHPULL | GPIO_PIN_ALT0 | GPIO_PIN_ALT1, + GPIO_PIN_INPUT | GPIO_PIN_OUTPUT | GPIO_PIN_OPENDRAIN | GPIO_PIN_PUSHPULL | GPIO_PIN_ALT0 | GPIO_PIN_ALT1, + GPIO_PIN_INPUT | GPIO_PIN_OUTPUT | GPIO_PIN_OPENDRAIN | GPIO_PIN_PUSHPULL + }, + .gpio_names = { "CLK_IN / GPIO1", "TACH2 / GPIO2", "PWM2 / GPIO3", "OVERT2 / GPIO4 / PWM3", "OVERT3 / GPIO5 / PWM4", "GPIO6" }, + .register_void[0] = 0b0011111100111111111111111111111110111111111100011111011111111111, + .register_void[1] = 0b0000001111111111111111111111111111111111111111111111111111101111, + .register_void[2] = 0b0000001111111111111111111111111111111111111111111111111111101111, + .register_void[3] = 0b1111000000000000100000000111111100000000000000000000000000000000, + }, + { + .family = EMCFAN_FAMILY_230X, + .product_id = EMCFAN_PRODUCT_2301, + .name = "EMC2301", + .num_tachs = 1, + .num_fans = 1, + .fan_drive_registers = { EMCFAN_230X_FAN_1_DRIVE }, + .fan_divider_registers = { EMCFAN_230X_FAN_1_DIVIDE }, + .internal_temp_zone = false, + .num_external_temp_zones = 0, + .vin4_temp_zone = false, + .num_gpio_pins = 0, + .register_void[0] = 0b1111111111101111001111101111000100000000000000000000000000000000, + .register_void[1] = 0b0000000000000000000000000000000000000000000000000000000000000000, + .register_void[2] = 0b0000000000000000000000000000000000000000000000000000000000000000, + .register_void[3] = 0b1110000000000000100000000000000000000000000000000000000000000000, + }, + { + .family = EMCFAN_FAMILY_230X, + .product_id = EMCFAN_PRODUCT_2302, + .name = "EMC2302", + .num_tachs = 2, + .num_fans = 2, + .fan_drive_registers = { EMCFAN_230X_FAN_1_DRIVE, EMCFAN_230X_FAN_2_DRIVE }, + .fan_divider_registers = { EMCFAN_230X_FAN_1_DIVIDE, EMCFAN_230X_FAN_2_DIVIDE }, + .internal_temp_zone = false, + .num_external_temp_zones = 0, + .vin4_temp_zone = false, + .num_gpio_pins = 0, + .register_void[0] = 0b1111111111101111001111101111000100000000000000000000000000000000, + .register_void[1] = 0b0000000000000000000000000000000000000000000000001111111111101111, + .register_void[2] = 0b0000000000000000000000000000000000000000000000000000000000000000, + .register_void[3] = 0b1110000000000000100000000000000000000000000000000000000000000000, + }, + { + .family = EMCFAN_FAMILY_230X, + .product_id = EMCFAN_PRODUCT_2303, + .name = "EMC2303", + .num_tachs = 3, + .num_fans = 3, + .fan_drive_registers = { EMCFAN_230X_FAN_1_DRIVE, EMCFAN_230X_FAN_2_DRIVE, EMCFAN_230X_FAN_3_DRIVE }, + .fan_divider_registers = { EMCFAN_230X_FAN_1_DIVIDE, EMCFAN_230X_FAN_2_DIVIDE, EMCFAN_230X_FAN_3_DIVIDE }, + .internal_temp_zone = false, + .num_external_temp_zones = 0, + .vin4_temp_zone = false, + .num_gpio_pins = 0, + .register_void[0] = 0b1111111111101111001111101111000100000000000000000000000000000000, + .register_void[1] = 0b0000000000000000000000000000000011111111111011111111111111101111, + .register_void[2] = 0b0000000000000000000000000000000000000000000000000000000000000000, + .register_void[3] = 0b1111000000000000100000000000000000000000000000000000000000000000, + }, + { + .family = EMCFAN_FAMILY_230X, + .product_id = EMCFAN_PRODUCT_2305, + .name = "EMC2305", + .num_tachs = 5, + .num_fans = 5, + .fan_drive_registers = { EMCFAN_230X_FAN_1_DRIVE, EMCFAN_230X_FAN_2_DRIVE, EMCFAN_230X_FAN_3_DRIVE, EMCFAN_230X_FAN_4_DRIVE, EMCFAN_230X_FAN_5_DRIVE }, + .fan_divider_registers = { EMCFAN_230X_FAN_1_DIVIDE, EMCFAN_230X_FAN_2_DIVIDE, EMCFAN_230X_FAN_3_DIVIDE, EMCFAN_230X_FAN_4_DIVIDE, EMCFAN_230X_FAN_5_DIVIDE }, + .internal_temp_zone = false, + .num_external_temp_zones = 0, + .vin4_temp_zone = false, + .num_gpio_pins = 0, + .register_void[0] = 0b1111111111101111001111101111000100000000000000000000000000000000, + .register_void[1] = 0b1111111111101111111111111110111111111111111011111111111111101111, + .register_void[2] = 0b0000000000000000000000000000000000000000000000000000000000000000, + .register_void[3] = 0b1111000000000000100000000000000000000000000000000000000000000000, + } +}; + +#endif +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/dev/i2c/emcfanreg.h b/lib/libc/include/generic-netbsd/dev/i2c/emcfanreg.h @@ -0,0 +1,127 @@ +/* $NetBSD: emcfanreg.h,v 1.1 2025/03/11 13:56:46 brad Exp $ */ + +/* + * Copyright (c) 2025 Brad Spencer <brad@anduin.eldar.org> + * + * Permission to use, copy, modify, and distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#ifndef _DEV_I2C_EMCFANREG_H_ +#define _DEV_I2C_EMCFANREG_H_ + +#include <dev/i2c/i2c_io.h> + +static const i2c_addr_t emcfan_typical_addrs[] = { 0x2c, 0x2d, 0x2e, 0x2f, 0x4c, 0x4d }; + +#define EMCFAN_VOID_READ 0x55 + +#define EMCFAN_INTERNAL_TEMP_HIGH 0x00 +#define EMCFAN_INTERNAL_TEMP_LOW 0x01 +#define EMCFAN_2101_EXTERNAL_TEMP_HIGH 0x01 +#define EMCFAN_2101_CHIP_CONFIG 0x03 +#define EMCFAN_EXTERNAL_1_TEMP_HIGH 0x02 +#define EMCFAN_2101_EXTERNAL_TEMP_LOW 0x10 +#define EMCFAN_EXTERNAL_1_TEMP_LOW 0x03 +#define EMCFAN_EXTERNAL_2_TEMP_HIGH 0x04 +#define EMCFAN_EXTERNAL_2_TEMP_LOW 0x05 +#define EMCFAN_EXTERNAL_3_TEMP_HIGH 0x06 +#define EMCFAN_EXTERNAL_3_TEMP_LOW 0x07 +#define EMCFAN_EXTERNAL_4_TEMP_HIGH 0x08 +#define EMCFAN_EXTERNAL_4_TEMP_LOW 0x09 + +#define EMCFAN_VIN4_VOLTAGE 0x10 + +#define EMCFAN_CHIP_CONFIG 0x20 +#define EMCFAN_CHIP_CONFIG_2 0x21 +#define EMCFAN_TEMP_CONFIG_3 0x22 +#define EMCFAN_210_346_FAN_STATUS 0x27 +#define EMCFAN_POLARITY_CONFIG 0x2a + +#define EMCFAN_210_346_PWM_BASEFREQ 0x2b +#define EMCFAN_2106_FAN_3_DIVIDE 0x2c +#define EMCFAN_2106_FAN_3_DRIVE 0x2d +#define EMCFAN_2106_FAN_4_DRIVE 0x2e +#define EMCFAN_2106_FAN_4_DIVIDE 0x2f +#define EMCFAN_2101_TACH_LOW 0x46 +#define EMCFAN_2101_TACH_HIGH 0x47 +#define EMCFAN_2101_FAN_CONFIG 0x4a +#define EMCFAN_2101_FAN_DRIVE 0x4c +#define EMCFAN_2101_FAN_DIVIDE 0x4e +#define EMCFAN_210_346_FAN_1_DRIVE 0x40 +#define EMCFAN_210_346_FAN_1_DIVIDE 0x41 +#define EMCFAN_210_346_CONFIG_1 0x42 +#define EMCFAN_210_346_TACH_1_HIGH 0x4e +#define EMCFAN_210_346_TACH_1_LOW 0x4f +#define EMCFAN_210_346_CONFIG_2 0x82 +#define EMCFAN_210_346_FAN_2_DRIVE 0x80 +#define EMCFAN_210_346_FAN_2_DIVIDE 0x81 +#define EMCFAN_210_346_TACH_2_HIGH 0x8e +#define EMCFAN_210_346_TACH_2_LOW 0x8f + +#define EMCFAN_230X_FAN_STATUS 0x24 +#define EMCFAN_230X_FAN_STALL_STATUS 0x25 +#define EMCFAN_230X_FAN_SPIN_STATUS 0x26 +#define EMCFAN_230X_FAN_DRIVE_STATUS 0x27 +#define EMCFAN_230X_OUTPUT_CONFIG 0x2b +#define EMCFAN_230X_BASE_FREQ_45 0x2c +#define EMCFAN_230X_BASE_FREQ_123 0x2d +#define EMCFAN_230X_FAN_1_DRIVE 0x30 +#define EMCFAN_230X_FAN_1_DIVIDE 0x31 +#define EMCFAN_230X_CONFIG_1 0x32 +#define EMCFAN_230X_TACH_1_HIGH 0x3e +#define EMCFAN_230X_TACH_1_LOW 0x3f +#define EMCFAN_230X_FAN_2_DRIVE 0x40 +#define EMCFAN_230X_FAN_2_DIVIDE 0x41 +#define EMCFAN_230X_CONFIG_2 0x42 +#define EMCFAN_230X_TACH_2_HIGH 0x4e +#define EMCFAN_230X_TACH_2_LOW 0x4f +#define EMCFAN_230X_FAN_3_DRIVE 0x50 +#define EMCFAN_230X_FAN_3_DIVIDE 0x51 +#define EMCFAN_230X_CONFIG_3 0x52 +#define EMCFAN_230X_TACH_3_HIGH 0x5e +#define EMCFAN_230X_TACH_3_LOW 0x5f +#define EMCFAN_230X_FAN_4_DRIVE 0x60 +#define EMCFAN_230X_FAN_4_DIVIDE 0x61 +#define EMCFAN_230X_CONFIG_4 0x62 +#define EMCFAN_230X_TACH_4_HIGH 0x6e +#define EMCFAN_230X_TACH_4_LOW 0x6f +#define EMCFAN_230X_FAN_5_DRIVE 0x70 +#define EMCFAN_230X_FAN_5_DIVIDE 0x71 +#define EMCFAN_230X_CONFIG_5 0x72 +#define EMCFAN_230X_TACH_5_HIGH 0x7e +#define EMCFAN_230X_TACH_5_LOW 0x7f + +#define EMCFAN_PRODUCT_ID 0xfd +#define EMCFAN_PRODUCT_2101 0x16 +#define EMCFAN_PRODUCT_2101R 0x28 +#define EMCFAN_PRODUCT_2103_1 0x24 +#define EMCFAN_PRODUCT_2103_24 0x26 /* EMC2103-2 and EMC2103-4 */ +#define EMCFAN_PRODUCT_2104 0x1d +#define EMCFAN_PRODUCT_2106 0x1e +#define EMCFAN_PRODUCT_2305 0x34 +#define EMCFAN_PRODUCT_2303 0x35 +#define EMCFAN_PRODUCT_2302 0x36 +#define EMCFAN_PRODUCT_2301 0x37 +#define EMCFAN_MUX_PINS 0xe0 +#define EMCFAN_DIR_PINS 0xe1 +#define EMCFAN_OUTPUT_PIN_CONFIG 0xe2 +#define EMCFAN_PINS_INPUT 0xe3 +#define EMCFAN_PINS_OUTPUT 0xe4 +#define EMCFAN_MANUFACTURER_ID 0xfe +#define EMCFAN_VALID_MANUFACTURER_ID 0x5d +#define EMCFAN_REVISION 0xff + +#define EMCFAN_FAMILY_210X 1 +#define EMCFAN_FAMILY_230X 2 + +#endif +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/dev/i2o/i2o.h b/lib/libc/include/generic-netbsd/dev/i2o/i2o.h @@ -1,4 +1,4 @@ -/* $NetBSD: i2o.h,v 1.17 2022/05/30 09:56:04 andvar Exp $ */ +/* $NetBSD: i2o.h,v 1.18 2023/09/07 20:03:25 ad Exp $ */ /*- * Copyright (c) 2000, 2001 The NetBSD Foundation, Inc. @@ -32,7 +32,8 @@ /* * Structures and constants, as presented by the I2O specification revision * 1.5 (obtainable from http://www.intelligent-io.com/). Currently, only - * what's useful to us is defined in this file. + * what's useful to us is defined in this file. LAN defs used to be here + * but were removed as they're useless. */ #ifndef _I2O_I2O_H_ @@ -681,11 +682,6 @@ struct i2o_util_event_register_reply { #define I2O_EVENT_EXEC_MODIFIED_LCT 0x00000200 #define I2O_EVENT_EXEC_DDM_AVAILIBILITY 0x00000400 -/* LAN class events. */ -#define I2O_EVENT_LAN_LINK_DOWN 0x00000001 -#define I2O_EVENT_LAN_LINK_UP 0x00000002 -#define I2O_EVENT_LAN_MEDIA_CHANGE 0x00000004 - /* * ================= Utility parameter groups ================= */ @@ -1006,363 +1002,4 @@ struct i2o_param_scsi_device_info { u_int64_t negsyncrate; } __packed; -/* - * ================= LAN class messages ================= - */ - -#define I2O_LAN_PACKET_SEND 0x3b -struct i2o_lan_packet_send { - u_int32_t msgflags; - u_int32_t msgfunc; - u_int32_t msgictx; - u_int32_t tcw; - - /* SGL follows */ -} __packed; - -#define I2O_LAN_TCW_ACCESS_PRI_MASK 0x00000007 -#define I2O_LAN_TCW_SUPPRESS_CRC 0x00000008 -#define I2O_LAN_TCW_SUPPRESS_LOOPBACK 0x00000010 -#define I2O_LAN_TCW_CKSUM_NETWORK 0x00000020 -#define I2O_LAN_TCW_CKSUM_TRANSPORT 0x00000040 -#define I2O_LAN_TCW_REPLY_BATCH 0x00000000 -#define I2O_LAN_TCW_REPLY_IMMEDIATELY 0x40000000 -#define I2O_LAN_TCW_REPLY_UNSUCCESSFUL 0x80000000 -#define I2O_LAN_TCW_REPLY_NONE 0xc0000000 - -#define I2O_LAN_SDU_SEND 0x3d -struct i2o_lan_sdu_send { - u_int32_t msgflags; - u_int32_t msgfunc; - u_int32_t msgictx; - u_int32_t tcw; /* As per PACKET_SEND. */ - - /* SGL follows */ -} __packed; - -struct i2o_lan_send_reply { - u_int32_t msgflags; - u_int32_t msgfunc; - u_int32_t msgictx; - u_int32_t trl; - u_int16_t detail; - u_int8_t reserved; - u_int8_t reqstatus; - u_int32_t tctx[1]; -} __packed; - -#define I2O_LAN_RECEIVE_POST 0x3e -struct i2o_lan_receive_post { - u_int32_t msgflags; - u_int32_t msgfunc; - u_int32_t msgictx; - u_int32_t bktcnt; - - /* SGL follows */ -} __packed; - -struct i2o_lan_receive_reply { - u_int32_t msgflags; - u_int32_t msgfunc; - u_int32_t msgictx; - u_int8_t trlcount; - u_int8_t trlesize; - u_int8_t reserved; - u_int8_t trlflags; - u_int32_t bucketsleft; -} __packed; - -#define I2O_LAN_RECEIVE_REPLY_PDB 0x80 - -#define I2O_LAN_PDB_ERROR_NONE 0x00 -#define I2O_LAN_PDB_ERROR_BAD_CRC 0x01 -#define I2O_LAN_PDB_ERROR_ALIGNMENT 0x02 -#define I2O_LAN_PDB_ERROR_TOO_LONG 0x03 -#define I2O_LAN_PDB_ERROR_TOO_SHORT 0x04 -#define I2O_LAN_PDB_ERROR_RX_OVERRUN 0x05 -#define I2O_LAN_PDB_ERROR_L3_CKSUM_BAD 0x40 -#define I2O_LAN_PDB_ERROR_L4_CKSUM_BAD 0x80 -#define I2O_LAN_PDB_ERROR_CKSUM_MASK 0xc0 -#define I2O_LAN_PDB_ERROR_OTHER 0xff - -#define I2O_LAN_RESET 0x35 -struct i2o_lan_reset { - u_int32_t msgflags; - u_int32_t msgfunc; - u_int32_t msgictx; - u_int16_t reserved; - u_int16_t resrcflags; -} __packed; - -#define I2O_LAN_RESRC_RETURN_BUCKETS 0x0001 -#define I2O_LAN_RESRC_RETURN_XMITS 0x0002 - -#define I2O_LAN_SUSPEND 0x37 -struct i2o_lan_suspend { - u_int32_t msgflags; - u_int32_t msgfunc; - u_int32_t msgictx; - u_int16_t reserved; - u_int16_t resrcflags; /* As per RESET. */ -} __packed; - -#define I2O_LAN_DSC_SUCCESS 0x00 -#define I2O_LAN_DSC_DEVICE_FAILURE 0x01 -#define I2O_LAN_DSC_DESTINATION_NOT_FOUND 0x02 -#define I2O_LAN_DSC_TRANSMIT_ERROR 0x03 -#define I2O_LAN_DSC_TRANSMIT_ABORTED 0x04 -#define I2O_LAN_DSC_RECEIVE_ERROR 0x05 -#define I2O_LAN_DSC_RECEIVE_ABORTED 0x06 -#define I2O_LAN_DSC_DMA_ERROR 0x07 -#define I2O_LAN_DSC_BAD_PACKET_DETECTED 0x08 -#define I2O_LAN_DSC_OUT_OF_MEMORY 0x09 -#define I2O_LAN_DSC_BUCKET_OVERRUN 0x0a -#define I2O_LAN_DSC_IOP_INTERNAL_ERROR 0x0b -#define I2O_LAN_DSC_CANCELED 0x0c -#define I2O_LAN_DSC_INVALID_TRANSACTION_CONTEXT 0x0d -#define I2O_LAN_DSC_DEST_ADDRESS_DETECTED 0x0e -#define I2O_LAN_DSC_DEST_ADDRESS_OMITTED 0x0f -#define I2O_LAN_DSC_PARTIAL_PACKET_RETURNED 0x10 -#define I2O_LAN_DSC_TEMP_SUSPENDED_STATE 0x11 - -/* - * ================= LAN class parameter groups ================= - */ - -#define I2O_PARAM_LAN_DEVICE_INFO 0x0000 -struct i2o_param_lan_device_info { - u_int16_t lantype; - u_int16_t flags; - u_int8_t addrfmt; - u_int8_t reserved1; - u_int16_t reserved2; - u_int32_t minpktsize; - u_int32_t maxpktsize; - u_int8_t hwaddr[8]; - u_int64_t maxtxbps; - u_int64_t maxrxbps; -} __packed; - -#define I2O_LAN_TYPE_ETHERNET 0x0030 -#define I2O_LAN_TYPE_100BASEVG 0x0040 -#define I2O_LAN_TYPE_TOKEN_RING 0x0050 -#define I2O_LAN_TYPE_FDDI 0x0060 -#define I2O_LAN_TYPE_FIBRECHANNEL 0x0070 - -#define I2O_PARAM_LAN_MAC_ADDRESS 0x0001 -struct i2o_param_lan_mac_address { - u_int8_t activeaddr[8]; - u_int8_t localaddr[8]; - u_int8_t addrmask[8]; - u_int32_t filtermask; - u_int32_t hwfiltercaps; - u_int32_t maxmcastaddr; - u_int32_t maxfilterperfect; - u_int32_t maxfilterimperfect; -} __packed; - -#define I2O_PARAM_LAN_MAC_ADDRESS_activeaddr 0 -#define I2O_PARAM_LAN_MAC_ADDRESS_localaddr 1 -#define I2O_PARAM_LAN_MAC_ADDRESS_addrmask 2 -#define I2O_PARAM_LAN_MAC_ADDRESS_filtermask 3 -#define I2O_PARAM_LAN_MAC_ADDRESS_hwfiltercaps 4 -#define I2O_PARAM_LAN_MAC_ADDRESS_maxmcastaddr 5 -#define I2O_PARAM_LAN_MAC_ADDRESS_maxfilterperfect 6 -#define I2O_PARAM_LAN_MAC_ADDRESS_maxfilterimperfect 7 - -#define I2O_LAN_FILTERMASK_UNICAST_DISABLE 0x0001 -#define I2O_LAN_FILTERMASK_PROMISC_ENABLE 0x0002 -#define I2O_LAN_FILTERMASK_PROMISC_MCAST_ENABLE 0x0004 -#define I2O_LAN_FILTERMASK_BROADCAST_DISABLE 0x0100 -#define I2O_LAN_FILTERMASK_MCAST_DISABLE 0x0200 -#define I2O_LAN_FILTERMASK_FUNCADDR_DISABLE 0x0400 -#define I2O_LAN_FILTERMASK_MACMODE_0 0x0800 -#define I2O_LAN_FILTERMASK_MACMODE_1 0x1000 - -#define I2O_PARAM_LAN_MCAST_MAC_ADDRESS 0x0002 -/* - * This one's a table, not a scalar. - */ - -#define I2O_PARAM_LAN_BATCH_CONTROL 0x0003 -struct i2o_param_lan_batch_control { - u_int32_t batchflags; - u_int32_t risingloaddly; /* 1.5 only */ - u_int32_t risingloadthresh; /* 1.5 only */ - u_int32_t fallingloaddly; /* 1.5 only */ - u_int32_t fallingloadthresh; /* 1.5 only */ - u_int32_t maxrxbatchcount; - u_int32_t maxrxbatchdelay; - u_int32_t maxtxbatchdelay; /* 2.0 (conflict with 1.5) */ - u_int32_t maxtxbatchcount; /* 2.0 only */ -} __packed; - -#define I2O_PARAM_LAN_BATCH_CONTROL_batchflags 0 -#define I2O_PARAM_LAN_BATCH_CONTROL_risingloaddly 1 -#define I2O_PARAM_LAN_BATCH_CONTROL_risingloadthresh 2 -#define I2O_PARAM_LAN_BATCH_CONTROL_fallingloaddly 3 -#define I2O_PARAM_LAN_BATCH_CONTROL_fallingloadthresh 4 -#define I2O_PARAM_LAN_BATCH_CONTROL_maxrxbatchcount 5 -#define I2O_PARAM_LAN_BATCH_CONTROL_maxrxbatchdelay 6 -#define I2O_PARAM_LAN_BATCH_CONTROL_maxtxbatchdelay 7 -#define I2O_PARAM_LAN_BATCH_CONTROL_maxtxbatchcount 8 - -#define I2O_PARAM_LAN_OPERATION 0x0004 -struct i2o_param_lan_operation { - u_int32_t pktprepad; - u_int32_t userflags; - u_int32_t pktorphanlimit; - u_int32_t txmodesenable; /* 2.0 only */ - u_int32_t rxmodesenable; /* 2.0 only */ -} __packed; - -#define I2O_PARAM_LAN_OPERATION_pktprepad 0 -#define I2O_PARAM_LAN_OPERATION_userflags 1 -#define I2O_PARAM_LAN_OPERATION_pktorphanlimit 2 -#define I2O_PARAM_LAN_OPERATION_txmodesenable 3 -#define I2O_PARAM_LAN_OPERATION_rxmodesenable 4 - -#define I2O_PARAM_LAN_MEDIA_OPERATION 0x0005 -struct i2o_param_lan_media_operation { - u_int32_t connectortype; - u_int32_t connectiontype; - u_int32_t curtxbps; - u_int32_t currxbps; - u_int8_t fullduplex; - u_int8_t linkstatus; - u_int8_t badpkthandling; /* v1.5 only */ - u_int8_t duplextarget; /* v2.0 only */ - u_int32_t connectortarget; /* v2.0 only */ - u_int32_t connectiontarget; /* v2.0 only */ -} __packed; - -#define I2O_PARAM_LAN_MEDIA_OPERATION_connectortype 0 -#define I2O_PARAM_LAN_MEDIA_OPERATION_connectiontype 1 -#define I2O_PARAM_LAN_MEDIA_OPERATION_curtxbps 2 -#define I2O_PARAM_LAN_MEDIA_OPERATION_currxbps 3 -#define I2O_PARAM_LAN_MEDIA_OPERATION_fullduplex 4 -#define I2O_PARAM_LAN_MEDIA_OPERATION_linkstatus 5 -#define I2O_PARAM_LAN_MEDIA_OPERATION_badpkthandling 6 -#define I2O_PARAM_LAN_MEDIA_OPERATION_duplextarget 7 -#define I2O_PARAM_LAN_MEDIA_OPERATION_connectortarget 8 -#define I2O_PARAM_LAN_MEDIA_OPERATION_connectiontarget 9 - -#define I2O_LAN_CONNECTOR_OTHER 0x00 -#define I2O_LAN_CONNECTOR_UNKNOWN 0x01 -#define I2O_LAN_CONNECTOR_AUI 0x02 -#define I2O_LAN_CONNECTOR_UTP 0x03 -#define I2O_LAN_CONNECTOR_BNC 0x04 -#define I2O_LAN_CONNECTOR_RJ45 0x05 -#define I2O_LAN_CONNECTOR_STP_DB9 0x06 -#define I2O_LAN_CONNECTOR_FIBER_MIC 0x07 -#define I2O_LAN_CONNECTOR_APPLE_AUI 0x08 -#define I2O_LAN_CONNECTOR_MII 0x09 -#define I2O_LAN_CONNECTOR_COPPER_DB9 0x0a -#define I2O_LAN_CONNECTOR_COPPER_AW 0x0b -#define I2O_LAN_CONNECTOR_OPTICAL_LW 0x0c -#define I2O_LAN_CONNECTOR_SIP 0x0d -#define I2O_LAN_CONNECTOR_OPTICAL_SW 0x0e - -#define I2O_LAN_CONNECTION_UNKNOWN 0x0000 - -#define I2O_LAN_CONNECTION_ETHERNET_AUI 0x0301 -#define I2O_LAN_CONNECTION_ETHERNET_10BASE5 0x0302 -#define I2O_LAN_CONNECTION_ETHERNET_FOIRL 0x0303 -#define I2O_LAN_CONNECTION_ETHERNET_10BASE2 0x0304 -#define I2O_LAN_CONNECTION_ETHERNET_10BROAD36 0x0305 -#define I2O_LAN_CONNECTION_ETHERNET_10BASET 0x0306 -#define I2O_LAN_CONNECTION_ETHERNET_10BASEFP 0x0307 -#define I2O_LAN_CONNECTION_ETHERNET_10BASEFB 0x0308 -#define I2O_LAN_CONNECTION_ETHERNET_10BASEFL 0x0309 -#define I2O_LAN_CONNECTION_ETHERNET_100BASETX 0x030a -#define I2O_LAN_CONNECTION_ETHERNET_100BASEFX 0x030b -#define I2O_LAN_CONNECTION_ETHERNET_100BASET4 0x030c -#define I2O_LAN_CONNECTION_ETHERNET_1000BASESX 0x030d -#define I2O_LAN_CONNECTION_ETHERNET_1000BASELX 0x030e -#define I2O_LAN_CONNECTION_ETHERNET_1000BASECX 0x030f -#define I2O_LAN_CONNECTION_ETHERNET_1000BASET 0x0310 - -#define I2O_LAN_CONNECTION_100BASEVG_ETHERNET 0x0401 -#define I2O_LAN_CONNECTION_100BASEVG_TOKEN_RING 0x0402 - -#define I2O_LAN_CONNECTION_TOKEN_RING_4MBIT 0x0501 -#define I2O_LAN_CONNECTION_TOKEN_RING_16MBIT 0x0502 - -#define I2O_LAN_CONNECTION_FDDI_125MBIT 0x0601 - -#define I2O_LAN_CONNECTION_FIBRECHANNEL_P2P 0x0701 -#define I2O_LAN_CONNECTION_FIBRECHANNEL_AL 0x0702 -#define I2O_LAN_CONNECTION_FIBRECHANNEL_PL 0x0703 -#define I2O_LAN_CONNECTION_FIBRECHANNEL_F 0x0704 - -#define I2O_LAN_CONNECTION_OTHER_EMULATED 0x0f00 -#define I2O_LAN_CONNECTION_OTHER_OTHER 0x0f01 - -#define I2O_LAN_CONNECTION_DEFAULT 0xffffffff - -#define I2O_PARAM_LAN_TRANSMIT_INFO 0x0007 -struct i2o_param_lan_transmit_info { - u_int32_t maxpktsg; - u_int32_t maxchainsg; - u_int32_t maxoutstanding; - u_int32_t maxpktsout; - u_int32_t maxpktsreq; - u_int32_t txmodes; -} __packed; - -#define I2O_LAN_MODES_NO_DA_IN_SGL 0x0002 -#define I2O_LAN_MODES_CRC_SUPPRESSION 0x0004 -#define I2O_LAN_MODES_LOOPBACK_SUPPRESSION 0x0004 /* 1.5 only */ -#define I2O_LAN_MODES_FCS_RECEPTION 0x0008 /* 2.0 only */ -#define I2O_LAN_MODES_MAC_INSERTION 0x0010 -#define I2O_LAN_MODES_RIF_INSERTION 0x0020 -#define I2O_LAN_MODES_IPV4_CHECKSUM 0x0100 /* 2.0 only */ -#define I2O_LAN_MODES_TCP_CHECKSUM 0x0200 /* 2.0 only */ -#define I2O_LAN_MODES_UDP_CHECKSUM 0x0400 /* 2.0 only */ -#define I2O_LAN_MODES_RSVP_CHECKSUM 0x0800 /* 2.0 only */ -#define I2O_LAN_MODES_ICMP_CHECKSUM 0x1000 /* 2.0 only */ - -#define I2O_PARAM_LAN_RECEIVE_INFO 0x0008 -struct i2o_param_lan_receive_info { - u_int32_t maxchain; - u_int32_t maxbuckets; -} __packed; - -#define I2O_PARAM_LAN_STATS 0x0009 -struct i2o_param_lan_stats { - u_int64_t opackets; - u_int64_t obytes; - u_int64_t ipackets; - u_int64_t oerrors; - u_int64_t ierrors; - u_int64_t rxnobuffer; - u_int64_t resetcount; -} __packed; - -#define I2O_PARAM_LAN_802_3_STATS 0x0200 -struct i2o_param_lan_802_3_stats { - u_int64_t alignmenterror; - u_int64_t onecollision; - u_int64_t manycollisions; - u_int64_t deferred; - u_int64_t latecollision; - u_int64_t maxcollisions; - u_int64_t carrierlost; - u_int64_t excessivedeferrals; -} __packed; - -#define I2O_PARAM_LAN_FDDI_STATS 0x0400 -struct i2o_param_lan_fddi_stats { - u_int64_t configstate; - u_int64_t upstreamnode; - u_int64_t downstreamnode; - u_int64_t frameerrors; - u_int64_t frameslost; - u_int64_t ringmgmtstate; - u_int64_t lctfailures; - u_int64_t lemrejects; - u_int64_t lemcount; - u_int64_t lconnectionstate; -} __packed; - #endif /* !defined _I2O_I2O_H_ */ \ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/dev/ic/hd44780var.h b/lib/libc/include/generic-netbsd/dev/ic/hd44780var.h @@ -1,4 +1,4 @@ -/* $NetBSD: hd44780var.h,v 1.8 2015/09/06 06:01:00 dholland Exp $ */ +/* $NetBSD: hd44780var.h,v 1.11 2023/08/08 17:31:13 nat Exp $ */ /* * Copyright (c) 2002 Dennis I. Chernoivanov @@ -97,6 +97,7 @@ struct hd44780_chip { #define HD_UP 0x10 /* if set, lcd has been initialized */ #define HD_TIMEDOUT 0x20 /* lcd has recently stopped talking */ #define HD_MULTICHIP 0x40 /* two HD44780 controllers (4-line) */ +#define HD_WRITEONLY 0x80 /* write only if set */ uint8_t sc_flags; uint8_t sc_cols; /* visible columns */ @@ -136,6 +137,7 @@ struct hd44780_chip { (sc)->sc_readreg((sc), (en), 1) void hd44780_attach_subr(struct hd44780_chip *); +void hd44780_detach(struct hd44780_chip *); void hd44780_busy_wait(struct hd44780_chip *, uint32_t); int hd44780_init(struct hd44780_chip *); int hd44780_chipinit(struct hd44780_chip *, uint32_t); diff --git a/lib/libc/include/generic-netbsd/dev/ic/scmdreg.h b/lib/libc/include/generic-netbsd/dev/ic/scmdreg.h @@ -1,4 +1,4 @@ -/* $NetBSD: scmdreg.h,v 1.2 2022/05/21 19:07:23 andvar Exp $ */ +/* $NetBSD: scmdreg.h,v 1.3 2023/04/05 21:53:56 andvar Exp $ */ /* * Copyright (c) 2021 Brad Spencer <brad@anduin.eldar.org> @@ -222,7 +222,7 @@ #define SCMD_LAST_REG SCMD_REG_REM_READ /* The last register address on a module */ #define SCMD_REG_SIZE 0x7F /* Size of the register space including the holes */ -#define SCMD_REMOTE_ADDR_LOW 0x50 /* The first remote I2C addreess */ +#define SCMD_REMOTE_ADDR_LOW 0x50 /* The first remote I2C address */ #define SCMD_REMOTE_ADDR_HIGH 0x5F /* The last remote I2C address */ #define SCMD_HOLE_VALUE 0x55 /* Artificial value on read for a hole register */ #define SCMD_IS_HOLE(r) \ diff --git a/lib/libc/include/generic-netbsd/dev/ic/stireg.h b/lib/libc/include/generic-netbsd/dev/ic/stireg.h @@ -0,0 +1,777 @@ +/* $NetBSD: stireg.h,v 1.18 2025/05/30 13:42:33 tsutsui Exp $ */ + +/* $OpenBSD: stireg.h,v 1.14 2015/04/05 23:25:57 miod Exp $ */ + +/* + * Copyright (c) 2000 Michael Shalayeff + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF + * THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _IC_STIREG_H_ +#define _IC_STIREG_H_ + +/* #define STIDEBUG */ + +#define STI_REGION_MAX 8 +#define STI_MONITOR_MAX 256 +#define STI_DEVNAME_LEN 32 +#define STI_NCMAP 256 + +/* code ROM definitions */ +#define STI_BEGIN 0 +#define STI_INIT_GRAPH 0 +#define STI_STATE_MGMT 1 +#define STI_FONT_UNPMV 2 +#define STI_BLOCK_MOVE 3 +#define STI_SELF_TEST 4 +#define STI_EXCEP_HDLR 5 +#define STI_INQ_CONF 6 +#define STI_SCM_ENT 7 +#define STI_DMA_CTRL 8 +#define STI_FLOW_CTRL 9 +#define STI_UTIMING 10 +#define STI_PROC_MGR 11 +#define STI_UTIL 12 +#define STI_END 13 +#define STI_CODECNT 16 + +#define STI_CODEBASE_MAIN 0x40 +#define STI_CODEBASE_ALT 0x80 + +#define STI_CODEBASE_PA STI_CODEBASE_MAIN +#define STI_CODEBASE_M68K STI_CODEBASE_ALT +#define STI_CODEBASE_PA64 STI_CODEBASE_ALT + +/* sti returns */ +#define STI_OK 0 +#define STI_FAIL -1 +#define STI_NRDY 1 + +/* sti errno */ +#define STI_NOERRNO 0 /* no error */ +#define STI_BADREENTLVL 1 /* bad reentry level */ +#define STI_NOREGIONSDEF 2 /* region table is not setup */ +#define STI_ILLNPLANES 3 /* invalid num of text planes */ +#define STI_ILLINDEX 4 /* invalid font index */ +#define STI_ILLLOC 5 /* invalid font location */ +#define STI_ILLCOLOUR 6 /* invalid colour */ +#define STI_ILLBLKMVFROM 7 /* invalid from in blkmv */ +#define STI_ILLBLKMVTO 8 /* invalid to in blkmv */ +#define STI_ILLBLKMVSIZE 9 /* invalid size in blkmv */ +#define STI_BEIUNSUPP 10 /* bus error ints unsupported */ +#define STI_UNXPBE 11 /* unexpected bus error */ +#define STI_UNXHWF 12 /* unexpected hardware failure */ +#define STI_NEGCFG 13 /* no ext global config struct */ +#define STI_NEIG 14 /* no ext init struct */ +#define STI_ILLSCME 15 /* invalid set cmap entry */ +#define STI_ILLCMVAL 16 /* invalid cmap value */ +#define STI_NORESMEM 17 /* no requested global memory */ +#define STI_RESMEMCORR 18 /* reserved memory corrupted */ +#define STI_ILLNTBLKMV 19 /* invalid non-text blkmv */ +#define STI_ILLMONITOR 20 /* monitor selection is out of range */ +#define STI_ILLEXCADDR 21 /* invalid excpt handler addr */ +#define STI_ILLEXCFLAGS 22 /* invalid excpt handler flags */ +#define STI_NOEHE 23 /* no ext exhdl struct */ +#define STI_NOINQCE 24 /* no ext inq cfg struct */ +#define STI_ILLRGNPTR 25 /* invalid region pointer */ +#define STI_ILLUTLOP 26 /* invalid util opcode */ +#define STI_UNKNOWN 250 /* unknown error */ +#define STI_NOCFGPTR 251 /* no config ptr defined */ +#define STI_NOFLPTR 252 /* no flag ptr defined */ +#define STI_NOINPTR 253 /* no in ptr defined */ +#define STI_NOOUTPTR 254 /* no way you can get it */ +#define STI_NOLOCK 255 /* kernel dishonour graphics lock */ + +/* colours */ +#define STI_COLOUR_BLACK 0 +#define STI_COLOUR_WHITE 1 +#define STI_COLOUR_RED 2 +#define STI_COLOUR_YELLOW 3 +#define STI_COLOUR_GREEN 4 +#define STI_COLOUR_CYAN 5 +#define STI_COLOUR_BLUE 6 +#define STI_COLOUR_MAGENTA 7 + + /* LSB high */ +struct sti_dd { + uint32_t dd_type; /* 0x00 device type */ +#define STI_DEVTYPE1 1 +#define STI_DEVTYPE4 3 + uint8_t dd_unused; + uint8_t dd_nmon; /* 0x05 number monitor rates */ + uint8_t dd_grrev; /* 0x06 global rom revision */ + uint8_t dd_lrrev; /* 0x07 local rom revision */ + uint32_t dd_grid[2]; /* 0x08 graphics id */ +#define STI_DD_CRX 0x26D1482A /* single-head CRX */ +#define STI_DD_GRX 0x26D1488C /* gray-scale GRX */ +#define STI_DD_CRX24 0x26D148EE /* CRX+ */ +#define STI_DD_382C 0x27134C8E /* 382 on-board mid-res */ +#define STI_DD_EVRX 0x27134C9F /* 425e on-board */ +#define STI_DD_3X2V 0x27134CB4 /* 362/382 on-board VGA-res */ +#define STI_DD_TIMBER 0x27F12392 /* on-board 710, older 715 */ +#define STI_DD_DUAL_CRX 0x27FCCB6D /* dual-head CRX */ +#define STI_DD_ARTIST 0x2B4DED6D /* on-board 712/715, also GSC */ +#define STI_DD_HCRX 0x2BCB015A +#define STI_DD_EG 0x2D08C0A7 /* Visualize EG */ +#define STI_DD_SUMMIT 0x2FC1066B /* Visualize FX2, FX4, FX6 */ +#define STI_DD_PINNACLE 0x35ACDA16 /* Visualize FXe */ +#define STI_DD_LEGO 0x35ACDA30 /* Visualize FX5, FX10 */ +#define STI_DEV4_DD_GRID 0x08 /* offset for STI_DEVTYPE4 */ +#define STI_DEV1_DD_GRID 0x10 /* offset for STI_DEVTYPE1 */ + uint32_t dd_fntaddr; /* 0x10 font start address */ + uint32_t dd_maxst; /* 0x14 max state storage */ + uint32_t dd_romend; /* 0x18 rom last address */ +#define STI_DEV4_DD_ROMEND 0x18 /* offset for STI_DEVTYPE4 */ +#define STI_DEV1_DD_ROMEND 0x50 /* offset for STI_DEVTYPE1 */ + uint32_t dd_reglst; /* 0x1c device region list */ + uint16_t dd_maxreent; /* 0x20 max reent storage */ + uint16_t dd_maxtimo; /* 0x22 max execution timeout .1 sec */ + uint32_t dd_montbl; /* 0x24 mon table address, array of + names num of dd_nmon */ + uint32_t dd_udaddr; /* 0x28 user data address */ + uint32_t dd_stimemreq; /* 0x2c sti memory request */ + uint32_t dd_udsize; /* 0x30 user data size */ + uint16_t dd_pwruse; /* 0x34 power usage */ + uint8_t dd_bussup; /* 0x36 bus support */ +#define STI_BUSSUPPORT_GSCINTL 0x01 /* supports pulling INTL for int */ +#define STI_BUSSUPPORT_GSC15X 0x02 /* supports GSC 1.5X */ +#define STI_BUSSUPPORT_GSC2X 0x04 /* supports GSC 2.X */ +#define STI_BUSSUPPORT_PCIIOEIM 0x08 /* will use directed int */ +#define STI_BUSSUPPORT_PCISTD 0x10 /* will use std PCI int */ +#define STI_BUSSUPPORT_ILOCK 0x20 /* supports implicit locking */ +#define STI_BUSSUPPORT_ROMMAP 0x40 /* rom is only in pci erom space */ +#define STI_BUSSUPPORT_2DECODE 0x80 /* single address decoder */ + uint8_t dd_ebussup; /* 0x37 extended bus support */ +#define STI_EBUSSUPPORT_DMA 0x01 /* supports dma */ +#define STI_EBUSSUPPORT_PIOLOCK 0x02 /* no implicit locking for dma */ + uint8_t dd_altcodet; /* 0x38 alternate code type */ +#define STI_ALTCODE_UNKNOWN 0x00 +#define STI_ALTCODE_PA64 0x01 /* alt code is in pa64 */ + uint8_t dd_eddst[3]; /* 0x39 extended DD struct */ + uint32_t dd_cfbaddr; /* 0x3c CFB address, location of + X11 driver to be used for + servers w/o accel */ + uint32_t dd_pacode[16]; /* 0x40 routines for pa-risc */ + uint32_t dd_altcode[16]; /* 0x80 routines for m68k/i386 */ +} __packed; + +#define STI_REVISION(maj, min) (((maj) << 4) | ((min) & 0x0f)) + +/* after the last region there is one indirect list ptr */ +struct sti_region { + u_int offset :14; /* page offset dev io space relative */ + u_int sys_only: 1; /* whether allow user access */ + u_int cache : 1; /* map in cache */ + u_int btlb : 1; /* should use BTLB if available */ + u_int last : 1; /* last region in the list */ + u_int length :14; /* size in pages */ +} __packed; + +#define STI_PGSHIFT 12 /* sti(4) assumes 4KB/page for offset/length */ + +struct sti_font { + uint16_t first; + uint16_t last; + uint8_t width; + uint8_t height; + uint8_t type; +#define STI_FONT_HPROMAN8 1 +#define STI_FONT_KANA8 2 + uint8_t bpc; + uint32_t next; + uint8_t uheight; + uint8_t uoffset; + uint8_t unused[2]; +} __packed; + +struct sti_fontcfg { + uint16_t first; + uint16_t last; + uint8_t width; + uint8_t height; + uint8_t type; + uint8_t bpc; + uint8_t uheight; + uint8_t uoffset; +} __packed; + +typedef struct sti_mon { + uint32_t width: 12; + uint32_t height: 12; + uint32_t hz: 7; /* low 7 bits of refresh rate */ + uint32_t flat: 1; /* flatpanel */ + uint32_t vesa: 1; /* vesa mode */ + uint32_t grey: 1; /* greyscale */ + uint32_t dblbuf: 1; /* double buffered */ + uint32_t user: 1; /* user-defined mode */ + uint32_t stereo: 1; /* stereo display */ + uint32_t sam: 1; /* ? */ + uint32_t : 15; + uint32_t hz_upper: 3; /* upper 3 bits of refresh rate */ + uint32_t font: 8; /* rom font index */ +} __packed *sti_mon_t; + +typedef struct sti_ecfg { + uint8_t current_monitor; + uint8_t uf_boot; + uint16_t power; /* power dissipation Watts */ + uint32_t freq_ref; + uint32_t *addr; /* memory block of size dd_stimemreq */ + void *future; +} __packed *sti_ecfg_t; + +typedef struct sti_cfg { + uint32_t text_planes; + uint16_t scr_width; + uint16_t scr_height; + uint16_t oscr_width; + uint16_t oscr_height; + uint16_t fb_width; + uint16_t fb_height; + uint32_t regions[STI_REGION_MAX]; + uint32_t reent_level; + uint32_t *save_addr; + sti_ecfg_t ext_cfg; +} __packed *sti_cfg_t; + + +/* routine types */ +#define STI_DEP(n) \ + typedef int (*sti_##n##_t)( \ + sti_##n##flags_t, sti_##n##in_t, sti_##n##out_t, sti_cfg_t); + +typedef struct sti_initflags { + uint32_t flags; +#define STI_INITF_WAIT 0x80000000 +#define STI_INITF_RESET 0x40000000 +#define STI_INITF_TEXT 0x20000000 +#define STI_INITF_NTEXT 0x10000000 +#define STI_INITF_CLEAR 0x08000000 +#define STI_INITF_CMB 0x04000000 /* non-text planes cmap black */ +#define STI_INITF_EBET 0x02000000 /* enable bus error timer */ +#define STI_INITF_EBETI 0x01000000 /* enable bus error timer interrupt */ +#define STI_INITF_PTS 0x00800000 /* preserve text settings */ +#define STI_INITF_PNTS 0x00400000 /* preserve non-text settings */ +#define STI_INITF_PBET 0x00200000 /* preserve BET settings */ +#define STI_INITF_PBETI 0x00100000 /* preserve BETI settings */ +#define STI_INITF_ICMT 0x00080000 /* init cmap for text planes */ +#define STI_INITF_SCMT 0x00040000 /* change current monitor type */ +#define STI_INITF_RIE 0x00020000 /* retain int enables */ + void *future; +} __packed *sti_initflags_t; + +typedef struct sti_einitin { + uint8_t mon_type; + uint8_t pad; + uint16_t inflight; /* possible on pci */ + void *future; +} __packed *sti_einitin_t; + +typedef struct sti_initin { + uint32_t text_planes; /* number of planes for text */ + sti_einitin_t ext_in; +} __packed *sti_initin_t; + +typedef struct sti_initout { + int32_t errno; + uint32_t text_planes; /* number of planes used for text */ + void *future; +} __packed *sti_initout_t; + +STI_DEP(init); + +typedef struct sti_mgmtflags { + uint32_t flags; +#define STI_MGMTF_WAIT 0x80000000 +#define STI_MGMTF_SAVE 0x40000000 +#define STI_MGMTF_RALL 0x20000000 /* restore all display planes */ + void *future; +} __packed *sti_mgmtflags_t; + +typedef struct sti_mgmtin { + void *addr; + void *future; +} __packed *sti_mgmtin_t; + +typedef struct sti_mgmtout { + int32_t errno; + void *future; +} __packed *sti_mgmtout_t; + +STI_DEP(mgmt); + +typedef struct sti_unpmvflags { + uint32_t flags; +#define STI_UNPMVF_WAIT 0x80000000 +#define STI_UNPMVF_NTXT 0x40000000 /* intp non-text planes */ + void *future; +} __packed *sti_unpmvflags_t; + +typedef struct sti_unpmvin { + uint32_t *font_addr; /* font */ + uint16_t index; /* character index in the font */ + uint8_t fg_colour; + uint8_t bg_colour; + uint16_t x, y; + void *future; +} __packed *sti_unpmvin_t; + +typedef struct sti_unpmvout { + uint32_t errno; + void *future; +} __packed *sti_unpmvout_t; + +STI_DEP(unpmv); + +typedef struct sti_blkmvflags { + uint32_t flags; +#define STI_BLKMVF_WAIT 0x80000000 +#define STI_BLKMVF_COLR 0x40000000 /* change colour on move */ +#define STI_BLKMVF_CLR 0x20000000 /* clear on move */ +#define STI_BLKMVF_NTXT 0x10000000 /* move in non-text planes */ + void *future; +} __packed *sti_blkmvflags_t; + +typedef struct sti_blkmvin { + uint8_t fg_colour; + uint8_t bg_colour; + uint16_t srcx, srcy, dstx, dsty; + uint16_t width, height; + uint16_t pad; + void *future; +} __packed *sti_blkmvin_t; + +typedef struct sti_blkmvout { + uint32_t errno; + void *future; +} __packed *sti_blkmvout_t; + +STI_DEP(blkmv); + +typedef struct sti_testflags { + uint32_t flags; +#define STI_TESTF_WAIT 0x80000000 +#define STI_TESTF_ETST 0x40000000 + void *future; +} __packed *sti_testflags_t; + +typedef struct sti_testin { + void *future; +} __packed *sti_testin_t; + +typedef struct sti_testout { + uint32_t errno; + uint32_t result; + void *future; +} __packed *sti_testout_t; + +STI_DEP(test); + +typedef struct sti_exhdlflags { + uint32_t flags; +#define STI_EXHDLF_WAIT 0x80000000 +#define STI_EXHDLF_CINT 0x40000000 /* clear int */ +#define STI_EXHDLF_CBE 0x20000000 /* clear BE */ +#define STI_EXHDLF_PINT 0x10000000 /* preserve int */ +#define STI_EXHDLF_RINT 0x08000000 /* restore int */ +#define STI_EXHDLF_WEIM 0x04000000 /* write eim w/ sti_eexhdlin */ +#define STI_EXHDLF_REIM 0x02000000 /* read eim to sti_eexhdlout */ +#define STI_EXHDLF_GIE 0x01000000 /* global int enable */ +#define STI_EXHDLF_PGIE 0x00800000 +#define STI_EXHDLF_WIEM 0x00400000 +#define STI_EXHDLF_EIEM 0x00200000 +#define STI_EXHDLF_BIC 0x00100000 /* begin int cycle */ +#define STI_EXHDLF_EIC 0x00080000 /* end int cycle */ +#define STI_EXHDLF_RIE 0x00040000 /* reset do not clear int enables */ + void *future; +} __packed *sti_exhdlflags_t; + +typedef struct sti_eexhdlin { + uint32_t eim_addr; + uint32_t eim_data; + uint32_t iem; /* enable mask */ + uint32_t icm; /* clear mask */ + void *future; +} __packed *sti_eexhdlin_t; + +typedef struct sti_exhdlint { + uint32_t flags; +#define STI_EXHDLINT_BET 0x80000000 /* bus error timer */ +#define STI_EXHDLINT_HW 0x40000000 /* high water */ +#define STI_EXHDLINT_LW 0x20000000 /* low water */ +#define STI_EXHDLINT_TM 0x10000000 /* texture map */ +#define STI_EXHDLINT_VB 0x08000000 /* vertical blank */ +#define STI_EXHDLINT_UDC 0x04000000 /* unbuffered dma complete */ +#define STI_EXHDLINT_BDC 0x02000000 /* buffered dma complete */ +#define STI_EXHDLINT_UDPC 0x01000000 /* unbuf priv dma complete */ +#define STI_EXHDLINT_BDPC 0x00800000 /* buffered priv dma complete */ +} __packed *sti_exhdlint_t; + +typedef struct sti_exhdlin { + sti_exhdlint_t addr; + sti_eexhdlin_t ext; +} __packed *sti_exhdlin_t; + +typedef struct sti_eexhdlout { + uint32_t eim_addr; + uint32_t eim_data; + uint32_t iem; /* enable mask */ + uint32_t icm; /* clear mask */ + void *future; +} __packed *sti_eexhdlout_t; + +typedef struct sti_exhdlout { + uint32_t errno; + uint32_t flags; +#define STI_EXHDLO_BE 0x80000000 /* BE was intercepted */ +#define STI_EXHDLO_IP 0x40000000 /* there is int pending */ +#define STI_EXHDLO_IE 0x20000000 /* global enable set */ + sti_eexhdlout_t ext; +} __packed *sti_exhdlout_t; + +STI_DEP(exhdl); + +typedef struct sti_inqconfflags { + uint32_t flags; +#define STI_INQCONFF_WAIT 0x80000000 + void *future; +} __packed *sti_inqconfflags_t; + +typedef struct sti_inqconfin { + void *future; +} __packed *sti_inqconfin_t; + +typedef struct sti_einqconfout { + uint32_t crt_config[3]; + uint32_t crt_hw[3]; + void *future; +} __packed *sti_einqconfout_t; + +typedef struct sti_inqconfout { + uint32_t errno; + uint16_t width, height, owidth, oheight, fbwidth, fbheight; + uint32_t bpp; /* bits per pixel */ + uint32_t bppu; /* accessible bpp */ + uint32_t planes; + uint8_t name[STI_DEVNAME_LEN]; + uint32_t attributes; +#define STI_INQCONF_Y2X 0x0001 /* pixel is higher than wider */ +#define STI_INQCONF_HWBLKMV 0x0002 /* hw blkmv is present */ +#define STI_INQCONF_AHW 0x0004 /* adv hw accel */ +#define STI_INQCONF_INT 0x0008 /* can interrupt */ +#define STI_INQCONF_GONOFF 0x0010 /* supports on/off */ +#define STI_INQCONF_AONOFF 0x0020 /* supports alpha on/off */ +#define STI_INQCONF_VARY 0x0040 /* variable fb height */ +#define STI_INQCONF_ODDBYTES 0x0080 /* use only odd fb bytes */ +#define STI_INQCONF_FLUSH 0x0100 /* fb cache requires flushing */ +#define STI_INQCONF_DMA 0x0200 /* supports dma */ +#define STI_INQCONF_VDMA 0x0400 /* supports vdma */ +#define STI_INQCONF_YUV1 0x2000 /* supports YUV type 1 */ +#define STI_INQCONF_YUV2 0x4000 /* supports YUV type 2 */ +#define STI_INQCONF_BITS \ + "\020\001y2x\002hwblkmv\003ahw\004int\005gonoff\006aonoff\007vary"\ + "\010oddb\011flush\012dma\013vdma\016yuv1\017yuv2" + sti_einqconfout_t ext; +} __packed *sti_inqconfout_t; + +STI_DEP(inqconf); + +typedef struct sti_scmentflags { + uint32_t flags; +#define STI_SCMENTF_WAIT 0x80000000 + void *future; +} __packed *sti_scmentflags_t; + +typedef struct sti_scmentin { + uint32_t entry; + uint32_t value; + void *future; +} __packed *sti_scmentin_t; + +typedef struct sti_scmentout { + uint32_t errno; + void *future; +} __packed *sti_scmentout_t; + +STI_DEP(scment); + +typedef struct sti_dmacflags { + uint32_t flags; +#define STI_DMACF_WAIT 0x80000000 +#define STI_DMACF_PRIV 0x40000000 /* priv dma */ +#define STI_DMACF_DIS 0x20000000 /* disable */ +#define STI_DMACF_BUF 0x10000000 /* buffered */ +#define STI_DMACF_MRK 0x08000000 /* write a marker */ +#define STI_DMACF_ABRT 0x04000000 /* abort dma xfer */ + void *future; +} __packed *sti_dmacflags_t; + +typedef struct sti_dmacin { + uint32_t pa_upper; + uint32_t pa_lower; + uint32_t len; + uint32_t mrk_data; + uint32_t mrk_off; + void *future; +} __packed *sti_dmacin_t; + +typedef struct sti_dmacout { + uint32_t errno; + void *future; +} __packed *sti_dmacout_t; + +STI_DEP(dmac); + +typedef struct sti_flowcflags { + uint32_t flags; +#define STI_FLOWCF_WAIT 0x80000000 +#define STI_FLOWCF_CHW 0x40000000 /* check high water */ +#define STI_FLOWCF_WHW 0x20000000 /* write high water */ +#define STI_FLOWCF_WLW 0x10000000 /* write low water */ +#define STI_FLOWCF_PCSE 0x08000000 /* preserve cse */ +#define STI_FLOWCF_CSE 0x04000000 +#define STI_FLOWCF_CSWF 0x02000000 /* cs write fine */ +#define STI_FLOWCF_CSWC 0x01000000 /* cs write coarse */ +#define STI_FLOWCF_CSWQ 0x00800000 /* cs write fifo */ + void *future; +} __packed *sti_flowcflags_t; + +typedef struct sti_flowcin { + uint32_t retry; + uint32_t bufz; + uint32_t hwcnt; + uint32_t lwcnt; + uint32_t csfv; /* cs fine value */ + uint32_t cscv; /* cs coarse value */ + uint32_t csqc; /* cs fifo count */ + void *future; +} __packed *sti_flowcin_t; + +typedef struct sti_flowcout { + uint32_t errno; + uint32_t retry_result; + uint32_t fifo_size; + void *future; +} __packed *sti_flowcout_t; + +STI_DEP(flowc); + +typedef struct sti_utimingflags { + uint32_t flags; +#define STI_UTIMF_WAIT 0x80000000 +#define STI_UTIMF_HKS 0x40000000 /* has kbuf_size */ + void *future; +} __packed *sti_utimingflags_t; + +typedef struct sti_utimingin { + void *data; + void *kbuf; + void *future; +} __packed *sti_utimingin_t; + +typedef struct sti_utimingout { + uint32_t errno; + uint32_t kbuf_size; /* buffer required size */ + void *future; +} __packed *sti_utimingout_t; + +STI_DEP(utiming); + +typedef struct sti_pmgrflags { + uint32_t flags; +#define STI_UTIMF_WAIT 0x80000000 +#define STI_UTIMOP_CLEANUP 0x00000000 +#define STI_UTIMOP_BAC 0x10000000 +#define STI_UTIMF_CRIT 0x04000000 +#define STI_UTIMF_BUFF 0x02000000 +#define STI_UTIMF_IBUFF 0x01000000 + void *future; +} __packed *sti_pmgrflags_t; + +typedef struct sti_pmgrin { + uint32_t reserved[4]; + void *future; +} __packed *sti_pmgrin_t; + +typedef struct sti_pmgrout { + int32_t errno; + void *future; +} __packed *sti_pmgrout_t; + +STI_DEP(pmgr); + +typedef struct sti_utilflags { + uint32_t flags; +#define STI_UTILF_ROOT 0x80000000 /* was called as root */ + void *future; +} __packed *sti_utilflags_t; + +typedef struct sti_utilin { + uint32_t in_size; + uint32_t out_size; + uint8_t *buf; +} __packed *sti_utilin_t; + +typedef struct sti_utilout { + int32_t errno; + void *future; +} __packed *sti_utilout_t; + +STI_DEP(util); + +/* + * NGLE register layout. + * Based upon xc/programs/Xserver/hw/hp/ngle/dregs.h + */ + +#define BA(F,C,S,A,J,B,I) \ + (((F)<<31)|((C)<<27)|((S)<<24)|((A)<<21)|((J)<<16)|((B)<<12)|(I)) + /* FCCC CSSS AAAJ JJJJ BBBB IIII IIII IIII */ + +/* F */ +#define IndexedDcd 0 /* Pixel data is indexed (pseudo) color */ +#define FractDcd 1 /* Pixel data is Fractional 8-8-8 */ +/* C */ +#define Otc04 2 /* Pixels in each longword transfer (4) */ +#define Otc32 5 /* Pixels in each longword transfer (32) */ +#define Otc24 7 /* NGLE uses this for 24bit blits */ +/* S */ +#define Ots08 3 /* Each pixel is size (8)d transfer (1) */ +#define OtsIndirect 6 /* Each bit goes through FG/BG color(8) */ +/* A */ +#define AddrByte 3 /* byte access? Used by NGLE for direct fb */ +#define AddrLong 5 /* FB address is Long aligned (pixel) */ +#define Addr24 7 /* used for colour map access */ +/* B */ +#define BINapp0I 0x0 /* Application Buffer 0, Indexed */ +#define BINapp1I 0x1 /* Application Buffer 1, Indexed */ +#define BINovly 0x2 /* 8 bit overlay */ +#define BINcursor 0x6 /* cursor bitmap on EG */ +#define BINcmask 0x7 /* cursor mask on EG */ +#define BINapp0F8 0xa /* Application Buffer 0, Fractional 8-8-8 */ +#define BINattr 0xd /* Attribute Bitmap */ +#define BINcmap 0xf /* colour map(s) */ +/* other buffers are unknown */ +/* J - 'BA just point' - function unknown */ +/* I - 'BA index base' - function unknown */ + +#define IBOvals(R,M,X,S,D,L,B,F) \ + (((R)<<8)|((M)<<16)|((X)<<24)|((S)<<29)|((D)<<28)|((L)<<31)|((B)<<1)|(F)) + /* LSSD XXXX MMMM MMMM RRRR RRRR ???? ??BF */ + +/* R is a standard X11 ROP, no idea if the other bits areused for anything */ +#define RopClr 0x0 +#define RopSrc 0x3 +#define RopInv 0xc +#define RopSet 0xf +/* M: 'mask addr offset' - function unknown */ +/* X */ +#define BitmapExtent08 3 /* Each write hits ( 8) bits in depth */ +#define BitmapExtent32 5 /* Each write hits (32) bits in depth */ +/* S: 'static reg' flag, NGLE sets it for blits, function is unknown but + we get occasional garbage in 8bit blits without it */ +/* D */ +#define DataDynamic 0 /* Data register reloaded by direct access */ +/* L */ +#define MaskDynamic 1 /* Mask register reloaded by direct access */ +#define MaskOtc 0 /* Mask contains Object Count valid bits */ +/* B = 1 -> background transparency for masked fills */ +/* F probably the same for foreground */ + +#define NGLE_REG_1 0x000118 /* Artist LUT blt ctrl */ +#define NGLE_REG_28 0x000420 /* HCRX video bus access */ +#define NGLE_REG_2 0x000480 /* BINC src */ +#define NGLE_REG_3 0x0004a0 /* BINC dst */ +#define NGLE_REG_22 0x0005a0 /* BINC dst mask */ +#define NGLE_REG_23 0x0005c0 /* BINC data */ +#define NGLE_REG_4 0x000600 /* palette data */ +#define NGLE_REG_5 0x0006a0 /* cursor data */ +#define NGLE_REG_6 0x000800 /* rectfill XY */ +#define NGLE_REG_7 0x000804 /* bitblt size WH */ +#define NGLE_REG_24 0x000808 /* bitblt src XY */ +#define NGLE_REG_8 0x000820 /* 'transfer data' - this is */ + /* a pixel mask on fills */ +#define NGLE_REG_37 0x000944 /* HCRX fast rect fill, size */ +#define NGLE_REG_9 0x000a04 /* rect fill size, start */ +#define NGLE_REG_25 0x000b00 /* bitblt dst XY, start */ +#define NGLE_REG_RAMDAC 0x001000 +#define NGLE_REG_10 0x018000 /* buffer ctl */ +#define NGLE_REG_11 0x018004 /* dest bitmap access */ +#define NGLE_REG_12 0x01800c /* control plane register */ +#define NGLE_REG_35 0x018010 /* fg colour */ +#define NGLE_REG_36 0x018014 /* bg colour */ +#define NGLE_REG_13 0x018018 /* image planemask */ +#define NGLE_REG_14 0x01801c /* raster op */ +#define NGLE_REG_15 0x200000 /* 'busy dodger' idle */ + #define DODGER_IDLE 0x1000 /* or 0x10000, likely tpyo */ +#define NGLE_REG_15b0 0x200000 /* busy register */ +#define NGLE_REG_16 0x200004 +#define NGLE_REG_16b1 0x200005 /* setup copyarea */ +#define NGLE_REG_16b3 0x200007 /* ROM table index on CRX */ +#define NGLE_REG_34 0x200008 /* # of fifo slots */ +#define NGLE_REG_17 0x200100 /* cursor coordinates */ +#define NGLE_REG_18 0x200104 /* cursor enable */ +#define NGLE_REG_26 0x200118 /* EG LUT blt ctrl */ +#define NGLE_REG_19 0x200200 /* artist sprite size */ +#define NGLE_REG_20 0x200208 /* cursor geometry */ +#define NGLE_REG_21 0x200218 /* Artist misc video */ +#define NGLE_REG_27 0x200308 /* Artist misc ctrl */ +#define NGLE_REG_29 0x210000 /* HCRX cursor coord & enable */ + #define HCRX_ENABLE_CURSOR 0x80000000 +#define NGLE_REG_30 0x210004 /* HCRX cursor address */ +#define NGLE_REG_31 0x210008 /* HCRX cursor data */ +#define NGLE_REG_38 0x210020 /* HCRX LUT blt ctrl */ + /* EWRRRROO OOOOOOOO TTRRRRLL LLLLLLLL */ + #define LBC_ENABLE 0x80000000 + #define LBC_WAIT_BLANK 0x40000000 + #define LBS_OFFSET_SHIFT 16 + #define LBC_TYPE_MASK 0xc000 + #define LBC_TYPE_CMAP 0 + #define LBC_TYPE_CURSOR 0x8000 + #define LBC_TYPE_OVERLAY 0xc000 + #define LBC_LENGTH_SHIFT 0 +#define NGLE_REG_41 0x210024 +#define NGLE_REG_42 0x210028 /* these seem to control */ +#define NGLE_REG_43 0x21002c /* how the 24bit planes */ +#define NGLE_REG_44 0x210030 /* are displayed on HCRX - */ +#define NGLE_REG_45 0x210034 /* no info on bits */ +#define NGLE_REG_32 0x21003c /* HCRX plane enable */ +#define NGLE_REG_33 0x210040 /* HCRX misc video */ + #define HCRX_VIDEO_ENABLE 0x0A000000 +#define NGLE_REG_39 0x210120 /* HCRX 'hyperbowl' mode 2 */ + #define HYPERBOWL_MODE2_8_24 15 +#define NGLE_REG_40 0x210130 /* HCRX 'hyperbowl' */ + #define HYPERBOWL_MODE_FOR_8_OVER_88_LUT0_NO_TRANSPARENCIES 4 + #define HYPERBOWL_MODE01_8_24_LUT0_TRANSPARENT_LUT1_OPAQUE 8 + #define HYPERBOWL_MODE01_8_24_LUT0_OPAQUE_LUT1_OPAQUE 10 + +#define NGLE_BUFF0_CMAP0 0x00001e02 +#define NGLE_BUFF1_CMAP0 0x02001e02 +#define NGLE_BUFF1_CMAP3 0x0c001e02 +#define NGLE_ARTIST_CMAP0 0x00000102 + +/* mimic HP/UX, this will return the device's graphics ID */ +#define GCID _IOR('G', 40, u_int) + +#endif /* _IC_STIREG_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/dev/ic/summitreg.h b/lib/libc/include/generic-netbsd/dev/ic/summitreg.h @@ -0,0 +1,214 @@ +/* $NetBSD: summitreg.h,v 1.16 2025/01/29 15:35:22 macallan Exp $ */ + +/* + * Copyright (c) 2024 Michael Lorenz + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF + * THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* HP Visualize FX 4 and related hardware, aka Summit */ + +/* + * register values, found by disassembling the ROM + * some found by Sven Schnelle + * ( see https://patchwork.kernel.org/project/linux-parisc/patch/20211031204952.25678-2-svens@stackframe.org/ ) + * some by me + */ + +#ifndef SUMMITREG_H +#define SUMMITREG_H + +#define VISFX_CONTROL 0x641000 + #define CONTROL_WFC 0x00000200 // FIFO when 0, direct when 1 +#define VISFX_FC 0x641040 // Fault Control +#define VISFX_STATUS 0x641400 // zero when idle +/* + * about the FIFO register: + * - on FX4, there are 0x800 FIFO slots, quite a lot + * - based on observation, every register write seems to occupy *two* slots + * - we need to write 0 to VISFX_CONTROL to enable FIFO pacing + * - the FIFO is quite difficult to overrun but things like x11perf copywinwin + * will do it if we're not careful + */ +#define VISFX_FIFO 0x641440 +#define VISFX_FOE 0x920404 // Fragment Operation Enable + #define FOE_TEXTURE 0x00000001 + #define FOE_SPECULAR 0x00000002 + #define FOE_DEPTHCUE 0x00000004 + #define FOE_ALPHATEST 0x00000008 + #define FOE_STENCIL 0x00000010 + #define FOE_Z_TEST 0x00000020 + #define FOE_BLEND_ROP 0x00000040 // IBO is used + #define FOE_DITHER 0x00000080 +#define VISFX_IBO 0x921110 // ROP in lowest nibble +#define VISFX_CBR 0x92111c // constant colour for blending +#define VISFX_IAA0 0x921200 // XLUT, 16 entries +#define VISFX_IAA(n) (0x921200 + ((n) << 2)) +#define VISFX_OTR 0x921148 // overlay transparency + +#define VISFX_VRAM_WRITE_MODE 0xa00808 +#define VISFX_VRAM_READ_MODE 0xa0080c +#define VISFX_PIXEL_MASK 0xa0082c +#define VISFX_FG_COLOUR 0xa0083c +#define VISFX_BG_COLOUR 0xa00844 +#define VISFX_PLANE_MASK 0xa0084c +/* this controls what we see in the FB aperture */ +#define VISFX_APERTURE_ACCESS 0xa00858 + #define VISFX_DEPTH_8 0x30 + #define VISFX_DEPTH_32 0x50 +#define VISFX_RPH 0xa0085c // read prefetch hint + #define VISFX_RPH_RTL 0x80000000 // right-to-left + #define VISFX_RPH_LTR 0x00000000 // left-to-right + +#define VISFX_READ_DATA 0xa41480 + +#define VISFX_VRAM_WRITE_DATA_INCRX 0xa60000 +#define VISFX_VRAM_WRITE_DATA_INCRY 0xa68000 +#define VISFX_VRAM_WRITE_DEST 0xac1000 +#define VISFX_TCR 0xac1024 /* throttle control */ +#define VISFX_CLIP_TL 0xac1050 /* clipping rect, top/left */ +#define VISFX_CLIP_WH 0xac1054 /* clipping rect, w/h */ + +#define VISFX_WRITE_MODE_PLAIN 0x02000000 +#define VISFX_WRITE_MODE_EXPAND 0x050004c0 +#define VISFX_WRITE_MODE_FILL 0x050008c0 +#define VISFX_WRITE_MODE_TRANSPARENT 0x00000800 /* bg is tansparent */ +#define VISFX_WRITE_MODE_MASK 0x00000400 /* apply pixel mask */ +/* 0x00000200 - some pattern */ +/* looks like 0x000000c0 enables fb/bg colours to be applied */ + +#define VISFX_READ_MODE_COPY 0x02000400 + +#define OTC01 0x00000000 /* one pixel per 32bit write */ +#define OTC04 0x02000000 /* 4 pixels per 32bit write */ +#define OTC32 0x05000000 /* 32 pixels per 32bit write */ +#define BIN8I 0x00000000 /* 8bit indexed */ +#define BIN12I 0x00010000 /* 12bit indexed */ +#define BIN332F 0x00040000 /* R3G3B2 */ +#define BIN8F 0x00070000 /* ARGB8 */ +#define BINapln 0x00110000 /* attribute plane */ +#define BINhost 0x00300000 /* DMA to host */ +#define BUFovl 0x00000000 /* 8bit overlay */ +#define BUFBL 0x00008000 /* back/left */ +#define BUFFL 0x00004000 /* front/left */ +#define BUFBR 0x00002000 /* back/right */ +#define BUFFR 0x00001000 /* front/right */ + +/* attribute table, this only selects depth and CFS */ +#define IAA_8I 0x00000000 /* 8bit CI */ +#define IAA_8F 0x00000070 /* RGB8 */ +#define IAA_CFS0 0x00000000 /* CFS select */ +#define IAA_CFS1 0x00000100 /* CFS 1 etc. */ + +#define OTR_T 0x00010000 /* when set 0 is transparent, otherwise 0xff */ +#define OTR_A 0x00000100 /* always transparent */ +#define OTR_L1 0x00000002 /* transparency controlled by CFS17 */ +#define OTR_L0 0x00000001 /* transparency controlled by CFS16 */ + +/* + * for STI colour change mode: + * set VISFX_FG_COLOUR, VISFX_BG_COLOUR + * set VISFX_VRAM_READ_MODE 0x05000400 + * set VISFX_VRAM_WRITE_MODE 0x050000c0 + */ + +/* fill */ +#define VISFX_START 0xb3c000 +#define VISFX_SIZE 0xb3c808 /* start, FX4 uses 0xb3c908 */ + +/* copy */ +#define VISFX_COPY_SRC 0xb3c010 +#define VISFX_COPY_WH 0xb3c008 +#define VISFX_COPY_DST 0xb3cc00 +/* + * looks like ORing 0x800 to the register address starts a command + * - 0x800 - fill + * - 0xc00 - copy + * 0x100 and 0x200 seem to have functions as well, not sure what though + * for example, the FX4 ROM uses 0xb3c908 to start a rectangle fill, but + * it also works with 0xb3c808 and 0xb3ca08 + * same with copy, 0xc00 seems to be what matters, setting 0x100 or 0x200 + * doesn't seem to make a difference + * 0x400 or 0x100 by themselves don't start a command either + */ + +/* + * alpha blending operations + * source and destination blend functions are in 0xf0 and 0x0f + * how they're combined is in 0x700 + */ +#define IBO_ROP 0 /* ROP in lower 4 bit */ +#define IBO_ADD 0x200 +#define IBO_S_MINUS_D 0x400 /* source - dest */ +#define IBO_D_MINUS_S 0x500 /* dest - source */ +#define IBO_MIN 0x600 +#define IBO_MAX 0x700 + +/* + * here are the blend functions I identified + * apparently the upper byte in 32bit mode is not implemented on FX2/4/6, and + * neither is any blend mode that takes the colour value from CBR + * so no blending with screen-to-screen blits, alpha will always read zero + * the only ways to actually use alpha blending is with fills ( the alpha part + * of the FG register is used ) and BINC writes, or when using constant alpha + */ +#define IBO_ZERO 0 +#define IBO_ONE 1 +#define IBO_SRC 4 /* src alpha */ +#define IBO_ONE_MINUS_SRC 5 /* 1 - src alpha */ +#define IBO_CBR 14 /* alpha from CBR */ +#define IBO_ONE_MINUS_CBR 15 /* 1 - alpha from CBR */ + +#define SRC(n) ((n) << 4) +#define DST(n) (n) +/* + * use unbuffered space for cursor registers + * The _POS, _INDEX and _DATA registers work exactly like on HCRX + */ + +#define VISFX_CURSOR_POS 0x400000 +#define VISFX_CURSOR_ENABLE 0x80000000 +#define VISFX_CURSOR_INDEX 0x400004 +#define VISFX_CURSOR_DATA 0x400008 +#define VISFX_CURSOR_FG 0x40000c +#define VISFX_CURSOR_BG 0x400010 +#define VISFX_COLOR_MASK 0x800018 +#define VISFX_COLOR_INDEX 0x800020 +#define VISFX_COLOR_VALUE 0x800024 +#define VISFX_FATTR 0x80003c /* force attribute */ +#define VISFX_MPC 0x80004c + #define MPC_VIDEO_ON 0x0c + #define MPC_VSYNC_OFF 0x02 + #define MPC_HSYNC_OFF 0x01 +#define VISFX_CFS0 0x800100 /* colour function select */ +#define VISFX_CFS(n) (VISFX_CFS0 + ((n) << 2)) +/* 0 ... 6 for image planes, 7 or bypass, 16 and 17 for overlay */ +#define CFS_CR 0x80 // enable color recovery +#define CFS_332 0x00 // R3G3B2 +#define CFS_8I 0x40 // 8bit indexed +#define CFS_8F 0x70 // ARGB8 +#define CFS_LUT0 0x00 // use LUT 0 +#define CFS_LUT1 0x01 // LUT 1 etc. +#define CFS_BYPASS 0x07 // bypass LUT + +#endif /* SUMMITREG_H */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/dev/iscsi/iscsi.h b/lib/libc/include/generic-netbsd/dev/iscsi/iscsi.h @@ -1,4 +1,4 @@ -/* $NetBSD: iscsi.h,v 1.4.50.1 2023/12/18 14:15:58 martin Exp $ */ +/* $NetBSD: iscsi.h,v 1.5 2023/11/25 10:08:27 mlelstv Exp $ */ /*- * Copyright (c) 2004,2006,2011 The NetBSD Foundation, Inc. diff --git a/lib/libc/include/generic-netbsd/dev/pci/amrreg.h b/lib/libc/include/generic-netbsd/dev/pci/amrreg.h @@ -1,4 +1,4 @@ -/* $NetBSD: amrreg.h,v 1.5 2008/09/08 23:36:54 gmcgarry Exp $ */ +/* $NetBSD: amrreg.h,v 1.6 2023/08/15 04:04:10 mrg Exp $ */ /*- * Copyright (c) 2002, 2003 The NetBSD Foundation, Inc. @@ -313,7 +313,7 @@ struct amr_enquiry3 { u_int8_t ae_driveprop[AMR_40LD_MAXDRIVES]; /* logical drive properties */ u_int8_t ae_drivestate[AMR_40LD_MAXDRIVES]; /* physical drive state */ u_int8_t ae_pdrivestate[AMR_40LD_MAXPHYSDRIVES]; /* physical drive state */ - u_int16_t ae_driveformat[AMR_40LD_MAXPHYSDRIVES]; + u_int16_t ae_driveformat[AMR_40LD_MAXPHYSDRIVES / 16]; u_int8_t ae_targxfer[80]; /* physical drive transfer rates */ u_int8_t res1[263]; /* pad to 1024 bytes */ diff --git a/lib/libc/include/generic-netbsd/dev/pci/mlyreg.h b/lib/libc/include/generic-netbsd/dev/pci/mlyreg.h @@ -1,4 +1,4 @@ -/* $NetBSD: mlyreg.h,v 1.8 2021/10/24 20:00:11 andvar Exp $ */ +/* $NetBSD: mlyreg.h,v 1.9 2024/02/10 09:21:53 andvar Exp $ */ /*- * Copyright (c) 2001 The NetBSD Foundation, Inc. @@ -1242,7 +1242,7 @@ union mly_cmd_packet { * PG6: 5.4.4 Doorbell 1 * * Note that the documentation claims that these bits are set when the - * status queue(s) are empty, wheras the Linux driver and experience + * status queue(s) are empty, whereas the Linux driver and experience * suggest they are set when there is status available. */ #define MLY_HM_STSREADY (1<<0) diff --git a/lib/libc/include/generic-netbsd/dev/pci/pcidevs.h b/lib/libc/include/generic-netbsd/dev/pci/pcidevs.h @@ -1,10 +1,10 @@ -/* $NetBSD: pcidevs.h,v 1.1452.2.15 2024/12/06 20:18:33 snj Exp $ */ +/* $NetBSD: pcidevs.h,v 1.1506.2.3 2025/11/24 17:28:21 martin Exp $ */ /* * THIS FILE IS AUTOMATICALLY GENERATED. DO NOT EDIT. * * generated from: - * NetBSD: pcidevs,v 1.1471.2.14 2024/12/06 20:15:04 snj Exp + * NetBSD: pcidevs,v 1.1527.2.3 2025/11/24 17:27:40 martin Exp */ /* @@ -653,6 +653,7 @@ #define PCI_VENDOR_ASMEDIA 0x1b21 /* ASMedia */ #define PCI_VENDOR_REDHAT 0x1b36 /* Red Hat */ #define PCI_VENDOR_MARVELL2 0x1b4b /* Marvell */ +#define PCI_VENDOR_ETRON 0x1b6f /* Etron Technology, Inc. */ #define PCI_VENDOR_FRESCO 0x1b73 /* Fresco Logic */ #define PCI_VENDOR_QINHENG2 0x1c00 /* Nanjing QinHeng Electronics (PCIe) */ #define PCI_VENDOR_SYMPHONY2 0x1c1c /* Symphony Labs (2nd PCI Vendor ID) */ @@ -905,6 +906,9 @@ #define PCI_PRODUCT_ADP2_ASR2200S_SUB2M 0x0287 /* ASR-2200S */ #define PCI_PRODUCT_ADP2_ASR2410SA 0x0290 /* ASR-2410SA */ #define PCI_PRODUCT_ADP2_AAR2810SA 0x0292 /* AAR-2810SA */ +#define PCI_PRODUCT_ADP2_5445 0x02b5 /* RAID 5445 */ +#define PCI_PRODUCT_ADP2_5805 0x02b6 /* RAID 5805 */ +#define PCI_PRODUCT_ADP2_5085 0x02b7 /* RAID 5085 */ #define PCI_PRODUCT_ADP2_3405 0x02bb /* RAID 3405 */ #define PCI_PRODUCT_ADP2_3805 0x02bc /* RAID 3805 */ #define PCI_PRODUCT_ADP2_2405 0x02d5 /* RAID 2405 */ @@ -1293,9 +1297,15 @@ #define PCI_PRODUCT_AMD_HUDSON_PCIE_2 0x43a2 /* Hudson PCIe Root Port 2 */ #define PCI_PRODUCT_AMD_HUDSON_PCIE_3 0x43a3 /* Hudson PCIe Root Port 3 */ #define PCI_PRODUCT_AMD_300SERIES_PCIE 0x43b4 /* 300 Series PCIe */ +#define PCI_PRODUCT_AMD_X370SERIES_SATA 0x43b5 /* X370 Series SATA */ +#define PCI_PRODUCT_AMD_X399SERIES_SATA 0x43b6 /* X399 Series SATA */ #define PCI_PRODUCT_AMD_300SERIES_SATA 0x43b7 /* 300 Series SATA */ -#define PCI_PRODUCT_AMD_FCH_SATA_D 0x43b8 /* FCH SATA Controller D */ +#define PCI_PRODUCT_AMD_A320SERIES_SATA 0x43b8 /* A320 Series SATA */ +#define PCI_PRODUCT_AMD_X370SERIES_XHCI 0x43b9 /* X370 Series xHCI */ +#define PCI_PRODUCT_AMD_X399SERIES_XHCI 0x43ba /* X399 Series xHCI */ #define PCI_PRODUCT_AMD_300SERIES_XHCI 0x43bb /* 300 Series xHCI */ +#define PCI_PRODUCT_AMD_A320SERIES_XHCI 0x43bc /* A320 Series xHCI */ +#define PCI_PRODUCT_AMD_FCH_AHCI_SATA_RAID 0x43bd /* FCH AHCI SATA (RAID mode) */ #define PCI_PRODUCT_AMD_400SERIES_PCIE_1 0x43c6 /* 400 Series PCIe */ #define PCI_PRODUCT_AMD_400SERIES_PCIE_2 0x43c7 /* 400 Series PCIe */ #define PCI_PRODUCT_AMD_400SERIES_AHCI 0x43c8 /* 400 Series AHCI */ @@ -1304,7 +1314,12 @@ #define PCI_PRODUCT_AMD_500SERIES_PCIE_1 0x43e9 /* 500 Series PCIe */ #define PCI_PRODUCT_AMD_500SERIES_PCIE_2 0x43ea /* 500 Series PCIe */ #define PCI_PRODUCT_AMD_500SERIES_AHCI 0x43eb /* 500 Series AHCI */ +#define PCI_PRODUCT_AMD_A520SERIES_XHCI 0x43ec /* A520 Series xHCI */ #define PCI_PRODUCT_AMD_500SERIES_XHCI 0x43ee /* 500 Series xHCI */ +#define PCI_PRODUCT_AMD_600SERIES_PCIE_1 0x43f4 /* 600 Series PCIe Switch Upstream Port */ +#define PCI_PRODUCT_AMD_600SERIES_PCIE_2 0x43f5 /* 600 Series PCIe Switch Downstream Port */ +#define PCI_PRODUCT_AMD_600SERIES_SATA 0x43f6 /* 600 Series SATA */ +#define PCI_PRODUCT_AMD_600SERIES_XHCI 0x43f7 /* 600 Series xHCI */ #define PCI_PRODUCT_AMD_500SERIES_PCIE_3 0x57a3 /* 500 Series PCIe */ #define PCI_PRODUCT_AMD_500SERIES_PCIE_4 0x57a4 /* 500 Series PCIe */ #define PCI_PRODUCT_AMD_500SERIES_PCIE_5 0x57ad /* 500 Series PCIe */ @@ -1583,6 +1598,9 @@ #define PCI_PRODUCT_ATI_RADEON_KAVERI_HDMI 0x1308 /* Kaveri HDMI Audio */ #define PCI_PRODUCT_ATI_RADEON_KAVERI_R7_1 0x1313 /* Kaveri Radeon R7 (Kaveri) */ #define PCI_PRODUCT_ATI_RADEON_WRESTLER_HDMI 0x1314 /* Wrestler HDMI Audio */ +#define PCI_PRODUCT_ATI_NAVI_PCIE_1 0x1478 /* Navi PCIe Switch Upstream Port */ +#define PCI_PRODUCT_ATI_NAVI_PCIE_2 0x1479 /* Navi PCIe Switch Downstream Port */ +#define PCI_PRODUCT_ATI_RADEON_RAVEN_RIDGE 0x15dd /* Raven Ridge Radeon Vega (Mobile) Series */ #define PCI_PRODUCT_ATI_RADEON_BEAVERCREEK_HDMI 0x1714 /* BeaverCreek HDMI Audio */ #define PCI_PRODUCT_ATI_RADEON_RV380_3150 0x3150 /* Radeon Mobility X600 (M24) 3150 */ #define PCI_PRODUCT_ATI_RADEON_RV380_3154 0x3154 /* FireGL M24 GL 3154 */ @@ -3320,6 +3338,10 @@ /* ESS Technology products */ #define PCI_PRODUCT_ESSTECH2_MAESTRO1 0x0100 /* Maestro 1 PCI Audio Accelerator */ +/* Etron Technology products */ +#define PCI_PRODUCT_ETRON_EJ168 0x7023 /* EJ168 USB 3.0 xHCI */ +#define PCI_PRODUCT_ETRON_EJ188 0x7052 /* EJ188/EJ198 USB 3.0 xHCI */ + /* Eumitcom products */ #define PCI_PRODUCT_EUMITCOM_WL11000P 0x1100 /* WL11000P PCI WaveLAN/IEEE 802.11 */ @@ -3345,6 +3367,7 @@ #define PCI_PRODUCT_EXAR_XR17D154 0x0154 /* quad-channel Universal PCI UART */ #define PCI_PRODUCT_EXAR_XR17D158 0x0158 /* octal-channel Universal PCI UART */ #define PCI_PRODUCT_EXAR_XR17V354 0x0354 /* quad-channel Universal PCIe UART */ +#define PCI_PRODUCT_EXAR_XR17V358 0x0358 /* octal-channel Universal PCIe UART */ /* FORE products */ #define PCI_PRODUCT_FORE_PCA200 0x0210 /* ATM PCA-200 */ @@ -3549,7 +3572,7 @@ #define PCI_PRODUCT_MARVELL2_88SE9485 0x9485 /* 88SE9485 SATA Controller */ /* Micro-star International Co Ltd */ -#define PCI_PRODUCT_MSI_RT3090 0x891a /* MIS RT3090 */ +#define PCI_PRODUCT_MSI_RT3090 0x891a /* MSI RT3090 */ /* Global Sun Tech products */ #define PCI_PRODUCT_GLOBALSUN_GL24110P 0x1101 /* GL24110P PCI IEEE 802.11b */ @@ -5141,6 +5164,7 @@ #define PCI_PRODUCT_INTEL_63XXESB_SMB 0x269b /* 63xxESB SMBus Controller */ #define PCI_PRODUCT_INTEL_63XXESB_IDE 0x269e /* 63xxESB IDE Controller */ #define PCI_PRODUCT_INTEL_SNR_DLB 0x270b /* Snow Ridge DLB 1.0 */ +#define PCI_PRODUCT_INTEL_WIFI7 0x272b /* Wi-Fi 7 */ #define PCI_PRODUCT_INTEL_82945P_MCH 0x2770 /* 82945G/P Memory Controller Hub */ #define PCI_PRODUCT_INTEL_82945P_EXP 0x2771 /* 82945G/P PCI Express Bridge */ #define PCI_PRODUCT_INTEL_82945P_IGD 0x2772 /* 82945G/P Integrated Graphics Device */ @@ -6516,6 +6540,7 @@ #define PCI_PRODUCT_INTEL_APL_SSRAM 0x5aec /* Apollo Lake Shared SRAM */ #define PCI_PRODUCT_INTEL_APL_UART_3 0x5aee /* Apollo Lake UART 3 */ #define PCI_PRODUCT_INTEL_APL_HB 0x5af0 /* Apollo Lake Host Bridge */ +#define PCI_PRODUCT_INTEL_NPU_LNL 0x643e /* Lunar Lake NPU */ #define PCI_PRODUCT_INTEL_XEOND_HB_DMI2 0x6f00 /* Core i7-6xxxK/Xeon-D Host Bridge (DMI2) */ #define PCI_PRODUCT_INTEL_XEOND_HB_PCIE 0x6f01 /* Xeon-D Host Bridge (PCIe) */ #define PCI_PRODUCT_INTEL_XEOND_PCIE_1 0x6f02 /* Xeon-D PCIe Root Port (x8 or x4 max) */ @@ -6778,6 +6803,17 @@ #define PCI_PRODUCT_INTEL_6HS_H_I2C_4 0x7afc /* 600 Series PCH-H I2C 4 */ #define PCI_PRODUCT_INTEL_6HS_H_I2C_5 0x7afd /* 600 Series PCH-H I2C 5 */ #define PCI_PRODUCT_INTEL_6HS_H_UART_2 0x7afe /* 600 Series PCH-H UART 2 */ +#define PCI_PRODUCT_INTEL_VMD_MTL 0x7d0b /* Volume Management Device */ +#define PCI_PRODUCT_INTEL_NPU_MTL 0x7d1d /* Meteor Lake NPU */ +#define PCI_PRODUCT_INTEL_LPC_MTL 0x7e02 /* Meteor Lake LPC/ISA Bridge */ +#define PCI_PRODUCT_INTEL_PCH_MTL 0x7d14 /* Meteor Lake PCH */ +#define PCI_PRODUCT_INTEL_SMBUS_MTL 0x7e22 /* Meteor Lake SMbus */ +#define PCI_PRODUCT_INTEL_SPI_MTL 0x7e23 /* Meteor Lake SPI Controller */ +#define PCI_PRODUCT_INTEL_ARCG_MTL 0x7d55 /* Meteor Lake Arc Graphics */ +#define PCI_PRODUCT_INTEL_AHCI_MTL 0x7e63 /* Meteor Lake AHCI Controller */ +#define PCI_PRODUCT_INTEL_USB32_MTL 0x7e7d /* Meteor Lake USB 3.2 Gen 2x1 xHCI Host Controller */ +#define PCI_PRODUCT_INTEL_MPM_MTL 0x7e7f /* Meteor Lake Memory Power Management */ +#define PCI_PRODUCT_INTEL_TB4USB_MTL 0x7ec0 /* Meteor Lake Thunderbolt 4 USB Controller */ #define PCI_PRODUCT_INTEL_SCH_IDE 0x811a /* SCH IDE Controller */ #define PCI_PRODUCT_INTEL_E600_HDA 0x811b /* E600 HD Audio */ #define PCI_PRODUCT_INTEL_E600_PCIB_0 0x8180 /* E600 Virtual PCI-PCI Bridge */ @@ -7614,6 +7650,8 @@ #define PCI_PRODUCT_INTEL_RPL_IGD_10 0xa7aa /* Raptor Lake Graphics (96 or 80EU) */ #define PCI_PRODUCT_INTEL_RPL_IGD_11 0xa7ac /* Raptor Lake Graphics (96 or 80EU) */ #define PCI_PRODUCT_INTEL_RPL_IGD_12 0xa7ad /* Raptor Lake Graphics (64EU) */ +#define PCI_PRODUCT_INTEL_NPU_ARL 0xad1d /* Arrow Lake NPU */ +#define PCI_PRODUCT_INTEL_NPU_PTL 0xb03e /* Panther Lake NPU */ #define PCI_PRODUCT_INTEL_21152 0xb152 /* S21152BB PCI-PCI Bridge */ #define PCI_PRODUCT_INTEL_21154 0xb154 /* S21152BA,S21154AE/BE PCI-PCI Bridge */ #define PCI_PRODUCT_INTEL_21555 0xb555 /* 21555 Non-Transparent PCI-PCI Bridge */ @@ -7850,7 +7888,13 @@ #define PCI_PRODUCT_MICREL_KSZ8842 0x8842 /* Switched 2 Port 10/100 Ethernet */ /* Micron/Crucial Technology products */ -#define PCI_PRODUCT_MICRON_SM2263 0x2263 /* SM2263 NVMe Controller */ +#define PCI_PRODUCT_MICRON_P1 0x2263 /* P1 NVMe SSD */ +#define PCI_PRODUCT_MICRON_P1_1 0x5403 /* P1 NVMe SSD */ +#define PCI_PRODUCT_MICRON_P5PLUS 0x5407 /* P5 Plus NVMe SSD */ +#define PCI_PRODUCT_MICRON_P2P3P3P 0x540a /* P2 / P3 / P3 Plus NVMe SSD */ +#define PCI_PRODUCT_MICRON_P5 0x5412 /* P5 NVMe SSD */ +#define PCI_PRODUCT_MICRON_T500 0x5415 /* T500 NVMe SSD */ +#define PCI_PRODUCT_MICRON_T700 0x5419 /* T700 NVMe SSD */ /* Middle Digital products */ #define PCI_PRODUCT_MIDDLE_DIGITAL_WEASEL_VGA 0x9050 /* Weasel Virtual VGA */ @@ -8344,6 +8388,7 @@ #define PCI_PRODUCT_NVIDIA_GEFORCE3_TI200 0x0201 /* GeForce3 Ti 200 */ #define PCI_PRODUCT_NVIDIA_GEFORCE3_TI500 0x0202 /* GeForce3 Ti 500 */ #define PCI_PRODUCT_NVIDIA_QUADRO_DCC 0x0203 /* Quadro DCC */ +#define PCI_PRODUCT_NVIDIA_GEFORCE_6200A 0x0221 /* GeForce 6200A */ #define PCI_PRODUCT_NVIDIA_GEFORCE_6150 0x0240 /* GeForce 6150 */ #define PCI_PRODUCT_NVIDIA_GEFORCE_6150LE 0x0241 /* GeForce 6150 LE */ #define PCI_PRODUCT_NVIDIA_GEFORCE4_TI4600 0x0250 /* GeForce4 Ti 4600 */ @@ -8590,7 +8635,45 @@ #define PCI_PRODUCT_NVIDIA_GF108_HDA 0x0bea /* GF108 HD Audio */ #define PCI_PRODUCT_NVIDIA_GF116_HDA 0x0bee /* GF116 HD Audio */ #define PCI_PRODUCT_NVIDIA_GF_440 0x0de0 /* GeForce GT 440 */ +#define PCI_PRODUCT_NVIDIA_GF_GT630 0x0f00 /* GeForce GT 630 */ +#define PCI_PRODUCT_NVIDIA_GF_GT620 0x0f01 /* GeForce GT 620 */ +#define PCI_PRODUCT_NVIDIA_GF_GT730_4 0x0f02 /* GeForce GT 730 */ +#define PCI_PRODUCT_NVIDIA_GF_GT640_1 0x0fc0 /* GeForce GT 640 */ +#define PCI_PRODUCT_NVIDIA_GF_GT640_2 0x0fc1 /* GeForce GT 640 */ +#define PCI_PRODUCT_NVIDIA_GF_GT630_2 0x0fc2 /* GeForce GT 630 */ +#define PCI_PRODUCT_NVIDIA_GF_GTX650 0x0fc6 /* GeForce GTX 650 */ +#define PCI_PRODUCT_NVIDIA_GF_GT740 0x0fc8 /* GeForce GT 740 */ +#define PCI_PRODUCT_NVIDIA_GF_GT730_3 0x0fc9 /* GeForce GT 730 */ +#define PCI_PRODUCT_NVIDIA_GF_GT755M 0x0fcd /* GeForce GT 755M */ +#define PCI_PRODUCT_NVIDIA_GF_GT640M_LE 0x0fce /* GeForce GT 640M LE */ +#define PCI_PRODUCT_NVIDIA_GF_GT650M 0x0fd1 /* GeForce GT 650M */ #define PCI_PRODUCT_NVIDIA_GF_GT640M 0x0fd2 /* GeForce GT 640M */ +#define PCI_PRODUCT_NVIDIA_GF_GT640M_LE_2 0x0fd3 /* GeForce GT 640M LE */ +#define PCI_PRODUCT_NVIDIA_GF_GTX660M 0x0fd4 /* GeForce GTX 660M */ +#define PCI_PRODUCT_NVIDIA_GF_GT650M_2 0x0fd5 /* GeForce GT 650M */ +#define PCI_PRODUCT_NVIDIA_GF_GT640M_2 0x0fd8 /* GeForce GT 640M */ +#define PCI_PRODUCT_NVIDIA_GF_GT645M 0x0fd9 /* GeForce GT 645M */ +#define PCI_PRODUCT_NVIDIA_GF_GT740M_2 0x0fdf /* GeForce GT 740M */ +#define PCI_PRODUCT_NVIDIA_GF_GTX660M_2 0x0fe0 /* GeForce GTX 660M */ +#define PCI_PRODUCT_NVIDIA_GF_GT730M_2 0x0fe1 /* GeForce GT 730M */ +#define PCI_PRODUCT_NVIDIA_GF_GT745M 0x0fe2 /* GeForce GT 745M */ +#define PCI_PRODUCT_NVIDIA_GF_GT745M_2 0x0fe3 /* GeForce GT 745M */ +#define PCI_PRODUCT_NVIDIA_GF_GT750M 0x0fe4 /* GeForce GT 750M */ +#define PCI_PRODUCT_NVIDIA_GF_GT750M_2 0x0fe9 /* GeForce GT 750M */ +#define PCI_PRODUCT_NVIDIA_GF_GT755M_2 0x0fea /* GeForce GT 755M */ +#define PCI_PRODUCT_NVIDIA_GF_GT710A 0x0fec /* GeForce 710A */ +#define PCI_PRODUCT_NVIDIA_GRID_K340 0x0fef /* GRID K340 */ +#define PCI_PRODUCT_NVIDIA_GRID_K1 0x0ff2 /* GRID K1 */ +#define PCI_PRODUCT_NVIDIA_QUADRO_K420 0x0ff3 /* Quadro K420 */ +#define PCI_PRODUCT_NVIDIA_QUADRO_K1100M 0x0ff6 /* Quadro K1100M */ +#define PCI_PRODUCT_NVIDIA_QUADRO_K500M 0x0ff8 /* Quadro K500M */ +#define PCI_PRODUCT_NVIDIA_QUADRO_K2000D 0x0ff9 /* Quadro K2000D */ +#define PCI_PRODUCT_NVIDIA_QUADRO_K600 0x0ffa /* Quadro K600 */ +#define PCI_PRODUCT_NVIDIA_QUADRO_K2000M 0x0ffb /* Quadro K2000M */ +#define PCI_PRODUCT_NVIDIA_QUADRO_K1000M 0x0ffc /* Quadro K1000M */ +#define PCI_PRODUCT_NVIDIA_QUADRO_NVS510 0x0ffd /* NVS 510 */ +#define PCI_PRODUCT_NVIDIA_QUADRO_K2000 0x0ffe /* Quadro K2000 */ +#define PCI_PRODUCT_NVIDIA_QUADRO_410 0x0fff /* Quadro 410 */ #define PCI_PRODUCT_NVIDIA_GT520 0x1040 /* GeForce GT 520 */ #define PCI_PRODUCT_NVIDIA_GEFORCE_510 0x1042 /* GeForce 510 */ #define PCI_PRODUCT_NVIDIA_GEFORCE_605 0x1048 /* GeForce 605 */ @@ -8802,7 +8885,6 @@ #define PCI_PRODUCT_NVIDIA_GF_RTX2080M 0x1ed0 /* GeForce RTX 2080 Mobile */ #define PCI_PRODUCT_NVIDIA_GF_RTX2070SM 0x1ed1 /* GeForce RTX 2070 SUPER Mobile / Max-Q */ #define PCI_PRODUCT_NVIDIA_GF_RTX2080SM 0x1ed3 /* GeForce RTX 2080 SUPER Mobile / Max-Q */ - #define PCI_PRODUCT_NVIDIA_GF_RTX2070 0x1f02 /* GeForce RTX 2070 */ #define PCI_PRODUCT_NVIDIA_GF_RTX2060S 0x1f06 /* GeForce RTX 2060 SUPER */ #define PCI_PRODUCT_NVIDIA_GF_RTX2070_2 0x1f07 /* GeForce RTX 2070 Rev. A */ @@ -8956,13 +9038,20 @@ #define PCI_PRODUCT_OXFORDSEMI_OXPCIE952_0 0xc101 /* OXPCIe952 */ #define PCI_PRODUCT_OXFORDSEMI_OXPCIE952_1 0xc105 /* OXPCIe952 */ #define PCI_PRODUCT_OXFORDSEMI_OXPCIE952P 0xc110 /* OXPCIe952 Parallel */ +#define PCI_PRODUCT_OXFORDSEMI_OXPCIE952SN1 0xc11b /* OXPCIe952 1 Native Serial */ #define PCI_PRODUCT_OXFORDSEMI_OXPCIE952_2S 0xc120 /* OXPCIe952 2 Serial */ #define PCI_PRODUCT_OXFORDSEMI_OXPCIE952_2 0xc124 /* OXPCIe952 */ +#define PCI_PRODUCT_OXFORDSEMI_OXPCIE952SN1_2 0xc138 /* OXPCIe952 1 Native Serial */ #define PCI_PRODUCT_OXFORDSEMI_OXPCIE952_3 0xc140 /* OXPCIe952 */ #define PCI_PRODUCT_OXFORDSEMI_OXPCIE952_4 0xc141 /* OXPCIe952 */ #define PCI_PRODUCT_OXFORDSEMI_OXPCIE952_5 0xc144 /* OXPCIe952 */ #define PCI_PRODUCT_OXFORDSEMI_OXPCIE952_6 0xc145 /* OXPCIe952 */ +#define PCI_PRODUCT_OXFORDSEMI_OXPCIE952SN2 0xc158 /* OXPCIe952 2 Native Serial */ +#define PCI_PRODUCT_OXFORDSEMI_OXPCIE952SN2_2 0xc15d /* OXPCIe952 2 Native Serial */ #define PCI_PRODUCT_OXFORDSEMI_OXPCIE954 0xc208 /* OXPCIe954 */ +#define PCI_PRODUCT_OXFORDSEMI_OXPCIE954SN4 0xc20d /* OXPCIe954 4 Native Serial */ +#define PCI_PRODUCT_OXFORDSEMI_OXPCIE958 0xc308 /* OXPCIe958 */ +#define PCI_PRODUCT_OXFORDSEMI_OXPCIE958SN8 0xc30d /* OXPCIe958 8 Native Serial */ /* Packet Engines products */ #define PCI_PRODUCT_PACKETENGINES_GNICII 0x0911 /* G-NIC II Ethernet */ @@ -9203,7 +9292,6 @@ #define PCI_PRODUCT_QUMRANET_VIRTIO_103D 0x103d /* Virtio */ #define PCI_PRODUCT_QUMRANET_VIRTIO_103E 0x103e /* Virtio */ #define PCI_PRODUCT_QUMRANET_VIRTIO_103F 0x103f /* Virtio */ - #define PCI_PRODUCT_QUMRANET_VIRTIO_1040 0x1040 /* Virtio */ #define PCI_PRODUCT_QUMRANET_VIRTIO_1041 0x1041 /* Virtio Network */ #define PCI_PRODUCT_QUMRANET_VIRTIO_1042 0x1042 /* Virtio Storage */ @@ -9351,6 +9439,7 @@ #define PCI_PRODUCT_REALTEK_RT8100 0x8100 /* 8100 10/100 Ethernet */ #define PCI_PRODUCT_REALTEK_RT8125 0x8125 /* 8125 10/100/1G/2.5G Ethernet */ #define PCI_PRODUCT_REALTEK_RT8126 0x8126 /* 8126 10/100/1G/2.5G/5G Ethernet */ +#define PCI_PRODUCT_REALTEK_RT8127 0x8127 /* 8127 10/100/1G/2.5G/5G Ethernet */ #define PCI_PRODUCT_REALTEK_RT8129 0x8129 /* 8129 10/100 Ethernet */ #define PCI_PRODUCT_REALTEK_RT8101E 0x8136 /* 8100E/8101E/8102E 10/100 Ethernet */ #define PCI_PRODUCT_REALTEK_RT8138 0x8138 /* 8138 10/100 Ethernet */ @@ -9987,22 +10076,27 @@ /* VIA Technologies products, from http://www.via.com.tw/ */ #define PCI_PRODUCT_VIATECH_VT6305 0x0130 /* VT6305 IEEE 1394 Host Controller */ -#define PCI_PRODUCT_VIATECH_K8M800_0 0x0204 /* K8M800 Host */ -#define PCI_PRODUCT_VIATECH_K8T890_0 0x0238 /* K8T890 Host */ +#define PCI_PRODUCT_VIATECH_K8M800_0 0x0204 /* K8M800 Host Controller */ +#define PCI_PRODUCT_VIATECH_K8T890_0 0x0238 /* K8T890 Host Controller */ +#define PCI_PRODUCT_VIATECH_CN400_AGP 0x0259 /* CN333/CN400/PM880 AGP */ #define PCI_PRODUCT_VIATECH_KT880 0x0269 /* KT880 CPU to PCI Bridge */ #define PCI_PRODUCT_VIATECH_K8HTB_0 0x0282 /* K8HTB Host */ #define PCI_PRODUCT_VIATECH_VT8363_HB 0x0305 /* VT8363 (Apollo KT133) Host Bridge */ +#define PCI_PRODUCT_VIATECH_P4M890_HB 0x0327 /* P4M890/PT890 Host Bridge */ +#define PCI_PRODUCT_VIATECH_K8M890CE_HB 0x0336 /* K8M890CE Host Bridge */ #define PCI_PRODUCT_VIATECH_VT3351_HB_0351 0x0351 /* VT3351 Host Bridge */ #define PCI_PRODUCT_VIATECH_VX800_HC 0x0353 /* VX800/VX820 Host Controller */ #define PCI_PRODUCT_VIATECH_P4M900 0x0364 /* CN896/P4M900 Host Bridge */ #define PCI_PRODUCT_VIATECH_VT8371_HB 0x0391 /* VT8371 (Apollo KX133) Host Bridge */ +#define PCI_PRODUCT_VIATECH_VX855_HB 0x0409 /* VX855 Host Control */ #define PCI_PRODUCT_VIATECH_VX900_HB 0x0410 /* VX900 Host Bridge */ +#define PCI_PRODUCT_VIATECH_VT6415_IDE 0x0415 /* VT6415/VT6330 IDE Controller */ #define PCI_PRODUCT_VIATECH_VT8501_MVP4 0x0501 /* VT8501 (Apollo MVP4) Host Bridge */ #define PCI_PRODUCT_VIATECH_VT82C505 0x0505 /* VT82C505 (Pluto) */ #define PCI_PRODUCT_VIATECH_VT82C561 0x0561 /* VT82C561 */ #define PCI_PRODUCT_VIATECH_VT82C586A_IDE 0x0571 /* VT82C586A IDE Controller */ #define PCI_PRODUCT_VIATECH_VT82C576 0x0576 /* VT82C576 3V */ -#define PCI_PRODUCT_VIATECH_CX700_IDE 0x0581 /* CX700 IDE Controller */ +#define PCI_PRODUCT_VIATECH_CX700_IDE 0x0581 /* CX700(M2)/VX700/VX800 SATA/IDE RAID Controller */ #define PCI_PRODUCT_VIATECH_VT82C580VP 0x0585 /* VT82C580 (Apollo VP) Host-PCI Bridge */ #define PCI_PRODUCT_VIATECH_VT82C586_ISA 0x0586 /* VT82C586 PCI-ISA Bridge */ #define PCI_PRODUCT_VIATECH_VT8237A_SATA 0x0591 /* VT8237A Integrated SATA Controller */ @@ -10010,6 +10104,7 @@ #define PCI_PRODUCT_VIATECH_VT82C596A 0x0596 /* VT82C596A PCI-ISA Bridge */ #define PCI_PRODUCT_VIATECH_VT82C597 0x0597 /* VT82C597 (Apollo VP3) Host-PCI Bridge */ #define PCI_PRODUCT_VIATECH_VT82C598PCI 0x0598 /* VT82C598 (Apollo MVP3) Host-PCI Bridge */ +#define PCI_PRODUCT_VIATECH_VT8601A_HB 0x0601 /* VT8601A (Apollo PLE133) Host Bridge */ #define PCI_PRODUCT_VIATECH_VT8605PCI 0x0605 /* VT8605 (Apollo ProMedia 133) Host-PCI Bridge */ #define PCI_PRODUCT_VIATECH_VT82C686A_ISA 0x0686 /* VT82C686A PCI-ISA Bridge */ #define PCI_PRODUCT_VIATECH_VT82C691 0x0691 /* VT82C691 (Apollo Pro) Host-PCI */ @@ -10018,27 +10113,39 @@ #define PCI_PRODUCT_VIATECH_VT82C570M 0x1000 /* VT82C570M (Apollo) Host-PCI Bridge */ #define PCI_PRODUCT_VIATECH_VT82C570MV 0x1006 /* VT82C570M (Apollo) PCI-ISA Bridge */ #define PCI_PRODUCT_VIATECH_CHROME9HC3 0x1122 /* VX800/VX820 Chrome 9 HC3 Integrated Graphics */ +#define PCI_PRODUCT_VIATECH_K8T890_ERR 0x1238 /* K8T890 Error Reporting */ +#define PCI_PRODUCT_VIATECH_CN400_ERR 0x1259 /* CN333/CN400/PM880 Error Reporting */ #define PCI_PRODUCT_VIATECH_KT880_1 0x1269 /* KT880 CPU to PCI Bridge */ +#define PCI_PRODUCT_VIATECH_P4M890_HB_2 0x1327 /* P4M890/PT890 Host Bridge */ +#define PCI_PRODUCT_VIATECH_K8M890CE_HB_2 0x1336 /* K8M890CE Host Bridge */ #define PCI_PRODUCT_VIATECH_VT3351_HB_1351 0x1351 /* VT3351 Host Bridge */ #define PCI_PRODUCT_VIATECH_VX800_ERR 0x1353 /* VX800/VX820 Error Reporting */ #define PCI_PRODUCT_VIATECH_P4M900_1 0x1364 /* CN896/P4M900 Host Bridge */ +#define PCI_PRODUCT_VIATECH_VX855_ERR 0x1409 /* VX855 Error Reporting */ #define PCI_PRODUCT_VIATECH_VX900_ERR 0x1410 /* VX900 Error Reporting */ #define PCI_PRODUCT_VIATECH_VT82C586_IDE 0x1571 /* VT82C586 IDE Controller */ #define PCI_PRODUCT_VIATECH_VT82C595_2 0x1595 /* VT82C595 (Apollo VP2) Host-PCI Bridge */ #define PCI_PRODUCT_VIATECH_VT6105M_BOM 0x2006 /* VT6105M_BOM (Rhine III) 10/100 Ethernet */ +#define PCI_PRODUCT_VIATECH_K8T890_HBC 0x2238 /* K8T890 Host Bus Control */ +#define PCI_PRODUCT_VIATECH_CN400_HCB 0x2259 /* CN333/CN400/PM880 Host CPU Bus */ #define PCI_PRODUCT_VIATECH_KT880_2 0x2269 /* KT880 CPU to PCI Bridge */ +#define PCI_PRODUCT_VIATECH_P4M890_HB_3 0x2327 /* P4M890/PT890 Host Bridge */ +#define PCI_PRODUCT_VIATECH_K8M890CE_HB_3 0x2336 /* K8M890CE Host Bridge */ #define PCI_PRODUCT_VIATECH_VT3351_HB_2351 0x2351 /* VT3351 Host Bridge */ #define PCI_PRODUCT_VIATECH_VX800_HBC 0x2353 /* VX800/VX820 Host Bus Control */ #define PCI_PRODUCT_VIATECH_P4M900_2 0x2364 /* CN896/P4M900 Host Bridge */ +#define PCI_PRODUCT_VIATECH_VX855_HBC 0x2409 /* VX855 Host Bus Control */ #define PCI_PRODUCT_VIATECH_VX900_0 0x2410 /* VX900 CPU Bus Controller */ #define PCI_PRODUCT_VIATECH_VT8251_PPB_287A 0x287a /* VT8251 PCI-PCI Bridge */ +#define PCI_PRODUCT_VIATECH_VT8251_HB 0x287b /* VT8251 Host Bridge */ #define PCI_PRODUCT_VIATECH_VT8251_PCIE1 0x287c /* VT8251 PCIe Root Port1 */ #define PCI_PRODUCT_VIATECH_VT8251_PCIE2 0x287d /* VT8251 PCIe Root Port2 */ -#define PCI_PRODUCT_VIATECH_VT8251_VLINK 0x287e /* VT8251 Ultra VLINK Controller */ +#define PCI_PRODUCT_VIATECH_VT8251_VLINK 0x287e /* VT8237A/VT8237S/VT8251 Ultra VLINK Controller */ #define PCI_PRODUCT_VIATECH_VT83C572 0x3038 /* VT83C572 USB Controller */ #define PCI_PRODUCT_VIATECH_VT82C586_PWR 0x3040 /* VT82C586 Power Management Controller */ #define PCI_PRODUCT_VIATECH_VT3043 0x3043 /* VT3043 (Rhine) 10/100 Ethernet */ #define PCI_PRODUCT_VIATECH_VT6306 0x3044 /* VT6306 IEEE 1394 Host Controller */ +#define PCI_PRODUCT_VIATECH_VT82C596B_PWR 0x3050 /* VT82C596B Power Management Controller */ #define PCI_PRODUCT_VIATECH_VT6105M 0x3053 /* VT6105M (Rhine III) 10/100 Ethernet */ #define PCI_PRODUCT_VIATECH_VT82C686A_PWR 0x3057 /* VT82C686A Power Management Controller */ #define PCI_PRODUCT_VIATECH_VT82C686A_AC97 0x3058 /* VT82C686A AC-97 Audio Controller */ @@ -10050,58 +10157,94 @@ #define PCI_PRODUCT_VIATECH_VT8653 0x3101 /* VT8653 (Apollo Pro 266T) CPU-PCI Bridge */ #define PCI_PRODUCT_VIATECH_VT8237_EHCI 0x3104 /* VT8237 EHCI USB Controller */ #define PCI_PRODUCT_VIATECH_VT6105 0x3106 /* VT6105 (Rhine III) 10/100 Ethernet */ +#define PCI_PRODUCT_VIATECH_VT3108_IG 0x3108 /* K8M800/K8N800(A) UniChrome Pro IGP */ +#define PCI_PRODUCT_VIATECH_VT8233C 0x3109 /* VT8233C PCI-ISA Bridge */ +#define PCI_PRODUCT_VIATECH_VT3118_IG 0x3118 /* CN400/PM8x0/PN8x0 UniChrome Pro IGP */ #define PCI_PRODUCT_VIATECH_VT612X 0x3119 /* VT612X (Velocity) 10/100/1000 Ethernet */ #define PCI_PRODUCT_VIATECH_VT8623_VGA 0x3122 /* VT8623 (Apollo CLE266) VGA Controller */ #define PCI_PRODUCT_VIATECH_VT8623 0x3123 /* VT8623 (Apollo CLE266) CPU-PCI Bridge */ #define PCI_PRODUCT_VIATECH_VT8233A 0x3147 /* VT8233A PCI-ISA Bridge */ +#define PCI_PRODUCT_VIATECH_VT8751_HB 0x3148 /* P4M266 Host Bridge */ #define PCI_PRODUCT_VIATECH_VT8237_SATA 0x3149 /* VT8237 Integrated SATA Controller */ +#define PCI_PRODUCT_VIATECH_VT3157_IG 0x3157 /* CX700/VX700 Unichrome Pro IGP */ #define PCI_PRODUCT_VIATECH_VT6410_RAID 0x3164 /* VT6410 ATA133 RAID Controller */ -#define PCI_PRODUCT_VIATECH_VT8235 0x3177 /* VT8235 (Apollo KT400) PCI-ISA Bridge */ +#define PCI_PRODUCT_VIATECH_VT8235 0x3177 /* VT8235 Bus Control & Power Management */ #define PCI_PRODUCT_VIATECH_K8HTB 0x3188 /* K8HTB Host */ #define PCI_PRODUCT_VIATECH_VT8377 0x3189 /* VT8377 Apollo KT400 CPU to PCI Bridge */ #define PCI_PRODUCT_VIATECH_VT8378 0x3205 /* VT8378 Apollo KM400 CPU to PCI Bridge */ #define PCI_PRODUCT_VIATECH_VT8237 0x3227 /* VT8237 PCI-LPC Bridge */ +#define PCI_PRODUCT_VIATECH_K8T890_DRAM 0x3238 /* K8T890 DRAM Bus Control */ +#define PCI_PRODUCT_VIATECH_VT3230_IG 0x3230 /* K8M890CE/K8N890CE Chrome 9 IGP */ #define PCI_PRODUCT_VIATECH_VT6421_RAID 0x3249 /* VT6421 Serial RAID Controller */ +#define PCI_PRODUCT_VIATECH_CN400_DRAM 0x3259 /* CN333/CN400/PM880 DRAM Bus Control */ #define PCI_PRODUCT_VIATECH_KT880_3 0x3269 /* KT880 CPU to PCI Bridge */ #define PCI_PRODUCT_VIATECH_VT8251 0x3287 /* VT8251 PCI-LPC Bridge */ #define PCI_PRODUCT_VIATECH_VT8237A_HDA 0x3288 /* VT8237A/VT8251 High Definition Audio Controller */ +#define PCI_PRODUCT_VIATECH_P4M890_HB_4 0x3327 /* P4M890/PT890 Host Bridge */ +#define PCI_PRODUCT_VIATECH_K8M890CE_HB_4 0x3336 /* K8M890CE Host Bridge */ #define PCI_PRODUCT_VIATECH_VT8237A_ISA 0x3337 /* VT8237A/VT82C586A PCI-ISA Bridge */ -#define PCI_PRODUCT_VIATECH_VT3314_IG 0x3344 /* VT3314 CN900 UniChrome Integrated Graphics */ -#define PCI_PRODUCT_VIATECH_VT8237R_SATA 0x3349 /* VT8237R Integrated SATA Controller */ +#define PCI_PRODUCT_VIATECH_VT3343_IG 0x3343 /* P4M890 UniChrome Pro IGP */ +#define PCI_PRODUCT_VIATECH_VT3314_IG 0x3344 /* CN700/P4M800 (Pro/CE)/VN800 UniChrome Pro IGP */ +#define PCI_PRODUCT_VIATECH_VT8251_SATA 0x3349 /* VT8251 Integrated SATA Controller */ #define PCI_PRODUCT_VIATECH_VT3351_HB_3351 0x3351 /* VT3351 Host Bridge */ #define PCI_PRODUCT_VIATECH_VX800_PPB_2 0x3353 /* VX800/VX820 PCI-PCI Bridge */ #define PCI_PRODUCT_VIATECH_P4M900_3 0x3364 /* CN896/P4M900 Host Bridge */ -#define PCI_PRODUCT_VIATECH_CHROME9_HC 0x3371 /* Chrome9 HC IGP */ +#define PCI_PRODUCT_VIATECH_VT3371_IG 0x3371 /* CN896/VN896/P4M900 Chrome9 HC IGP */ #define PCI_PRODUCT_VIATECH_VT8237S_ISA 0x3372 /* VT8237S PCI-ISA Bridge */ -#define PCI_PRODUCT_VIATECH_VT8237A_PPB 0x337a /* VT8237A PCI-PCI Bridge */ -#define PCI_PRODUCT_VIATECH_VT8237A_HB 0x337b /* VT8237A Host Bridge */ +#define PCI_PRODUCT_VIATECH_VT8237A_PPB 0x337a /* VT8237A/S PCI-PCI Bridge */ +#define PCI_PRODUCT_VIATECH_VT8237A_HB 0x337b /* VT8237A/S Host Bridge */ +#define PCI_PRODUCT_VIATECH_VT8261 0x3402 /* VT8261 PCI-ISA Bridge */ +#define PCI_PRODUCT_VIATECH_VT6315_FW 0x3403 /* VT6315/VT6330 FireWire Controller */ +#define PCI_PRODUCT_VIATECH_VX855_DRAM 0x3409 /* VX855 DRAM Bus Control */ #define PCI_PRODUCT_VIATECH_VX900_DRAM 0x3410 /* VX900 DRAM Controller */ #define PCI_PRODUCT_VIATECH_VL80x_XHCI 0x3432 /* VL80x xHCI */ #define PCI_PRODUCT_VIATECH_VL805_XHCI 0x3483 /* VL805 xHCI */ +#define PCI_PRODUCT_VIATECH_CHROME_645_IGP 0x3a01 /* VX11 Graphics [Chrome 645/640] */ +#define PCI_PRODUCT_VIATECH_K8T890_PMC 0x4238 /* K8T890 Power Management Control */ +#define PCI_PRODUCT_VIATECH_CN400_PMC 0x4259 /* CN333/CN400/PM880 Power Management Control */ #define PCI_PRODUCT_VIATECH_KT880_4 0x4269 /* KT880 CPU to PCI Bridge */ +#define PCI_PRODUCT_VIATECH_P4M890_HB_5 0x4327 /* P4M890/PT890 Host Bridge */ +#define PCI_PRODUCT_VIATECH_K8M890CE_HB_5 0x4336 /* K8M890CE Host Bridge */ #define PCI_PRODUCT_VIATECH_VT3351_HB_4351 0x4351 /* VT3351 Host Bridge */ #define PCI_PRODUCT_VIATECH_VX800_PMC 0x4353 /* VX800/VX820 Power Management Control */ #define PCI_PRODUCT_VIATECH_P4M900_4 0x4364 /* CN896/P4M900 Host Bridge */ +#define PCI_PRODUCT_VIATECH_VX855_PMC 0x4409 /* VX855 Power Management Control */ #define PCI_PRODUCT_VIATECH_VX900_1 0x4410 /* VX900 Power Management Controller */ -#define PCI_PRODUCT_VIATECH_CX700M2_IDE 0x5324 /* CX700M2/VX700 IDE Controller */ +#define PCI_PRODUCT_VIATECH_VX800_IG 0x5122 /* VX855/VX875 Chrome9 HCM IGP */ +#define PCI_PRODUCT_VIATECH_K8T890_IOAPIC 0x5238 /* K8T890 APIC and Central Traffic Control */ +#define PCI_PRODUCT_VIATECH_VT8251_SATA_2 0x5287 /* VT8251 Integrated SATA Controller (IDE mode) */ +#define PCI_PRODUCT_VIATECH_CX700M2_IDE 0x5324 /* CX700(M2)/VX700/VX800/VX820 IDE Controller */ +#define PCI_PRODUCT_VIATECH_P4M890_IOAPIC 0x5327 /* P4M890/PT890 I/O APIC Interrupt Controller */ +#define PCI_PRODUCT_VIATECH_K8M890CE_IOAPIC 0x5336 /* K8M890CE I/O APIC Interrupt Controller */ #define PCI_PRODUCT_VIATECH_VT8237A_SATA_2 0x5337 /* VT8237A Integrated SATA Controller */ #define PCI_PRODUCT_VIATECH_VT3351_IOAPIC 0x5351 /* VT3351 I/O APIC Interrupt Controller */ #define PCI_PRODUCT_VIATECH_VX800_APIC 0x5353 /* VX800/VX820 APIC and Central Traffic Control */ #define PCI_PRODUCT_VIATECH_P4M900_IOAPIC 0x5364 /* CN896/P4M900 IOAPIC */ #define PCI_PRODUCT_VIATECH_VT8237S_SATA 0x5372 /* VT8237S Integrated SATA Controller */ +#define PCI_PRODUCT_VIATECH_VX855_APIC 0x5409 /* VX855 APIC and Central Traffic Control */ #define PCI_PRODUCT_VIATECH_VX900_APIC 0x5410 /* VX900 APIC and Traffic Controller */ #define PCI_PRODUCT_VIATECH_VT86C100A 0x6100 /* VT86C100A (Rhine-II) 10/100 Ethernet */ -#define PCI_PRODUCT_VIATECH_VT8251_SATA 0x6287 /* VT8251 Integrated SATA Controller */ +#define PCI_PRODUCT_VIATECH_CHROME520_IGP 0x6122 /* VN1000 Graphics [Chrome 520 IGP] */ +#define PCI_PRODUCT_VIATECH_K8T890_SCRATCH 0x6238 /* K8T890 Scratch Registers */ +#define PCI_PRODUCT_VIATECH_VT8251_AHCI 0x6287 /* VT8251 Integrated AHCI SATA Controller */ +#define PCI_PRODUCT_VIATECH_K8M890CE_HB_6 0x6290 /* K8M890CE Host Bridge */ +#define PCI_PRODUCT_VIATECH_P4M890_SECURITY 0x6327 /* P4M890/PT890 Security Device */ #define PCI_PRODUCT_VIATECH_VX800_SCRATCH 0x6353 /* VX800/VX820 Scratch Registers */ #define PCI_PRODUCT_VIATECH_P4M900_6 0x6364 /* CN896/P4M900 Security Device */ +#define PCI_PRODUCT_VIATECH_VX855_SCRATCH 0x6409 /* VX855 Scratch Registers */ #define PCI_PRODUCT_VIATECH_VX900_SCRATCH 0x6410 /* VX900 Scratch Registers */ #define PCI_PRODUCT_VIATECH_CHROME9_HD 0x7122 /* VX900 Graphics [Chrome9 HD] */ -#define PCI_PRODUCT_VIATECH_VT8378_IG 0x7205 /* VT8378 KM400 UniChrome Integrated Graphics */ +#define PCI_PRODUCT_VIATECH_VT7205_IG 0x7205 /* KM400/KN400/P4M800 UniChrome IGP */ +#define PCI_PRODUCT_VIATECH_K8T890_VLINK 0x7238 /* K8T890 V-Link Control */ +#define PCI_PRODUCT_VIATECH_CN400_VLINK 0x7259 /* CN333/CN400/PM880 V-Link Control */ #define PCI_PRODUCT_VIATECH_KT880_5 0x7269 /* KT880 CPU to PCI Bridge */ +#define PCI_PRODUCT_VIATECH_P4M890_HB_6 0x7327 /* P4M890/PT890 Host Bridge */ +#define PCI_PRODUCT_VIATECH_K8M890CE_HB_7 0x7336 /* K8M890CE Host Bridge */ #define PCI_PRODUCT_VIATECH_VT3351_HB_7351 0x7351 /* VT3351 Host Bridge */ #define PCI_PRODUCT_VIATECH_VX800_1 0x7353 /* VX800/VX820 North-South Module Interface Control */ #define PCI_PRODUCT_VIATECH_P4M900_7 0x7364 /* CN896/P4M900 Host Bridge */ #define PCI_PRODUCT_VIATECH_VT8237S_SATA_RAID 0x7372 /* VT8237S Integrated SATA Controller (RAID mode) */ +#define PCI_PRODUCT_VIATECH_VX855_NSMIC 0x7409 /* VX855 North-South Module Interface Control */ #define PCI_PRODUCT_VIATECH_VX900_2 0x7410 /* VX900 North-South Module Interface Control */ #define PCI_PRODUCT_VIATECH_VT8231 0x8231 /* VT8231 PCI-ISA Bridge */ #define PCI_PRODUCT_VIATECH_VT8231_PWR 0x8235 /* VT8231 Power Management Controller */ @@ -10109,16 +10252,26 @@ #define PCI_PRODUCT_VIATECH_CX700 0x8324 /* CX700 PCI-LPC Bridge */ #define PCI_PRODUCT_VIATECH_VX800 0x8353 /* VX800/VX820 PCI-LPC Bridge */ #define PCI_PRODUCT_VIATECH_VT8371_PPB 0x8391 /* VT8371 (Apollo KX133) PCI-PCI Bridge */ -#define PCI_PRODUCT_VIATECH_VX855 0x8409 /* VX855 PCI-LPC Bridge */ +#define PCI_PRODUCT_VIATECH_VX855 0x8409 /* VX855 Bus Control and Power Management */ #define PCI_PRODUCT_VIATECH_VX900 0x8410 /* VX900 Bus Control and Power Management */ #define PCI_PRODUCT_VIATECH_VT8501AGP 0x8501 /* VT8501 (Apollo MVP4) CPU-AGP Bridge */ #define PCI_PRODUCT_VIATECH_VT82C597AGP 0x8597 /* VT82C597 (Apollo VP3) CPU-AGP Bridge */ #define PCI_PRODUCT_VIATECH_VT82C598AGP 0x8598 /* VT82C598 (Apollo MVP3) CPU-AGP Bridge */ +#define PCI_PRODUCT_VIATECH_VT8601AGP 0x8601 /* VT8601A (Apollo PLE 133) PCI to AGP Bridge */ #define PCI_PRODUCT_VIATECH_VT8605AGP 0x8605 /* VT8605 (Apollo ProMedia 133) Host-AGP Bridge */ -#define PCI_PRODUCT_VIATECH_VX900_IDE 0x9001 /* VX900 IDE Controller */ +#define PCI_PRODUCT_VIATECH_VT8261_SATA 0x9000 /* VT8261 Integrated SATA Controller */ +#define PCI_PRODUCT_VIATECH_VX900_IDE 0x9001 /* VX900/VX11 Integrated SATA Controller */ +#define PCI_PRODUCT_VIATECH_VT8261_RAID 0x9040 /* VT8261 Integrated SATA Controller (RAID mode) */ +#define PCI_PRODUCT_VIATECH_VX900_RAID 0x9041 /* VX900/VX11 Integrated SATA Controller (RAID mode) */ +#define PCI_PRODUCT_VIATECH_VX900_AHCI 0x9082 /* VX900/VX11 Integrated AHCI SATA Controller */ +#define PCI_PRODUCT_VIATECH_VX11_XHCI 0x9201 /* VX11 USB 3.0 xHCI Controller */ +#define PCI_PRODUCT_VIATECH_VX800_SD 0x9530 /* VX800/VX900 SD Card Controller */ +#define PCI_PRODUCT_VIATECH_VX800_SDIO 0x95d0 /* VX800/VX900 SDIO Host Controller */ #define PCI_PRODUCT_VIATECH_K8T890_PPB_A238 0xa238 /* K8T890 PCI-PCI Bridge */ +#define PCI_PRODUCT_VIATECH_P4M890_PPB_A327 0xa327 /* P4M890/PT890 PCI to PCI Bridge */ #define PCI_PRODUCT_VIATECH_VX800_0 0xa353 /* VX8xx/VX900 South-North Module Interface Control */ #define PCI_PRODUCT_VIATECH_P4M900_PPB_1 0xa364 /* CN896/P4M900 PCI-PCI Bridge */ +#define PCI_PRODUCT_VIATECH_VX855_USBD 0xa409 /* VX855 USB Device */ #define PCI_PRODUCT_VIATECH_VX900_PCIE_0 0xa410 /* VX900 PCI Express Root Port 0 */ #define PCI_PRODUCT_VIATECH_VT8633AGP 0xb091 /* VT8633 (Apollo Pro 266) CPU-AGP Bridge */ #define PCI_PRODUCT_VIATECH_VT8366AGP 0xb099 /* VT8366 (Apollo KT266) CPU-AGP Bridge */ @@ -10129,8 +10282,10 @@ #define PCI_PRODUCT_VIATECH_VX900_PCIE_1 0xb410 /* VX900 PCI Express Root Port 1 */ #define PCI_PRODUCT_VIATECH_VT3237_PPB 0xb999 /* K8T890 North / VT8237 South PCI-PCI Bridge */ #define PCI_PRODUCT_VIATECH_K8T890_PPB_C238 0xc238 /* K8T890 PCI-PCI Bridge */ +#define PCI_PRODUCT_VIATECH_P4M890_PPB_C327 0xc327 /* P4M890/PT890 PCI to PCI Bridge */ #define PCI_PRODUCT_VIATECH_VX800_PCIE_G0 0xc353 /* VX800/VX820 PCI Express Root Port G0 */ #define PCI_PRODUCT_VIATECH_P4M900_PPB_2 0xc364 /* CN896/P4M900 PCI-PCI Bridge */ +#define PCI_PRODUCT_VIATECH_VX855_IDE 0xc409 /* VX855/VX875 EIDE Controller */ #define PCI_PRODUCT_VIATECH_VX900_PCIE_2 0xc410 /* VX900 PCI Express Root Port 2 */ #define PCI_PRODUCT_VIATECH_K8T890_PPB_D238 0xd238 /* K8T890 PCI-PCI Bridge */ #define PCI_PRODUCT_VIATECH_VX900_PCIE_3 0xd410 /* VX900 PCI Express Root Port 3 */ diff --git a/lib/libc/include/generic-netbsd/dev/pci/pcidevs_data.h b/lib/libc/include/generic-netbsd/dev/pci/pcidevs_data.h @@ -1,10 +1,10 @@ -/* $NetBSD: pcidevs_data.h,v 1.1451.2.15 2024/12/06 20:18:33 snj Exp $ */ +/* $NetBSD: pcidevs_data.h,v 1.1505.2.3 2025/11/24 17:28:22 martin Exp $ */ /* * THIS FILE IS AUTOMATICALLY GENERATED. DO NOT EDIT. * * generated from: - * NetBSD: pcidevs,v 1.1471.2.14 2024/12/06 20:15:04 snj Exp + * NetBSD: pcidevs,v 1.1527.2.3 2025/11/24 17:27:40 martin Exp */ /* @@ -631,18125 +631,18434 @@ static const uint32_t pci_vendors[] = { PCI_VENDOR_ASMEDIA, 5274, 0, PCI_VENDOR_REDHAT, 5282, 5286, 0, PCI_VENDOR_MARVELL2, 3760, 0, - PCI_VENDOR_FRESCO, 5290, 86, 0, - PCI_VENDOR_QINHENG2, 5297, 5305, 932, 5313, 0, + PCI_VENDOR_ETRON, 5290, 5296, 4427, 0, + PCI_VENDOR_FRESCO, 5308, 86, 0, + PCI_VENDOR_QINHENG2, 5315, 5323, 932, 5331, 0, PCI_VENDOR_SYMPHONY2, 1752, 209, 610, 615, 619, 626, 0, - PCI_VENDOR_HGST, 5320, 4427, 0, - PCI_VENDOR_BEIJING_MEMBLAZE, 5326, 5334, 127, 5343, 5347, 0, - PCI_VENDOR_AMAZON, 5352, 4427, 0, - PCI_VENDOR_ZHAOXIN, 5364, 0, - PCI_VENDOR_AQUANTIA, 5372, 0, - PCI_VENDOR_ROCKCHIP, 5381, 0, + PCI_VENDOR_HGST, 5338, 4427, 0, + PCI_VENDOR_BEIJING_MEMBLAZE, 5344, 5352, 127, 5361, 5365, 0, + PCI_VENDOR_AMAZON, 5370, 4427, 0, + PCI_VENDOR_ZHAOXIN, 5382, 0, + PCI_VENDOR_AQUANTIA, 5390, 0, + PCI_VENDOR_ROCKCHIP, 5399, 0, PCI_VENDOR_TEKRAM2, 2145, 127, 610, 615, 619, 626, 0, - PCI_VENDOR_RASPBERRYPI, 5390, 5400, 5403, 3224, 0, - PCI_VENDOR_AMPERE, 5413, 3305, 0, + PCI_VENDOR_RASPBERRYPI, 5408, 5418, 5421, 3224, 0, + PCI_VENDOR_AMPERE, 5431, 3305, 0, PCI_VENDOR_SUNIX2, 4662, 4745, 0, - PCI_VENDOR_HINT, 5420, 0, - PCI_VENDOR_3DLABS, 5425, 209, 0, + PCI_VENDOR_HINT, 5438, 0, + PCI_VENDOR_3DLABS, 5443, 209, 0, PCI_VENDOR_AVANCE2, 138, 86, 610, 615, 619, 626, 0, - PCI_VENDOR_ADDTRON, 5428, 127, 0, - PCI_VENDOR_NETXEN, 5436, 0, - PCI_VENDOR_QINHENG, 5297, 5305, 932, 0, - PCI_VENDOR_ICOMPRESSION, 4822, 5443, 0, - PCI_VENDOR_INDCOMPSRC, 1688, 47, 5458, 0, - PCI_VENDOR_NETVIN, 5465, 0, - PCI_VENDOR_BUSLOGIC2, 5472, 610, 615, 619, 626, 0, - PCI_VENDOR_MEDIAQ, 5481, 0, - PCI_VENDOR_GUILLEMOT, 5488, 0, - PCI_VENDOR_TURTLE_BEACH, 5498, 5505, 0, - PCI_VENDOR_S3, 5511, 0, + PCI_VENDOR_ADDTRON, 5446, 127, 0, + PCI_VENDOR_NETXEN, 5454, 0, + PCI_VENDOR_QINHENG, 5315, 5323, 932, 0, + PCI_VENDOR_ICOMPRESSION, 4822, 5461, 0, + PCI_VENDOR_INDCOMPSRC, 1688, 47, 5476, 0, + PCI_VENDOR_NETVIN, 5483, 0, + PCI_VENDOR_BUSLOGIC2, 5490, 610, 615, 619, 626, 0, + PCI_VENDOR_MEDIAQ, 5499, 0, + PCI_VENDOR_GUILLEMOT, 5506, 0, + PCI_VENDOR_TURTLE_BEACH, 5516, 5523, 0, + PCI_VENDOR_S3, 5529, 0, PCI_VENDOR_NETPOWER2, 2975, 610, 615, 619, 626, 0, - PCI_VENDOR_XENSOURCE, 5514, 4427, 0, - PCI_VENDOR_C4T, 5525, 5529, 0, - PCI_VENDOR_DCI, 5537, 47, 0, - PCI_VENDOR_KURUSUGAWA, 5546, 932, 0, - PCI_VENDOR_PCHDTV, 5557, 0, - PCI_VENDOR_QUANCOM, 5564, 2331, 5572, 0, - PCI_VENDOR_INTEL, 5577, 0, - PCI_VENDOR_VIRTUALBOX, 5583, 0, + PCI_VENDOR_XENSOURCE, 5532, 4427, 0, + PCI_VENDOR_C4T, 5543, 5547, 0, + PCI_VENDOR_DCI, 5555, 47, 0, + PCI_VENDOR_KURUSUGAWA, 5564, 932, 0, + PCI_VENDOR_PCHDTV, 5575, 0, + PCI_VENDOR_QUANCOM, 5582, 2331, 5590, 0, + PCI_VENDOR_INTEL, 5595, 0, + PCI_VENDOR_VIRTUALBOX, 5601, 0, PCI_VENDOR_TRIGEM2, 1607, 47, 610, 615, 619, 626, 0, - PCI_VENDOR_PROLAN, 5594, 0, - PCI_VENDOR_COMPUTONE, 5601, 0, - PCI_VENDOR_KTI, 5611, 0, - PCI_VENDOR_ADP, 5615, 0, - PCI_VENDOR_ADP2, 5615, 610, 615, 619, 626, 0, - PCI_VENDOR_ATRONICS, 5623, 0, - PCI_VENDOR_NETMOS, 5632, 0, - PCI_VENDOR_PARALLELS, 5639, 0, - PCI_VENDOR_MICRON, 5649, 127, 0, - PCI_VENDOR_CHRYSALIS, 5664, 0, - PCI_VENDOR_MIDDLE_DIGITAL, 5678, 240, 0, + PCI_VENDOR_PROLAN, 5612, 0, + PCI_VENDOR_COMPUTONE, 5619, 0, + PCI_VENDOR_KTI, 5629, 0, + PCI_VENDOR_ADP, 5633, 0, + PCI_VENDOR_ADP2, 5633, 610, 615, 619, 626, 0, + PCI_VENDOR_ATRONICS, 5641, 0, + PCI_VENDOR_NETMOS, 5650, 0, + PCI_VENDOR_PARALLELS, 5657, 0, + PCI_VENDOR_MICRON, 5667, 127, 0, + PCI_VENDOR_CHRYSALIS, 5682, 0, + PCI_VENDOR_MIDDLE_DIGITAL, 5696, 240, 0, PCI_VENDOR_ARC, 1980, 86, 0, - PCI_VENDOR_INVALID, 5685, 5693, 5700, 0, + PCI_VENDOR_INVALID, 5703, 5711, 5718, 0, }; static const uint32_t pci_products[] = { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C985, - 5703, 5709, 5717, 0, + 5721, 5727, 5735, 0, PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C996, - 5726, 5732, 5717, 0, + 5744, 5750, 5735, 0, PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C556MODEM, - 5744, 5750, 5755, 5764, 0, + 5762, 5768, 5773, 5782, 0, PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C940, - 5770, 5709, 5717, 0, + 5788, 5727, 5735, 0, PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C339, - 5776, 5782, 5792, 0, + 5794, 5800, 5810, 0, PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C359, - 5801, 5782, 5792, 5807, 0, + 5819, 5800, 5810, 5825, 0, PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C450TX, - 5810, 5819, 5717, 0, + 5828, 5837, 5735, 0, PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C555, - 5826, 5819, 5755, 5717, 0, + 5844, 5837, 5773, 5735, 0, PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C575TX, - 5832, 5819, 5717, 0, + 5850, 5837, 5735, 0, PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C575BTX, - 5841, 5819, 5717, 0, + 5859, 5837, 5735, 0, PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C575CTX, - 5852, 5819, 5717, 0, + 5870, 5837, 5735, 0, PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C590, - 5863, 5717, 0, + 5881, 5735, 0, PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C595TX, - 5869, 5819, 5717, 0, + 5887, 5837, 5735, 0, PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C595T4, - 5878, 5819, 5717, 0, + 5896, 5837, 5735, 0, PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C595MII, - 5887, 5819, 5717, 0, + 5905, 5837, 5735, 0, PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C154G72, - 5897, 4761, 4540, 5909, 0, + 5915, 4761, 4540, 5927, 0, PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C556, - 5744, 5819, 5755, 5717, 0, + 5762, 5837, 5773, 5735, 0, PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C556B, - 5917, 5819, 5755, 5717, 0, + 5935, 5837, 5773, 5735, 0, PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C656_E, - 5924, 5819, 5717, 0, + 5942, 5837, 5735, 0, PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C656_M, - 5924, 5934, 5764, 0, + 5942, 5952, 5782, 0, PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C656B_E, - 5938, 5819, 5717, 0, + 5956, 5837, 5735, 0, PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C656B_M, - 5938, 5934, 5764, 0, + 5956, 5952, 5782, 0, PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C656C_E, - 5949, 5819, 5717, 0, + 5967, 5837, 5735, 0, PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C656C_M, - 5949, 5934, 5764, 0, + 5967, 5952, 5782, 0, PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CSOHO100TX, - 5960, 5819, 5717, 0, + 5978, 5837, 5735, 0, PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CRWE777A, - 5973, 5983, 0, + 5991, 6001, 0, PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C804, - 5994, 6000, 6009, 0, + 6012, 6018, 6027, 0, PCI_VENDOR_3COM, PCI_PRODUCT_3COM_TOKEN, - 6013, 6019, 0, + 6031, 6037, 0, PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C900TPO, - 6024, 5717, 0, + 6042, 5735, 0, PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C900COMBO, - 6034, 5717, 0, + 6052, 5735, 0, PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C900BTPO, - 6046, 5717, 0, + 6064, 5735, 0, PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C900BCOMBO, - 6057, 5717, 0, + 6075, 5735, 0, PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C900BTPC, - 6070, 5717, 0, + 6088, 5735, 0, PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C905TX, - 6081, 5819, 5717, 0, + 6099, 5837, 5735, 0, PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C905T4, - 6090, 5819, 5717, 0, + 6108, 5837, 5735, 0, PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C905BTX, - 6099, 5819, 5717, 0, + 6117, 5837, 5735, 0, PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C905BT4, - 6109, 5819, 5717, 0, + 6127, 5837, 5735, 0, PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C905BCOMBO, - 6119, 5819, 5717, 0, + 6137, 5837, 5735, 0, PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C905BFX, - 6132, 6142, 5717, 0, + 6150, 6160, 5735, 0, PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C905CTX, - 6146, 5819, 5717, 6156, 6159, 0, + 6164, 5837, 5735, 6174, 6177, 0, PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C905CXTX, - 6165, 5819, 5717, 6156, 6159, 0, + 6183, 5837, 5735, 6174, 6177, 0, PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C920BEMBW, - 6176, 692, 2430, 5717, 0, + 6194, 692, 2430, 5735, 0, PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C910SOHOB, - 6191, 6197, 6211, 5717, 0, + 6209, 6215, 6229, 5735, 0, PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C980SRV, - 6219, 6225, 5909, 5819, 5717, 0, + 6237, 6243, 5927, 5837, 5735, 0, PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C980CTXM, - 6232, 5819, 5717, 0, + 6250, 5837, 5735, 0, PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CR990, - 6243, 5819, 5717, 6156, 6252, 0, + 6261, 5837, 5735, 6174, 6270, 0, PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CR990TX95, - 6256, 5819, 5717, 6156, 6252, 0, + 6274, 5837, 5735, 6174, 6270, 0, PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CR990TX97, - 6269, 5819, 5717, 6156, 6252, 0, + 6287, 5837, 5735, 6174, 6270, 0, PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C990B, - 6282, 5819, 5717, 6156, 6252, 0, + 6300, 5837, 5735, 6174, 6270, 0, PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CR990FX, - 6289, 6142, 5717, 6156, 6252, 0, + 6307, 6160, 5735, 6174, 6270, 0, PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CR990SVR95, - 6299, 5819, 5717, 6156, 6252, 0, + 6317, 5837, 5735, 6174, 6270, 0, PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CR990SVR97, - 6313, 5819, 5717, 6156, 6252, 0, + 6331, 5837, 5735, 6174, 6270, 0, PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C990BSVR, - 6327, 5819, 5717, 6156, 6252, 0, + 6345, 5837, 5735, 6174, 6270, 0, PCI_VENDOR_3DFX, PCI_PRODUCT_3DFX_VOODOO, - 6337, 0, + 6355, 0, PCI_VENDOR_3DFX, PCI_PRODUCT_3DFX_VOODOO2, - 6344, 0, + 6362, 0, PCI_VENDOR_3DFX, PCI_PRODUCT_3DFX_BANSHEE, - 6352, 0, + 6370, 0, PCI_VENDOR_3DFX, PCI_PRODUCT_3DFX_VOODOO3, - 6360, 0, + 6378, 0, PCI_VENDOR_3DFX, PCI_PRODUCT_3DFX_VOODOO5, - 6337, 6368, 0, + 6355, 6386, 0, PCI_VENDOR_3DLABS, PCI_PRODUCT_3DLABS_300SX, - 6372, 6378, 0, + 6390, 6396, 0, PCI_VENDOR_3DLABS, PCI_PRODUCT_3DLABS_500TX, - 6372, 6384, 0, + 6390, 6402, 0, PCI_VENDOR_3DLABS, PCI_PRODUCT_3DLABS_DELTA, - 6372, 6390, 0, + 6390, 6408, 0, PCI_VENDOR_3DLABS, PCI_PRODUCT_3DLABS_PERMEDIA, - 6372, 6396, 0, + 6390, 6414, 0, PCI_VENDOR_3DLABS, PCI_PRODUCT_3DLABS_500MX, - 6372, 6405, 0, + 6390, 6423, 0, PCI_VENDOR_3DLABS, PCI_PRODUCT_3DLABS_PERMEDIA2, - 6372, 6396, 6411, 0, + 6390, 6414, 6429, 0, PCI_VENDOR_3DLABS, PCI_PRODUCT_3DLABS_GAMMA, - 6372, 6413, 0, + 6390, 6431, 0, PCI_VENDOR_3DLABS, PCI_PRODUCT_3DLABS_PERMEDIA2V, - 6372, 6396, 6419, 0, + 6390, 6414, 6437, 0, PCI_VENDOR_3DLABS, PCI_PRODUCT_3DLABS_PERMEDIA3, - 6372, 6396, 6422, 0, + 6390, 6414, 6440, 0, PCI_VENDOR_3DLABS, PCI_PRODUCT_3DLABS_WILDCAT5110, - 6424, 6432, 0, + 6442, 6450, 0, PCI_VENDOR_3WARE, PCI_PRODUCT_3WARE_ESCALADE, - 6437, 6446, 6450, 6455, 0, + 6455, 6464, 6468, 6473, 0, PCI_VENDOR_3WARE, PCI_PRODUCT_3WARE_ESCALADE_ASIC, - 6437, 6446, 6450, 6466, 6476, 6455, 0, + 6455, 6464, 6468, 6484, 6494, 6473, 0, PCI_VENDOR_3WARE, PCI_PRODUCT_3WARE_9000, - 6483, 6476, 6450, 0, + 6501, 6494, 6468, 0, PCI_VENDOR_3WARE, PCI_PRODUCT_3WARE_9550, - 6488, 6476, 6450, 0, + 6506, 6494, 6468, 0, PCI_VENDOR_3WARE, PCI_PRODUCT_3WARE_9650, - 6493, 6476, 6450, 0, + 6511, 6494, 6468, 0, PCI_VENDOR_3WARE, PCI_PRODUCT_3WARE_9690, - 6498, 6476, 6450, 0, + 6516, 6494, 6468, 0, PCI_VENDOR_3WARE, PCI_PRODUCT_3WARE_9750, - 6503, 6476, 6450, 0, + 6521, 6494, 6468, 0, PCI_VENDOR_ABOCOM, PCI_PRODUCT_ABOCOM_FE2500, - 6508, 5819, 5717, 0, + 6526, 5837, 5735, 0, PCI_VENDOR_ABOCOM, PCI_PRODUCT_ABOCOM_PCM200, - 6515, 5819, 5717, 0, + 6533, 5837, 5735, 0, PCI_VENDOR_ABOCOM, PCI_PRODUCT_ABOCOM_FE2000VX, - 6522, 5819, 5717, 6531, 0, + 6540, 5837, 5735, 6549, 0, PCI_VENDOR_ABOCOM, PCI_PRODUCT_ABOCOM_FE2500MX, - 6537, 5819, 5717, 0, + 6555, 5837, 5735, 0, PCI_VENDOR_ACC, PCI_PRODUCT_ACC_2188, - 6546, 6551, 6556, 6563, 0, + 6564, 6569, 6574, 6581, 0, PCI_VENDOR_ACC, PCI_PRODUCT_ACC_2051_HB, - 6570, 615, 6575, 4575, 6582, 6591, 6597, 0, + 6588, 615, 6593, 4575, 6600, 6609, 6615, 0, PCI_VENDOR_ACC, PCI_PRODUCT_ACC_2051_ISA, - 6570, 615, 6575, 4575, 6582, 6605, 6597, 0, + 6588, 615, 6593, 4575, 6600, 6623, 6615, 0, PCI_VENDOR_ACARD, PCI_PRODUCT_ACARD_ATP850U, - 6610, 6621, 6626, 6455, 0, + 6628, 6639, 6644, 6473, 0, PCI_VENDOR_ACARD, PCI_PRODUCT_ACARD_ATP860, - 6630, 6621, 6626, 6455, 0, + 6648, 6639, 6644, 6473, 0, PCI_VENDOR_ACARD, PCI_PRODUCT_ACARD_ATP860A, - 6637, 6621, 6626, 6455, 0, + 6655, 6639, 6644, 6473, 0, PCI_VENDOR_ACARD, PCI_PRODUCT_ACARD_ATP865, - 6646, 6621, 6626, 6455, 0, + 6664, 6639, 6644, 6473, 0, PCI_VENDOR_ACARD, PCI_PRODUCT_ACARD_ATP865A, - 6653, 6621, 6626, 6455, 0, + 6671, 6639, 6644, 6473, 0, PCI_VENDOR_ACARD, PCI_PRODUCT_ACARD_AEC6710, - 6662, 6670, 0, + 6680, 6688, 0, PCI_VENDOR_ACARD, PCI_PRODUCT_ACARD_AEC6712UW, - 6675, 6670, 0, + 6693, 6688, 0, PCI_VENDOR_ACARD, PCI_PRODUCT_ACARD_AEC6712U, - 6685, 6670, 0, + 6703, 6688, 0, PCI_VENDOR_ACARD, PCI_PRODUCT_ACARD_AEC6712S, - 6694, 6670, 0, + 6712, 6688, 0, PCI_VENDOR_ACARD, PCI_PRODUCT_ACARD_AEC6710D, - 6703, 6670, 0, + 6721, 6688, 0, PCI_VENDOR_ACARD, PCI_PRODUCT_ACARD_AEC6715UW, - 6712, 6670, 0, + 6730, 6688, 0, PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_MPX5030, - 6722, 6726, 5717, 0, + 6740, 6744, 5735, 0, PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_EN2242, - 6736, 5819, 5717, 0, + 6754, 5837, 5735, 0, PCI_VENDOR_ACER, PCI_PRODUCT_ACER_M1435, - 6743, 6556, 6563, 0, + 6761, 6574, 6581, 0, PCI_VENDOR_ADVANTECH, PCI_PRODUCT_ADVANTECH_PCI1600, - 6749, 6761, 0, + 6767, 6779, 0, PCI_VENDOR_ADVANTECH, PCI_PRODUCT_ADVANTECH_PCI1604, - 6768, 6761, 0, + 6786, 6779, 0, PCI_VENDOR_ADVANTECH, PCI_PRODUCT_ADVANTECH_PCI1610, - 6777, 6786, 6788, 6761, 0, + 6795, 6804, 6806, 6779, 0, PCI_VENDOR_ADVANTECH, PCI_PRODUCT_ADVANTECH_PCI1612, - 6793, 6786, 6788, 6761, 0, + 6811, 6804, 6806, 6779, 0, PCI_VENDOR_ADVANTECH, PCI_PRODUCT_ADVANTECH_PCI1620, - 6802, 6811, 6788, 6761, 6813, 0, + 6820, 6829, 6806, 6779, 6831, 0, PCI_VENDOR_ADVANTECH, PCI_PRODUCT_ADVANTECH_PCI1620_1, - 6802, 6811, 6788, 6761, 6819, 0, + 6820, 6829, 6806, 6779, 6837, 0, PCI_VENDOR_ALI, PCI_PRODUCT_ALI_M1445, - 6825, 6556, 6563, 0, + 6843, 6574, 6581, 0, PCI_VENDOR_ALI, PCI_PRODUCT_ALI_M1449, - 6831, 6837, 6563, 0, + 6849, 6855, 6581, 0, PCI_VENDOR_ALI, PCI_PRODUCT_ALI_M1451, - 6845, 6851, 6563, 0, + 6863, 6869, 6581, 0, PCI_VENDOR_ALI, PCI_PRODUCT_ALI_M1461, - 6860, 6851, 6563, 0, + 6878, 6869, 6581, 0, PCI_VENDOR_ALI, PCI_PRODUCT_ALI_M1531, - 6866, 6851, 6563, 0, + 6884, 6869, 6581, 0, PCI_VENDOR_ALI, PCI_PRODUCT_ALI_M1533, - 6872, 6837, 6563, 0, + 6890, 6855, 6581, 0, PCI_VENDOR_ALI, PCI_PRODUCT_ALI_M1541, - 6878, 6851, 6563, 0, + 6896, 6869, 6581, 0, PCI_VENDOR_ALI, PCI_PRODUCT_ALI_M1543, - 6884, 6837, 6563, 0, + 6902, 6855, 6581, 0, PCI_VENDOR_ALI, PCI_PRODUCT_ALI_M1563, - 6890, 6837, 6563, 0, + 6908, 6855, 6581, 0, PCI_VENDOR_ALI, PCI_PRODUCT_ALI_M1647, - 6896, 6851, 6563, 0, + 6914, 6869, 6581, 0, PCI_VENDOR_ALI, PCI_PRODUCT_ALI_M1689, - 6902, 6851, 6563, 0, + 6920, 6869, 6581, 0, PCI_VENDOR_ALI, PCI_PRODUCT_ALI_M3309, - 6908, 6914, 6919, 0, + 6926, 6932, 6937, 0, PCI_VENDOR_ALI, PCI_PRODUCT_ALI_M4803, - 6927, 0, + 6945, 0, PCI_VENDOR_ALI, PCI_PRODUCT_ALI_M5229, - 6933, 6621, 6626, 6455, 0, + 6951, 6639, 6644, 6473, 0, PCI_VENDOR_ALI, PCI_PRODUCT_ALI_M5237, - 6939, 6945, 6949, 6953, 6455, 0, + 6957, 6963, 6967, 6971, 6473, 0, PCI_VENDOR_ALI, PCI_PRODUCT_ALI_M5239, - 6958, 6945, 6964, 6953, 6455, 0, + 6976, 6963, 6982, 6971, 6473, 0, PCI_VENDOR_ALI, PCI_PRODUCT_ALI_M5243, - 6968, 6974, 6563, 0, + 6986, 6992, 6581, 0, PCI_VENDOR_ALI, PCI_PRODUCT_ALI_M5247, - 6982, 6974, 6563, 0, + 7000, 6992, 6581, 0, PCI_VENDOR_ALI, PCI_PRODUCT_ALI_M5249, - 6988, 6994, 7009, 615, 6563, 0, + 7006, 7012, 7027, 615, 6581, 0, PCI_VENDOR_ALI, PCI_PRODUCT_ALI_M5257, - 7012, 615, 321, 5764, 0, + 7030, 615, 321, 5782, 0, PCI_VENDOR_ALI, PCI_PRODUCT_ALI_M5261, - 7018, 1386, 5717, 6455, 0, + 7036, 1386, 5735, 6473, 0, PCI_VENDOR_ALI, PCI_PRODUCT_ALI_M5288, - 7024, 7030, 6455, 0, + 7042, 7048, 6473, 0, PCI_VENDOR_ALI, PCI_PRODUCT_ALI_M5451, - 7040, 7046, 6455, 7054, 2418, 0, + 7058, 7064, 6473, 7072, 2418, 0, PCI_VENDOR_ALI, PCI_PRODUCT_ALI_M5453, - 7060, 7046, 6455, 5764, 2418, 0, + 7078, 7064, 6473, 5782, 2418, 0, PCI_VENDOR_ALI, PCI_PRODUCT_ALI_M5455, - 7066, 7046, 6455, 7054, 2418, 0, + 7084, 7064, 6473, 7072, 2418, 0, PCI_VENDOR_ALI, PCI_PRODUCT_ALI_M7101, - 7072, 3740, 7078, 6455, 0, + 7090, 3740, 7096, 6473, 0, PCI_VENDOR_ADP, PCI_PRODUCT_ADP_AIC1160, - 7089, 0, + 7107, 0, PCI_VENDOR_ADP, PCI_PRODUCT_ADP_AIC7850, - 7098, 0, + 7116, 0, PCI_VENDOR_ADP, PCI_PRODUCT_ADP_AIC7855, - 7107, 0, + 7125, 0, PCI_VENDOR_ADP, PCI_PRODUCT_ADP_AIC5900, - 7116, 7125, 0, + 7134, 7143, 0, PCI_VENDOR_ADP, PCI_PRODUCT_ADP_AIC5905, - 7129, 7125, 0, + 7147, 7143, 0, PCI_VENDOR_ADP, PCI_PRODUCT_ADP_APA1480, - 7138, 7147, 0, + 7156, 7165, 0, PCI_VENDOR_ADP, PCI_PRODUCT_ADP_AIC7860, - 7153, 0, + 7171, 0, PCI_VENDOR_ADP, PCI_PRODUCT_ADP_2940AU, - 7162, 7147, 0, + 7180, 7165, 0, PCI_VENDOR_ADP, PCI_PRODUCT_ADP_AIC6915, - 7172, 5819, 5717, 0, + 7190, 5837, 5735, 0, PCI_VENDOR_ADP, PCI_PRODUCT_ADP_AIC7870, - 7181, 0, + 7199, 0, PCI_VENDOR_ADP, PCI_PRODUCT_ADP_2940, - 7190, 0, + 7208, 0, PCI_VENDOR_ADP, PCI_PRODUCT_ADP_3940, - 7199, 0, + 7217, 0, PCI_VENDOR_ADP, PCI_PRODUCT_ADP_3985, - 7208, 0, + 7226, 0, PCI_VENDOR_ADP, PCI_PRODUCT_ADP_2944, - 7217, 0, + 7235, 0, PCI_VENDOR_ADP, PCI_PRODUCT_ADP_AIC7895, - 7226, 7147, 0, + 7244, 7165, 0, PCI_VENDOR_ADP, PCI_PRODUCT_ADP_AIC7880, - 7235, 7147, 0, + 7253, 7165, 0, PCI_VENDOR_ADP, PCI_PRODUCT_ADP_2940U, - 7190, 7147, 0, + 7208, 7165, 0, PCI_VENDOR_ADP, PCI_PRODUCT_ADP_3940U, - 7199, 7147, 0, + 7217, 7165, 0, PCI_VENDOR_ADP, PCI_PRODUCT_ADP_389XU, - 7244, 7147, 0, + 7262, 7165, 0, PCI_VENDOR_ADP, PCI_PRODUCT_ADP_2944U, - 7217, 7147, 0, + 7235, 7165, 0, PCI_VENDOR_ADP, PCI_PRODUCT_ADP_2940UP, - 7190, 7147, 7253, 0, + 7208, 7165, 7271, 0, PCI_VENDOR_ADP2, PCI_PRODUCT_ADP2_2940U2, - 7257, 7268, 0, + 7275, 7286, 0, PCI_VENDOR_ADP2, PCI_PRODUCT_ADP2_2930U2, - 7271, 7268, 0, + 7289, 7286, 0, PCI_VENDOR_ADP2, PCI_PRODUCT_ADP2_AIC7890, - 7282, 7268, 0, + 7300, 7286, 0, PCI_VENDOR_ADP2, PCI_PRODUCT_ADP2_3950U2B, - 7293, 7268, 0, + 7311, 7286, 0, PCI_VENDOR_ADP2, PCI_PRODUCT_ADP2_3950U2D, - 7305, 7268, 0, + 7323, 7286, 0, PCI_VENDOR_ADP2, PCI_PRODUCT_ADP2_AIC7896, - 7317, 7268, 0, + 7335, 7286, 0, PCI_VENDOR_ADP2, PCI_PRODUCT_ADP2_AIC7892A, - 7328, 7338, 0, + 7346, 7356, 0, PCI_VENDOR_ADP2, PCI_PRODUCT_ADP2_AIC7892B, - 7343, 7338, 0, + 7361, 7356, 0, PCI_VENDOR_ADP2, PCI_PRODUCT_ADP2_AIC7892D, - 7353, 7338, 0, + 7371, 7356, 0, PCI_VENDOR_ADP2, PCI_PRODUCT_ADP2_AIC7892P, - 7363, 7338, 0, + 7381, 7356, 0, PCI_VENDOR_ADP2, PCI_PRODUCT_ADP2_AIC7899A, - 7373, 7338, 0, + 7391, 7356, 0, PCI_VENDOR_ADP2, PCI_PRODUCT_ADP2_AIC7899B, - 7383, 7338, 0, + 7401, 7356, 0, PCI_VENDOR_ADP2, PCI_PRODUCT_ADP2_AIC7899D, - 7393, 7338, 0, + 7411, 7356, 0, PCI_VENDOR_ADP2, PCI_PRODUCT_ADP2_AIC7899F, - 7403, 6450, 0, + 7421, 6468, 0, PCI_VENDOR_ADP2, PCI_PRODUCT_ADP2_AIC7899P, - 7413, 7338, 0, + 7431, 7356, 0, PCI_VENDOR_ADP2, PCI_PRODUCT_ADP2_1420SA, - 6450, 7423, 0, + 6468, 7441, 0, PCI_VENDOR_ADP2, PCI_PRODUCT_ADP2_1430SA, - 6450, 7430, 0, + 6468, 7448, 0, PCI_VENDOR_ADP2, PCI_PRODUCT_ADP2_SERVERAID, - 7437, 7447, 7451, 0, + 7455, 7465, 7469, 0, PCI_VENDOR_ADP2, PCI_PRODUCT_ADP2_AAC2622, - 7459, 0, + 7477, 0, PCI_VENDOR_ADP2, PCI_PRODUCT_ADP2_ASR2200S, - 7468, 0, + 7486, 0, PCI_VENDOR_ADP2, PCI_PRODUCT_ADP2_ASR2120S, - 7478, 0, + 7496, 0, PCI_VENDOR_ADP2, PCI_PRODUCT_ADP2_ASR2200S_SUB2M, - 7468, 0, + 7486, 0, PCI_VENDOR_ADP2, PCI_PRODUCT_ADP2_ASR2410SA, - 7488, 0, + 7506, 0, PCI_VENDOR_ADP2, PCI_PRODUCT_ADP2_AAR2810SA, - 7499, 0, + 7517, 0, + PCI_VENDOR_ADP2, PCI_PRODUCT_ADP2_5445, + 6468, 7528, 0, + PCI_VENDOR_ADP2, PCI_PRODUCT_ADP2_5805, + 6468, 7533, 0, + PCI_VENDOR_ADP2, PCI_PRODUCT_ADP2_5085, + 6468, 7538, 0, PCI_VENDOR_ADP2, PCI_PRODUCT_ADP2_3405, - 6450, 7510, 0, + 6468, 7543, 0, PCI_VENDOR_ADP2, PCI_PRODUCT_ADP2_3805, - 6450, 7515, 0, + 6468, 7548, 0, PCI_VENDOR_ADP2, PCI_PRODUCT_ADP2_2405, - 6450, 7520, 0, + 6468, 7553, 0, PCI_VENDOR_ADP2, PCI_PRODUCT_ADP2_2445, - 6450, 7525, 0, + 6468, 7558, 0, PCI_VENDOR_ADP2, PCI_PRODUCT_ADP2_2805, - 6450, 7530, 0, + 6468, 7563, 0, PCI_VENDOR_ADP2, PCI_PRODUCT_ADP2_AAC364, - 7535, 0, + 7568, 0, PCI_VENDOR_ADP2, PCI_PRODUCT_ADP2_ASR5400S, - 7543, 0, + 7576, 0, PCI_VENDOR_ADP2, PCI_PRODUCT_ADP2_PERC_2QC, - 500, 7553, 7558, 0, + 500, 7586, 7591, 0, PCI_VENDOR_ADP2, PCI_PRODUCT_ADP2_PERC_3QC, - 500, 7553, 7563, 0, + 500, 7586, 7596, 0, PCI_VENDOR_ADP2, PCI_PRODUCT_ADP2_HP_M110_G2, - 7568, 7571, 7576, 2173, 7579, 0, + 7601, 7604, 7609, 2173, 7612, 0, PCI_VENDOR_ADDTRON, PCI_PRODUCT_ADDTRON_RHINEII, - 7590, 7596, 5819, 5717, 0, + 7623, 7629, 5837, 5735, 0, PCI_VENDOR_ADDTRON, PCI_PRODUCT_ADDTRON_8139, - 7599, 5717, 0, + 7632, 5735, 0, PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AL981, - 7604, 7610, 5819, 5717, 0, + 7637, 7643, 5837, 5735, 0, PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AN983, - 7618, 7624, 5819, 5717, 0, + 7651, 7657, 5837, 5735, 0, PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AN985, - 7636, 7642, 5819, 5717, 0, + 7669, 7675, 5837, 5735, 0, PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_ADM5120, - 7654, 7663, 615, 6953, 6563, 0, + 7687, 7696, 615, 6971, 6581, 0, PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_ADM8211, - 7671, 7679, 7686, 7694, 0, + 7704, 7712, 7719, 7727, 0, PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_ADM9511, - 7699, 7707, 5819, 5717, 0, + 7732, 7740, 5837, 5735, 0, PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_ADM9513, - 7720, 7707, 5819, 5717, 0, + 7753, 7740, 5837, 5735, 0, PCI_VENDOR_ADVSYS, PCI_PRODUCT_ADVSYS_1200A, 0, PCI_VENDOR_ADVSYS, PCI_PRODUCT_ADVSYS_1200B, 0, PCI_VENDOR_ADVSYS, PCI_PRODUCT_ADVSYS_ULTRA, - 7728, 0, + 7761, 0, PCI_VENDOR_ADVSYS, PCI_PRODUCT_ADVSYS_WIDE, - 7741, 0, + 7774, 0, PCI_VENDOR_ADVSYS, PCI_PRODUCT_ADVSYS_U2W, - 7751, 0, + 7784, 0, PCI_VENDOR_ADVSYS, PCI_PRODUCT_ADVSYS_U3W, - 7763, 0, + 7796, 0, PCI_VENDOR_AGILENT, PCI_PRODUCT_AGILENT_TACHYON_DX2, - 7775, 7783, 7787, 6455, 0, + 7808, 7816, 7820, 6473, 0, PCI_VENDOR_AIRONET, PCI_PRODUCT_AIRONET_PC4xxx, - 7790, 4761, 4540, 5909, 0, + 7823, 4761, 4540, 5927, 0, PCI_VENDOR_AIRONET, PCI_PRODUCT_AIRONET_PCI350, - 7804, 4761, 4540, 5909, 0, + 7837, 4761, 4540, 5927, 0, PCI_VENDOR_AIRONET, PCI_PRODUCT_AIRONET_PC4500, - 7811, 4761, 4540, 5909, 0, + 7844, 4761, 4540, 5927, 0, PCI_VENDOR_AIRONET, PCI_PRODUCT_AIRONET_PC4800, - 7818, 4761, 4540, 5909, 0, + 7851, 4761, 4540, 5927, 0, PCI_VENDOR_AIRONET, PCI_PRODUCT_AIRONET_MPI350, - 7825, 5755, 4761, 4540, 5909, 0, + 7858, 5773, 4761, 4540, 5927, 0, PCI_VENDOR_ALACRITECH, PCI_PRODUCT_ALACRITECH_SES1001T, - 7832, 7841, 7847, 0, + 7865, 7874, 7880, 0, PCI_VENDOR_ALLIANCE, PCI_PRODUCT_ALLIANCE_AT24, - 7859, 0, + 7892, 0, PCI_VENDOR_ALLIANCE, PCI_PRODUCT_ALLIANCE_AT25, - 7864, 0, + 7897, 0, PCI_VENDOR_ALTEON, PCI_PRODUCT_ALTEON_ACENIC, - 7869, 7876, 5717, 0, + 7902, 7909, 5735, 0, PCI_VENDOR_ALTEON, PCI_PRODUCT_ALTEON_ACENIC_COPPER, - 7869, 7887, 5717, 0, + 7902, 7920, 5735, 0, PCI_VENDOR_ALTEON, PCI_PRODUCT_ALTEON_BCM5700, - 7869, 7897, 5732, 5717, 0, + 7902, 7930, 5750, 5735, 0, PCI_VENDOR_ALTEON, PCI_PRODUCT_ALTEON_BCM5701, - 7869, 7905, 5732, 5717, 0, + 7902, 7938, 5750, 5735, 0, PCI_VENDOR_ALTERA, PCI_PRODUCT_ALTERA_EP4CGX15BF14C8N, - 7913, 0, + 7946, 0, PCI_VENDOR_ALTIMA, PCI_PRODUCT_ALTIMA_AC1000, - 7929, 5709, 5717, 0, + 7962, 5727, 5735, 0, PCI_VENDOR_ALTIMA, PCI_PRODUCT_ALTIMA_AC1001, - 7936, 5709, 5717, 0, + 7969, 5727, 5735, 0, PCI_VENDOR_ALTIMA, PCI_PRODUCT_ALTIMA_AC9100, - 7943, 5709, 5717, 0, + 7976, 5727, 5735, 0, PCI_VENDOR_ALTIMA, PCI_PRODUCT_ALTIMA_AC1003, - 7950, 5709, 5717, 0, + 7983, 5727, 5735, 0, PCI_VENDOR_AMAZON, PCI_PRODUCT_AMAZON_NVME, - 7957, 7962, 0, + 7990, 7995, 0, PCI_VENDOR_AMAZON, PCI_PRODUCT_AMAZON_UART, - 7966, 7983, 0, + 7999, 8016, 0, PCI_VENDOR_AMAZON, PCI_PRODUCT_AMAZON_ENA, - 7988, 3879, 5909, 0, + 8021, 3879, 5927, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_AMD64_HT, - 7996, 7999, 8005, 8020, 0, + 8029, 8032, 8038, 8053, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_AMD64_ADDR, - 7996, 7999, 8034, 8042, 8020, 0, + 8029, 8032, 8067, 8075, 8053, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_AMD64_DRAM, - 7996, 7999, 8046, 8020, 0, + 8029, 8032, 8079, 8053, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_AMD64_MISC, - 7996, 7999, 8051, 8020, 0, + 8029, 8032, 8084, 8053, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_AMD64_F10_HT, - 7999, 8065, 8005, 8020, 0, + 8032, 8098, 8038, 8053, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_AMD64_F10_ADDR, - 7999, 8065, 8034, 8042, 8020, 0, + 8032, 8098, 8067, 8075, 8053, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_AMD64_F10_DRAM, - 7999, 8065, 8046, 8020, 0, + 8032, 8098, 8079, 8053, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_AMD64_F10_MISC, - 7999, 8065, 8051, 8020, 0, + 8032, 8098, 8084, 8053, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_AMD64_F10_LINK, - 7999, 8065, 8075, 8020, 0, + 8032, 8098, 8108, 8053, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F1A_0X_DF_0, - 8080, 490, 8088, 0, + 8113, 490, 8121, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F1A_0X_DF_1, - 8080, 490, 8088, 0, + 8113, 490, 8121, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F1A_0X_DF_2, - 8080, 490, 8088, 0, + 8113, 490, 8121, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F1A_0X_DF_3, - 8080, 490, 8088, 0, + 8113, 490, 8121, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F1A_0X_DF_4, - 8080, 490, 8088, 0, + 8113, 490, 8121, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F1A_0X_DF_5, - 8080, 490, 8088, 0, + 8113, 490, 8121, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F1A_0X_DF_6, - 8080, 490, 8088, 0, + 8113, 490, 8121, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F1A_0X_DF_7, - 8080, 490, 8088, 0, + 8113, 490, 8121, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_AMD64_F11_HT, - 7999, 8095, 8005, 8020, 0, + 8032, 8128, 8038, 8053, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_AMD64_F11_ADDR, - 7999, 8095, 8034, 8042, 8020, 0, + 8032, 8128, 8067, 8075, 8053, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_AMD64_F11_DRAM, - 7999, 8095, 8046, 8020, 0, + 8032, 8128, 8079, 8053, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_AMD64_F11_MISC, - 7999, 8095, 8051, 8020, 0, + 8032, 8128, 8084, 8053, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_AMD64_F11_LINK, - 7999, 8095, 8075, 8020, 0, + 8032, 8128, 8108, 8053, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F15_10_PF_0, - 8105, 8115, 8125, 8134, 0, + 8138, 8148, 8158, 8167, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F15_10_PF_1, - 8105, 8115, 8125, 8136, 0, + 8138, 8148, 8158, 8169, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F15_10_PF_2, - 8105, 8115, 8125, 6411, 0, + 8138, 8148, 8158, 6429, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F15_10_PF_3, - 8105, 8115, 8125, 6422, 0, + 8138, 8148, 8158, 6440, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F15_10_PF_4, - 8105, 8115, 8125, 6786, 0, + 8138, 8148, 8158, 6804, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F15_10_PF_5, - 8105, 8115, 8125, 8138, 0, + 8138, 8148, 8158, 8171, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F15_10_RC, - 8105, 8140, 8145, 0, + 8138, 8173, 8178, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F15_10_RP_2, - 8105, 8140, 8153, 0, + 8138, 8173, 8186, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F15_10_RP_3, - 8105, 8140, 8153, 0, + 8138, 8173, 8186, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F15_10_RP_4, - 8105, 8140, 8153, 0, + 8138, 8173, 8186, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F15_10_RP_5, - 8105, 8140, 8153, 0, + 8138, 8173, 8186, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F15_10_RP_6, - 8105, 8140, 8153, 0, + 8138, 8173, 8186, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F15_10_RP_7, - 8105, 8140, 8153, 0, + 8138, 8173, 8186, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F15_10_RP_8, - 8105, 8140, 8153, 0, + 8138, 8173, 8186, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F15_10_IOMMU, - 8105, 8158, 0, + 8138, 8191, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F15_30_PF_0, - 8105, 8115, 8125, 8134, 0, + 8138, 8148, 8158, 8167, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F15_30_PF_1, - 8105, 8115, 8125, 8136, 0, + 8138, 8148, 8158, 8169, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F15_30_PF_2, - 8105, 8115, 8125, 6411, 0, + 8138, 8148, 8158, 6429, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F15_30_PF_3, - 8105, 8115, 8125, 6422, 0, + 8138, 8148, 8158, 6440, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F15_30_PF_4, - 8105, 8115, 8125, 6786, 0, + 8138, 8148, 8158, 6804, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F15_30_PF_5, - 8105, 8115, 8125, 8138, 0, + 8138, 8148, 8158, 8171, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F15_30_RC, - 8105, 8140, 8145, 0, + 8138, 8173, 8178, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F15_30_IOMMU, - 8105, 8158, 0, + 8138, 8191, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F15_30_HB, - 8105, 6953, 6563, 0, + 8138, 6971, 6581, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F15_30_RP_5, - 8105, 8140, 8153, 0, + 8138, 8173, 8186, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F15_30_RP_6, - 8105, 8140, 8153, 0, + 8138, 8173, 8186, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F16_GPPB, - 8164, 8174, 6563, 0, + 8197, 8207, 6581, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_7X_DF_1, - 8178, 490, 8088, 0, + 8211, 490, 8121, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_7X_DF_2, - 8178, 490, 8088, 0, + 8211, 490, 8121, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_7X_DF_3, - 8178, 490, 8088, 0, + 8211, 490, 8121, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_7X_DF_4, - 8178, 490, 8088, 0, + 8211, 490, 8121, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_7X_DF_5, - 8178, 490, 8088, 0, + 8211, 490, 8121, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_7X_DF_6, - 8178, 490, 8088, 0, + 8211, 490, 8121, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_7X_DF_7, - 8178, 490, 8088, 0, + 8211, 490, 8121, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_7X_DF_8, - 8178, 490, 8088, 0, + 8211, 490, 8121, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_6X_DF_0, - 8186, 490, 8088, 0, + 8219, 490, 8121, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_6X_DF_1, - 8186, 490, 8088, 0, + 8219, 490, 8121, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_6X_DF_2, - 8186, 490, 8088, 0, + 8219, 490, 8121, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_6X_DF_3, - 8186, 490, 8088, 0, + 8219, 490, 8121, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_6X_DF_4, - 8186, 490, 8088, 0, + 8219, 490, 8121, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_6X_DF_5, - 8186, 490, 8088, 0, + 8219, 490, 8121, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_6X_DF_6, - 8186, 490, 8088, 0, + 8219, 490, 8121, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_6X_DF_7, - 8186, 490, 8088, 0, + 8219, 490, 8121, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_RC, - 8194, 8140, 8145, 0, + 8227, 8173, 8178, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_IOMMU, - 8194, 8158, 0, + 8227, 8191, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_PCIE_1, - 8194, 8204, 0, + 8227, 8237, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_PCIE_2, - 8194, 8204, 0, + 8227, 8237, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_PCIE_3, - 8194, 8204, 0, + 8227, 8237, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_AX_PCIE_DUMMY, - 8209, 8204, 8217, 8125, 0, + 8242, 8237, 8250, 8158, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_CCP_1, - 8194, 8223, 0, + 8227, 8256, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_HDA, - 8194, 8230, 7054, 0, + 8227, 8263, 7072, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_PCIE_DUMMY, - 8194, 8204, 8217, 8125, 0, + 8227, 8237, 8250, 8158, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_XHCI, - 8194, 8233, 0, + 8227, 8266, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_XHCI_2, - 8194, 8233, 0, + 8227, 8266, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_DF_1, - 8194, 490, 8088, 0, + 8227, 490, 8121, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_DF_2, - 8194, 490, 8088, 0, + 8227, 490, 8121, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_DF_3, - 8194, 490, 8088, 0, + 8227, 490, 8121, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_DF_4, - 8194, 490, 8088, 0, + 8227, 490, 8121, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_DF_5, - 8194, 490, 8088, 0, + 8227, 490, 8121, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_DF_6, - 8194, 490, 8088, 0, + 8227, 490, 8121, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_DF_7, - 8194, 490, 8088, 0, + 8227, 490, 8121, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_DF_8, - 8194, 490, 8088, 0, + 8227, 490, 8121, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_CCP_2, - 8194, 8223, 0, + 8227, 8256, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_PCIE_4, - 8194, 8204, 0, + 8227, 8237, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_PCIE_5, - 8194, 8204, 0, + 8227, 8237, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_7X_RC, - 8238, 8140, 8145, 0, + 8271, 8173, 8178, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_7X_IOMMU, - 8238, 8158, 0, + 8271, 8191, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_7X_HB, - 8178, 6953, 6563, 0, + 8211, 6971, 6581, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_7X_PCIE_1, - 8178, 8204, 0, + 8211, 8237, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_7X_PCIE_2, - 8178, 8204, 0, + 8211, 8237, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_7X_RESV_SPP, - 8238, 8252, 8261, 0, + 8271, 8285, 8294, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_7X_CCP, - 8238, 8223, 0, + 8271, 8256, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_3X_HDA, - 8178, 8230, 7054, 0, + 8211, 8263, 7072, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_7X_USB3, - 8238, 6945, 8265, 6953, 6455, 0, + 8271, 6963, 8298, 6971, 6473, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F19_1X_IOMMU, - 8269, 8158, 0, + 8302, 8191, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F19_1X_PCIE_DUMMY_HB, - 8269, 8204, 8217, 6953, 6563, 0, + 8302, 8237, 8250, 6971, 6581, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F19_1X_RC, - 8277, 8140, 8145, 0, + 8310, 8173, 8178, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F19_1X_GPPB_0, - 8277, 8204, 8174, 6563, 0, + 8310, 8237, 8207, 6581, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F19_1X_RCEC, - 8277, 8285, 0, + 8310, 8318, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F19_1X_INTNL_GPPB, - 8277, 8290, 8204, 8174, 6563, 0, + 8310, 8323, 8237, 8207, 6581, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F19_1X_GPPB_1, - 8277, 8204, 8174, 6563, 0, + 8310, 8237, 8207, 6581, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F19_1X_GPPB_2, - 8277, 8204, 8174, 6563, 0, + 8310, 8237, 8207, 6581, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F19_1X_PCIE_DUMMY_0, - 8277, 8204, 8217, 8125, 0, + 8310, 8237, 8250, 8158, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F19_1X_DF_0, - 8277, 490, 8088, 0, + 8310, 490, 8121, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F19_1X_DF_1, - 8277, 490, 8088, 0, + 8310, 490, 8121, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F19_1X_DF_2, - 8277, 490, 8088, 0, + 8310, 490, 8121, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F19_1X_DF_3, - 8277, 490, 8088, 0, + 8310, 490, 8121, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F19_1X_DF_4, - 8277, 490, 8088, 0, + 8310, 490, 8121, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F19_1X_DF_5, - 8277, 490, 8088, 0, + 8310, 490, 8121, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F19_1X_DF_6, - 8277, 490, 8088, 0, + 8310, 490, 8121, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F19_1X_DF_7, - 8277, 490, 8088, 0, + 8310, 490, 8121, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_AX_RC, - 8209, 8140, 8145, 0, + 8242, 8173, 8178, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_AX_IOMMU, - 8209, 8158, 0, + 8242, 8191, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_AX_PCIE_DUMMY_HB, - 8209, 8204, 8217, 6953, 6563, 0, + 8242, 8237, 8250, 6971, 6581, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_AX_INTNL_GPPB_0, - 8209, 8290, 8174, 6563, 8134, 0, + 8242, 8323, 8207, 6581, 8167, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_AX_GPPB, - 8209, 8204, 8174, 6563, 0, + 8242, 8237, 8207, 6581, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F19_1X_NTB_0, - 8277, 8299, 8204, 8307, 8311, 6563, 0, + 8310, 8332, 8237, 8340, 8344, 6581, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F19_1X_VNTB, - 8277, 8323, 8333, 0, + 8310, 8356, 8366, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F19_1X_PCIE_DUMMY_1, - 8277, 8204, 8217, 8125, 0, + 8310, 8237, 8250, 8158, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F19_1X_NTB_1, - 8277, 8204, 8307, 8311, 6563, 0, + 8310, 8237, 8340, 8344, 6581, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F19_1X_SWDS, - 8277, 8338, 8344, 8349, 0, + 8310, 8371, 8377, 8382, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F19_1X_NVME, - 8277, 7957, 0, + 8310, 7990, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F19_1X_SWUS, - 8277, 8338, 4362, 8352, 8204, 0, + 8310, 8371, 4362, 8385, 8237, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F19_1X_PSP, - 8277, 8355, 0, + 8310, 8388, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F19_1X_ACP, - 8277, 8359, 0, + 8310, 8392, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F19_1X_HDA, - 8277, 8230, 7054, 0, + 8310, 8263, 7072, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F19_6X_RC, - 8363, 8140, 8145, 0, + 8396, 8173, 8178, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F19_6X_IOMMU, - 8363, 8158, 0, + 8396, 8191, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F19_6X_PCIE_DUMMY_HB, - 8363, 8204, 8217, 6953, 6563, 0, + 8396, 8237, 8250, 6971, 6581, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F19_6X_GPPB, - 8363, 8204, 8174, 6563, 0, + 8396, 8237, 8207, 6581, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F19_6X_INTNL_GPPB, - 8363, 8290, 8204, 8174, 6563, 0, + 8396, 8323, 8237, 8207, 6581, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F19_6X_PCIE_DUMMY, - 8363, 8204, 8217, 8125, 0, + 8396, 8237, 8250, 8158, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F19_6X_DF_0, - 8363, 490, 8088, 8134, 0, + 8396, 490, 8121, 8167, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F19_6X_DF_1, - 8363, 490, 8088, 8136, 0, + 8396, 490, 8121, 8169, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F19_6X_DF_2, - 8363, 490, 8088, 6411, 0, + 8396, 490, 8121, 6429, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F19_6X_DF_3, - 8363, 490, 8088, 6422, 0, + 8396, 490, 8121, 6440, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F19_6X_DF_4, - 8363, 490, 8088, 6786, 0, + 8396, 490, 8121, 6804, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F19_6X_DF_5, - 8363, 490, 8088, 8138, 0, + 8396, 490, 8121, 8171, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F19_6X_DF_6, - 8363, 490, 8088, 8371, 0, + 8396, 490, 8121, 8404, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F19_6X_DF_7, - 8363, 490, 8088, 8373, 0, + 8396, 490, 8121, 8406, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F19_7X_RC, - 8269, 8140, 8145, 0, + 8302, 8173, 8178, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_AX_XHCI_0, - 8209, 6945, 8375, 8233, 0, + 8242, 6963, 8408, 8266, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_AX_XHCI_1, - 8209, 6945, 8375, 8233, 0, + 8242, 6963, 8408, 8266, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_AX_USB_BIOM, - 8209, 8379, 6945, 8386, 0, + 8242, 8412, 6963, 8419, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_AX_GFX, - 8209, 8290, 8396, 0, + 8242, 8323, 8429, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F14_RC, - 8400, 8140, 8145, 0, + 8433, 8173, 8178, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F14_PCIE_1, - 8400, 8204, 0, + 8433, 8237, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F14_PCIE_2, - 8400, 8204, 0, + 8433, 8237, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F14_PCIE_3, - 8400, 8204, 0, + 8433, 8237, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F14_PCIE_4, - 8400, 8204, 0, + 8433, 8237, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F14_PCIE_5, - 8400, 8204, 0, + 8433, 8237, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F16_HT, - 8164, 8005, 8020, 0, + 8197, 8038, 8053, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F16_ADDR, - 8164, 8034, 8042, 8020, 0, + 8197, 8067, 8075, 8053, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F16_DRAM, - 8164, 8046, 8020, 0, + 8197, 8079, 8053, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F16_NB, - 8164, 8410, 6563, 8020, 0, + 8197, 8443, 6581, 8053, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F16_CSTATE, - 8164, 2535, 8416, 8020, 0, + 8197, 2535, 8449, 8053, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F16_MISC, - 8164, 8051, 8020, 0, + 8197, 8084, 8053, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F16_RC, - 8164, 8140, 8145, 0, + 8197, 8173, 8178, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F16_CCP, - 8164, 8424, 8438, 0, + 8197, 8457, 8471, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F16_HB, - 8164, 6953, 6563, 0, + 8197, 6971, 6581, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F1A_0X_RC, - 8080, 8140, 8145, 0, + 8113, 8173, 8178, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F1A_0X_IOMMU, - 8080, 8158, 0, + 8113, 8191, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F1A_0X_PCIE_DUMMY_HB, - 8080, 8204, 8217, 6953, 6563, 0, + 8113, 8237, 8250, 6971, 6581, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F1A_0X_GPPB_1, - 8080, 8204, 8174, 6563, 0, + 8113, 8237, 8207, 6581, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F1A_0X_GPPB_2, - 8080, 8204, 8174, 6563, 0, + 8113, 8237, 8207, 6581, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F1A_0X_GPPB_3, - 8080, 8204, 8174, 6563, 0, + 8113, 8237, 8207, 6581, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F1A_0X_INTNL_GPPB, - 8080, 8290, 8204, 8174, 6563, 0, + 8113, 8323, 8237, 8207, 6581, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F1A_0X_PCIE_DUMMY, - 8080, 8204, 8217, 8125, 0, + 8113, 8237, 8250, 8158, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F1A_0X_XHCI_0, - 8080, 6945, 8450, 8233, 0, + 8113, 6963, 8483, 8266, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F1A_0X_SW_US, - 8080, 8454, 0, + 8113, 8487, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F1A_0X_PCIE_DUMMY_2, - 8080, 8323, 8204, 8217, 8125, 0, + 8113, 8356, 8237, 8250, 8158, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F1A_0X_NTB_1, - 8080, 8204, 8307, 8311, 6563, 0, + 8113, 8237, 8340, 8344, 6581, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F16_30_RC, - 8164, 8140, 8145, 0, + 8197, 8173, 8178, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F16_30_IOMMU, - 8164, 8158, 0, + 8197, 8191, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F16_30_HB, - 8164, 6953, 6563, 0, + 8197, 6971, 6581, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F1A_0X_SW_DS, - 8080, 8460, 0, + 8113, 8493, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F1A_0X_ASP, - 8080, 8466, 0, + 8113, 8499, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F15_6X_PF_0, - 8470, 8115, 8125, 8134, 0, + 8503, 8148, 8158, 8167, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F15_6X_PF_1, - 8470, 8115, 8125, 8136, 0, + 8503, 8148, 8158, 8169, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F15_6X_PF_2, - 8470, 8115, 8125, 6411, 0, + 8503, 8148, 8158, 6429, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F15_6X_PF_3, - 8470, 8115, 8125, 6422, 0, + 8503, 8148, 8158, 6440, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F15_6X_PF_4, - 8470, 8115, 8125, 6786, 0, + 8503, 8148, 8158, 6804, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F15_6X_PF_5, - 8470, 8115, 8125, 8138, 0, + 8503, 8148, 8158, 8171, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F15_6X_RC, - 8470, 8140, 8145, 0, + 8503, 8173, 8178, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F15_6X_IOMMU, - 8470, 8158, 0, + 8503, 8191, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F15_6X_PSP, - 8470, 8355, 0, + 8503, 8388, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F15_6X_HDA, - 8470, 7054, 6455, 0, + 8503, 7072, 6473, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F15_6X_HB, - 8470, 6953, 6563, 0, + 8503, 6971, 6581, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F15_6X_RP, - 8470, 8140, 8153, 0, + 8503, 8173, 8186, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F15_6X_HB_2, - 8470, 6953, 6563, 0, + 8503, 6971, 6581, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F19_1X_XHCI, - 8277, 6945, 8450, 0, + 8310, 6963, 8483, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F16_30_HT, - 8164, 8005, 8020, 0, + 8197, 8038, 8053, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F16_30_ADDR, - 8164, 8034, 8042, 8020, 0, + 8197, 8067, 8075, 8053, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F16_30_DRAM, - 8164, 8046, 8020, 0, + 8197, 8079, 8053, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F16_30_NB, - 8164, 8410, 6563, 8020, 0, + 8197, 8443, 6581, 8053, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F16_30_CSTATE, - 8164, 2535, 8416, 8020, 0, + 8197, 2535, 8449, 8053, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F16_30_MISC, - 8164, 8051, 8020, 0, + 8197, 8084, 8053, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F15_7X_HT, - 8478, 8005, 8020, 0, + 8511, 8038, 8053, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F15_7X_ADDR, - 8478, 8034, 8042, 8020, 0, + 8511, 8067, 8075, 8053, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F15_7X_DRAM, - 8478, 8046, 8020, 0, + 8511, 8079, 8053, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F15_7X_NB, - 8478, 8410, 6563, 8020, 0, + 8511, 8443, 6581, 8053, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F15_7X_CSTATE, - 8478, 2535, 8416, 8020, 0, + 8511, 2535, 8449, 8053, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F15_7X_MISC, - 8478, 8051, 8020, 0, + 8511, 8084, 8053, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F19_6X_XHCI_0, - 8363, 6945, 8375, 8233, 0, + 8396, 6963, 8408, 8266, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F19_6X_XHCI_1, - 8363, 6945, 8375, 8233, 0, + 8396, 6963, 8408, 8266, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F19_6X_USB_BIOM, - 8363, 8379, 6945, 8386, 0, + 8396, 8412, 6963, 8419, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_1X_RC, - 8486, 8140, 8145, 0, + 8519, 8173, 8178, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_1X_IOMMU, - 8486, 8158, 0, + 8519, 8191, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_1X_PCIE_1, - 8486, 8204, 0, + 8519, 8237, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_1X_PCIE_2, - 8486, 8204, 0, + 8519, 8237, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_1X_PCIE_3, - 8486, 8204, 0, + 8519, 8237, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_1X_PSP, - 8486, 8500, 8509, 8115, 0, + 8519, 8533, 8542, 8148, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_1X_XHCI_1, - 8486, 6945, 8375, 8233, 0, + 8519, 6963, 8408, 8266, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_1X_XHCI_2, - 8486, 6945, 8375, 8233, 0, + 8519, 6963, 8408, 8266, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_1X_ACP, - 8518, 8526, 7054, 0, + 8551, 8559, 7072, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_1X_HDA, - 8486, 8230, 7054, 6455, 0, + 8519, 8263, 7072, 6473, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_1X_DF_0, - 8486, 490, 8088, 0, + 8519, 490, 8121, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_1X_DF_1, - 8486, 490, 8088, 0, + 8519, 490, 8121, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_1X_DF_2, - 8486, 490, 8088, 0, + 8519, 490, 8121, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_1X_DF_3, - 8486, 490, 8088, 0, + 8519, 490, 8121, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_1X_DF_4, - 8486, 490, 8088, 0, + 8519, 490, 8121, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_1X_DF_5, - 8486, 490, 8088, 0, + 8519, 490, 8121, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_1X_DF_6, - 8486, 490, 8088, 0, + 8519, 490, 8121, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_1X_DF_7, - 8486, 490, 8088, 0, + 8519, 490, 8121, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F15_HT, - 8105, 8005, 8020, 0, + 8138, 8038, 8053, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F15_ADDR, - 8105, 8034, 8042, 8020, 0, + 8138, 8067, 8075, 8053, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F15_DRAM, - 8105, 8046, 8020, 0, + 8138, 8079, 8053, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F15_MISC, - 8105, 8051, 8020, 0, + 8138, 8084, 8053, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F15_LINK, - 8105, 8075, 8020, 0, + 8138, 8108, 8053, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F15_NB, - 8105, 8410, 6563, 8020, 0, + 8138, 8443, 6581, 8053, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_9X_XHCI_1, - 8530, 8233, 0, + 8563, 8266, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_6X_RC, - 8186, 8140, 8145, 0, + 8219, 8173, 8178, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_6X_IOMMU, - 8186, 8158, 0, + 8219, 8191, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_6X_HB, - 8186, 6953, 6563, 0, + 8219, 6971, 6581, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_6X_PCIE_1, - 8186, 8204, 0, + 8219, 8237, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_6X_PCIE_2, - 8186, 8204, 0, + 8219, 8237, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_6X_PCIE_3, - 8186, 8204, 0, + 8219, 8237, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_6X_HDAUDIO, - 8186, 8230, 7054, 6455, 0, + 8219, 8263, 7072, 6473, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_6X_XHCI, - 8186, 8233, 0, + 8219, 8266, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_9X_XHCI_2, - 8530, 8233, 0, + 8563, 8266, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_AX_HDA, - 8209, 8230, 7054, 0, + 8242, 8263, 7072, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_6X_XGBE, - 8186, 8538, 6455, 0, + 8219, 8571, 6473, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_6X_WLAN, - 8186, 7694, 0, + 8219, 7727, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_6X_BT, - 8186, 8544, 0, + 8219, 8577, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_6X_I2S, - 8186, 8526, 0, + 8219, 8559, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_9X_HB, - 8530, 6953, 0, + 8563, 6971, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_9X_PCIE_1, - 8530, 8554, 0, + 8563, 8587, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_9X_PCIE_2, - 8530, 8554, 0, + 8563, 8587, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_9X_CCP, - 8530, 8223, 0, + 8563, 8256, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F19_6X_GFX, - 8363, 8290, 8396, 0, + 8396, 8323, 8429, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_9X_DF_0, - 8530, 490, 8088, 0, + 8563, 490, 8121, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_9X_DF_1, - 8530, 490, 8088, 0, + 8563, 490, 8121, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_9X_DF_2, - 8530, 490, 8088, 0, + 8563, 490, 8121, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_9X_DF_3, - 8530, 490, 8088, 0, + 8563, 490, 8121, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_9X_DF_4, - 8530, 490, 8088, 0, + 8563, 490, 8121, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_9X_DF_5, - 8530, 490, 8088, 0, + 8563, 490, 8121, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_9X_DF_6, - 8530, 490, 8088, 0, + 8563, 490, 8121, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_9X_DF_7, - 8530, 490, 8088, 0, + 8563, 490, 8121, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F19_5X_DF_0, - 8559, 490, 8088, 0, + 8592, 490, 8121, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F19_5X_DF_1, - 8559, 490, 8088, 0, + 8592, 490, 8121, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F19_5X_DF_2, - 8559, 490, 8088, 0, + 8592, 490, 8121, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F19_5X_DF_3, - 8559, 490, 8088, 0, + 8592, 490, 8121, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F19_5X_DF_4, - 8559, 490, 8088, 0, + 8592, 490, 8121, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F19_5X_DF_5, - 8559, 490, 8088, 0, + 8592, 490, 8121, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F19_5X_DF_6, - 8559, 490, 8088, 0, + 8592, 490, 8121, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F19_5X_DF_7, - 8559, 490, 8088, 0, + 8592, 490, 8121, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F14_HT, - 8567, 8005, 8020, 0, + 8600, 8038, 8053, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F14_ADDR, - 8567, 8034, 8042, 8020, 0, + 8600, 8067, 8075, 8053, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F14_DRAM, - 8567, 8046, 8020, 0, + 8600, 8079, 8053, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F14_NB, - 8567, 8410, 6563, 8020, 0, + 8600, 8443, 6581, 8053, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F14_CSTATE, - 8567, 2535, 8416, 8020, 0, + 8600, 2535, 8449, 8053, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F12_RC, - 8581, 8140, 8145, 0, + 8614, 8173, 8178, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F12_PCIE_1, - 8581, 8204, 0, + 8614, 8237, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F12_PCIE_2, - 8581, 8204, 0, + 8614, 8237, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F12_GPP0, - 8581, 8591, 8140, 8153, 0, + 8614, 8624, 8173, 8186, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F12_PCIE_4, - 8581, 8204, 0, + 8614, 8237, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F12_PCIE_5, - 8581, 8204, 0, + 8614, 8237, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F12_PCIE_6, - 8581, 8204, 0, + 8614, 8237, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F12_PCIE_7, - 8581, 8204, 0, + 8614, 8237, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F14_MISC, - 8567, 8596, 8020, 0, + 8600, 8629, 8053, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F14_HB18, - 8567, 6953, 6563, 0, + 8600, 6971, 6581, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F14_HB19, - 8567, 6953, 6563, 0, + 8600, 6971, 6581, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_AX_DF_0, - 8209, 490, 8088, 0, + 8242, 490, 8121, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_AX_DF_1, - 8209, 490, 8088, 0, + 8242, 490, 8121, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_AX_DF_2, - 8209, 490, 8088, 0, + 8242, 490, 8121, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_AX_DF_3, - 8209, 490, 8088, 0, + 8242, 490, 8121, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_AX_DF_4, - 8209, 490, 8088, 0, + 8242, 490, 8121, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_AX_DF_5, - 8209, 490, 8088, 0, + 8242, 490, 8121, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_AX_DF_6, - 8209, 490, 8088, 0, + 8242, 490, 8121, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_F17_AX_DF_7, - 8209, 490, 8088, 0, + 8242, 490, 8121, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_SEATTLE_PCHB_1, - 8602, 6953, 6563, 0, + 8635, 6971, 6581, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_SEATTLE_PCHB_2, - 8602, 6953, 6563, 0, + 8635, 6971, 6581, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_SEATTLE_PCIE, - 8602, 8204, 8140, 8153, 0, + 8635, 8237, 8173, 8186, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_PCNET_PCI, - 8610, 5717, 0, + 8643, 5735, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_PCNET_HOME, - 8620, 8631, 5717, 0, + 8653, 8664, 5735, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_AM_1771_MBW, - 8639, 8647, 8650, 8655, 0, + 8672, 8680, 8683, 8688, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_PCSCSI_PCI, - 8659, 6670, 0, + 8692, 6688, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_GEODELX_PCHB, - 8670, 8676, 6851, 6563, 0, + 8703, 8709, 6869, 6581, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_GEODELX_VGA, - 8670, 8676, 8679, 6455, 0, + 8703, 8709, 8712, 6473, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_GEODELX_AES, - 8670, 8676, 8683, 8509, 8687, 0, + 8703, 8709, 8716, 8542, 8720, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_CS5536_PCISB, - 8693, 8700, 615, 8710, 6563, 0, + 8726, 8733, 615, 8743, 6581, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_CS5536_PCIB, - 8693, 6837, 6563, 0, + 8726, 6855, 6581, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_CS5536_FLASH, - 8693, 8716, 0, + 8726, 8749, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_CS5536_AUDIO, - 8693, 7054, 0, + 8726, 7072, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_CS5536_OHCI, - 8693, 8722, 6945, 6455, 0, + 8726, 8755, 6963, 6473, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_CS5536_EHCI, - 8693, 8727, 6945, 6455, 0, + 8726, 8760, 6963, 6473, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_CS5536_UDC, - 8693, 8732, 0, + 8726, 8765, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_CS5536_UOC, - 8693, 8736, 0, + 8726, 8769, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_CS5536_IDE, - 8693, 6626, 6455, 0, + 8726, 6644, 6473, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_SC520_SC, - 8740, 8745, 6, 6455, 0, + 8773, 8778, 6, 6473, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_HUDSON_PCIE_0, - 8751, 8204, 8140, 8153, 8134, 0, + 8784, 8237, 8173, 8186, 8167, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_HUDSON_PCIE_1, - 8751, 8204, 8140, 8153, 8136, 0, + 8784, 8237, 8173, 8186, 8169, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_HUDSON_PCIE_2, - 8751, 8204, 8140, 8153, 6411, 0, + 8784, 8237, 8173, 8186, 6429, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_HUDSON_PCIE_3, - 8751, 8204, 8140, 8153, 6422, 0, + 8784, 8237, 8173, 8186, 6440, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_300SERIES_PCIE, - 8758, 6476, 8204, 0, + 8791, 6494, 8237, 0, + PCI_VENDOR_AMD, PCI_PRODUCT_AMD_X370SERIES_SATA, + 8795, 6494, 8800, 0, + PCI_VENDOR_AMD, PCI_PRODUCT_AMD_X399SERIES_SATA, + 8805, 6494, 8800, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_300SERIES_SATA, - 8758, 6476, 8762, 0, - PCI_VENDOR_AMD, PCI_PRODUCT_AMD_FCH_SATA_D, - 8767, 8762, 6455, 3154, 0, + 8791, 6494, 8800, 0, + PCI_VENDOR_AMD, PCI_PRODUCT_AMD_A320SERIES_SATA, + 8810, 6494, 8800, 0, + PCI_VENDOR_AMD, PCI_PRODUCT_AMD_X370SERIES_XHCI, + 8795, 6494, 8266, 0, + PCI_VENDOR_AMD, PCI_PRODUCT_AMD_X399SERIES_XHCI, + 8805, 6494, 8266, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_300SERIES_XHCI, - 8758, 6476, 8233, 0, + 8791, 6494, 8266, 0, + PCI_VENDOR_AMD, PCI_PRODUCT_AMD_A320SERIES_XHCI, + 8810, 6494, 8266, 0, + PCI_VENDOR_AMD, PCI_PRODUCT_AMD_FCH_AHCI_SATA_RAID, + 8815, 8819, 8800, 8824, 8830, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_400SERIES_PCIE_1, - 8771, 6476, 8204, 0, + 8836, 6494, 8237, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_400SERIES_PCIE_2, - 8771, 6476, 8204, 0, + 8836, 6494, 8237, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_400SERIES_AHCI, - 8771, 6476, 8775, 0, + 8836, 6494, 8819, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_400SERIES_XHCI, - 8771, 6476, 8233, 0, + 8836, 6494, 8266, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_400SERIES_XHCI_2, - 8771, 6476, 8233, 0, + 8836, 6494, 8266, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_500SERIES_PCIE_1, - 8780, 6476, 8204, 0, + 8840, 6494, 8237, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_500SERIES_PCIE_2, - 8780, 6476, 8204, 0, + 8840, 6494, 8237, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_500SERIES_AHCI, - 8780, 6476, 8775, 0, + 8840, 6494, 8819, 0, + PCI_VENDOR_AMD, PCI_PRODUCT_AMD_A520SERIES_XHCI, + 8844, 6494, 8266, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_500SERIES_XHCI, - 8780, 6476, 8233, 0, + 8840, 6494, 8266, 0, + PCI_VENDOR_AMD, PCI_PRODUCT_AMD_600SERIES_PCIE_1, + 8849, 6494, 8237, 8853, 8860, 8186, 0, + PCI_VENDOR_AMD, PCI_PRODUCT_AMD_600SERIES_PCIE_2, + 8849, 6494, 8237, 8853, 8869, 8186, 0, + PCI_VENDOR_AMD, PCI_PRODUCT_AMD_600SERIES_SATA, + 8849, 6494, 8800, 0, + PCI_VENDOR_AMD, PCI_PRODUCT_AMD_600SERIES_XHCI, + 8849, 6494, 8266, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_500SERIES_PCIE_3, - 8780, 6476, 8204, 0, + 8840, 6494, 8237, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_500SERIES_PCIE_4, - 8780, 6476, 8204, 0, + 8840, 6494, 8237, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_500SERIES_PCIE_5, - 8780, 6476, 8204, 0, + 8840, 6494, 8237, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_SC751_SC, - 8784, 6, 6455, 0, + 8880, 6, 6473, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_SC751_PPB, - 8784, 8791, 6563, 0, + 8880, 8887, 6581, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_IGR4_AGP, - 458, 8799, 8804, 6563, 0, + 458, 8895, 8900, 6581, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_IGR4_PPB, - 458, 8799, 8791, 6563, 0, + 458, 8895, 8887, 6581, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_SC762_NB, - 8808, 8410, 6563, 0, + 8904, 8443, 6581, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_SC762_PPB, - 8808, 8804, 6563, 0, + 8904, 8900, 6581, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_SC761_SC, - 8815, 6, 6455, 0, + 8911, 6, 6473, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_SC761_PPB, - 8815, 8791, 6563, 0, + 8911, 8887, 6581, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_PBC755_ISA, - 8822, 6837, 6563, 0, + 8918, 6855, 6581, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_PBC755_IDE, - 8822, 6626, 6455, 0, + 8918, 6644, 6473, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_PBC755_PMC, - 8822, 8829, 6455, 0, + 8918, 8925, 6473, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_PBC755_USB, - 8822, 6945, 6953, 6455, 0, + 8918, 6963, 6971, 6473, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_PBC756_ISA, - 8834, 6837, 6563, 0, + 8930, 6855, 6581, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_PBC756_IDE, - 8834, 6626, 6455, 0, + 8930, 6644, 6473, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_PBC756_PMC, - 8834, 3740, 7078, 6455, 0, + 8930, 3740, 7096, 6473, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_PBC756_USB, - 8834, 6945, 6953, 6455, 0, + 8930, 6963, 6971, 6473, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_PBC766_ISA, - 8841, 8710, 6563, 0, + 8937, 8743, 6581, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_PBC766_IDE, - 8841, 6626, 6455, 0, + 8937, 6644, 6473, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_PBC766_PMC, - 8841, 3740, 7078, 6455, 0, + 8937, 3740, 7096, 6473, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_PBC766_OHCI, - 8841, 6945, 8722, 0, + 8937, 6963, 8755, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_PBC768_ISA, - 8848, 8855, 6563, 0, + 8944, 8951, 6581, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_PBC768_IDE, - 8848, 8867, 6455, 0, + 8944, 8963, 6473, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_PBC768_PMC, - 8848, 3740, 7078, 6455, 0, + 8944, 3740, 7096, 6473, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_PBC768_AC, - 8848, 8872, 7054, 0, + 8944, 8968, 7072, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_PBC768_MD, - 8848, 8872, 5764, 0, + 8944, 8968, 5782, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_PBC768_PPB, - 8848, 8791, 6563, 0, + 8944, 8887, 6581, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_PBC768_USB, - 8848, 6945, 6455, 0, + 8944, 6963, 6473, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_PCIX8131_PPB, - 8877, 8885, 8891, 0, + 8973, 8981, 8987, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_PCIX8131_APIC, - 8877, 8898, 8901, 0, + 8973, 8994, 8997, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_AGP8151_DEV, - 8906, 8804, 2418, 0, + 9002, 8900, 2418, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_AGP8151_PPB, - 8906, 8804, 6563, 0, + 9002, 8900, 6581, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_PCIX_PPB, - 8914, 8885, 6563, 0, + 9010, 8981, 6581, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_PCIX_APIC, - 8922, 8885, 8930, 0, + 9018, 8981, 9026, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_PBC8111, - 8937, 8945, 8949, 0, + 9033, 9041, 9045, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_PBC8111_USB_7461, - 8937, 8953, 6945, 6953, 6455, 0, + 9033, 9049, 6963, 6971, 6473, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_PBC8111_ETHER, - 8937, 5717, 0, + 9033, 5735, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_PBC8111_EHCI, - 8937, 6945, 8727, 0, + 9033, 6963, 8760, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_PBC8111_USB, - 8937, 6945, 6953, 6455, 0, + 9033, 6963, 6971, 6473, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_PBC8111_LPC, - 8937, 8958, 6455, 0, + 9033, 9054, 6473, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_PBC8111_IDE, - 8937, 6626, 6455, 0, + 9033, 6644, 6473, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_PBC8111_SMB, - 8937, 8962, 6455, 0, + 9033, 9058, 6473, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_PBC8111_ACPI, - 8937, 8829, 6455, 0, + 9033, 8925, 6473, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_PBC8111_AC, - 8937, 8872, 7054, 0, + 9033, 8968, 7072, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_PBC8111_MC97, - 8937, 8968, 5764, 0, + 9033, 9064, 5782, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_PBC8111_AC_756b, - 8937, 8973, 8829, 6455, 0, + 9033, 9069, 8925, 6473, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_HUDSON_SATA, - 8751, 8762, 8978, 6455, 0, + 8784, 8800, 9074, 6473, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_HUDSON_SATA_AHCI, - 8751, 8762, 8984, 6455, 0, + 8784, 8800, 9080, 6473, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_HUDSON_SATA_RAID, - 8751, 8762, 8991, 6455, 0, + 8784, 8800, 9087, 6473, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_HUDSON_SATA_RAID5, - 8751, 8762, 8998, 6455, 0, + 8784, 8800, 9094, 6473, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_HUDSON_SATA_AHCI_2, - 8751, 8762, 9006, 9011, 6455, 0, + 8784, 8800, 9102, 9107, 6473, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_HUDSON_SATA_RAID_2, - 8751, 8762, 8991, 6455, 0, + 8784, 8800, 9087, 6473, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_HUDSON_SDHC, - 8751, 9017, 8716, 6455, 0, + 8784, 9113, 8749, 6473, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_HUDSON_OHCI, - 8751, 6945, 8722, 6455, 0, + 8784, 6963, 8755, 6473, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_HUDSON_EHCI, - 8751, 6945, 8727, 6455, 0, + 8784, 6963, 8760, 6473, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_HUDSON_OHCI_2, - 8751, 6945, 8722, 6455, 0, + 8784, 6963, 8755, 6473, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_HUDSON_SMB, - 8751, 8962, 6455, 0, + 8784, 9058, 6473, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_HUDSON_IDE, - 8751, 6626, 6455, 0, + 8784, 6644, 6473, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_HUDSON_HDA, - 8751, 8230, 7054, 6455, 0, + 8784, 8263, 7072, 6473, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_HUDSON_LPC, - 8751, 8958, 6563, 0, + 8784, 9054, 6581, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_HUDSON_PCI, - 8751, 615, 6563, 0, + 8784, 615, 6581, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_HUDSON_XHCI, - 8751, 6945, 8233, 6455, 0, + 8784, 6963, 8266, 6473, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_FCH_SDHC, - 8767, 9017, 8716, 6455, 0, + 8815, 9113, 8749, 6473, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_FCH_XHCI, - 8767, 6945, 8233, 6455, 0, + 8815, 6963, 8266, 6473, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_KERNCZ_SATA_1, - 8767, 8762, 0, + 8815, 8800, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_KERNCZ_AHCI_1, - 8767, 8762, 8775, 0, + 8815, 8800, 8819, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_KERNCZ_RAID_1, - 8767, 6450, 0, + 8815, 6468, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_KERNCZ_RAID_2, - 8767, 6450, 0, + 8815, 6468, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_KERNCZ_AHCI_2, - 8767, 8762, 8775, 0, + 8815, 8800, 8819, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_KERNCZ_SD, - 8767, 9017, 0, + 8815, 9113, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_KERNCZ_EHCI, - 8767, 8727, 0, + 8815, 8760, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_KERNCZ_SMB, - 9020, 8962, 6455, 0, + 9116, 9058, 6473, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_KERNCZ_LPC, - 8767, 8958, 0, + 8815, 9054, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_KERNCZ_XHCI, - 8767, 8233, 0, + 8815, 8266, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_KERNCZ_AHCI_RAID_1, - 8767, 8762, 8775, 6450, 0, + 8815, 8800, 8819, 6468, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_KERNCZ_AHCI_RAID_2, - 8767, 8762, 8775, 6450, 0, + 8815, 8800, 8819, 6468, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_RS780_HB, - 9030, 6953, 6563, 0, + 9126, 6971, 6581, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_RS880_HB, - 9036, 6953, 6563, 0, + 9132, 6971, 6581, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_RS780_PPB_GFX, - 9048, 8791, 6563, 9060, 9065, 0, + 9144, 8887, 6581, 9156, 9161, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_RS780_PPB_GFX0, - 9030, 8791, 6563, 9070, 9075, 6788, 9079, 0, + 9126, 8887, 6581, 9166, 9171, 6806, 9175, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_RS780_PPB0, - 9048, 9082, 6563, 9091, 9079, 0, + 9144, 9178, 6581, 9187, 9175, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_RS780_PPB1, - 9048, 9082, 6563, 9091, 9097, 0, + 9144, 9178, 6581, 9187, 9193, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_RS780_PPB2, - 9030, 9082, 6563, 9091, 9100, 0, + 9126, 9178, 6581, 9187, 9196, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_RS780_PPB3, - 9030, 9082, 6563, 9091, 9103, 0, + 9126, 9178, 6581, 9187, 9199, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_RS780_PPB4, - 9048, 9082, 6563, 9091, 9106, 0, + 9144, 9178, 6581, 9187, 9202, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_RS780_PPB5, - 9048, 9082, 6563, 9091, 9109, 0, + 9144, 9178, 6581, 9187, 9205, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_RS780_PPB6, - 9030, 9082, 6563, 9112, 9119, 0, + 9126, 9178, 6581, 9208, 9215, 0, PCI_VENDOR_AMD, PCI_PRODUCT_AMD_RS780_PPB7, - 9030, 9082, 6563, 9070, 9075, 6788, 9097, 0, + 9126, 9178, 6581, 9166, 9171, 6806, 9193, 0, PCI_VENDOR_AMI, PCI_PRODUCT_AMI_MEGARAID3, - 9125, 6422, 0, + 9221, 6440, 0, PCI_VENDOR_AMI, PCI_PRODUCT_AMI_MEGARAID, - 9125, 0, + 9221, 0, PCI_VENDOR_AMI, PCI_PRODUCT_AMI_MEGARAID2, - 9125, 6411, 0, + 9221, 6429, 0, PCI_VENDOR_AMPERE, PCI_PRODUCT_AMPERE_EMAG_PCIE_0, - 9134, 8204, 8140, 8153, 8134, 0, + 9230, 8237, 8173, 8186, 8167, 0, PCI_VENDOR_AMPERE, PCI_PRODUCT_AMPERE_EMAG_PCIE_1, - 9134, 8204, 8140, 8153, 8136, 0, + 9230, 8237, 8173, 8186, 8169, 0, PCI_VENDOR_AMPERE, PCI_PRODUCT_AMPERE_EMAG_PCIE_2, - 9134, 8204, 8140, 8153, 6411, 0, + 9230, 8237, 8173, 8186, 6429, 0, PCI_VENDOR_AMPERE, PCI_PRODUCT_AMPERE_EMAG_PCIE_3, - 9134, 8204, 8140, 8153, 6422, 0, + 9230, 8237, 8173, 8186, 6440, 0, PCI_VENDOR_AMPERE, PCI_PRODUCT_AMPERE_EMAG_PCIE_4, - 9134, 8204, 8140, 8153, 6786, 0, + 9230, 8237, 8173, 8186, 6804, 0, PCI_VENDOR_AMPERE, PCI_PRODUCT_AMPERE_EMAG_PCIE_5, - 9134, 8204, 8140, 8153, 8138, 0, + 9230, 8237, 8173, 8186, 8171, 0, PCI_VENDOR_AMPERE, PCI_PRODUCT_AMPERE_EMAG_PCIE_6, - 9134, 8204, 8140, 8153, 8371, 0, + 9230, 8237, 8173, 8186, 8404, 0, PCI_VENDOR_AMPERE, PCI_PRODUCT_AMPERE_EMAG_PCIE_7, - 9134, 8204, 8140, 8153, 8373, 0, + 9230, 8237, 8173, 8186, 8406, 0, PCI_VENDOR_ANALOG, PCI_PRODUCT_ANALOG_AD1889, - 9139, 615, 9146, 6455, 0, + 9235, 615, 9242, 6473, 0, PCI_VENDOR_ANALOG, PCI_PRODUCT_ANALOG_SAFENET, - 5011, 8223, 7847, 9155, 0, + 5011, 8256, 7880, 9251, 0, PCI_VENDOR_ANTARES, PCI_PRODUCT_ANTARES_TC9021, - 5051, 5709, 5717, 0, + 5051, 5727, 5735, 0, PCI_VENDOR_APPLE, PCI_PRODUCT_APPLE_BANDIT, - 9165, 6851, 6563, 0, + 9261, 6869, 6581, 0, PCI_VENDOR_APPLE, PCI_PRODUCT_APPLE_GC, - 9172, 9178, 8945, 6455, 0, + 9268, 9274, 9041, 6473, 0, PCI_VENDOR_APPLE, PCI_PRODUCT_APPLE_CONTROL, - 9186, 0, + 9282, 0, PCI_VENDOR_APPLE, PCI_PRODUCT_APPLE_PLANB, - 9194, 0, + 9290, 0, PCI_VENDOR_APPLE, PCI_PRODUCT_APPLE_OHARE, - 9200, 8945, 6455, 0, + 9296, 9041, 6473, 0, PCI_VENDOR_APPLE, PCI_PRODUCT_APPLE_BANDIT2, - 9165, 6851, 6563, 0, + 9261, 6869, 6581, 0, PCI_VENDOR_APPLE, PCI_PRODUCT_APPLE_HEATHROW, - 9206, 8945, 6455, 0, + 9302, 9041, 6473, 0, PCI_VENDOR_APPLE, PCI_PRODUCT_APPLE_PADDINGTON, - 9215, 8945, 6455, 0, + 9311, 9041, 6473, 0, PCI_VENDOR_APPLE, PCI_PRODUCT_APPLE_UNINORTH_FW, - 9226, 9235, 0, + 9322, 9331, 0, PCI_VENDOR_APPLE, PCI_PRODUCT_APPLE_KEYLARGO_USB, - 9244, 6945, 6455, 0, + 9340, 6963, 6473, 0, PCI_VENDOR_APPLE, PCI_PRODUCT_APPLE_UNINORTH1, - 9226, 6851, 6563, 0, + 9322, 6869, 6581, 0, PCI_VENDOR_APPLE, PCI_PRODUCT_APPLE_UNINORTH2, - 9226, 6851, 6563, 0, + 9322, 6869, 6581, 0, PCI_VENDOR_APPLE, PCI_PRODUCT_APPLE_UNINORTH_AGP, - 9226, 8804, 3018, 0, + 9322, 8900, 3018, 0, PCI_VENDOR_APPLE, PCI_PRODUCT_APPLE_GMAC, - 9253, 5717, 0, + 9349, 5735, 0, PCI_VENDOR_APPLE, PCI_PRODUCT_APPLE_KEYLARGO, - 9244, 8945, 6455, 0, + 9340, 9041, 6473, 0, PCI_VENDOR_APPLE, PCI_PRODUCT_APPLE_GMAC2, - 9253, 5717, 0, + 9349, 5735, 0, PCI_VENDOR_APPLE, PCI_PRODUCT_APPLE_PANGEA_MACIO, - 9258, 8945, 6455, 0, + 9354, 9041, 6473, 0, PCI_VENDOR_APPLE, PCI_PRODUCT_APPLE_PANGEA_USB, - 9258, 6945, 6455, 0, + 9354, 6963, 6473, 0, PCI_VENDOR_APPLE, PCI_PRODUCT_APPLE_PANGEA_AGP, - 9258, 8804, 3018, 0, + 9354, 8900, 3018, 0, PCI_VENDOR_APPLE, PCI_PRODUCT_APPLE_PANGEA_PCI1, - 9258, 6851, 6563, 0, + 9354, 6869, 6581, 0, PCI_VENDOR_APPLE, PCI_PRODUCT_APPLE_PANGEA_PCI2, - 9258, 6851, 6563, 0, + 9354, 6869, 6581, 0, PCI_VENDOR_APPLE, PCI_PRODUCT_APPLE_UNINORTH_AGP2, - 9226, 8804, 3018, 0, + 9322, 8900, 3018, 0, PCI_VENDOR_APPLE, PCI_PRODUCT_APPLE_UNINORTH3, - 9226, 6851, 6563, 0, + 9322, 6869, 6581, 0, PCI_VENDOR_APPLE, PCI_PRODUCT_APPLE_UNINORTH4, - 9226, 6851, 6563, 0, + 9322, 6869, 6581, 0, PCI_VENDOR_APPLE, PCI_PRODUCT_APPLE_PANGEA_FW, - 9258, 9235, 0, + 9354, 9331, 0, PCI_VENDOR_APPLE, PCI_PRODUCT_APPLE_UNINORTH2_FW, - 9226, 9235, 0, + 9322, 9331, 0, PCI_VENDOR_APPLE, PCI_PRODUCT_APPLE_GMAC3, - 9253, 5717, 0, + 9349, 5735, 0, PCI_VENDOR_APPLE, PCI_PRODUCT_APPLE_UNINORTH_ATA, - 9226, 9265, 6455, 0, + 9322, 9361, 6473, 0, PCI_VENDOR_APPLE, PCI_PRODUCT_APPLE_UNINORTH_AGP3, - 9226, 8804, 6563, 0, + 9322, 8900, 6581, 0, PCI_VENDOR_APPLE, PCI_PRODUCT_APPLE_UNINORTH5, - 9226, 6851, 6563, 0, + 9322, 6869, 6581, 0, PCI_VENDOR_APPLE, PCI_PRODUCT_APPLE_UNINORTH6, - 9226, 6851, 6563, 0, + 9322, 6869, 6581, 0, PCI_VENDOR_APPLE, PCI_PRODUCT_APPLE_KAUAI, - 9273, 6446, 6455, 0, + 9369, 6464, 6473, 0, PCI_VENDOR_APPLE, PCI_PRODUCT_APPLE_INTREPID, - 9279, 8945, 6455, 0, + 9375, 9041, 6473, 0, PCI_VENDOR_APPLE, PCI_PRODUCT_APPLE_INTREPID_USB, - 9279, 6945, 6455, 0, + 9375, 6963, 6473, 0, PCI_VENDOR_APPLE, PCI_PRODUCT_APPLE_K2_USB, - 9288, 6945, 6455, 0, + 9384, 6963, 6473, 0, PCI_VENDOR_APPLE, PCI_PRODUCT_APPLE_K2, - 9288, 9291, 6455, 0, + 9384, 9387, 6473, 0, PCI_VENDOR_APPLE, PCI_PRODUCT_APPLE_K2_FW, - 9288, 9235, 0, + 9384, 9331, 0, PCI_VENDOR_APPLE, PCI_PRODUCT_APPLE_K2_UATA, - 9288, 9298, 6455, 0, + 9384, 9394, 6473, 0, PCI_VENDOR_APPLE, PCI_PRODUCT_APPLE_U3_PPB1, - 9303, 8791, 6563, 0, + 9399, 8887, 6581, 0, PCI_VENDOR_APPLE, PCI_PRODUCT_APPLE_U3_PPB2, - 9303, 8791, 6563, 0, + 9399, 8887, 6581, 0, PCI_VENDOR_APPLE, PCI_PRODUCT_APPLE_U3_PPB3, - 9303, 8791, 6563, 0, + 9399, 8887, 6581, 0, PCI_VENDOR_APPLE, PCI_PRODUCT_APPLE_U3_PPB4, - 9303, 8791, 6563, 0, + 9399, 8887, 6581, 0, PCI_VENDOR_APPLE, PCI_PRODUCT_APPLE_U3_PPB5, - 9303, 8791, 6563, 0, + 9399, 8887, 6581, 0, PCI_VENDOR_APPLE, PCI_PRODUCT_APPLE_U3_AGP, - 9303, 8804, 3018, 0, + 9399, 8900, 3018, 0, PCI_VENDOR_APPLE, PCI_PRODUCT_APPLE_K2_GMAC, - 9253, 5717, 0, + 9349, 5735, 0, PCI_VENDOR_APPLE, PCI_PRODUCT_APPLE_SHASTA, - 9306, 0, + 9402, 0, PCI_VENDOR_APPLE, PCI_PRODUCT_APPLE_SHASTA_ATA, - 9306, 6446, 0, + 9402, 6464, 0, PCI_VENDOR_APPLE, PCI_PRODUCT_APPLE_SHASTA_GMAC, - 9306, 9253, 0, + 9402, 9349, 0, PCI_VENDOR_APPLE, PCI_PRODUCT_APPLE_SHASTA_FW, - 9306, 9235, 0, + 9402, 9331, 0, PCI_VENDOR_APPLE, PCI_PRODUCT_APPLE_SHASTA_PCI1, - 9306, 615, 0, + 9402, 615, 0, PCI_VENDOR_APPLE, PCI_PRODUCT_APPLE_SHASTA_PCI2, - 9306, 615, 0, + 9402, 615, 0, PCI_VENDOR_APPLE, PCI_PRODUCT_APPLE_SHASTA_PCI3, - 9306, 615, 0, + 9402, 615, 0, PCI_VENDOR_APPLE, PCI_PRODUCT_APPLE_SHASTA_HT, - 9306, 8005, 0, + 9402, 8038, 0, PCI_VENDOR_APPLE, PCI_PRODUCT_APPLE_INTREPID2_AGP, - 9279, 6411, 8804, 0, + 9375, 6429, 8900, 0, PCI_VENDOR_APPLE, PCI_PRODUCT_APPLE_INTREPID2_PCI1, - 9279, 6411, 615, 0, + 9375, 6429, 615, 0, PCI_VENDOR_APPLE, PCI_PRODUCT_APPLE_INTREPID2_PCI2, - 9279, 6411, 615, 0, + 9375, 6429, 615, 0, PCI_VENDOR_APPLE, PCI_PRODUCT_APPLE_INTREPID2_ATA, - 9279, 6411, 6446, 0, + 9375, 6429, 6464, 0, PCI_VENDOR_APPLE, PCI_PRODUCT_APPLE_INTREPID2_FW, - 9279, 6411, 9313, 0, + 9375, 6429, 9409, 0, PCI_VENDOR_APPLE, PCI_PRODUCT_APPLE_INTREPID2_GMAC, - 9279, 6411, 9253, 0, + 9375, 6429, 9349, 0, PCI_VENDOR_APPLE, PCI_PRODUCT_APPLE_BCM5701, - 7905, 0, + 7938, 0, PCI_VENDOR_AQUANTIA, PCI_PRODUCT_AQUANTIA_AQC100, - 9322, 9329, 5709, 3879, 5909, 0, + 9418, 9425, 5727, 3879, 5927, 0, PCI_VENDOR_AQUANTIA, PCI_PRODUCT_AQUANTIA_AQC113DEV, - 9332, 9329, 5709, 3879, 5909, 0, + 9428, 9425, 5727, 3879, 5927, 0, PCI_VENDOR_AQUANTIA, PCI_PRODUCT_AQUANTIA_AQC113, - 9342, 9329, 5709, 3879, 5909, 0, + 9438, 9425, 5727, 3879, 5927, 0, PCI_VENDOR_AQUANTIA, PCI_PRODUCT_AQUANTIA_AQC107, - 9349, 9329, 5709, 3879, 5909, 0, + 9445, 9425, 5727, 3879, 5927, 0, PCI_VENDOR_AQUANTIA, PCI_PRODUCT_AQUANTIA_AQC108, - 9356, 8138, 5709, 3879, 5909, 0, + 9452, 8171, 5727, 3879, 5927, 0, PCI_VENDOR_AQUANTIA, PCI_PRODUCT_AQUANTIA_AQC109, - 9363, 9370, 5709, 3879, 5909, 0, + 9459, 9466, 5727, 3879, 5927, 0, PCI_VENDOR_AQUANTIA, PCI_PRODUCT_AQUANTIA_AQC111, - 9374, 8138, 5709, 3879, 5909, 0, + 9470, 8171, 5727, 3879, 5927, 0, PCI_VENDOR_AQUANTIA, PCI_PRODUCT_AQUANTIA_AQC116C, - 9381, 5709, 3879, 5909, 0, + 9477, 5727, 3879, 5927, 0, PCI_VENDOR_AQUANTIA, PCI_PRODUCT_AQUANTIA_AQC112, - 9389, 9370, 5709, 3879, 5909, 0, + 9485, 9466, 5727, 3879, 5927, 0, PCI_VENDOR_AQUANTIA, PCI_PRODUCT_AQUANTIA_AQC115C, - 9396, 9370, 5709, 3879, 5909, 0, + 9492, 9466, 5727, 3879, 5927, 0, PCI_VENDOR_AQUANTIA, PCI_PRODUCT_AQUANTIA_AQC113C, - 9404, 9329, 5709, 3879, 5909, 0, + 9500, 9425, 5727, 3879, 5927, 0, PCI_VENDOR_AQUANTIA, PCI_PRODUCT_AQUANTIA_AQC113CA, - 9412, 9329, 5709, 3879, 5909, 0, + 9508, 9425, 5727, 3879, 5927, 0, PCI_VENDOR_AQUANTIA, PCI_PRODUCT_AQUANTIA_AQC100S, - 9421, 9329, 5709, 3879, 5909, 0, + 9517, 9425, 5727, 3879, 5927, 0, PCI_VENDOR_AQUANTIA, PCI_PRODUCT_AQUANTIA_AQC107S, - 9429, 9329, 5709, 3879, 5909, 0, + 9525, 9425, 5727, 3879, 5927, 0, PCI_VENDOR_AQUANTIA, PCI_PRODUCT_AQUANTIA_AQC108S, - 9437, 8138, 5709, 3879, 5909, 0, + 9533, 8171, 5727, 3879, 5927, 0, PCI_VENDOR_AQUANTIA, PCI_PRODUCT_AQUANTIA_AQC109S, - 9445, 9370, 5709, 3879, 5909, 0, + 9541, 9466, 5727, 3879, 5927, 0, PCI_VENDOR_AQUANTIA, PCI_PRODUCT_AQUANTIA_AQC111S, - 9453, 8138, 5709, 3879, 5909, 0, + 9549, 8171, 5727, 3879, 5927, 0, PCI_VENDOR_AQUANTIA, PCI_PRODUCT_AQUANTIA_AQC112S, - 9461, 9370, 5709, 3879, 5909, 0, + 9557, 9466, 5727, 3879, 5927, 0, PCI_VENDOR_AQUANTIA, PCI_PRODUCT_AQUANTIA_AQC114CS, - 9469, 8138, 5709, 3879, 5909, 0, + 9565, 8171, 5727, 3879, 5927, 0, PCI_VENDOR_AQUANTIA, PCI_PRODUCT_AQUANTIA_AQC113CS, - 9478, 9329, 5709, 3879, 5909, 0, + 9574, 9425, 5727, 3879, 5927, 0, PCI_VENDOR_AQUANTIA, PCI_PRODUCT_AQUANTIA_D100, - 9487, 9329, 5709, 3879, 5909, 0, + 9583, 9425, 5727, 3879, 5927, 0, PCI_VENDOR_AQUANTIA, PCI_PRODUCT_AQUANTIA_D107, - 9492, 9329, 5709, 3879, 5909, 0, + 9588, 9425, 5727, 3879, 5927, 0, PCI_VENDOR_AQUANTIA, PCI_PRODUCT_AQUANTIA_D108, - 9497, 8138, 5709, 3879, 5909, 0, + 9593, 8171, 5727, 3879, 5927, 0, PCI_VENDOR_AQUANTIA, PCI_PRODUCT_AQUANTIA_D109, - 9502, 9370, 5709, 3879, 5909, 0, + 9598, 9466, 5727, 3879, 5927, 0, PCI_VENDOR_ARC, PCI_PRODUCT_ARC_1000PV, - 9507, 0, + 9603, 0, PCI_VENDOR_ARC, PCI_PRODUCT_ARC_2000PV, - 9514, 0, + 9610, 0, PCI_VENDOR_ARC, PCI_PRODUCT_ARC_2000MT, - 9521, 0, + 9617, 0, PCI_VENDOR_ARECA, PCI_PRODUCT_ARECA_ARC1110, - 9528, 0, + 9624, 0, PCI_VENDOR_ARECA, PCI_PRODUCT_ARECA_ARC1120, - 9537, 0, + 9633, 0, PCI_VENDOR_ARECA, PCI_PRODUCT_ARECA_ARC1130, - 9546, 0, + 9642, 0, PCI_VENDOR_ARECA, PCI_PRODUCT_ARECA_ARC1160, - 9555, 0, + 9651, 0, PCI_VENDOR_ARECA, PCI_PRODUCT_ARECA_ARC1170, - 9564, 0, + 9660, 0, PCI_VENDOR_ARECA, PCI_PRODUCT_ARECA_ARC1200, - 9573, 0, + 9669, 0, PCI_VENDOR_ARECA, PCI_PRODUCT_ARECA_ARC1200_B, - 9573, 9582, 5171, 0, + 9669, 9678, 5171, 0, PCI_VENDOR_ARECA, PCI_PRODUCT_ARECA_ARC1202, - 9586, 0, + 9682, 0, PCI_VENDOR_ARECA, PCI_PRODUCT_ARECA_ARC1203, - 9595, 0, + 9691, 0, PCI_VENDOR_ARECA, PCI_PRODUCT_ARECA_ARC1210, - 9604, 0, + 9700, 0, PCI_VENDOR_ARECA, PCI_PRODUCT_ARECA_ARC1214, - 9613, 0, + 9709, 0, PCI_VENDOR_ARECA, PCI_PRODUCT_ARECA_ARC1220, - 9622, 0, + 9718, 0, PCI_VENDOR_ARECA, PCI_PRODUCT_ARECA_ARC1224, - 9631, 0, + 9727, 0, PCI_VENDOR_ARECA, PCI_PRODUCT_ARECA_ARC1230, - 9640, 0, + 9736, 0, PCI_VENDOR_ARECA, PCI_PRODUCT_ARECA_ARC1260, - 9649, 0, + 9745, 0, PCI_VENDOR_ARECA, PCI_PRODUCT_ARECA_ARC1270, - 9658, 0, + 9754, 0, PCI_VENDOR_ARECA, PCI_PRODUCT_ARECA_ARC1280, - 9667, 0, + 9763, 0, PCI_VENDOR_ARECA, PCI_PRODUCT_ARECA_ARC1380, - 9676, 0, + 9772, 0, PCI_VENDOR_ARECA, PCI_PRODUCT_ARECA_ARC1381, - 9685, 0, + 9781, 0, PCI_VENDOR_ARECA, PCI_PRODUCT_ARECA_ARC1680, - 9694, 0, + 9790, 0, PCI_VENDOR_ARECA, PCI_PRODUCT_ARECA_ARC1681, - 9703, 0, + 9799, 0, PCI_VENDOR_ARECA, PCI_PRODUCT_ARECA_ARC1880, - 9712, 0, + 9808, 0, PCI_VENDOR_ARECA, PCI_PRODUCT_ARECA_ARC1884, - 9721, 0, + 9817, 0, PCI_VENDOR_ARECA, PCI_PRODUCT_ARECA_ARC1886, - 9730, 0, + 9826, 0, PCI_VENDOR_ASIX, PCI_PRODUCT_ASIX_AX88140A, - 9739, 5819, 5717, 0, + 9835, 5837, 5735, 0, PCI_VENDOR_ASIX, PCI_PRODUCT_ASIX_AX99100, - 9748, 9756, 8945, 6455, 0, + 9844, 9852, 9041, 6473, 0, PCI_VENDOR_ASMEDIA, PCI_PRODUCT_ASMEDIA_ASM1061_01, - 9762, 8775, 8762, 9770, 6455, 0, + 9858, 8819, 8800, 9866, 6473, 0, PCI_VENDOR_ASMEDIA, PCI_PRODUCT_ASMEDIA_ASM1061_02, - 9762, 8775, 8762, 9770, 6455, 0, + 9858, 8819, 8800, 9866, 6473, 0, PCI_VENDOR_ASMEDIA, PCI_PRODUCT_ASMEDIA_ASM1061_11, - 9762, 8775, 8762, 9770, 6455, 0, + 9858, 8819, 8800, 9866, 6473, 0, PCI_VENDOR_ASMEDIA, PCI_PRODUCT_ASMEDIA_ASM1061_12, - 9762, 8775, 8762, 9770, 6455, 0, + 9858, 8819, 8800, 9866, 6473, 0, PCI_VENDOR_ASMEDIA, PCI_PRODUCT_ASMEDIA_ASM1062_JMB575, - 9774, 9782, 9784, 8153, 9791, 0, + 9870, 9878, 9880, 8186, 9887, 0, PCI_VENDOR_ASMEDIA, PCI_PRODUCT_ASMEDIA_ASM106X, - 9802, 8775, 8762, 9770, 6455, 0, + 9898, 8819, 8800, 9866, 6473, 0, PCI_VENDOR_ASMEDIA, PCI_PRODUCT_ASMEDIA_ASM1042, - 9810, 6945, 8265, 6953, 6455, 0, + 9906, 6963, 8298, 6971, 6473, 0, PCI_VENDOR_ASMEDIA, PCI_PRODUCT_ASMEDIA_ASM1083, - 9818, 9831, 6563, 0, + 9914, 9927, 6581, 0, PCI_VENDOR_ASMEDIA, PCI_PRODUCT_ASMEDIA_ASM1042A, - 9840, 6945, 8265, 6953, 6455, 0, + 9936, 6963, 8298, 6971, 6473, 0, PCI_VENDOR_ASMEDIA, PCI_PRODUCT_ASMEDIA_ASM1182, - 9849, 8204, 6563, 6455, 0, + 9945, 8237, 6581, 6473, 0, PCI_VENDOR_ASMEDIA, PCI_PRODUCT_ASMEDIA_ASM1184, - 9858, 8204, 6563, 6455, 0, + 9954, 8237, 6581, 6473, 0, PCI_VENDOR_ASMEDIA, PCI_PRODUCT_ASMEDIA_ASM1142, - 9867, 6945, 8375, 6953, 6455, 0, + 9963, 6963, 8408, 6971, 6473, 0, PCI_VENDOR_ASMEDIA, PCI_PRODUCT_ASMEDIA_ASM1143, - 9875, 6945, 8375, 6953, 6455, 0, + 9971, 6963, 8408, 6971, 6473, 0, PCI_VENDOR_ASMEDIA, PCI_PRODUCT_ASMEDIA_ASM2142, - 9883, 6945, 8375, 6953, 6455, 0, + 9979, 6963, 8408, 6971, 6473, 0, PCI_VENDOR_ASUSTEK, PCI_PRODUCT_ASUSTEK_HFCPCI, - 9891, 0, + 9987, 0, PCI_VENDOR_ATTANSIC, PCI_PRODUCT_ATTANSIC_ETHERNET_L1E, - 9896, 5709, 5717, 5909, 0, + 9992, 5727, 5735, 5927, 0, PCI_VENDOR_ATTANSIC, PCI_PRODUCT_ATTANSIC_ETHERNET_GIGA, - 9900, 5709, 5717, 5909, 0, + 9996, 5727, 5735, 5927, 0, PCI_VENDOR_ATTANSIC, PCI_PRODUCT_ATTANSIC_AR8132, - 9903, 9910, 2430, 5717, 5909, 0, + 9999, 10006, 2430, 5735, 5927, 0, PCI_VENDOR_ATTANSIC, PCI_PRODUCT_ATTANSIC_AR8131, - 9914, 9921, 5709, 5717, 5909, 0, + 10010, 10017, 5727, 5735, 5927, 0, PCI_VENDOR_ATTANSIC, PCI_PRODUCT_ATTANSIC_AR8151, - 9925, 9932, 9937, 5709, 5717, 5909, 0, + 10021, 10028, 10033, 5727, 5735, 5927, 0, PCI_VENDOR_ATTANSIC, PCI_PRODUCT_ATTANSIC_AR8151_V2, - 9925, 9941, 9937, 5709, 5717, 5909, 0, + 10021, 10037, 10033, 5727, 5735, 5927, 0, PCI_VENDOR_ATTANSIC, PCI_PRODUCT_ATTANSIC_AR8162, - 9946, 0, + 10042, 0, PCI_VENDOR_ATTANSIC, PCI_PRODUCT_ATTANSIC_AR8161, - 9953, 0, + 10049, 0, PCI_VENDOR_ATTANSIC, PCI_PRODUCT_ATTANSIC_AR8172, - 9960, 0, + 10056, 0, PCI_VENDOR_ATTANSIC, PCI_PRODUCT_ATTANSIC_AR8171, - 9967, 0, + 10063, 0, PCI_VENDOR_ATTANSIC, PCI_PRODUCT_ATTANSIC_ETHERNET_100, - 9974, 6142, 9977, 5717, 5909, 0, + 10070, 6160, 10073, 5735, 5927, 0, PCI_VENDOR_ATTANSIC, PCI_PRODUCT_ATTANSIC_AR8152_B, - 9982, 9989, 9910, 2430, 5717, 5909, 0, + 10078, 10085, 10006, 2430, 5735, 5927, 0, PCI_VENDOR_ATTANSIC, PCI_PRODUCT_ATTANSIC_AR8152_B2, - 9982, 9941, 9910, 2430, 5717, 5909, 0, + 10078, 10037, 10006, 2430, 5735, 5927, 0, PCI_VENDOR_ATTANSIC, PCI_PRODUCT_ATTANSIC_E2200, - 9994, 10001, 0, + 10090, 10097, 0, PCI_VENDOR_ATTANSIC, PCI_PRODUCT_ATTANSIC_E2400, - 9994, 10007, 0, + 10090, 10103, 0, PCI_VENDOR_ATTANSIC, PCI_PRODUCT_ATTANSIC_E2500, - 9994, 10013, 0, + 10090, 10109, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_KAVERI_HDMI, - 10019, 10026, 7054, 0, + 10115, 10122, 7072, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_KAVERI_R7_1, - 10019, 10031, 10038, 10041, 0, + 10115, 10127, 10134, 10137, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_WRESTLER_HDMI, - 10050, 10026, 7054, 0, + 10146, 10122, 7072, 0, + PCI_VENDOR_ATI, PCI_PRODUCT_ATI_NAVI_PCIE_1, + 10155, 8237, 8853, 8860, 8186, 0, + PCI_VENDOR_ATI, PCI_PRODUCT_ATI_NAVI_PCIE_2, + 10155, 8237, 8853, 8869, 8186, 0, + PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_RAVEN_RIDGE, + 10160, 3961, 10127, 10166, 10171, 6494, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_BEAVERCREEK_HDMI, - 10059, 10026, 7054, 0, + 10180, 10122, 7072, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_RV380_3150, - 10031, 10071, 10080, 10085, 10091, 0, + 10127, 10192, 10201, 10206, 10212, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_RV380_3154, - 10096, 10103, 10107, 10110, 0, + 10217, 10224, 10228, 10231, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_RV380_3E50, - 10031, 10080, 10115, 10123, 0, + 10127, 10201, 10236, 10244, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_RV380_3E54, - 10096, 10128, 10115, 10134, 0, + 10217, 10249, 10236, 10255, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_RS100_4136, - 10031, 10139, 10146, 10151, 0, + 10127, 10260, 10267, 10272, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_RS200_A7, - 10031, 10156, 10171, 10176, 0, + 10127, 10277, 10292, 10297, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R300_AD, - 10031, 10181, 10186, 0, + 10127, 10302, 10307, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R300_AE, - 10031, 10181, 10189, 0, + 10127, 10302, 10310, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R300_AF, - 10031, 10192, 10199, 0, + 10127, 10313, 10320, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R300_AG, - 10096, 10202, 521, 0, + 10217, 10323, 521, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R350_AH, - 10031, 10205, 10212, 0, + 10127, 10326, 10333, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R350_AI, - 10031, 10215, 10220, 0, + 10127, 10336, 10341, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R350_AJ, - 10031, 10215, 10223, 0, + 10127, 10336, 10344, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R350_AK, - 10096, 10226, 10229, 0, + 10217, 10347, 10350, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_RV350_AP, - 10031, 10232, 10237, 0, + 10127, 10353, 10358, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_RV350_AQ, - 10031, 10240, 10247, 0, + 10127, 10361, 10368, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_RV360_AR, - 10031, 10250, 10257, 0, + 10127, 10371, 10378, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_RV350_AS, - 10031, 10232, 10260, 0, + 10127, 10353, 10381, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_RV350_AT, - 10096, 10263, 10266, 0, + 10217, 10384, 10387, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_RV350_AV, - 10096, 10269, 10275, 0, + 10217, 10390, 10396, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_MACH32, - 10278, 0, + 10399, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_9600_LE_S, - 10031, 10232, 10285, 8323, 0, + 10127, 10353, 10406, 8356, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_9600_XT_S, - 10031, 10232, 10288, 8323, 0, + 10127, 10353, 10409, 8356, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_RS250_B7, - 10031, 10291, 10296, 10300, 0, + 10127, 10412, 10417, 10421, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R200_BB, - 10031, 10306, 10311, 10315, 0, + 10127, 10427, 10432, 10436, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R200_BC, - 10031, 10306, 10311, 10318, 0, + 10127, 10427, 10432, 10439, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_RS100_4336, - 10031, 10321, 10329, 10334, 0, + 10127, 10442, 10450, 10455, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_RS200_4337, - 10031, 10339, 10357, 10362, 0, + 10127, 10460, 10478, 10483, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_IXP_AUDIO_200, - 10367, 10371, 7054, 6455, 0, + 10488, 10492, 7072, 6473, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB200_PPB, - 10377, 8791, 6563, 0, + 10498, 8887, 6581, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB200_EHCI, - 10377, 10383, 6953, 6455, 0, + 10498, 10504, 6971, 6473, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB200_OHCI_1, - 10377, 6945, 6953, 6455, 0, + 10498, 6963, 6971, 6473, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB200_OHCI_2, - 10377, 6945, 6953, 6455, 0, + 10498, 6963, 6971, 6473, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_IXP_IDE_200, - 10377, 10367, 6626, 6455, 0, + 10498, 10488, 6644, 6473, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB200_ISA, - 10377, 6837, 6563, 0, + 10498, 6855, 6581, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB200_MODEM, - 10377, 5764, 0, + 10498, 5782, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB200_SMB, - 10377, 8962, 6455, 0, + 10498, 9058, 6473, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_MACH64_CT, - 10388, 10395, 0, + 10509, 10516, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_MACH64_CX, - 10388, 10398, 0, + 10509, 10519, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_IXP_AUDIO_300, - 10367, 10371, 7054, 6455, 0, + 10488, 10492, 7072, 6473, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB300_SMB, - 10401, 8962, 6455, 0, + 10522, 9058, 6473, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_IXP_IDE_300, - 10401, 10367, 6626, 6455, 0, + 10522, 10488, 6644, 6473, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_IXP_SATA_300, - 10407, 8762, 6455, 0, + 10528, 8800, 6473, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_IXP_AUDIO_400, - 10367, 10371, 7054, 6455, 0, + 10488, 10492, 7072, 6473, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB400_PPB, - 10414, 8791, 6563, 0, + 10535, 8887, 6581, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB400_SMB, - 10414, 8962, 6455, 0, + 10535, 9058, 6473, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB400_EHCI, - 10414, 10383, 6953, 6455, 0, + 10535, 10504, 6971, 6473, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB400_OHCI_1, - 10414, 6945, 6953, 6455, 0, + 10535, 6963, 6971, 6473, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB400_OHCI_2, - 10414, 6945, 6953, 6455, 0, + 10535, 6963, 6971, 6473, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_IXP_IDE_400, - 10414, 10367, 6626, 6455, 0, + 10535, 10488, 6644, 6473, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB400_ISA, - 10414, 6837, 6563, 0, + 10535, 6855, 6581, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB400_MODEM, - 10414, 5764, 0, + 10535, 5782, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB400_SATA_1, - 10414, 8762, 6455, 0, + 10535, 8800, 6473, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB400_SATA_2, - 10414, 8762, 6455, 0, + 10535, 8800, 6473, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB600_SATA_1, - 10420, 8762, 6455, 0, + 10541, 8800, 6473, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB600_SATA_2, - 10420, 8762, 6455, 0, + 10541, 8800, 6473, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB600_AC97_AUDIO, - 10420, 8872, 7054, 0, + 10541, 8968, 7072, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB600_AZALIA, - 10426, 10432, 0, + 10547, 10553, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB600_PPB, - 10426, 615, 7009, 615, 6563, 0, + 10547, 615, 7027, 615, 6581, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB600_SMB, - 10426, 8962, 6455, 0, + 10547, 9058, 6473, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB600_USB_EHCI, - 10420, 6945, 8727, 6455, 0, + 10541, 6963, 8760, 6473, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB600_USB_OHCI0, - 10420, 6945, 10439, 6455, 0, + 10541, 6963, 10560, 6473, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB600_USB_OHCI1, - 10420, 6945, 10445, 6455, 0, + 10541, 6963, 10566, 6473, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB600_USB_OHCI2, - 10420, 6945, 10451, 6455, 0, + 10541, 6963, 10572, 6473, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB600_USB_OHCI3, - 10420, 6945, 10457, 6455, 0, + 10541, 6963, 10578, 6473, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB600_USB_OHCI4, - 10420, 6945, 10463, 6455, 0, + 10541, 6963, 10584, 6473, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_IXP_IDE_600, - 10420, 10367, 6626, 6455, 0, + 10541, 10488, 6644, 6473, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB600_PLB_438D, - 10420, 615, 7009, 8958, 6563, 0, + 10541, 615, 7027, 9054, 6581, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB600_AC97_MODEM, - 10420, 8872, 5764, 0, + 10541, 8968, 5782, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB700_SATA_IDE, - 10469, 8762, 6455, 10481, 10486, 0, + 10590, 8800, 6473, 10602, 8830, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB700_SATA_AHCI, - 10469, 8762, 6455, 10492, 10486, 0, + 10590, 8800, 6473, 10607, 8830, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB700_SATA_RAID, - 10469, 6450, 8762, 6455, 0, + 10590, 6468, 8800, 6473, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB700_SATA_RAID5, - 10469, 10498, 8762, 6455, 0, + 10590, 10613, 8800, 6473, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB700_SATA_AHCI2, - 10469, 8762, 6455, 10492, 10486, 0, + 10590, 8800, 6473, 10607, 8830, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB700_SATA_STORAGE, - 10469, 8762, 6455, 10504, 10486, 0, + 10590, 8800, 6473, 10619, 8830, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB700_USB_EHCI, - 10469, 6945, 8727, 6455, 0, + 10590, 6963, 8760, 6473, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB700_USB_OHCI0, - 10469, 6945, 8722, 6455, 0, + 10590, 6963, 8755, 6473, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB700_USB_OHCI1, - 10469, 6945, 8722, 6455, 0, + 10590, 6963, 8755, 6473, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB700_USB_OHCI2, - 10469, 6945, 8722, 6455, 0, + 10590, 6963, 8755, 6473, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB700_IDE, - 10469, 6626, 6455, 0, + 10590, 6644, 6473, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB700_LPC, - 10469, 8958, 6953, 6455, 0, + 10590, 9054, 6971, 6473, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB700_PCIE0, - 10469, 615, 7009, 615, 10513, 10520, 9079, 0, + 10590, 615, 7027, 615, 10628, 10635, 9175, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB700_PCIE1, - 10469, 615, 7009, 615, 10513, 10520, 9097, 0, + 10590, 615, 7027, 615, 10628, 10635, 9193, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB900_PCIE2, - 10526, 615, 7009, 615, 10513, 10520, 9100, 0, + 10641, 615, 7027, 615, 10628, 10635, 9196, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB900_PCIE3, - 10526, 615, 7009, 615, 10513, 10520, 9103, 0, + 10641, 615, 7027, 615, 10628, 10635, 9199, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_RS250_D7, - 10031, 10071, 10291, 10296, 0, + 10127, 10192, 10412, 10417, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RAGE_PRO_AGP, - 5425, 10532, 7253, 10537, 0, + 5443, 10647, 7271, 10652, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RAGE_PRO_AGP1X, - 5425, 10532, 7253, 10543, 10548, 0, + 5443, 10647, 7271, 10658, 10663, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RAGE_PRO_PCI_B, - 5425, 10532, 7253, 10552, 0, + 5443, 10647, 7271, 10667, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RAGE_XC_PCI66, - 10532, 10558, 10561, 0, + 10647, 10673, 10676, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RAGE_XL_AGP, - 10532, 5807, 10537, 0, + 10647, 5825, 10652, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RAGE_XC_AGP, - 10532, 10558, 10537, 0, + 10647, 10673, 10652, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RAGE_XL_PCI66, - 10532, 5807, 10561, 0, + 10647, 5825, 10676, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RAGE_PRO_PCI_P, - 5425, 10532, 7253, 0, + 5443, 10647, 7271, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RAGE_PRO_PCI_L, - 5425, 10532, 7253, 10569, 10578, 0, + 5443, 10647, 7271, 10684, 10693, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RAGE_XL_PCI, - 10532, 5807, 0, + 10647, 5825, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RAGE_XC_PCI, - 10532, 10558, 0, + 10647, 10673, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RAGE_II, - 5425, 10532, 10582, 0, + 5443, 10647, 10697, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RAGE_IIP, - 5425, 10532, 10587, 0, + 5443, 10647, 10702, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RAGE_IIC_PCI, - 5425, 10532, 10591, 0, + 5443, 10647, 10706, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RAGE_IIC_AGP_B, - 5425, 10532, 10591, 10537, 0, + 5443, 10647, 10706, 10652, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_MACH64_GX, - 10388, 10595, 0, + 10509, 10710, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RAGE_IIC, - 5425, 10532, 10591, 0, + 5443, 10647, 10706, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RAGE_IIC_AGP_P, - 5425, 10532, 10591, 10537, 0, + 5443, 10647, 10706, 10652, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_RV250_4966, - 10031, 10598, 10607, 0, + 10127, 10713, 10722, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_RV250_4967, - 10031, 6483, 10610, 0, + 10127, 6501, 10725, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R420_JH, - 10031, 10613, 10618, 10625, 0, + 10127, 10728, 10733, 10740, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R420_JI, - 10031, 10628, 10618, 10636, 0, + 10127, 10743, 10733, 10751, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R420_JJ, - 10031, 10639, 10618, 10646, 0, + 10127, 10754, 10733, 10761, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R420_JK, - 10031, 10613, 10618, 10649, 0, + 10127, 10728, 10733, 10764, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R420_JL, - 10031, 10613, 10618, 10652, 0, + 10127, 10728, 10733, 10767, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R420_JM, - 10096, 10655, 10618, 10658, 0, + 10217, 10770, 10733, 10773, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R420_JN, - 10031, 10071, 10215, 10661, 10667, 0, + 10127, 10192, 10336, 10776, 10782, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R420_JP, - 10031, 10670, 10618, 10677, 0, + 10127, 10785, 10733, 10792, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RAGE_LT_PRO_AGP, - 5425, 10532, 10680, 7253, 10543, 10683, 0, + 5443, 10647, 10795, 7271, 10658, 10798, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RAGE_LT_PRO_AGP66, - 5425, 10532, 10680, 7253, 10543, 10691, 0, + 5443, 10647, 10795, 7271, 10658, 10806, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RAGE_MOB_M3_PCI, - 10532, 10071, 10698, 0, + 10647, 10192, 10813, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RAGE_MOB_M3_AGP, - 10532, 10071, 10698, 10537, 0, + 10647, 10192, 10813, 10652, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RAGE_LT, - 5425, 10532, 10680, 0, + 5443, 10647, 10795, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RAGE_LT_PRO_PCI, - 5425, 10532, 10680, 7253, 0, + 5443, 10647, 10795, 7271, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RAGE_MOBILITY, - 10532, 10071, 0, + 10647, 10192, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RAGE_L_MOBILITY, - 10532, 10701, 10071, 0, + 10647, 10816, 10192, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RAGE_LT_PRO, - 5425, 10532, 10680, 7253, 0, + 5443, 10647, 10795, 7271, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RAGE_LT_PRO2, - 5425, 10532, 10680, 7253, 0, + 5443, 10647, 10795, 7271, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RAGE_MOB_M1_PCI, - 10532, 10071, 10703, 10706, 0, + 10647, 10192, 10818, 10821, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RAGE_L_MOB_M1_PCI, - 10532, 10701, 10071, 10706, 0, + 10647, 10816, 10192, 10821, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_RV200_LW, - 10031, 10071, 10712, 10715, 0, + 10127, 10192, 10827, 10830, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_RV200_LX, - 10096, 10071, 10718, 10712, 8676, 0, + 10217, 10192, 10833, 10827, 8709, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_RV100_LY, - 10031, 10071, 10723, 10726, 0, + 10127, 10192, 10838, 10841, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_RV100_LZ, - 10031, 10071, 10723, 10729, 0, + 10127, 10192, 10838, 10844, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_RV250_4C64, - 10096, 10071, 6483, 10732, 10737, 0, + 10217, 10192, 6501, 10847, 10852, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_RV250_4C66, - 10031, 10071, 6483, 10732, 10740, 0, + 10127, 10192, 6501, 10847, 10855, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_RV250_4C67, - 10031, 10071, 6483, 10732, 10743, 0, + 10127, 10192, 6501, 10847, 10858, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_128_AGP4X, - 10031, 10071, 10746, 8804, 10750, 0, + 10127, 10192, 10861, 8900, 10865, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_128_AGP2X, - 10031, 10071, 10746, 8804, 10753, 0, + 10127, 10192, 10861, 8900, 10868, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R300_ND, - 10031, 10756, 10761, 0, + 10127, 10871, 10876, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R300_NE, - 10031, 10764, 10777, 0, + 10127, 10879, 10892, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R300_NF, - 10031, 10756, 10780, 0, + 10127, 10871, 10895, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R300_NG, - 10096, 10783, 10786, 0, + 10217, 10898, 10901, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R350_NH, - 10031, 10789, 10797, 0, + 10127, 10904, 10912, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R350_NI, - 10031, 10215, 10800, 0, + 10127, 10336, 10915, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R360_NJ, - 10031, 10803, 10810, 0, + 10127, 10918, 10925, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R350_NK, - 10096, 10226, 10813, 0, + 10217, 10347, 10928, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_RV350_NP, - 10031, 10071, 10816, 10826, 10835, 0, + 10127, 10192, 10931, 10941, 10950, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_RV350_NQ, - 10031, 10071, 10232, 10838, 10844, 0, + 10127, 10192, 10353, 10953, 10959, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_RV350_NR, - 10031, 10071, 10232, 10847, 10853, 0, + 10127, 10192, 10353, 10962, 10968, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_RV350_NS, - 10031, 10071, 10232, 10838, 10856, 0, + 10127, 10192, 10353, 10953, 10971, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_RV350_NT, - 10096, 10071, 10263, 10838, 10859, 0, + 10217, 10192, 10384, 10953, 10974, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_RV350_NV, - 10096, 10071, 10862, 10847, 10866, 0, + 10217, 10192, 10977, 10962, 10981, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_9700_9500_S, - 10031, 10869, 6476, 8323, 0, + 10127, 10984, 6494, 8356, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_9700_9500_S2, - 10031, 10869, 6476, 8323, 0, + 10127, 10984, 6494, 8356, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_9600_2, - 10031, 10192, 8323, 0, + 10127, 10313, 8356, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_9800_PRO_2, - 10031, 10215, 7253, 8323, 0, + 10127, 10336, 7271, 8356, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RAGE1PCI, - 10532, 10746, 7253, 615, 0, + 10647, 10861, 7271, 615, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RAGE1AGP2X, - 10532, 10746, 7253, 8804, 10753, 0, + 10647, 10861, 7271, 8900, 10868, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RAGE1AGP4X, - 10532, 10746, 7253, 8804, 10750, 0, + 10647, 10861, 7271, 8900, 10865, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RAGE1PCIT, - 10532, 10746, 7253, 615, 10879, 0, + 10647, 10861, 7271, 615, 10994, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RAGE1AGP2XT, - 10532, 10746, 7253, 8804, 10753, 10879, 0, + 10647, 10861, 7271, 8900, 10868, 10994, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RAGE1AGP4XT, - 10532, 10886, 10891, 8804, 10750, 10879, 0, + 10647, 11001, 11006, 8900, 10865, 10994, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RAGE2PCI, - 10532, 10746, 7253, 615, 0, + 10647, 10861, 7271, 615, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RAGE2AGP2X, - 10532, 10746, 7253, 8804, 10753, 0, + 10647, 10861, 7271, 8900, 10868, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RAGE2AGP4X, - 10532, 10746, 7253, 8804, 10750, 0, + 10647, 10861, 7271, 8900, 10865, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RAGE2PCIT, - 10532, 10746, 7253, 615, 10879, 0, + 10647, 10861, 7271, 615, 10994, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RAGE2AGP2XT, - 10532, 10746, 7253, 8804, 10753, 10879, 0, + 10647, 10861, 7271, 8900, 10868, 10994, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RAGE2AGP4XT, - 10532, 10746, 7253, 8804, 10750, 10879, 0, + 10647, 10861, 7271, 8900, 10865, 10994, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RAGE3PCI, - 10532, 10746, 7253, 615, 0, + 10647, 10861, 7271, 615, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RAGE3AGP2X, - 10532, 10746, 7253, 8804, 10753, 0, + 10647, 10861, 7271, 8900, 10868, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RAGE3AGP4X, - 10532, 10746, 7253, 8804, 10750, 0, + 10647, 10861, 7271, 8900, 10865, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RAGE3PCIT, - 10532, 10746, 7253, 615, 10879, 0, + 10647, 10861, 7271, 615, 10994, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RAGE3AGP2XT, - 10532, 10746, 7253, 8804, 10753, 10879, 0, + 10647, 10861, 7271, 8900, 10868, 10994, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RAGE3AGP4XT, - 10532, 10746, 7253, 8804, 10750, 10879, 0, + 10647, 10861, 7271, 8900, 10865, 10994, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RAGE4PCI, - 10532, 10746, 7253, 615, 0, + 10647, 10861, 7271, 615, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RAGE4AGP2X, - 10532, 10746, 7253, 8804, 10753, 0, + 10647, 10861, 7271, 8900, 10868, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RAGE4AGP4X, - 10532, 10746, 7253, 8804, 10750, 0, + 10647, 10861, 7271, 8900, 10865, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RAGE4PCIT, - 10532, 10746, 7253, 615, 10879, 0, + 10647, 10861, 7271, 615, 10994, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RAGE4AGP2XT, - 10532, 10746, 7253, 8804, 10753, 10879, 0, + 10647, 10861, 7271, 8900, 10868, 10994, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RAGE4AGP4XT, - 10532, 10746, 7253, 8804, 10750, 10879, 0, + 10647, 10861, 7271, 8900, 10865, 10994, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R100_QD, - 10031, 10896, 0, + 10127, 11011, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R100_QE, - 10031, 10899, 0, + 10127, 11014, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R100_QF, - 10031, 10902, 0, + 10127, 11017, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R100_QG, - 10031, 10905, 0, + 10127, 11020, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R200_QH, - 10096, 10908, 10918, 0, + 10217, 11023, 11033, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R200_QL, - 10031, 10306, 10921, 0, + 10127, 10427, 11036, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R200_QM, - 10031, 10924, 10929, 0, + 10127, 11039, 11044, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_RV200_QW, - 10031, 10932, 10937, 0, + 10127, 11047, 11052, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_RV200_QX, - 10031, 10932, 10940, 0, + 10127, 11047, 11055, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_RV100_QY, - 10031, 10943, 10951, 0, + 10127, 11058, 11066, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_RV100_QZ, - 10031, 10943, 10954, 0, + 10127, 11058, 11069, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_ES1000, - 10957, 0, + 11072, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_9100_S, - 10031, 10924, 6476, 8323, 0, + 10127, 11039, 6494, 8356, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RAGEGLPCI, - 10532, 10746, 10107, 615, 0, + 10647, 10861, 10228, 615, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RAGEGLAGP, - 10532, 10746, 10107, 8804, 10753, 0, + 10647, 10861, 10228, 8900, 10868, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RAGEVRPCI, - 10532, 10746, 10964, 615, 0, + 10647, 10861, 11079, 615, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RAGEVRAGP, - 10532, 10746, 10964, 8804, 10753, 0, + 10647, 10861, 11079, 8900, 10868, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RAGE4XPCI, - 10532, 10746, 10750, 615, 0, + 10647, 10861, 10865, 615, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RAGE4XA2X, - 10532, 10746, 10750, 8804, 10753, 0, + 10647, 10861, 10865, 8900, 10868, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RAGE4XA4X, - 10532, 10746, 10750, 8804, 10750, 0, + 10647, 10861, 10865, 8900, 10865, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RAGE4X, - 10532, 10746, 10750, 0, + 10647, 10861, 10865, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RAGE24XPCI, - 10532, 10746, 10750, 615, 0, + 10647, 10861, 10865, 615, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RAGE24XA2X, - 10532, 10746, 10750, 8804, 10753, 0, + 10647, 10861, 10865, 8900, 10868, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RAGE24XA4X, - 10532, 10746, 10750, 8804, 10750, 0, + 10647, 10861, 10865, 8900, 10865, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RAGE24X, - 10532, 10746, 10750, 0, + 10647, 10861, 10865, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RAGE128PROULTRATF, - 10532, 10746, 7253, 7147, 10967, 8804, 0, + 10647, 10861, 7271, 7165, 11082, 8900, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_RV370_5460, - 10031, 10071, 10970, 10975, 10981, 0, + 10127, 10192, 11085, 11090, 11096, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_RV370_5464, - 10096, 10986, 10107, 10990, 0, + 10217, 11101, 10228, 11105, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R423_UH, - 10031, 10613, 10995, 11002, 0, + 10127, 10728, 11110, 11117, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R423_UI, - 10031, 10628, 10995, 11005, 0, + 10127, 10743, 11110, 11120, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R423_UJ, - 10031, 11008, 10995, 11015, 0, + 10127, 11123, 11110, 11130, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R423_UK, - 10031, 10639, 10995, 11018, 0, + 10127, 10754, 11110, 11133, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R430_554F, - 10031, 10613, 11021, 11025, 11032, 0, + 10127, 10728, 11136, 11140, 11147, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R423_UQ, - 10096, 11037, 10995, 11043, 0, + 10217, 11152, 11110, 11158, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R423_UR, - 10096, 11046, 10995, 11052, 0, + 10217, 11161, 11110, 11167, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R423_UT, - 10096, 11055, 10995, 11061, 0, + 10217, 11170, 11110, 11176, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R430_556F, - 10031, 10613, 11021, 11025, 8323, 0, + 10127, 10728, 11136, 11140, 8356, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_MACH64_VT, - 10388, 11064, 0, + 10509, 11179, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_MACH64_VTB, - 10388, 11067, 0, + 10509, 11182, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_MACH64_VT4, - 10388, 11071, 0, + 10509, 11186, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RS300_HB, - 11075, 6953, 6563, 0, + 11190, 6971, 6581, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_RS300_X4, - 10031, 10924, 10296, 10171, 0, + 10127, 11039, 10417, 10292, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_RS300_X5, - 10031, 10071, 10924, 10296, 11081, 0, + 10127, 10192, 11039, 10417, 11196, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RS300_AGP, - 11075, 8804, 3018, 0, + 11190, 8900, 3018, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_9200_PRO_S, - 10031, 11086, 7253, 8323, 0, + 10127, 11201, 7271, 8356, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_9200_S, - 10031, 11086, 8323, 0, + 10127, 11201, 8356, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RS480_HB, - 11091, 6953, 6563, 0, + 11206, 6971, 6581, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RD580, - 11097, 11103, 11113, 11120, 6953, 6563, 0, + 11212, 11218, 11228, 11235, 6971, 6581, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_RV370_5954, - 10031, 11113, 11125, 6476, 0, + 10127, 11228, 11240, 6494, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RD790_NB, - 11130, 8410, 6563, 11136, 11142, 0, + 11245, 8443, 6581, 11251, 11257, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RX780_790_HB, - 11148, 11160, 6953, 6563, 0, + 11263, 11275, 6971, 6581, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_RV280_5960, - 10031, 11168, 11176, 0, + 10127, 11283, 11291, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_RV280_5961, - 10031, 11086, 11181, 0, + 10127, 11201, 11296, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_RV280_5962, - 10031, 11086, 11186, 0, + 10127, 11201, 11301, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_RV280_5963, - 10031, 11086, 11191, 0, + 10127, 11201, 11306, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_RV280_5964, - 10031, 11196, 11203, 0, + 10127, 11311, 11318, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RS482M, - 10031, 11113, 6476, 11208, 0, + 10127, 11228, 6494, 11323, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RD790_PPB_GFX0_A, - 11130, 615, 6563, 11217, 8153, 11222, 0, + 11245, 615, 6581, 11332, 8186, 11337, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RD790_PPB_GFX0_B, - 11130, 615, 6563, 11217, 8153, 5171, 0, + 11245, 615, 6581, 11332, 8186, 5171, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RD790_PPB_GPP_A, - 11130, 615, 4320, 6563, 8174, 8153, 11222, 0, + 11245, 615, 4320, 6581, 8207, 8186, 11337, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RD790_PPB_GPP_B, - 11130, 615, 4320, 6563, 8174, 8153, 5171, 0, + 11245, 615, 4320, 6581, 8207, 8186, 5171, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RD790_PPB_GPP_C, - 11130, 615, 4320, 6563, 8174, 8153, 11224, 0, + 11245, 615, 4320, 6581, 8207, 8186, 11339, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RD790_PPB_GPP_D, - 11130, 615, 4320, 6563, 8174, 8153, 3154, 0, + 11245, 615, 4320, 6581, 8207, 8186, 3154, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RD790_PPB_GPP_E, - 11130, 615, 4320, 6563, 8174, 8153, 11226, 0, + 11245, 615, 4320, 6581, 8207, 8186, 11341, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RD790_PPB_GPP_F, - 11130, 615, 4320, 6563, 8174, 8153, 11228, 0, + 11245, 615, 4320, 6581, 8207, 8186, 11343, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RD790_PPB_GFX1_A, - 11130, 615, 6563, 11230, 8153, 11222, 0, + 11245, 615, 6581, 11345, 8186, 11337, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RD790_PPB_GFX1_B, - 11130, 615, 6563, 11230, 8153, 5171, 0, + 11245, 615, 6581, 11345, 8186, 5171, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RD790_PPB_NBSB, - 11130, 615, 6563, 9112, 11235, 0, + 11245, 615, 6581, 9208, 11350, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RD890_NB_DS16, - 11241, 8410, 6563, 11247, 11252, 11257, 11262, 0, + 11356, 8443, 6581, 11362, 11367, 11372, 11377, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RD890_NB_SS, - 11241, 8410, 6563, 6575, 11252, 11262, 0, + 11356, 8443, 6581, 6593, 11367, 11377, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RD890_NB_DS8, - 11241, 8410, 6563, 11247, 11252, 11266, 11262, 0, + 11356, 8443, 6581, 11362, 11367, 11381, 11377, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RD890_PPB_GFX0_A, - 11241, 615, 6563, 11217, 8153, 11222, 0, + 11356, 615, 6581, 11332, 8186, 11337, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RD890_PPB_GFX0_B, - 11241, 615, 6563, 11217, 8153, 5171, 0, + 11356, 615, 6581, 11332, 8186, 5171, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RD890_PPB_GPP_A, - 11241, 615, 4320, 6563, 8174, 8153, 11222, 0, + 11356, 615, 4320, 6581, 8207, 8186, 11337, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RD890_PPB_GPP_B, - 11241, 615, 4320, 6563, 8174, 8153, 5171, 0, + 11356, 615, 4320, 6581, 8207, 8186, 5171, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RD890_PPB_GPP_C, - 11241, 615, 4320, 6563, 8174, 8153, 11224, 0, + 11356, 615, 4320, 6581, 8207, 8186, 11339, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RD890_PPB_GPP_D, - 11241, 615, 4320, 6563, 8174, 8153, 3154, 0, + 11356, 615, 4320, 6581, 8207, 8186, 3154, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RD890_PPB_GPP_E, - 11241, 615, 4320, 6563, 8174, 8153, 11226, 0, + 11356, 615, 4320, 6581, 8207, 8186, 11341, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RD890_PPB_GPP_F, - 11241, 615, 4320, 6563, 8174, 8153, 11228, 0, + 11356, 615, 4320, 6581, 8207, 8186, 11343, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RD890_PPB_GPP_G, - 11241, 615, 4320, 6563, 8174, 8153, 11270, 0, + 11356, 615, 4320, 6581, 8207, 8186, 11385, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RD890_PPB_GPP_H, - 11241, 615, 4320, 6563, 8174, 8153, 11272, 0, + 11356, 615, 4320, 6581, 8207, 8186, 11387, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RD890_PPB_GFX1_A, - 11241, 615, 6563, 11230, 8153, 11222, 0, + 11356, 615, 6581, 11345, 8186, 11337, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RD890_PPB_GFX1_B, - 11241, 615, 6563, 11230, 8153, 5171, 0, + 11356, 615, 6581, 11345, 8186, 5171, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RD890_PPB_NBSB, - 11241, 615, 6563, 9112, 11235, 0, + 11356, 615, 6581, 9208, 11350, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RD890_IOMMU, - 11241, 8158, 0, + 11356, 8191, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_XPRESS_200, - 10031, 11113, 11274, 0, + 10127, 11228, 11389, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RS480_XRP, - 11091, 615, 4320, 8140, 8153, 0, + 11206, 615, 4320, 8173, 8186, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RS480_PPB_5A36, - 11091, 615, 4320, 6563, 0, + 11206, 615, 4320, 6581, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RS480_PPB_5A37, - 11091, 615, 4320, 6563, 0, + 11206, 615, 4320, 6581, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RS480_PPB_5A38, - 11091, 615, 4320, 6563, 0, + 11206, 615, 4320, 6581, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RS480_PPB_5A3F, - 11091, 615, 4320, 6563, 0, + 11206, 615, 4320, 6581, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_RV370_5B60, - 10031, 11278, 11283, 11291, 0, + 10127, 11393, 11398, 11406, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_RV380_5B62, - 10031, 10080, 615, 4320, 0, + 10127, 10201, 615, 4320, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_RV370_5B63, - 10031, 11296, 11305, 11310, 0, + 10127, 11411, 11420, 11425, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_RV370_5B64, - 10096, 11317, 11283, 11323, 0, + 10217, 11432, 11398, 11438, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_RV370_5B65, - 10096, 11328, 11283, 11334, 0, + 10217, 11443, 11398, 11449, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X300_S, - 10031, 11278, 6476, 8323, 0, + 10127, 11393, 6494, 8356, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_RV370_5B73, - 10031, 11339, 8323, 0, + 10127, 11454, 8356, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_RV280_5C61, - 10031, 10071, 11086, 11345, 0, + 10127, 10192, 11201, 11460, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_RV280_5C63, - 10031, 10071, 11086, 11345, 0, + 10127, 10192, 11201, 11460, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_9200SE_S, - 10031, 11196, 8323, 0, + 10127, 11311, 8356, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X850XT, - 10031, 11351, 10288, 0, + 10127, 11466, 10409, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R423_5D57, - 10031, 10670, 10995, 11356, 0, + 10127, 10785, 11110, 11471, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X850XT_S, - 10031, 11351, 10288, 8323, 0, + 10127, 11466, 10409, 8356, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X700, - 10031, 11361, 7253, 0, + 10127, 11476, 7271, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X700_S, - 10031, 11361, 7253, 8323, 0, + 10127, 11476, 7271, 8356, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD8670A_1, - 10031, 8230, 11366, 0, + 10127, 8263, 11481, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD8730M, - 10031, 8230, 11384, 0, + 10127, 8263, 11499, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R7_M265, - 10031, 10038, 11390, 0, + 10127, 10134, 11505, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R7_M260X, - 10031, 10038, 11406, 0, + 10127, 10134, 11521, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD8790M, - 10031, 8230, 11412, 0, + 10127, 8263, 11527, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD8530M, - 10031, 8230, 11418, 2173, 11424, 11427, 0, + 10127, 8263, 11533, 2173, 11539, 11542, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_FP_W2100, - 11432, 11440, 0, + 11547, 11555, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD8600, - 10031, 8230, 11446, 2173, 10038, 11451, 0, + 10127, 8263, 11561, 2173, 10134, 11566, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD8570, - 10031, 8230, 11459, 2173, 10038, 11464, 2173, 10031, 11472, 11476, 0, + 10127, 8263, 11574, 2173, 10134, 11579, 2173, 10127, 11587, 11591, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD8500, - 10031, 10038, 11464, 0, + 10127, 10134, 11579, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_FP_M6100, - 11432, 11480, 0, + 11547, 11595, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD8930M, - 10031, 8230, 11486, 0, + 10127, 8263, 11601, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R9M280X, - 10031, 11492, 11495, 0, + 10127, 11607, 11610, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R9M270X, - 10031, 11492, 11501, 0, + 10127, 11607, 11616, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_FP_W5100, - 11432, 11513, 0, + 11547, 11628, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R7_260X, - 10031, 10038, 11519, 0, + 10127, 10134, 11634, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD7790, - 10031, 8230, 11528, 2173, 10038, 11538, 2173, 11492, 11542, 11476, 0, + 10127, 8263, 11643, 2173, 10134, 11653, 2173, 11607, 11657, 11591, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R7_200, - 10031, 10038, 11274, 6476, 0, + 10127, 10134, 11389, 6494, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R7_360, - 10031, 10038, 11538, 2173, 11492, 11538, 11476, 0, + 10127, 10134, 11653, 2173, 11607, 11653, 11591, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD8670A_2, - 10031, 8230, 11550, 2173, 11424, 11568, 2173, 11573, 2173, 10031, 11472, 11578, 0, + 10127, 8263, 11665, 2173, 11539, 11683, 2173, 11688, 2173, 10127, 11587, 11693, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD8570A, - 10031, 8230, 11585, 0, + 10127, 8263, 11700, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R5_M240, - 10031, 11424, 11427, 0, + 10127, 11539, 11542, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R5_M230, - 10031, 11424, 11597, 2173, 10038, 11602, 2173, 10031, 11472, 11578, 0, + 10127, 11539, 11712, 2173, 10134, 11717, 2173, 10127, 11587, 11693, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R5_M230_2, - 10031, 11424, 11597, 0, + 10127, 11539, 11712, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD8550M, - 10031, 8230, 11609, 2173, 11424, 11597, 0, + 10127, 8263, 11724, 2173, 11539, 11712, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_INSTINCT, - 10031, 11615, 0, + 10127, 11730, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_VEGA20_1, - 11624, 11629, 0, + 10166, 11739, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_VEGA20_2, - 11624, 11629, 0, + 10166, 11739, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_VEGA20_3, - 11624, 11629, 0, + 10166, 11739, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_VEGA20_PRO, - 10031, 7253, 11624, 11629, 0, + 10127, 7271, 10166, 11739, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_VII_1, - 10031, 11632, 0, + 10127, 11742, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_FP_V7900, - 11432, 11636, 0, + 11547, 11746, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_FP_V5900, - 11432, 11642, 0, + 11547, 11752, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD6970, - 10031, 8230, 11648, 0, + 10127, 8263, 11758, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD6950, - 10031, 8230, 11653, 0, + 10127, 8263, 11763, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD6990_1, - 10031, 8230, 11658, 0, + 10127, 8263, 11768, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD6990_2, - 10031, 8230, 11658, 0, + 10127, 8263, 11768, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD6930, - 10031, 8230, 11663, 0, + 10127, 8263, 11773, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD6970M, - 10031, 8230, 11668, 0, + 10127, 8263, 11778, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD6900M, - 10031, 8230, 11680, 0, + 10127, 8263, 11790, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD6870, - 10031, 8230, 11686, 0, + 10127, 8263, 11796, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD6850, - 10031, 8230, 11691, 0, + 10127, 8263, 11801, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD6790, - 10031, 8230, 11696, 0, + 10127, 8263, 11806, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD6730M, - 10031, 8230, 11701, 10288, 0, + 10127, 8263, 11811, 10409, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD6600M, - 10031, 8230, 11719, 0, + 10127, 8263, 11829, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD6610M, - 10031, 8230, 11749, 0, + 10127, 8263, 11859, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_E6760, - 10031, 11761, 0, + 10127, 11871, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_FP_V4900, - 11432, 11767, 0, + 11547, 11877, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_FP_V4300, - 11432, 11773, 0, + 11547, 11883, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD6650A, - 10031, 8230, 11779, 0, + 10127, 8263, 11889, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD7670A, - 10031, 8230, 11791, 0, + 10127, 8263, 11901, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD6670, - 10031, 8230, 11803, 0, + 10127, 8263, 11913, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD6570, - 10031, 8230, 11813, 0, + 10127, 8263, 11923, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD7600, - 10031, 8230, 11828, 6476, 0, + 10127, 8263, 11938, 6494, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD7570, - 10031, 8230, 11833, 0, + 10127, 8263, 11943, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD6510, - 10031, 8230, 11838, 0, + 10127, 8263, 11948, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD6400M, - 10031, 8230, 11858, 6476, 0, + 10127, 8263, 11968, 6494, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD6430M, - 10031, 8230, 11870, 0, + 10127, 8263, 11980, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_B6460, - 10031, 11876, 0, + 10127, 11986, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD6400M_1, - 10031, 8230, 11882, 0, + 10127, 8263, 11992, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD6400M_2, - 10031, 8230, 11882, 0, + 10127, 8263, 11992, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD6450A, - 10031, 8230, 11888, 0, + 10127, 8263, 11998, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD8490, - 10031, 8230, 11900, 2173, 11424, 11905, 11476, 0, + 10127, 8263, 12010, 2173, 11539, 12015, 11591, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD7450A, - 10031, 8230, 11910, 0, + 10127, 8263, 12020, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD7470, - 10031, 8230, 11916, 2173, 11424, 11926, 11476, 0, + 10127, 8263, 12026, 2173, 11539, 12036, 11591, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD6450, - 10031, 8230, 11934, 2173, 11424, 11949, 11476, 0, + 10127, 8263, 12044, 2173, 11539, 12059, 11591, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD7450, - 10031, 8230, 11953, 0, + 10127, 8263, 12063, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_FPW9000, - 11432, 11958, 0, + 11547, 12068, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_FPSGA_1, - 11432, 6476, 1716, 5909, 0, + 11547, 6494, 1716, 5927, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_FPSGA_2, - 11432, 6476, 1716, 5909, 0, + 11547, 6494, 1716, 5927, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_FPS_1, - 11432, 6476, 0, + 11547, 6494, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD7970, - 10031, 8230, 11964, 11476, 2173, 11492, 11974, 0, + 10127, 8263, 12074, 11591, 2173, 11607, 12084, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD7900, - 10031, 8230, 11979, 0, + 10127, 8263, 12089, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD7950, - 10031, 8230, 11984, 11476, 2173, 11492, 11994, 0, + 10127, 8263, 12094, 11591, 2173, 11607, 12104, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD7990, - 10031, 8230, 11998, 11476, 0, + 10127, 8263, 12108, 11591, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD7870XT, - 10031, 8230, 12008, 10288, 0, + 10127, 8263, 12118, 10409, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_FPW9100, - 11432, 12013, 0, + 11547, 12123, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_FPW8100, - 11432, 12019, 0, + 11547, 12129, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R9290X_1, - 10031, 11492, 12025, 0, + 10127, 11607, 12135, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R9290, - 10031, 11492, 12035, 0, + 10127, 11607, 12145, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R9295X2, - 10031, 11492, 12043, 0, + 10127, 11607, 12153, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R9290X_2, - 10031, 7253, 12049, 12052, 11578, 0, + 10127, 7271, 12159, 12162, 11693, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_V7300X_1, - 10031, 7253, 12057, 2173, 12064, 0, + 10127, 7271, 12167, 2173, 12174, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_WX7100, - 10031, 7253, 12049, 12052, 0, + 10127, 7271, 12159, 12162, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_WX5100, - 10031, 7253, 12049, 12072, 0, + 10127, 7271, 12159, 12182, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_POLARIS10_1, - 12077, 0, + 12187, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_POLARIS10_2, - 12077, 0, + 12187, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_POLARIS10_3, - 12077, 0, + 12187, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_V7300X_2, - 10031, 7253, 12057, 2173, 12064, 0, + 10127, 7271, 12167, 2173, 12174, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_RX470, - 10031, 12087, 12090, 0, + 10127, 12197, 12200, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_WX4170, - 10031, 7253, 12049, 12120, 0, + 10127, 7271, 12159, 12230, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_WX4100, - 10031, 7253, 12049, 12125, 0, + 10127, 7271, 12159, 12235, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_WX4130, - 10031, 7253, 12049, 12130, 0, + 10127, 7271, 12159, 12240, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_POLARIS11, - 12140, 0, + 12250, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_V5300X, - 10031, 7253, 12150, 0, + 10127, 7271, 12260, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_RX460, - 10031, 12087, 12157, 2173, 7253, 12166, 0, + 10127, 12197, 12267, 2173, 7271, 12276, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_RX550_2, - 10031, 12087, 12196, 12200, 2173, 12087, 12206, 0, + 10127, 12197, 12306, 12310, 2173, 12197, 12316, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD7970M, - 10031, 8230, 12215, 0, + 10127, 8263, 12325, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD8970M, - 10031, 8230, 12221, 0, + 10127, 8263, 12331, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_FPW7000, - 11432, 12227, 0, + 11547, 12337, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_FPW5000, - 11432, 12233, 0, + 11547, 12343, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R7370_1, - 10031, 10038, 12239, 2173, 11492, 12243, 0, + 10127, 10134, 12349, 2173, 11607, 12353, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R7370_2, - 10031, 10038, 12239, 2173, 11492, 12253, 11476, 0, + 10127, 10134, 12349, 2173, 11607, 12363, 11591, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD7870G, - 10031, 8230, 12008, 12261, 12265, 0, + 10127, 8263, 12118, 12371, 12375, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD7850, - 10031, 8230, 12273, 2173, 10038, 12278, 2173, 11492, 12282, 12286, 0, + 10127, 8263, 12383, 2173, 10134, 12388, 2173, 11607, 12392, 12396, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD8890M, - 10031, 8230, 12293, 2173, 11492, 12299, 0, + 10127, 8263, 12403, 2173, 11607, 12409, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD8870M, - 10031, 8230, 12311, 2173, 11492, 12317, 0, + 10127, 8263, 12421, 2173, 11607, 12427, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_E8860, - 10031, 12329, 0, + 10127, 12439, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD8850M, - 10031, 8230, 12335, 2173, 11492, 12341, 0, + 10127, 8263, 12445, 2173, 11607, 12451, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD7870M, - 10031, 8230, 12347, 0, + 10127, 8263, 12457, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD7700M_1, - 10031, 8230, 12353, 6476, 0, + 10127, 8263, 12463, 6494, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD7850M, - 10031, 8230, 12359, 0, + 10127, 8263, 12469, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_FPW600, - 11432, 12371, 0, + 11547, 12481, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD8800M, - 10031, 8230, 12376, 2173, 10038, 12382, 2173, 10038, 12386, 0, + 10127, 8263, 12486, 2173, 10134, 12492, 2173, 10134, 12496, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_FPW5100, - 11432, 12392, 0, + 11547, 12502, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_FPM4000, - 11432, 12398, 0, + 11547, 12508, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD7730M, - 10031, 8230, 12404, 0, + 10127, 8263, 12514, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD7800M, - 10031, 8230, 12410, 0, + 10127, 8263, 12520, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD7700M_2, - 10031, 8230, 12353, 0, + 10127, 8263, 12463, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R9255, - 10031, 11492, 12416, 11476, 0, + 10127, 11607, 12526, 11591, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD7730, - 10031, 8230, 12420, 0, + 10127, 8263, 12530, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD7700, - 10031, 8230, 12430, 0, + 10127, 8263, 12540, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD7770, - 10031, 8230, 12435, 2173, 10038, 12445, 0, + 10127, 8263, 12545, 2173, 10134, 12555, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD7750, - 10031, 8230, 12450, 2173, 10038, 12460, 0, + 10127, 8263, 12560, 2173, 10134, 12570, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD7600M, - 10031, 8230, 12465, 6476, 0, + 10127, 8263, 12575, 6494, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD7550M, - 10031, 8230, 12477, 0, + 10127, 8263, 12587, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD7000M, - 10031, 8230, 12495, 6476, 0, + 10127, 8263, 12605, 6494, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD7670M, - 10031, 8230, 12501, 0, + 10127, 8263, 12611, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD7400, - 10031, 8230, 12507, 0, + 10127, 8263, 12617, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_INSTMI25, - 10031, 11615, 12512, 0, + 10127, 11730, 12622, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_WX9100, - 10031, 12517, 12049, 10924, 0, + 10127, 12627, 12159, 11039, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_PROSSG, - 10031, 12517, 12521, 0, + 10127, 12627, 12631, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_VEGAFE, - 10031, 11624, 12525, 12265, 0, + 10127, 10166, 12635, 12375, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_PROV340, - 10031, 7253, 12534, 0, + 10127, 7271, 12644, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_VEGA56, - 10031, 7253, 11624, 12539, 0, + 10127, 7271, 10166, 12649, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_PROWX8100, - 10031, 12517, 12049, 12542, 0, + 10127, 12627, 12159, 12652, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_INSTMI25Mx, - 10031, 11615, 12512, 12552, 0, + 10127, 11730, 12622, 12662, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_RXVEGA56, - 10031, 12087, 11624, 12558, 0, + 10127, 12197, 10166, 12668, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD6550M, - 10031, 8230, 12564, 0, + 10127, 8263, 12674, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_FPV8800, - 11432, 12570, 0, + 11547, 12680, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_FPV7800, - 11432, 12576, 0, + 11547, 12686, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_FPV9800, - 11432, 12582, 0, + 11547, 12692, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_FS9370, - 12588, 12599, 0, + 12698, 12709, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_FS9350, - 12588, 12604, 0, + 12698, 12714, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD5870, - 10031, 8230, 12609, 0, + 10127, 8263, 12719, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD5850, - 10031, 8230, 12614, 0, + 10127, 8263, 12724, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD6800, - 10031, 8230, 12619, 6476, 0, + 10127, 8263, 12729, 6494, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD5970_1, - 10031, 8230, 12624, 0, + 10127, 8263, 12734, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD5970_2, - 10031, 8230, 12624, 0, + 10127, 8263, 12734, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD5830, - 10031, 8230, 12629, 0, + 10127, 8263, 12739, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD5870M, - 10071, 10031, 8230, 12609, 0, + 10192, 10127, 8263, 12719, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD5850M, - 10071, 10031, 8230, 12614, 0, + 10192, 10127, 8263, 12724, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD6850M, - 10031, 8230, 12634, 0, + 10127, 8263, 12744, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_FPV5800_1, - 11432, 12646, 0, + 11547, 12756, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_FPV5800_2, - 11432, 12646, 0, + 11547, 12756, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD5670_1, - 10031, 8230, 12652, 12200, 12265, 0, + 10127, 8263, 12762, 12310, 12375, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD6770, - 10031, 8230, 12657, 0, + 10127, 8263, 12767, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD5750, - 10031, 8230, 12662, 0, + 10127, 8263, 12772, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD6750, - 10031, 8230, 12667, 0, + 10127, 8263, 12777, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD5730M, - 10071, 10031, 8230, 12672, 2173, 12677, 0, + 10192, 10127, 8263, 12782, 2173, 12787, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD5650M, - 10071, 10031, 8230, 12683, 2173, 12693, 0, + 10192, 10127, 8263, 12793, 2173, 12803, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD5570M, - 10071, 10031, 8230, 12705, 0, + 10192, 10127, 8263, 12815, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_FP4800, - 11432, 12716, 0, + 11547, 12826, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_FP3800, - 11432, 12722, 0, + 11547, 12832, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD5670_2, - 10031, 8230, 12728, 0, + 10127, 8263, 12838, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD5570, - 10031, 8230, 12743, 0, + 10127, 8263, 12853, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD5550, - 10031, 8230, 12773, 0, + 10127, 8263, 12883, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD5430_1, - 10071, 10031, 8230, 12803, 0, + 10192, 10127, 8263, 12913, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD5430_2, - 10071, 10031, 8230, 12818, 0, + 10192, 10127, 8263, 12928, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD6370M, - 10031, 8230, 12823, 0, + 10127, 8263, 12933, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD6330M, - 10031, 8230, 12835, 0, + 10127, 8263, 12945, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_FPGLGA, - 11432, 12841, 1716, 5909, 0, + 11547, 12951, 1716, 5927, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_FP2460, - 11432, 12850, 0, + 11547, 12960, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_FP2270, - 11432, 12855, 0, + 11547, 12965, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD7300, - 10031, 8230, 12860, 6476, 0, + 10127, 8263, 12970, 6494, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD5450, - 10031, 8230, 12865, 6476, 0, + 10127, 8263, 12975, 6494, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD7350, - 10031, 8230, 12885, 2173, 11424, 12895, 0, + 10127, 8263, 12995, 2173, 11539, 13005, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R7M260, - 10031, 10038, 12899, 2173, 12909, 2173, 12919, 2173, 12929, 2173, 12937, 11578, 0, + 10127, 10134, 13009, 2173, 13019, 2173, 13029, 2173, 13039, 2173, 13047, 11693, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R5M255, - 10031, 11424, 12945, 0, + 10127, 11539, 13055, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R5M315_1, - 10031, 11424, 12950, 0, + 10127, 11539, 13060, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R9M395, - 10031, 11492, 12955, 12961, 12967, 12265, 0, + 10127, 11607, 13065, 13071, 13077, 12375, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R9M295X, - 10031, 11492, 12971, 2173, 12977, 0, + 10127, 11607, 13081, 2173, 13087, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_FPS7150, - 11432, 12983, 0, + 11547, 13093, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_FPW7100, - 11432, 12989, 0, + 11547, 13099, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_FPS7150V, - 11432, 12995, 0, + 11547, 13105, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R9M380X, - 10031, 11492, 13002, 2173, 11492, 12971, 0, + 10127, 11607, 13112, 2173, 11607, 13081, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R9M285, - 10031, 11492, 13007, 0, + 10127, 11607, 13117, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_RXVEGAMGH, - 10031, 12087, 11624, 13015, 13017, 0, + 10127, 12197, 10166, 13125, 13127, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_RXVEGAMGL, - 10031, 12087, 11624, 13015, 10107, 0, + 10127, 12197, 10166, 13125, 10228, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_WXVEGAMGL, - 10031, 7253, 12049, 11624, 13015, 10107, 0, + 10127, 7271, 12159, 10166, 13125, 10228, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_WX3200, - 10031, 12517, 12049, 11120, 0, + 10127, 12627, 12159, 11235, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_WX3100, - 10031, 12517, 12049, 13020, 0, + 10127, 12627, 12159, 13130, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_540X, - 10031, 13025, 2173, 12087, 13039, 2173, 13043, 13049, 0, + 10127, 13135, 2173, 12197, 13149, 2173, 13153, 13159, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_WX2100, - 10031, 12517, 12049, 13053, 0, + 10127, 12627, 12159, 13163, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_540, - 10031, 13058, 2173, 12087, 13076, 0, + 10127, 13168, 2173, 12197, 13186, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_VEGA20, - 10031, 7253, 11624, 11629, 0, + 10127, 7271, 10166, 11739, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_RX580, - 10031, 12087, 13090, 13094, 0, + 10127, 12197, 13200, 13204, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X1800XT, - 10031, 13101, 10288, 0, + 10127, 13211, 10409, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X1800M_1, - 10071, 10031, 13101, 10288, 0, + 10192, 10127, 13211, 10409, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X1800M_2, - 10071, 10031, 13101, 0, + 10192, 10127, 13211, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_FGV7200_1, - 10096, 11037, 0, + 10217, 11152, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X1800XL, - 10031, 13101, 5807, 0, + 10127, 13211, 5825, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X1800GTO_1, - 10031, 13101, 11021, 0, + 10127, 13211, 11136, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X1800GTO_2, - 10031, 13101, 11021, 0, + 10127, 13211, 11136, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_FGV7300_1, - 10096, 13107, 0, + 10217, 13217, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_FGV7350_1, - 10096, 13113, 0, + 10217, 13223, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X1800_1, - 10031, 13101, 0, + 10127, 13211, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_FGV7200_2, - 10096, 11037, 0, + 10217, 11152, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X1800_2, - 10031, 13101, 0, + 10127, 13211, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_FGV7300_2, - 10096, 13107, 0, + 10217, 13217, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_FGV7350_2, - 10096, 13113, 0, + 10217, 13223, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X1300_1, - 10031, 13119, 6476, 0, + 10127, 13229, 6494, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X1300_2, - 10031, 13137, 6476, 0, + 10127, 13247, 6494, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X1300_3, - 10031, 13137, 6476, 0, + 10127, 13247, 6494, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X1400M, - 10071, 10031, 13149, 0, + 10192, 10127, 13259, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X1300_4, - 10031, 13137, 0, + 10127, 13247, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X1550_1, - 10031, 13155, 13161, 0, + 10127, 13265, 13271, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X1300_M1, - 10071, 10031, 13168, 0, + 10192, 10127, 13278, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X1300_M2, - 10071, 10031, 13168, 0, + 10192, 10127, 13278, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_GLV3300, - 10096, 13174, 0, + 10217, 13284, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_GLV3350, - 10096, 13180, 0, + 10217, 13290, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X1550_2, - 10031, 13155, 13161, 0, + 10127, 13265, 13271, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X1300_5, - 10031, 13137, 6476, 0, + 10127, 13247, 6494, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X1550_3, - 10031, 13155, 6476, 0, + 10127, 13265, 6494, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X1300_6, - 10031, 13168, 6476, 13186, 8323, 0, + 10127, 13278, 6494, 13296, 8356, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X1550_4, - 10031, 13155, 13161, 0, + 10127, 13265, 13271, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_FGV3300, - 10096, 13174, 0, + 10217, 13284, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_FGV3500, - 10096, 13180, 0, + 10217, 13290, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X1600_1, - 10031, 13194, 6476, 0, + 10127, 13304, 6494, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X1300_7, - 10031, 13137, 6476, 0, + 10127, 13247, 6494, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X1450_1, - 10071, 10031, 13206, 0, + 10192, 10127, 13316, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X1300_8, - 10031, 13137, 6476, 0, + 10127, 13247, 6494, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X2300_1, - 10071, 10031, 13212, 0, + 10192, 10127, 13322, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X2300_2, - 10071, 10031, 13212, 0, + 10192, 10127, 13322, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X1350_1, - 10071, 10031, 13218, 0, + 10192, 10127, 13328, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X1350_2, - 10071, 10031, 13218, 0, + 10192, 10127, 13328, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X1450_2, - 10071, 10031, 13206, 0, + 10192, 10127, 13316, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X1550_5, - 10031, 13155, 6476, 0, + 10127, 13265, 6494, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X1350M, - 10071, 10031, 13218, 0, + 10192, 10127, 13328, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_FMV2250, - 13224, 13231, 0, + 13334, 13341, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X1550_6, - 10031, 13155, 6476, 0, + 10127, 13265, 6494, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X1300_9, - 10031, 13137, 6476, 0, + 10127, 13247, 6494, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X1600_2, - 10031, 13194, 6476, 0, + 10127, 13304, 6494, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_eADEON_X1300_10, - 10031, 13137, 6476, 0, + 10127, 13247, 6494, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X1300_11, - 10031, 13137, 6476, 0, + 10127, 13247, 6494, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X1600XT, - 10031, 13236, 13242, 11021, 0, + 10127, 13346, 13352, 11136, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X1650PRO_1, - 10031, 13251, 12517, 0, + 10127, 13361, 12627, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X1600PRO_1, - 10031, 13236, 12517, 0, + 10127, 13346, 12627, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_MGLV5200, - 10071, 10096, 13257, 0, + 10192, 10217, 13367, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X1600M, - 10031, 10071, 13236, 0, + 10127, 10192, 13346, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X1600PRO_2, - 10031, 13194, 12517, 0, + 10127, 13304, 12627, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X1650PRO_2, - 10031, 13251, 12517, 0, + 10127, 13361, 12627, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X1300XT, - 10031, 13168, 13263, 12517, 0, + 10127, 13278, 13373, 12627, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_FGV3400_1, - 10096, 13272, 0, + 10217, 13382, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_MFGV5250, - 10071, 10096, 13278, 0, + 10192, 10217, 13388, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X1700M_1, - 10071, 10031, 13284, 0, + 10192, 10127, 13394, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X1700M_2, - 10071, 10031, 13284, 0, + 10192, 10127, 13394, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X1700, - 10071, 10031, 13290, 0, + 10192, 10127, 13400, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X1600XT_S, - 10031, 13236, 10288, 8323, 0, + 10127, 13346, 10409, 8356, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X1650_PRO_S1, - 10031, 13251, 12517, 8323, 0, + 10127, 13361, 12627, 8356, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X1650_S, - 10031, 13236, 8323, 0, + 10127, 13346, 8356, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X1600_S, - 10031, 13251, 8323, 0, + 10127, 13361, 8356, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X1650_PRO_S2, - 10031, 13251, 12517, 8323, 0, + 10127, 13361, 12627, 8356, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_FGV3400_2, - 10096, 13272, 0, + 10217, 13382, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X1950XTX, - 10031, 13302, 13308, 0, + 10127, 13412, 13418, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X1950XT, - 10031, 13302, 10288, 0, + 10127, 13412, 10409, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X1950, - 10031, 13302, 0, + 10127, 13412, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X1900XT, - 10031, 13312, 10288, 0, + 10127, 13422, 10409, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X1900GT, - 10031, 13312, 13318, 0, + 10127, 13422, 13428, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_FGV7350_3, - 10096, 13113, 0, + 10217, 13223, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X1900_XT_S, - 10031, 13312, 10288, 8323, 0, + 10127, 13422, 10409, 8356, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X1900_GT_S, - 10031, 13312, 13318, 8323, 0, + 10127, 13422, 13428, 8356, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_STREAMPROC, - 458, 13321, 8115, 8323, 0, + 458, 13431, 8148, 8356, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X1950PRO, - 10031, 13302, 12517, 0, + 10127, 13412, 12627, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X1950GT, - 10031, 13302, 13318, 0, + 10127, 13412, 13428, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X1650XT, - 10031, 13251, 10288, 0, + 10127, 13361, 10409, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X1650GT, - 10031, 13251, 13318, 0, + 10127, 13361, 13428, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X1950_S, - 10031, 13302, 12517, 8323, 0, + 10127, 13412, 12627, 8356, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X1950GT_S, - 10031, 13302, 13318, 8323, 0, + 10127, 13412, 13428, 8356, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X1650XT_S, - 10031, 13251, 10288, 8323, 0, + 10127, 13361, 10409, 8356, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X1650GT_S, - 10031, 13251, 13318, 8323, 0, + 10127, 13361, 13428, 8356, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R9FURY, - 10031, 11492, 13328, 2173, 13333, 6476, 0, + 10127, 11607, 13438, 2173, 13443, 6494, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_W5700X, - 10031, 7253, 13338, 0, + 10127, 7271, 13448, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_W5700, - 10031, 7253, 13345, 0, + 10127, 7271, 13455, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_RX5600, - 10031, 12087, 13351, 13356, 10288, 2173, 13365, 10288, 0, + 10127, 12197, 13461, 13466, 10409, 2173, 13475, 10409, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_RX5500, - 10031, 12087, 13375, 2173, 7253, 13386, 0, + 10127, 12197, 13485, 2173, 7271, 13496, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_W5500, - 10031, 7253, 13392, 0, + 10127, 7271, 13502, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_W5500M, - 10031, 7253, 13398, 0, + 10127, 7271, 13508, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_W5300M, - 10031, 7253, 13405, 0, + 10127, 7271, 13515, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_RS350HB, - 13412, 6953, 6563, 0, + 13522, 6971, 6581, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_RS300_7834, - 10031, 10924, 13418, 10296, 0, + 10127, 11039, 13528, 10417, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_RS300_7835, - 10071, 10031, 6483, 10296, 0, + 10192, 10127, 6501, 10417, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RS690_HB_7910, - 13425, 6953, 6563, 0, + 13535, 6971, 6581, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RS690_HB_7911, - 13431, 6953, 6563, 0, + 13541, 6971, 6581, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RS690_PPB_7912, - 13425, 11262, 6563, 0, + 13535, 11377, 6581, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RS690_PPB_7913, - 13425, 615, 4320, 6563, 11262, 0, + 13535, 615, 4320, 6581, 11377, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RS690_PPB_7914, - 13425, 615, 4320, 6563, 8174, 8153, 11222, 0, + 13535, 615, 4320, 6581, 8207, 8186, 11337, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RS690_PPB_7915, - 13425, 615, 4320, 6563, 8174, 8153, 5171, 0, + 13535, 615, 4320, 6581, 8207, 8186, 5171, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RS690_PPB_7916, - 13425, 615, 4320, 6563, 8174, 8153, 11224, 0, + 13535, 615, 4320, 6581, 8207, 8186, 11339, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RS690_PPB_7917, - 13425, 615, 4320, 6563, 8174, 8153, 3154, 0, + 13535, 615, 4320, 6581, 8207, 8186, 3154, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_X1200, - 10031, 13437, 0, + 10127, 13547, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_XP1200, - 10031, 11113, 13443, 0, + 10127, 11228, 13553, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_XP1250_HDA, - 10031, 11113, 13458, 10026, 7054, 0, + 10127, 11228, 13568, 10122, 7072, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_XP1200_S, - 10031, 11113, 13443, 8323, 0, + 10127, 11228, 13553, 8356, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_XP1250_1, - 10031, 11113, 13458, 0, + 10127, 11228, 13568, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_XP1250_2, - 10031, 11113, 13458, 0, + 10127, 11228, 13568, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_2100, - 10031, 13053, 0, + 10127, 13163, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD2900PRO_1, - 10031, 8230, 13463, 13418, 0, + 10127, 8263, 13573, 13528, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD2900XT, - 10031, 8230, 13463, 10288, 0, + 10127, 8263, 13573, 10409, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD2900PRO_2, - 10031, 8230, 13463, 12517, 0, + 10127, 8263, 13573, 12627, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD2900GT, - 10031, 8230, 13463, 13318, 0, + 10127, 8263, 13573, 13428, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_FGV8650, - 10096, 13468, 0, + 10217, 13578, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_FGV8600, - 10096, 13474, 0, + 10217, 13584, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_FGV7600, - 10096, 13480, 0, + 10217, 13590, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD4870, - 10031, 8230, 13486, 0, + 10127, 8263, 13596, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD4870_X2, - 10031, 8230, 13486, 10226, 0, + 10127, 8263, 13596, 10347, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD4850, - 10031, 8230, 13491, 0, + 10127, 8263, 13601, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD4850_X2, - 10031, 8230, 13491, 10226, 0, + 10127, 8263, 13601, 10347, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_FPV8750, - 11432, 13496, 0, + 11547, 13606, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_FPV7760, - 11432, 13502, 0, + 11547, 13612, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD4850M, - 10071, 10031, 8230, 13491, 0, + 10192, 10127, 8263, 13601, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD4850M_X2, - 10071, 10031, 8230, 13491, 10226, 0, + 10192, 10127, 8263, 13601, 10347, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD4830, - 10031, 8230, 13508, 0, + 10127, 8263, 13618, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD4710, - 10031, 8230, 13513, 0, + 10127, 8263, 13623, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_FS9270, - 12588, 13518, 0, + 12698, 13628, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_FS9250, - 12588, 13523, 0, + 12698, 13633, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_FPV8700, - 11432, 13528, 0, + 11547, 13638, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD4870M, - 10071, 10031, 8230, 13486, 0, + 10192, 10127, 8263, 13596, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD4890, - 10031, 8230, 13534, 0, + 10127, 8263, 13644, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD4860, - 10031, 8230, 13539, 0, + 10127, 8263, 13649, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_FPM7750, - 11432, 13544, 0, + 11547, 13654, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD4650M, - 10071, 10031, 8230, 13550, 0, + 10192, 10127, 8263, 13660, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD4670M, - 10071, 10031, 8230, 13560, 0, + 10192, 10127, 8263, 13670, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_FGV5725, - 10071, 10096, 13565, 0, + 10192, 10217, 13675, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD44670, - 10031, 8230, 13560, 0, + 10127, 8263, 13670, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_E4690, - 10031, 13571, 0, + 10127, 13681, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD4600, - 10031, 8230, 13577, 8804, 6476, 0, + 10127, 8263, 13687, 8900, 6494, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD4650, - 10031, 8230, 13582, 0, + 10127, 8263, 13692, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_FPV7750, - 11432, 13587, 0, + 11547, 13697, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_FPV5700, - 11432, 13593, 0, + 11547, 13703, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_FPV3750, - 11432, 13599, 0, + 11547, 13709, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD4830M, - 10071, 10031, 8230, 13508, 0, + 10192, 10127, 8263, 13618, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD4860M, - 10071, 10031, 8230, 13539, 0, + 10192, 10127, 8263, 13649, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_FPM7740, - 11432, 13605, 0, + 11547, 13715, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD4770, - 10031, 8230, 13611, 0, + 10127, 8263, 13721, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD4750, - 10031, 8230, 13616, 0, + 10127, 8263, 13726, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD2400_XT, - 10031, 8230, 13621, 10288, 0, + 10127, 8263, 13731, 10409, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD2400PRO, - 10031, 8230, 13621, 7253, 0, + 10127, 8263, 13731, 7271, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD2400PROAGP, - 10031, 8230, 13621, 7253, 8804, 0, + 10127, 8263, 13731, 7271, 8900, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD2400LE, - 10031, 8230, 13621, 10285, 0, + 10127, 8263, 13731, 10406, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD2350, - 10031, 8230, 13626, 0, + 10127, 8263, 13736, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD2400XT, - 10071, 10031, 8230, 13621, 10288, 0, + 10192, 10127, 8263, 13731, 10409, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD2400M, - 10071, 10031, 8230, 13621, 0, + 10192, 10127, 8263, 13731, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_E2400, - 10031, 10007, 0, + 10127, 10103, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD2400, - 10031, 8230, 13621, 0, + 10127, 8263, 13731, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD3850X2_1, - 10031, 8230, 13631, 10226, 0, + 10127, 8263, 13741, 10347, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD3870, - 10031, 8230, 13636, 0, + 10127, 8263, 13746, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD3850M, - 10071, 10031, 8230, 13631, 0, + 10192, 10127, 8263, 13741, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD3690, - 10031, 8230, 13641, 0, + 10127, 8263, 13751, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD3850MX2, - 10071, 10031, 8230, 13631, 10226, 0, + 10192, 10127, 8263, 13741, 10347, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD3830, - 10031, 8230, 13651, 0, + 10127, 8263, 13761, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD3830M, - 10071, 10031, 8230, 13636, 0, + 10192, 10127, 8263, 13746, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD3830MX2, - 10071, 10031, 8230, 13636, 10226, 0, + 10192, 10127, 8263, 13746, 10347, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD3870X2, - 10031, 8230, 13636, 10226, 0, + 10127, 8263, 13746, 10347, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_FGV7700, - 10096, 13656, 0, + 10217, 13766, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD3850X2_2, - 10031, 8230, 13631, 10226, 0, + 10127, 8263, 13741, 10347, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD3850AGP, - 10031, 8230, 13631, 8804, 0, + 10127, 8263, 13741, 8900, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_FS9170, - 12588, 13662, 0, + 12698, 13772, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD4550, - 10031, 8230, 13667, 0, + 10127, 8263, 13777, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD4350, - 10031, 8230, 13672, 0, + 10127, 8263, 13782, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD4300M, - 10071, 10031, 8230, 13682, 0, + 10192, 10127, 8263, 13792, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD4500M, - 10071, 10031, 8230, 13697, 0, + 10192, 10127, 8263, 13807, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD4500M93, - 10071, 10031, 8230, 13672, 0, + 10192, 10127, 8263, 13782, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_FPRG220, - 11432, 13712, 0, + 11547, 13822, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD4330, - 10071, 10031, 8230, 13718, 0, + 10192, 10127, 8263, 13828, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD4350PRO, - 10031, 8230, 13723, 7253, 0, + 10127, 8263, 13833, 7271, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD2600M76, - 10071, 10031, 8230, 13723, 0, + 10192, 10127, 8263, 13833, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD2600XTM_1, - 10071, 10031, 8230, 13723, 13728, 0, + 10192, 10127, 8263, 13833, 13838, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD2600XTAGP, - 10031, 8230, 13723, 10288, 8804, 0, + 10127, 8263, 13833, 10409, 8900, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD2600PROAGP, - 10031, 8230, 13723, 7253, 8804, 0, + 10127, 8263, 13833, 7271, 8900, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD2600XT_1, - 10031, 8230, 13723, 10288, 13736, 0, + 10127, 8263, 13833, 10409, 13846, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD2600PRO, - 10031, 8230, 13723, 7253, 0, + 10127, 8263, 13833, 7271, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD2600XT_2, - 10031, 8230, 13723, 10226, 0, + 10127, 8263, 13833, 10347, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD2600XTM_2, - 10071, 10031, 8230, 13723, 10288, 0, + 10192, 10127, 8263, 13833, 10409, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_FGV5600, - 10096, 13742, 0, + 10217, 13852, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_FGV3600, - 10096, 13748, 0, + 10217, 13858, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD3650M, - 10071, 10031, 8230, 13754, 0, + 10192, 10127, 8263, 13864, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD3670M, - 10071, 10031, 8230, 13759, 0, + 10192, 10127, 8263, 13869, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_FGV5700, - 10071, 10096, 13593, 0, + 10192, 10217, 13703, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD3650AGP_1, - 10031, 8230, 13754, 8804, 0, + 10127, 8263, 13864, 8900, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD3650AGP_2, - 10031, 8230, 13754, 8804, 0, + 10127, 8263, 13864, 8900, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD3650, - 10031, 8230, 13754, 0, + 10127, 8263, 13864, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD3650AGP, - 10031, 8230, 13754, 8804, 0, + 10127, 8263, 13864, 8900, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD3470, - 10031, 8230, 13764, 0, + 10127, 8263, 13874, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD3410M, - 10071, 10031, 8230, 13769, 0, + 10192, 10127, 8263, 13879, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD3400, - 10071, 10031, 8230, 13779, 6476, 13784, 0, + 10192, 10127, 8263, 13889, 6494, 13894, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD4250_S, - 10031, 8230, 13790, 8396, 13795, 8323, 0, + 10127, 8263, 13900, 8429, 13905, 8356, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD3450AGP, - 10031, 8230, 13803, 8804, 0, + 10127, 8263, 13913, 8900, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD3450PCI, - 10031, 8230, 13803, 615, 0, + 10127, 8263, 13913, 615, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_FPV3700, - 11432, 13808, 0, + 11547, 13918, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_FP2450, - 11432, 13814, 0, + 11547, 13924, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_FP2260, - 11432, 13819, 0, + 11547, 13929, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RS780_HDMI_AUDIO, - 9030, 10026, 7054, 0, + 9126, 10122, 7072, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD3200, - 10031, 8230, 11120, 0, + 10127, 8263, 11235, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD3100, - 10031, 8230, 13020, 0, + 10127, 8263, 13130, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD3200M, - 10071, 10031, 8230, 11120, 0, + 10192, 10127, 8263, 11235, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD3100M, - 10071, 10031, 8230, 13020, 0, + 10192, 10127, 8263, 13130, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD3300, - 10031, 8230, 13824, 0, + 10127, 8263, 13934, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_3000IGP, - 10031, 13829, 10296, 0, + 10127, 13939, 10417, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD6550D, - 10031, 8230, 13834, 0, + 10127, 8263, 13944, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD6620G, - 10031, 8230, 13840, 0, + 10127, 8263, 13950, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD6370D, - 10031, 8230, 13846, 0, + 10127, 8263, 13956, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD6380G, - 10031, 8230, 13852, 0, + 10127, 8263, 13962, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD6410D_1, - 10031, 8230, 13858, 0, + 10127, 8263, 13968, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD6410D_2, - 10031, 8230, 13858, 0, + 10127, 8263, 13968, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD6520G, - 10031, 8230, 13864, 0, + 10127, 8263, 13974, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD6480G_1, - 10031, 8230, 13870, 0, + 10127, 8263, 13980, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD6480G_2, - 10031, 8230, 13870, 0, + 10127, 8263, 13980, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD6530D, - 10031, 8230, 13876, 0, + 10127, 8263, 13986, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD4200_1, - 10031, 8230, 13882, 6476, 0, + 10127, 8263, 13992, 6494, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD4200_2, - 10031, 8230, 13882, 0, + 10127, 8263, 13992, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD4200, - 10031, 8230, 13882, 10071, 0, + 10127, 8263, 13992, 10192, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD4100M, - 10071, 10031, 8230, 12125, 0, + 10192, 10127, 8263, 12235, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD4290, - 10031, 8230, 13887, 0, + 10127, 8263, 13997, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD4250, - 10031, 8230, 13790, 0, + 10127, 8263, 13900, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD6310_1, - 10031, 8230, 13892, 0, + 10127, 8263, 14002, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD6310_2, - 10031, 8230, 13892, 0, + 10127, 8263, 14002, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD6250, - 10031, 8230, 13897, 0, + 10127, 8263, 14007, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD6320, - 10031, 8230, 13902, 0, + 10127, 8263, 14012, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD6290, - 10031, 8230, 13907, 0, + 10127, 8263, 14017, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD7340, - 10031, 8230, 13912, 0, + 10127, 8263, 14022, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD7310, - 10031, 8230, 13917, 0, + 10127, 8263, 14027, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD7290, - 10031, 8230, 13922, 0, + 10127, 8263, 14032, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD8400, - 10031, 8230, 13927, 2173, 13932, 6476, 0, + 10127, 8263, 14037, 2173, 14042, 6494, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD8400E, - 10031, 8230, 13935, 0, + 10127, 8263, 14045, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD8330, - 10031, 8230, 13941, 0, + 10127, 8263, 14051, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD8330E, - 10031, 8230, 13946, 0, + 10127, 8263, 14056, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD8210, - 10031, 8230, 13952, 0, + 10127, 8263, 14062, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD8310E, - 10031, 8230, 13957, 0, + 10127, 8263, 14067, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD8280, - 10031, 8230, 13963, 2173, 13932, 6476, 0, + 10127, 8263, 14073, 2173, 14042, 6494, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD8280E, - 10031, 8230, 13968, 0, + 10127, 8263, 14078, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD8240, - 10031, 8230, 13974, 2173, 13932, 6476, 0, + 10127, 8263, 14084, 2173, 14042, 6494, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD8180, - 10031, 8230, 13979, 0, + 10127, 8263, 14089, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD8250, - 10031, 8230, 13984, 0, + 10127, 8263, 14094, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_KABINI_HDA, - 13995, 14002, 7054, 0, + 14105, 14112, 7072, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R2_3, - 10031, 14010, 1716, 0, + 10127, 14120, 1716, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R4R5, - 10031, 14013, 1716, 0, + 10127, 14123, 1716, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R2_1, - 10031, 14010, 1716, 0, + 10127, 14120, 1716, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R2_2, - 10031, 14010, 1716, 0, + 10127, 14120, 1716, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R2_R3_R3E_R4, - 10031, 14019, 0, + 10127, 14129, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R6, - 10031, 14028, 1716, 0, + 10127, 14138, 1716, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R1ER2E, - 10031, 14031, 1716, 0, + 10127, 14141, 1716, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_XX2200MR2, - 10031, 14039, 14043, 14052, 14010, 1716, 0, + 10127, 14149, 14153, 14162, 14120, 1716, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R5_R6_R7, - 10031, 14057, 0, + 10127, 14167, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R2R3R4R5, - 10031, 14066, 1716, 0, + 10127, 14176, 1716, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD7660G_1, - 10031, 8230, 14078, 0, + 10127, 8263, 14188, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD7660D, - 10031, 8230, 14084, 0, + 10127, 8263, 14194, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_TRINITY_HDA, - 14090, 10026, 7054, 6455, 0, + 14200, 10122, 7072, 6473, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD7640G_1, - 10031, 8230, 14098, 0, + 10127, 8263, 14208, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD7560D, - 10031, 8230, 14104, 0, + 10127, 8263, 14214, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_FPA300, - 11432, 14110, 0, + 11547, 14220, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_FPA320, - 11432, 14115, 0, + 11547, 8810, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD7620G_1, - 10031, 8230, 14120, 0, + 10127, 8263, 14225, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD7600G_1, - 10031, 8230, 14126, 0, + 10127, 8263, 14231, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD7500G_1, - 10031, 8230, 14132, 0, + 10127, 8263, 14237, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD7500G_2, - 10031, 8230, 14132, 0, + 10127, 8263, 14237, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD8650G, - 10031, 8230, 14138, 0, + 10127, 8263, 14243, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD8670D, - 10031, 8230, 14144, 0, + 10127, 8263, 14249, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD8550G, - 10031, 8230, 14150, 0, + 10127, 8263, 14255, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD8570D, - 10031, 8230, 14156, 0, + 10127, 8263, 14261, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD8610G, - 10031, 8230, 14162, 0, + 10127, 8263, 14267, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD7660G_2, - 10031, 8230, 14078, 0, + 10127, 8263, 14188, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD7640G_2, - 10031, 8230, 14098, 0, + 10127, 8263, 14208, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD7620G_2, - 10031, 8230, 14120, 0, + 10127, 8263, 14225, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD7600G_2, - 10031, 8230, 14126, 0, + 10127, 8263, 14231, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD7500G, - 10031, 8230, 14132, 0, + 10127, 8263, 14237, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_PS4_APU, - 14168, 6786, 14039, 0, + 14273, 6804, 14149, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_LRL_HDA, - 14180, 14002, 7054, 6455, 0, + 14285, 14112, 7072, 6473, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD7520G_1, - 10031, 8230, 14190, 0, + 10127, 8263, 14295, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD7540D, - 10031, 8230, 14196, 0, + 10127, 8263, 14301, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD7420G_1, - 10031, 8230, 14202, 0, + 10127, 8263, 14307, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD7480D, - 10031, 8230, 14208, 0, + 10127, 8263, 14313, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD7400G_1, - 10031, 8230, 14214, 0, + 10127, 8263, 14319, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD8450G, - 10031, 8230, 14220, 0, + 10127, 8263, 14325, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD8470D, - 10031, 8230, 14226, 0, + 10127, 8263, 14331, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD8350G, - 10031, 8230, 14232, 0, + 10127, 8263, 14337, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD8370D, - 10031, 8230, 14238, 0, + 10127, 8263, 14343, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD8510G, - 10031, 8230, 14244, 0, + 10127, 8263, 14349, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD8410G, - 10031, 8230, 14250, 0, + 10127, 8263, 14355, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD8310G, - 10031, 8230, 14256, 0, + 10127, 8263, 14361, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD8650D, - 10031, 8230, 14262, 0, + 10127, 8263, 14367, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD8550D, - 10031, 8230, 14268, 0, + 10127, 8263, 14373, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD7520G_2, - 10031, 8230, 14190, 0, + 10127, 8263, 14295, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD7420G_2, - 10031, 8230, 14202, 0, + 10127, 8263, 14307, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD7400G_2, - 10031, 8230, 14214, 0, + 10127, 8263, 14319, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD2900_HDA, - 10031, 8230, 13463, 8230, 7054, 6455, 0, + 10127, 8263, 13573, 8263, 7072, 6473, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD3650_HDA, - 10031, 8230, 14274, 8230, 7054, 6455, 0, + 10127, 8263, 14379, 8263, 7072, 6473, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD2600_HDA, - 10031, 8230, 13723, 8230, 7054, 6455, 0, + 10127, 8263, 13833, 8263, 7072, 6473, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD2350_HDA, - 10031, 8230, 14289, 8230, 7054, 6455, 0, + 10127, 8263, 14394, 8263, 7072, 6473, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD3690_HDA, - 10031, 8230, 14317, 8230, 7054, 6455, 0, + 10127, 8263, 14422, 8263, 7072, 6473, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD36XX_HDA, - 10031, 8230, 14274, 8230, 7054, 6455, 0, + 10127, 8263, 14379, 8263, 7072, 6473, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD34XX_HDA, - 10031, 8230, 14327, 8230, 7054, 6455, 0, + 10127, 8263, 14432, 8263, 7072, 6473, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD4850_HDA, - 10031, 8230, 13491, 8230, 7054, 6455, 0, + 10127, 8263, 13601, 8263, 7072, 6473, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD4350_HDA, - 10031, 8230, 14332, 8230, 7054, 6455, 0, + 10127, 8263, 14437, 8263, 7072, 6473, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD5830_HDA, - 10031, 8230, 14337, 8230, 7054, 6455, 0, + 10127, 8263, 14442, 8263, 7072, 6473, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD5700_HDA, - 10031, 8230, 14362, 8230, 7054, 6455, 0, + 10127, 8263, 14467, 8263, 7072, 6473, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD5000_HDA, - 10031, 8230, 14367, 8230, 7054, 6455, 0, + 10127, 8263, 14472, 8263, 7072, 6473, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD68XX_HDA, - 10031, 8230, 14372, 8230, 7054, 6455, 0, + 10127, 8263, 14477, 8263, 7072, 6473, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD6930_HDA, - 10031, 8230, 14387, 8230, 7054, 6455, 0, + 10127, 8263, 14492, 8263, 7072, 6473, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD6790_HDA, - 10031, 8230, 14407, 8230, 7054, 6455, 0, + 10127, 8263, 14512, 8263, 7072, 6473, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD6500_HDA, - 10031, 8230, 14427, 8230, 7054, 6455, 0, + 10127, 8263, 14532, 8263, 7072, 6473, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD6450_HDA, - 10031, 8230, 14443, 11424, 14464, 8230, 7054, 6455, 0, + 10127, 8263, 14548, 11539, 14569, 8263, 7072, 6473, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD7870_HDA, - 10031, 8230, 14477, 8230, 7054, 6455, 0, + 10127, 8263, 14582, 8263, 7072, 6473, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HD7700_HDA, - 10031, 8230, 12430, 8230, 7054, 6455, 0, + 10127, 8263, 12540, 8263, 7072, 6473, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_HDTIRAN_HDA, - 10031, 8230, 14494, 8230, 7054, 6455, 0, + 10127, 8263, 14599, 8263, 7072, 6473, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R7360_HDA, - 10031, 10038, 14500, 11492, 11538, 8230, 7054, 6455, 0, + 10127, 10134, 14605, 11607, 11653, 8263, 7072, 6473, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R9290_HDA, - 10031, 11492, 14505, 14515, 8230, 7054, 6455, 0, + 10127, 11607, 14610, 14620, 8263, 7072, 6473, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_R9285_HDA, - 10031, 11492, 13007, 8230, 7054, 6455, 0, + 10127, 11607, 13117, 8263, 7072, 6473, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_RX460_HDA, - 10031, 12087, 14524, 12087, 12206, 8230, 7054, 6455, 0, + 10127, 12197, 14629, 12197, 12316, 8263, 7072, 6473, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_RX550_HDA, - 10031, 11492, 14539, 13328, 8230, 7054, 6455, 0, + 10127, 11607, 14644, 13438, 8263, 7072, 6473, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_RX470_HDA, - 10031, 12087, 14545, 8230, 7054, 6455, 0, + 10127, 12197, 14650, 8263, 7072, 6473, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_VEGA56_HDA, - 10031, 11624, 12558, 8230, 7054, 0, + 10127, 10166, 12668, 8263, 7072, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_RX550_HDA2, - 10031, 12087, 14565, 8230, 7054, 6455, 0, + 10127, 12197, 14670, 8263, 7072, 6473, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_RX550_1, - 10031, 12087, 12196, 12200, 2173, 12087, 12206, 0, + 10127, 12197, 12306, 12310, 2173, 12197, 12316, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_P22_HDA, - 3315, 14584, 10026, 7054, 0, + 3315, 14689, 10122, 7072, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_LEDXA_HDA, - 14587, 10026, 7054, 0, + 14692, 10122, 7072, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_VEGA12_HDA, - 11624, 14592, 10026, 7054, 0, + 10166, 14697, 10122, 7072, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_VII_2, - 10031, 11632, 0, + 10127, 11742, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_NAVI10_HDA, - 14595, 9329, 10026, 7054, 0, + 10155, 9425, 10122, 7072, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_T506_AD_1, - 14600, 14608, 14612, 4019, 6919, 0, + 14700, 14708, 14712, 4019, 6937, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_T506_AD_2, - 14600, 14608, 14612, 4019, 6919, 0, + 14700, 14708, 14712, 4019, 6937, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_TVWON600, - 14623, 14626, 8230, 14633, 8204, 0, + 14723, 14726, 8263, 8849, 8237, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_T506PCI, - 14600, 14608, 8204, 0, + 14700, 14708, 8237, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_T506USB_1, - 14600, 14608, 6945, 0, + 14700, 14708, 6963, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_T506USB_2, - 14600, 14608, 6945, 0, + 14700, 14708, 6963, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_T506EUSB_1, - 14600, 14608, 14637, 6945, 0, + 14700, 14708, 14733, 6963, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_T506EUSB_2, - 14600, 14608, 14637, 6945, 0, + 14700, 14708, 14733, 6963, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_T506A_AD_1, - 14600, 14646, 14612, 4019, 6919, 9782, 14651, 0, + 14700, 14742, 14712, 4019, 6937, 9878, 14747, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_T506A_AD_2, - 14600, 14646, 14612, 4019, 6919, 9782, 14651, 0, + 14700, 14742, 14712, 4019, 6937, 9878, 14747, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_T506A_PCI_1, - 14600, 14646, 8204, 0, + 14700, 14742, 8237, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_T506A_PCI_2, - 14600, 14646, 8204, 0, + 14700, 14742, 8237, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_T506A_USB_1, - 14600, 14646, 6945, 0, + 14700, 14742, 6963, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_T506A_USB_2, - 14600, 14646, 6945, 0, + 14700, 14742, 6963, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_T506A_EUSB_1, - 14600, 14646, 14637, 6945, 0, + 14700, 14742, 14733, 6963, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_T506A_EUSB_2, - 14600, 14646, 14637, 6945, 0, + 14700, 14742, 14733, 6963, 0, PCI_VENDOR_ATI, PCI_PRODUCT_ATI_RADEON_T507CAP, - 14600, 8230, 14663, 14668, 14623, 14676, 14690, 0, + 14700, 8263, 14759, 14764, 14723, 14772, 14786, 0, PCI_VENDOR_AURAVISION, PCI_PRODUCT_AURAVISION_VXP524, - 14697, 615, 234, 8115, 0, + 14793, 615, 234, 8148, 0, PCI_VENDOR_AUREAL, PCI_PRODUCT_AUREAL_AU8820, - 14704, 2632, 240, 7054, 8115, 0, + 14800, 2632, 240, 7072, 8148, 0, PCI_VENDOR_AUREAL, PCI_PRODUCT_AUREAL_AU8830, - 14711, 2632, 5425, 240, 7054, 8115, 0, + 14807, 2632, 5443, 240, 7072, 8148, 0, PCI_VENDOR_AMCIRCUITS, PCI_PRODUCT_AMCIRCUITS_S5933, - 14718, 615, 14724, 0, + 14814, 615, 14820, 0, PCI_VENDOR_AMCIRCUITS, PCI_PRODUCT_AMCIRCUITS_S5920, - 14735, 615, 14741, 0, + 14831, 615, 14837, 0, PCI_VENDOR_AMCIRCUITS, PCI_PRODUCT_AMCIRCUITS_LANAI, - 14748, 14756, 3018, 0, + 14844, 14852, 3018, 0, PCI_VENDOR_AMCIRCUITS, PCI_PRODUCT_AMCIRCUITS_CAMAC, - 14762, 14770, 6455, 0, + 14858, 14866, 6473, 0, PCI_VENDOR_AMCIRCUITS, PCI_PRODUCT_AMCIRCUITS_VICBUS, - 14762, 14776, 3018, 0, + 14858, 14872, 3018, 0, PCI_VENDOR_AMCIRCUITS, PCI_PRODUCT_AMCIRCUITS_PCISYNC, - 14762, 14783, 14799, 0, + 14858, 14879, 14895, 0, PCI_VENDOR_AMCIRCUITS, PCI_PRODUCT_AMCIRCUITS_ADDI7800, - 14806, 14816, 14826, 14833, 0, + 14902, 14912, 14922, 14929, 0, PCI_VENDOR_ASPEED, PCI_PRODUCT_ASPEED_AST1150, - 14840, 14848, 10513, 0, + 14936, 14944, 10628, 0, PCI_VENDOR_ASPEED, PCI_PRODUCT_ASPEED_AST1180, - 14860, 0, + 14956, 0, PCI_VENDOR_ASPEED, PCI_PRODUCT_ASPEED_AST2000, - 5240, 1716, 14868, 0, + 5240, 1716, 14964, 0, PCI_VENDOR_ATHEROS, PCI_PRODUCT_ATHEROS_AR5201, - 14875, 4761, 4540, 0, + 14971, 4761, 4540, 0, PCI_VENDOR_ATHEROS, PCI_PRODUCT_ATHEROS_AR5311, - 14882, 4761, 4540, 0, + 14978, 4761, 4540, 0, PCI_VENDOR_ATHEROS, PCI_PRODUCT_ATHEROS_AR5211, - 14882, 4761, 4540, 0, + 14978, 4761, 4540, 0, PCI_VENDOR_ATHEROS, PCI_PRODUCT_ATHEROS_AR5212, - 14889, 4761, 4540, 0, + 14985, 4761, 4540, 0, PCI_VENDOR_ATHEROS, PCI_PRODUCT_ATHEROS_AR5212_2, - 14889, 0, + 14985, 0, PCI_VENDOR_ATHEROS, PCI_PRODUCT_ATHEROS_AR5212_3, - 14889, 0, + 14985, 0, PCI_VENDOR_ATHEROS, PCI_PRODUCT_ATHEROS_AR5212_4, - 14889, 0, + 14985, 0, PCI_VENDOR_ATHEROS, PCI_PRODUCT_ATHEROS_AR5212_5, - 14889, 0, + 14985, 0, PCI_VENDOR_ATHEROS, PCI_PRODUCT_ATHEROS_AR5212_6, - 14889, 0, + 14985, 0, PCI_VENDOR_ATHEROS, PCI_PRODUCT_ATHEROS_AR5212_7, - 14889, 0, + 14985, 0, PCI_VENDOR_ATHEROS, PCI_PRODUCT_ATHEROS_AR2413, - 14896, 0, + 14992, 0, PCI_VENDOR_ATHEROS, PCI_PRODUCT_ATHEROS_AR5413, - 14903, 0, + 14999, 0, PCI_VENDOR_ATHEROS, PCI_PRODUCT_ATHEROS_AR5424, - 14910, 0, + 15006, 0, PCI_VENDOR_ATHEROS, PCI_PRODUCT_ATHEROS_AR5416, - 14917, 0, + 15013, 0, PCI_VENDOR_ATHEROS, PCI_PRODUCT_ATHEROS_AR5418, - 14924, 0, + 15020, 0, PCI_VENDOR_ATHEROS, PCI_PRODUCT_ATHEROS_AR9160, - 14931, 0, + 15027, 0, PCI_VENDOR_ATHEROS, PCI_PRODUCT_ATHEROS_AR9280, - 14938, 0, + 15034, 0, PCI_VENDOR_ATHEROS, PCI_PRODUCT_ATHEROS_AR9281, - 14945, 0, + 15041, 0, PCI_VENDOR_ATHEROS, PCI_PRODUCT_ATHEROS_AR9285, - 14952, 4761, 4540, 0, + 15048, 4761, 4540, 0, PCI_VENDOR_ATHEROS, PCI_PRODUCT_ATHEROS_AR2427, - 14959, 4761, 4540, 0, + 15055, 4761, 4540, 0, PCI_VENDOR_ATHEROS, PCI_PRODUCT_ATHEROS_AR9227, - 14966, 4761, 4540, 0, + 15062, 4761, 4540, 0, PCI_VENDOR_ATHEROS, PCI_PRODUCT_ATHEROS_AR9287, - 14973, 4761, 4540, 0, + 15069, 4761, 4540, 0, PCI_VENDOR_ATHEROS, PCI_PRODUCT_ATHEROS_AR9300, - 14980, 4761, 4540, 0, + 15076, 4761, 4540, 0, PCI_VENDOR_ATHEROS, PCI_PRODUCT_ATHEROS_AR9485, - 14987, 4761, 4540, 0, + 15083, 4761, 4540, 0, PCI_VENDOR_ATHEROS, PCI_PRODUCT_ATHEROS_AR9462, - 14994, 4761, 4540, 0, + 15090, 4761, 4540, 0, PCI_VENDOR_ATHEROS, PCI_PRODUCT_ATHEROS_AR9565, - 15001, 4761, 4540, 0, + 15097, 4761, 4540, 0, PCI_VENDOR_ATHEROS, PCI_PRODUCT_ATHEROS_QCA988X, - 15008, 4761, 4540, 0, + 15104, 4761, 4540, 0, PCI_VENDOR_ATHEROS, PCI_PRODUCT_ATHEROS_AR5201_AP, - 14875, 4761, 4540, 15021, 15031, 15036, 15043, 0, + 14971, 4761, 4540, 15117, 15127, 15132, 15139, 0, PCI_VENDOR_ATHEROS, PCI_PRODUCT_ATHEROS_AR5201_DEFAULT, - 14875, 4761, 4540, 15049, 15053, 0, + 14971, 4761, 4540, 15145, 15149, 0, PCI_VENDOR_ATHEROS, PCI_PRODUCT_ATHEROS_AR5211_DEFAULT, - 14882, 4761, 4540, 15049, 15053, 0, + 14978, 4761, 4540, 15145, 15149, 0, PCI_VENDOR_ATHEROS, PCI_PRODUCT_ATHEROS_AR5212_DEFAULT, - 14889, 4761, 4540, 15049, 15053, 0, + 14985, 4761, 4540, 15145, 15149, 0, PCI_VENDOR_ATHEROS, PCI_PRODUCT_ATHEROS_AR5212_FPGA, - 14889, 4761, 4540, 15021, 15031, 15061, 15072, 0, + 14985, 4761, 4540, 15117, 15127, 15157, 15168, 0, PCI_VENDOR_ATHEROS, PCI_PRODUCT_ATHEROS_AR5211_FPGA11B, - 14882, 4761, 4540, 15021, 15031, 15079, 15084, 15072, 0, + 14978, 4761, 4540, 15117, 15127, 15175, 15180, 15168, 0, PCI_VENDOR_ATHEROS, PCI_PRODUCT_ATHEROS_AR5211_LEGACY, - 14882, 4761, 4540, 15021, 15031, 15094, 15084, 15072, 0, + 14978, 4761, 4540, 15117, 15127, 15190, 15180, 15168, 0, PCI_VENDOR_ATRONICS, PCI_PRODUCT_ATRONICS_IDE_2015PL, - 15104, 0, + 15200, 0, PCI_VENDOR_AVANCE, PCI_PRODUCT_AVANCE_AVL2301, - 15115, 0, + 15211, 0, PCI_VENDOR_AVANCE, PCI_PRODUCT_AVANCE_AVG2302, - 15123, 0, + 15219, 0, PCI_VENDOR_AVANCE2, PCI_PRODUCT_AVANCE2_ALG2301, - 15131, 0, + 15227, 0, PCI_VENDOR_AVANCE2, PCI_PRODUCT_AVANCE2_ALG2302, - 15139, 0, + 15235, 0, PCI_VENDOR_AVANCE2, PCI_PRODUCT_AVANCE2_ALS4000, - 15147, 7054, 0, + 15243, 7072, 0, PCI_VENDOR_AVLAB, PCI_PRODUCT_AVLAB_PCI2S, - 15155, 15159, 615, 6786, 14833, 0, + 15251, 15255, 615, 6804, 14929, 0, PCI_VENDOR_AVLAB, PCI_PRODUCT_AVLAB_LPPCI4S, - 15155, 15159, 615, 6786, 14833, 0, + 15251, 15255, 615, 6804, 14929, 0, PCI_VENDOR_AVLAB, PCI_PRODUCT_AVLAB_LPPCI4S_2, - 15155, 15159, 615, 6786, 14833, 0, + 15251, 15255, 615, 6804, 14929, 0, PCI_VENDOR_CCUBE, PCI_PRODUCT_CCUBE_CINEMASTER, - 15167, 11224, 8265, 15178, 6919, 0, + 15263, 11339, 8298, 15274, 6937, 0, PCI_VENDOR_AVM, PCI_PRODUCT_AVM_B1, - 15182, 15188, 15193, 9891, 3018, 0, + 15278, 15284, 15289, 9987, 3018, 0, PCI_VENDOR_AVM, PCI_PRODUCT_AVM_FRITZ_CARD, - 15196, 15031, 9891, 3018, 0, + 15292, 15127, 9987, 3018, 0, PCI_VENDOR_AVM, PCI_PRODUCT_AVM_FRITZ_PCI_V2_ISDN, - 15203, 9941, 9891, 3018, 0, + 15299, 10037, 9987, 3018, 0, PCI_VENDOR_AVM, PCI_PRODUCT_AVM_T1, - 8299, 15188, 15213, 9891, 3018, 0, + 8332, 15284, 15309, 9987, 3018, 0, PCI_VENDOR_AWT, PCI_PRODUCT_AWT_RT2890, - 15216, 0, + 15312, 0, PCI_VENDOR_RMI, PCI_PRODUCT_RMI_XLR_PCIX, - 15223, 8885, 10513, 0, + 15319, 8981, 10628, 0, PCI_VENDOR_RMI, PCI_PRODUCT_RMI_XLS_PCIE, - 15227, 15231, 10513, 0, + 15323, 15327, 10628, 0, PCI_VENDOR_BBELEC, PCI_PRODUCT_BBELEC_NON_ISOLATED_1_PORT, - 15241, 15256, 615, 7983, 0, + 15337, 15352, 615, 8016, 0, PCI_VENDOR_BBELEC, PCI_PRODUCT_BBELEC_NON_ISOLATED_2_PORT, - 15263, 15256, 615, 7983, 0, + 15359, 15352, 615, 8016, 0, PCI_VENDOR_BBELEC, PCI_PRODUCT_BBELEC_NON_ISOLATED_4_PORT, - 15276, 15256, 615, 7983, 0, + 15372, 15352, 615, 8016, 0, PCI_VENDOR_BBELEC, PCI_PRODUCT_BBELEC_NON_ISOLATED_8_PORT, - 15289, 15256, 615, 7983, 0, + 15385, 15352, 615, 8016, 0, PCI_VENDOR_BBELEC, PCI_PRODUCT_BBELEC_ISOLATED_1_PORT, - 15241, 15303, 15256, 615, 7983, 0, + 15337, 15399, 15352, 615, 8016, 0, PCI_VENDOR_BBELEC, PCI_PRODUCT_BBELEC_ISOLATED_2_PORT, - 15263, 15303, 15256, 615, 7983, 0, + 15359, 15399, 15352, 615, 8016, 0, PCI_VENDOR_BBELEC, PCI_PRODUCT_BBELEC_ISOLATED_4_PORT, - 15276, 15303, 15256, 615, 7983, 0, + 15372, 15399, 15352, 615, 8016, 0, PCI_VENDOR_BBELEC, PCI_PRODUCT_BBELEC_ISOLATED_8_PORT, - 15289, 15303, 15256, 615, 7983, 0, + 15385, 15399, 15352, 615, 8016, 0, PCI_VENDOR_BEIJING_MEMBLAZE, PCI_PRODUCT_BEIJING_MEMBLAZE_PBLAZE4, - 15312, 7957, 7962, 0, + 15408, 7990, 7995, 0, PCI_VENDOR_BELKIN, PCI_PRODUCT_BELKIN_F5D6001, - 15320, 0, + 15416, 0, PCI_VENDOR_BELKIN, PCI_PRODUCT_BELKIN_F5D6020V3, - 15328, 7686, 0, + 15424, 7719, 0, PCI_VENDOR_BELKIN, PCI_PRODUCT_BELKIN_F5D7010, - 15338, 0, + 15434, 0, PCI_VENDOR_STALLION, PCI_PRODUCT_STALLION_EC8_32, - 15346, 0, + 15442, 0, PCI_VENDOR_STALLION, PCI_PRODUCT_STALLION_EC8_64, - 15353, 0, + 15449, 0, PCI_VENDOR_STALLION, PCI_PRODUCT_STALLION_EASYIO, - 15360, 0, + 15456, 0, PCI_VENDOR_BIT3, PCI_PRODUCT_BIT3_PCIVME617, - 15367, 3018, 15375, 15380, 0, + 15463, 3018, 15471, 15476, 0, PCI_VENDOR_BIT3, PCI_PRODUCT_BIT3_PCIVME618, - 15367, 3018, 15375, 15384, 0, + 15463, 3018, 15471, 15480, 0, PCI_VENDOR_BIT3, PCI_PRODUCT_BIT3_PCIVME2706, - 15367, 3018, 15375, 15388, 0, + 15463, 3018, 15471, 15484, 0, PCI_VENDOR_BLUESTEEL, PCI_PRODUCT_BLUESTEEL_5501, - 15393, 0, + 15489, 0, PCI_VENDOR_BLUESTEEL, PCI_PRODUCT_BLUESTEEL_5601, - 15398, 0, + 15494, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_UC268, - 4517, 15403, 0, + 4517, 15499, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_UC257, - 4517, 15410, 0, + 4517, 15506, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_UC257R3, - 4517, 15410, 0, + 4517, 15506, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_UC257R4, - 4517, 15410, 0, + 4517, 15506, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_UC279, - 4517, 15417, 0, + 4517, 15513, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_UC313, - 4517, 15424, 0, + 4517, 15520, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_UC313R3, - 4517, 15424, 0, + 4517, 15520, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_UC313R4, - 4517, 15424, 0, + 4517, 15520, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_UC310, - 4517, 15431, 0, + 4517, 15527, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_UC302, - 4517, 15438, 0, + 4517, 15534, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_UC302R3, - 4517, 15438, 0, + 4517, 15534, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_UC302R4, - 4517, 15438, 0, + 4517, 15534, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_UC431, - 4517, 15445, 0, + 4517, 15541, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_UC420, - 4517, 15452, 0, + 4517, 15548, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_UC475, - 4517, 15459, 0, + 4517, 15555, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_UC475R3, - 4517, 15459, 0, + 4517, 15555, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_UC607, - 4517, 15466, 0, + 4517, 15562, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_UC607R3, - 4517, 15466, 0, + 4517, 15562, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_UC607R4, - 4517, 15466, 0, + 4517, 15562, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_UC324, - 4517, 15473, 0, + 4517, 15569, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_UC357, - 4517, 15480, 0, + 4517, 15576, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_UC357R3, - 4517, 15480, 0, + 4517, 15576, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_UC357R4, - 4517, 15480, 0, + 4517, 15576, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_UC246, - 4517, 15487, 0, + 4517, 15583, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_UC246R3, - 4517, 15487, 0, + 4517, 15583, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_UP189, - 4517, 15494, 0, + 4517, 15590, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_UP189R3, - 4517, 15494, 0, + 4517, 15590, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_UP189R4, - 4517, 15494, 0, + 4517, 15590, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_UC346, - 4517, 15501, 0, + 4517, 15597, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_UC346R3, - 4517, 15501, 0, + 4517, 15597, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_UP200, - 4517, 15508, 0, + 4517, 15604, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_UP200R3, - 4517, 15508, 0, + 4517, 15604, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_UP200R4, - 4517, 15508, 0, + 4517, 15604, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_UC101, - 4517, 15515, 0, + 4517, 15611, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_UC203, - 4517, 15522, 0, + 4517, 15618, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_UC203R3, - 4517, 15522, 0, + 4517, 15618, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_UP869, - 4517, 15529, 0, + 4517, 15625, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_UP869R3, - 4517, 15529, 0, + 4517, 15625, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_UP869R4, - 4517, 15529, 0, + 4517, 15625, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_UP880, - 4517, 15536, 0, + 4517, 15632, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_UP880R3, - 4517, 15536, 0, + 4517, 15632, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_UP880R4, - 4517, 15536, 0, + 4517, 15632, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_UC368, - 4517, 15543, 0, + 4517, 15639, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_UC253, - 4517, 15550, 0, + 4517, 15646, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_UC260, - 4517, 15557, 0, + 4517, 15653, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_UC836, - 4517, 15564, 0, + 4517, 15660, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_IS100, - 15571, 15582, 0, + 15667, 15678, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_IS200, - 15571, 15589, 0, + 15667, 15685, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_IS300, - 15571, 15596, 0, + 15667, 15692, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_IS400, - 15571, 15603, 0, + 15667, 15699, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_PX279, - 4517, 15610, 0, + 4517, 15706, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_UC414, - 4517, 15617, 0, + 4517, 15713, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_PX420, - 4517, 15624, 0, + 4517, 15720, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_PX431, - 4517, 15631, 0, + 4517, 15727, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_PX820, - 4517, 15638, 0, + 4517, 15734, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_PX831, - 4517, 15645, 0, + 4517, 15741, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_PX246, - 4517, 15652, 0, + 4517, 15748, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_PX101, - 4517, 15659, 0, + 4517, 15755, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_PX257, - 4517, 15666, 0, + 4517, 15762, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_PX846, - 4517, 15673, 0, + 4517, 15769, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_PX857, - 4517, 15680, 0, + 4517, 15776, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_PX260, - 4517, 15687, 0, + 4517, 15783, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_PX320, - 4517, 15694, 0, + 4517, 15790, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_PX313, - 4517, 15701, 0, + 4517, 15797, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_PX310, - 4517, 15708, 0, + 4517, 15804, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_PX346, - 4517, 15715, 0, + 4517, 15811, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_PX368, - 4517, 15722, 0, + 4517, 15818, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_PX420R3, - 4517, 15624, 0, + 4517, 15720, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_PX431R3, - 4517, 15631, 0, + 4517, 15727, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_PX820R3, - 4517, 15638, 0, + 4517, 15734, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_PX831R3, - 4517, 15645, 0, + 4517, 15741, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_PX257R3, - 4517, 15666, 0, + 4517, 15762, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_PX246R3, - 4517, 15652, 0, + 4517, 15748, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_PX846R3, - 4517, 15673, 0, + 4517, 15769, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_PX857R3, - 4517, 15680, 0, + 4517, 15776, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_PX101R3, - 4517, 15659, 0, + 4517, 15755, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_PX475, - 4517, 15729, 0, + 4517, 15825, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_PX803, - 4517, 15736, 0, + 4517, 15832, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_IX100, - 15571, 15743, 0, + 15667, 15839, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_IX200, - 15571, 15750, 0, + 15667, 15846, 0, PCI_VENDOR_BRAINBOXES, PCI_PRODUCT_BRAINBOXES_IX400, - 15571, 15757, 0, + 15667, 15853, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5752, - 15764, 15772, 7887, 5717, 0, + 15860, 15868, 7920, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5752M, - 15782, 15772, 7887, 5717, 0, + 15878, 15868, 7920, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5709, - 15791, 15772, 7596, 7887, 5717, 0, + 15887, 15868, 7629, 7920, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5709S, - 15791, 15772, 7596, 7876, 5717, 0, + 15887, 15868, 7629, 7909, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5716, - 15799, 15772, 7596, 7887, 5717, 0, + 15895, 15868, 7629, 7920, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5716S, - 15799, 15772, 7596, 7876, 5717, 0, + 15895, 15868, 7629, 7909, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM57811, - 15807, 15816, 5717, 0, + 15903, 15912, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM57811_MF, - 15807, 15816, 15821, 5717, 0, + 15903, 15912, 15917, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM57811_VF, - 15807, 15816, 15824, 15833, 0, + 15903, 15912, 15920, 15929, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM57787, - 15836, 5709, 5717, 0, + 15932, 5727, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM57764, - 15845, 5709, 5717, 0, + 15941, 5727, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5725, - 15854, 5709, 5717, 0, + 15950, 5727, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5700, - 7897, 5732, 5717, 0, + 7930, 5750, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5701, - 7905, 5732, 5717, 0, + 7938, 5750, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5702, - 15862, 5732, 5717, 0, + 15958, 5750, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5703, - 15870, 5732, 5717, 0, + 15966, 5750, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5704C, - 15878, 7887, 5717, 0, + 15974, 7920, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5704S_ALT, - 15887, 7876, 5717, 0, + 15983, 7909, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5706, - 15896, 15772, 7596, 7887, 5717, 0, + 15992, 15868, 7629, 7920, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5708, - 15904, 15772, 7596, 7887, 5717, 0, + 16000, 15868, 7629, 7920, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5702FE, - 15912, 5819, 5717, 0, + 16008, 5837, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM57710, - 15922, 15772, 7596, 15816, 5717, 0, + 16018, 15868, 7629, 15912, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM57711, - 15931, 15772, 7596, 15816, 5717, 0, + 16027, 15868, 7629, 15912, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM57711E, - 15940, 15772, 7596, 15816, 5717, 0, + 16036, 15868, 7629, 15912, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5705, - 15950, 5732, 5717, 0, + 16046, 5750, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5705K, - 15958, 5732, 5717, 0, + 16054, 5750, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5717, - 15967, 5732, 5717, 0, + 16063, 5750, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5718, - 15975, 5732, 5717, 0, + 16071, 5750, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5719, - 15983, 15772, 7887, 5717, 0, + 16079, 15868, 7920, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5721, - 15991, 15772, 7887, 5717, 0, + 16087, 15868, 7920, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5722, - 15999, 15772, 7887, 5717, 0, + 16095, 15868, 7920, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5723, - 16007, 15772, 7887, 5717, 0, + 16103, 15868, 7920, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5724, - 16015, 5732, 5717, 0, + 16111, 5750, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5705M, - 16023, 5732, 5717, 0, + 16119, 5750, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5705M_ALT, - 16023, 5732, 5717, 0, + 16119, 5750, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5720, - 16032, 15772, 7887, 5717, 0, + 16128, 15868, 7920, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM57712, - 16040, 15772, 7596, 15816, 5717, 0, + 16136, 15868, 7629, 15912, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM57712_MF, - 16040, 15772, 7596, 15816, 5717, 15821, 0, + 16136, 15868, 7629, 15912, 5735, 15917, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5717C, - 15967, 5732, 5717, 0, + 16063, 5750, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5714, - 16049, 7887, 5717, 0, + 16145, 7920, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5714S, - 16057, 7876, 5717, 0, + 16153, 7909, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5780, - 16066, 15772, 7887, 5717, 0, + 16162, 15868, 7920, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5780S, - 16074, 15772, 7876, 5717, 0, + 16170, 15868, 7909, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5705F, - 16083, 5819, 5717, 0, + 16179, 5837, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM57712_VF, - 16040, 15772, 7596, 15816, 5717, 15833, 0, + 16136, 15868, 7629, 15912, 5735, 15929, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5754M, - 16092, 15772, 7887, 5717, 0, + 16188, 15868, 7920, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5755M, - 16101, 15772, 7887, 5717, 0, + 16197, 15868, 7920, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5756, - 16110, 5732, 5717, 0, + 16206, 5750, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5750, - 16118, 5732, 5717, 0, + 16214, 5750, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5751, - 16126, 5732, 5717, 0, + 16222, 5750, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5715, - 16134, 7887, 5717, 0, + 16230, 7920, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5715S, - 16142, 7876, 5717, 0, + 16238, 7909, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5754, - 16151, 5732, 5717, 0, + 16247, 5750, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5755, - 16159, 15772, 7887, 5717, 0, + 16255, 15868, 7920, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5750M, - 16167, 5732, 5717, 0, + 16263, 5750, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5751M, - 16176, 5732, 5717, 0, + 16272, 5750, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5751F, - 16185, 5819, 5717, 0, + 16281, 5837, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5787F, - 16194, 5819, 5717, 0, + 16290, 5837, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5761E, - 16203, 5732, 5717, 0, + 16299, 5750, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5761, - 16212, 5732, 5717, 0, + 16308, 5750, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM57762, - 16220, 5709, 5717, 0, + 16316, 5727, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM57767, - 16229, 5709, 5717, 0, + 16325, 5727, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5764, - 16238, 15772, 7887, 5717, 0, + 16334, 15868, 7920, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM57766, - 16246, 15772, 7887, 5717, 0, + 16342, 15868, 7920, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5762, - 16255, 15772, 7887, 5717, 0, + 16351, 15868, 7920, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5761S, - 16263, 5732, 5717, 0, + 16359, 5750, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5761SE, - 16272, 5732, 5717, 0, + 16368, 5750, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM57800, - 16282, 15772, 7596, 15816, 5717, 0, + 16378, 15868, 7629, 15912, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM57840_OBS, - 16291, 15816, 5717, 0, + 16387, 15912, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM57810, - 16300, 15816, 5717, 0, + 16396, 15912, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM57760, - 16309, 15772, 7887, 5717, 0, + 16405, 15868, 7920, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM57788, - 16318, 16327, 7887, 5717, 0, + 16414, 16423, 7920, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM57780, - 16335, 15772, 7887, 5717, 0, + 16431, 15868, 7920, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5787M, - 16344, 5732, 5717, 0, + 16440, 5750, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM57790, - 16353, 5819, 5717, 0, + 16449, 5837, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5782, - 16362, 5732, 5717, 0, + 16458, 5750, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5784M, - 16370, 16327, 7887, 5717, 0, + 16466, 16423, 7920, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5785G, - 16379, 5732, 5717, 0, + 16475, 5750, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5786, - 16388, 16327, 7887, 5717, 0, + 16484, 16423, 7920, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5787, - 16396, 16327, 7887, 5717, 0, + 16492, 16423, 7920, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5788, - 16404, 5732, 5717, 0, + 16500, 5750, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5789, - 16412, 16327, 7887, 5717, 0, + 16508, 16423, 7920, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5785F, - 16420, 5819, 5717, 0, + 16516, 5837, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM57840_4_10, - 16291, 16429, 5717, 0, + 16387, 16525, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM57840_2_20, - 16291, 16436, 5717, 0, + 16387, 16532, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM57840_MF, - 16291, 15816, 5717, 15821, 0, + 16387, 15912, 5735, 15917, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM57800_MF, - 16282, 15816, 5717, 15821, 0, + 16378, 15912, 5735, 15917, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5702X, - 16443, 5732, 5717, 0, + 16539, 5750, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5703X, - 16452, 5732, 5717, 0, + 16548, 5750, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5704S, - 15887, 7876, 5717, 0, + 15983, 7909, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM57800_VF, - 16282, 15816, 5717, 15833, 0, + 16378, 15912, 5735, 15929, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5706S, - 15896, 15772, 7596, 7876, 0, + 15992, 15868, 7629, 7909, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM57840_OBS_MF, - 16291, 15816, 5717, 15821, 0, + 16387, 15912, 5735, 15917, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5708S, - 15904, 15772, 7596, 7876, 0, + 16000, 15868, 7629, 7909, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM57840_VF, - 16291, 16461, 5717, 15833, 0, + 16387, 16557, 5735, 15929, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM57810_MF, - 16300, 15816, 5717, 15821, 0, + 16396, 15912, 5735, 15917, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM57810_VF, - 16300, 15816, 5717, 15833, 0, + 16396, 15912, 5735, 15929, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM57761, - 16466, 5732, 5717, 0, + 16562, 5750, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM57781, - 16475, 5732, 5717, 0, + 16571, 5750, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM57791, - 16484, 5732, 5717, 0, + 16580, 5750, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM57786, - 16493, 5732, 5717, 0, + 16589, 5750, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM57765, - 16502, 692, 5709, 5717, 0, + 16598, 692, 5727, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM57785, - 16511, 692, 5709, 5717, 0, + 16607, 692, 5727, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM57795, - 16520, 5732, 5717, 0, + 16616, 5750, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM57782, - 16529, 5732, 5717, 0, + 16625, 5750, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_SDMMC, - 16538, 16547, 0, + 16634, 16643, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_MS, - 16538, 16553, 0, + 16634, 16649, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_XD, - 16538, 16562, 0, + 16634, 16658, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5702_ALT, - 15862, 5732, 5717, 0, + 15958, 5750, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5703_ALT, - 15870, 5732, 5717, 0, + 15966, 5750, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM57301, - 16565, 16574, 15816, 5717, 0, + 16661, 16670, 15912, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM57302, - 16586, 16574, 16595, 5717, 0, + 16682, 16670, 16691, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM57304, - 16600, 16574, 16609, 5717, 0, + 16696, 16670, 16705, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM57311, - 16614, 16574, 15816, 5717, 0, + 16710, 16670, 15912, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM57312, - 16623, 16574, 16595, 5717, 0, + 16719, 16670, 16691, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM57402, - 16632, 16641, 15816, 5717, 0, + 16728, 16737, 15912, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM57404, - 16653, 16641, 16595, 5717, 0, + 16749, 16737, 16691, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM57406, - 16662, 16641, 16671, 5717, 0, + 16758, 16737, 16767, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM57407, - 16681, 16641, 5717, 0, + 16777, 16737, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM57412, - 16690, 16641, 5717, 0, + 16786, 16737, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM57414, - 16699, 16641, 5717, 0, + 16795, 16737, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM57416, - 16708, 16641, 5717, 0, + 16804, 16737, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM57417, - 16717, 16641, 5717, 0, + 16813, 16737, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5781, - 16726, 692, 5709, 5717, 0, + 16822, 692, 5727, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM57314, - 16734, 0, + 16830, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM57417_SFP, - 16717, 16641, 16743, 16753, 5717, 0, + 16813, 16737, 16839, 16849, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM57416_SFP, - 16708, 16641, 15816, 16753, 5717, 0, + 16804, 16737, 15912, 16849, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM57407_SFP, - 16681, 16641, 16595, 16753, 5717, 0, + 16777, 16737, 16691, 16849, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5727, - 16757, 5709, 5717, 0, + 16853, 5727, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5753, - 16765, 5732, 5717, 0, + 16861, 5750, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5753M, - 16773, 5732, 5717, 0, + 16869, 5750, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5753F, - 16782, 5819, 5717, 0, + 16878, 5837, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5903M, - 16791, 5732, 5717, 0, + 16887, 5750, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM4401_B1, - 16800, 5819, 5717, 0, + 16896, 5837, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5901, - 16811, 5819, 5717, 0, + 16907, 5837, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5901A2, - 16819, 5819, 5717, 0, + 16915, 5837, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5906, - 16828, 16327, 2430, 5717, 0, + 16924, 16423, 2430, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM5906M, - 16836, 16327, 2430, 5717, 0, + 16932, 16423, 2430, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM2711, - 16845, 8204, 6953, 0, + 16941, 8237, 6971, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM4303, - 16853, 0, + 16949, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM4307, - 16861, 0, + 16957, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM4311, - 16869, 16877, 0, + 16965, 16973, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM4312, - 16884, 16892, 0, + 16980, 16988, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM4313, - 16901, 16909, 0, + 16997, 17005, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM4315, - 16914, 16877, 0, + 17010, 16973, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM4318, - 16922, 16930, 4563, 16939, 0, + 17018, 17026, 4563, 17035, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM4319, - 16943, 0, + 17039, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM4306, - 16951, 0, + 17047, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM4306_2, - 16951, 0, + 17047, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM4322, - 16959, 0, + 17055, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM4309, - 16967, 0, + 17063, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM43XG, - 16975, 0, + 17071, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM4328, - 16983, 16991, 0, + 17079, 17087, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM4329, - 17005, 17013, 0, + 17101, 17109, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM432A, - 17025, 17033, 0, + 17121, 17129, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM432B, - 17040, 16991, 0, + 17136, 17087, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM432C, - 17048, 17013, 0, + 17144, 17109, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM432D, - 17056, 17033, 0, + 17152, 17129, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM43224, - 17064, 16892, 17033, 0, + 17160, 16988, 17129, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM43225, - 17073, 16877, 17033, 0, + 17169, 16973, 17129, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM43227, - 17082, 16877, 17033, 0, + 17178, 16973, 17129, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM43228, - 17091, 16892, 17033, 0, + 17187, 16988, 17129, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM4350, - 17100, 17108, 4761, 3879, 5909, 0, + 17196, 17204, 4761, 3879, 5927, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM43602, - 17117, 17108, 4761, 4540, 17126, 0, + 17213, 17204, 4761, 4540, 17222, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM4401, - 17130, 5819, 5717, 0, + 17226, 5837, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM4401_B0, - 17138, 5819, 5717, 0, + 17234, 5837, 5735, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM4371, - 17149, 0, + 17245, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM4378, - 17157, 0, + 17253, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM4387, - 17165, 0, + 17261, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_BCM4727, - 17173, 17013, 0, + 17269, 17109, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_5801, - 17181, 8509, 8115, 0, + 17277, 8542, 8148, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_5802, - 17186, 8509, 8115, 0, + 17282, 8542, 8148, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_5805, - 17191, 8509, 8115, 0, + 7533, 8542, 8148, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_5820, - 17196, 8509, 8115, 0, + 17287, 8542, 8148, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_5821, - 17201, 8509, 8115, 0, + 17292, 8542, 8148, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_5822, - 17206, 8509, 8115, 0, + 17297, 8542, 8148, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_5823, - 17211, 8509, 8115, 0, + 17302, 8542, 8148, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_5825, - 17216, 8509, 8115, 0, + 17307, 8542, 8148, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_5860, - 17221, 8509, 8115, 0, + 17312, 8542, 8148, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_5861, - 17226, 8509, 8115, 0, + 17317, 8542, 8148, 0, PCI_VENDOR_BROADCOM, PCI_PRODUCT_BROADCOM_5862, - 17231, 8509, 8115, 0, + 17322, 8542, 8148, 0, PCI_VENDOR_BROOKTREE, PCI_PRODUCT_BROOKTREE_BT848, - 17236, 234, 17242, 0, + 17327, 234, 17333, 0, PCI_VENDOR_BROOKTREE, PCI_PRODUCT_BROOKTREE_BT849, - 17250, 234, 17242, 0, + 17341, 234, 17333, 0, PCI_VENDOR_BROOKTREE, PCI_PRODUCT_BROOKTREE_BT878, - 17256, 234, 17242, 0, + 17347, 234, 17333, 0, PCI_VENDOR_BROOKTREE, PCI_PRODUCT_BROOKTREE_BT879, - 17262, 234, 17242, 0, + 17353, 234, 17333, 0, PCI_VENDOR_BROOKTREE, PCI_PRODUCT_BROOKTREE_BT880, - 17268, 234, 17242, 0, + 17359, 234, 17333, 0, PCI_VENDOR_BROOKTREE, PCI_PRODUCT_BROOKTREE_BT878A, - 17256, 234, 17242, 17274, 17281, 0, + 17347, 234, 17333, 17365, 17372, 0, PCI_VENDOR_BROOKTREE, PCI_PRODUCT_BROOKTREE_BT879A, - 17262, 234, 17242, 17274, 17281, 0, + 17353, 234, 17333, 17365, 17372, 0, PCI_VENDOR_BROOKTREE, PCI_PRODUCT_BROOKTREE_BT880A, - 17268, 234, 17242, 17274, 17281, 0, + 17359, 234, 17333, 17365, 17372, 0, PCI_VENDOR_BROOKTREE, PCI_PRODUCT_BROOKTREE_BT8474, - 17290, 17297, 17310, 6455, 0, + 17381, 17388, 17401, 6473, 0, PCI_VENDOR_BUSLOGIC, PCI_PRODUCT_BUSLOGIC_MULTIMASTER_NC, - 17315, 17327, 0, + 17406, 17418, 0, PCI_VENDOR_BUSLOGIC, PCI_PRODUCT_BUSLOGIC_MULTIMASTER, - 17315, 0, + 17406, 0, PCI_VENDOR_BUSLOGIC, PCI_PRODUCT_BUSLOGIC_FLASHPOINT, - 17330, 0, + 17421, 0, PCI_VENDOR_C4T, PCI_PRODUCT_C4T_GPPCI, - 17341, 0, + 17432, 0, PCI_VENDOR_CAVIUM, PCI_PRODUCT_CAVIUM_NITROX, - 17347, 5807, 0, + 17438, 5825, 0, PCI_VENDOR_CAVIUM, PCI_PRODUCT_CAVIUM_THUNDERX_MRML, - 17354, 17361, 6563, 7009, 17365, 17369, 0, + 17445, 17452, 6581, 7027, 17456, 17460, 0, PCI_VENDOR_CAVIUM, PCI_PRODUCT_CAVIUM_THUNDERX_PCIB, - 615, 6563, 0, + 615, 6581, 0, PCI_VENDOR_CAVIUM, PCI_PRODUCT_CAVIUM_THUNDERX_SMMU, - 17377, 0, + 17468, 0, PCI_VENDOR_CAVIUM, PCI_PRODUCT_CAVIUM_THUNDERX_GIC, - 17382, 17390, 6455, 0, + 17473, 17481, 6473, 0, PCI_VENDOR_CAVIUM, PCI_PRODUCT_CAVIUM_THUNDERX_GPIO, - 17400, 6455, 0, + 17491, 6473, 0, PCI_VENDOR_CAVIUM, PCI_PRODUCT_CAVIUM_THUNDERX_MPI_SPI, - 17405, 2173, 17409, 6455, 0, + 17496, 2173, 17500, 6473, 0, PCI_VENDOR_CAVIUM, PCI_PRODUCT_CAVIUM_THUNDERX_MIO_PTP, - 17413, 6455, 0, + 17504, 6473, 0, PCI_VENDOR_CAVIUM, PCI_PRODUCT_CAVIUM_THUNDERX_MIX, - 17421, 3879, 6455, 0, + 17512, 3879, 6473, 0, PCI_VENDOR_CAVIUM, PCI_PRODUCT_CAVIUM_THUNDERX_RESET, - 17425, 6455, 0, + 17516, 6473, 0, PCI_VENDOR_CAVIUM, PCI_PRODUCT_CAVIUM_THUNDERX_UART, - 7983, 6455, 0, + 8016, 6473, 0, PCI_VENDOR_CAVIUM, PCI_PRODUCT_CAVIUM_THUNDERX_EMMC_SD, - 17431, 6455, 0, + 17522, 6473, 0, PCI_VENDOR_CAVIUM, PCI_PRODUCT_CAVIUM_THUNDERX_MIO_BOOT, - 17439, 6455, 0, + 17530, 6473, 0, PCI_VENDOR_CAVIUM, PCI_PRODUCT_CAVIUM_THUNDERX_TWSI_I2C, - 17448, 2173, 17453, 6455, 0, + 17539, 2173, 17544, 6473, 0, PCI_VENDOR_CAVIUM, PCI_PRODUCT_CAVIUM_THUNDERX_CCPI, - 17457, 17462, 17474, 0, + 17548, 17553, 17565, 0, PCI_VENDOR_CAVIUM, PCI_PRODUCT_CAVIUM_THUNDERX_VRM, - 17483, 17491, 14799, 0, + 17574, 17582, 14895, 0, PCI_VENDOR_CAVIUM, PCI_PRODUCT_CAVIUM_THUNDERX_PSLI, - 8204, 17501, 86, 3018, 0, + 8237, 8853, 86, 3018, 0, PCI_VENDOR_CAVIUM, PCI_PRODUCT_CAVIUM_THUNDERX_KM, - 17508, 4504, 0, + 17592, 4504, 0, PCI_VENDOR_CAVIUM, PCI_PRODUCT_CAVIUM_THUNDERX_GST, - 17512, 17516, 6, 17524, 0, + 17596, 17600, 6, 17608, 0, PCI_VENDOR_CAVIUM, PCI_PRODUCT_CAVIUM_THUNDERX_RNG, - 17532, 1040, 17539, 0, + 17616, 1040, 17623, 0, PCI_VENDOR_CAVIUM, PCI_PRODUCT_CAVIUM_THUNDERX_DFA, - 17549, 0, + 17633, 0, PCI_VENDOR_CAVIUM, PCI_PRODUCT_CAVIUM_THUNDERX_ZIP, - 17553, 8438, 0, + 17637, 8471, 0, PCI_VENDOR_CAVIUM, PCI_PRODUCT_CAVIUM_THUNDERX_XHCI, - 8233, 6945, 6455, 0, + 8266, 6963, 6473, 0, PCI_VENDOR_CAVIUM, PCI_PRODUCT_CAVIUM_THUNDERX_AHCI, - 8775, 8762, 6455, 0, + 8819, 8800, 6473, 0, PCI_VENDOR_CAVIUM, PCI_PRODUCT_CAVIUM_THUNDERX_RAID, - 6450, 8438, 0, + 6468, 8471, 0, PCI_VENDOR_CAVIUM, PCI_PRODUCT_CAVIUM_THUNDERX_NIC, - 3879, 3018, 6455, 0, + 3879, 3018, 6473, 0, PCI_VENDOR_CAVIUM, PCI_PRODUCT_CAVIUM_THUNDERX_TNS, - 17557, 3879, 17501, 0, + 17641, 3879, 8853, 0, PCI_VENDOR_CAVIUM, PCI_PRODUCT_CAVIUM_THUNDERX_PEM, - 17565, 17569, 4320, 17574, 0, + 17649, 17653, 4320, 17658, 0, PCI_VENDOR_CAVIUM, PCI_PRODUCT_CAVIUM_THUNDERX_L2C, - 9910, 17585, 1400, 17594, 0, + 10006, 17669, 1400, 17678, 0, PCI_VENDOR_CAVIUM, PCI_PRODUCT_CAVIUM_THUNDERX_LMC, - 8046, 6455, 0, + 8079, 6473, 0, PCI_VENDOR_CAVIUM, PCI_PRODUCT_CAVIUM_THUNDERX_OCLA, - 17606, 17611, 86, 17620, 0, + 17690, 17695, 86, 17704, 0, PCI_VENDOR_CAVIUM, PCI_PRODUCT_CAVIUM_THUNDERX_OSM, - 17630, 0, + 17714, 0, PCI_VENDOR_CAVIUM, PCI_PRODUCT_CAVIUM_THUNDERX_GSER, - 17634, 17639, 17648, 0, + 17718, 17723, 17732, 0, PCI_VENDOR_CAVIUM, PCI_PRODUCT_CAVIUM_THUNDERX_BGX, - 17673, 5717, 3018, 0, + 17757, 5735, 3018, 0, PCI_VENDOR_CAVIUM, PCI_PRODUCT_CAVIUM_THUNDERX_IOBN, - 17680, 0, + 17764, 0, PCI_VENDOR_CAVIUM, PCI_PRODUCT_CAVIUM_THUNDERX_NCSCI, - 17685, 17690, 6455, 17699, 17574, 0, + 17769, 17774, 6473, 17783, 17658, 0, PCI_VENDOR_CAVIUM, PCI_PRODUCT_CAVIUM_THUNDERX_SGPIO, - 17708, 17714, 17400, 17722, 3296, 8762, 17733, 17738, 0, + 17792, 17798, 17491, 17806, 3296, 8800, 17817, 17822, 0, PCI_VENDOR_CAVIUM, PCI_PRODUCT_CAVIUM_THUNDERX_SMI_MDIO, - 17746, 2173, 17750, 6455, 0, + 17830, 2173, 17834, 6473, 0, PCI_VENDOR_CAVIUM, PCI_PRODUCT_CAVIUM_THUNDERX_DAP, - 17755, 17759, 17766, 17773, 0, + 17839, 17843, 17850, 17857, 0, PCI_VENDOR_CAVIUM, PCI_PRODUCT_CAVIUM_THUNDERX_PCIERC, - 17779, 10520, 8140, 17786, 0, + 17863, 10635, 8173, 17870, 0, PCI_VENDOR_CAVIUM, PCI_PRODUCT_CAVIUM_THUNDERX_L2C_TAD, - 4557, 6411, 17795, 17801, 558, 17805, 0, + 4557, 6429, 17879, 17885, 558, 17889, 0, PCI_VENDOR_CAVIUM, PCI_PRODUCT_CAVIUM_THUNDERX_L2C_CBC, - 17810, 0, + 17894, 0, PCI_VENDOR_CAVIUM, PCI_PRODUCT_CAVIUM_THUNDERX_L2C_MCI, - 17818, 0, + 17902, 0, PCI_VENDOR_CAVIUM, PCI_PRODUCT_CAVIUM_THUNDERX_MIOS_FUS, - 17826, 17834, 17766, 17594, 0, + 17910, 17918, 17850, 17678, 0, PCI_VENDOR_CAVIUM, PCI_PRODUCT_CAVIUM_THUNDERX_FUSE, - 17840, 17834, 17594, 0, + 17924, 17918, 17678, 0, PCI_VENDOR_CAVIUM, PCI_PRODUCT_CAVIUM_THUNDERX_RNGVF, - 17532, 1040, 17539, 17845, 17853, 0, + 17616, 1040, 17623, 17929, 17937, 0, PCI_VENDOR_CAVIUM, PCI_PRODUCT_CAVIUM_THUNDERX_NICVF, - 3879, 3018, 6455, 17845, 17853, 0, + 3879, 3018, 6473, 17929, 17937, 0, PCI_VENDOR_CAVIUM, PCI_PRODUCT_CAVIUM_THUNDERX_PB, - 17862, 17871, 0, + 17946, 17955, 0, PCI_VENDOR_CAVIUM, PCI_PRODUCT_CAVIUM_THUNDERX_RAIDVF, - 17875, 17879, 17885, 17898, 17845, 17853, 0, + 17959, 8824, 17963, 17976, 17929, 17937, 0, PCI_VENDOR_CAVIUM, PCI_PRODUCT_CAVIUM_THUNDERX_ZIPVF, - 17906, 17845, 17853, 0, + 17984, 17929, 17937, 0, PCI_VENDOR_CAVIUM, PCI_PRODUCT_CAVIUM_THUNDERX_CA, - 17910, 8424, 7847, 0, + 17988, 8457, 7880, 0, PCI_VENDOR_CHELSIO, PCI_PRODUCT_CHELSIO_PE9000, - 17914, 8538, 0, + 17992, 8571, 0, PCI_VENDOR_CHELSIO, PCI_PRODUCT_CHELSIO_T302E, - 17921, 0, + 17999, 0, PCI_VENDOR_CHELSIO, PCI_PRODUCT_CHELSIO_T310E, - 17927, 0, + 18005, 0, PCI_VENDOR_CHELSIO, PCI_PRODUCT_CHELSIO_T320X, - 17933, 0, + 18011, 0, PCI_VENDOR_CHELSIO, PCI_PRODUCT_CHELSIO_T302X, - 17939, 0, + 18017, 0, PCI_VENDOR_CHELSIO, PCI_PRODUCT_CHELSIO_T320E, - 17945, 0, + 18023, 0, PCI_VENDOR_CHELSIO, PCI_PRODUCT_CHELSIO_T310X, - 17951, 0, + 18029, 0, PCI_VENDOR_CHELSIO, PCI_PRODUCT_CHELSIO_T3B10, - 17957, 0, + 18035, 0, PCI_VENDOR_CHELSIO, PCI_PRODUCT_CHELSIO_T3B20, - 17963, 0, + 18041, 0, PCI_VENDOR_CHELSIO, PCI_PRODUCT_CHELSIO_T3B02, - 17969, 0, + 18047, 0, PCI_VENDOR_CHELSIO, PCI_PRODUCT_CHELSIO_T3B04, - 17975, 0, + 18053, 0, PCI_VENDOR_CHELSIO, PCI_PRODUCT_CHELSIO_T3C10, - 17981, 0, + 18059, 0, PCI_VENDOR_CHELSIO, PCI_PRODUCT_CHELSIO_S320E_CR, - 17987, 0, + 18065, 0, PCI_VENDOR_CHELSIO, PCI_PRODUCT_CHELSIO_N320E_G2, - 17996, 0, + 18074, 0, PCI_VENDOR_CHELSIO, PCI_PRODUCT_CHELSIO_T440_DBG, - 18005, 0, + 18083, 0, PCI_VENDOR_CHELSIO, PCI_PRODUCT_CHELSIO_T420_CR, - 18014, 0, + 18092, 0, PCI_VENDOR_CHELSIO, PCI_PRODUCT_CHELSIO_T422_CR, - 18022, 0, + 18100, 0, PCI_VENDOR_CHELSIO, PCI_PRODUCT_CHELSIO_T440_CR, - 18030, 0, + 18108, 0, PCI_VENDOR_CHELSIO, PCI_PRODUCT_CHELSIO_T420_BCH, - 18038, 0, + 18116, 0, PCI_VENDOR_CHELSIO, PCI_PRODUCT_CHELSIO_T440_BCH, - 18047, 0, + 18125, 0, PCI_VENDOR_CHELSIO, PCI_PRODUCT_CHELSIO_T440_CH, - 18056, 0, + 18134, 0, PCI_VENDOR_CHELSIO, PCI_PRODUCT_CHELSIO_T420_SO, - 18064, 0, + 18142, 0, PCI_VENDOR_CHELSIO, PCI_PRODUCT_CHELSIO_T420_CX, - 18072, 0, + 18150, 0, PCI_VENDOR_CHELSIO, PCI_PRODUCT_CHELSIO_T420_BT, - 18080, 0, + 18158, 0, PCI_VENDOR_CHELSIO, PCI_PRODUCT_CHELSIO_T404_BT, - 18088, 0, + 18166, 0, PCI_VENDOR_CHELSIO, PCI_PRODUCT_CHELSIO_T440_LP_CR, - 18096, 0, + 18174, 0, PCI_VENDOR_CHELSIO, PCI_PRODUCT_CHELSIO_T580_DBG, - 18107, 0, + 18185, 0, PCI_VENDOR_CHELSIO, PCI_PRODUCT_CHELSIO_T520_CR, - 18116, 0, + 18194, 0, PCI_VENDOR_CHELSIO, PCI_PRODUCT_CHELSIO_T522_CR, - 18124, 0, + 18202, 0, PCI_VENDOR_CHELSIO, PCI_PRODUCT_CHELSIO_T540_CR, - 18132, 0, + 18210, 0, PCI_VENDOR_CHELSIO, PCI_PRODUCT_CHELSIO_T520_SO, - 18140, 0, + 18218, 0, PCI_VENDOR_CHELSIO, PCI_PRODUCT_CHELSIO_T520_BT, - 18148, 0, + 18226, 0, PCI_VENDOR_CHELSIO, PCI_PRODUCT_CHELSIO_T504_BT, - 18156, 0, + 18234, 0, PCI_VENDOR_CHELSIO, PCI_PRODUCT_CHELSIO_T580_CR, - 18164, 0, + 18242, 0, PCI_VENDOR_CHELSIO, PCI_PRODUCT_CHELSIO_T540_LP_CR, - 18172, 0, + 18250, 0, PCI_VENDOR_CHELSIO, PCI_PRODUCT_CHELSIO_T580_LP_CR, - 18183, 0, + 18261, 0, PCI_VENDOR_CHELSIO, PCI_PRODUCT_CHELSIO_T520_LL_CR, - 18194, 0, + 18272, 0, PCI_VENDOR_CHELSIO, PCI_PRODUCT_CHELSIO_T560_CR, - 18205, 0, + 18283, 0, PCI_VENDOR_CHELSIO, PCI_PRODUCT_CHELSIO_T580_LP_SO_CR, - 18213, 0, + 18291, 0, PCI_VENDOR_CHELSIO, PCI_PRODUCT_CHELSIO_T502_BT, - 18227, 0, + 18305, 0, PCI_VENDOR_CHELSIO, PCI_PRODUCT_CHELSIO_T6_DBG_25, - 18235, 0, + 18313, 0, PCI_VENDOR_CHELSIO, PCI_PRODUCT_CHELSIO_T6225_CR, - 18245, 0, + 18323, 0, PCI_VENDOR_CHELSIO, PCI_PRODUCT_CHELSIO_T6225_SO_CR, - 18254, 0, + 18332, 0, PCI_VENDOR_CHELSIO, PCI_PRODUCT_CHELSIO_T6425_CR, - 18266, 0, + 18344, 0, PCI_VENDOR_CHELSIO, PCI_PRODUCT_CHELSIO_T6425_SO_CR, - 18275, 0, + 18353, 0, PCI_VENDOR_CHELSIO, PCI_PRODUCT_CHELSIO_T6225_OCP_SO, - 18287, 0, + 18365, 0, PCI_VENDOR_CHELSIO, PCI_PRODUCT_CHELSIO_T62100_OCP_SO, - 18300, 0, + 18378, 0, PCI_VENDOR_CHELSIO, PCI_PRODUCT_CHELSIO_T62100_LP_CR, - 18314, 0, + 18392, 0, PCI_VENDOR_CHELSIO, PCI_PRODUCT_CHELSIO_T62100_SO_CR, - 18327, 0, + 18405, 0, PCI_VENDOR_CHELSIO, PCI_PRODUCT_CHELSIO_T6210_BT, - 18340, 0, + 18418, 0, PCI_VENDOR_CHELSIO, PCI_PRODUCT_CHELSIO_T62100_CR, - 18349, 0, + 18427, 0, PCI_VENDOR_CHELSIO, PCI_PRODUCT_CHELSIO_T6_DBG_100, - 18359, 0, + 18437, 0, PCI_VENDOR_CHELSIO, PCI_PRODUCT_CHELSIO_T6225_LL_CR, - 18370, 0, + 18448, 0, PCI_VENDOR_CHELSIO, PCI_PRODUCT_CHELSIO_T61100_OCP_SO, - 18382, 0, + 18460, 0, PCI_VENDOR_CHELSIO, PCI_PRODUCT_CHELSIO_T6201_BT, - 18396, 0, + 18474, 0, PCI_VENDOR_CHELSIO, PCI_PRODUCT_CHELSIO_T6225_80, - 18405, 18411, 0, + 18483, 18489, 0, PCI_VENDOR_CHELSIO, PCI_PRODUCT_CHELSIO_T62100_81, - 18414, 18421, 0, + 18492, 18499, 0, PCI_VENDOR_CHELSIO, PCI_PRODUCT_CHELSIO_T62100_84, - 18414, 18424, 0, + 18492, 18502, 0, PCI_VENDOR_CHELSIO, PCI_PRODUCT_CHELSIO_T4_FPGA, - 18427, 6786, 18438, 0, + 18505, 6804, 18516, 0, PCI_VENDOR_CHELSIO, PCI_PRODUCT_CHELSIO_T5_FPGA, - 18427, 8138, 18438, 0, + 18505, 8171, 18516, 0, PCI_VENDOR_CHELSIO, PCI_PRODUCT_CHELSIO_T6_FPGA, - 18427, 8371, 18438, 0, + 18505, 8404, 18516, 0, PCI_VENDOR_CHIPS, PCI_PRODUCT_CHIPS_64310, - 18443, 0, + 18521, 0, PCI_VENDOR_CHIPS, PCI_PRODUCT_CHIPS_69000, - 18449, 0, + 18527, 0, PCI_VENDOR_CHIPS, PCI_PRODUCT_CHIPS_65545, - 18455, 0, + 18533, 0, PCI_VENDOR_CHIPS, PCI_PRODUCT_CHIPS_65548, - 18461, 0, + 18539, 0, PCI_VENDOR_CHIPS, PCI_PRODUCT_CHIPS_65550, - 18467, 0, + 18545, 0, PCI_VENDOR_CHIPS, PCI_PRODUCT_CHIPS_65554, - 18473, 0, + 18551, 0, PCI_VENDOR_CHIPS, PCI_PRODUCT_CHIPS_69030, - 18479, 0, + 18557, 0, PCI_VENDOR_CHRYSALIS, PCI_PRODUCT_CHRYSALIS_LUNAVPN, - 18485, 0, + 18563, 0, PCI_VENDOR_CIRRUS, PCI_PRODUCT_CIRRUS_CL_GD7548, - 18493, 0, + 18571, 0, PCI_VENDOR_CIRRUS, PCI_PRODUCT_CIRRUS_CL_GD5430, - 18503, 0, + 18581, 0, PCI_VENDOR_CIRRUS, PCI_PRODUCT_CIRRUS_CL_GD5434_4, - 18513, 0, + 18591, 0, PCI_VENDOR_CIRRUS, PCI_PRODUCT_CIRRUS_CL_GD5434_8, - 18525, 0, + 18603, 0, PCI_VENDOR_CIRRUS, PCI_PRODUCT_CIRRUS_CL_GD5436, - 18537, 0, + 18615, 0, PCI_VENDOR_CIRRUS, PCI_PRODUCT_CIRRUS_CL_GD5446, - 18547, 0, + 18625, 0, PCI_VENDOR_CIRRUS, PCI_PRODUCT_CIRRUS_CL_GD5480, - 18557, 0, + 18635, 0, PCI_VENDOR_CIRRUS, PCI_PRODUCT_CIRRUS_CL_PD6729, - 18567, 0, + 18645, 0, PCI_VENDOR_CIRRUS, PCI_PRODUCT_CIRRUS_CL_PD6832, - 18577, 18587, 6563, 0, + 18655, 18665, 6581, 0, PCI_VENDOR_CIRRUS, PCI_PRODUCT_CIRRUS_CL_PD6833, - 18599, 18587, 6563, 0, + 18677, 18665, 6581, 0, PCI_VENDOR_CIRRUS, PCI_PRODUCT_CIRRUS_CL_GD7542, - 18609, 0, + 18687, 0, PCI_VENDOR_CIRRUS, PCI_PRODUCT_CIRRUS_CL_GD7543, - 18619, 0, + 18697, 0, PCI_VENDOR_CIRRUS, PCI_PRODUCT_CIRRUS_CL_GD7541, - 18629, 0, + 18707, 0, PCI_VENDOR_CIRRUS, PCI_PRODUCT_CIRRUS_CL_CD4400, - 18639, 3323, 6455, 0, + 18717, 3323, 6473, 0, PCI_VENDOR_CIRRUS, PCI_PRODUCT_CIRRUS_CS4610, - 18649, 18656, 7054, 7847, 0, + 18727, 18734, 7072, 7880, 0, PCI_VENDOR_CIRRUS, PCI_PRODUCT_CIRRUS_CS4280, - 18668, 18675, 7054, 3018, 0, + 18746, 18753, 7072, 3018, 0, PCI_VENDOR_CIRRUS, PCI_PRODUCT_CIRRUS_CS4615, - 18688, 0, + 18766, 0, PCI_VENDOR_CIRRUS, PCI_PRODUCT_CIRRUS_CS4281, - 18695, 18675, 7054, 3018, 0, + 18773, 18753, 7072, 3018, 0, PCI_VENDOR_CMDTECH, PCI_PRODUCT_CMDTECH_AAR_1210SA, - 18702, 8762, 6450, 6455, 0, + 18780, 8800, 6468, 6473, 0, PCI_VENDOR_CMDTECH, PCI_PRODUCT_CMDTECH_AAR_1220SA, - 18713, 8762, 6450, 6455, 0, + 18791, 8800, 6468, 6473, 0, PCI_VENDOR_CMDTECH, PCI_PRODUCT_CMDTECH_640, - 18724, 0, + 18802, 0, PCI_VENDOR_CMDTECH, PCI_PRODUCT_CMDTECH_642, - 18732, 0, + 18810, 0, PCI_VENDOR_CMDTECH, PCI_PRODUCT_CMDTECH_643, - 18740, 0, + 18818, 0, PCI_VENDOR_CMDTECH, PCI_PRODUCT_CMDTECH_646, - 18748, 0, + 18826, 0, PCI_VENDOR_CMDTECH, PCI_PRODUCT_CMDTECH_647, - 18756, 0, + 18834, 0, PCI_VENDOR_CMDTECH, PCI_PRODUCT_CMDTECH_648, - 18764, 0, + 18842, 0, PCI_VENDOR_CMDTECH, PCI_PRODUCT_CMDTECH_649, - 18772, 0, + 18850, 0, PCI_VENDOR_CMDTECH, PCI_PRODUCT_CMDTECH_650A, - 18780, 0, + 18858, 0, PCI_VENDOR_CMDTECH, PCI_PRODUCT_CMDTECH_670, - 18789, 0, + 18867, 0, PCI_VENDOR_CMDTECH, PCI_PRODUCT_CMDTECH_673, - 18797, 0, + 18875, 0, PCI_VENDOR_CMDTECH, PCI_PRODUCT_CMDTECH_680, - 18805, 0, + 18883, 0, PCI_VENDOR_CMDTECH, PCI_PRODUCT_CMDTECH_3112, - 18813, 18821, 0, + 18891, 18899, 0, PCI_VENDOR_CMDTECH, PCI_PRODUCT_CMDTECH_3114, - 18830, 18821, 0, + 18908, 18899, 0, PCI_VENDOR_CMDTECH, PCI_PRODUCT_CMDTECH_3124, - 18838, 18821, 0, + 18916, 18899, 0, PCI_VENDOR_CMDTECH, PCI_PRODUCT_CMDTECH_3132, - 18846, 18821, 0, + 18924, 18899, 0, PCI_VENDOR_CMDTECH, PCI_PRODUCT_CMDTECH_3512, - 18854, 18821, 0, + 18932, 18899, 0, PCI_VENDOR_CMDTECH, PCI_PRODUCT_CMDTECH_3531, - 18862, 18821, 0, + 18940, 18899, 0, PCI_VENDOR_CMEDIA, PCI_PRODUCT_CMEDIA_CMI8338A, - 18870, 615, 7054, 2418, 0, + 18948, 615, 7072, 2418, 0, PCI_VENDOR_CMEDIA, PCI_PRODUCT_CMEDIA_CMI8338B, - 18879, 615, 7054, 2418, 0, + 18957, 615, 7072, 2418, 0, PCI_VENDOR_CMEDIA, PCI_PRODUCT_CMEDIA_CMI8738, - 18888, 615, 7054, 2418, 0, + 18966, 615, 7072, 2418, 0, PCI_VENDOR_CMEDIA, PCI_PRODUCT_CMEDIA_CMI8738B, - 18901, 615, 7054, 2418, 0, + 18979, 615, 7072, 2418, 0, PCI_VENDOR_CMEDIA, PCI_PRODUCT_CMEDIA_HSP56, - 18910, 18916, 18927, 0, + 18988, 18994, 19005, 0, PCI_VENDOR_COGENT, PCI_PRODUCT_COGENT_EM110TX, - 18933, 615, 2430, 5717, 5909, 0, + 19011, 615, 2430, 5735, 5927, 0, PCI_VENDOR_COLOGNECHIP, PCI_PRODUCT_COLOGNECHIP_HFC, - 18941, 0, + 19019, 0, PCI_VENDOR_COMPAL, PCI_PRODUCT_COMPAL_38W2, - 18947, 11476, 18952, 0, + 19025, 11591, 19030, 0, PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_PCI_EISA_BRIDGE, - 18961, 6563, 0, + 19039, 6581, 0, PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_PCI_ISA_BRIDGE, - 6837, 6563, 0, + 6855, 6581, 0, PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_CSA64XX, - 18970, 18976, 18982, 0, + 19048, 19054, 19060, 0, PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_TRIFLEX1, - 18987, 6851, 6563, 0, + 19065, 6869, 6581, 0, PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_TRIFLEX2, - 18987, 6851, 6563, 0, + 19065, 6869, 6581, 0, PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_QVISION_V0, - 18995, 0, + 19073, 0, PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_QVISION_1280P, - 18995, 19003, 0, + 19073, 19081, 0, PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_QVISION_V2, - 18995, 0, + 19073, 0, PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_TRIFLEX4, - 18987, 6851, 6563, 0, + 19065, 6869, 6581, 0, PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_CSA5300, - 18970, 18976, 19010, 0, + 19048, 19054, 19088, 0, PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_CSA5i, - 18970, 18976, 19015, 0, + 19048, 19054, 19093, 0, PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_CSA532, - 18970, 18976, 19018, 0, + 19048, 19054, 19096, 0, PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_CSA5312, - 18970, 18976, 19022, 0, + 19048, 19054, 19100, 0, PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_CSA6i, - 18970, 18976, 19027, 0, + 19048, 19054, 19105, 0, PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_CSA641, - 18970, 18976, 19030, 0, + 19048, 19054, 19108, 0, PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_CSA642, - 18970, 18976, 19034, 0, + 19048, 19054, 19112, 0, PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_CSA6400, - 18970, 18976, 19038, 0, + 19048, 19054, 19116, 0, PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_CSA6400EM, - 18970, 18976, 19038, 19043, 0, + 19048, 19054, 19116, 19121, 0, PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_CSA6422, - 18970, 18976, 19046, 0, + 19048, 19054, 19124, 0, PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_USB, - 6945, 6455, 0, + 6963, 6473, 0, PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_ASMC, - 576, 114, 7078, 6455, 0, + 576, 114, 7096, 6473, 0, PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_USB_MEDIAGX, - 6945, 6455, 0, + 6963, 6473, 0, PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_SMART2P, - 19051, 6450, 0, + 19129, 6468, 0, PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_N100TX, - 19059, 5819, 19071, 0, + 19137, 5837, 19149, 0, PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_N10T, - 19059, 9329, 19074, 0, + 19137, 9425, 19152, 0, PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_IntNF3P, - 692, 19076, 19084, 0, + 692, 19154, 19162, 0, PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_DPNet100TX, - 11247, 8153, 19059, 5819, 19071, 0, + 11362, 8186, 19137, 5837, 19149, 0, PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_IntPL100TX, - 19088, 692, 19059, 5819, 19071, 0, + 19166, 692, 19137, 5837, 19149, 0, PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_DP4000, - 19097, 19105, 19110, 0, + 19175, 19183, 19188, 0, PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_N10T2, - 19059, 9329, 19118, 19122, 0, + 19137, 9425, 19196, 19200, 0, PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_INT100TX, - 692, 19059, 5819, 19071, 0, + 692, 19137, 5837, 19149, 0, PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_CSA5300_2, - 18970, 18976, 19010, 19131, 6411, 0, + 19048, 19054, 19088, 19209, 6429, 0, PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_PRESARIO56XX, - 19136, 19145, 0, + 19214, 19223, 0, PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_M700, - 19150, 19157, 0, + 19228, 19235, 0, PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_CSA5i_2, - 18970, 18976, 19162, 19131, 6411, 0, + 19048, 19054, 19240, 19209, 6429, 0, PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_ILO_1, - 19169, 0, + 19247, 0, PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_ILO_2, - 19169, 0, + 19247, 0, PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_NF3P, - 19076, 19084, 0, + 19154, 19162, 0, PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_NF3P_BNC, - 19076, 19084, 6156, 19173, 0, + 19154, 19162, 6174, 19251, 0, PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_NE2KETHER, - 5717, 0, + 5735, 0, PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100ATX, - 19177, 5819, 5717, 0, + 19255, 5837, 5735, 0, PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100TX, - 19187, 5819, 5717, 0, + 19265, 5837, 5735, 0, PCI_VENDOR_COMTROL, PCI_PRODUCT_COMTROL_ROCKETPORT32EXT, - 19196, 19207, 8153, 14637, 0, + 19274, 19285, 8186, 14733, 0, PCI_VENDOR_COMTROL, PCI_PRODUCT_COMTROL_ROCKETPORT8EXT, - 19196, 6811, 8153, 14637, 0, + 19274, 6829, 8186, 14733, 0, PCI_VENDOR_COMTROL, PCI_PRODUCT_COMTROL_ROCKETPORT16EXT, - 19196, 19210, 8153, 14637, 0, + 19274, 19288, 8186, 14733, 0, PCI_VENDOR_COMTROL, PCI_PRODUCT_COMTROL_ROCKETPORT4QUAD, - 19196, 6786, 8153, 6156, 19213, 19218, 0, + 19274, 6804, 8186, 6174, 19291, 19296, 0, PCI_VENDOR_COMTROL, PCI_PRODUCT_COMTROL_ROCKETPORT8OCTA, - 19196, 6811, 8153, 6156, 19224, 19218, 0, + 19274, 6829, 8186, 6174, 19302, 19296, 0, PCI_VENDOR_COMTROL, PCI_PRODUCT_COMTROL_ROCKETPORT8RJ, - 19196, 6811, 8153, 6156, 19229, 0, + 19274, 6829, 8186, 6174, 19307, 0, PCI_VENDOR_COMTROL, PCI_PRODUCT_COMTROL_ROCKETPORT4RJ, - 19196, 6786, 8153, 6156, 19229, 0, + 19274, 6804, 8186, 6174, 19307, 0, PCI_VENDOR_COMTROL, PCI_PRODUCT_COMTROL_ROCKETPORT8DB, - 19196, 6811, 8153, 6156, 19235, 0, + 19274, 6829, 8186, 6174, 19313, 0, PCI_VENDOR_COMTROL, PCI_PRODUCT_COMTROL_ROCKETPORT16DB, - 19196, 19210, 8153, 6156, 19235, 0, + 19274, 19288, 8186, 6174, 19313, 0, PCI_VENDOR_COMTROL, PCI_PRODUCT_COMTROL_ROCKETPORTP4, - 19196, 19240, 6786, 8153, 0, + 19274, 19318, 6804, 8186, 0, PCI_VENDOR_COMTROL, PCI_PRODUCT_COMTROL_ROCKETPORTP8, - 19196, 19240, 6811, 8153, 0, + 19274, 19318, 6829, 8186, 0, PCI_VENDOR_COMTROL, PCI_PRODUCT_COMTROL_ROCKETMODEM6, - 19245, 8371, 8153, 0, + 19323, 8404, 8186, 0, PCI_VENDOR_COMTROL, PCI_PRODUCT_COMTROL_ROCKETMODEM4, - 19245, 6786, 8153, 0, + 19323, 6804, 8186, 0, PCI_VENDOR_COMTROL, PCI_PRODUCT_COMTROL_ROCKETPORTP232, - 19196, 6411, 8153, 19257, 0, + 19274, 6429, 8186, 19335, 0, PCI_VENDOR_COMTROL, PCI_PRODUCT_COMTROL_ROCKETPORTP422, - 19196, 6411, 8153, 19263, 0, + 19274, 6429, 8186, 19341, 0, PCI_VENDOR_COMTROL, PCI_PRODUCT_COMTROL_ROCKETPORT550811A, - 19196, 19269, 19275, 19280, 11222, 0, + 19274, 19347, 19353, 19358, 11337, 0, PCI_VENDOR_COMTROL, PCI_PRODUCT_COMTROL_ROCKETPORT550811B, - 19196, 19269, 19275, 19280, 5171, 0, + 19274, 19347, 19353, 19358, 5171, 0, PCI_VENDOR_COMTROL, PCI_PRODUCT_COMTROL_ROCKETPORT5508OA, - 19196, 19269, 19224, 19280, 11222, 0, + 19274, 19347, 19302, 19358, 11337, 0, PCI_VENDOR_COMTROL, PCI_PRODUCT_COMTROL_ROCKETPORT5508OB, - 19196, 19269, 19224, 19280, 5171, 0, + 19274, 19347, 19302, 19358, 5171, 0, PCI_VENDOR_COMTROL, PCI_PRODUCT_COMTROL_ROCKETPORT5504, - 19196, 19285, 0, + 19274, 19363, 0, PCI_VENDOR_COMTROL, PCI_PRODUCT_COMTROL_ROCKETPORT550Q, - 19196, 19291, 0, + 19274, 19369, 0, PCI_VENDOR_COMTROL, PCI_PRODUCT_COMTROL_ROCKETPORT55016A, - 19196, 19300, 19280, 11222, 0, + 19274, 19378, 19358, 11337, 0, PCI_VENDOR_COMTROL, PCI_PRODUCT_COMTROL_ROCKETPORT55016B, - 19196, 19300, 19280, 5171, 0, + 19274, 19378, 19358, 5171, 0, PCI_VENDOR_COMTROL, PCI_PRODUCT_COMTROL_ROCKETPORT5508A, - 19196, 19269, 19280, 11222, 0, + 19274, 19347, 19358, 11337, 0, PCI_VENDOR_COMTROL, PCI_PRODUCT_COMTROL_ROCKETPORT5508B, - 19196, 19269, 19280, 5171, 0, + 19274, 19347, 19358, 5171, 0, PCI_VENDOR_CONEXANT, PCI_PRODUCT_CONEXANT_56KFAXMODEM, - 19307, 19310, 19314, 5764, 0, + 19385, 19388, 19392, 5782, 0, PCI_VENDOR_CONEXANT, PCI_PRODUCT_CONEXANT_LANFINITY, - 19318, 19328, 5819, 5717, 0, + 19396, 19406, 5837, 5735, 0, PCI_VENDOR_CONEXANT, PCI_PRODUCT_CONEXANT_SOFTK56, - 19336, 615, 321, 5764, 0, + 19414, 615, 321, 5782, 0, PCI_VENDOR_CONEXANT, PCI_PRODUCT_CONEXANT_CX2388X, - 19344, 615, 19358, 6919, 0, + 19422, 615, 19436, 6937, 0, PCI_VENDOR_CONEXANT, PCI_PRODUCT_CONEXANT_CX2388XAUDIO, - 19344, 615, 7054, 8153, 0, + 19422, 615, 7072, 8186, 0, PCI_VENDOR_CONEXANT, PCI_PRODUCT_CONEXANT_CX2388XMPEG, - 19344, 615, 6914, 8153, 0, + 19422, 615, 6932, 8186, 0, PCI_VENDOR_CONEXANT, PCI_PRODUCT_CONEXANT_CX2388XIR, - 19344, 615, 19370, 8153, 0, + 19422, 615, 19448, 8186, 0, PCI_VENDOR_CONEXANT, PCI_PRODUCT_CONEXANT_CX23885, - 19373, 0, + 19451, 0, PCI_VENDOR_CONTAQ, PCI_PRODUCT_CONTAQ_82C599, - 19381, 19388, 6563, 0, + 19459, 19466, 6581, 0, PCI_VENDOR_CONTAQ, PCI_PRODUCT_CONTAQ_82C693, - 19396, 6837, 6563, 0, + 19474, 6855, 6581, 0, PCI_VENDOR_COREGA, PCI_PRODUCT_COREGA_CB_TXD, - 19403, 19410, 5819, 5717, 0, + 19481, 19488, 5837, 5735, 0, PCI_VENDOR_COREGA, PCI_PRODUCT_COREGA_2CB_TXD, - 19403, 7596, 19410, 5819, 5717, 0, + 19481, 7629, 19488, 5837, 5735, 0, PCI_VENDOR_COREGA, PCI_PRODUCT_COREGA_LAPCIGT, - 19417, 0, + 19495, 0, PCI_VENDOR_COROLLARY, PCI_PRODUCT_COROLLARY_CBUSII_PCIB, - 19428, 19435, 6563, 0, + 19506, 19513, 6581, 0, PCI_VENDOR_CREATIVELABS, PCI_PRODUCT_CREATIVELABS_SBLIVE, - 19443, 19451, 19455, 0, + 19521, 19529, 19533, 0, PCI_VENDOR_CREATIVELABS, PCI_PRODUCT_CREATIVELABS_AWE64D, - 19461, 19474, 0, + 19539, 19552, 0, PCI_VENDOR_CREATIVELABS, PCI_PRODUCT_CREATIVELABS_AUDIGY, - 19481, 19484, 19451, 19455, 0, + 19559, 19562, 19529, 19533, 0, PCI_VENDOR_CREATIVELABS, PCI_PRODUCT_CREATIVELABS_XFI, - 19461, 19491, 0, + 19539, 19569, 0, PCI_VENDOR_CREATIVELABS, PCI_PRODUCT_CREATIVELABS_SBLIVE2, - 19443, 19451, 19455, 0, + 19521, 19529, 19533, 0, PCI_VENDOR_CREATIVELABS, PCI_PRODUCT_CREATIVELABS_SBAUDIGYLS, - 19481, 19484, 19496, 0, + 19559, 19562, 19574, 0, PCI_VENDOR_CREATIVELABS, PCI_PRODUCT_CREATIVELABS_SBAUDIGY4, - 19481, 19484, 6786, 0, + 19559, 19562, 6804, 0, PCI_VENDOR_CREATIVELABS, PCI_PRODUCT_CREATIVELABS_FIWIRE, - 9235, 0, + 9331, 0, PCI_VENDOR_CREATIVELABS, PCI_PRODUCT_CREATIVELABS_SBJOY, - 615, 19499, 19508, 0, + 615, 19577, 19586, 0, PCI_VENDOR_CREATIVELABS, PCI_PRODUCT_CREATIVELABS_AUDIGIN, - 19461, 19484, 240, 0, + 19539, 19562, 240, 0, PCI_VENDOR_CREATIVELABS, PCI_PRODUCT_CREATIVELABS_SBJOY2, - 615, 19499, 19508, 0, + 615, 19577, 19586, 0, PCI_VENDOR_CREATIVELABS, PCI_PRODUCT_CREATIVELABS_SBJOY3, - 615, 19499, 19508, 0, + 615, 19577, 19586, 0, PCI_VENDOR_CREATIVELABS, PCI_PRODUCT_CREATIVELABS_EV1938, - 19517, 19524, 0, + 19595, 19602, 0, PCI_VENDOR_CYCLADES, PCI_PRODUCT_CYCLADES_CYCLOMY_1, - 19529, 19538, 19544, 0, + 19607, 19616, 19622, 0, PCI_VENDOR_CYCLADES, PCI_PRODUCT_CYCLADES_CYCLOMY_2, - 19529, 19547, 19544, 0, + 19607, 19625, 19622, 0, PCI_VENDOR_CYCLADES, PCI_PRODUCT_CYCLADES_CYCLOM4Y_1, - 19553, 19538, 19544, 0, + 19631, 19616, 19622, 0, PCI_VENDOR_CYCLADES, PCI_PRODUCT_CYCLADES_CYCLOM4Y_2, - 19553, 19547, 19544, 0, + 19631, 19625, 19622, 0, PCI_VENDOR_CYCLADES, PCI_PRODUCT_CYCLADES_CYCLOM8Y_1, - 19563, 19538, 19544, 0, + 19641, 19616, 19622, 0, PCI_VENDOR_CYCLADES, PCI_PRODUCT_CYCLADES_CYCLOM8Y_2, - 19563, 19547, 19544, 0, + 19641, 19625, 19622, 0, PCI_VENDOR_CYCLADES, PCI_PRODUCT_CYCLADES_CYCLOMZ_1, - 19573, 19538, 19544, 0, + 19651, 19616, 19622, 0, PCI_VENDOR_CYCLADES, PCI_PRODUCT_CYCLADES_CYCLOMZ_2, - 19573, 19547, 19544, 0, + 19651, 19625, 19622, 0, PCI_VENDOR_CYCLONE, PCI_PRODUCT_CYCLONE_PCI_700, - 19582, 19590, 0, + 19660, 19668, 0, PCI_VENDOR_CYRIX, PCI_PRODUCT_CYRIX_MEDIAGX_PCHB, - 19600, 19608, 615, 6953, 6455, 0, + 19678, 19686, 615, 6971, 6473, 0, PCI_VENDOR_CYRIX, PCI_PRODUCT_CYRIX_CX5520_PCIB, - 19617, 8945, 19624, 0, + 19695, 9041, 19702, 0, PCI_VENDOR_CYRIX, PCI_PRODUCT_CYRIX_CX5530_PCIB, - 19634, 8945, 19624, 19641, 8710, 6563, 0, + 19712, 9041, 19702, 19719, 8743, 6581, 0, PCI_VENDOR_CYRIX, PCI_PRODUCT_CYRIX_CX5530_SMI, - 19634, 8945, 19624, 19656, 19661, 558, 8829, 19668, 0, + 19712, 9041, 19702, 19734, 19739, 558, 8925, 19746, 0, PCI_VENDOR_CYRIX, PCI_PRODUCT_CYRIX_CX5530_IDE, - 19634, 8945, 19624, 10481, 17594, 0, + 19712, 9041, 19702, 10602, 17678, 0, PCI_VENDOR_CYRIX, PCI_PRODUCT_CYRIX_CX5530_AUDIO, - 19634, 8945, 19624, 19675, 0, + 19712, 9041, 19702, 19753, 0, PCI_VENDOR_CYRIX, PCI_PRODUCT_CYRIX_CX5530_VIDEO, - 19634, 8945, 19624, 19689, 17594, 0, + 19712, 9041, 19702, 19767, 17678, 0, PCI_VENDOR_DATUM, PCI_PRODUCT_DATUM_BC635PCI_U, - 19696, 19707, 647, 19710, 8115, 0, + 19774, 19785, 647, 19788, 8148, 0, PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9102, - 19716, 5819, 5717, 0, + 19794, 5837, 5735, 0, PCI_VENDOR_DCI, PCI_PRODUCT_DCI_APCI4, - 19723, 19729, 0, + 19801, 19807, 0, PCI_VENDOR_DCI, PCI_PRODUCT_DCI_APCI8, - 19723, 14826, 0, + 19801, 14922, 0, PCI_VENDOR_DCI, PCI_PRODUCT_DCI_APCI2, - 19723, 19736, 0, + 19801, 19814, 0, PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21050, - 19743, 8791, 6563, 0, + 19821, 8887, 6581, 0, PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21040, - 19751, 19759, 5717, 0, + 19829, 19837, 5735, 0, PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21030, - 19769, 19777, 0, + 19847, 19855, 0, PCI_VENDOR_DEC, PCI_PRODUCT_DEC_NVRAM, - 19785, 19792, 0, + 19863, 19870, 0, PCI_VENDOR_DEC, PCI_PRODUCT_DEC_KZPSA, - 19799, 0, + 19877, 0, PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21140, - 19805, 19813, 5819, 5717, 0, + 19883, 19891, 5837, 5735, 0, PCI_VENDOR_DEC, PCI_PRODUCT_DEC_PBXGB, - 19827, 0, + 19905, 0, PCI_VENDOR_DEC, PCI_PRODUCT_DEC_DEFPA, - 19832, 0, + 19910, 0, PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21041, - 19838, 19846, 19854, 5717, 0, + 19916, 19924, 19932, 5735, 0, PCI_VENDOR_DEC, PCI_PRODUCT_DEC_DGLPB, - 19861, 19867, 0, + 19939, 19945, 0, PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21142, - 19876, 5819, 5717, 0, + 19954, 5837, 5735, 0, PCI_VENDOR_DEC, PCI_PRODUCT_DEC_PN9000SX, - 19890, 19899, 5717, 0, + 19968, 19977, 5735, 0, PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21052, - 19908, 8791, 6563, 0, + 19986, 8887, 6581, 0, PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21150, - 19916, 8791, 6563, 0, + 19994, 8887, 6581, 0, PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21152, - 19924, 8791, 6563, 0, + 20002, 8887, 6581, 0, PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21153, - 19932, 8791, 6563, 0, + 20010, 8887, 6581, 0, PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21154, - 19940, 8791, 6563, 0, + 20018, 8887, 6581, 0, PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21554, - 19948, 8791, 6563, 0, + 20026, 8887, 6581, 0, PCI_VENDOR_DEC, PCI_PRODUCT_DEC_SWXCR, - 19956, 6450, 0, + 20034, 6468, 0, PCI_VENDOR_DELL, PCI_PRODUCT_DELL_PERC_2SI, - 7553, 19962, 0, + 7586, 20040, 0, PCI_VENDOR_DELL, PCI_PRODUCT_DELL_PERC_3DI, - 7553, 19967, 0, + 7586, 20045, 0, PCI_VENDOR_DELL, PCI_PRODUCT_DELL_PERC_3SI, - 7553, 19972, 0, + 7586, 20050, 0, PCI_VENDOR_DELL, PCI_PRODUCT_DELL_PERC_3SI_2, - 7553, 19972, 0, + 7586, 20050, 0, PCI_VENDOR_DELL, PCI_PRODUCT_DELL_PERC_3DI_2, - 7553, 19967, 0, + 7586, 20045, 0, PCI_VENDOR_DELL, PCI_PRODUCT_DELL_PERC_3DI_3, - 7553, 19967, 0, + 7586, 20045, 0, PCI_VENDOR_DELL, PCI_PRODUCT_DELL_PERC_4DI, - 7553, 19977, 0, + 7586, 20055, 0, PCI_VENDOR_DELL, PCI_PRODUCT_DELL_PERC_4DI_2, - 7553, 19977, 0, + 7586, 20055, 0, PCI_VENDOR_DELL, PCI_PRODUCT_DELL_DRAC_4, - 19982, 6786, 0, + 20060, 6804, 0, PCI_VENDOR_DELL, PCI_PRODUCT_DELL_DRAC_4_VUART, - 19982, 6786, 19987, 7983, 0, + 20060, 6804, 20065, 8016, 0, PCI_VENDOR_DELL, PCI_PRODUCT_DELL_PERC_4ESI, - 7553, 19995, 0, + 7586, 20073, 0, PCI_VENDOR_DELL, PCI_PRODUCT_DELL_DRAC_4_SMIC, - 19982, 6786, 20001, 0, + 20060, 6804, 20079, 0, PCI_VENDOR_DELL, PCI_PRODUCT_DELL_PERC_5, - 7553, 8138, 0, + 7586, 8171, 0, PCI_VENDOR_DELL, PCI_PRODUCT_DELL_PERC_6, - 7553, 8371, 0, + 7586, 8404, 0, PCI_VENDOR_DELL, PCI_PRODUCT_DELL_PERC_3DI_2_SUB, - 7553, 19967, 0, + 7586, 20045, 0, PCI_VENDOR_DELL, PCI_PRODUCT_DELL_PERC_3SI_2_SUB, - 7553, 19972, 0, + 7586, 20050, 0, PCI_VENDOR_DELL, PCI_PRODUCT_DELL_PERC_3DI_SUB2, - 7553, 19967, 0, + 7586, 20045, 0, PCI_VENDOR_DELL, PCI_PRODUCT_DELL_PERC_3DI_SUB3, - 7553, 19967, 0, + 7586, 20045, 0, PCI_VENDOR_DELL, PCI_PRODUCT_DELL_PERC_3DI_3_SUB, - 7553, 19967, 0, + 7586, 20045, 0, PCI_VENDOR_DELL, PCI_PRODUCT_DELL_PERC_3DI_3_SUB2, - 7553, 19967, 0, + 7586, 20045, 0, PCI_VENDOR_DELL, PCI_PRODUCT_DELL_PERC_3DI_3_SUB3, - 7553, 19967, 0, + 7586, 20045, 0, PCI_VENDOR_DELL, PCI_PRODUCT_DELL_CERC_1_5, - 20006, 8762, 6450, 20011, 0, + 20084, 8800, 6468, 20089, 0, PCI_VENDOR_DELL, PCI_PRODUCT_DELL_PERC_5_1, - 7553, 20019, 0, + 7586, 20097, 0, PCI_VENDOR_DELL, PCI_PRODUCT_DELL_PERC_5_2, - 7553, 20023, 0, + 7586, 20101, 0, PCI_VENDOR_DELTA, PCI_PRODUCT_DELTA_RHINEII, - 7590, 7596, 5819, 5717, 0, + 7623, 7629, 5837, 5735, 0, PCI_VENDOR_DELTA, PCI_PRODUCT_DELTA_8139, - 7599, 5717, 0, + 7632, 5735, 0, PCI_VENDOR_DIAMOND, PCI_PRODUCT_DIAMOND_VIPER, - 20027, 0, + 20105, 0, PCI_VENDOR_DIGI, PCI_PRODUCT_DIGI_ACCELEPORT8R920, - 20037, 20048, 20051, 14826, 6761, 0, + 20115, 20126, 20129, 14922, 6779, 0, PCI_VENDOR_DIGI, PCI_PRODUCT_DIGI_NEO4, - 20055, 19729, 0, + 20133, 19807, 0, PCI_VENDOR_DIGI, PCI_PRODUCT_DIGI_NEO8, - 20055, 14826, 0, + 20133, 14922, 0, PCI_VENDOR_DIGI, PCI_PRODUCT_DIGI_NEO8_PCIE, - 20055, 14826, 5313, 0, + 20133, 14922, 5331, 0, PCI_VENDOR_DLINK, PCI_PRODUCT_DLINK_DL1002, - 20059, 5819, 5717, 0, + 20137, 5837, 5735, 0, PCI_VENDOR_DLINK, PCI_PRODUCT_DLINK_DFE530TXPLUS, - 20067, 5819, 5717, 0, + 20145, 5837, 5735, 0, PCI_VENDOR_DLINK, PCI_PRODUCT_DLINK_DFE690TXD, - 20081, 5819, 5717, 0, + 20159, 5837, 5735, 0, PCI_VENDOR_DLINK, PCI_PRODUCT_DLINK_DWL610, - 20092, 7686, 7694, 0, + 20170, 7719, 7727, 0, PCI_VENDOR_DLINK, PCI_PRODUCT_DLINK_DL4000, - 20100, 5709, 5717, 0, + 20178, 5727, 5735, 0, PCI_VENDOR_DLINK, PCI_PRODUCT_DLINK_DGE550SX, - 20108, 0, + 20186, 0, PCI_VENDOR_DLINK, PCI_PRODUCT_DLINK_DFE520TX, - 20118, 5819, 5717, 0, + 20196, 5837, 5735, 0, PCI_VENDOR_DLINK, PCI_PRODUCT_DLINK_DGE528T, - 20128, 5709, 5717, 0, + 20206, 5727, 5735, 0, PCI_VENDOR_DLINK, PCI_PRODUCT_DLINK_DGE530T_C1, - 20137, 20146, 0, + 20215, 20224, 0, PCI_VENDOR_DLINK, PCI_PRODUCT_DLINK_DGE560T, - 20149, 5709, 5717, 0, + 20227, 5727, 5735, 0, PCI_VENDOR_DLINK, PCI_PRODUCT_DLINK_DGE560T_2, - 20158, 5709, 5717, 0, + 20236, 5727, 5735, 0, PCI_VENDOR_DLINK, PCI_PRODUCT_DLINK_DGE560SX, - 20169, 0, + 20247, 0, PCI_VENDOR_DLINK, PCI_PRODUCT_DLINK_DGE550T_B1, - 20179, 15193, 0, + 20257, 15289, 0, PCI_VENDOR_DLINK, PCI_PRODUCT_DLINK_DGE530T, - 20137, 5709, 5717, 0, + 20215, 5727, 5735, 0, PCI_VENDOR_DPT, PCI_PRODUCT_DPT_MEMCTLR, - 4504, 6455, 0, + 4504, 6473, 0, PCI_VENDOR_DPT, PCI_PRODUCT_DPT_SC_RAID, - 20188, 20209, 0, + 20266, 20287, 0, PCI_VENDOR_DPT, PCI_PRODUCT_DPT_I960_PPB, - 8791, 6563, 0, + 8887, 6581, 0, PCI_VENDOR_DPT, PCI_PRODUCT_DPT_RAID_I2O, - 20216, 20226, 0, + 20294, 20304, 0, PCI_VENDOR_DPT, PCI_PRODUCT_DPT_RAID_2005S, - 20232, 20237, 20216, 20226, 0, + 20310, 20315, 20294, 20304, 0, PCI_VENDOR_DOLPHIN, PCI_PRODUCT_DOLPHIN_PCISCI32, - 20245, 6563, 20253, 20262, 20265, 0, + 20323, 6581, 20331, 20340, 20343, 0, PCI_VENDOR_DOLPHIN, PCI_PRODUCT_DOLPHIN_PCISCI64, - 20245, 6563, 20270, 20262, 20265, 0, + 20323, 6581, 20348, 20340, 20343, 0, PCI_VENDOR_DOLPHIN, PCI_PRODUCT_DOLPHIN_PCISCI66, - 20245, 6563, 20270, 20279, 20265, 0, + 20323, 6581, 20348, 20357, 20343, 0, PCI_VENDOR_DOMEX, PCI_PRODUCT_DOMEX_PCISCSI, - 20282, 0, + 20360, 0, PCI_VENDOR_DYNALINK, PCI_PRODUCT_DYNALINK_IS64PH, - 20292, 9891, 5909, 0, + 20370, 9987, 5927, 0, PCI_VENDOR_EDIMAX, PCI_PRODUCT_EDIMAX_RT2860_1, - 20299, 0, + 20377, 0, PCI_VENDOR_EDIMAX, PCI_PRODUCT_EDIMAX_RT3591_1, - 20306, 0, + 20384, 0, PCI_VENDOR_EDIMAX, PCI_PRODUCT_EDIMAX_RT3591_2, - 20306, 0, + 20384, 0, PCI_VENDOR_EDIMAX, PCI_PRODUCT_EDIMAX_RT2860_4, - 20299, 0, + 20377, 0, PCI_VENDOR_EDIMAX, PCI_PRODUCT_EDIMAX_RT2860_2, - 20299, 0, + 20377, 0, PCI_VENDOR_EDIMAX, PCI_PRODUCT_EDIMAX_RT2860_5, - 20299, 0, + 20377, 0, PCI_VENDOR_EDIMAX, PCI_PRODUCT_EDIMAX_RT2860_6, - 20299, 0, + 20377, 0, PCI_VENDOR_EDIMAX, PCI_PRODUCT_EDIMAX_RT2860_3, - 20299, 0, + 20377, 0, PCI_VENDOR_EDIMAX, PCI_PRODUCT_EDIMAX_RT2860_7, - 20299, 0, + 20377, 0, PCI_VENDOR_ELSA, PCI_PRODUCT_ELSA_QS1PCI, - 20313, 20323, 9891, 15031, 0, + 20391, 20401, 9987, 15127, 0, PCI_VENDOR_ELSA, PCI_PRODUCT_ELSA_GLORIAXL, - 20328, 5807, 20335, 0, + 20406, 5825, 20413, 0, PCI_VENDOR_EMULEX, PCI_PRODUCT_EMULEX_LP6000, - 20340, 20347, 5909, 0, + 20418, 20425, 5927, 0, PCI_VENDOR_EMULEX, PCI_PRODUCT_EMULEX_LP952, - 20360, 20347, 5909, 0, + 20438, 20425, 5927, 0, PCI_VENDOR_EMULEX, PCI_PRODUCT_EMULEX_LP982, - 20366, 20347, 5909, 0, + 20444, 20425, 5927, 0, PCI_VENDOR_EMULEX, PCI_PRODUCT_EMULEX_LP101, - 20372, 20347, 5909, 0, + 20450, 20425, 5927, 0, PCI_VENDOR_EMULEX, PCI_PRODUCT_EMULEX_LP7000, - 20378, 20347, 5909, 0, + 20456, 20425, 5927, 0, PCI_VENDOR_EMULEX, PCI_PRODUCT_EMULEX_LP8000, - 20385, 20347, 5909, 0, + 20463, 20425, 5927, 0, PCI_VENDOR_EMULEX, PCI_PRODUCT_EMULEX_LP9000, - 20392, 20347, 5909, 0, + 20470, 20425, 5927, 0, PCI_VENDOR_EMULEX, PCI_PRODUCT_EMULEX_LP9802, - 20399, 20347, 5909, 0, + 20477, 20425, 5927, 0, PCI_VENDOR_EMULEX, PCI_PRODUCT_EMULEX_LP10000, - 20406, 20347, 5909, 0, + 20484, 20425, 5927, 0, PCI_VENDOR_ENE, PCI_PRODUCT_ENE_MCR510, - 20414, 615, 4504, 15031, 20421, 6455, 0, + 20492, 615, 4504, 15127, 20499, 6473, 0, PCI_VENDOR_ENE, PCI_PRODUCT_ENE_CB712, - 20428, 615, 9017, 15031, 20421, 6455, 0, + 20506, 615, 9113, 15127, 20499, 6473, 0, PCI_VENDOR_ENE, PCI_PRODUCT_ENE_CB1211, - 20442, 20449, 6455, 0, + 20520, 20527, 6473, 0, PCI_VENDOR_ENE, PCI_PRODUCT_ENE_CB1225, - 20457, 20449, 6455, 0, + 20535, 20527, 6473, 0, PCI_VENDOR_ENE, PCI_PRODUCT_ENE_CB1410, - 20464, 20449, 6455, 0, + 20542, 20527, 6473, 0, PCI_VENDOR_ENE, PCI_PRODUCT_ENE_CB710, - 20471, 20449, 6455, 0, + 20549, 20527, 6473, 0, PCI_VENDOR_ENE, PCI_PRODUCT_ENE_CB1420, - 20477, 20449, 6455, 0, + 20555, 20527, 6473, 0, PCI_VENDOR_ENE, PCI_PRODUCT_ENE_CB720, - 20484, 20449, 6455, 0, + 20562, 20527, 6473, 0, PCI_VENDOR_ENSONIQ, PCI_PRODUCT_ENSONIQ_AUDIOPCI97, - 20490, 20499, 0, + 20568, 20577, 0, PCI_VENDOR_ENSONIQ, PCI_PRODUCT_ENSONIQ_AUDIOPCI, - 20490, 0, + 20568, 0, PCI_VENDOR_ENSONIQ, PCI_PRODUCT_ENSONIQ_CT5880, - 20502, 0, + 20580, 0, PCI_VENDOR_EQUINOX, PCI_PRODUCT_EQUINOX_SST64P, - 20509, 5909, 0, + 20587, 5927, 0, PCI_VENDOR_EQUINOX, PCI_PRODUCT_EQUINOX_SST128P, - 20517, 5909, 0, + 20595, 5927, 0, PCI_VENDOR_EQUINOX, PCI_PRODUCT_EQUINOX_SST16P_1, - 20526, 5909, 0, + 20604, 5927, 0, PCI_VENDOR_EQUINOX, PCI_PRODUCT_EQUINOX_SST16P_2, - 20526, 5909, 0, + 20604, 5927, 0, PCI_VENDOR_EQUINOX, PCI_PRODUCT_EQUINOX_SST16P_3, - 20526, 5909, 0, + 20604, 5927, 0, PCI_VENDOR_EQUINOX, PCI_PRODUCT_EQUINOX_SST4P, - 20534, 5909, 0, + 20612, 5927, 0, PCI_VENDOR_EQUINOX, PCI_PRODUCT_EQUINOX_SST8P, - 20541, 5909, 0, + 20619, 5927, 0, PCI_VENDOR_ESSENTIAL, PCI_PRODUCT_ESSENTIAL_RR_HIPPI, - 20548, 20559, 3018, 0, + 20626, 20637, 3018, 0, PCI_VENDOR_ESSENTIAL, PCI_PRODUCT_ESSENTIAL_RR_GIGE, - 20548, 20565, 3018, 0, + 20626, 20643, 3018, 0, PCI_VENDOR_ESSTECH, PCI_PRODUCT_ESSTECH_MAESTRO1, - 20571, 8136, 615, 7054, 7847, 0, + 20649, 8169, 615, 7072, 7880, 0, PCI_VENDOR_ESSTECH, PCI_PRODUCT_ESSTECH_MAESTRO2, - 20571, 6411, 615, 7054, 7847, 0, + 20649, 6429, 615, 7072, 7880, 0, PCI_VENDOR_ESSTECH, PCI_PRODUCT_ESSTECH_SOLO1, - 20579, 615, 20586, 0, + 20657, 615, 20664, 0, PCI_VENDOR_ESSTECH, PCI_PRODUCT_ESSTECH_MAESTRO2E, - 20571, 20597, 615, 7054, 7847, 0, + 20649, 20675, 615, 7072, 7880, 0, PCI_VENDOR_ESSTECH, PCI_PRODUCT_ESSTECH_ALLEGRO1, - 20600, 615, 7054, 7847, 0, + 20678, 615, 7072, 7880, 0, PCI_VENDOR_ESSTECH, PCI_PRODUCT_ESSTECH_MAESTRO3, - 20571, 6422, 615, 7054, 7847, 0, + 20649, 6440, 615, 7072, 7880, 0, PCI_VENDOR_ESSTECH, PCI_PRODUCT_ESSTECH_MAESTRO3MODEM, - 20571, 6422, 5764, 0, + 20649, 6440, 5782, 0, PCI_VENDOR_ESSTECH, PCI_PRODUCT_ESSTECH_MAESTRO3_2, - 20571, 6422, 615, 7054, 7847, 0, + 20649, 6440, 615, 7072, 7880, 0, PCI_VENDOR_ESSTECH2, PCI_PRODUCT_ESSTECH2_MAESTRO1, - 20571, 8136, 615, 7054, 7847, 0, + 20649, 8169, 615, 7072, 7880, 0, + PCI_VENDOR_ETRON, PCI_PRODUCT_ETRON_EJ168, + 20688, 6963, 8298, 8266, 0, + PCI_VENDOR_ETRON, PCI_PRODUCT_ETRON_EJ188, + 20694, 6963, 8298, 8266, 0, PCI_VENDOR_EUMITCOM, PCI_PRODUCT_EUMITCOM_WL11000P, - 20610, 615, 20619, 17033, 0, + 20706, 615, 20715, 17129, 0, PCI_VENDOR_O2MICRO, PCI_PRODUCT_O2MICRO_00F7, - 692, 8722, 20632, 20637, 6953, 6455, 0, + 692, 8755, 20728, 20733, 6971, 6473, 0, PCI_VENDOR_O2MICRO, PCI_PRODUCT_O2MICRO_OZ6729, - 20642, 20649, 6563, 0, + 20738, 20745, 6581, 0, PCI_VENDOR_O2MICRO, PCI_PRODUCT_O2MICRO_OZ6730, - 20660, 20649, 6563, 0, + 20756, 20745, 6581, 0, PCI_VENDOR_O2MICRO, PCI_PRODUCT_O2MICRO_OZ6832, - 20667, 18587, 6563, 0, + 20763, 18665, 6581, 0, PCI_VENDOR_O2MICRO, PCI_PRODUCT_O2MICRO_OZ6836, - 20681, 18587, 6563, 0, + 20777, 18665, 6581, 0, PCI_VENDOR_O2MICRO, PCI_PRODUCT_O2MICRO_OZ6872, - 20695, 18587, 6563, 0, + 20791, 18665, 6581, 0, PCI_VENDOR_O2MICRO, PCI_PRODUCT_O2MICRO_OZ6922, - 20709, 18587, 6563, 0, + 20805, 18665, 6581, 0, PCI_VENDOR_O2MICRO, PCI_PRODUCT_O2MICRO_OZ6933, - 20716, 18587, 6563, 0, + 20812, 18665, 6581, 0, PCI_VENDOR_O2MICRO, PCI_PRODUCT_O2MICRO_OZ6972, - 20723, 18587, 6563, 0, + 20819, 18665, 6581, 0, PCI_VENDOR_O2MICRO, PCI_PRODUCT_O2MICRO_7120, - 20737, 692, 20744, 6455, 0, + 20833, 692, 20840, 6473, 0, PCI_VENDOR_O2MICRO, PCI_PRODUCT_O2MICRO_7130, - 20751, 692, 20758, 6455, 0, + 20847, 692, 20854, 6473, 0, PCI_VENDOR_O2MICRO, PCI_PRODUCT_O2MICRO_7223, - 20767, 18587, 6563, 0, + 20863, 18665, 6581, 0, PCI_VENDOR_ES, PCI_PRODUCT_ES_FREEDOM, - 20775, 20783, 3018, 0, + 20871, 20879, 3018, 0, PCI_VENDOR_EXAR, PCI_PRODUCT_EXAR_XR17D152, - 15263, 20792, 615, 7983, 0, + 15359, 20888, 615, 8016, 0, PCI_VENDOR_EXAR, PCI_PRODUCT_EXAR_XR17D154, - 15276, 20792, 615, 7983, 0, + 15372, 20888, 615, 8016, 0, PCI_VENDOR_EXAR, PCI_PRODUCT_EXAR_XR17D158, - 15289, 20792, 615, 7983, 0, + 15385, 20888, 615, 8016, 0, PCI_VENDOR_EXAR, PCI_PRODUCT_EXAR_XR17V354, - 15276, 20792, 8204, 7983, 0, + 15372, 20888, 8237, 8016, 0, + PCI_VENDOR_EXAR, PCI_PRODUCT_EXAR_XR17V358, + 15385, 20888, 8237, 8016, 0, PCI_VENDOR_FORE, PCI_PRODUCT_FORE_PCA200, - 7125, 20802, 0, + 7143, 20898, 0, PCI_VENDOR_FORE, PCI_PRODUCT_FORE_PCA200E, - 7125, 20810, 0, + 7143, 20906, 0, PCI_VENDOR_FORTEMEDIA, PCI_PRODUCT_FORTEMEDIA_FM801, - 20819, 3384, 0, + 20915, 3384, 0, PCI_VENDOR_FORTEMEDIA, PCI_PRODUCT_FORTEMEDIA_PCIJOY, - 615, 19499, 19508, 0, + 615, 19577, 19586, 0, PCI_VENDOR_FRESCO, PCI_PRODUCT_FRESCO_FL1000, - 20823, 20830, 6953, 6455, 0, + 20919, 20926, 6971, 6473, 0, PCI_VENDOR_FRESCO, PCI_PRODUCT_FRESCO_FL1009, - 20835, 20830, 6953, 6455, 0, + 20931, 20926, 6971, 6473, 0, PCI_VENDOR_FUTUREDOMAIN, PCI_PRODUCT_FUTUREDOMAIN_TMC_18C30, - 20842, 20852, 0, + 20938, 20948, 0, PCI_VENDOR_FUJITSU4, PCI_PRODUCT_FUJITSU4_PW008GE5, - 20860, 0, + 20956, 0, PCI_VENDOR_FUJITSU4, PCI_PRODUCT_FUJITSU4_PW008GE4, - 20869, 0, + 20965, 0, PCI_VENDOR_FUJITSU4, PCI_PRODUCT_FUJITSU4_PP250_450_LAN, - 20878, 4540, 0, + 20974, 4540, 0, PCI_VENDOR_FZJZEL, PCI_PRODUCT_FZJZEL_GIGALINK, - 5709, 8075, 2173, 20896, 0, + 5727, 8108, 2173, 20992, 0, PCI_VENDOR_FZJZEL, PCI_PRODUCT_FZJZEL_PLXHOTLINK, - 20904, 3018, 0, + 21000, 3018, 0, PCI_VENDOR_FZJZEL, PCI_PRODUCT_FZJZEL_COUNTTIME, - 20912, 2173, 20920, 0, + 21008, 2173, 21016, 0, PCI_VENDOR_FZJZEL, PCI_PRODUCT_FZJZEL_PLXCAMAC, - 14770, 6455, 0, + 14866, 6473, 0, PCI_VENDOR_FZJZEL, PCI_PRODUCT_FZJZEL_PROFIBUS, - 20926, 3018, 0, + 21022, 3018, 0, PCI_VENDOR_FZJZEL, PCI_PRODUCT_FZJZEL_AMCCHOTLINK, - 20935, 20904, 3018, 0, + 21031, 21000, 3018, 0, PCI_VENDOR_EFFICIENTNETS, PCI_PRODUCT_EFFICIENTNETS_ENI155PF, - 20939, 7125, 20948, 0, + 21035, 7143, 21044, 0, PCI_VENDOR_EFFICIENTNETS, PCI_PRODUCT_EFFICIENTNETS_ENI155PA, - 20939, 7125, 20955, 0, + 21035, 7143, 21051, 0, PCI_VENDOR_EFFICIENTNETS, PCI_PRODUCT_EFFICIENTNETS_ENI25P, - 20962, 20974, 0, + 21058, 21070, 0, PCI_VENDOR_EFFICIENTNETS, PCI_PRODUCT_EFFICIENTNETS_SS3000, - 20962, 13829, 0, + 21058, 13939, 0, PCI_VENDOR_FREESCALE, PCI_PRODUCT_FREESCALE_MPC8548E, - 20982, 0, + 21078, 0, PCI_VENDOR_FREESCALE, PCI_PRODUCT_FREESCALE_MPC8548, - 20991, 0, + 21087, 0, PCI_VENDOR_FREESCALE, PCI_PRODUCT_FREESCALE_MPC8543E, - 20999, 0, + 21095, 0, PCI_VENDOR_FREESCALE, PCI_PRODUCT_FREESCALE_MPC8543, - 21008, 0, + 21104, 0, PCI_VENDOR_FREESCALE, PCI_PRODUCT_FREESCALE_MPC8547E, - 21016, 0, + 21112, 0, PCI_VENDOR_FREESCALE, PCI_PRODUCT_FREESCALE_MPC8545E, - 21025, 0, + 21121, 0, PCI_VENDOR_FREESCALE, PCI_PRODUCT_FREESCALE_MPC8545, - 21034, 0, + 21130, 0, PCI_VENDOR_FREESCALE, PCI_PRODUCT_FREESCALE_MPC8544E, - 21042, 0, + 21138, 0, PCI_VENDOR_FREESCALE, PCI_PRODUCT_FREESCALE_MPC8544, - 21051, 0, + 21147, 0, PCI_VENDOR_FREESCALE, PCI_PRODUCT_FREESCALE_MPC8572E, - 21059, 0, + 21155, 0, PCI_VENDOR_FREESCALE, PCI_PRODUCT_FREESCALE_MPC8572, - 21068, 0, + 21164, 0, PCI_VENDOR_FREESCALE, PCI_PRODUCT_FREESCALE_MPC8536E, - 21076, 0, + 21172, 0, PCI_VENDOR_FREESCALE, PCI_PRODUCT_FREESCALE_MPC8536, - 21085, 0, + 21181, 0, PCI_VENDOR_FREESCALE, PCI_PRODUCT_FREESCALE_P2020E, - 21093, 0, + 21189, 0, PCI_VENDOR_FREESCALE, PCI_PRODUCT_FREESCALE_P2020, - 21100, 0, + 21196, 0, PCI_VENDOR_FREESCALE, PCI_PRODUCT_FREESCALE_P2010E, - 21106, 0, + 21202, 0, PCI_VENDOR_FREESCALE, PCI_PRODUCT_FREESCALE_P2010, - 21113, 0, + 21209, 0, PCI_VENDOR_FREESCALE, PCI_PRODUCT_FREESCALE_MPC8349E, - 21119, 0, + 21215, 0, PCI_VENDOR_FREESCALE, PCI_PRODUCT_FREESCALE_MPC8349, - 21128, 0, + 21224, 0, PCI_VENDOR_FREESCALE, PCI_PRODUCT_FREESCALE_MPC8347E_TBGA, - 21136, 21145, 0, + 21232, 21241, 0, PCI_VENDOR_FREESCALE, PCI_PRODUCT_FREESCALE_MPC8347_TBGA, - 21150, 21145, 0, + 21246, 21241, 0, PCI_VENDOR_FREESCALE, PCI_PRODUCT_FREESCALE_MPC8347E_PBGA, - 21136, 21158, 0, + 21232, 21254, 0, PCI_VENDOR_FREESCALE, PCI_PRODUCT_FREESCALE_MPC8347_PBGA, - 21150, 21158, 0, + 21246, 21254, 0, PCI_VENDOR_FREESCALE, PCI_PRODUCT_FREESCALE_MPC8343E, - 21163, 0, + 21259, 0, PCI_VENDOR_FREESCALE, PCI_PRODUCT_FREESCALE_MPC8343, - 21172, 0, + 21268, 0, PCI_VENDOR_FREESCALE, PCI_PRODUCT_FREESCALE_P1020E, - 21180, 0, + 21276, 0, PCI_VENDOR_FREESCALE, PCI_PRODUCT_FREESCALE_P1020, - 21187, 0, + 21283, 0, PCI_VENDOR_FREESCALE, PCI_PRODUCT_FREESCALE_P1021E, - 21180, 0, + 21276, 0, PCI_VENDOR_FREESCALE, PCI_PRODUCT_FREESCALE_P1021, - 21193, 0, + 21289, 0, PCI_VENDOR_FREESCALE, PCI_PRODUCT_FREESCALE_P1024E, - 21199, 0, + 21295, 0, PCI_VENDOR_FREESCALE, PCI_PRODUCT_FREESCALE_P1024, - 21206, 0, + 21302, 0, PCI_VENDOR_FREESCALE, PCI_PRODUCT_FREESCALE_P1025E, - 21212, 0, + 21308, 0, PCI_VENDOR_FREESCALE, PCI_PRODUCT_FREESCALE_P1025, - 21219, 0, + 21315, 0, PCI_VENDOR_FREESCALE, PCI_PRODUCT_FREESCALE_P1011E, - 21225, 0, + 21321, 0, PCI_VENDOR_FREESCALE, PCI_PRODUCT_FREESCALE_P1011, - 21232, 0, + 21328, 0, PCI_VENDOR_FREESCALE, PCI_PRODUCT_FREESCALE_P1022E, - 21238, 0, + 21334, 0, PCI_VENDOR_FREESCALE, PCI_PRODUCT_FREESCALE_P1022, - 21245, 0, + 21341, 0, PCI_VENDOR_FREESCALE, PCI_PRODUCT_FREESCALE_P1013E, - 21251, 0, + 21347, 0, PCI_VENDOR_FREESCALE, PCI_PRODUCT_FREESCALE_P1013, - 21258, 0, + 21354, 0, PCI_VENDOR_FREESCALE, PCI_PRODUCT_FREESCALE_P4080E, - 21264, 0, + 21360, 0, PCI_VENDOR_FREESCALE, PCI_PRODUCT_FREESCALE_P4080, - 21271, 0, + 21367, 0, PCI_VENDOR_FREESCALE, PCI_PRODUCT_FREESCALE_P4040E, - 21277, 0, + 21373, 0, PCI_VENDOR_FREESCALE, PCI_PRODUCT_FREESCALE_P4040, - 21284, 0, + 21380, 0, PCI_VENDOR_FREESCALE, PCI_PRODUCT_FREESCALE_P2040E, - 21290, 0, + 21386, 0, PCI_VENDOR_FREESCALE, PCI_PRODUCT_FREESCALE_P2040, - 21297, 0, + 21393, 0, PCI_VENDOR_FREESCALE, PCI_PRODUCT_FREESCALE_P3041E, - 21303, 0, + 21399, 0, PCI_VENDOR_FREESCALE, PCI_PRODUCT_FREESCALE_P3041, - 21310, 0, + 21406, 0, PCI_VENDOR_FREESCALE, PCI_PRODUCT_FREESCALE_P5020E, - 21316, 0, + 21412, 0, PCI_VENDOR_FREESCALE, PCI_PRODUCT_FREESCALE_P5020, - 21323, 0, + 21419, 0, PCI_VENDOR_FREESCALE, PCI_PRODUCT_FREESCALE_P5010E, - 21329, 0, + 21425, 0, PCI_VENDOR_FREESCALE, PCI_PRODUCT_FREESCALE_P5010, - 21336, 0, + 21432, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_GT64010A, - 21342, 6, 6455, 0, + 21438, 6, 6473, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_88AP510, - 21352, 0, + 21448, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_88F1181, - 21360, 0, + 21456, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_88F1281, - 21368, 17126, 21376, 0, + 21464, 17222, 21472, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_88W8300_1, - 21383, 21392, 0, + 21479, 21488, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_88W8310, - 21383, 21400, 0, + 21479, 21496, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_88W8335_1, - 21383, 21408, 0, + 21479, 21504, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_88W8335_2, - 21383, 21408, 0, + 21479, 21504, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_88SB2211, - 21416, 21425, 9831, 6563, 0, + 21512, 21521, 9927, 6581, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_88W8300_2, - 21383, 21392, 0, + 21479, 21488, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_GT64115, - 21428, 6, 6455, 0, + 21524, 6, 6473, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_GT64011, - 21437, 6, 6455, 0, + 21533, 6, 6473, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_SKNET, - 21446, 5709, 5717, 0, + 21542, 5727, 5735, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_YUKONII_8021CU, - 21453, 21462, 0, + 21549, 21558, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_YUKONII_8022CU, - 21453, 21472, 0, + 21549, 21568, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_YUKONII_8061CU, - 21453, 21482, 0, + 21549, 21578, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_YUKONII_8062CU, - 21453, 21492, 0, + 21549, 21588, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_YUKONII_8021X, - 21453, 21502, 0, + 21549, 21598, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_YUKONII_8022X, - 21453, 21511, 0, + 21549, 21607, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_YUKONII_8061X, - 21453, 21520, 0, + 21549, 21616, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_YUKONII_8062X, - 21453, 21529, 0, + 21549, 21625, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_YUKON_8035, - 21538, 21544, 0, + 21634, 21640, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_YUKON_8036, - 21538, 21552, 0, + 21634, 21648, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_YUKON_8038, - 21538, 21560, 0, + 21634, 21656, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_YUKON_8039, - 21538, 21568, 0, + 21634, 21664, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_YUKON_8040, - 21538, 21576, 0, + 21634, 21672, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_YUKON_8040T, - 21538, 21584, 0, + 21634, 21680, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_YUKON_C033, - 21538, 21593, 0, + 21634, 21689, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_YUKON_8042, - 21538, 21601, 0, + 21634, 21697, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_YUKON_8048, - 21538, 21609, 0, + 21634, 21705, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_YUKON_8052, - 21538, 21617, 0, + 21634, 21713, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_YUKON_8050, - 21538, 21625, 0, + 21634, 21721, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_YUKON_8053, - 21538, 21633, 0, + 21634, 21729, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_YUKON_8055, - 21538, 21641, 0, + 21634, 21737, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_YUKON_8056, - 21538, 21649, 0, + 21634, 21745, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_YUKON_8070, - 21538, 21657, 0, + 21634, 21753, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_YUKON_C036, - 21538, 21665, 0, + 21634, 21761, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_YUKON_C032, - 21538, 21673, 0, + 21634, 21769, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_YUKON_C034, - 21538, 21681, 0, + 21634, 21777, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_YUKON_C042, - 21538, 21689, 0, + 21634, 21785, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_YUKON_8058, - 21538, 21697, 0, + 21634, 21793, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_YUKON_8071, - 21538, 21705, 0, + 21634, 21801, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_YUKON_8072, - 21538, 21713, 0, + 21634, 21809, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_YUKON_8055_2, - 21538, 21721, 0, + 21634, 21817, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_YUKON_8075, - 21538, 21731, 0, + 21634, 21827, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_YUKON_8057, - 21538, 21739, 0, + 21634, 21835, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_YUKON_8059, - 21538, 21747, 0, + 21634, 21843, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_YUKON_8079, - 21538, 21755, 0, + 21634, 21851, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_GT64120, - 21763, 6, 6455, 0, + 21859, 6, 6473, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_BELKIN, - 5086, 5709, 5717, 0, + 5086, 5727, 5735, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_88SX5040, - 21772, 8762, 0, + 21868, 8800, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_88SX5041, - 21781, 8762, 0, + 21877, 8800, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_88SX5080, - 21790, 8762, 0, + 21886, 8800, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_88SX5081, - 21799, 8762, 0, + 21895, 8800, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_88F5082, - 21808, 17126, 21816, 0, + 21904, 17222, 21912, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_88F5180N, - 21823, 17126, 21816, 0, + 21919, 17222, 21912, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_88F5181, - 21832, 17126, 21816, 0, + 21928, 17222, 21912, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_88F5182, - 21840, 17126, 21816, 0, + 21936, 17222, 21912, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_88F5281, - 21848, 17126, 21376, 0, + 21944, 17222, 21472, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_88SX6040, - 21856, 8762, 7596, 0, + 21952, 8800, 7629, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_88SX6041, - 21865, 8762, 7596, 0, + 21961, 8800, 7629, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_88SX6042, - 21874, 8762, 21883, 0, + 21970, 8800, 21979, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_88SX6080, - 21887, 8762, 7596, 0, + 21983, 8800, 7629, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_88SX6081, - 21896, 8762, 7596, 0, + 21992, 8800, 7629, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_88F6082, - 21905, 17126, 21816, 0, + 22001, 17222, 21912, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_88SE6101, - 21913, 6575, 8153, 21922, 6455, 0, + 22009, 6593, 8186, 22018, 6473, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_88SE6121, - 21930, 8762, 7596, 6455, 0, + 22026, 8800, 7629, 6473, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_88SE614X, - 21939, 8762, 7596, 21948, 6455, 0, + 22035, 8800, 7629, 22044, 6473, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_88SE6145, - 21954, 8762, 7596, 21948, 6455, 0, + 22050, 8800, 7629, 22044, 6473, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_88F6180, - 21963, 17126, 21971, 0, + 22059, 17222, 22067, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_88F6183, - 21980, 17126, 21816, 0, + 22076, 17222, 21912, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_88F6192, - 21988, 17126, 21971, 0, + 22084, 17222, 22067, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_88F6281, - 21996, 17126, 21971, 0, + 22092, 17222, 22067, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_88F6282, - 22004, 17126, 21971, 0, + 22100, 17222, 22067, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_GT64130, - 22012, 6, 6455, 0, + 22108, 6, 6473, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_GT64260, - 22021, 6, 6455, 0, + 22117, 6, 6473, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_MV64360, - 22030, 6, 6455, 0, + 22126, 6, 6473, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_MV64460, - 22038, 6, 6455, 0, + 22134, 6, 6473, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_MV6707, - 22046, 17126, 19150, 12239, 0, + 22142, 17222, 19228, 12349, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_MV6710, - 22053, 17126, 19150, 12239, 0, + 22149, 17222, 19228, 12349, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_MV6W11, - 22060, 17126, 19150, 12239, 0, + 22156, 17222, 19228, 12349, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_88F6810, - 22067, 17126, 19150, 22075, 0, + 22163, 17222, 19228, 22171, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_88F6820, - 22079, 17126, 19150, 22075, 0, + 22175, 17222, 19228, 22171, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_88F6828, - 22087, 17126, 19150, 22075, 0, + 22183, 17222, 19228, 22171, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_88SX7042, - 22095, 8762, 21883, 0, + 22191, 8800, 21979, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_MV78100, - 22104, 17126, 22112, 22122, 0, + 22200, 17222, 22208, 22218, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_MV78130, - 22133, 17126, 19150, 22141, 0, + 22229, 17222, 19228, 22237, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_MV78160, - 22144, 17126, 19150, 22141, 0, + 22240, 17222, 19228, 22237, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_MV78200, - 22152, 17126, 22112, 22122, 0, + 22248, 17222, 22208, 22218, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_MV78230, - 22160, 17126, 19150, 22141, 0, + 22256, 17222, 19228, 22237, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_MV78260, - 22168, 17126, 19150, 22141, 0, + 22264, 17222, 19228, 22237, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_MV78460, - 22176, 17126, 19150, 22141, 0, + 22272, 17222, 19228, 22237, 0, PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_88W8660, - 22184, 17126, 21816, 0, + 22280, 17222, 21912, 0, PCI_VENDOR_MARVELL2, PCI_PRODUCT_MARVELL2_88SE9120, - 22192, 8762, 6455, 0, + 22288, 8800, 6473, 0, PCI_VENDOR_MARVELL2, PCI_PRODUCT_MARVELL2_88SE912X, - 22201, 8762, 7596, 22213, 9770, 21948, 6455, 0, + 22297, 8800, 7629, 22309, 9866, 22044, 6473, 0, PCI_VENDOR_MARVELL2, PCI_PRODUCT_MARVELL2_88SE9125, - 22216, 8762, 9770, 21948, 6455, 0, + 22312, 8800, 9866, 22044, 6473, 0, PCI_VENDOR_MARVELL2, PCI_PRODUCT_MARVELL2_88SE9128, - 22225, 8762, 9770, 21948, 6455, 0, + 22321, 8800, 9866, 22044, 6473, 0, PCI_VENDOR_MARVELL2, PCI_PRODUCT_MARVELL2_88SE9130, - 22234, 8762, 9770, 21948, 6455, 14052, 22243, 0, + 22330, 8800, 9866, 22044, 6473, 14162, 22339, 0, PCI_VENDOR_MARVELL2, PCI_PRODUCT_MARVELL2_88SE9172, - 22252, 8762, 6455, 0, + 22348, 8800, 6473, 0, PCI_VENDOR_MARVELL2, PCI_PRODUCT_MARVELL2_88SE9170, - 22261, 8762, 6455, 0, + 22357, 8800, 6473, 0, PCI_VENDOR_MARVELL2, PCI_PRODUCT_MARVELL2_88SE9172_2, - 22261, 8762, 6455, 0, + 22357, 8800, 6473, 0, PCI_VENDOR_MARVELL2, PCI_PRODUCT_MARVELL2_88SE9182, - 22270, 8762, 6455, 0, + 22366, 8800, 6473, 0, PCI_VENDOR_MARVELL2, PCI_PRODUCT_MARVELL2_88SE9183, - 22279, 8762, 6455, 0, + 22375, 8800, 6473, 0, PCI_VENDOR_MARVELL2, PCI_PRODUCT_MARVELL2_88SE91XX, - 22288, 8762, 6455, 0, + 22384, 8800, 6473, 0, PCI_VENDOR_MARVELL2, PCI_PRODUCT_MARVELL2_88SE912X_2, - 22297, 6626, 6455, 0, + 22393, 6644, 6473, 0, PCI_VENDOR_MARVELL2, PCI_PRODUCT_MARVELL2_88SE9215, - 22306, 8762, 6455, 0, + 22402, 8800, 6473, 0, PCI_VENDOR_MARVELL2, PCI_PRODUCT_MARVELL2_88SE9220, - 22315, 8762, 6455, 0, + 22411, 8800, 6473, 0, PCI_VENDOR_MARVELL2, PCI_PRODUCT_MARVELL2_88SE9230, - 22324, 8762, 6455, 0, + 22420, 8800, 6473, 0, PCI_VENDOR_MARVELL2, PCI_PRODUCT_MARVELL2_88SE9235, - 22333, 8762, 6455, 0, + 22429, 8800, 6473, 0, PCI_VENDOR_MARVELL2, PCI_PRODUCT_MARVELL2_88SE9445, - 22342, 8762, 6455, 0, + 22438, 8800, 6473, 0, PCI_VENDOR_MARVELL2, PCI_PRODUCT_MARVELL2_88SE9480, - 22351, 8762, 6455, 0, + 22447, 8800, 6473, 0, PCI_VENDOR_MARVELL2, PCI_PRODUCT_MARVELL2_88SE9485, - 22360, 8762, 6455, 0, + 22456, 8800, 6473, 0, PCI_VENDOR_MSI, PCI_PRODUCT_MSI_RT3090, - 22369, 22373, 0, + 22465, 22469, 0, PCI_VENDOR_GLOBALSUN, PCI_PRODUCT_GLOBALSUN_GL24110P, - 22380, 615, 20632, 7686, 0, + 22476, 615, 20728, 7719, 0, PCI_VENDOR_GLOBALSUN, PCI_PRODUCT_GLOBALSUN_GL24110P02, - 22380, 615, 20632, 7686, 0, + 22476, 615, 20728, 7719, 0, PCI_VENDOR_GUILLEMOT, PCI_PRODUCT_GUILLEMOT_MAXIRADIO, - 22389, 0, + 22485, 0, PCI_VENDOR_HAWKING, PCI_PRODUCT_HAWKING_PN672TX, - 22399, 5819, 5717, 0, + 22495, 5837, 5735, 0, PCI_VENDOR_HEURICON, PCI_PRODUCT_HEURICON_PMPPC, - 22407, 0, + 22503, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_VISUALIZE_EG, - 22414, 22421, 22431, 0, + 22510, 22517, 22527, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_VISUALIZE_FX6, - 22421, 22434, 0, + 22517, 22530, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_VISUALIZE_FX4, - 22421, 22438, 0, + 22517, 22534, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_VISUALIZE_FX2, - 22421, 22442, 0, + 22517, 22538, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_TACHYON_TL, - 7775, 22446, 7787, 6455, 0, + 7808, 22542, 7820, 6473, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_TACHYON_XL2, - 7775, 22449, 7787, 6455, 0, + 7808, 22545, 7820, 6473, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_TACHYON_TS, - 7775, 22453, 7787, 6455, 0, + 7808, 22549, 7820, 6473, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_J2585A, - 22456, 0, + 22552, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_J2585B, - 22463, 0, + 22559, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_DIVA, - 22470, 14833, 22475, 0, + 22566, 14929, 22571, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_ELROY, - 22485, 22491, 0, + 22581, 22587, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_VISUALIZE_FXE, - 22421, 22501, 0, + 22517, 22597, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_TOPTOOLS, - 22505, 3323, 8153, 0, + 22601, 3323, 8186, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_NETRAID_4M, - 22514, 0, + 22610, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_SMARTIRQ, - 22525, 22535, 0, + 22621, 22631, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_82557B, - 22544, 5819, 22551, 0, + 22640, 5837, 22647, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_PLUTO, - 22555, 22561, 0, + 22651, 22657, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_ZX1_IOC, - 22565, 22569, 0, + 22661, 22665, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_MERCURY, - 2845, 22491, 0, + 2845, 22587, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_QUICKSILVER, - 22573, 22491, 0, + 22669, 22587, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_P430I, - 18970, 18976, 22585, 0, + 19048, 19054, 22681, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_P830I, - 18970, 18976, 22591, 0, + 19048, 19054, 22687, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_P430, - 18970, 18976, 22597, 0, + 19048, 19054, 22693, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_P431, - 18970, 18976, 22602, 0, + 19048, 19054, 22698, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_P830, - 18970, 18976, 22607, 0, + 19048, 19054, 22703, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_P731M, - 18970, 18976, 22612, 0, + 19048, 19054, 22708, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_P230I, - 18970, 18976, 22618, 0, + 19048, 19054, 22714, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_P530, - 18970, 18976, 22624, 0, + 19048, 19054, 22720, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_P531, - 18970, 18976, 22629, 0, + 19048, 19054, 22725, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_P244BR, - 18970, 18976, 22634, 0, + 19048, 19054, 22730, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_P741M, - 18970, 18976, 22641, 0, + 19048, 19054, 22737, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_H240AR, - 18970, 18976, 22647, 0, + 19048, 19054, 22743, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_P440AR, - 18970, 18976, 22654, 0, + 19048, 19054, 22750, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_P840AR, - 18970, 18976, 22661, 0, + 19048, 19054, 22757, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_P440, - 18970, 18976, 22668, 0, + 19048, 19054, 22764, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_P441, - 18970, 18976, 22673, 0, + 19048, 19054, 22769, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_P841, - 18970, 18976, 22678, 0, + 19048, 19054, 22774, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_H244BR, - 18970, 18976, 22683, 0, + 19048, 19054, 22779, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_H240, - 18970, 18976, 22690, 0, + 19048, 19054, 22786, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_H241, - 18970, 18976, 22695, 0, + 19048, 19054, 22791, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_P246BR, - 18970, 18976, 22700, 0, + 19048, 19054, 22796, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_P840, - 18970, 18976, 22707, 0, + 19048, 19054, 22803, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_P542D, - 18970, 18976, 22712, 0, + 19048, 19054, 22808, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_P240NR, - 18970, 18976, 22718, 0, + 19048, 19054, 22814, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_H240NR, - 18970, 18976, 22725, 0, + 19048, 19054, 22821, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAV100, - 18970, 18976, 22732, 0, + 19048, 19054, 22828, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAE200I_1, - 18970, 18976, 22737, 0, + 19048, 19054, 22833, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAE200, - 18970, 18976, 22743, 0, + 19048, 19054, 22839, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAE200I_2, - 18970, 18976, 22737, 0, + 19048, 19054, 22833, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAE200I_3, - 18970, 18976, 22737, 0, + 19048, 19054, 22833, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAE200I_4, - 18970, 18976, 22737, 0, + 19048, 19054, 22833, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_1, - 18970, 18976, 0, + 19048, 19054, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_2, - 18970, 18976, 0, + 19048, 19054, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAP800, - 18970, 18976, 22748, 0, + 19048, 19054, 22844, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAP600, - 18970, 18976, 22748, 0, + 19048, 19054, 22844, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_3, - 18970, 18976, 0, + 19048, 19054, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_4, - 18970, 18976, 0, + 19048, 19054, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_5, - 18970, 18976, 0, + 19048, 19054, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_6, - 18970, 18976, 0, + 19048, 19054, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAP400, - 18970, 18976, 22753, 0, + 19048, 19054, 22849, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSAP400I, - 18970, 18976, 22758, 0, + 19048, 19054, 22854, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_7, - 18970, 18976, 0, + 19048, 19054, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_8, - 18970, 18976, 0, + 19048, 19054, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_9, - 18970, 18976, 0, + 19048, 19054, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_10, - 18970, 18976, 0, + 19048, 19054, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_11, - 18970, 18976, 0, + 19048, 19054, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_12, - 18970, 18976, 0, + 19048, 19054, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_13, - 18970, 18976, 0, + 19048, 19054, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_P700M, - 18970, 18976, 22764, 0, + 19048, 19054, 22860, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_P212, - 18970, 18976, 22770, 0, + 19048, 19054, 22866, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_P410, - 18970, 18976, 22775, 0, + 19048, 19054, 22871, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_P410I, - 18970, 18976, 22780, 0, + 19048, 19054, 22876, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_P411, - 18970, 18976, 22786, 0, + 19048, 19054, 22882, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_P812, - 18970, 18976, 22791, 0, + 19048, 19054, 22887, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_P712M, - 18970, 18976, 22796, 0, + 19048, 19054, 22892, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_14, - 18970, 18976, 0, + 19048, 19054, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_USB, - 22802, 19987, 6945, 0, + 22898, 20065, 6963, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_IPMI, - 22807, 0, + 22903, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_ILO3_SLAVE, - 22802, 22812, 0, + 22898, 22908, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_ILO3_MGMT, - 22802, 7078, 0, + 22898, 7096, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_P222, - 18970, 18976, 22818, 0, + 19048, 19054, 22914, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_P420, - 18970, 18976, 22823, 0, + 19048, 19054, 22919, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_P421, - 18970, 18976, 22828, 0, + 19048, 19054, 22924, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_P822, - 18970, 18976, 22791, 0, + 19048, 19054, 22887, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_P420I, - 18970, 18976, 22833, 0, + 19048, 19054, 22929, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_P220I, - 18970, 18976, 22839, 0, + 19048, 19054, 22935, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_HPSA_P721I, - 18970, 18976, 22845, 0, + 19048, 19054, 22941, 0, PCI_VENDOR_HP, PCI_PRODUCT_HP_RS780_PPB_GFX, - 22851, 9030, 8791, 6563, 9060, 9065, 0, + 22947, 9126, 8887, 6581, 9156, 9161, 0, PCI_VENDOR_HGST, PCI_PRODUCT_HGST_SN100, - 22857, 22867, 6476, 7957, 7962, 0, + 22953, 22963, 6494, 7990, 7995, 0, PCI_VENDOR_HGST, PCI_PRODUCT_HGST_SN200, - 22857, 22873, 6476, 7957, 7962, 0, + 22953, 22969, 6494, 7990, 7995, 0, PCI_VENDOR_HIFN, PCI_PRODUCT_HIFN_7751, - 22879, 0, + 22975, 0, PCI_VENDOR_HIFN, PCI_PRODUCT_HIFN_6500, - 22884, 0, + 22980, 0, PCI_VENDOR_HIFN, PCI_PRODUCT_HIFN_7811, - 22889, 0, + 22985, 0, PCI_VENDOR_HIFN, PCI_PRODUCT_HIFN_7951, - 22894, 0, + 22990, 0, PCI_VENDOR_HIFN, PCI_PRODUCT_HIFN_78XX, - 22899, 0, + 22995, 0, PCI_VENDOR_HIFN, PCI_PRODUCT_HIFN_8065, - 22914, 0, + 23010, 0, PCI_VENDOR_HIFN, PCI_PRODUCT_HIFN_8165, - 22919, 0, + 23015, 0, PCI_VENDOR_HIFN, PCI_PRODUCT_HIFN_8154, - 22924, 0, + 23020, 0, PCI_VENDOR_HIFN, PCI_PRODUCT_HIFN_7956, - 22929, 0, + 23025, 0, PCI_VENDOR_HIFN, PCI_PRODUCT_HIFN_7955, - 22934, 0, + 23030, 0, PCI_VENDOR_HINT, PCI_PRODUCT_HINT_HB1, - 22944, 8791, 6563, 0, + 23040, 8887, 6581, 0, PCI_VENDOR_HINT, PCI_PRODUCT_HINT_HB4, - 22948, 8791, 6563, 0, + 23044, 8887, 6581, 0, PCI_VENDOR_HITACHI, PCI_PRODUCT_HITACHI_SWC, - 22952, 234, 17242, 22969, 0, + 23048, 234, 17333, 23065, 0, PCI_VENDOR_HITACHI, PCI_PRODUCT_HITACHI_SH7751, - 22975, 615, 6455, 0, + 23071, 615, 6473, 0, PCI_VENDOR_HITACHI, PCI_PRODUCT_HITACHI_SH7751R, - 22982, 615, 6455, 0, + 23078, 615, 6473, 0, PCI_VENDOR_HUAWEI, PCI_PRODUCT_HUAWEI_HI1710, - 22990, 22997, 0, + 23086, 23093, 0, PCI_VENDOR_IBM, PCI_PRODUCT_IBM_MCABRIDGE, - 23001, 6563, 0, + 23097, 6581, 0, PCI_VENDOR_IBM, PCI_PRODUCT_IBM_ALTALITE, - 2535, 6563, 23005, 23007, 23012, 0, + 2535, 6581, 23101, 23103, 23108, 0, PCI_VENDOR_IBM, PCI_PRODUCT_IBM_ALTAMP, - 2535, 6563, 23005, 23007, 23017, 0, + 2535, 6581, 23101, 23103, 23113, 0, PCI_VENDOR_IBM, PCI_PRODUCT_IBM_ISABRIDGE, - 23020, 23025, 23031, 6563, 6156, 23035, 0, + 23116, 23121, 23127, 6581, 6174, 23131, 0, PCI_VENDOR_IBM, PCI_PRODUCT_IBM_POWERWAVE, - 23039, 1716, 5909, 0, + 23135, 1716, 5927, 0, PCI_VENDOR_IBM, PCI_PRODUCT_IBM_IDAHO, - 23049, 615, 6563, 0, + 23145, 615, 6581, 0, PCI_VENDOR_IBM, PCI_PRODUCT_IBM_CPUBRIDGE, - 2535, 6563, 0, + 2535, 6581, 0, PCI_VENDOR_IBM, PCI_PRODUCT_IBM_LANSTREAMER, - 23055, 23060, 0, + 23151, 23156, 0, PCI_VENDOR_IBM, PCI_PRODUCT_IBM_GXT150P, - 23072, 23081, 7847, 0, + 23168, 23177, 7880, 0, PCI_VENDOR_IBM, PCI_PRODUCT_IBM_CARRERA, - 23084, 615, 6563, 0, + 23180, 615, 6581, 0, PCI_VENDOR_IBM, PCI_PRODUCT_IBM_82G2675, - 23092, 23100, 2430, 6455, 0, + 23188, 23196, 2430, 6473, 0, PCI_VENDOR_IBM, PCI_PRODUCT_IBM_MCABRIDGE2, - 23001, 6563, 0, + 23097, 6581, 0, PCI_VENDOR_IBM, PCI_PRODUCT_IBM_82351, - 23107, 8791, 6563, 0, + 23203, 8887, 6581, 0, PCI_VENDOR_IBM, PCI_PRODUCT_IBM_MONNAV, - 23113, 615, 6563, 558, 4504, 6455, 0, + 23209, 615, 6581, 558, 4504, 6473, 0, PCI_VENDOR_IBM, PCI_PRODUCT_IBM_PYTHON, - 23128, 8791, 6563, 0, + 23224, 8887, 6581, 0, PCI_VENDOR_IBM, PCI_PRODUCT_IBM_SERVERAID, - 7437, 23135, 0, + 7455, 23231, 0, PCI_VENDOR_IBM, PCI_PRODUCT_IBM_MIAMI, - 23148, 0, + 23244, 0, PCI_VENDOR_IBM, PCI_PRODUCT_IBM_82660, - 23158, 23164, 7009, 615, 6563, 558, 4504, 6455, 0, + 23254, 23260, 7027, 615, 6581, 558, 4504, 6473, 0, PCI_VENDOR_IBM, PCI_PRODUCT_IBM_GXT250P, - 23172, 1716, 5909, 0, + 23268, 1716, 5927, 0, PCI_VENDOR_IBM, PCI_PRODUCT_IBM_OLYMPIC, - 23181, 6013, 6019, 0, + 23277, 6031, 6037, 0, PCI_VENDOR_IBM, PCI_PRODUCT_IBM_MPIC, - 23186, 0, + 23282, 0, PCI_VENDOR_IBM, PCI_PRODUCT_IBM_TURBOWAYS25, - 23191, 23201, 7125, 0, + 23287, 23297, 7143, 0, PCI_VENDOR_IBM, PCI_PRODUCT_IBM_GXT500P, - 23204, 1716, 5909, 0, + 23300, 1716, 5927, 0, PCI_VENDOR_IBM, PCI_PRODUCT_IBM_I82557B, - 23221, 5819, 5717, 0, + 23317, 5837, 5735, 0, PCI_VENDOR_IBM, PCI_PRODUCT_IBM_GXT800P, - 23229, 1716, 5909, 0, + 23325, 1716, 5927, 0, PCI_VENDOR_IBM, PCI_PRODUCT_IBM_EADSPCI, - 23238, 8791, 6563, 0, + 23334, 8887, 6581, 0, PCI_VENDOR_IBM, PCI_PRODUCT_IBM_GXT3000P, - 23243, 1716, 5909, 0, + 23339, 1716, 5927, 0, PCI_VENDOR_IBM, PCI_PRODUCT_IBM_GXT3000P2, - 23243, 1716, 23253, 0, + 23339, 1716, 23349, 0, PCI_VENDOR_IBM, PCI_PRODUCT_IBM_GXT2000P, - 23264, 1716, 5909, 0, + 23360, 1716, 5927, 0, PCI_VENDOR_IBM, PCI_PRODUCT_IBM_OLYMPIC2, - 23274, 6411, 6013, 6019, 0, + 23370, 6429, 6031, 6037, 0, PCI_VENDOR_IBM, PCI_PRODUCT_IBM_CPC71064, - 23282, 11247, 6563, 558, 4504, 6455, 23289, 0, + 23378, 11362, 6581, 558, 4504, 6473, 23385, 0, PCI_VENDOR_IBM, PCI_PRODUCT_IBM_CPC71032, - 23282, 11247, 6563, 558, 4504, 6455, 23297, 0, + 23378, 11362, 6581, 558, 4504, 6473, 23393, 0, PCI_VENDOR_IBM, PCI_PRODUCT_IBM_TPAUDIO, - 23305, 23314, 7054, 0, + 23401, 23410, 7072, 0, PCI_VENDOR_IBM, PCI_PRODUCT_IBM_405GP, - 23331, 23335, 615, 6563, 0, + 23427, 23431, 615, 6581, 0, PCI_VENDOR_IBM, PCI_PRODUCT_IBM_GXT4000P, - 23341, 1716, 5909, 0, + 23437, 1716, 5927, 0, PCI_VENDOR_IBM, PCI_PRODUCT_IBM_GXT6000P, - 23351, 1716, 5909, 0, + 23447, 1716, 5927, 0, PCI_VENDOR_IBM, PCI_PRODUCT_IBM_GXT300P, - 23361, 1716, 5909, 0, + 23457, 1716, 5927, 0, PCI_VENDOR_IBM, PCI_PRODUCT_IBM_133PCIX, - 23370, 8885, 6563, 0, + 23466, 8981, 6581, 0, PCI_VENDOR_IBM, PCI_PRODUCT_IBM_SERVERAID4, - 7437, 6368, 23374, 0, + 7455, 6386, 23470, 0, PCI_VENDOR_IBM, PCI_PRODUCT_IBM_440GP, - 23331, 23385, 615, 6563, 0, + 23427, 23481, 615, 6581, 0, PCI_VENDOR_IBM, PCI_PRODUCT_IBM_IBMETHER, - 5819, 5717, 0, + 5837, 5735, 0, PCI_VENDOR_IBM, PCI_PRODUCT_IBM_GXT6500P, - 23391, 1716, 5909, 0, + 23487, 1716, 5927, 0, PCI_VENDOR_IBM, PCI_PRODUCT_IBM_GXT4500P, - 23401, 1716, 5909, 0, + 23497, 1716, 5927, 0, PCI_VENDOR_IBM, PCI_PRODUCT_IBM_GXT135P, - 23411, 1716, 5909, 0, + 23507, 1716, 5927, 0, PCI_VENDOR_IBM, PCI_PRODUCT_IBM_4810_BSP, - 23420, 23425, 0, + 23516, 23521, 0, PCI_VENDOR_IBM, PCI_PRODUCT_IBM_4810_SCC, - 23420, 23429, 0, + 23516, 23525, 0, PCI_VENDOR_IBM, PCI_PRODUCT_IBM_SERVERAID8K, - 7437, 23433, 0, + 7455, 23529, 0, PCI_VENDOR_IBM, PCI_PRODUCT_IBM_MPIC2, - 23436, 0, + 23532, 0, PCI_VENDOR_ICENSEMBLE, PCI_PRODUCT_ICENSEMBLE_ICE1712, - 23444, 17297, 7054, 6455, 0, + 23540, 17388, 7072, 6473, 0, PCI_VENDOR_ICENSEMBLE, PCI_PRODUCT_ICENSEMBLE_VT1720, - 23451, 23463, 7054, 6455, 0, + 23547, 23559, 7072, 6473, 0, PCI_VENDOR_ICOMPRESSION, PCI_PRODUCT_ICOMPRESSION_ITVC15, - 23477, 23484, 23490, 0, + 23573, 23580, 23586, 0, PCI_VENDOR_IDT, PCI_PRODUCT_IDT_77201, - 23496, 7125, 23508, 0, + 23592, 7143, 23604, 0, PCI_VENDOR_IDT, PCI_PRODUCT_IDT_RC32334, - 23520, 6, 6455, 0, + 23616, 6, 6473, 0, PCI_VENDOR_IDT, PCI_PRODUCT_IDT_RC32332, - 23528, 6, 6455, 0, + 23624, 6, 6473, 0, PCI_VENDOR_INDCOMPSRC, PCI_PRODUCT_INDCOMPSRC_WDT50x, - 23536, 23547, 20920, 0, + 23632, 23643, 21016, 0, PCI_VENDOR_INITIO, PCI_PRODUCT_INITIO_I920, - 23556, 6670, 0, + 23652, 6688, 0, PCI_VENDOR_INITIO, PCI_PRODUCT_INITIO_I850, - 23565, 6670, 0, + 23661, 6688, 0, PCI_VENDOR_INITIO, PCI_PRODUCT_INITIO_I1060, - 23574, 6670, 0, + 23670, 6688, 0, PCI_VENDOR_INITIO, PCI_PRODUCT_INITIO_1622, - 23584, 8762, 0, + 23680, 8800, 0, PCI_VENDOR_INITIO, PCI_PRODUCT_INITIO_I940, - 23594, 6670, 0, + 23690, 6688, 0, PCI_VENDOR_INITIO, PCI_PRODUCT_INITIO_I935, - 23603, 6670, 0, + 23699, 6688, 0, PCI_VENDOR_INITIO, PCI_PRODUCT_INITIO_I950, - 23612, 6670, 0, + 23708, 6688, 0, PCI_VENDOR_INTEGRAPHICS, PCI_PRODUCT_INTEGRAPHICS_IGA1680, - 23621, 23625, 0, + 23717, 23721, 0, PCI_VENDOR_INTEGRAPHICS, PCI_PRODUCT_INTEGRAPHICS_IGA1682, - 23621, 23630, 0, + 23717, 23726, 0, PCI_VENDOR_INTEGRAPHICS, PCI_PRODUCT_INTEGRAPHICS_CYBERPRO2000, - 23635, 1319, 0, + 23731, 1319, 0, PCI_VENDOR_INTEGRAPHICS, PCI_PRODUCT_INTEGRAPHICS_CYBERPRO2010, - 23635, 23644, 0, + 23731, 23740, 0, PCI_VENDOR_IMS, PCI_PRODUCT_IMS_8849, - 23649, 0, + 23745, 0, PCI_VENDOR_IMS, PCI_PRODUCT_IMS_TT128M, - 23654, 23664, 0, + 23750, 23760, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_IRONLAKE_D_HB, - 23669, 23674, 6953, 6563, 0, + 23765, 23770, 6971, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE_PCIE_0, - 23679, 8204, 8140, 8153, 0, + 23775, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_IRONLAKE_D_IGD, - 23669, 23674, 692, 1716, 2418, 0, + 23765, 23770, 692, 1716, 2418, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE_PCIE_1, - 23679, 8204, 8140, 8153, 0, + 23775, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_IRONLAKE_M_HB, - 23669, 23674, 6953, 6563, 0, + 23765, 23770, 6971, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_IRONLAKE_M_IGD, - 23669, 23674, 692, 1716, 2418, 0, + 23765, 23770, 692, 1716, 2418, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE_HB, - 23679, 6953, 6563, 0, + 23775, 6971, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE_PCIE_2, - 23679, 8204, 8140, 8153, 0, + 23775, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_IRONLAKE_MA_HB, - 23669, 23674, 6953, 6563, 0, + 23765, 23770, 6971, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_IRONLAKE_MC2_HB, - 23669, 23674, 6953, 6563, 0, + 23765, 23770, 6971, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_WIFI_LINK_6005_2X2_1, - 23684, 23693, 23704, 23709, 0, + 23780, 23789, 23800, 23805, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_WIFI_LINK_1000_1, - 23709, 8075, 20323, 0, + 23805, 8108, 20401, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_WIFI_LINK_1000_2, - 23709, 8075, 20323, 0, + 23805, 8108, 20401, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_WIFI_LINK_6005_2X2_2, - 23684, 23693, 23704, 23709, 0, + 23780, 23789, 23800, 23805, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_WIFI_LINK_6050_2X2_1, - 23684, 23693, 13897, 23709, 0, + 23780, 23789, 14007, 23805, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_WIFI_LINK_6050_2X2_2, - 23684, 23693, 13897, 23709, 0, + 23780, 23789, 14007, 23805, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_WIFI_LINK_1030_1, - 23684, 23714, 23725, 0, + 23780, 23810, 23821, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_WIFI_LINK_1030_2, - 23684, 23714, 23725, 0, + 23780, 23810, 23821, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_WIFI_LINK_6230_1, - 23684, 23693, 23730, 0, + 23780, 23789, 23826, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_WIFI_LINK_6230_2, - 23684, 23693, 23730, 0, + 23780, 23789, 23826, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SANDYBRIDGE_HB, - 23735, 6563, 23741, 6953, 6563, 0, + 23831, 6581, 23837, 6971, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SANDYBRIDGE_PCIE, - 23735, 6563, 23741, 8204, 8140, 6788, 0, + 23831, 6581, 23837, 8237, 8173, 6806, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SANDYBRIDGE_IGD, - 23735, 6563, 23741, 23751, 692, 1716, 2418, 0, + 23831, 6581, 23837, 23847, 692, 1716, 2418, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SANDYBRIDGE_M_HB, - 23735, 6563, 23755, 6953, 6563, 0, + 23831, 6581, 23851, 6971, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SANDYBRIDGE_PCIE_1, - 23735, 6563, 23755, 8204, 8140, 6788, 0, + 23831, 6581, 23851, 8237, 8173, 6806, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SANDYBRIDGE_M_IGD, - 23735, 6563, 23755, 23764, 692, 1716, 2418, 0, + 23831, 6581, 23851, 23860, 692, 1716, 2418, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SANDYBRIDGE_S_HB, - 23735, 6563, 23768, 6953, 6563, 0, + 23831, 6581, 23864, 6971, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SANDYBRIDGE_PCIE_2, - 23735, 6563, 23768, 8204, 8140, 6788, 0, + 23831, 6581, 23864, 8237, 8173, 6806, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SANDYBRIDGE_S_IGD, - 23735, 6563, 23768, 23764, 692, 1716, 2418, 0, + 23831, 6581, 23864, 23860, 692, 1716, 2418, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SANDYBRIDGE_IGD_1, - 23735, 6563, 23777, 692, 1716, 2418, 0, + 23831, 6581, 23873, 692, 1716, 2418, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SANDYBRIDGE_M_IGD_1, - 23735, 6563, 23755, 23777, 692, 1716, 2418, 0, + 23831, 6581, 23851, 23873, 692, 1716, 2418, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SANDYBRIDGE_IGD_2, - 23735, 6563, 23741, 23781, 692, 1716, 2418, 0, + 23831, 6581, 23837, 23877, 692, 1716, 2418, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SANDYBRIDGE_M_IGD_2, - 23735, 6563, 23755, 23781, 692, 1716, 2418, 0, + 23831, 6581, 23851, 23877, 692, 1716, 2418, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_IVYBRIDGE_HB, - 23786, 6563, 6953, 6563, 0, + 23882, 6581, 6971, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_IVYBRIDGE_PCIE, - 23786, 6563, 615, 4320, 8140, 8153, 0, + 23882, 6581, 615, 4320, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_IVYBRIDGE_IGD, - 23786, 6563, 692, 1716, 2418, 0, + 23882, 6581, 692, 1716, 2418, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_IVYBRIDGE_M_HB, - 23786, 6563, 6953, 6563, 0, + 23882, 6581, 6971, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_IVYBRIDGE_PCIE_1, - 23786, 6563, 615, 4320, 8140, 8153, 0, + 23882, 6581, 615, 4320, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_IVYBRIDGE_M_IGD, - 23786, 6563, 692, 1716, 2418, 0, + 23882, 6581, 692, 1716, 2418, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_IVYBRIDGE_S_HB, - 23786, 6563, 6953, 6563, 0, + 23882, 6581, 6971, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_IVYBRIDGE_PCIE_2, - 23786, 6563, 615, 4320, 8140, 8153, 0, + 23882, 6581, 615, 4320, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_IVYBRIDGE_S_IGD, - 23786, 6563, 692, 1716, 2418, 0, + 23882, 6581, 692, 1716, 2418, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_IVYBRIDGE_PCIE_3, - 23786, 6563, 615, 4320, 8140, 8153, 0, + 23882, 6581, 615, 4320, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_IVYBRIDGE_IGD_1, - 23786, 6563, 692, 1716, 2418, 0, + 23882, 6581, 692, 1716, 2418, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_IVYBRIDGE_M_IGD_1, - 23786, 6563, 692, 1716, 2418, 0, + 23882, 6581, 692, 1716, 2418, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_IVYBRIDGE_S_IGD_1, - 23786, 6563, 692, 1716, 2418, 0, + 23882, 6581, 692, 1716, 2418, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CMTLK_U_P_LPC, - 23790, 23674, 23796, 23798, 8958, 22213, 23808, 0, + 23886, 23770, 23892, 23894, 9054, 22309, 23904, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CMTLK_U_LPC, - 23790, 23674, 23796, 8958, 22213, 23808, 0, + 23886, 23770, 23892, 9054, 22309, 23904, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CMTLK_P2SB, - 23790, 23674, 23813, 0, + 23886, 23770, 23909, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CMTLK_PMC, - 23790, 23674, 23818, 0, + 23886, 23770, 23914, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CMTLK_SMB, - 23790, 23674, 8962, 0, + 23886, 23770, 9058, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CMTLK_SPI, - 23790, 23674, 17409, 23822, 0, + 23886, 23770, 17500, 23918, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CMTLK_TRACE, - 23790, 23674, 23830, 8949, 0, + 23886, 23770, 23926, 9045, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CMTLK_UART_0, - 23790, 23674, 7983, 8134, 0, + 23886, 23770, 8016, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CMTLK_UART_1, - 23790, 23674, 7983, 8136, 0, + 23886, 23770, 8016, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CMTLK_SPI_0, - 23790, 23674, 17409, 8134, 0, + 23886, 23770, 17500, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CMTLK_SPI_1, - 23790, 23674, 17409, 8136, 0, + 23886, 23770, 17500, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CMTLK_PCIE_9, - 23790, 23674, 8204, 8140, 8153, 1047, 0, + 23886, 23770, 8237, 8173, 8186, 1047, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CMTLK_PCIE_10, - 23790, 23674, 8204, 8140, 8153, 9329, 0, + 23886, 23770, 8237, 8173, 8186, 9425, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CMTLK_PCIE_11, - 23790, 23674, 8204, 8140, 8153, 23836, 0, + 23886, 23770, 8237, 8173, 8186, 23932, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CMTLK_PCIE_12, - 23790, 23674, 8204, 8140, 8153, 14592, 0, + 23886, 23770, 8237, 8173, 8186, 14697, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CMTLK_PCIE_13, - 23790, 23674, 8204, 8140, 8153, 23839, 0, + 23886, 23770, 8237, 8173, 8186, 23935, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CMTLK_PCIE_14, - 23790, 23674, 8204, 8140, 8153, 23842, 0, + 23886, 23770, 8237, 8173, 8186, 23938, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CMTLK_PCIE_15, - 23790, 23674, 8204, 8140, 8153, 23845, 0, + 23886, 23770, 8237, 8173, 8186, 23941, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CMTLK_PCIE_16, - 23790, 23674, 8204, 8140, 8153, 19210, 0, + 23886, 23770, 8237, 8173, 8186, 19288, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CMTLK_PCIE_1, - 23790, 23674, 8204, 8140, 8153, 8136, 0, + 23886, 23770, 8237, 8173, 8186, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CMTLK_PCIE_2, - 23790, 23674, 8204, 8140, 8153, 6411, 0, + 23886, 23770, 8237, 8173, 8186, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CMTLK_PCIE_3, - 23790, 23674, 8204, 8140, 8153, 6422, 0, + 23886, 23770, 8237, 8173, 8186, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CMTLK_PCIE_4, - 23790, 23674, 8204, 8140, 8153, 6786, 0, + 23886, 23770, 8237, 8173, 8186, 6804, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CMTLK_PCIE_5, - 23790, 23674, 8204, 8140, 8153, 8138, 0, + 23886, 23770, 8237, 8173, 8186, 8171, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CMTLK_PCIE_6, - 23790, 23674, 8204, 8140, 8153, 8371, 0, + 23886, 23770, 8237, 8173, 8186, 8404, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CMTLK_PCIE_7, - 23790, 23674, 8204, 8140, 8153, 8373, 0, + 23886, 23770, 8237, 8173, 8186, 8406, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CMTLK_PCIE_8, - 23790, 23674, 8204, 8140, 8153, 6811, 0, + 23886, 23770, 8237, 8173, 8186, 6829, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CMTLK_EMMC, - 23790, 23674, 23848, 0, + 23886, 23770, 23944, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CMTLK_I2C_4, - 23790, 23674, 17453, 6786, 0, + 23886, 23770, 17544, 6804, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CMTLK_I2C_5, - 23790, 23674, 17453, 8138, 0, + 23886, 23770, 17544, 8171, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CMTLK_UART_2, - 23790, 23674, 7983, 6411, 0, + 23886, 23770, 8016, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CMTLK_HDA, - 23790, 23674, 8230, 7054, 0, + 23886, 23770, 8263, 7072, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CMTLK_AHCI, - 23790, 23674, 8762, 8984, 0, + 23886, 23770, 8800, 9080, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CMTLK_RAID, - 23790, 23674, 8762, 8991, 0, + 23886, 23770, 8800, 9087, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CMTLK_RAID_P, - 23790, 23674, 8762, 8991, 23853, 0, + 23886, 23770, 8800, 9087, 23949, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CMTLK_MEI_1, - 23790, 23674, 23861, 8136, 0, + 23886, 23770, 23957, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CMTLK_MEI_2, - 23790, 23674, 23861, 6411, 0, + 23886, 23770, 23957, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CMTLK_IDER, - 23790, 23674, 23865, 0, + 23886, 23770, 23961, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CMTLK_KT, - 23790, 23674, 23871, 0, + 23886, 23770, 23967, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CMTLK_MEI_3, - 23790, 23674, 23861, 6422, 0, + 23886, 23770, 23957, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CMTLK_MEI_4, - 23790, 23674, 23861, 6786, 0, + 23886, 23770, 23957, 6804, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CMTLK_I2C_0, - 23790, 23674, 17453, 8134, 0, + 23886, 23770, 17544, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CMTLK_I2C_1, - 23790, 23674, 17453, 8136, 0, + 23886, 23770, 17544, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CMTLK_I2C_2, - 23790, 23674, 17453, 6411, 0, + 23886, 23770, 17544, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CMTLK_I2C_3, - 23790, 23674, 17453, 6422, 0, + 23886, 23770, 17544, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CMTLK_XHCI, - 23790, 23674, 6945, 8450, 23874, 23878, 8233, 0, + 23886, 23770, 6963, 8483, 23970, 23974, 8266, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CMTLK_XDCI, - 23790, 23674, 6945, 8450, 23874, 23882, 23886, 0, + 23886, 23770, 6963, 8483, 23970, 23978, 23982, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CMTLK_SSRAM, - 23790, 23674, 23891, 23898, 0, + 23886, 23770, 23987, 23994, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CMTLK_CNVI_WIFI, - 23790, 23674, 23903, 23709, 0, + 23886, 23770, 23999, 23805, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CMTLK_SDXC, - 23790, 23674, 23908, 0, + 23886, 23770, 24004, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CMTLK_THERM, - 23790, 23674, 23913, 0, + 23886, 23770, 24009, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CMTLK_SPI_2, - 23790, 23674, 17409, 6411, 0, + 23886, 23770, 17500, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CMTLK_ISH, - 23790, 23674, 692, 23921, 8949, 0, + 23886, 23770, 692, 24017, 9045, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_80312, - 23928, 8945, 19624, 4575, 0, + 24024, 9041, 19702, 4575, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_80321, - 23934, 8945, 8115, 0, + 24030, 9041, 8148, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6700PXH_IOXAPIC, - 23940, 23948, 0, + 24036, 24044, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6700PXH_PCIE0, - 23940, 615, 23956, 6563, 23971, 0, + 24036, 615, 24052, 6581, 24067, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6700PXH_PCIE1, - 23940, 615, 23956, 6563, 23974, 0, + 24036, 615, 24052, 6581, 24070, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6702PXH_PCIX, - 23977, 615, 23985, 0, + 24073, 615, 24081, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_IOP332_A, - 24001, 615, 23956, 6563, 23971, 0, + 24097, 615, 24052, 6581, 24067, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_IOP332_B, - 24001, 615, 23956, 6563, 23974, 0, + 24097, 615, 24052, 6581, 24070, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_80331, - 24008, 8945, 8115, 8885, 6563, 0, + 24104, 9041, 8148, 8981, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_41210A, - 14833, 7009, 17862, 615, 6563, 11222, 0, + 14929, 7027, 17946, 615, 6581, 11337, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_41210B, - 14833, 7009, 17862, 615, 6563, 5171, 0, + 14929, 7027, 17946, 615, 6581, 5171, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_IOP333_A, - 24016, 615, 23956, 6563, 23971, 0, + 24112, 615, 24052, 6581, 24067, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_IOP333_B, - 24016, 615, 23956, 6563, 23974, 0, + 24112, 615, 24052, 6581, 24070, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_HASWELL_IGD, - 24023, 692, 1716, 2418, 0, + 24119, 692, 1716, 2418, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SRCZCRX, - 6450, 6455, 0, + 6468, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SRCU42E, - 6670, 6450, 6455, 0, + 6688, 6468, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SRCS28X, - 8762, 6450, 6455, 0, + 8800, 6468, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_HASWELL_IGD_1, - 24023, 692, 1716, 2418, 0, + 24119, 692, 1716, 2418, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_DH89XXCC_IQIA, - 24031, 8204, 24040, 558, 24049, 0, + 24127, 8237, 24136, 558, 24145, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_DH89XXCL_IQIA, - 24061, 8204, 24040, 558, 24049, 0, + 24157, 8237, 24136, 558, 24145, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_DH89XXCC_SGMII, - 24070, 24079, 0, + 24166, 24175, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_DH89XXCC_SERDES, - 24070, 24085, 0, + 24166, 24181, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_DH89XXCC_BPLANE, - 24070, 24092, 0, + 24166, 24188, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_DH89XXCC_SFP, - 24070, 16753, 0, + 24166, 16849, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_DH89XXCC_IQIA_VF, - 24070, 24049, 19987, 8125, 0, + 24166, 24145, 20065, 8158, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_DH89XXCL_IQIA_VF, - 24102, 24049, 19987, 8125, 0, + 24198, 24145, 20065, 8158, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PCEB, - 24111, 18961, 6563, 0, + 24207, 19039, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CDC, - 24122, 1400, 558, 8046, 6455, 0, + 24218, 1400, 558, 8079, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SIO, - 24130, 6, 8945, 0, + 24226, 6, 9041, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82426EX, - 24138, 6837, 6563, 0, + 24234, 6855, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PCMC, - 24146, 24157, 1400, 558, 4504, 6455, 24162, 0, + 24242, 24253, 1400, 558, 4504, 6473, 24258, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_GDT_RAID1, - 24169, 6450, 0, + 24265, 6468, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_GDT_RAID2, - 24169, 6450, 0, + 24265, 6468, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_LPC_H470, - 24173, 8958, 0, + 24269, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_LPC_Z490, - 24178, 8958, 0, + 24274, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_LPC_Q470, - 24183, 8958, 0, + 24279, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_LPC_QM480, - 24188, 8958, 0, + 24284, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_LPC_HM470, - 24194, 8958, 0, + 24290, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_LPC_WM490, - 24200, 8958, 0, + 24296, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_LPC_W480, - 24206, 8958, 0, + 24302, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_H_P2SB, - 8771, 6476, 23813, 0, + 8836, 6494, 23909, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_H_PMC, - 8771, 6476, 23818, 0, + 8836, 6494, 23914, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_H_SMB, - 8771, 6476, 8962, 0, + 8836, 6494, 9058, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_H_SPI_FLASH, - 8771, 6476, 17409, 23822, 0, + 8836, 6494, 17500, 23918, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_H_TRACE, - 8771, 6476, 23830, 8949, 0, + 8836, 6494, 23926, 9045, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_H_UART_0, - 8771, 6476, 7983, 8134, 0, + 8836, 6494, 8016, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_H_UART_1, - 8771, 6476, 7983, 8136, 0, + 8836, 6494, 8016, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_H_GSPI_0, - 8771, 6476, 24211, 8134, 0, + 8836, 6494, 24307, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_H_GSPI_1, - 8771, 6476, 24211, 8136, 0, + 8836, 6494, 24307, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_H_PCIE_21, - 8771, 6476, 8204, 8140, 8153, 24216, 0, + 8836, 6494, 8237, 8173, 8186, 24312, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_H_PCIE_22, - 8771, 6476, 8204, 8140, 8153, 14584, 0, + 8836, 6494, 8237, 8173, 8186, 14689, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_H_PCIE_23, - 8771, 6476, 8204, 8140, 8153, 24219, 0, + 8836, 6494, 8237, 8173, 8186, 24315, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_H_PCIE_24, - 8771, 6476, 8204, 8140, 8153, 24222, 0, + 8836, 6494, 8237, 8173, 8186, 24318, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_H_PCIE_9, - 8771, 6476, 8204, 8140, 8153, 1047, 0, + 8836, 6494, 8237, 8173, 8186, 1047, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_H_PCIE_10, - 8771, 6476, 8204, 8140, 8153, 9329, 0, + 8836, 6494, 8237, 8173, 8186, 9425, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_H_PCIE_11, - 8771, 6476, 8204, 8140, 8153, 23836, 0, + 8836, 6494, 8237, 8173, 8186, 23932, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_H_PCIE_12, - 8771, 6476, 8204, 8140, 8153, 14592, 0, + 8836, 6494, 8237, 8173, 8186, 14697, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_H_PCIE_13, - 8771, 6476, 8204, 8140, 8153, 23839, 0, + 8836, 6494, 8237, 8173, 8186, 23935, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_H_PCIE_14, - 8771, 6476, 8204, 8140, 8153, 23842, 0, + 8836, 6494, 8237, 8173, 8186, 23938, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_H_PCIE_15, - 8771, 6476, 8204, 8140, 8153, 23845, 0, + 8836, 6494, 8237, 8173, 8186, 23941, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_H_PCIE_16, - 8771, 6476, 8204, 8140, 8153, 19210, 0, + 8836, 6494, 8237, 8173, 8186, 19288, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_H_PCIE_1, - 8771, 6476, 8204, 8140, 8153, 8136, 0, + 8836, 6494, 8237, 8173, 8186, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_H_PCIE_2, - 8771, 6476, 8204, 8140, 8153, 6411, 0, + 8836, 6494, 8237, 8173, 8186, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_H_PCIE_3, - 8771, 6476, 8204, 8140, 8153, 6422, 0, + 8836, 6494, 8237, 8173, 8186, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_H_PCIE_4, - 8771, 6476, 8204, 8140, 8153, 6786, 0, + 8836, 6494, 8237, 8173, 8186, 6804, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_H_PCIE_5, - 8771, 6476, 8204, 8140, 8153, 8138, 0, + 8836, 6494, 8237, 8173, 8186, 8171, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_H_PCIE_6, - 8771, 6476, 8204, 8140, 8153, 8371, 0, + 8836, 6494, 8237, 8173, 8186, 8404, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_H_PCIE_7, - 8771, 6476, 8204, 8140, 8153, 8373, 0, + 8836, 6494, 8237, 8173, 8186, 8406, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_H_PCIE_8, - 8771, 6476, 8204, 8140, 8153, 6811, 0, + 8836, 6494, 8237, 8173, 8186, 6829, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_H_PCIE_17, - 8771, 6476, 8204, 8140, 8153, 24225, 0, + 8836, 6494, 8237, 8173, 8186, 24321, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_H_PCIE_18, - 8771, 6476, 8204, 8140, 8153, 24228, 0, + 8836, 6494, 8237, 8173, 8186, 24324, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_H_PCIE_19, - 8771, 6476, 8204, 8140, 8153, 24231, 0, + 8836, 6494, 8237, 8173, 8186, 24327, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_H_PCIE_20, - 8771, 6476, 8204, 8140, 8153, 11629, 0, + 8836, 6494, 8237, 8173, 8186, 11739, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_H_UART_2, - 8771, 6476, 7983, 6411, 0, + 8836, 6494, 8016, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_H_CAVS, - 8771, 6476, 24234, 24239, 0, + 8836, 6494, 24330, 24335, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_H_D_AHCI, - 8771, 6476, 8762, 8984, 24243, 0, + 8836, 6494, 8800, 9080, 24339, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_H_M_AHIC, - 8771, 6476, 8762, 8984, 24251, 0, + 8836, 6494, 8800, 9080, 24347, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_H_M_RAID, - 8771, 6476, 8762, 8991, 24251, 0, + 8836, 6494, 8800, 9087, 24347, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_H_M_P_RAID, - 8771, 6476, 8762, 8991, 23853, 24251, 0, + 8836, 6494, 8800, 9087, 23949, 24347, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_H_AHCI_OPTANE, - 8771, 6476, 8762, 8984, 24258, 0, + 8836, 6494, 8800, 9080, 24354, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_H_HECI_1, - 8771, 6476, 24265, 8136, 0, + 8836, 6494, 24361, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_H_HECI_2, - 8771, 6476, 24265, 6411, 0, + 8836, 6494, 24361, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_H_IDE_R, - 8771, 6476, 23865, 0, + 8836, 6494, 23961, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_H_KT, - 8771, 6476, 23871, 0, + 8836, 6494, 23967, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_H_HECI_3, - 8771, 6476, 24265, 6422, 0, + 8836, 6494, 24361, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_H_HECI_4, - 8771, 6476, 24265, 6786, 0, + 8836, 6494, 24361, 6804, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_H_I2C_0, - 8771, 6476, 17453, 8134, 0, + 8836, 6494, 17544, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_H_I2C_1, - 8771, 6476, 17453, 8136, 0, + 8836, 6494, 17544, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_H_I2C_2, - 8771, 6476, 17453, 6411, 0, + 8836, 6494, 17544, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_H_I2C_3, - 8771, 6476, 17453, 6422, 0, + 8836, 6494, 17544, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_H_XHCI, - 8771, 6476, 6945, 8450, 23874, 23878, 8233, 0, + 8836, 6494, 6963, 8483, 23970, 23974, 8266, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_H_SSRAM, - 8771, 6476, 23891, 23898, 0, + 8836, 6494, 23987, 23994, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_H_CNVI_WIFI, - 8771, 6476, 23903, 23709, 0, + 8836, 6494, 23999, 23805, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_H_SDXC, - 8771, 6476, 23908, 0, + 8836, 6494, 24004, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_H_THERM, - 8771, 6476, 23913, 0, + 8836, 6494, 24009, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_H_GSIP_2, - 8771, 6476, 24211, 6411, 0, + 8836, 6494, 24307, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_H_ISH, - 8771, 6476, 692, 23921, 8949, 0, + 8836, 6494, 692, 24017, 9045, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_WIFI_LINK_6150_1, - 23684, 23714, 24270, 0, + 23780, 23810, 24366, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_WIFI_LINK_6150_2, - 23684, 23714, 24270, 0, + 23780, 23810, 24366, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_WIFI_LINK_2230_1, - 23684, 23714, 24275, 0, + 23780, 23810, 24371, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_WIFI_LINK_2230_2, - 23684, 23714, 24275, 0, + 23780, 23810, 24371, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_WIFI_LINK_6235, - 23684, 23693, 24280, 0, + 23780, 23789, 24376, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_WIFI_LINK_6235_2, - 23684, 23693, 24280, 0, + 23780, 23789, 24376, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_WIFI_LINK_2200_1, - 23684, 23714, 24285, 0, + 23780, 23810, 24381, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_WIFI_LINK_2200_2, - 23684, 23714, 24285, 0, + 23780, 23810, 24381, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_WIFI_LINK_135_1, - 23684, 23714, 24290, 0, + 23780, 23810, 24386, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_WIFI_LINK_135_2, - 23684, 23714, 24290, 0, + 23780, 23810, 24386, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_WIFI_LINK_105_1, - 23684, 23714, 24294, 0, + 23780, 23810, 24390, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_WIFI_LINK_105_2, - 23684, 23714, 24294, 0, + 23780, 23810, 24390, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_WIFI_LINK_130_1, - 23684, 23714, 24298, 0, + 23780, 23810, 24394, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_WIFI_LINK_130_2, - 23684, 23714, 24298, 0, + 23780, 23810, 24394, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_X1000_SDIO_EMMC, - 24302, 24308, 24314, 0, + 24398, 24404, 24410, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_WIFI_LINK_100_1, - 23684, 23714, 6142, 0, + 23780, 23810, 6160, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_WIFI_LINK_100_2, - 23684, 23714, 6142, 0, + 23780, 23810, 6160, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_WIFI_LINK_7260_1, - 11247, 24324, 4761, 24329, 24332, 0, + 11362, 24420, 4761, 24425, 24428, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_WIFI_LINK_7260_2, - 11247, 24324, 4761, 24329, 24332, 0, + 11362, 24420, 4761, 24425, 24428, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_WIFI_LINK_3160_1, - 11247, 24324, 4761, 24329, 24337, 0, + 11362, 24420, 4761, 24425, 24433, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_WIFI_LINK_3160_2, - 11247, 24324, 4761, 24329, 24337, 0, + 11362, 24420, 4761, 24425, 24433, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_X1000_I2C_GPIO, - 24302, 24308, 17453, 558, 17400, 0, + 24398, 24404, 17544, 558, 17491, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_X1000_SPI, - 24302, 24308, 17409, 0, + 24398, 24404, 17500, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_X1000_HS_UART, - 24302, 24308, 24342, 0, + 24398, 24404, 24438, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_X1000_MAC, - 24302, 24308, 5819, 5717, 24350, 0, + 24398, 24404, 5837, 5735, 24446, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_X1000_EHCI, - 24302, 24308, 8727, 0, + 24398, 24404, 8760, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_X1000_OHCI, - 24302, 24308, 8722, 0, + 24398, 24404, 8755, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PCIE_NVME_SSD, - 24354, 22213, 24358, 24361, 7962, 0, + 24450, 22309, 24454, 24457, 7995, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_X1000_HB, - 24302, 24308, 6953, 6563, 0, + 24398, 24404, 6971, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_WIFI_LINK_7265_1, - 11247, 24324, 4761, 24329, 24371, 0, + 11362, 24420, 4761, 24425, 24467, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_WIFI_LINK_7265_2, - 11247, 24324, 4761, 24329, 24371, 0, + 11362, 24420, 4761, 24425, 24467, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_X1000_LB, - 24302, 24308, 24376, 6563, 0, + 24398, 24404, 24472, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_80960RM, - 24383, 24388, 8791, 0, + 24479, 24484, 8887, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_80960RN, - 24383, 24391, 8791, 0, + 24479, 24487, 8887, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SNR_IEH, - 24394, 3961, 24399, 0, + 24490, 3961, 24495, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SNR_M2IIO_VTD, - 24394, 3961, 24403, 24412, 0, + 24490, 3961, 24499, 24508, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SNR_M2IIO_RAS, - 24394, 3961, 24403, 24422, 0, + 24490, 3961, 24499, 24518, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SNR_M2IIO_PMU, - 24394, 3961, 24403, 24426, 0, + 24490, 3961, 24499, 24522, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SNR_M2IIO_DFX, - 24394, 3961, 24403, 24435, 0, + 24490, 3961, 24499, 24531, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SNR_PECI_OOB_MSM, - 24394, 3961, 24439, 24444, 0, + 24490, 3961, 24535, 24540, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SNR_PECI_OOB_MSM_PMU, - 24394, 3961, 24439, 24444, 24452, 0, + 24490, 3961, 24535, 24540, 24548, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE4G_D_ULT_GT1, - 8230, 1716, 0, + 8263, 1716, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE4G_M_HOST_DRAM, - 23679, 24456, 23755, 6953, 24459, 8046, 0, + 23775, 24552, 23851, 6971, 24555, 8079, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE4G_M_ULT_GT1, - 8230, 1716, 24467, 0, + 8263, 1716, 24563, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE4G_S_ULT_GT1, - 8230, 1716, 0, + 8263, 1716, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE4G_R_ULT_GT1_1, - 8230, 1716, 0, + 8263, 1716, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE4G_M_MINI_HDA, - 23679, 24456, 23755, 24473, 8230, 24478, 0, + 23775, 24552, 23851, 24569, 8263, 24574, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE4G_R_ULT_GT1_2, - 8230, 1716, 0, + 8263, 1716, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE4G_D_ULT_GT2, - 8230, 1716, 0, + 8263, 1716, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE4G_M_ULT_GT2, - 8230, 1716, 24484, 0, + 8263, 1716, 24580, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE4G_S_ULT_GT2, - 8230, 1716, 0, + 8263, 1716, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE4G_R_ULT_GT2_1, - 8230, 1716, 0, + 8263, 1716, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE4G_R_ULT_GT2_2, - 8230, 1716, 0, + 8263, 1716, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE4G_D_ULT_GT3, - 8230, 1716, 0, + 8263, 1716, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE4G_M_ULT_GT3, - 8230, 1716, 14367, 24490, 0, + 8263, 1716, 14472, 24586, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE4G_S_ULT_GT3, - 8230, 1716, 0, + 8263, 1716, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE4G_R_ULT_GT3_1, - 8230, 1716, 0, + 8263, 1716, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE4G_R_ULT_GT3_2, - 24496, 1716, 12072, 0, + 24592, 1716, 12182, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_DC_P3520_SSD, - 7962, 24358, 24501, 0, + 7995, 24454, 24597, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_DC_P4500_SSD, - 7962, 24358, 24507, 0, + 7995, 24454, 24603, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_DC_P4600_SSD, - 7962, 24358, 24513, 0, + 7995, 24454, 24609, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SNR_DMA, - 24394, 3961, 24519, 0, + 24490, 3961, 24615, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_HASWELL_HOST_DRAM, - 24023, 6953, 24459, 8046, 0, + 24119, 6971, 24555, 8079, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_HASWELL_PCIE16, - 24023, 21948, 24523, 6455, 0, + 24119, 22044, 24619, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_HASWELL_PCIE8, - 24023, 21948, 24527, 6455, 0, + 24119, 22044, 24623, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE3_12KV3_HOST_DRAM, - 24530, 24535, 24543, 6953, 24459, 8046, 0, + 24626, 24631, 24639, 6971, 24555, 8079, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_HASWELL_PCIE4, - 24023, 21948, 24546, 6455, 0, + 24119, 22044, 24642, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_HASWELL_MINI_HDA, - 24023, 24473, 8230, 7054, 6455, 0, + 24119, 24569, 8263, 7072, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_S1200_PCIE_1, - 24549, 24554, 8204, 8140, 8153, 8136, 0, + 24645, 24650, 8237, 8173, 8186, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_S1200_PCIE_2, - 24549, 24554, 8204, 8140, 8153, 6411, 0, + 24645, 24650, 8237, 8173, 8186, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_S1200_PCIE_3, - 24549, 24554, 8204, 8140, 8153, 6422, 0, + 24645, 24650, 8237, 8173, 8186, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_S1200_PCIE_4, - 24549, 24554, 8204, 8140, 8153, 6786, 0, + 24645, 24650, 8237, 8173, 8186, 6804, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_S1200_INTERNALMNG, - 24549, 24554, 8290, 24560, 0, + 24645, 24650, 8323, 24656, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_S1200_DFX1, - 24549, 24554, 24571, 17853, 8136, 0, + 24645, 24650, 24667, 17937, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_S1200_DFX2, - 24549, 24554, 24571, 17853, 6411, 0, + 24645, 24650, 24667, 17937, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_S1200_SMBUS_0, - 24549, 24554, 8962, 8134, 10520, 24577, 0, + 24645, 24650, 9058, 8167, 10635, 24673, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_S1200_SMBUS_1, - 24549, 24554, 8962, 8136, 24591, 24602, 0, + 24645, 24650, 9058, 8169, 24687, 24698, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_S1200_SMBUS_2, - 24549, 24554, 8962, 6411, 0, + 24645, 24650, 9058, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_S1200_SMBUS_3, - 24549, 24554, 8962, 6422, 0, + 24645, 24650, 9058, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_S1200_SMBUS_4, - 24549, 24554, 8962, 6786, 0, + 24645, 24650, 9058, 6804, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_S1200_SMBUS_5, - 24549, 24554, 8962, 8138, 0, + 24645, 24650, 9058, 8171, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_S1200_UART, - 24549, 24554, 24612, 7983, 0, + 24645, 24650, 24708, 8016, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_S1200_ILB, - 24549, 24554, 8958, 10513, 0, + 24645, 24650, 9054, 10628, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_S1200_S1220, - 24549, 24623, 8290, 0, + 24645, 24719, 8323, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_S1200_S1240, - 24549, 24629, 8290, 0, + 24645, 24725, 8323, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_S1200_S1260, - 24549, 24635, 8290, 0, + 24645, 24731, 8323, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I219_LM11, - 24641, 24649, 5717, 24654, 0, + 24737, 24745, 5735, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I219_V11, - 24665, 24649, 5717, 24654, 0, + 24761, 24745, 5735, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I219_LM10, - 24641, 24672, 5717, 24654, 0, + 24737, 24768, 5735, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I219_V10, - 24665, 24672, 5717, 24654, 0, + 24761, 24768, 5735, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I225_IT, - 24677, 5717, 24654, 0, + 24773, 5735, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I219_LM12, - 24641, 24685, 5717, 24654, 0, + 24737, 24781, 5735, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I219_V12, - 24665, 24685, 5717, 24654, 0, + 24761, 24781, 5735, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I219_LM23, - 24641, 24690, 5717, 24654, 0, + 24737, 24786, 5735, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I219_V23, - 24665, 24690, 5717, 24654, 0, + 24761, 24786, 5735, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I219_LM22, - 24641, 24695, 5717, 24654, 0, + 24737, 24791, 5735, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I219_V22, - 24665, 24695, 5717, 24654, 0, + 24761, 24791, 5735, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_DMI2, - 24700, 24703, 24706, 0, + 24796, 24799, 24802, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_PCIE_1, - 24700, 24703, 8204, 24546, 24711, 24717, 0, + 24796, 24799, 8237, 24642, 24807, 24813, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_PCIE_2, - 24700, 24703, 8204, 0, + 24796, 24799, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_PCIE_3, - 24700, 24703, 8204, 0, + 24796, 24799, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_PCIE_4, - 24700, 24703, 8204, 24723, 24527, 22213, 24546, 0, + 24796, 24799, 8237, 24819, 24623, 22309, 24642, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_PCIE_5, - 24700, 24703, 8204, 24723, 24527, 22213, 24546, 0, + 24796, 24799, 8237, 24819, 24623, 22309, 24642, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_PCIE_6, - 24700, 24703, 8204, 24723, 24527, 22213, 24546, 0, + 24796, 24799, 8237, 24819, 24623, 22309, 24642, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_PCIE_7, - 24700, 24703, 8204, 24723, 24527, 22213, 24546, 0, + 24796, 24799, 8237, 24819, 24623, 22309, 24642, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_PCIE_8, - 24700, 24703, 8204, 24723, 24527, 22213, 24546, 0, + 24796, 24799, 8237, 24819, 24623, 22309, 24642, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_PCIE_9, - 24700, 24703, 8204, 24723, 24527, 22213, 24546, 0, + 24796, 24799, 8237, 24819, 24623, 22309, 24642, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_PCIE_10, - 24700, 24703, 8204, 24723, 24527, 22213, 24546, 0, + 24796, 24799, 8237, 24819, 24623, 22309, 24642, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_PCIE_11, - 24700, 24703, 8204, 24723, 24527, 22213, 24546, 0, + 24796, 24799, 8237, 24819, 24623, 22309, 24642, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_R2PCIE, - 24700, 24703, 24728, 0, + 24796, 24799, 24824, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_UBOX_1, - 24700, 24703, 24735, 0, + 24796, 24799, 24831, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_UBOX_2, - 24700, 24703, 24735, 0, + 24796, 24799, 24831, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_IOAT_0, - 24700, 24703, 24740, 24519, 20237, 8134, 0, + 24796, 24799, 24836, 24615, 20315, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_IOAT_1, - 24700, 24703, 24740, 24519, 20237, 8136, 0, + 24796, 24799, 24836, 24615, 20315, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_IOAT_2, - 24700, 24703, 24740, 24519, 20237, 6411, 0, + 24796, 24799, 24836, 24615, 20315, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_IOAT_3, - 24700, 24703, 24740, 24519, 20237, 6422, 0, + 24796, 24799, 24836, 24615, 20315, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_IOAT_4, - 24700, 24703, 24740, 24519, 20237, 6786, 0, + 24796, 24799, 24836, 24615, 20315, 6804, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_IOAT_5, - 24700, 24703, 24740, 24519, 20237, 8138, 0, + 24796, 24799, 24836, 24615, 20315, 8171, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_IOAT_6, - 24700, 24703, 24740, 24519, 20237, 8371, 0, + 24796, 24799, 24836, 24615, 20315, 8404, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_IOAT_7, - 24700, 24703, 24740, 24519, 20237, 8373, 0, + 24796, 24799, 24836, 24615, 20315, 8406, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_ADDRMAP, - 24700, 24703, 8034, 8042, 0, + 24796, 24799, 8067, 8075, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_HOTPLUG, - 24700, 24703, 24746, 0, + 24796, 24799, 24842, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_IIO_RAS, - 24700, 24703, 24755, 24422, 0, + 24796, 24799, 24851, 24518, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_IOAPIC, - 24700, 24703, 8945, 24759, 0, + 24796, 24799, 9041, 24855, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_HA_2, - 24700, 24703, 24764, 24769, 0, + 24796, 24799, 24860, 24865, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_PCIE_PM_1, - 24700, 24703, 8204, 24775, 24787, 0, + 24796, 24799, 8237, 24871, 24883, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_QPI_PM_1, - 24700, 24703, 24795, 24775, 24787, 0, + 24796, 24799, 24891, 24871, 24883, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_QPI_PM_2, - 24700, 24703, 24795, 24775, 24787, 0, + 24796, 24799, 24891, 24871, 24883, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_QPI_1, - 24700, 24703, 24795, 0, + 24796, 24799, 24891, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_IMC_RAS, - 24700, 24703, 24799, 24422, 0, + 24796, 24799, 24895, 24518, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_UBOX_3, - 24700, 24703, 24735, 0, + 24796, 24799, 24831, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_QPI_L_0, - 24700, 24703, 24795, 8075, 8134, 0, + 24796, 24799, 24891, 8108, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_QPI_2, - 24700, 24703, 24795, 0, + 24796, 24799, 24891, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_QPI_L_0_1, - 24700, 24703, 24795, 8075, 24803, 8134, 0, + 24796, 24799, 24891, 8108, 24899, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_QPI_L_0_2, - 24700, 24703, 24795, 8075, 24803, 8134, 0, + 24796, 24799, 24891, 8108, 24899, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_QPI_L_1, - 24700, 24703, 24795, 8075, 8136, 0, + 24796, 24799, 24891, 8108, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_QPI_L_1_1, - 24700, 24703, 24795, 8075, 24803, 8136, 0, + 24796, 24799, 24891, 8108, 24899, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_QPI_L_1_2, - 24700, 24703, 24795, 8075, 24803, 8136, 0, + 24796, 24799, 24891, 8108, 24899, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_HA_1, - 24700, 24703, 24764, 24769, 0, + 24796, 24799, 24860, 24865, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_IMC_TA, - 24700, 24703, 24799, 24808, 0, + 24796, 24799, 24895, 24904, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_IMC_TAD_1, - 24700, 24703, 24799, 24811, 0, + 24796, 24799, 24895, 24907, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_IMC_TAD_2, - 24700, 24703, 24799, 24811, 0, + 24796, 24799, 24895, 24907, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_IMC_TAD_3, - 24700, 24703, 24799, 24811, 0, + 24796, 24799, 24895, 24907, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_IMC_TAD_4, - 24700, 24703, 24799, 24811, 0, + 24796, 24799, 24895, 24907, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_IMC_THERMAL_1, - 24700, 24703, 24799, 23913, 0, + 24796, 24799, 24895, 24009, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_IMC_THERMAL_2, - 24700, 24703, 24799, 23913, 0, + 24796, 24799, 24895, 24009, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_IMC_ERR_1, - 24700, 24703, 24799, 24815, 0, + 24796, 24799, 24895, 24911, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_IMC_ERR_2, - 24700, 24703, 24799, 24815, 0, + 24796, 24799, 24895, 24911, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_IMC_THERMAL_3, - 24700, 24703, 24799, 23913, 0, + 24796, 24799, 24895, 24009, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_IMC_THERMAL_4, - 24700, 24703, 24799, 23913, 0, + 24796, 24799, 24895, 24009, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_IMC_ERR_3, - 24700, 24703, 24799, 24815, 0, + 24796, 24799, 24895, 24911, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_IMC_ERR_4, - 24700, 24703, 24799, 24815, 0, + 24796, 24799, 24895, 24911, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_IMC_DDRIO_1, - 24700, 24703, 24799, 24821, 24827, 24835, 0, + 24796, 24799, 24895, 24917, 24923, 24931, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_IMC_DDRIO_2, - 24700, 24703, 24799, 24821, 24827, 24835, 0, + 24796, 24799, 24895, 24917, 24923, 24931, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_IMC_DDRIO_3, - 24700, 24703, 24799, 24821, 8134, 647, 8136, 0, + 24796, 24799, 24895, 24917, 8167, 647, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_IMC_DDRIO_4, - 24700, 24703, 24799, 24821, 8134, 647, 8136, 0, + 24796, 24799, 24895, 24917, 8167, 647, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_IMC_DDRIO_5, - 24700, 24703, 24799, 24821, 24845, 24835, 0, + 24796, 24799, 24895, 24917, 24941, 24931, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_IMC_DDRIO_6, - 24700, 24703, 24799, 24821, 24845, 24835, 0, + 24796, 24799, 24895, 24917, 24941, 24931, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_PCU_0, - 24700, 24703, 24849, 0, + 24796, 24799, 24945, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_PCU_1, - 24700, 24703, 24849, 0, + 24796, 24799, 24945, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_PCU_2, - 24700, 24703, 24849, 0, + 24796, 24799, 24945, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_PCU_3, - 24700, 24703, 24849, 0, + 24796, 24799, 24945, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_PCU_4, - 24700, 24703, 24849, 0, + 24796, 24799, 24945, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_SAD_1, - 24700, 24703, 24853, 0, + 24796, 24799, 24949, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_BROADCAST_1, - 24700, 24703, 24857, 0, + 24796, 24799, 24953, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_BROADCAST_2, - 24700, 24703, 24857, 0, + 24796, 24799, 24953, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_IMC_DDRIO_7, - 24700, 24703, 24799, 24821, 6411, 647, 6422, 0, + 24796, 24799, 24895, 24917, 6429, 647, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_IMC_DDRIO_8, - 24700, 24703, 24799, 24821, 6411, 647, 6422, 0, + 24796, 24799, 24895, 24917, 6429, 647, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_IMC_DDRIO_9, - 24700, 24703, 24799, 24821, 6411, 647, 6422, 0, + 24796, 24799, 24895, 24917, 6429, 647, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_IMC_DDRIO_10, - 24700, 24703, 24799, 24821, 6411, 647, 6422, 0, + 24796, 24799, 24895, 24917, 6429, 647, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_UNICAST_1, - 24700, 24703, 24867, 0, + 24796, 24799, 24963, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_UNICAST_2, - 24700, 24703, 24867, 0, + 24796, 24799, 24963, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_UNICAST_3, - 24700, 24703, 24867, 0, + 24796, 24799, 24963, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_UNICAST_4, - 24700, 24703, 24867, 0, + 24796, 24799, 24963, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_UNICAST_5, - 24700, 24703, 24867, 0, + 24796, 24799, 24963, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_UNICAST_6, - 24700, 24703, 24867, 0, + 24796, 24799, 24963, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_UNICAST_7, - 24700, 24703, 24867, 0, + 24796, 24799, 24963, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_UNICAST_8, - 24700, 24703, 24867, 0, + 24796, 24799, 24963, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_UNICAST_9, - 24700, 24703, 24867, 0, + 24796, 24799, 24963, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_UNICAST_10, - 24700, 24703, 24867, 0, + 24796, 24799, 24963, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_UNICAST_11, - 24700, 24703, 24867, 0, + 24796, 24799, 24963, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_UNICAST_12, - 24700, 24703, 24867, 0, + 24796, 24799, 24963, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_UNICAST_13, - 24700, 24703, 24867, 0, + 24796, 24799, 24963, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_UNICAST_14, - 24700, 24703, 24867, 0, + 24796, 24799, 24963, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5V2_UNICAST_15, - 24700, 24703, 24867, 0, + 24796, 24799, 24963, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_BAYTRAIL_HB, - 24875, 24879, 8115, 24885, 24897, 0, + 24971, 24975, 8148, 24981, 24993, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_BAYTRAIL_HDA, - 24875, 24879, 8230, 7054, 0, + 24971, 24975, 8263, 7072, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_BAYTRAIL_SIO2_DMA, - 24875, 24879, 14833, 8898, 24904, 0, + 24971, 24975, 14929, 8994, 25000, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_BAYTRAIL_SIO2_PWM1, - 24875, 24879, 14833, 8898, 24910, 0, + 24971, 24975, 14929, 8994, 25006, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_BAYTRAIL_SIO2_PWM2, - 24875, 24879, 14833, 8898, 24910, 0, + 24971, 24975, 14929, 8994, 25006, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_BAYTRAIL_SIO2_UART1, - 24875, 24879, 14833, 8898, 24916, 0, + 24971, 24975, 14929, 8994, 25012, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_BAYTRAIL_SIO2_UART2, - 24875, 24879, 14833, 8898, 24916, 0, + 24971, 24975, 14929, 8994, 25012, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_BAYTRAIL_SIO2_SPI, - 24875, 24879, 14833, 8898, 24925, 0, + 24971, 24975, 14929, 8994, 25021, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_BAYTRAIL_PCU_SMB, - 24875, 24879, 24849, 8962, 0, + 24971, 24975, 24945, 9058, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_BAYTRAIL_SCC_MMC, - 24875, 24879, 24931, 9186, 24939, 0, + 24971, 24975, 25027, 9282, 25035, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_BAYTRAIL_SCC_SDIO, - 24875, 24879, 24931, 9186, 24953, 0, + 24971, 24975, 25027, 9282, 25049, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_BAYTRAIL_SCC, - 24875, 24879, 24931, 9186, 24967, 0, + 24971, 24975, 25027, 9282, 25063, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_BAYTRAIL_TXE, - 24875, 24879, 24979, 24987, 24997, 0, + 24971, 24975, 25075, 25083, 25093, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_BAYTRAIL_PCU_LPC, - 24875, 24879, 8958, 3018, 6563, 0, + 24971, 24975, 9054, 3018, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_BAYTRAIL_SATA_IDE_0, - 24875, 24879, 8762, 8978, 0, + 24971, 24975, 8800, 9074, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_BAYTRAIL_SATA_IDE_1, - 24875, 24879, 8762, 8978, 0, + 24971, 24975, 8800, 9074, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_BAYTRAIL_SATA_AHCI_0, - 24875, 24879, 8762, 8984, 0, + 24971, 24975, 8800, 9080, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_BAYTRAIL_SATA_AHCI_1, - 24875, 24879, 8762, 8984, 0, + 24971, 24975, 8800, 9080, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_BAYTRAIL_LPEA, - 24875, 24879, 15155, 3740, 24997, 7054, 0, + 24971, 24975, 15251, 3740, 25093, 7072, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_BAYTRAIL_IGD, - 24875, 24879, 692, 1716, 2418, 0, + 24971, 24975, 692, 1716, 2418, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_BAYTRAIL_EHCI, - 24875, 24879, 6945, 8727, 0, + 24971, 24975, 6963, 8760, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_BAYTRAIL_XHCI, - 24875, 24879, 6945, 8233, 0, + 24971, 24975, 6963, 8266, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_BAYTRAIL_USB_DEV, - 24875, 24879, 6945, 14690, 0, + 24971, 24975, 6963, 14786, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_BAYTRAIL_CISP, - 24875, 24879, 25004, 4342, 25011, 8115, 0, + 24971, 24975, 25100, 4342, 25107, 8148, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_BAYTRAIL_SIO_DMA, - 24875, 24879, 14833, 8898, 24904, 0, + 24971, 24975, 14929, 8994, 25000, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_BAYTRAIL_SIO_I2C1, - 24875, 24879, 14833, 8898, 25018, 0, + 24971, 24975, 14929, 8994, 25114, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_BAYTRAIL_SIO_I2C2, - 24875, 24879, 14833, 8898, 25018, 0, + 24971, 24975, 14929, 8994, 25114, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_BAYTRAIL_SIO_I2C3, - 24875, 24879, 14833, 8898, 25018, 0, + 24971, 24975, 14929, 8994, 25114, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_BAYTRAIL_SIO_I2C4, - 24875, 24879, 14833, 8898, 25018, 0, + 24971, 24975, 14929, 8994, 25114, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_BAYTRAIL_SIO_I2C5, - 24875, 24879, 14833, 8898, 25018, 0, + 24971, 24975, 14929, 8994, 25114, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_BAYTRAIL_SIO_I2C6, - 24875, 24879, 14833, 8898, 25018, 0, + 24971, 24975, 14929, 8994, 25114, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_BAYTRAIL_SIO_I2C7, - 24875, 24879, 14833, 8898, 25018, 0, + 24971, 24975, 14929, 8994, 25114, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_BAYTRAIL_PCIE_1, - 24875, 24879, 8204, 8140, 8153, 0, + 24971, 24975, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_BAYTRAIL_PCIE_2, - 24875, 24879, 8204, 8140, 8153, 0, + 24971, 24975, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_BAYTRAIL_PCIE_3, - 24875, 24879, 8204, 8140, 8153, 0, + 24971, 24975, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_BAYTRAIL_PCIE_4, - 24875, 24879, 8204, 8140, 8153, 0, + 24971, 24975, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_BAYTRAIL_SCC_MMC2, - 24875, 24879, 24931, 9186, 25024, 25037, 0, + 24971, 24975, 25027, 9282, 25120, 25133, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82542, - 25042, 5709, 5717, 0, + 25138, 5727, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82543GC_FIBER, - 25049, 25058, 5717, 0, + 25145, 25154, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MODEM56, - 5934, 5764, 0, + 5952, 5782, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82543GC_COPPER, - 25068, 7887, 5717, 0, + 25164, 7920, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82544EI_COPPER, - 25077, 7887, 5717, 0, + 25173, 7920, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82544EI_FIBER, - 25077, 25058, 5717, 0, + 25173, 25154, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82544GC_COPPER, - 25086, 7887, 5717, 0, + 25182, 7920, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82544GC_LOM, - 25086, 25095, 5709, 5717, 0, + 25182, 25191, 5727, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82540EM, - 25101, 7887, 5717, 0, + 25197, 7920, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82545EM_COPPER, - 25110, 7887, 5717, 0, + 25206, 7920, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82546EB_COPPER, - 25119, 7887, 5717, 0, + 25215, 7920, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82545EM_FIBER, - 25110, 25058, 5717, 0, + 25206, 25154, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82546EB_FIBER, - 25119, 25058, 5717, 0, + 25215, 25154, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82541EI, - 25128, 5709, 5717, 0, + 25224, 5727, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82541ER_LOM, - 25137, 25095, 5709, 5717, 0, + 25233, 25191, 5727, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82540EM_LOM, - 25101, 25095, 5709, 5717, 0, + 25197, 25191, 5727, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82540EP_LOM, - 25146, 25095, 5709, 5717, 0, + 25242, 25191, 5727, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82540EP, - 25146, 5709, 5717, 0, + 25242, 5727, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82541EI_MOBILE, - 25128, 11578, 5709, 5717, 0, + 25224, 11693, 5727, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82547EI, - 25155, 5709, 5717, 0, + 25251, 5727, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82547EI_MOBILE, - 25155, 11578, 5709, 5717, 0, + 25251, 11693, 5727, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82546EB_QUAD, - 25119, 7887, 5717, 0, + 25215, 7920, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82540EP_LP, - 25146, 5709, 5717, 0, + 25242, 5727, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_V710_5G_T, - 25164, 25169, 5717, 0, + 25260, 25265, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82545GM_COPPER, - 25179, 7887, 5717, 0, + 25275, 7920, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82545GM_FIBER, - 25179, 25058, 5717, 0, + 25275, 25154, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82545GM_SERDES, - 25179, 5709, 5717, 25188, 0, + 25275, 5727, 5735, 25284, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100, - 25197, 5717, 0, + 25293, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_IN_BUSINESS, - 25205, 2430, 5717, 4540, 6455, 0, + 25301, 2430, 5735, 4540, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VE_0, - 25197, 25216, 3879, 6455, 0, + 25293, 25312, 3879, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VE_1, - 25197, 25216, 3879, 6455, 0, + 25293, 25312, 3879, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_0, - 25197, 25219, 3879, 6455, 0, + 25293, 25315, 3879, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_1, - 25197, 25219, 3879, 6455, 0, + 25293, 25315, 3879, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82562EH_HPNA_0, - 25222, 8631, 3879, 6455, 0, + 25318, 8664, 3879, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82562EH_HPNA_1, - 25222, 8631, 3879, 6455, 0, + 25318, 8664, 3879, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82562EH_HPNA_2, - 25222, 8631, 3879, 6455, 0, + 25318, 8664, 3879, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_2, - 25197, 25219, 3879, 6455, 0, + 25293, 25315, 3879, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VE_2, - 25197, 25216, 3879, 6455, 6156, 25230, 25241, 0, + 25293, 25312, 3879, 6473, 6174, 25326, 25337, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VE_3, - 25197, 25216, 3879, 6455, 6156, 25230, 25245, 25241, 0, + 25293, 25312, 3879, 6473, 6174, 25326, 25341, 25337, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_3, - 25197, 25219, 3879, 6455, 6156, 25251, 25241, 0, + 25293, 25315, 3879, 6473, 6174, 25347, 25337, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_4, - 25197, 25219, 3879, 6455, 6156, 25251, 25245, 25241, 0, + 25293, 25315, 3879, 6473, 6174, 25347, 25341, 25337, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VE_4, - 25197, 25216, 25262, 3879, 6455, 0, + 25293, 25312, 25358, 3879, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_5, - 25197, 25219, 25262, 3879, 6455, 0, + 25293, 25315, 25358, 3879, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_WL_2100, - 25268, 4540, 13053, 25281, 5755, 5909, 0, + 25364, 4540, 13163, 25377, 5773, 5927, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82597EX, - 25284, 25294, 6225, 5909, 0, + 25380, 25390, 6243, 5927, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801H_M_AMT, - 25297, 25305, 4540, 6455, 0, + 25393, 25401, 4540, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801H_AMT, - 25297, 25313, 4540, 6455, 0, + 25393, 25409, 4540, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801H_LAN, - 25297, 4540, 6455, 0, + 25393, 4540, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801H_IFE_LAN, - 25297, 25319, 4540, 6455, 0, + 25393, 25415, 4540, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801H_M_LAN, - 25297, 1773, 4540, 6455, 0, + 25393, 1773, 4540, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_X710_10G_SFP, - 25325, 8538, 25334, 0, + 25421, 8571, 25430, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_X710_10G_BP, - 25325, 8538, 25339, 0, + 25421, 8571, 25435, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_6, - 25197, 25219, 3879, 6455, 6156, 25230, 25241, 0, + 25293, 25315, 3879, 6473, 6174, 25326, 25337, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801EB_LAN, - 25349, 5819, 5717, 0, + 25445, 5837, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_7, - 25197, 25219, 3879, 24654, 0, + 25293, 25315, 3879, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_8, - 25197, 25219, 3879, 24654, 0, + 25293, 25315, 3879, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_9, - 25197, 25219, 3879, 24654, 0, + 25293, 25315, 3879, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_10, - 25197, 25219, 3879, 24654, 0, + 25293, 25315, 3879, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_11, - 25197, 25219, 3879, 24654, 0, + 25293, 25315, 3879, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_12, - 25197, 25219, 3879, 24654, 0, + 25293, 25315, 3879, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_M, - 25197, 13015, 3879, 6455, 0, + 25293, 13125, 3879, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82571EB_COPPER, - 25360, 7887, 5717, 0, + 25456, 7920, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82571EB_FIBER, - 25360, 25058, 5717, 0, + 25456, 25154, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82571EB_SERDES, - 25360, 5709, 5717, 25188, 0, + 25456, 5727, 5735, 25284, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801FB_LAN_2, - 25369, 5819, 5717, 0, + 25465, 5837, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VE_9, - 25197, 25216, 5717, 0, + 25293, 25312, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_13, - 25197, 25219, 3879, 24654, 0, + 25293, 25315, 3879, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_14, - 25197, 25219, 3879, 24654, 0, + 25293, 25315, 3879, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VE_5, - 25197, 25216, 25095, 3879, 6455, 0, + 25293, 25312, 25191, 3879, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801GB_LAN, - 25377, 5819, 5717, 0, + 25473, 5837, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VE_10, - 25197, 25216, 5717, 0, + 25293, 25312, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VE_11, - 25197, 25216, 5717, 0, + 25293, 25312, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82547GI, - 25385, 5709, 5717, 0, + 25481, 5727, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82541GI, - 25394, 5709, 5717, 0, + 25490, 5727, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82541GI_MOBILE, - 25394, 11578, 5709, 5717, 0, + 25490, 11693, 5727, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82541ER, - 25137, 5709, 5717, 0, + 25233, 5727, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82546GB_COPPER, - 25403, 7887, 5717, 0, + 25499, 7920, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82546GB_FIBER, - 25403, 25058, 5717, 0, + 25499, 25154, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82546GB_SERDES, - 25403, 5709, 5717, 25188, 0, + 25499, 5727, 5735, 25284, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82541PI, - 25412, 5709, 5717, 0, + 25508, 5727, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82572EI_COPPER, - 25421, 7887, 5717, 0, + 25517, 7920, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82572EI_FIBER, - 25421, 25058, 5717, 0, + 25517, 25154, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82572EI_SERDES, - 25421, 5709, 5717, 25188, 0, + 25517, 5727, 5735, 25284, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82546GB_PCIE, - 25430, 25441, 0, + 25526, 25537, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82573E, - 25451, 5709, 5717, 0, + 25547, 5727, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82573E_IAMT, - 25451, 5709, 5717, 0, + 25547, 5727, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_15, - 25197, 25219, 3879, 24654, 0, + 25293, 25315, 3879, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VE_6, - 25197, 25216, 3879, 6455, 0, + 25293, 25312, 3879, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VE_8, - 25197, 25216, 3879, 6455, 0, + 25293, 25312, 3879, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VE_7, - 25197, 25216, 3879, 6455, 6156, 25459, 25241, 0, + 25293, 25312, 3879, 6473, 6174, 25555, 25337, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_16, - 25197, 25219, 3879, 24654, 0, + 25293, 25315, 3879, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_80K3LAN_CPR_DPT, - 25466, 11247, 7887, 5717, 0, + 25562, 11362, 7920, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_80K3LAN_FIB_DPT, - 25466, 11247, 25058, 5717, 0, + 25562, 11362, 25154, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_80K3LAN_SDS_DPT, - 25466, 11247, 5709, 5717, 25188, 0, + 25562, 11362, 5727, 5735, 25284, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82546GB_QUAD_COPPER, - 25403, 19213, 8153, 5709, 5717, 0, + 25499, 19291, 8186, 5727, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82573L, - 25473, 5709, 5717, 0, + 25569, 5727, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82597EX_CX4, - 25481, 25489, 0, + 25577, 25585, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82571EB_QUAD_COPPER, - 25360, 19213, 8153, 5709, 5717, 0, + 25456, 19291, 8186, 5727, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82571EB_QUAD_FIBER, - 25360, 19213, 8153, 5709, 25493, 5717, 0, + 25456, 19291, 8186, 5727, 25589, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82575EB_COPPER, - 25499, 25508, 5717, 0, + 25595, 25604, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82575EB_FIBER_SERDES, - 25499, 25523, 5717, 25188, 0, + 25595, 25619, 5735, 25284, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82546GB_QUAD_COPPER_KSP3, - 25403, 19213, 8153, 5709, 5717, 25538, 0, + 25499, 19291, 8186, 5727, 5735, 25634, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82598, - 25545, 25551, 5717, 0, + 25641, 25647, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82572EI, - 25421, 7887, 5717, 0, + 25517, 7920, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_80K3LAN_CPR_SPT, - 25466, 7887, 5717, 0, + 25562, 7920, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_80K3LAN_SDS_SPT, - 25466, 5709, 5717, 25188, 0, + 25562, 5727, 5735, 25284, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82571GB_QUAD_COPPER, - 25555, 19213, 7887, 5717, 0, + 25651, 19291, 7920, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801I_IGP_AMT, - 25564, 25313, 4540, 6455, 0, + 25660, 25409, 4540, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801I_IGP_M, - 25564, 11578, 4540, 6455, 0, + 25660, 11693, 4540, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801I_IFE, - 25564, 4540, 6455, 0, + 25660, 4540, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801I_IFE_G, - 25564, 25571, 4540, 6455, 0, + 25660, 25667, 4540, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801I_IFE_GT, - 25564, 25575, 4540, 6455, 0, + 25660, 25671, 4540, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801H_IFE_GT, - 25297, 25580, 25575, 4540, 6455, 0, + 25393, 25676, 25671, 4540, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801H_IFE_G, - 25297, 25580, 25571, 4540, 6455, 0, + 25393, 25676, 25667, 4540, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82598AF_DUAL, - 25545, 9329, 5709, 10199, 11247, 8153, 0, + 25641, 9425, 5727, 10320, 11362, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82598AF, - 25545, 9329, 5709, 10199, 0, + 25641, 9425, 5727, 10320, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82598AT, - 25545, 9329, 5709, 10266, 0, + 25641, 9425, 5727, 10387, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82576_COPPER, - 25584, 25590, 5717, 0, + 25680, 25686, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82576_VF, - 25584, 25590, 5717, 19987, 8125, 0, + 25680, 25686, 5735, 20065, 8158, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801I_IGP_M_V, - 25600, 10296, 25608, 4540, 6455, 0, + 25696, 10417, 25704, 4540, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801J_R_BM_LM, - 25613, 4540, 6455, 0, + 25709, 4540, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801J_R_BM_LF, - 25624, 4540, 6455, 0, + 25720, 4540, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801J_R_BM_V, - 25635, 4540, 6455, 0, + 25731, 4540, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82574L, - 25645, 7887, 5717, 0, + 25741, 7920, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82571PT_QUAD_COPPER, - 25653, 25662, 5717, 0, + 25749, 25758, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82575GB_QUAD_COPPER, - 25677, 25662, 5717, 0, + 25773, 25758, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82571EB_DUAL_SERDES, - 25360, 25686, 25691, 5717, 25188, 0, + 25456, 25782, 25787, 5735, 25284, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82571EB_QUAD_SERDES, - 25360, 25698, 25691, 5717, 25188, 0, + 25456, 25794, 25787, 5735, 25284, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82598EB_SFP, - 25703, 9329, 5709, 16753, 0, + 25799, 9425, 5727, 16849, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82598EB_CX4, - 25703, 9329, 5709, 25489, 0, + 25799, 9425, 5727, 25585, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801J_D_BM_LM, - 25711, 4540, 6455, 0, + 25807, 4540, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801J_D_BM_LF, - 25722, 4540, 6455, 0, + 25818, 4540, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82598_SR_DUAL_EM, - 25545, 9329, 5709, 25733, 11247, 8153, 0, + 25641, 9425, 5727, 25829, 11362, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82575GB_QUAD_COPPER_PM, - 25677, 25736, 5717, 25751, 0, + 25773, 25832, 5735, 25847, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801I_BM, - 25756, 4540, 6455, 0, + 25852, 4540, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82576_FIBER, - 25584, 25767, 5717, 0, + 25680, 25863, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82576_SERDES, - 25584, 25777, 5717, 25188, 0, + 25680, 25873, 5735, 25284, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82576_QUAD_COPPER, - 25584, 25785, 5717, 0, + 25680, 25881, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PCH_M_LM, - 25800, 4540, 25804, 6455, 0, + 25896, 4540, 25900, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PCH_M_LC, - 25800, 4540, 25814, 6455, 0, + 25896, 4540, 25910, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82598_CX4_DUAL, - 25545, 9329, 5709, 25489, 11247, 8153, 0, + 25641, 9425, 5727, 25585, 11362, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82599_VF, - 25824, 9329, 5709, 5717, 19987, 8125, 0, + 25920, 9425, 5727, 5735, 20065, 8158, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PCH_D_DM, - 25800, 4540, 25830, 6455, 0, + 25896, 4540, 25926, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PCH_D_DC, - 25800, 4540, 25840, 6455, 0, + 25896, 4540, 25936, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82598_DA_DUAL, - 25545, 9329, 5709, 25850, 11247, 8153, 0, + 25641, 9425, 5727, 25946, 11362, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82598EB_XF_LR, - 25703, 9329, 5709, 25853, 25294, 0, + 25799, 9425, 5727, 25949, 25390, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801I_IGP_M_AMT, - 25564, 11578, 25313, 4540, 6455, 0, + 25660, 11693, 25409, 4540, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82574LA, - 25856, 7887, 5717, 0, + 25952, 7920, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82599_KX4, - 25824, 25863, 9329, 25872, 6455, 0, + 25920, 25959, 9425, 25968, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82599_COMBO_BACKPLANE, - 25824, 25876, 25886, 25897, 9329, 25872, 6455, 0, + 25920, 25972, 25982, 25993, 9425, 25968, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82599_CX4, - 25824, 25908, 9329, 25872, 6455, 0, + 25920, 26004, 9425, 25968, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82599_SFP, - 25824, 25914, 9329, 25872, 6455, 0, + 25920, 26010, 9425, 25968, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82599_XAUI_LOM, - 25824, 25925, 9329, 25872, 6455, 0, + 25920, 26021, 9425, 25968, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82552, - 25936, 5819, 3879, 24654, 0, + 26032, 5837, 3879, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82815_DC100_HUB, - 25942, 8949, 0, + 26038, 9045, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82815_DC100_AGP, - 25942, 8804, 0, + 26038, 8900, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82815_DC100_GRAPH, - 25942, 1716, 0, + 26038, 1716, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82815_NOAGP_HUB, - 25942, 8949, 0, + 26038, 9045, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82815_NOAGP_GRAPH, - 25942, 1716, 0, + 26038, 1716, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82815_NOGRAPH_HUB, - 25942, 8949, 0, + 26038, 9045, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82815_NOGRAPH_AGP, - 25942, 8804, 0, + 26038, 8900, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82815_FULL_HUB, - 25942, 8949, 0, + 26038, 9045, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82815_FULL_AGP, - 25942, 8804, 0, + 26038, 8900, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82815_FULL_GRAPH, - 25942, 1716, 0, + 26038, 1716, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82806AA, - 25948, 25956, 8949, 576, 25962, 17390, 6455, 0, + 26044, 26052, 9045, 576, 26058, 17481, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADI_BECC, - 25975, 25979, 25986, 25990, 19624, 4575, 0, + 26071, 26075, 26082, 26086, 19702, 4575, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_X1000_PCIE_0, - 24302, 24308, 8204, 8140, 8153, 0, + 24398, 24404, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_X1000_PCIE_1, - 24302, 24308, 8204, 8140, 8153, 0, + 24398, 24404, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_IXP1200, - 25997, 3879, 8115, 0, + 26093, 3879, 8148, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82559ER, - 26005, 2430, 5717, 4540, 6455, 0, + 26101, 2430, 5735, 4540, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82092AA, - 26013, 6626, 6455, 0, + 26109, 6644, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SAA7116, - 26021, 0, + 26117, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82452_PB, - 26029, 26040, 26046, 4320, 8115, 7009, 615, 6563, 0, + 26125, 26136, 26142, 4320, 8148, 7027, 615, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82596, - 26055, 4540, 6455, 0, + 26151, 4540, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EEPRO100, - 26061, 7253, 6142, 5819, 2430, 5717, 0, + 26157, 7271, 6160, 5837, 2430, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EEPRO100S, - 26061, 7253, 6142, 18970, 5819, 2430, 5717, 0, + 26157, 7271, 6160, 19048, 5837, 2430, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_8255X, - 26064, 2430, 5717, 4540, 6455, 0, + 26160, 2430, 5735, 4540, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82437FX, - 26070, 26078, 6, 6455, 0, + 26166, 26174, 6, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82371FB_ISA, - 26084, 26092, 6837, 6563, 0, + 26180, 26188, 6855, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82371FB_IDE, - 26084, 26092, 6626, 6455, 0, + 26180, 26188, 6644, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82371MX, - 26099, 26107, 11578, 615, 8945, 6626, 26115, 0, + 26195, 26203, 11693, 615, 9041, 6644, 26211, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82437MX, - 26126, 26134, 11578, 6, 6455, 0, + 26222, 26230, 11693, 6, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82441FX, - 26141, 26149, 615, 558, 4504, 6455, 0, + 26237, 26245, 615, 558, 4504, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82380AB, - 26155, 26163, 11578, 6837, 6563, 0, + 26251, 26259, 11693, 6855, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82380FB, - 26170, 26178, 11578, 8791, 6563, 0, + 26266, 26274, 11693, 8887, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82439HX, - 26186, 26194, 6, 6455, 0, + 26282, 26290, 6, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I226_LM, - 26200, 5717, 0, + 26296, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I226_V, - 26208, 5717, 0, + 26304, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I226_IT, - 26215, 5717, 0, + 26311, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I221_V, - 26223, 5717, 24654, 0, + 26319, 5735, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I226_BLANK_NVM, - 26230, 5717, 24654, 26235, 0, + 26326, 5735, 24750, 26331, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_X553_10G, - 26246, 26252, 25551, 5717, 0, + 26342, 26348, 25647, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_X553_1G, - 26246, 26252, 26257, 5717, 0, + 26342, 26348, 26353, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82870P2_PPB, - 26260, 26268, 8791, 6563, 0, + 26356, 26364, 8887, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82870P2_IOxAPIC, - 26260, 26268, 23948, 0, + 26356, 26364, 24044, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82870P2_HPLUG, - 26260, 26268, 26274, 26278, 6455, 0, + 26356, 26364, 26370, 26374, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801H_82567V_3, - 26283, 4540, 6455, 0, + 26379, 4540, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PCH2_LV_LM, - 26293, 5709, 3879, 24654, 0, + 26389, 5727, 3879, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PCH2_LV_V, - 26301, 5709, 3879, 24654, 0, + 26397, 5727, 3879, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82599_SFP_EM, - 25824, 25551, 5717, 4320, 14799, 0, + 25920, 25647, 5735, 4320, 14895, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82598_BX, - 25545, 25551, 5717, 26308, 0, + 25641, 25647, 5735, 26404, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82576_NS, - 25584, 25777, 5717, 0, + 25680, 25873, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82598AT2, - 25545, 25551, 26311, 5717, 0, + 25641, 25647, 26407, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82583V, - 26315, 7887, 5717, 0, + 26411, 7920, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82576_SERDES_QUAD, - 25584, 26323, 5717, 25188, 0, + 25680, 26419, 5735, 25284, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82580_COPPER, - 26336, 25590, 5717, 0, + 26432, 25686, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82580_FIBER, - 26336, 25767, 5717, 0, + 26432, 25863, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82580_SERDES, - 26336, 25590, 5717, 25188, 0, + 26432, 25686, 5735, 25284, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82580_SGMII, - 26336, 25777, 5717, 26342, 0, + 26432, 25873, 5735, 26438, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82599_KX4_MEZZ, - 25824, 25551, 26350, 5717, 26354, 0, + 25920, 25647, 26446, 5735, 26450, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_X540_VF, - 26364, 25551, 5717, 19987, 8125, 0, + 26460, 25647, 5735, 20065, 8158, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82580_COPPER_DUAL, - 26336, 26369, 5717, 0, + 26432, 26465, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82599_KR, - 25824, 25551, 5717, 26384, 0, + 25920, 25647, 5735, 26480, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82576_NS_SERDES, - 25584, 25777, 5717, 25188, 0, + 25680, 25873, 5735, 25284, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82599_T3_LOM, - 25824, 25551, 5717, 0, + 25920, 25647, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82580_ER, - 26336, 25590, 5717, 0, + 26432, 25686, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82580_ER_DUAL, - 26336, 26369, 5717, 0, + 26432, 26465, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I350_VF, - 26387, 5709, 3879, 24654, 19987, 8125, 0, + 26483, 5727, 3879, 24750, 20065, 8158, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I350_COPPER, - 26387, 5709, 3879, 24654, 0, + 26483, 5727, 3879, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I350_FIBER, - 26387, 5709, 25493, 3879, 24654, 0, + 26483, 5727, 25589, 3879, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I350_SERDES, - 26387, 5709, 25339, 24654, 0, + 26483, 5727, 25435, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I350_SGMII, - 26387, 5709, 24654, 0, + 26483, 5727, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801J_D_BM_V, - 26392, 4540, 6455, 0, + 26488, 4540, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82576_QUAD_COPPER_ET2, - 25584, 25785, 5717, 0, + 25680, 25881, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82580_QUAD_FIBER, - 26336, 26399, 5717, 0, + 26432, 26495, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_X540_AT2, - 26414, 26423, 5717, 0, + 26510, 26519, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82599_SFP_FCOE, - 25824, 9329, 25872, 26433, 0, + 25920, 9425, 25968, 26529, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82599_BPLANE_FCOE, - 25824, 9329, 25872, 25339, 26433, 0, + 25920, 9425, 25968, 25435, 26529, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82576_VF_HV, - 25584, 25590, 5717, 19987, 8125, 0, + 25680, 25686, 5735, 20065, 8158, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82599_VF_HV, - 25824, 9329, 25872, 19987, 8125, 0, + 25920, 9425, 25968, 20065, 8158, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I350_VF_HV, - 26387, 5709, 3879, 24654, 19987, 8125, 0, + 26483, 5727, 3879, 24750, 20065, 8158, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_X540_VF_HV, - 26364, 9329, 25872, 19987, 8125, 0, + 26460, 9425, 25968, 20065, 8158, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I210_T1, - 26438, 5717, 6225, 5909, 0, + 26534, 5735, 6243, 5927, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I210_COPPER_OEM1, - 26446, 5717, 26451, 26459, 0, + 26542, 5735, 26547, 26555, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I210_COPPER_IT, - 26446, 5717, 26451, 26464, 0, + 26542, 5735, 26547, 26560, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I210_FIBER, - 26446, 5717, 26468, 0, + 26542, 5735, 26564, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I210_SERDES, - 26446, 5717, 25188, 0, + 26542, 5735, 25284, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I210_SGMII, - 26446, 5717, 26342, 0, + 26542, 5735, 26438, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I211_COPPER, - 26476, 5717, 26481, 0, + 26572, 5735, 26577, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I217_LM, - 26490, 5717, 24654, 0, + 26586, 5735, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I217_V, - 26498, 5717, 24654, 0, + 26594, 5735, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I350_DA4, - 26387, 19213, 6788, 5709, 24654, 0, + 26483, 19291, 6806, 5727, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82599_SFP_SF_QP, - 25824, 9329, 25872, 6455, 0, + 25920, 9425, 25968, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XL710_VF, - 26505, 5717, 19987, 8125, 0, + 26601, 5735, 20065, 8158, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82599_SFP_SF2, - 25824, 26511, 9329, 25872, 6455, 0, + 25920, 26607, 9425, 25968, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82599_LS, - 25824, 19496, 25551, 5717, 0, + 25920, 19574, 25647, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82599EN_SFP, - 25824, 9329, 25872, 6455, 0, + 25920, 9425, 25968, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82599_QSFP_SF_QP, - 26518, 9329, 25872, 26523, 0, + 26614, 9425, 25968, 26619, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I218_V, - 26529, 5717, 24654, 0, + 26625, 5735, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I218_LM, - 26536, 5717, 24654, 0, + 26632, 5735, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_X540_BYPASS, - 26364, 9329, 25872, 26544, 0, + 26460, 9425, 25968, 26640, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82599_BYPASS, - 25824, 9329, 25872, 26544, 0, + 25920, 9425, 25968, 26640, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_X540T1, - 26364, 25551, 5717, 0, + 26460, 25647, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_X550T, - 11305, 25551, 5717, 0, + 11420, 25647, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_X550_VF_HV, - 11305, 9329, 25872, 19987, 8125, 0, + 11420, 9425, 25968, 20065, 8158, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_X550_VF, - 11305, 9329, 25872, 19987, 8125, 0, + 11420, 9425, 25968, 20065, 8158, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I219_LM, - 24641, 5717, 24654, 0, + 24737, 5735, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I219_V, - 24665, 5717, 24654, 0, + 24761, 5735, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XL710_VF_HV, - 26505, 5717, 19987, 8125, 0, + 26601, 5735, 20065, 8158, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XL710_SFP, - 26505, 25334, 5717, 26551, 0, + 26601, 25430, 5735, 26647, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I210_COPPER_WOF, - 26446, 5717, 26481, 0, + 26542, 5735, 26577, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I210_SERDES_WOF, - 26446, 5717, 25188, 0, + 26542, 5735, 25284, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XL710_KX_A, - 26505, 26557, 5717, 0, + 26601, 26653, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XL710_KX_B, - 26505, 26560, 24092, 26566, 0, + 26601, 26656, 24188, 26662, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XL710_KX_C, - 26505, 8538, 24092, 26566, 0, + 26601, 8571, 24188, 26662, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XL710_QSFP_A, - 26505, 26560, 26523, 0, + 26601, 26656, 26619, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XL710_QSFP_B, - 26505, 26560, 26523, 0, + 26601, 26656, 26619, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XL710_QSFP_C, - 26505, 26560, 26523, 0, + 26601, 26656, 26619, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_X710_10G_T_1, - 26571, 26576, 5717, 0, + 26667, 26672, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XL710_20G_BP_1, - 26505, 26586, 25339, 0, + 26601, 26682, 25435, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XL710_20G_BP_2, - 26505, 26586, 25339, 0, + 26601, 26682, 25435, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_X710_T4_10G, - 26592, 26600, 0, + 26688, 26696, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XXV710_25G_BP, - 26609, 26616, 25339, 0, + 26705, 26712, 25435, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XXV710_25G_SFP28, - 26609, 26616, 26622, 0, + 26705, 26712, 26718, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I218_LM2, - 26536, 5717, 24654, 0, + 26632, 5735, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I218_V2, - 26529, 5717, 24654, 0, + 26625, 5735, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I218_LM3, - 26536, 5717, 24654, 0, + 26632, 5735, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I218_V3, - 26529, 5717, 24654, 0, + 26625, 5735, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_X552_VF, - 26628, 15833, 0, + 26724, 15929, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_X552_VF_HV, - 26628, 15833, 26633, 0, + 26724, 15929, 26729, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_X552_KX4, - 26628, 26350, 0, + 26724, 26446, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_X552_KR, - 26628, 26384, 0, + 26724, 26480, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_X552_SFP, - 26628, 25334, 0, + 26724, 25430, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_X557_AT2, - 26643, 0, + 26739, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_X552_1G_T, - 26628, 26652, 0, + 26724, 26748, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_X552_XFI, - 26628, 26663, 0, + 26724, 26759, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_X553_VF_HYPV, - 26246, 26252, 15833, 26633, 0, + 26342, 26348, 15929, 26729, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I219_LM2, - 24641, 26667, 5717, 24654, 0, + 24737, 26763, 5735, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I219_V2, - 24665, 26667, 5717, 24654, 0, + 24761, 26763, 5735, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I219_LM3, - 24641, 26671, 5717, 24654, 0, + 24737, 26767, 5735, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I219_LM7, - 24641, 26675, 5717, 24654, 0, + 24737, 26771, 5735, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I219_V7, - 24665, 26675, 5717, 24654, 0, + 24761, 26771, 5735, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I219_LM6, - 24641, 26679, 5717, 24654, 0, + 24737, 26775, 5735, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I219_V6, - 24665, 26679, 5717, 24654, 0, + 24761, 26775, 5735, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_X553_KRKX, - 26246, 26252, 25339, 26683, 25551, 26690, 0, + 26342, 26348, 25435, 26779, 25647, 26786, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_X553_KX_25G, - 26246, 26252, 25339, 26695, 26699, 0, + 26342, 26348, 25435, 26791, 26795, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_X553_SFI_SFP, - 26246, 26252, 25551, 25334, 26551, 0, + 26342, 26348, 25647, 25430, 26647, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_X553_VF, - 26246, 26252, 15833, 0, + 26342, 26348, 15929, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_X553_SGMII_BP, - 26246, 26252, 26705, 24079, 25339, 26710, 26690, 0, + 26342, 26348, 26801, 24175, 25435, 26806, 26786, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_X553_SGMII_BP_L, - 26246, 26252, 26705, 24079, 25339, 26715, 26690, 0, + 26342, 26348, 26801, 24175, 25435, 26811, 26786, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_X553_10G_T, - 26246, 26252, 26576, 26724, 0, + 26342, 26348, 26672, 26820, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_X553_QSFP, - 26246, 26252, 25551, 26731, 0, + 26342, 26348, 25647, 26827, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_X553_QSFP_N, - 26246, 26252, 25551, 26731, 0, + 26342, 26348, 25647, 26827, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_X553_KR_SFP, - 26246, 26252, 25551, 25334, 26736, 0, + 26342, 26348, 25647, 25430, 26832, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_X550T1, - 11305, 25551, 5717, 0, + 11420, 25647, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I219_V5, - 24665, 26741, 5717, 24654, 0, + 24761, 26837, 5735, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I219_LM4, - 24641, 26745, 5717, 24654, 0, + 24737, 26841, 5735, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I219_V4, - 24665, 26745, 5717, 24654, 0, + 24761, 26841, 5735, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I219_LM8, - 24641, 26749, 5717, 24654, 0, + 24737, 26845, 5735, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I219_V8, - 24665, 26749, 5717, 24654, 0, + 24761, 26845, 5735, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I219_LM9, - 24641, 26753, 5717, 24654, 0, + 24737, 26849, 5735, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I219_V9, - 24665, 26753, 5717, 24654, 0, + 24761, 26849, 5735, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I219_LM5, - 24641, 26741, 5717, 24654, 0, + 24737, 26837, 5735, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_X553_SGMII, - 26246, 26252, 26705, 24079, 26710, 26690, 0, + 26342, 26348, 26801, 24175, 26806, 26786, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_X553_SGMII_L, - 26246, 26252, 26705, 24079, 26715, 26690, 0, + 26342, 26348, 26801, 24175, 26811, 26786, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I225_LM, - 26757, 26762, 5717, 0, + 26853, 26858, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I225_V, - 26757, 26765, 5717, 0, + 26853, 26861, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I220_V, - 26767, 5717, 24654, 0, + 26863, 5735, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I225_BLANK_NVM, - 26757, 5717, 24654, 26235, 0, + 26853, 5735, 24750, 26331, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I219_LM15, - 24641, 26774, 5717, 24654, 0, + 24737, 26870, 5735, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I219_V15, - 24665, 26774, 5717, 24654, 0, + 24761, 26870, 5735, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I210_SGMII_WOF, - 26446, 5717, 26342, 0, + 26542, 5735, 26438, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I225_I, - 26779, 5717, 24654, 0, + 26875, 5735, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I219_LM14, - 24641, 26786, 5717, 24654, 0, + 24737, 26882, 5735, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I219_V14, - 24665, 26786, 5717, 24654, 0, + 24761, 26882, 5735, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I219_LM13, - 24641, 26791, 5717, 24654, 0, + 24737, 26887, 5735, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I219_V13, - 24665, 26791, 5717, 24654, 0, + 24761, 26887, 5735, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_X710_10G_T_2, - 25325, 26576, 5717, 0, + 25421, 26672, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE5G_HB_1, - 23679, 26796, 6953, 6563, 0, + 23775, 26892, 6971, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE5G_M_GT1, - 8230, 1716, 24467, 0, + 8263, 1716, 24563, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE5G_HDA_1, - 23679, 26796, 8230, 7054, 0, + 23775, 26892, 8263, 7072, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE5G_M_GT2_1, - 8230, 1716, 26799, 0, + 8263, 1716, 26895, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE5G_M_GT2_2, - 8230, 1716, 19010, 0, + 8263, 1716, 19088, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE5G_M_GT3_15W, - 8230, 1716, 26804, 0, + 8263, 1716, 26900, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE5G_M_GT3_28W, - 24496, 1716, 26809, 0, + 24592, 1716, 26905, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SNR_E882_C_BP, - 26814, 3296, 24092, 0, + 26910, 3296, 24188, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SNR_E882_C_QSFP, - 26814, 3296, 26731, 0, + 26910, 3296, 26827, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SNR_E882_C_SFP, - 26814, 3296, 16753, 0, + 26910, 3296, 16849, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SNR_E882_C_10GT, - 26821, 26576, 0, + 26917, 26672, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SNR_E882_C_1G, - 26814, 26257, 0, + 26910, 26353, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SNR_E882_X, - 26836, 26843, 26848, 0, + 26932, 26939, 26944, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SNR_E882_L_BP, - 26854, 3296, 24092, 0, + 26950, 3296, 24188, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SNR_E882_L_SFP, - 26854, 3296, 16753, 0, + 26950, 3296, 16849, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SNR_E882_L_10GT, - 26861, 26576, 0, + 26957, 26672, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SNR_E882_L_1G, - 26854, 26257, 0, + 26950, 26353, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SNR_QAT_18, - 24394, 3961, 26876, 24239, 0, + 24490, 3961, 26972, 24335, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SNR_PCH_C2_RP_11, - 24394, 3961, 25800, 8204, 26880, 26888, 26891, 23836, 0, + 24490, 3961, 25896, 8237, 26976, 26984, 26987, 23932, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SNR_PCH_C0_RP_0, - 24394, 3961, 25800, 8204, 26880, 26894, 26891, 8134, 0, + 24490, 3961, 25896, 8237, 26976, 26990, 26987, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SNR_PCH_C0_RP_1, - 24394, 3961, 25800, 8204, 26880, 26894, 26891, 8136, 0, + 24490, 3961, 25896, 8237, 26976, 26990, 26987, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SNR_PCH_C0_RP_2, - 24394, 3961, 25800, 8204, 26880, 26894, 26891, 6411, 0, + 24490, 3961, 25896, 8237, 26976, 26990, 26987, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SNR_PCH_C0_RP_3, - 24394, 3961, 25800, 8204, 26880, 26894, 26891, 6422, 0, + 24490, 3961, 25896, 8237, 26976, 26990, 26987, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SNR_SMB_HOST, - 24394, 3961, 6953, 24904, 8962, 0, + 24490, 3961, 6971, 25000, 9058, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SNR_PCH_C2_RP_8, - 24394, 3961, 25800, 8204, 26880, 26888, 26891, 6811, 0, + 24490, 3961, 25896, 8237, 26976, 26984, 26987, 6829, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SNR_PCH_C2_RP_9, - 24394, 3961, 25800, 8204, 26880, 26888, 26891, 1047, 0, + 24490, 3961, 25896, 8237, 26976, 26984, 26987, 1047, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SNR_PCH_C2_RP_10, - 24394, 3961, 25800, 8204, 26880, 26888, 26891, 9329, 0, + 24490, 3961, 25896, 8237, 26976, 26984, 26987, 9425, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SNR_SATA_0, - 24394, 3961, 8762, 8134, 0, + 24490, 3961, 8800, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SNR_USB, - 24394, 3961, 6945, 0, + 24490, 3961, 6963, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SNR_NIS, - 24394, 3961, 26897, 7009, 26901, 0, + 24490, 3961, 26993, 7027, 26997, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SNR_ME_HECI, - 24394, 3961, 26905, 24265, 0, + 24490, 3961, 27001, 24361, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SNR_HSUART, - 24394, 3961, 26908, 0, + 24490, 3961, 27004, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SNR_VRP_QAT, - 24394, 3961, 26897, 3296, 26876, 0, + 24490, 3961, 26993, 3296, 26972, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SNR_EMMC, - 24394, 3961, 23848, 0, + 24490, 3961, 23944, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SNR_LPC, - 24394, 3961, 26915, 0, + 24490, 3961, 27011, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SNR_P2SB, - 24394, 3961, 25800, 23813, 0, + 24490, 3961, 25896, 23909, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SNR_PMC, - 24394, 3961, 25800, 23818, 0, + 24490, 3961, 25896, 23914, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SNR_SMB_LEGACY, - 24394, 3961, 24376, 8962, 0, + 24490, 3961, 24472, 9058, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SNR_SPI, - 24394, 3961, 17409, 0, + 24490, 3961, 17500, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SNR_PCH_TRACE, - 24394, 3961, 25800, 23830, 8949, 0, + 24490, 3961, 25896, 23926, 9045, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SNR_IRC, - 24394, 3961, 24350, 26924, 0, + 24490, 3961, 24446, 27020, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SNR_PMC_SRAM, - 24394, 3961, 26928, 0, + 24490, 3961, 27024, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SNR_QAT_17, - 24394, 3961, 26876, 26937, 0, + 24490, 3961, 26972, 27033, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SNR_SATA_2, - 24394, 3961, 8762, 6411, 0, + 24490, 3961, 8800, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE6G_H_HB_1, - 23679, 26941, 6953, 558, 8046, 26944, 11247, 26948, 0, + 23775, 27037, 6971, 558, 8079, 27040, 11362, 27044, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE6G_PCIE_X16, - 23679, 26941, 8204, 24523, 0, + 23775, 27037, 8237, 24619, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE6G_PEN_GTX_1, - 8230, 1716, 26954, 0, + 8263, 1716, 27050, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE6G_THERM, - 23679, 26941, 23913, 0, + 23775, 27037, 24009, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE6G_U_HB, - 23679, 26941, 6953, 558, 8046, 26958, 0, + 23775, 27037, 6971, 558, 8079, 27054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE6G_PCIE_X8, - 23679, 26941, 8204, 24527, 0, + 23775, 27037, 8237, 24623, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE6G_PEN_GTX_2, - 8230, 1716, 26954, 0, + 8263, 1716, 27050, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE6G_PCIE_X4, - 23679, 26941, 8204, 24546, 0, + 23775, 27037, 8237, 24642, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE6G_H_GT1, - 8230, 1716, 24467, 0, + 8263, 1716, 24563, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE6G_Y_HB, - 23679, 26941, 6953, 558, 8046, 26962, 0, + 23775, 27037, 6971, 558, 8079, 27058, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE6G_Y_GT1, - 8230, 1716, 24467, 0, + 8263, 1716, 24563, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE6G_S_HB, - 23679, 26941, 6953, 558, 8046, 26966, 11247, 26948, 0, + 23775, 27037, 6971, 558, 8079, 27062, 11362, 27044, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE6G_H_HB_2, - 23679, 26941, 6953, 558, 8046, 26944, 19213, 26948, 0, + 23775, 27037, 6971, 558, 8079, 27040, 19291, 27044, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE6G_GMM, - 23679, 26941, 26970, 26979, 26987, 0, + 23775, 27037, 27066, 27075, 27083, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE6G_S_GT2, - 8230, 1716, 26993, 24484, 0, + 8263, 1716, 27089, 24580, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE6G_U_GT2, - 8230, 1716, 11472, 24484, 0, + 8263, 1716, 11587, 24580, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE6G_H_HB_3, - 23679, 26941, 6953, 558, 8046, 26997, 19213, 26948, 0, + 23775, 27037, 6971, 558, 8079, 27093, 19291, 27044, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE6G_IU, - 23679, 26941, 4342, 27003, 0, + 23775, 27037, 4342, 27099, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE6G_H_GT2, - 8230, 1716, 26993, 24484, 0, + 8263, 1716, 27089, 24580, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE6G_XEON_GTX, - 8230, 1716, 22624, 0, + 8263, 1716, 22720, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE6G_Y_GT2, - 8230, 1716, 27008, 24484, 0, + 8263, 1716, 27104, 24580, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE6G_S_HB_2, - 23679, 26941, 6953, 558, 8046, 26966, 19213, 26948, 0, + 23775, 27037, 6971, 558, 8079, 27062, 19291, 27044, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE6G_S_GT3, - 24496, 1716, 24490, 0, + 24592, 1716, 24586, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE6G_U_GT3, - 24496, 1716, 24490, 0, + 24592, 1716, 24586, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE6G_U_GT3E_1, - 24496, 1716, 12196, 27012, 0, + 24592, 1716, 12306, 27108, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE6G_U_GT3E_2, - 24496, 1716, 27012, 0, + 24592, 1716, 27108, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE6G_H_GT3, - 24496, 1716, 24490, 0, + 24592, 1716, 24586, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE6G_S_GT4_1, - 24496, 7253, 1716, 27019, 27024, 0, + 24592, 7271, 1716, 27115, 27120, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE6G_HS_GT4, - 24496, 7253, 1716, 27024, 0, + 24592, 7271, 1716, 27120, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE6G_H_GT4, - 24496, 7253, 1716, 27019, 27024, 0, + 24592, 7271, 1716, 27115, 27120, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE6G_S_GT4_2, - 24496, 7253, 1716, 27024, 0, + 24592, 7271, 1716, 27120, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_80960_RP, - 27030, 27037, 27044, 0, + 27126, 27133, 27140, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_80960RM_2, - 24383, 24388, 8791, 0, + 24479, 24484, 8887, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_SYSA_0, - 26246, 6, 24769, 0, + 26342, 6, 24865, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_GLREG, - 26246, 27059, 0, + 26342, 27155, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_RCEC, - 26246, 8285, 0, + 26342, 8318, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_PCIERP_QAT, - 26246, 8204, 8140, 8153, 3296, 26876, 0, + 26342, 8237, 8173, 8186, 3296, 26972, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_PCIERP_0, - 26246, 8204, 26880, 8134, 8153, 8134, 0, + 26342, 8237, 26976, 8167, 8186, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_PCIERP_1, - 26246, 8204, 26880, 8134, 8153, 8136, 0, + 26342, 8237, 26976, 8167, 8186, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_PCIERP_2, - 26246, 8204, 26880, 8134, 8153, 6411, 0, + 26342, 8237, 26976, 8167, 8186, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_PCIERP_3, - 26246, 8204, 26880, 8134, 8153, 6422, 0, + 26342, 8237, 26976, 8167, 8186, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_PCIERP_4, - 26246, 8204, 26880, 8136, 8153, 8134, 0, + 26342, 8237, 26976, 8169, 8186, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_PCIERP_5, - 26246, 8204, 26880, 8136, 8153, 8136, 0, + 26342, 8237, 26976, 8169, 8186, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_PCIERP_6, - 26246, 8204, 26880, 8136, 8153, 6411, 0, + 26342, 8237, 26976, 8169, 8186, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_PCIERP_7, - 26246, 8204, 26880, 8136, 8153, 6422, 0, + 26342, 8237, 26976, 8169, 8186, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_SMBUS, - 26246, 8962, 0, + 26342, 9058, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_SATA0_0, - 26246, 8762, 6455, 8134, 0, + 26342, 8800, 6473, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_SATA0_1, - 26246, 8762, 6455, 8134, 0, + 26342, 8800, 6473, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_SATA0_2, - 26246, 8762, 6455, 8134, 0, + 26342, 8800, 6473, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_SATA0_3, - 26246, 8762, 6455, 8134, 0, + 26342, 8800, 6473, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_SATA0_4, - 26246, 8762, 6455, 8134, 0, + 26342, 8800, 6473, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_SATA0_5, - 26246, 8762, 6455, 8134, 0, + 26342, 8800, 6473, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_SATA0_6, - 26246, 8762, 6455, 8134, 0, + 26342, 8800, 6473, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_SATA0_7, - 26246, 8762, 6455, 8134, 0, + 26342, 8800, 6473, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_SATA0_8, - 26246, 8762, 6455, 8134, 0, + 26342, 8800, 6473, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_SATA0_9, - 26246, 8762, 6455, 8134, 0, + 26342, 8800, 6473, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_SATA0_10, - 26246, 8762, 6455, 8134, 0, + 26342, 8800, 6473, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_SATA0_11, - 26246, 8762, 6455, 8134, 0, + 26342, 8800, 6473, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_SATA0_12, - 26246, 8762, 6455, 8134, 0, + 26342, 8800, 6473, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_SATA0_13, - 26246, 8762, 6455, 8134, 0, + 26342, 8800, 6473, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_SATA0_14, - 26246, 8762, 6455, 8134, 0, + 26342, 8800, 6473, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_SATA0_15, - 26246, 8762, 6455, 8134, 0, + 26342, 8800, 6473, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_SATA1_0, - 26246, 8762, 6455, 8136, 0, + 26342, 8800, 6473, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_SATA1_1, - 26246, 8762, 6455, 8136, 0, + 26342, 8800, 6473, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_SATA1_2, - 26246, 8762, 6455, 8136, 0, + 26342, 8800, 6473, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_SATA1_3, - 26246, 8762, 6455, 8136, 0, + 26342, 8800, 6473, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_SATA1_4, - 26246, 8762, 6455, 8136, 0, + 26342, 8800, 6473, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_SATA1_5, - 26246, 8762, 6455, 8136, 0, + 26342, 8800, 6473, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_SATA1_6, - 26246, 8762, 6455, 8136, 0, + 26342, 8800, 6473, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_SATA1_7, - 26246, 8762, 6455, 8136, 0, + 26342, 8800, 6473, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_SATA1_8, - 26246, 8762, 6455, 8136, 0, + 26342, 8800, 6473, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_SATA1_9, - 26246, 8762, 6455, 8136, 0, + 26342, 8800, 6473, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_SATA1_10, - 26246, 8762, 6455, 8136, 0, + 26342, 8800, 6473, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_SATA1_11, - 26246, 8762, 6455, 8136, 0, + 26342, 8800, 6473, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_SATA1_12, - 26246, 8762, 6455, 8136, 0, + 26342, 8800, 6473, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_SATA1_13, - 26246, 8762, 6455, 8136, 0, + 26342, 8800, 6473, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_SATA1_14, - 26246, 8762, 6455, 8136, 0, + 26342, 8800, 6473, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_SATA1_15, - 26246, 8762, 6455, 8136, 0, + 26342, 8800, 6473, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_USB23, - 26246, 6945, 27065, 27073, 0, + 26342, 6963, 27161, 27169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_PCIERP_LAN0, - 26246, 8204, 8140, 8153, 3296, 4540, 8134, 0, + 26342, 8237, 8173, 8186, 3296, 4540, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_PCIERP_LAN1, - 26246, 8204, 8140, 8153, 3296, 4540, 8136, 0, + 26342, 8237, 8173, 8186, 3296, 4540, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_ME_HECI_1, - 26246, 26905, 24265, 8136, 0, + 26342, 27001, 24361, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_ME_EHCI_2, - 26246, 26905, 24265, 6411, 0, + 26342, 27001, 24361, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_ME_KT, - 26246, 26905, 23871, 0, + 26342, 27001, 23967, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_ME_HECI_3, - 26246, 26905, 24265, 6422, 0, + 26342, 27001, 24361, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_HSUART, - 26246, 27079, 7983, 0, + 26342, 27175, 8016, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_EMMC, - 26246, 23848, 0, + 26342, 23944, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_LPC, - 26246, 8958, 0, + 26342, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_P2SB, - 26246, 23813, 0, + 26342, 23909, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_PMC, - 26246, 23818, 0, + 26342, 23914, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_SMBUS_LEGACY, - 26246, 24376, 8962, 0, + 26342, 24472, 9058, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_SPI, - 26246, 17409, 0, + 26342, 17500, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_TRACE, - 26246, 23830, 8949, 0, + 26342, 23926, 9045, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_QAT, - 26246, 26876, 0, + 26342, 26972, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_QAT_VF, - 26246, 26876, 19987, 8125, 0, + 26342, 26972, 20065, 8158, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_IE_HECI_1, - 26246, 27082, 24265, 8136, 0, + 26342, 27178, 24361, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_IE_HECI_2, - 26246, 27082, 24265, 6411, 0, + 26342, 27178, 24361, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_IE_KT, - 26246, 27082, 23871, 0, + 26342, 27178, 23967, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C3K_IE_HECI_3, - 26246, 27082, 24265, 6422, 0, + 26342, 27178, 24361, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I219_LM17, - 24641, 27085, 5717, 24654, 0, + 24737, 27181, 5735, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I219_V17, - 24665, 27085, 5717, 24654, 0, + 24761, 27181, 5735, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I219_LM16, - 24641, 27090, 5717, 24654, 0, + 24737, 27186, 5735, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I219_V16, - 24665, 27090, 5717, 24654, 0, + 24761, 27186, 5735, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82840_HB, - 27095, 6953, 0, + 27191, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82840_AGP, - 27095, 8804, 0, + 27191, 8900, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82840_PCI, - 27095, 615, 0, + 27191, 615, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82845_HB, - 27101, 6953, 0, + 27197, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82845_AGP, - 27101, 8804, 0, + 27197, 8900, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5000_DMA, - 14367, 6476, 11160, 24519, 24997, 0, + 14472, 6494, 11275, 24615, 25093, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82597EX_SR, - 25284, 25733, 6225, 5909, 0, + 25380, 25829, 6243, 5927, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6SERIES_SATA_1, - 8371, 6476, 11160, 14868, 8762, 8136, 0, + 8404, 6494, 11275, 14964, 8800, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6SERIES_SATA_2, - 8371, 6476, 11160, 14868, 8762, 6411, 0, + 8404, 6494, 11275, 14964, 8800, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6SERIES_AHCI_1, - 8371, 6476, 11160, 14868, 8775, 8136, 0, + 8404, 6494, 11275, 14964, 8819, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6SERIES_AHCI_2, - 8371, 6476, 11160, 14868, 8775, 6411, 0, + 8404, 6494, 11275, 14964, 8819, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6SERIES_RAID_1, - 8371, 6476, 11160, 14868, 6450, 8136, 0, + 8404, 6494, 11275, 14964, 6468, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6SERIES_RAID_2, - 8371, 6476, 11160, 14868, 6450, 6411, 0, + 8404, 6494, 11275, 14964, 6468, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6SERIES_RAID_3, - 8371, 6476, 11160, 14868, 6450, 6422, 0, + 8404, 6494, 11275, 14964, 6468, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6SERIES_SATA_3, - 8371, 6476, 11160, 14868, 8762, 6422, 0, + 8404, 6494, 11275, 14964, 8800, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6SERIES_SATA_4, - 8371, 6476, 11160, 14868, 8762, 6786, 0, + 8404, 6494, 11275, 14964, 8800, 6804, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6SERIES_PCIE_1, - 8371, 6476, 11160, 14868, 8204, 8140, 8153, 8136, 0, + 8404, 6494, 11275, 14964, 8237, 8173, 8186, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6SERIES_PCIE_2, - 8371, 6476, 11160, 14868, 8204, 8140, 8153, 6411, 0, + 8404, 6494, 11275, 14964, 8237, 8173, 8186, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6SERIES_PCIE_3, - 8371, 6476, 11160, 14868, 8204, 8140, 8153, 6422, 0, + 8404, 6494, 11275, 14964, 8237, 8173, 8186, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6SERIES_PCIE_4, - 8371, 6476, 11160, 14868, 8204, 8140, 8153, 6786, 0, + 8404, 6494, 11275, 14964, 8237, 8173, 8186, 6804, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6SERIES_PCIE_5, - 8371, 6476, 11160, 14868, 8204, 8140, 8153, 8138, 0, + 8404, 6494, 11275, 14964, 8237, 8173, 8186, 8171, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6SERIES_PCIE_6, - 8371, 6476, 11160, 14868, 8204, 8140, 8153, 8371, 0, + 8404, 6494, 11275, 14964, 8237, 8173, 8186, 8404, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6SERIES_PCIE_7, - 8371, 6476, 11160, 14868, 8204, 8140, 8153, 8373, 0, + 8404, 6494, 11275, 14964, 8237, 8173, 8186, 8406, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6SERIES_PCIE_8, - 8371, 6476, 11160, 14868, 8204, 8140, 8153, 6811, 0, + 8404, 6494, 11275, 14964, 8237, 8173, 8186, 6829, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6SERIES_HDA, - 8371, 6476, 11160, 14868, 8230, 7054, 0, + 8404, 6494, 11275, 14964, 8263, 7072, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6SERIES_SMB, - 8371, 6476, 11160, 14868, 8962, 6455, 0, + 8404, 6494, 11275, 14964, 9058, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6SERIES_THERM, - 8371, 6476, 11160, 14868, 23913, 0, + 8404, 6494, 11275, 14964, 24009, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6SERIES_DMI, - 8371, 6476, 11160, 14868, 27107, 0, + 8404, 6494, 11275, 14964, 27203, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6SERIES_EHCI_1, - 8371, 6476, 11160, 14868, 6945, 0, + 8404, 6494, 11275, 14964, 6963, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6SERIES_EHCI_2, - 8371, 6476, 11160, 14868, 6945, 0, + 8404, 6494, 11275, 14964, 6963, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6SERIES_MEI, - 8371, 6476, 11160, 14868, 23861, 0, + 8404, 6494, 11275, 14964, 23957, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6SERIES_KT, - 8371, 6476, 11160, 14868, 23871, 0, + 8404, 6494, 11275, 14964, 23967, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_Z68_LPC, - 27115, 8958, 0, + 27211, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_P67_LPC, - 27119, 8958, 0, + 27215, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_UM67_LPC, - 27123, 8958, 0, + 27219, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_HM65_LPC, - 27128, 8958, 0, + 27224, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_H67_LPC, - 27133, 8958, 0, + 27229, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_HM67_LPC, - 27137, 8958, 0, + 27233, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_Q65_LPC, - 27142, 8958, 0, + 27238, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_QS67_LPC, - 27146, 8958, 0, + 27242, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_Q67_LPC, - 27151, 8958, 0, + 27247, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_QM67_LPC, - 27155, 8958, 0, + 27251, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_B65_LPC, - 27160, 8958, 0, + 27256, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C202_LPC, - 27164, 8958, 0, + 27260, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C204_LPC, - 27169, 8958, 0, + 27265, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C206_LPC, - 27174, 8958, 0, + 27270, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_H61_LPC, - 27179, 8958, 0, + 27275, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C600_SATA_1, - 27183, 8762, 0, + 27279, 8800, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C600_AHCI, - 27183, 8775, 0, + 27279, 8819, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C600_RAID_1, - 27183, 6450, 0, + 27279, 6468, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C600_RAID_2, - 27183, 27192, 6450, 0, + 27279, 27288, 6468, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C600_SATA_2, - 27183, 8762, 0, + 27279, 8800, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C600_PCIE_1, - 27183, 8204, 0, + 27279, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C600_PCIE_2, - 27183, 8204, 0, + 27279, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C600_PCIE_3, - 27183, 8204, 0, + 27279, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C600_PCIE_4, - 27183, 8204, 0, + 27279, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C600_PCIE_5, - 27183, 8204, 0, + 27279, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C600_PCIE_6, - 27183, 8204, 0, + 27279, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C600_PCIE_7, - 27183, 8204, 0, + 27279, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C600_PCIE_8, - 27183, 8204, 0, + 27279, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C600_HDA, - 27200, 8230, 7054, 0, + 27296, 8263, 7072, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C600_SMBUS, - 27200, 8962, 6455, 0, + 27296, 9058, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C600_THERM, - 27200, 23913, 7078, 6455, 0, + 27296, 24009, 7096, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C600_EHCI_1, - 27200, 6945, 0, + 27296, 6963, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C600_EHCI_2, - 27200, 6945, 0, + 27296, 6963, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C600_LAN, - 27200, 4540, 0, + 27296, 4540, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C600_MEI_1, - 27200, 23861, 0, + 27296, 23957, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C600_MEI_2, - 27200, 23861, 0, + 27296, 23957, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C600_KT, - 27200, 23871, 0, + 27296, 23967, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C600_VPCIE, - 27200, 19987, 8204, 0, + 27296, 20065, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C600_LPC, - 27200, 8958, 0, + 27296, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C600_SAS_1, - 27200, 6009, 6455, 0, + 27296, 6027, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C600_SAS_SATA_1, - 27200, 6009, 6455, 27205, 0, + 27296, 6027, 6473, 27301, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C600_SAS_2, - 27200, 6009, 6455, 0, + 27296, 6027, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C600_SAS_3, - 27200, 6009, 6455, 0, + 27296, 6027, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C600_SAS_4, - 27200, 6009, 6455, 0, + 27296, 6027, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C600_SAS_5, - 27200, 6009, 6455, 0, + 27296, 6027, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C600_SAS_6, - 27200, 6009, 6455, 0, + 27296, 6027, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C600_SAS_7, - 27200, 6009, 6455, 0, + 27296, 6027, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C600_SAS_8, - 27200, 6009, 6455, 0, + 27296, 6027, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C600_SAS_9, - 27200, 6009, 6455, 0, + 27296, 6027, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C600_SAS_SATA_2, - 27200, 6009, 6455, 27205, 0, + 27296, 6027, 6473, 27301, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C600_SAS_SATA_3, - 27183, 6009, 6455, 27205, 0, + 27279, 6027, 6473, 27301, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C600_SAS_10, - 27200, 6009, 6455, 0, + 27296, 6027, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C600_SAS_11, - 27200, 6009, 6455, 0, + 27296, 6027, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C600_SAS_12, - 27200, 6009, 6455, 0, + 27296, 6027, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C600_SAS_SATA_4, - 27200, 6009, 6455, 27205, 0, + 27296, 6027, 6473, 27301, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C600_SMB_0, - 27183, 6476, 8962, 6455, 0, + 27279, 6494, 9058, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C600_SMB_1, - 27212, 8962, 6455, 0, + 27308, 9058, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C600_SMB_2, - 27222, 8962, 6455, 0, + 27318, 9058, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7SER_DT_SATA_1, - 8373, 6476, 23741, 8762, 6455, 0, + 8406, 6494, 23837, 8800, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7SER_MO_SATA_1, - 8373, 6476, 23755, 8762, 6455, 0, + 8406, 6494, 23851, 8800, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7SER_DT_SATA_AHCI, - 8373, 6476, 23741, 8762, 6455, 8984, 0, + 8406, 6494, 23837, 8800, 6473, 9080, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7SER_MO_SATA_AHCI, - 8373, 6476, 23755, 8762, 6455, 8984, 0, + 8406, 6494, 23851, 8800, 6473, 9080, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7SER_DT_SATA_RAID_2, - 8373, 6476, 23741, 8762, 6455, 8991, 0, + 8406, 6494, 23837, 8800, 6473, 9087, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7SER_DT_SATA_RAID_3, - 8373, 6476, 23741, 8762, 6455, 8991, 0, + 8406, 6494, 23837, 8800, 6473, 9087, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7SER_MO_SATA_RAID, - 8373, 6476, 23755, 8762, 6455, 8991, 0, + 8406, 6494, 23851, 8800, 6473, 9087, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7SER_DT_SATA_2, - 8373, 6476, 23741, 8762, 6455, 0, + 8406, 6494, 23837, 8800, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7SER_MO_SATA_2, - 8373, 6476, 23755, 8762, 6455, 0, + 8406, 6494, 23851, 8800, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7SER_DT_SATA_RAID_1, - 8373, 6476, 23741, 8762, 6455, 8991, 0, + 8406, 6494, 23837, 8800, 6473, 9087, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7SERIES_PCIE_1, - 8373, 6476, 8204, 0, + 8406, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7SERIES_PCIE_2, - 8373, 6476, 8204, 0, + 8406, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7SERIES_PCIE_3, - 8373, 6476, 8204, 0, + 8406, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7SERIES_PCIE_4, - 8373, 6476, 8204, 0, + 8406, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7SERIES_PCIE_5, - 8373, 6476, 8204, 0, + 8406, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7SERIES_PCIE_6, - 8373, 6476, 8204, 0, + 8406, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7SERIES_PCIE_7, - 8373, 6476, 8204, 0, + 8406, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7SERIES_PCIE_8, - 8373, 6476, 8204, 0, + 8406, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7SERIES_HDA, - 8373, 6476, 8230, 7054, 0, + 8406, 6494, 8263, 7072, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7SERIES_SMB, - 8373, 6476, 8962, 6455, 0, + 8406, 6494, 9058, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7SERIES_PPB, - 8373, 6476, 8791, 6563, 0, + 8406, 6494, 8887, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7SERIES_EHCI_1, - 8373, 6476, 6945, 8727, 0, + 8406, 6494, 6963, 8760, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7SERIES_EHCI_2, - 8373, 6476, 6945, 8727, 0, + 8406, 6494, 6963, 8760, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7SERIES_XHCI, - 8373, 6476, 6945, 8233, 0, + 8406, 6494, 6963, 8266, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7SERIES_MEI_1, - 8373, 6476, 23861, 6455, 0, + 8406, 6494, 23957, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7SERIES_MEI_2, - 8373, 6476, 23861, 6455, 0, + 8406, 6494, 23957, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7SERIES_IDE_R, - 8373, 6476, 23865, 0, + 8406, 6494, 23961, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7SERIES_KT, - 8373, 6476, 23871, 0, + 8406, 6494, 23967, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_Z77_LPC, - 27227, 8958, 0, + 27323, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_Z75_LPC, - 27231, 8958, 0, + 27327, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_Q77_LPC, - 27235, 8958, 0, + 27331, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_Q75_LPC, - 27239, 8958, 0, + 27335, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_B75_LPC, - 27243, 8958, 0, + 27339, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_H77_LPC, - 27247, 8958, 0, + 27343, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C216_LPC, - 27251, 8958, 0, + 27347, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MOBILE_QM77_LPC, - 11578, 27256, 8958, 0, + 11693, 27352, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MOBILE_QS77_LPC, - 11578, 27261, 8958, 0, + 11693, 27357, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MOBILE_HM77_LPC, - 11578, 27266, 8958, 0, + 11693, 27362, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MOBILE_UM77_LPC, - 11578, 27271, 8958, 0, + 11693, 27367, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MOBILE_HM76_LPC, - 11578, 27276, 8958, 0, + 11693, 27372, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MOBILE_HM75_LPC, - 11578, 27281, 8958, 0, + 11693, 27377, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MOBILE_HM70_LPC, - 11578, 27286, 8958, 0, + 11693, 27382, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_NM70_LPC, - 27291, 8958, 0, + 27387, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C2000_TROUTER_0, - 27296, 24885, 24897, 0, + 27392, 24981, 24993, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C2000_TROUTER_1, - 27296, 24885, 24897, 0, + 27392, 24981, 24993, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C2000_TROUTER_2, - 27296, 24885, 24897, 0, + 27392, 24981, 24993, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C2000_TROUTER_3, - 27296, 24885, 24897, 0, + 27392, 24981, 24993, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C2000_TROUTER_4, - 27296, 24885, 24897, 0, + 27392, 24981, 24993, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C2000_TROUTER_5, - 27296, 24885, 24897, 0, + 27392, 24981, 24993, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C2000_TROUTER_6, - 27296, 24885, 24897, 0, + 27392, 24981, 24993, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C2000_TROUTER_7, - 27296, 24885, 24897, 0, + 27392, 24981, 24993, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C2000_TROUTER_8, - 27296, 24885, 24897, 0, + 27392, 24981, 24993, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C2000_TROUTER_9, - 27296, 24885, 24897, 0, + 27392, 24981, 24993, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C2000_TROUTER_A, - 27296, 24885, 24897, 0, + 27392, 24981, 24993, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C2000_TROUTER_B, - 27296, 24885, 24897, 0, + 27392, 24981, 24993, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C2000_TROUTER_C, - 27296, 24885, 24897, 0, + 27392, 24981, 24993, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C2000_TROUTER_D, - 27296, 24885, 24897, 0, + 27392, 24981, 24993, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C2000_TROUTER_E, - 27296, 24885, 24897, 0, + 27392, 24981, 24993, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C2000_TROUTER_F, - 27296, 24885, 24897, 0, + 27392, 24981, 24993, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C2000_PCIE_1, - 27296, 8204, 8140, 8153, 0, + 27392, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C2000_PCIE_2, - 27296, 8204, 8140, 8153, 0, + 27392, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C2000_PCIE_3, - 27296, 8204, 8140, 8153, 0, + 27392, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C2000_PCIE_4, - 27296, 8204, 8140, 8153, 0, + 27392, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C2000_RAS, - 27296, 24422, 0, + 27392, 24518, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C2000_SMBUS, - 27296, 8962, 6964, 0, + 27392, 9058, 6982, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C2000_RCEC, - 27296, 8285, 0, + 27392, 8318, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C2000_IQIA_PHYS, - 27296, 27302, 27307, 8125, 0, + 27392, 27398, 27403, 8158, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C2000_IQIA_VF, - 27296, 27302, 19987, 8125, 0, + 27392, 27398, 20065, 8158, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C2000_SATA2, - 27296, 27316, 0, + 27392, 27412, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C2000_USB, - 27296, 6945, 6964, 0, + 27392, 6963, 6982, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C2000_SATA3, - 27296, 27322, 0, + 27392, 27418, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C2000_PCU_1, - 27296, 24849, 0, + 27392, 24945, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C2000_PCU_2, - 27296, 24849, 0, + 27392, 24945, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C2000_PCU_3, - 27296, 24849, 0, + 27392, 24945, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C2000_PCU_4, - 27296, 24849, 0, + 27392, 24945, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C2000_PCU_SMBUS, - 27296, 24849, 8962, 0, + 27392, 24945, 9058, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C2000_1000KX, - 27296, 27328, 0, + 27392, 27424, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C2000_SGMII, - 27296, 27350, 0, + 27392, 27446, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C2000_DUMMYGBE, - 27296, 27366, 27381, 0, + 27392, 27462, 27477, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C2000_25GBE, - 27296, 27391, 0, + 27392, 27487, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONSC_UBOX_0, - 24530, 27408, 27417, 0, + 24626, 27504, 27513, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONSC_UBOX_1, - 24530, 27408, 27417, 0, + 24626, 27504, 27513, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONSC_UBOX_2, - 24530, 27408, 27417, 0, + 24626, 27504, 27513, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONSC_M2PCIR, - 24530, 27408, 27422, 0, + 24626, 27504, 27518, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONSC_HB, - 24530, 27408, 6953, 0, + 24626, 27504, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONSC_CBDMAR, - 24530, 27408, 27428, 0, + 24626, 27504, 27524, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONSC_MMVTD, - 24530, 27408, 27434, 0, + 24626, 27504, 27530, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONSC_RAS, - 24530, 27408, 24422, 0, + 24626, 27504, 24518, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONSC_IOAPIC, - 24530, 27408, 8945, 24759, 0, + 24626, 27504, 9041, 24855, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONSC_PCIE_1, - 24530, 27408, 8204, 0, + 24626, 27504, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONSC_PCIE_2, - 24530, 27408, 8204, 0, + 24626, 27504, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONSC_PCIE_3, - 24530, 27408, 8204, 0, + 24626, 27504, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONSC_PCIE_4, - 24530, 27408, 8204, 0, + 24626, 27504, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONSC_VTD, - 24530, 27408, 27442, 0, + 24626, 27504, 27538, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONSC_RAS_CFG, - 24530, 27408, 24422, 8020, 0, + 24626, 27504, 24518, 8053, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONSC_IOAPIC_C, - 24530, 27408, 23948, 0, + 24626, 27504, 24044, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONSC_IMC_1, - 24530, 27408, 24799, 0, + 24626, 27504, 24895, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONSC_IMC_2, - 24530, 27408, 24799, 0, + 24626, 27504, 24895, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONSC_IMC_3, - 24530, 27408, 24799, 0, + 24626, 27504, 24895, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONSC_IMC_4, - 24530, 27408, 24799, 0, + 24626, 27504, 24895, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONSC_IMC_5, - 24530, 27408, 24799, 0, + 24626, 27504, 24895, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONSC_LMC_1, - 24530, 27408, 26762, 0, + 24626, 27504, 26858, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONSC_LMSC_1, - 24530, 27408, 27447, 0, + 24626, 27504, 27543, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONSC_LMDPC_1, - 24530, 27408, 27451, 0, + 24626, 27504, 27547, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONSC_DECSC_1, - 24530, 27408, 27456, 0, + 24626, 27504, 27552, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONSC_LMC_2, - 24530, 27408, 26762, 0, + 24626, 27504, 26858, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONSC_LMSC_2, - 24530, 27408, 27447, 0, + 24626, 27504, 27543, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONSC_LMDPC_2, - 24530, 27408, 27451, 0, + 24626, 27504, 27547, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONSC_M3KTI_1, - 24530, 27408, 27461, 0, + 24626, 27504, 27557, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONSC_M3KTI_2, - 24530, 27408, 27461, 0, + 24626, 27504, 27557, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONSC_M3KTI_3, - 24530, 27408, 27461, 0, + 24626, 27504, 27557, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONSC_CHA_1, - 24530, 27408, 27467, 0, + 24626, 27504, 27563, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONSC_CHA_2, - 24530, 27408, 27467, 0, + 24626, 27504, 27563, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONSC_CHA_3, - 24530, 27408, 27467, 0, + 24626, 27504, 27563, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONSC_CHA_4, - 24530, 27408, 27467, 0, + 24626, 27504, 27563, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONSC_KTI, - 24530, 27408, 5611, 0, + 24626, 27504, 5629, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONSC_UPIR, - 24530, 27408, 27471, 0, + 24626, 27504, 27567, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONSC_IMC, - 24530, 27408, 24799, 0, + 24626, 27504, 24895, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONSC_DDRIO_1, - 24530, 27408, 24821, 0, + 24626, 27504, 24917, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONSC_DDRIO_2, - 24530, 27408, 24821, 0, + 24626, 27504, 24917, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONSC_DDRIO_3, - 24530, 27408, 24821, 0, + 24626, 27504, 24917, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONSC_DDRIO_4, - 24530, 27408, 24821, 0, + 24626, 27504, 24917, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONSC_DDRIO_5, - 24530, 27408, 24821, 0, + 24626, 27504, 24917, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONSC_DDRIO_6, - 24530, 27408, 24821, 0, + 24626, 27504, 24917, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONSC_DDRIO_7, - 24530, 27408, 24821, 0, + 24626, 27504, 24917, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONSC_PCU_1, - 24530, 27408, 24849, 0, + 24626, 27504, 24945, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONSC_PCU_2, - 24530, 27408, 24849, 0, + 24626, 27504, 24945, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONSC_PCU_3, - 24530, 27408, 24849, 0, + 24626, 27504, 24945, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONSC_PCU_4, - 24530, 27408, 24849, 0, + 24626, 27504, 24945, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONSC_PCU_5, - 24530, 27408, 24849, 0, + 24626, 27504, 24945, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONSC_PCU_6, - 24530, 27408, 24849, 0, + 24626, 27504, 24945, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONSC_PCU_7, - 24530, 27408, 24849, 0, + 24626, 27504, 24945, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONSC_M2PCIE, - 24530, 27408, 27475, 0, + 24626, 27504, 27571, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONSC_CHA_5, - 24530, 27408, 27467, 0, + 24626, 27504, 27563, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONSC_CHA_6, - 24530, 27408, 27467, 0, + 24626, 27504, 27563, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_BSW_HB, - 27482, 27491, 24885, 24897, 0, + 27578, 27587, 24981, 24993, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_BSW_HDA, - 27482, 8230, 7054, 0, + 27578, 8263, 7072, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_BSW_SIO_DMA_2, - 27482, 27495, 24519, 0, + 27578, 27591, 24615, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_Z8K_LPIO1_PWM_1, - 24549, 27499, 27505, 27511, 0, + 24645, 27595, 27601, 27607, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_Z8K_LPIO1_PWM_2, - 24549, 27499, 27505, 27516, 0, + 24645, 27595, 27601, 27612, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_BSW_SIO_HSUART_1, - 27482, 14833, 0, + 27578, 14929, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_BSW_SIO_HSUART_2, - 27482, 14833, 0, + 27578, 14929, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_Z8K_LPIO1_SPI_1, - 24549, 27499, 27505, 27521, 0, + 24645, 27595, 27601, 27617, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_Z8K_LPIO1_SPI_2, - 24549, 27499, 27505, 27526, 0, + 24645, 27595, 27601, 27622, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_BSW_PCU_SMB, - 27482, 24849, 8962, 0, + 27578, 24945, 9058, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_BSW_SCC_MMC, - 27482, 23429, 27531, 8153, 0, + 27578, 23525, 27627, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_BSW_SCC_SDIO, - 27482, 23429, 27535, 8153, 0, + 27578, 23525, 27631, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_BSW_SCC_SD, - 27482, 23429, 9017, 8153, 0, + 27578, 23525, 9113, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_BSW_TXE, - 27482, 27540, 0, + 27578, 27636, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_BSW_PCU_LPC, - 27482, 24849, 8958, 0, + 27578, 24945, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_BSW_AHCI, - 27482, 8775, 0, + 27578, 8819, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_BSW_LPE_AUDIO, - 27482, 15155, 3740, 24997, 7054, 0, + 27578, 15251, 3740, 25093, 7072, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_Z8K_LPIO1_SPI_3, - 24549, 27499, 27505, 27544, 0, + 24645, 27595, 27601, 27640, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CHV_IGD_1, - 8230, 1716, 8771, 0, + 8263, 1716, 8836, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CHV_IGD_2, - 8230, 1716, 0, + 8263, 1716, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CHV_IGD_3, - 8230, 1716, 0, + 8263, 1716, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CHV_IGD_4, - 8230, 1716, 0, + 8263, 1716, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_BSW_XHCI, - 27482, 8233, 0, + 27578, 8266, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_Z8K_USBOTG, - 24549, 27499, 6945, 27549, 0, + 24645, 27595, 6963, 27645, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_BSW_ISP_CAMERA, - 27482, 27555, 25004, 0, + 27578, 27651, 25100, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_BSW_SIO_DMA_1, - 27482, 27495, 24519, 0, + 27578, 27591, 24615, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_BSW_SIO_I2C_1, - 27482, 27495, 17453, 0, + 27578, 27591, 17544, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_BSW_SIO_I2C_2, - 27482, 27495, 17453, 0, + 27578, 27591, 17544, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_BSW_SIO_I2C_3, - 27482, 27495, 17453, 0, + 27578, 27591, 17544, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_BSW_SIO_I2C_4, - 27482, 27495, 17453, 0, + 27578, 27591, 17544, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_BSW_SIO_I2C_5, - 27482, 27495, 17453, 0, + 27578, 27591, 17544, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_BSW_SIO_I2C_6, - 27482, 27495, 17453, 0, + 27578, 27591, 17544, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_BSW_SIO_I2C_7, - 27482, 27495, 17453, 0, + 27578, 27591, 17544, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_BSW_PCIE_1, - 27482, 8204, 0, + 27578, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_BSW_PCIE_2, - 27482, 8204, 0, + 27578, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_BSW_PCIE_3, - 27482, 8204, 0, + 27578, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_BSW_PCIE_4, - 27482, 8204, 0, + 27578, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_Z8K_IOSF2OCP, - 24549, 27499, 27559, 0, + 24645, 27595, 27655, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_BSW_PUINT, - 27482, 3740, 7078, 0, + 27578, 3740, 7096, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_DH89XXCC_LPC, - 24031, 8958, 6455, 0, + 24127, 9054, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_DH89XXCC_SATA_1, - 24031, 8762, 6455, 0, + 24127, 8800, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_DH89XXCC_SATA_2, - 24031, 8762, 6455, 0, + 24127, 8800, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_DH89XXCC_SMB, - 24031, 8962, 6953, 6455, 0, + 24127, 9058, 6971, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_DH89XXCC_THERMAL, - 24031, 23913, 27568, 0, + 24127, 24009, 27664, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_DH89XXCC_USB_1, - 24031, 6945, 8727, 0, + 24127, 6963, 8760, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_DH89XXCC_USB_2, - 24031, 6945, 8727, 0, + 24127, 6963, 8760, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_DH89XXCC_PCIE_1_1, - 24031, 8204, 8140, 8153, 0, + 24127, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_DH89XXCC_PCIE_1_2, - 24031, 8204, 8140, 8153, 0, + 24127, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_DH89XXCC_PCIE_2_1, - 24031, 8204, 8140, 8153, 0, + 24127, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_DH89XXCC_PCIE_2_2, - 24031, 8204, 8140, 8153, 0, + 24127, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_DH89XXCC_PCIE_3_1, - 24031, 8204, 8140, 8153, 0, + 24127, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_DH89XXCC_PCIE_3_2, - 24031, 8204, 8140, 8153, 0, + 24127, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_DH89XXCC_PCIE_4_1, - 24031, 8204, 8140, 8153, 0, + 24127, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_DH89XXCC_PCIE_4_2, - 24031, 8204, 8140, 8153, 0, + 24127, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_DH89XXCC_WDT, - 24031, 23547, 20920, 3296, 23679, 17425, 0, + 24127, 23643, 21016, 3296, 23775, 17516, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_DH89XXCC_MEI_1, - 24031, 23861, 6455, 0, + 24127, 23957, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_DH89XXCC_MEI_2, - 24031, 23861, 6455, 0, + 24127, 23957, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_DH89XXCL_LPC, - 24061, 8958, 6455, 0, + 24157, 9054, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_DH89XXCL_SATA_1, - 24061, 8762, 6455, 0, + 24157, 8800, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_DH89XXCL_SATA_2, - 24061, 8762, 6455, 0, + 24157, 8800, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_DH89XXCL_SMB, - 24061, 8962, 6953, 6455, 0, + 24157, 9058, 6971, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_DH89XXCL_THERMAL, - 24061, 23913, 27568, 0, + 24157, 24009, 27664, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_DH89XXCL_USB_1, - 24061, 6945, 8727, 0, + 24157, 6963, 8760, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_DH89XXCL_USB_2, - 24061, 6945, 8727, 0, + 24157, 6963, 8760, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_DH89XXCL_PCIE_1_1, - 24061, 8204, 8140, 8153, 0, + 24157, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_DH89XXCL_PCIE_1_2, - 24061, 8204, 8140, 8153, 0, + 24157, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_DH89XXCL_PCIE_2_1, - 24061, 8204, 8140, 8153, 0, + 24157, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_DH89XXCL_PCIE_2_2, - 24061, 8204, 8140, 8153, 0, + 24157, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_DH89XXCL_PCIE_3_1, - 24061, 8204, 8140, 8153, 0, + 24157, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_DH89XXCL_PCIE_3_2, - 24061, 8204, 8140, 8153, 0, + 24157, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_DH89XXCL_PCIE_4_1, - 24061, 8204, 8140, 8153, 0, + 24157, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_DH89XXCL_PCIE_4_2, - 24061, 8204, 8140, 8153, 0, + 24157, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_DH89XXCL_WDT, - 24061, 23547, 20920, 3296, 23679, 17425, 0, + 24157, 23643, 21016, 3296, 23775, 17516, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_DH89XXCL_MEI_1, - 24061, 23861, 6455, 0, + 24157, 23957, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_DH89XXCL_MEI_2, - 24061, 23861, 6455, 0, + 24157, 23957, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801AA_LPC, - 27578, 8958, 3018, 6563, 0, + 27674, 9054, 3018, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801AA_IDE, - 27578, 6626, 6455, 0, + 27674, 6644, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801AA_USB, - 27578, 6945, 6455, 0, + 27674, 6963, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801AA_SMB, - 27578, 8962, 6455, 0, + 27674, 9058, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801AA_ACA, - 27578, 27586, 7054, 6455, 0, + 27674, 27682, 7072, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801AA_ACM, - 27578, 27586, 615, 5764, 0, + 27674, 27682, 615, 5782, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801AA_HPB, - 27578, 27592, 6563, 0, + 27674, 27688, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801AB_LPC, - 27600, 8958, 3018, 6563, 0, + 27696, 9054, 3018, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801AB_IDE, - 27600, 6626, 6455, 0, + 27696, 6644, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801AB_USB, - 27600, 6945, 6455, 0, + 27696, 6963, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801AB_SMB, - 27600, 8962, 6455, 0, + 27696, 9058, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801AB_ACA, - 27600, 27586, 7054, 6455, 0, + 27696, 27682, 7072, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801AB_ACM, - 27600, 27586, 615, 5764, 0, + 27696, 27682, 615, 5782, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801AB_HPB, - 27600, 27592, 6563, 0, + 27696, 27688, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801BA_LPC, - 27608, 8958, 3018, 6563, 0, + 27704, 9054, 3018, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801BA_USB1, - 27608, 6945, 6455, 0, + 27704, 6963, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801BA_SMB, - 27608, 8962, 6455, 0, + 27704, 9058, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801BA_USB2, - 27608, 6945, 6455, 0, + 27704, 6963, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801BA_ACA, - 27608, 27586, 7054, 6455, 0, + 27704, 27682, 7072, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801BA_ACM, - 27608, 27586, 615, 5764, 0, + 27704, 27682, 615, 5782, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801BAM_HPB, - 27616, 27592, 6563, 0, + 27712, 27688, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801BA_LAN, - 27608, 4540, 6455, 0, + 27704, 4540, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801BAM_IDE, - 27616, 6626, 6455, 0, + 27712, 6644, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801BA_IDE, - 27608, 6626, 6455, 0, + 27704, 6644, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801BAM_LPC, - 27616, 8958, 3018, 6563, 0, + 27712, 9054, 3018, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801BA_HPB, - 27608, 27592, 6563, 0, + 27704, 27688, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801E_LPC, - 27625, 8958, 3018, 6563, 0, + 27721, 9054, 3018, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801E_SMB, - 27625, 8962, 6455, 0, + 27721, 9058, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801E_LAN_1, - 27625, 4540, 6455, 0, + 27721, 4540, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801E_LAN_2, - 27625, 4540, 6455, 0, + 27721, 4540, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801CA_LPC, - 27632, 8958, 3018, 6563, 0, + 27728, 9054, 3018, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801CA_USB_1, - 27632, 6945, 6455, 0, + 27728, 6963, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801CA_SMB, - 27632, 8962, 6455, 0, + 27728, 9058, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801CA_USB_2, - 27632, 6945, 6455, 0, + 27728, 6963, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801CA_AC, - 27632, 10371, 7054, 6455, 0, + 27728, 10492, 7072, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801CA_MOD, - 27632, 10371, 5764, 6455, 0, + 27728, 10492, 5782, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801CA_USBC, - 27632, 6945, 6455, 0, + 27728, 6963, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801CA_IDE_1, - 27632, 6626, 6455, 0, + 27728, 6644, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801CA_IDE_2, - 27632, 6626, 6455, 0, + 27728, 6644, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801CAM_LPC, - 27640, 8958, 3018, 6563, 0, + 27736, 9054, 3018, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801DB_LPC, - 27649, 8958, 3018, 6563, 0, + 27745, 9054, 3018, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801DB_USB_1, - 27649, 6945, 27657, 6455, 0, + 27745, 6963, 27753, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801DB_SMB, - 27649, 8962, 6455, 0, + 27745, 9058, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801DB_USB_2, - 27649, 6945, 27657, 6455, 0, + 27745, 6963, 27753, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801DB_AC, - 27649, 8872, 7054, 6455, 0, + 27745, 8968, 7072, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801DB_MOD, - 27649, 8872, 5764, 6455, 0, + 27745, 8968, 5782, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801DB_USB_3, - 27649, 6945, 27657, 6455, 0, + 27745, 6963, 27753, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801DBM_IDE, - 27662, 6626, 6455, 0, + 27758, 6644, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801DB_IDE, - 27649, 6626, 6455, 27671, 0, + 27745, 6644, 6473, 27767, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801DBM_LPC, - 27649, 8958, 3018, 6563, 0, + 27745, 9054, 3018, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801DB_USBC, - 27649, 6945, 8727, 6455, 0, + 27745, 6963, 8760, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801EB_LPC, - 27686, 8958, 3018, 6563, 0, + 27782, 9054, 3018, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801EB_SATA, - 27686, 14833, 6446, 6455, 0, + 27782, 14929, 6464, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801EB_USB_0, - 25349, 6945, 27657, 6455, 0, + 25445, 6963, 27753, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801EB_SMB, - 25349, 8962, 6455, 0, + 25445, 9058, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801EB_USB_1, - 25349, 6945, 27657, 6455, 0, + 25445, 6963, 27753, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801EB_AC, - 25349, 10371, 7054, 6455, 0, + 25445, 10492, 7072, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801EB_MOD, - 25349, 10371, 5764, 6455, 0, + 25445, 10492, 5782, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801EB_USB_2, - 25349, 6945, 27657, 6455, 0, + 25445, 6963, 27753, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801EB_IDE, - 25349, 6626, 6455, 0, + 25445, 6644, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801EB_EHCI, - 25349, 6945, 8727, 6455, 0, + 25445, 6963, 8760, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801EB_USB_3, - 25349, 6945, 27657, 6455, 0, + 25445, 6963, 27753, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801ER_SATA, - 27694, 14833, 6446, 6455, 0, + 27790, 14929, 6464, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_WIFI_LINK_8260_1, - 11247, 24324, 4761, 24329, 27702, 0, + 11362, 24420, 4761, 24425, 27798, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_WIFI_LINK_8260_2, - 11247, 24324, 4761, 24329, 27702, 0, + 11362, 24420, 4761, 24425, 27798, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_WIFI_LINK_4165_1, - 11247, 24324, 4761, 24329, 27707, 0, + 11362, 24420, 4761, 24425, 27803, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_WIFI_LINK_4165_2, - 11247, 24324, 4761, 24329, 27707, 0, + 11362, 24420, 4761, 24425, 27803, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_WIFI_LINK_3168, - 11247, 24324, 4761, 24329, 27712, 0, + 11362, 24420, 4761, 24425, 27808, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_WIFI_LINK_8265, - 11247, 24324, 4761, 24329, 27717, 0, + 11362, 24420, 4761, 24425, 27813, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82820_MCH, - 27722, 27728, 27732, 0, + 27818, 27824, 27828, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82820_AGP, - 27722, 8804, 0, + 27818, 8900, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_WIFI_LINK_9260, - 4761, 24329, 27741, 0, + 4761, 24425, 27837, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82850_HB, - 27746, 6953, 0, + 27842, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82860_HB, - 27752, 6953, 0, + 27848, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82850_AGP, - 27758, 8804, 0, + 27854, 8900, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82860_PCI1, - 27752, 8791, 0, + 27848, 8887, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82860_PCI2, - 27752, 8791, 0, + 27848, 8887, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82860_PCI3, - 27752, 8791, 0, + 27848, 8887, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82860_PCI4, - 27752, 8791, 0, + 27848, 8887, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E7500_HB, - 27770, 27728, 6953, 0, + 27866, 27824, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E7500_DRAM, - 27770, 27728, 8046, 6455, 0, + 27866, 27824, 8079, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E7500_HI_B1, - 27770, 27728, 27776, 27781, 8136, 0, + 27866, 27824, 27872, 27877, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E7500_HI_B2, - 27770, 27728, 27776, 27781, 6411, 0, + 27866, 27824, 27872, 27877, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E7500_HI_C1, - 27770, 27728, 27786, 27781, 8136, 0, + 27866, 27824, 27882, 27877, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E7500_HI_C2, - 27770, 27728, 27786, 27781, 6411, 0, + 27866, 27824, 27882, 27877, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E7500_HI_D1, - 27770, 27728, 27791, 27781, 8136, 0, + 27866, 27824, 27887, 27877, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E7500_HI_D2, - 27770, 27728, 27791, 27781, 6411, 0, + 27866, 27824, 27887, 27877, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E7501_HB, - 27796, 27728, 6953, 0, + 27892, 27824, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E7505_HB, - 27802, 27728, 6953, 0, + 27898, 27824, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E7505_RAS, - 27802, 27728, 24422, 6455, 0, + 27898, 27824, 24518, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E7505_AGP, - 27802, 27728, 27808, 6563, 0, + 27898, 27824, 27904, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E7505_HI_B1, - 27802, 27728, 27776, 8791, 6563, 0, + 27898, 27824, 27872, 8887, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E7505_HI_B2, - 27802, 27728, 27776, 8791, 24815, 27817, 0, + 27898, 27824, 27872, 8887, 24911, 27913, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82845G_DRAM, - 27827, 8046, 6455, 2173, 27837, 27846, 6563, 0, + 27923, 8079, 6473, 2173, 27933, 27942, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82845G_AGP, - 27827, 27808, 6563, 0, + 27923, 27904, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82845G_IGD, - 27827, 692, 1716, 2418, 0, + 27923, 692, 1716, 2418, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82865_HB, - 27850, 6953, 0, + 27946, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82865_AGP, - 27850, 8804, 0, + 27946, 8900, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82865_IGD, - 27856, 692, 1716, 2418, 0, + 27952, 692, 1716, 2418, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801EB_HPB, - 27686, 27592, 6563, 0, + 27782, 27688, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82875P_HB, - 27863, 6953, 0, + 27959, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82875P_AGP, - 27863, 8804, 0, + 27959, 8900, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82875P_CSA, - 27863, 27870, 6563, 0, + 27959, 27966, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82915G_HB, - 27878, 6953, 0, + 27974, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82915G_EX, - 27878, 615, 4320, 6563, 0, + 27974, 615, 4320, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82915G_IGD, - 27890, 692, 1716, 2418, 0, + 27986, 692, 1716, 2418, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82925X_HB, - 27900, 6953, 0, + 27996, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82925X_EX, - 27900, 615, 4320, 6563, 0, + 27996, 615, 4320, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E7221_HB, - 27907, 6953, 6563, 0, + 28003, 6971, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E7221_IGD, - 27907, 692, 1716, 2418, 0, + 28003, 692, 1716, 2418, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82915GM_HB, - 27913, 6953, 6563, 0, + 28009, 6971, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82915GM_EX, - 27937, 615, 4320, 6563, 0, + 28033, 615, 4320, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82915GM_IGD, - 27948, 692, 1716, 2418, 0, + 28044, 692, 1716, 2418, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6300ESB_LPC, - 27969, 8958, 3018, 6563, 0, + 28065, 9054, 3018, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6300ESB_IDE, - 27969, 6626, 6455, 0, + 28065, 6644, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6300ESB_SATA, - 27969, 8762, 6455, 0, + 28065, 8800, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6300ESB_SMB, - 27969, 8962, 6455, 0, + 28065, 9058, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6300ESB_ACA, - 27969, 10371, 7054, 6455, 0, + 28065, 10492, 7072, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6300ESB_ACM, - 27969, 10371, 5764, 6455, 0, + 28065, 10492, 5782, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6300ESB_USB_0, - 27969, 6945, 27657, 6455, 0, + 28065, 6963, 27753, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6300ESB_USB_1, - 27969, 6945, 27657, 6455, 0, + 28065, 6963, 27753, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6300ESB_WDT, - 27969, 23547, 20920, 0, + 28065, 23643, 21016, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6300ESB_APIC, - 27969, 576, 17390, 6455, 0, + 28065, 576, 17481, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6300ESB_EHCI, - 27969, 6945, 8727, 6455, 0, + 28065, 6963, 8760, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6300ESB_PCIX, - 27969, 8885, 6563, 0, + 28065, 8981, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6300ESB_RAID, - 27969, 8762, 6450, 6455, 0, + 28065, 8800, 6468, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5000X_MCH, - 27977, 4504, 6455, 8949, 0, + 28073, 4504, 6473, 9045, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5000Z_HB, - 27983, 27989, 0, + 28079, 28085, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5000V_HB, - 27993, 27989, 0, + 28089, 28085, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5000P_HB, - 27999, 27989, 0, + 28095, 28085, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5000_PCIE_1, - 14367, 6476, 11160, 615, 4320, 24546, 8153, 6411, 0, + 14472, 6494, 11275, 615, 4320, 24642, 8186, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5000_PCIE_2, - 14367, 6476, 11160, 615, 4320, 24546, 8153, 6422, 0, + 14472, 6494, 11275, 615, 4320, 24642, 8186, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5000_PCIE_3, - 14367, 6476, 11160, 615, 4320, 24546, 8153, 6786, 0, + 14472, 6494, 11275, 615, 4320, 24642, 8186, 6804, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5000_PCIE_4, - 14367, 6476, 11160, 615, 4320, 24546, 8153, 8138, 0, + 14472, 6494, 11275, 615, 4320, 24642, 8186, 8171, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5000_PCIE_5, - 14367, 6476, 11160, 615, 4320, 24546, 8153, 8371, 0, + 14472, 6494, 11275, 615, 4320, 24642, 8186, 8404, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5000_PCIE_6, - 14367, 6476, 11160, 615, 4320, 24546, 8153, 8373, 0, + 14472, 6494, 11275, 615, 4320, 24642, 8186, 8406, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5000_FSB_REG, - 14367, 6476, 11160, 28005, 28009, 0, + 14472, 6494, 11275, 28101, 28105, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5000_RESERVED_1, - 14367, 6476, 11160, 8252, 28009, 0, + 14472, 6494, 11275, 8285, 28105, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5000_RESERVED_2, - 14367, 6476, 11160, 8252, 28009, 0, + 14472, 6494, 11275, 8285, 28105, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5000_FBD_1, - 14367, 6476, 11160, 28019, 28009, 0, + 14472, 6494, 11275, 28115, 28105, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5000_FBD_2, - 14367, 6476, 11160, 28019, 28009, 0, + 14472, 6494, 11275, 28115, 28105, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5000_PCIE_7, - 14367, 6476, 11160, 615, 4320, 24527, 8153, 28023, 0, + 14472, 6494, 11275, 615, 4320, 24623, 8186, 28119, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5000_PCIE_8, - 14367, 6476, 11160, 615, 4320, 24527, 8153, 28027, 0, + 14472, 6494, 11275, 615, 4320, 24623, 8186, 28123, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5000_PCIE_9, - 14367, 6476, 11160, 615, 4320, 24527, 8153, 28031, 0, + 14472, 6494, 11275, 615, 4320, 24623, 8186, 28127, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5000X_PCIE, - 27977, 615, 4320, 24523, 8153, 28035, 0, + 28073, 615, 4320, 24619, 8186, 28131, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801FB_LPC, - 25369, 8958, 3018, 6563, 0, + 25465, 9054, 3018, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801FBM_LPC, - 28039, 28048, 8958, 3018, 6563, 0, + 28135, 28144, 9054, 3018, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801FB_SATA, - 25369, 14833, 6446, 6455, 0, + 25465, 14929, 6464, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801FR_SATA, - 28054, 14833, 6446, 6455, 0, + 28150, 14929, 6464, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801FBM_SATA, - 28039, 14833, 6446, 6455, 0, + 28135, 14929, 6464, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801FB_USB_0, - 28062, 6945, 27657, 6455, 0, + 28158, 6963, 27753, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801FB_USB_1, - 28062, 6945, 27657, 6455, 0, + 28158, 6963, 27753, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801FB_USB_2, - 28062, 6945, 27657, 6455, 0, + 28158, 6963, 27753, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801FB_USB_3, - 28062, 6945, 27657, 6455, 0, + 28158, 6963, 27753, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801FB_EHCI, - 28062, 6945, 8727, 6455, 0, + 28158, 6963, 8760, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801FB_EXP_0, - 28062, 615, 4320, 8153, 23971, 0, + 28158, 615, 4320, 8186, 24067, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801FB_EXP_1, - 28062, 615, 4320, 8153, 23974, 0, + 28158, 615, 4320, 8186, 24070, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801FB_EXP_2, - 28062, 615, 4320, 8153, 28073, 0, + 28158, 615, 4320, 8186, 28169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801FB_HDA, - 28062, 28076, 28081, 7054, 6455, 0, + 28158, 28172, 28177, 7072, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801FB_SMB, - 28062, 8962, 6455, 0, + 28158, 9058, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801FB_LAN, - 25369, 4540, 6455, 0, + 25465, 4540, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801FB_ACM, - 28062, 10371, 5764, 6455, 0, + 28158, 10492, 5782, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801FB_AC, - 28062, 10371, 7054, 6455, 0, + 28158, 10492, 7072, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801FB_IDE, - 28062, 6626, 6455, 0, + 28158, 6644, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_63XXESB_LPC, - 28092, 8958, 3018, 6563, 0, + 28188, 9054, 3018, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_63XXESB_SATA, - 28092, 14833, 6446, 6455, 0, + 28188, 14929, 6464, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_63XXESB_SATA_AHCI, - 28092, 8775, 14833, 6446, 6455, 0, + 28188, 8819, 14929, 6464, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_63XXESB_USB_0, - 28092, 6945, 27657, 6455, 0, + 28188, 6963, 27753, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_63XXESB_USB_1, - 28092, 6945, 27657, 6455, 0, + 28188, 6963, 27753, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_63XXESB_USB_2, - 28092, 6945, 27657, 6455, 0, + 28188, 6963, 27753, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_63XXESB_USB_3, - 28092, 6945, 27657, 6455, 0, + 28188, 6963, 27753, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_63XXESB_EHCI, - 28092, 6945, 8727, 6455, 0, + 28188, 6963, 8760, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_63XXESB_EXP_1, - 28092, 615, 4320, 8153, 23974, 0, + 28188, 615, 4320, 8186, 24070, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_63XXESB_EXP_2, - 28092, 615, 4320, 8153, 28073, 0, + 28188, 615, 4320, 8186, 28169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_63XXESB_EXP_3, - 28092, 615, 4320, 8153, 28100, 0, + 28188, 615, 4320, 8186, 28196, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_63XXESB_EXP_4, - 28092, 615, 4320, 8153, 28103, 0, + 28188, 615, 4320, 8186, 28199, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_63XXESB_ACA, - 28092, 10371, 7054, 6455, 0, + 28188, 10492, 7072, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_63XXESB_HDA, - 28092, 28076, 28081, 7054, 6455, 0, + 28188, 28172, 28177, 7072, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_63XXESB_SMB, - 28092, 8962, 6455, 0, + 28188, 9058, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_63XXESB_IDE, - 28092, 6626, 6455, 0, + 28188, 6644, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SNR_DLB, - 24394, 3961, 28106, 28110, 0, + 24490, 3961, 28202, 28206, 0, + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_WIFI7, + 28210, 8406, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82945P_MCH, - 28114, 4504, 6455, 8949, 0, + 28216, 4504, 6473, 9045, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82945P_EXP, - 28114, 615, 4320, 6563, 0, + 28216, 615, 4320, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82945P_IGD, - 28114, 692, 1716, 2418, 0, + 28216, 692, 1716, 2418, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82955X_HB, - 28123, 6953, 0, + 28225, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82955X_EXP, - 28123, 615, 4320, 6563, 0, + 28225, 615, 4320, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E7230_HB, - 28130, 6953, 0, + 28232, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E7230_EXP, - 28130, 615, 4320, 6563, 0, + 28232, 615, 4320, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82975X_EXP_2, - 28136, 615, 4320, 6563, 0, + 28238, 615, 4320, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82975X_HB, - 28136, 6953, 0, + 28238, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82975X_EXP, - 28136, 615, 4320, 6563, 0, + 28238, 615, 4320, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82915G_IGDC, - 27890, 28143, 19624, 0, + 27986, 28245, 19702, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82915GM_IGDC, - 28147, 28143, 19624, 0, + 28249, 28245, 19702, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82945GM_HB, - 28159, 6953, 6563, 0, + 28261, 6971, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82945GM_IGD, - 28159, 692, 1716, 2418, 0, + 28261, 692, 1716, 2418, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82945GM_IGD_1, - 28159, 692, 1716, 2418, 0, + 28261, 692, 1716, 2418, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82945GME_HB, - 28174, 6953, 6563, 0, + 28276, 6971, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82945GME_IGD, - 28174, 692, 1716, 2418, 0, + 28276, 692, 1716, 2418, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801GH_LPC, - 28183, 8958, 3018, 6563, 0, + 28285, 9054, 3018, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801G_LPC, - 28191, 8958, 3018, 6563, 0, + 28293, 9054, 3018, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801GBM_LPC, - 28202, 8958, 3018, 6563, 0, + 28304, 9054, 3018, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_NM10_LPC, - 28211, 14868, 8958, 3018, 6563, 0, + 28313, 14964, 9054, 3018, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801GHM_LPC, - 28216, 8958, 3018, 6563, 0, + 28318, 9054, 3018, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801G_SATA, - 28191, 8762, 6455, 0, + 28293, 8800, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801G_SATA_AHCI, - 28191, 8775, 8762, 6455, 0, + 28293, 8819, 8800, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801G_SATA_RAID, - 28191, 6450, 8762, 6455, 0, + 28293, 6468, 8800, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801GBM_SATA, - 28225, 8762, 6455, 0, + 28327, 8800, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801GBM_AHCI, - 28202, 8775, 8762, 6455, 0, + 28304, 8819, 8800, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801GHM_RAID, - 28216, 8762, 6450, 6455, 0, + 28318, 8800, 6468, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801G_USB_1, - 28191, 6945, 27657, 6455, 0, + 28293, 6963, 27753, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801G_USB_2, - 28191, 6945, 27657, 6455, 0, + 28293, 6963, 27753, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801G_USB_3, - 28191, 6945, 27657, 6455, 0, + 28293, 6963, 27753, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801G_USB_4, - 28191, 6945, 27657, 6455, 0, + 28293, 6963, 27753, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801G_EHCI, - 28191, 6945, 8727, 6455, 0, + 28293, 6963, 8760, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801G_EXP_1, - 28191, 615, 4320, 8153, 23974, 0, + 28293, 615, 4320, 8186, 24070, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801G_EXP_2, - 28191, 615, 4320, 8153, 28073, 0, + 28293, 615, 4320, 8186, 28169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801G_EXP_3, - 28191, 615, 4320, 8153, 28100, 0, + 28293, 615, 4320, 8186, 28196, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801G_EXP_4, - 28191, 615, 4320, 8153, 28103, 0, + 28293, 615, 4320, 8186, 28199, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801G_HDA, - 28191, 28076, 28081, 7054, 6455, 0, + 28293, 28172, 28177, 7072, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801G_SMB, - 28191, 8962, 6455, 0, + 28293, 9058, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801G_LAN, - 28191, 4540, 6455, 0, + 28293, 4540, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801G_ACM, - 28191, 10371, 5764, 6455, 0, + 28293, 10492, 5782, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801G_ACA, - 28191, 10371, 7054, 6455, 0, + 28293, 10492, 7072, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801G_IDE, - 28191, 6626, 6455, 0, + 28293, 6644, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801G_EXP_5, - 28191, 615, 4320, 8153, 28238, 0, + 28293, 615, 4320, 8186, 28340, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801G_EXP_6, - 28191, 615, 4320, 8153, 28241, 0, + 28293, 615, 4320, 8186, 28343, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801H_LPC, - 28244, 8958, 3018, 6563, 0, + 28346, 9054, 3018, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801HEM_LPC, - 28251, 8958, 3018, 6563, 0, + 28353, 9054, 3018, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801HH_LPC, - 28260, 8958, 3018, 6563, 0, + 28362, 9054, 3018, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801HO_LPC, - 28268, 8958, 3018, 6563, 0, + 28370, 9054, 3018, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801HBM_LPC, - 28276, 8958, 3018, 6563, 0, + 28378, 9054, 3018, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801H_SATA_1, - 28244, 8762, 6455, 0, + 28346, 8800, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801H_SATA_AHCI6, - 28244, 8775, 8762, 6455, 6156, 8371, 28285, 0, + 28346, 8819, 8800, 6473, 6174, 8404, 28387, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801H_SATA_RAID, - 28291, 6450, 8762, 6455, 0, + 28393, 6468, 8800, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_SSATA_RAID_2, - 28324, 28329, 6455, 8991, 0, + 28426, 28431, 6473, 9087, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801H_SATA_AHCI4, - 28244, 8775, 8762, 6455, 6156, 6786, 28285, 0, + 28346, 8819, 8800, 6473, 6174, 6804, 28387, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801H_SATA_2, - 28244, 8762, 6455, 0, + 28346, 8800, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C610_SATA_RAID_3, - 28335, 8762, 6455, 8991, 0, + 28437, 8800, 6473, 9087, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C610_SSATA_RAID_2, - 28356, 28329, 6455, 8991, 0, + 28458, 28431, 6473, 9087, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801HEM_SATA, - 28251, 8762, 6455, 0, + 28353, 8800, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801HBM_SATA_AHCI, - 28276, 8775, 8762, 6455, 0, + 28378, 8819, 8800, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801HBM_SATA_RAID, - 28276, 8762, 6450, 6455, 0, + 28378, 8800, 6468, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801H_USB_1, - 28244, 6945, 27657, 6455, 0, + 28346, 6963, 27753, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801H_USB_2, - 28244, 6945, 27657, 6455, 0, + 28346, 6963, 27753, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801H_USB_3, - 28244, 6945, 27657, 6455, 0, + 28346, 6963, 27753, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801H_USB_4, - 28244, 6945, 27657, 6455, 0, + 28346, 6963, 27753, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801H_USB_5, - 28244, 6945, 27657, 6455, 0, + 28346, 6963, 27753, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801H_EHCI_1, - 28244, 6945, 8727, 6455, 0, + 28346, 6963, 8760, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801H_EHCI_2, - 28244, 6945, 8727, 6455, 0, + 28346, 6963, 8760, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801H_SMB, - 28244, 8962, 6455, 0, + 28346, 9058, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801H_EXP_1, - 28244, 615, 4320, 8153, 23974, 0, + 28346, 615, 4320, 8186, 24070, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801H_EXP_2, - 28244, 615, 4320, 8153, 28073, 0, + 28346, 615, 4320, 8186, 28169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801H_EXP_3, - 28244, 615, 4320, 8153, 28100, 0, + 28346, 615, 4320, 8186, 28196, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801H_EXP_4, - 28244, 615, 4320, 8153, 28103, 0, + 28346, 615, 4320, 8186, 28199, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801H_EXP_5, - 28244, 615, 4320, 8153, 28238, 0, + 28346, 615, 4320, 8186, 28340, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801H_EXP_6, - 28244, 615, 4320, 8153, 28241, 0, + 28346, 615, 4320, 8186, 28343, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801H_HDA, - 28244, 28076, 28081, 7054, 6455, 0, + 28346, 28172, 28177, 7072, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801H_THERMAL, - 28244, 23913, 6455, 0, + 28346, 24009, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801HBM_IDE, - 28244, 6626, 6455, 0, + 28346, 6644, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SNR_DDRIO, - 24394, 3961, 24821, 0, + 24490, 3961, 24917, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SNR_VMD, - 24394, 3961, 28368, 0, + 24490, 3961, 28470, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801IH_LPC, - 28372, 8958, 3018, 6563, 0, + 28474, 9054, 3018, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801IO_LPC, - 28380, 8958, 3018, 6563, 0, + 28482, 9054, 3018, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801IR_LPC, - 28388, 8958, 3018, 6563, 0, + 28490, 9054, 3018, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801IEM_LPC, - 28396, 8958, 3018, 6563, 0, + 28498, 9054, 3018, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801IB_LPC, - 28405, 8958, 3018, 6563, 0, + 28507, 9054, 3018, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801IM_LPC, - 28413, 8958, 3018, 6563, 0, + 28515, 9054, 3018, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801I_SATA_1, - 25564, 8762, 6455, 6156, 6786, 28285, 0, + 25660, 8800, 6473, 6174, 6804, 28387, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801I_SATA_2, - 25564, 8762, 6455, 6156, 6411, 28285, 0, + 25660, 8800, 6473, 6174, 6429, 28387, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801I_SATA_AHCI6, - 25564, 8775, 8762, 6455, 6156, 8371, 28285, 0, + 25660, 8819, 8800, 6473, 6174, 8404, 28387, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801I_SATA_AHCI4, - 25564, 8775, 8762, 6455, 6156, 6786, 28285, 0, + 25660, 8819, 8800, 6473, 6174, 6804, 28387, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801I_SATA_3, - 25564, 8762, 6455, 6156, 6411, 28285, 0, + 25660, 8800, 6473, 6174, 6429, 28387, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801I_SATA_4, - 25564, 11578, 8775, 8762, 6455, 14052, 6411, 28285, 0, + 25660, 11693, 8819, 8800, 6473, 14162, 6429, 28387, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801I_SATA_5, - 25564, 11578, 8775, 8762, 6455, 14052, 6786, 28285, 0, + 25660, 11693, 8819, 8800, 6473, 14162, 6804, 28387, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801I_SATA_6, - 25564, 11578, 8775, 8762, 6455, 14052, 6411, 28285, 0, + 25660, 11693, 8819, 8800, 6473, 14162, 6429, 28387, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801I_SATA_7, - 25564, 11578, 8775, 8762, 6455, 0, + 25660, 11693, 8819, 8800, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801I_SMB, - 25564, 8962, 6455, 0, + 25660, 9058, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801I_THERMAL, - 25564, 23913, 6455, 0, + 25660, 24009, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801I_USB_1, - 25564, 6945, 27657, 6455, 0, + 25660, 6963, 27753, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801I_USB_2, - 25564, 6945, 27657, 6455, 0, + 25660, 6963, 27753, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801I_USB_3, - 25564, 6945, 27657, 6455, 0, + 25660, 6963, 27753, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801I_USB_4, - 25564, 6945, 27657, 6455, 0, + 25660, 6963, 27753, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801I_USB_5, - 25564, 6945, 27657, 6455, 0, + 25660, 6963, 27753, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801I_USB_6, - 25564, 6945, 27657, 6455, 0, + 25660, 6963, 27753, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801I_EHCI_1, - 25564, 6945, 8727, 6455, 0, + 25660, 6963, 8760, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801I_EHCI_2, - 25564, 6945, 8727, 6455, 0, + 25660, 6963, 8760, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801I_HDA, - 25564, 28076, 28081, 7054, 6455, 0, + 25660, 28172, 28177, 7072, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801I_EXP_1, - 25564, 615, 4320, 8153, 23974, 0, + 25660, 615, 4320, 8186, 24070, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801I_EXP_2, - 25564, 615, 4320, 8153, 28073, 0, + 25660, 615, 4320, 8186, 28169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801I_EXP_3, - 25564, 615, 4320, 8153, 28100, 0, + 25660, 615, 4320, 8186, 28196, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801I_EXP_4, - 25564, 615, 4320, 8153, 28103, 0, + 25660, 615, 4320, 8186, 28199, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801I_EXP_5, - 25564, 615, 4320, 8153, 28238, 0, + 25660, 615, 4320, 8186, 28340, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801I_EXP_6, - 25564, 615, 4320, 8153, 28241, 0, + 25660, 615, 4320, 8186, 28343, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801I_IGP_C, - 25564, 28421, 4540, 6455, 0, + 25660, 28523, 4540, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82946GZ_HB, - 28425, 6953, 6563, 0, + 28527, 6971, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82946GZ_IGD, - 28425, 692, 1716, 2418, 0, + 28527, 692, 1716, 2418, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82946GZ_KT, - 28425, 23871, 0, + 28527, 23967, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82G35_HB, - 28433, 6953, 6563, 0, + 28535, 6971, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82965_PCIE, - 28433, 8204, 8140, 8153, 0, + 28535, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82G35_IGD, - 28433, 692, 1716, 2418, 0, + 28535, 692, 1716, 2418, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82G35_IGD_1, - 28433, 692, 1716, 2418, 0, + 28535, 692, 1716, 2418, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82G35_HECI_1, - 28433, 24265, 0, + 28535, 24361, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82G35_HECI_2, - 28433, 24265, 0, + 28535, 24361, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82965_IDE_R, - 28439, 23865, 0, + 28541, 23961, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82965Q_KT, - 28445, 23871, 0, + 28547, 23967, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82965Q_HB, - 28445, 6953, 6563, 0, + 28547, 6971, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82965Q_EXP, - 28445, 615, 4320, 6563, 0, + 28547, 615, 4320, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82965Q_IGD, - 28445, 692, 1716, 2418, 0, + 28547, 692, 1716, 2418, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82965Q_IGD_1, - 28445, 692, 1716, 2418, 0, + 28547, 692, 1716, 2418, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82965Q_HECI_1, - 28452, 24265, 0, + 28554, 24361, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82965Q_HECI_2, - 28452, 24265, 0, + 28554, 24361, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82Q965_KT, - 28452, 23871, 0, + 28554, 23967, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82965G_HB, - 28459, 6953, 6563, 0, + 28561, 6971, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82965G_EXP, - 28459, 615, 4320, 6563, 0, + 28561, 615, 4320, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82965G_IGD, - 28459, 692, 1716, 2418, 0, + 28561, 692, 1716, 2418, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82965G_IGD_1, - 28459, 692, 1716, 2418, 0, + 28561, 692, 1716, 2418, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82P965_KT, - 28466, 23871, 0, + 28568, 23967, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82Q35_HB, - 28478, 6953, 6563, 0, + 28580, 6971, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82Q35_EXP, - 28478, 615, 4320, 6563, 0, + 28580, 615, 4320, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82Q35_IGD, - 28478, 692, 1716, 2418, 0, + 28580, 692, 1716, 2418, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82Q35_IGD_1, - 28478, 692, 1716, 2418, 0, + 28580, 692, 1716, 2418, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82Q35_KT, - 28478, 23871, 0, + 28580, 23967, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82G33_HB, - 28484, 6953, 6563, 0, + 28586, 6971, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82G33_EXP, - 28494, 615, 4320, 8153, 0, + 28596, 615, 4320, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82G33_IGD, - 28494, 692, 1716, 2418, 0, + 28596, 692, 1716, 2418, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82G33_IGD_1, - 28494, 692, 1716, 2418, 0, + 28596, 692, 1716, 2418, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801I_LAN, - 25564, 4540, 6455, 0, + 25660, 4540, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82G33_KT, - 28500, 23871, 0, + 28602, 23967, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82Q33_HB, - 28478, 6953, 6563, 0, + 28580, 6971, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82Q33_EXP, - 28478, 615, 4320, 6563, 0, + 28580, 615, 4320, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82Q33_IGD, - 28478, 692, 1716, 2418, 0, + 28580, 692, 1716, 2418, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82Q33_IGD_1, - 28478, 692, 1716, 2418, 0, + 28580, 692, 1716, 2418, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82Q33_KT, - 28518, 23871, 0, + 28620, 23967, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82X38_HB, - 28524, 6953, 6563, 0, + 28626, 6971, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82X38_PCIE_1, - 28524, 28530, 8204, 6563, 0, + 28626, 28632, 8237, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82X38_HECI, - 28524, 24265, 0, + 28626, 24361, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82X38_KT, - 28524, 23871, 0, + 28626, 23967, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82X38_PCIE_2, - 28524, 28543, 8204, 6563, 0, + 28626, 28645, 8237, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3200_HB, - 28558, 6953, 0, + 28660, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3200_PCIE, - 28558, 8204, 0, + 28660, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3200_KT, - 11120, 23871, 0, + 11235, 23967, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82965PM_HB, - 28568, 6953, 6563, 0, + 28670, 6971, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_80862A01, - 28576, 11578, 615, 4320, 8140, 8153, 0, + 28678, 11693, 615, 4320, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82965PM_IGD, - 28568, 692, 1716, 2418, 0, + 28670, 692, 1716, 2418, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82965PM_IGD_1, - 28568, 692, 1716, 2418, 0, + 28670, 692, 1716, 2418, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82965PM_MEI, - 28568, 23861, 6455, 0, + 28670, 23957, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82965PM_MEI_2, - 28568, 23861, 6455, 0, + 28670, 23957, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82965PM_IDE, - 28568, 28585, 3018, 0, + 28670, 28687, 3018, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82965PM_KT, - 28590, 23871, 0, + 28692, 23967, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82965GME_HB, - 28601, 6953, 6563, 0, + 28703, 6971, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82965GME_PCIE, - 28601, 8204, 0, + 28703, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82965GME_IGD, - 28601, 692, 1716, 2418, 0, + 28703, 692, 1716, 2418, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82965GME_IGD_2, - 28601, 692, 1716, 2418, 0, + 28703, 692, 1716, 2418, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82965GME_MEI, - 28601, 23861, 6455, 0, + 28703, 23957, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82965GME_MEI_2, - 28601, 23861, 6455, 0, + 28703, 23957, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82965GME_IDER, - 28568, 28585, 3018, 0, + 28670, 28687, 3018, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82965GME_KT, - 28601, 23871, 0, + 28703, 23967, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82GM45_HB, - 28610, 6953, 6563, 0, + 28712, 6971, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82GM45_PCIE, - 28610, 8204, 0, + 28712, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82GM45_IGD, - 28610, 692, 1716, 2418, 0, + 28712, 692, 1716, 2418, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82GM45_IGD_1, - 28610, 692, 1716, 2418, 0, + 28712, 692, 1716, 2418, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82GM45_MEI_1, - 28610, 23861, 0, + 28712, 23957, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82GM45_MEI_2, - 28610, 23861, 0, + 28712, 23957, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82GM45_IDER, - 28610, 28585, 0, + 28712, 28687, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82GM45_KT, - 28610, 23871, 0, + 28712, 23967, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE55_QP_SAD, - 28617, 6, 8034, 6919, 0, + 28719, 6, 8067, 6937, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE55_QPI_LINK0, - 24530, 26799, 24795, 8075, 8134, 0, + 24626, 26895, 24891, 8108, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE55_QPI_PHYS0, - 24530, 26799, 24795, 27307, 8134, 0, + 24626, 26895, 24891, 27403, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE55_MIRR_LINK0, - 24530, 26799, 28627, 8153, 8075, 8134, 0, + 24626, 26895, 28729, 8186, 8108, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE55_MIRR_LINK1, - 24530, 26799, 28627, 8153, 8075, 8136, 0, + 24626, 26895, 28729, 8186, 8108, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE55_QPI_LINK1, - 24530, 26799, 24795, 8075, 8136, 0, + 24626, 26895, 24891, 8108, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE55_QPI_PHYS1, - 24530, 26799, 24795, 27307, 8136, 0, + 24626, 26895, 24891, 27403, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE55_IMC_REG, - 24530, 26799, 24799, 0, + 24626, 26895, 24895, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE55_IMC_TAD, - 24530, 26799, 24799, 14741, 8034, 6919, 0, + 24626, 26895, 24895, 14837, 8067, 6937, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE55_IMC_RAS, - 24530, 26799, 24799, 24422, 0, + 24626, 26895, 24895, 24518, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE55_IMC_TEST, - 24530, 26799, 24799, 28634, 0, + 24626, 26895, 24895, 28736, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE55_IMC_CH0_CTRL, - 24530, 26799, 24799, 20237, 8134, 9186, 0, + 24626, 26895, 24895, 20315, 8167, 9282, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE55_IMC_CH0_ADDR, - 24530, 26799, 24799, 20237, 8134, 8034, 0, + 24626, 26895, 24895, 20315, 8167, 8067, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE55_IMC_CH0_RANK, - 24530, 26799, 24799, 20237, 8134, 28639, 0, + 24626, 26895, 24895, 20315, 8167, 28741, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE55_IMC_CH0_THERM, - 24530, 26799, 24799, 20237, 8134, 23913, 9186, 0, + 24626, 26895, 24895, 20315, 8167, 24009, 9282, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE55_IMC_CH1_CTRL, - 24530, 26799, 24799, 20237, 8136, 9186, 0, + 24626, 26895, 24895, 20315, 8169, 9282, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE55_IMC_CH1_ADDR, - 24530, 26799, 24799, 20237, 8136, 8034, 0, + 24626, 26895, 24895, 20315, 8169, 8067, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE55_IMC_CH1_RANK, - 24530, 26799, 24799, 20237, 8136, 28639, 0, + 24626, 26895, 24895, 20315, 8169, 28741, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE55_IMC_CH1_THERM, - 24530, 26799, 24799, 20237, 8136, 23913, 9186, 0, + 24626, 26895, 24895, 20315, 8169, 24009, 9282, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE55_IMC_CH2_CTRL, - 24530, 26799, 24799, 20237, 6411, 9186, 0, + 24626, 26895, 24895, 20315, 6429, 9282, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE55_IMC_CH2_ADDR, - 24530, 26799, 24799, 20237, 6411, 8034, 0, + 24626, 26895, 24895, 20315, 6429, 8067, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE55_IMC_CH2_RANK, - 24530, 26799, 24799, 20237, 6411, 28639, 0, + 24626, 26895, 24895, 20315, 6429, 28741, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE55_IMC_CH2_THERM, - 24530, 26799, 24799, 20237, 6411, 23913, 9186, 0, + 24626, 26895, 24895, 20315, 6429, 24009, 9282, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE55_QP_REG, - 24530, 26799, 28617, 17382, 28644, 28653, 0, + 24626, 26895, 28719, 17473, 28746, 28755, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE_QP_REG_2, - 23679, 28662, 558, 28669, 28617, 17382, 28644, 28653, 0, + 23775, 28764, 558, 28771, 28719, 17473, 28746, 28755, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE_QP_REG_1, - 23679, 28676, 28684, 558, 28691, 26804, 28617, 17382, 28644, 28653, 0, + 23775, 28778, 28786, 558, 28793, 26900, 28719, 17473, 28746, 28755, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE_QP_REG_3, - 23679, 28617, 17382, 28644, 28653, 0, + 23775, 28719, 17473, 28746, 28755, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE56_QP_REG, - 24530, 13351, 28617, 17382, 28644, 28653, 0, + 24626, 13461, 28719, 17473, 28746, 28755, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE_QP_SAD_2, - 23679, 28662, 558, 28669, 28617, 17382, 6, 8034, 6919, 0, + 23775, 28764, 558, 28771, 28719, 17473, 6, 8067, 6937, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE_QPI_LINK_2, - 23679, 28662, 558, 28669, 24795, 8075, 0, + 23775, 28764, 558, 28771, 24891, 8108, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE_QPI_PHYS_2, - 23679, 28662, 558, 28669, 24795, 27307, 0, + 23775, 28764, 558, 28771, 24891, 27403, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE_IMC_REG, - 23679, 28662, 558, 28669, 24799, 0, + 23775, 28764, 558, 28771, 24895, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE_IMC_TAD, - 23679, 28662, 558, 28669, 24799, 14741, 8034, 6919, 0, + 23775, 28764, 558, 28771, 24895, 14837, 8067, 6937, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE_IMC_TEST, - 23679, 28662, 558, 28669, 24799, 28634, 0, + 23775, 28764, 558, 28771, 24895, 28736, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE_IMC_CH0_CTRL, - 23679, 28662, 558, 28669, 24799, 20237, 8134, 9186, 0, + 23775, 28764, 558, 28771, 24895, 20315, 8167, 9282, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE_IMC_CH0_ADDR, - 23679, 28662, 558, 28669, 24799, 20237, 8134, 8034, 0, + 23775, 28764, 558, 28771, 24895, 20315, 8167, 8067, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE_IMC_CH0_RANK, - 23679, 28662, 558, 28669, 24799, 20237, 8134, 28639, 0, + 23775, 28764, 558, 28771, 24895, 20315, 8167, 28741, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE_IMC_CH0_THERM, - 23679, 28662, 558, 28669, 24799, 20237, 8134, 23913, 9186, 0, + 23775, 28764, 558, 28771, 24895, 20315, 8167, 24009, 9282, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE_IMC_CH1_CTRL, - 23679, 28662, 558, 28669, 24799, 20237, 8136, 9186, 0, + 23775, 28764, 558, 28771, 24895, 20315, 8169, 9282, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE_IMC_CH1_ADDR, - 23679, 28662, 558, 28669, 24799, 20237, 8136, 8034, 0, + 23775, 28764, 558, 28771, 24895, 20315, 8169, 8067, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE_IMC_CH1_RANK, - 23679, 28662, 558, 28669, 24799, 20237, 8136, 28639, 0, + 23775, 28764, 558, 28771, 24895, 20315, 8169, 28741, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE_IMC_CH1_THERM, - 23679, 28662, 558, 28669, 24799, 20237, 8136, 23913, 9186, 0, + 23775, 28764, 558, 28771, 24895, 20315, 8169, 24009, 9282, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE_QP_SAD, - 23679, 28676, 28684, 558, 28691, 26804, 28617, 17382, 6, 8034, 6919, 0, + 23775, 28778, 28786, 558, 28793, 26900, 28719, 17473, 6, 8067, 6937, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE_QPI_LINK, - 23679, 28676, 28684, 558, 28691, 26804, 24795, 8075, 0, + 23775, 28778, 28786, 558, 28793, 26900, 24891, 8108, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE_QPI_PHYS, - 23679, 28676, 28684, 558, 28691, 26804, 24795, 27307, 0, + 23775, 28778, 28786, 558, 28793, 26900, 24891, 27403, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE_RSVD_1, - 23679, 28676, 28684, 558, 28691, 26804, 8252, 0, + 23775, 28778, 28786, 558, 28793, 26900, 8285, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE_RSVD_2, - 23679, 28676, 28684, 558, 28691, 26804, 8252, 0, + 23775, 28778, 28786, 558, 28793, 26900, 8285, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE56_QP_SAD, - 28617, 6, 8034, 6919, 0, + 28719, 6, 8067, 6937, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE56_QPI_LINK0, - 24530, 13351, 24795, 8075, 8134, 0, + 24626, 13461, 24891, 8108, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE56_QPI_PHYS0, - 24530, 13351, 24795, 27307, 8134, 0, + 24626, 13461, 24891, 27403, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE56_MIRR_LINK0, - 24530, 13351, 28627, 8153, 8075, 8134, 0, + 24626, 13461, 28729, 8186, 8108, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE56_MIRR_LINK1, - 24530, 13351, 28627, 8153, 8075, 8136, 0, + 24626, 13461, 28729, 8186, 8108, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE56_QPI_LINK1, - 24530, 13351, 24795, 8075, 8136, 0, + 24626, 13461, 24891, 8108, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE56_QPI_PHYS1, - 24530, 13351, 24795, 27307, 8136, 0, + 24626, 13461, 24891, 27403, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE56_IMC_REG, - 24530, 13351, 24799, 0, + 24626, 13461, 24895, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE56_IMC_TAD, - 24530, 13351, 24799, 14741, 8034, 6919, 0, + 24626, 13461, 24895, 14837, 8067, 6937, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE56_IMC_RAS, - 24530, 13351, 24799, 24422, 0, + 24626, 13461, 24895, 24518, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE56_IMC_TEST, - 24530, 13351, 24799, 28634, 0, + 24626, 13461, 24895, 28736, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE56_IMC_CH0_CTRL, - 24530, 13351, 24799, 20237, 8134, 9186, 0, + 24626, 13461, 24895, 20315, 8167, 9282, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE56_IMC_CH0_ADDR, - 24530, 13351, 24799, 20237, 8134, 8034, 0, + 24626, 13461, 24895, 20315, 8167, 8067, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE56_IMC_CH0_RANK, - 24530, 13351, 24799, 20237, 8134, 28639, 0, + 24626, 13461, 24895, 20315, 8167, 28741, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE56_IMC_CH0_THERM, - 24530, 13351, 24799, 20237, 8134, 23913, 9186, 0, + 24626, 13461, 24895, 20315, 8167, 24009, 9282, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE56_IMC_CH1_CTRL, - 24530, 13351, 24799, 20237, 8136, 9186, 0, + 24626, 13461, 24895, 20315, 8169, 9282, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE56_IMC_CH1_ADDR, - 24530, 13351, 24799, 20237, 8136, 8034, 0, + 24626, 13461, 24895, 20315, 8169, 8067, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE56_IMC_CH1_RANK, - 24530, 13351, 24799, 20237, 8136, 28639, 0, + 24626, 13461, 24895, 20315, 8169, 28741, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE56_IMC_CH1_THERM, - 24530, 13351, 24799, 20237, 8136, 23913, 9186, 0, + 24626, 13461, 24895, 20315, 8169, 24009, 9282, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE56_IMC_CH2_CTRL, - 24530, 13351, 24799, 20237, 6411, 9186, 0, + 24626, 13461, 24895, 20315, 6429, 9282, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE56_IMC_CH2_ADDR, - 24530, 13351, 24799, 20237, 6411, 8034, 0, + 24626, 13461, 24895, 20315, 6429, 8067, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE56_IMC_CH2_RANK, - 24530, 13351, 24799, 20237, 6411, 28639, 0, + 24626, 13461, 24895, 20315, 6429, 28741, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE56_IMC_CH2_THERM, - 24530, 13351, 24799, 20237, 6411, 23913, 9186, 0, + 24626, 13461, 24895, 20315, 6429, 24009, 9282, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82IGD_E_HB, - 28699, 6953, 6563, 0, + 28801, 6971, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82Q45_PCIE, - 28699, 8204, 0, + 28801, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82IGD_E_IGD, - 28699, 692, 1716, 0, + 28801, 692, 1716, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82Q45_HECI_1, - 28707, 26905, 24265, 0, + 28809, 27001, 24361, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82Q45_HECI_2, - 28707, 26905, 24265, 0, + 28809, 27001, 24361, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82Q45_IDER_2, - 28707, 26905, 28585, 0, + 28809, 27001, 28687, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82Q45_KT, - 28707, 23871, 0, + 28809, 23967, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82Q45_HB, - 28707, 6953, 6563, 0, + 28809, 6971, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82Q45_EXP, - 28707, 615, 4320, 6563, 0, + 28809, 615, 4320, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82Q45_IGD, - 28707, 692, 1716, 2418, 0, + 28809, 692, 1716, 2418, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82Q45_IGD_1, - 28707, 692, 1716, 2418, 0, + 28809, 692, 1716, 2418, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82Q45_IDER, - 28707, 28585, 0, + 28809, 28687, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82Q45_KT_1, - 28707, 23871, 0, + 28809, 23967, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82G45_HB, - 28713, 6953, 6563, 0, + 28815, 6971, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82G45_IGD, - 28713, 692, 1716, 2418, 0, + 28815, 692, 1716, 2418, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82G41_HB, - 28719, 6953, 6563, 0, + 28821, 6971, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82G41_IGD, - 28719, 692, 1716, 2418, 0, + 28821, 692, 1716, 2418, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82B43_HB, - 28725, 6953, 6563, 0, + 28827, 6971, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82B43_IGD, - 28725, 692, 1716, 2418, 0, + 28827, 692, 1716, 2418, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_DMI2, - 24530, 24700, 24543, 24706, 0, + 24626, 24796, 24639, 24802, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_PCIE_1_1, - 24530, 24700, 24543, 8204, 8140, 8153, 8352, 24706, 28731, 0, + 24626, 24796, 24639, 8237, 8173, 8186, 8385, 24802, 28833, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_PCIE_1_2, - 24530, 24700, 24543, 8204, 8140, 8153, 0, + 24626, 24796, 24639, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_PCIE_2_1, - 24530, 24700, 24543, 8204, 8140, 8153, 0, + 24626, 24796, 24639, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_PCIE_2_2, - 24530, 24700, 24543, 8204, 8140, 8153, 0, + 24626, 24796, 24639, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_PCIE_2_3, - 24530, 24700, 24543, 8204, 8140, 8153, 0, + 24626, 24796, 24639, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_PCIE_2_4, - 24530, 24700, 24543, 8204, 8140, 8153, 0, + 24626, 24796, 24639, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_PCIE_3_1, - 24530, 24700, 24543, 8204, 8140, 8153, 0, + 24626, 24796, 24639, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_PCIE_3_2, - 24530, 24700, 24543, 8204, 8140, 8153, 0, + 24626, 24796, 24639, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_PCIE_3_3, - 24530, 24700, 24543, 8204, 8140, 8153, 0, + 24626, 24796, 24639, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_PCIE_3_4, - 24530, 24700, 24543, 8204, 8140, 8153, 0, + 24626, 24796, 24639, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_R2PCIE_1, - 24530, 24700, 28736, 28744, 692, 8898, 6019, 3018, 0, + 24626, 24796, 28838, 28846, 692, 8994, 6037, 3018, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_UBOX_1, - 24530, 24700, 24543, 28753, 558, 28764, 0, + 24626, 24796, 24639, 28855, 558, 28866, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_UBOX_3, - 24530, 24700, 24543, 28753, 558, 28764, 0, + 24626, 24796, 24639, 28855, 558, 28866, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_QDT_CH0, - 24530, 24700, 24543, 28775, 24519, 20237, 8134, 0, + 24626, 24796, 24639, 28877, 24615, 20315, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_QDT_CH1, - 24530, 24700, 24543, 28775, 24519, 20237, 8136, 0, + 24626, 24796, 24639, 28877, 24615, 20315, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_QDT_CH2, - 24530, 24700, 24543, 28775, 24519, 20237, 6411, 0, + 24626, 24796, 24639, 28877, 24615, 20315, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_QDT_CH3, - 24530, 24700, 24543, 28775, 24519, 20237, 6422, 0, + 24626, 24796, 24639, 28877, 24615, 20315, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_QDT_CH4, - 24530, 24700, 24543, 28775, 24519, 20237, 6786, 0, + 24626, 24796, 24639, 28877, 24615, 20315, 6804, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_QDT_CH5, - 24530, 24700, 24543, 28775, 24519, 20237, 8138, 0, + 24626, 24796, 24639, 28877, 24615, 20315, 8171, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_QDT_CH6, - 24530, 24700, 24543, 28775, 24519, 20237, 8371, 0, + 24626, 24796, 24639, 28877, 24615, 20315, 8404, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_QDT_CH7, - 24530, 24700, 24543, 28775, 24519, 20237, 8373, 0, + 24626, 24796, 24639, 28877, 24615, 20315, 8406, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_IIO_AM, - 24530, 24700, 24543, 8034, 28779, 28784, 28789, 0, + 24626, 24796, 24639, 8067, 28881, 28886, 28891, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_HOTPLUG, - 24530, 24700, 24543, 26274, 26278, 0, + 24626, 24796, 24639, 26370, 26374, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_IIO_RAM, - 24530, 24700, 24543, 28793, 28798, 353, 28802, 0, + 24626, 24796, 24639, 28895, 28900, 353, 28904, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_IIO_IOAPIC, - 24530, 24700, 24543, 8945, 24759, 0, + 24626, 24796, 24639, 9041, 24855, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_HA, - 24530, 24700, 24543, 24764, 24769, 0, + 24626, 24796, 24639, 24860, 24865, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_QPI_LINK2, - 24530, 24700, 24543, 24795, 8075, 8134, 0, + 24626, 24796, 24639, 24891, 8108, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_QPI_LINK3, - 24530, 24700, 24543, 24795, 8075, 8136, 0, + 24626, 24796, 24639, 24891, 8108, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_R2PCIE_2, - 24530, 24700, 28736, 28744, 8204, 6019, 24775, 28809, 0, + 24626, 24796, 28838, 28846, 8237, 6037, 24871, 28911, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_RQPI_PM_1, - 24530, 24700, 28736, 28744, 24795, 6019, 24775, 28809, 0, + 24626, 24796, 28838, 28846, 24891, 6037, 24871, 28911, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_RQPI_PM_2, - 24530, 24700, 28736, 28744, 24795, 6019, 3018, 28809, 0, + 24626, 24796, 28838, 28846, 24891, 6037, 3018, 28911, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE7_V4_QPI_LINK2, - 24530, 28820, 28823, 24795, 8075, 6411, 0, + 24626, 28922, 28925, 24891, 8108, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE7_V4_RQPI_RING, - 24530, 28820, 28823, 24795, 6019, 3018, 0, + 24626, 28922, 28925, 24891, 6037, 3018, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_HA1, - 24530, 28820, 28826, 24700, 28736, 28834, 24764, 24769, 8136, 0, + 24626, 28922, 28928, 24796, 28838, 28936, 24860, 24865, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_IMC1_TATRR, - 24530, 28820, 28826, 24700, 28736, 28834, 692, 4504, 6455, 8136, 14741, 28837, 23913, 647, 24422, 28009, 0, + 24626, 28922, 28928, 24796, 28838, 28936, 692, 4504, 6473, 8169, 14837, 28939, 24009, 647, 24518, 28105, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_IMC1_TADR1, - 24530, 24700, 24543, 24799, 28846, 28849, 14741, 8034, 28853, 28009, 0, + 24626, 24796, 24639, 24895, 28948, 28951, 14837, 8067, 28955, 28105, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_IMC1_TADR2, - 24530, 24700, 24543, 24799, 28846, 28849, 14741, 8034, 28853, 28009, 0, + 24626, 24796, 24639, 24895, 28948, 28951, 14837, 8067, 28955, 28105, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE7_V4_IMC1_TADR3, - 24530, 28820, 28823, 24799, 28846, 28860, 14741, 8034, 6919, 0, + 24626, 28922, 28925, 24895, 28948, 28962, 14837, 8067, 6937, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE7_V4_IMC1_TADR4, - 24530, 28820, 28823, 24799, 28846, 28860, 14741, 8034, 6919, 0, + 24626, 28922, 28925, 24895, 28948, 28962, 14837, 8067, 6937, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_DDRIO_CHAN2, - 24530, 28820, 28826, 24700, 28736, 28834, 24821, 20237, 28864, 24857, 0, + 24626, 28922, 28928, 24796, 28838, 28936, 24917, 20315, 28966, 24953, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_DDRIO_BROAD2, - 24530, 28820, 28826, 24700, 28736, 28834, 24821, 353, 24857, 0, + 24626, 28922, 28928, 24796, 28838, 28936, 24917, 353, 24953, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_IMC0_RAS, - 24530, 24700, 24543, 24799, 24422, 28009, 0, + 24626, 24796, 24639, 24895, 24518, 28105, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_IMC1_RAS, - 24530, 24700, 24543, 24799, 28868, 28009, 0, + 24626, 24796, 24639, 24895, 28970, 28105, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_UBOX_2, - 24530, 24700, 24543, 28753, 558, 28764, 0, + 24626, 24796, 24639, 28855, 558, 28866, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_QPI_LINK0, - 24530, 24700, 24543, 24795, 8075, 8134, 0, + 24626, 24796, 24639, 24891, 8108, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_RQPI_RING, - 24530, 24700, 28736, 28744, 24795, 6019, 3018, 0, + 24626, 24796, 28838, 28846, 24891, 6037, 3018, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_QPI_LINK4, - 24530, 24700, 24543, 24795, 8075, 8134, 0, + 24626, 24796, 24639, 24891, 8108, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_QPIL0D1, - 24530, 28820, 28826, 24700, 28736, 28834, 24795, 8075, 8134, 24571, 0, + 24626, 28922, 28928, 24796, 28838, 28936, 24891, 8108, 8167, 24667, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_QPIL0D2, - 24530, 28820, 28826, 24700, 28736, 28834, 24795, 8075, 8134, 24571, 0, + 24626, 28922, 28928, 24796, 28838, 28936, 24891, 8108, 8167, 24667, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_QPIL0D3, - 24530, 28820, 28826, 24700, 28736, 28834, 24795, 8075, 8134, 24571, 0, + 24626, 28922, 28928, 24796, 28838, 28936, 24891, 8108, 8167, 24667, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_VCU1, - 24530, 28820, 28826, 24700, 28736, 28834, 28872, 0, + 24626, 28922, 28928, 24796, 28838, 28936, 28974, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_VCU2, - 24530, 28820, 28826, 24700, 28736, 28834, 28872, 0, + 24626, 28922, 28928, 24796, 28838, 28936, 28974, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_QPI_LINK1, - 24530, 24700, 24543, 24795, 8075, 8136, 0, + 24626, 24796, 24639, 24891, 8108, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_PCU_1, - 24530, 24700, 24543, 3740, 9186, 27003, 0, + 24626, 24796, 24639, 3740, 9282, 27099, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_PCU_2, - 24530, 24700, 24543, 3740, 9186, 27003, 0, + 24626, 24796, 24639, 3740, 9282, 27099, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_PCU_3, - 24530, 24700, 24543, 3740, 9186, 27003, 0, + 24626, 24796, 24639, 3740, 9282, 27099, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_PCU_5, - 24530, 24700, 24543, 3740, 9186, 27003, 0, + 24626, 24796, 24639, 3740, 9282, 27099, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_HA0, - 24530, 28820, 28826, 24700, 28736, 28834, 24764, 24769, 8134, 0, + 24626, 28922, 28928, 24796, 28838, 28936, 24860, 24865, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_IMC0_TATRR, - 24530, 28820, 28826, 24700, 28736, 28834, 692, 4504, 6455, 8134, 14741, 28837, 23913, 647, 24422, 28009, 0, + 24626, 28922, 28928, 24796, 28838, 28936, 692, 4504, 6473, 8167, 14837, 28939, 24009, 647, 24518, 28105, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_IMC0_TADR1, - 24530, 24700, 24543, 24799, 28846, 28849, 14741, 8034, 28853, 28009, 0, + 24626, 24796, 24639, 24895, 28948, 28951, 14837, 8067, 28955, 28105, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_IMC0_TADR2, - 24530, 24700, 24543, 24799, 28846, 28849, 14741, 8034, 28853, 28009, 0, + 24626, 24796, 24639, 24895, 28948, 28951, 14837, 8067, 28955, 28105, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_IMC0_TADR3, - 24530, 24700, 24543, 24799, 28846, 28023, 14741, 8034, 28853, 28009, 0, + 24626, 24796, 24639, 24895, 28948, 28119, 14837, 8067, 28955, 28105, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_IMC0_TADR4, - 24530, 24700, 24543, 24799, 28846, 28023, 14741, 8034, 28853, 28009, 0, + 24626, 24796, 24639, 24895, 28948, 28119, 14837, 8067, 28955, 28105, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_DDRIO_CHAN, - 24530, 28820, 28826, 24700, 28736, 28834, 24821, 20237, 28876, 24857, 0, + 24626, 28922, 28928, 24796, 28838, 28936, 24917, 20315, 28978, 24953, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_DDRIO_BROAD, - 24530, 28820, 28826, 24700, 28736, 28834, 24821, 353, 24857, 0, + 24626, 28922, 28928, 24796, 28838, 28936, 24917, 353, 24953, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_IMC0_REG1, - 24530, 24700, 24543, 24799, 28846, 28849, 28009, 0, + 24626, 24796, 24639, 24895, 28948, 28951, 28105, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_IMC0_REG2, - 24530, 24700, 24543, 24799, 28846, 28849, 28009, 0, + 24626, 24796, 24639, 24895, 28948, 28951, 28105, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_IMC0_REG3, - 24530, 24700, 24543, 24799, 28846, 28023, 28009, 0, + 24626, 24796, 24639, 24895, 28948, 28119, 28105, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_IMC0_REG4, - 24530, 24700, 24543, 24799, 28846, 28023, 28009, 0, + 24626, 24796, 24639, 24895, 28948, 28119, 28105, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_IMC0_REG5, - 24530, 24700, 24543, 24799, 28846, 28849, 28009, 0, + 24626, 24796, 24639, 24895, 28948, 28951, 28105, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_IMC0_REG6, - 24530, 24700, 24543, 24799, 28846, 28849, 28009, 0, + 24626, 24796, 24639, 24895, 28948, 28951, 28105, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_IMC0_REG7, - 24530, 24700, 24543, 24799, 28846, 28023, 28009, 0, + 24626, 24796, 24639, 24895, 28948, 28119, 28105, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_IMC0_REG8, - 24530, 24700, 24543, 24799, 28846, 28023, 28009, 0, + 24626, 24796, 24639, 24895, 28948, 28119, 28105, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_IMC1_DDRIO_3, - 24530, 24700, 24543, 24799, 24821, 0, + 24626, 24796, 24639, 24895, 24917, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_IMC1_DDRIO_4, - 24530, 24700, 24543, 24799, 24821, 0, + 24626, 24796, 24639, 24895, 24917, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_IMC0_DDRIO_1, - 24530, 24700, 24543, 24799, 24821, 24835, 0, + 24626, 24796, 24639, 24895, 24917, 24931, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_IMC0_DDRIO_2, - 24530, 24700, 24543, 24799, 24821, 24835, 0, + 24626, 24796, 24639, 24895, 24917, 24931, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_IMC1_DDRIO_5, - 24530, 24700, 24543, 24799, 24821, 0, + 24626, 24796, 24639, 24895, 24917, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_IMC1_DDRIO_6, - 24530, 24700, 24543, 24799, 24821, 0, + 24626, 24796, 24639, 24895, 24917, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_IMC1_DDRIO_7, - 24530, 24700, 24543, 24799, 24821, 24835, 0, + 24626, 24796, 24639, 24895, 24917, 24931, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_IMC1_DDRIO_8, - 24530, 24700, 24543, 24799, 24821, 24835, 0, + 24626, 24796, 24639, 24895, 24917, 24931, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_PCU_4, - 24530, 24700, 24543, 3740, 9186, 27003, 0, + 24626, 24796, 24639, 3740, 9282, 27099, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE7_V4_IMC1_REG3, - 24530, 28820, 28823, 24799, 28846, 28860, 28009, 0, + 24626, 28922, 28925, 24895, 28948, 28962, 28105, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE7_V4_IMC1_REG4, - 24530, 28820, 28823, 24799, 28846, 28860, 28009, 0, + 24626, 28922, 28925, 24895, 28948, 28962, 28105, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE7_V4_IMC1_REG5, - 24530, 28820, 28823, 24799, 28846, 28860, 28009, 0, + 24626, 28922, 28925, 24895, 28948, 28962, 28105, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE7_V4_IMC1_REG6, - 24530, 28820, 28823, 24799, 28846, 28860, 28009, 0, + 24626, 28922, 28925, 24895, 28948, 28962, 28105, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_IMC1_REG5, - 24530, 24700, 24543, 24799, 28846, 28849, 28009, 0, + 24626, 24796, 24639, 24895, 28948, 28951, 28105, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_IMC1_REG6, - 24530, 24700, 24543, 24799, 28846, 28849, 28009, 0, + 24626, 24796, 24639, 24895, 28948, 28951, 28105, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_IMC1_REG7, - 24530, 24700, 24543, 24799, 28846, 28849, 28009, 0, + 24626, 24796, 24639, 24895, 28948, 28951, 28105, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_IMC1_REG8, - 24530, 24700, 24543, 24799, 28846, 28849, 28009, 0, + 24626, 24796, 24639, 24895, 28948, 28951, 28105, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_IMC0_DDRIO_9, - 24530, 24700, 24543, 24799, 24821, 0, + 24626, 24796, 24639, 24895, 24917, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_IMC0_DDRIO_A, - 24530, 24700, 24543, 24799, 24821, 0, + 24626, 24796, 24639, 24895, 24917, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_IMC0_DDRIO_B, - 24530, 24700, 24543, 24799, 24821, 0, + 24626, 24796, 24639, 24895, 24917, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_IMC0_DDRIO_C, - 24530, 24700, 24543, 24799, 24821, 0, + 24626, 24796, 24639, 24895, 24917, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_UC_REG1, - 24530, 28820, 28826, 24700, 28736, 28834, 24867, 28009, 0, + 24626, 28922, 28928, 24796, 28838, 28936, 24963, 28105, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_UC_REG2, - 24530, 28820, 28826, 24700, 28736, 28834, 24867, 28009, 0, + 24626, 28922, 28928, 24796, 28838, 28936, 24963, 28105, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_UC_REG3, - 24530, 28820, 28826, 24700, 28736, 28834, 24867, 28009, 0, + 24626, 28922, 28928, 24796, 28838, 28936, 24963, 28105, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_UC_REG4, - 24530, 28820, 28826, 24700, 28736, 28834, 24867, 28009, 0, + 24626, 28922, 28928, 24796, 28838, 28936, 24963, 28105, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_UC_REG5, - 24530, 28820, 28826, 24700, 28736, 28834, 24867, 28009, 0, + 24626, 28922, 28928, 24796, 28838, 28936, 24963, 28105, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_UC_REG6, - 24530, 28820, 28826, 24700, 28736, 28834, 24867, 28009, 0, + 24626, 28922, 28928, 24796, 28838, 28936, 24963, 28105, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_UC_REG7, - 24530, 28820, 28826, 24700, 28736, 28834, 24867, 28009, 0, + 24626, 28922, 28928, 24796, 28838, 28936, 24963, 28105, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_UC_REG8, - 24530, 28820, 28826, 24700, 28736, 28834, 24867, 28009, 0, + 24626, 28922, 28928, 24796, 28838, 28936, 24963, 28105, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_UC_REG9, - 24530, 28820, 28826, 24700, 28736, 28834, 24867, 28009, 0, + 24626, 28922, 28928, 24796, 28838, 28936, 24963, 28105, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_UC_REG10, - 24530, 28820, 28826, 24700, 28736, 28834, 24867, 28009, 0, + 24626, 28922, 28928, 24796, 28838, 28936, 24963, 28105, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_UC_REG11, - 24530, 28820, 28826, 24700, 28736, 28834, 24867, 28009, 0, + 24626, 28922, 28928, 24796, 28838, 28936, 24963, 28105, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_UC_REG12, - 24530, 28820, 28826, 24700, 28736, 28834, 24867, 28009, 0, + 24626, 28922, 28928, 24796, 28838, 28936, 24963, 28105, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_UC_REG13, - 24530, 28820, 28826, 24700, 28736, 28834, 24867, 28009, 0, + 24626, 28922, 28928, 24796, 28838, 28936, 24963, 28105, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_UC_REG14, - 24530, 28820, 28826, 24700, 28736, 28834, 24867, 28009, 0, + 24626, 28922, 28928, 24796, 28838, 28936, 24963, 28105, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_UC_REG15, - 24530, 28820, 28826, 24700, 28736, 28834, 24867, 28009, 0, + 24626, 28922, 28928, 24796, 28838, 28936, 24963, 28105, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_UC_REG16, - 24530, 28820, 28826, 24700, 28736, 28834, 24867, 28009, 0, + 24626, 28922, 28928, 24796, 28838, 28936, 24963, 28105, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_UC_REG17, - 24530, 28820, 28826, 24700, 28736, 28834, 24867, 28009, 0, + 24626, 28922, 28928, 24796, 28838, 28936, 24963, 28105, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_UC_REG18, - 24530, 28820, 28826, 24700, 28736, 28834, 24867, 28009, 0, + 24626, 28922, 28928, 24796, 28838, 28936, 24963, 28105, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_UC_REG19, - 24530, 28820, 28826, 24700, 28736, 28834, 24867, 28009, 0, + 24626, 28922, 28928, 24796, 28838, 28936, 24963, 28105, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_UC_REG20, - 24530, 28820, 28826, 24700, 28736, 28834, 24867, 28009, 0, + 24626, 28922, 28928, 24796, 28838, 28936, 24963, 28105, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_UC_REG21, - 24530, 28820, 28826, 24700, 28736, 28834, 24867, 28009, 0, + 24626, 28922, 28928, 24796, 28838, 28936, 24963, 28105, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_UC_REG22, - 24530, 28820, 28826, 24700, 28736, 28834, 24867, 28009, 0, + 24626, 28922, 28928, 24796, 28838, 28936, 24963, 28105, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_UC_REG23, - 24530, 28820, 28826, 24700, 28736, 28834, 24867, 28009, 0, + 24626, 28922, 28928, 24796, 28838, 28936, 24963, 28105, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_UC_REG24, - 24530, 28820, 28826, 24700, 28736, 28834, 24867, 28009, 0, + 24626, 28922, 28928, 24796, 28838, 28936, 24963, 28105, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_BRA1, - 24530, 28820, 28826, 24700, 28736, 28834, 28880, 6019, 24769, 0, + 24626, 28922, 28928, 24796, 28838, 28936, 28982, 6037, 24865, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_BRA2, - 24530, 28820, 28826, 24700, 28736, 28834, 28880, 6019, 24769, 0, + 24626, 28922, 28928, 24796, 28838, 28936, 28982, 6037, 24865, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_BRA3, - 24530, 28820, 28826, 24700, 28736, 28834, 28880, 6019, 24769, 0, + 24626, 28922, 28928, 24796, 28838, 28936, 28982, 6037, 24865, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_BRA4, - 24530, 28820, 28826, 24700, 28736, 28834, 28880, 6019, 24769, 0, + 24626, 28922, 28928, 24796, 28838, 28936, 28982, 6037, 24865, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_SADBR1, - 24530, 28820, 28826, 24700, 28736, 28834, 6, 8034, 6919, 647, 24857, 28009, 0, + 24626, 28922, 28928, 24796, 28838, 28936, 6, 8067, 6937, 647, 24953, 28105, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_SADBR2, - 24530, 28820, 28826, 24700, 28736, 28834, 6, 8034, 6919, 647, 24857, 28009, 0, + 24626, 28922, 28928, 24796, 28838, 28936, 6, 8067, 6937, 647, 24953, 28105, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XE5_V3_SADBR3, - 24530, 28820, 28826, 24700, 28736, 28834, 6, 8034, 6919, 647, 24857, 28009, 0, + 24626, 28922, 28928, 24796, 28838, 28936, 6, 8067, 6937, 647, 24953, 28105, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I225_K, - 28889, 5717, 24654, 0, + 28991, 5735, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I225_K2, - 28896, 5717, 24654, 0, + 28998, 5735, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I226_K, - 28904, 5717, 24654, 0, + 29006, 5735, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_WIFI_LINK_3165_1, - 11247, 24324, 4761, 24329, 28911, 0, + 11362, 24420, 4761, 24425, 29013, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_WIFI_LINK_3165_2, - 11247, 24324, 4761, 24329, 28911, 0, + 11362, 24420, 4761, 24425, 29013, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_GLK_IGD_1, - 28916, 1716, 28920, 0, + 29018, 1716, 29022, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_GLK_IGD_2, - 28916, 1716, 14633, 0, + 29018, 1716, 8849, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_GLK_DPTF, - 28924, 23674, 28931, 0, + 29026, 23770, 29033, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_GLK_GNA, - 28924, 23674, 28936, 0, + 29026, 23770, 29038, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_GLK_P2SB, - 28924, 23674, 8299, 7009, 28940, 6563, 0, + 29026, 23770, 8332, 7027, 29042, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_GLK_PMC, - 28924, 23674, 23818, 0, + 29026, 23770, 23914, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_GLK_FASTSPI, - 28924, 23674, 2430, 17409, 0, + 29026, 23770, 2430, 17500, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_GLK_ESPI, - 28924, 23674, 23808, 0, + 29026, 23770, 23904, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_GLK_HDA, - 28924, 23674, 8230, 7054, 0, + 29026, 23770, 8263, 7072, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_GLK_TXE_HECI_1, - 28924, 23674, 27540, 24265, 8136, 0, + 29026, 23770, 27636, 24361, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_GLK_ISH, - 28924, 23674, 692, 23921, 8949, 0, + 29026, 23770, 692, 24017, 9045, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_GLK_XHCI, - 28924, 23674, 6945, 6953, 28949, 0, + 29026, 23770, 6963, 6971, 29051, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_GLK_XDCI, - 28924, 23674, 6945, 2418, 28956, 0, + 29026, 23770, 6963, 2418, 29058, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_GLK_I2C_0, - 28924, 23674, 17453, 8134, 0, + 29026, 23770, 17544, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_GLK_I2C_1, - 28924, 23674, 17453, 8136, 0, + 29026, 23770, 17544, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_GLK_I2C_2, - 28924, 23674, 17453, 6411, 0, + 29026, 23770, 17544, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_GLK_I2C_3, - 28924, 23674, 17453, 6422, 0, + 29026, 23770, 17544, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_GLK_I2C_4, - 28924, 23674, 17453, 6786, 0, + 29026, 23770, 17544, 6804, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_GLK_I2C_5, - 28924, 23674, 17453, 8138, 0, + 29026, 23770, 17544, 8171, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_GLK_I2C_6, - 28924, 23674, 17453, 8371, 0, + 29026, 23770, 17544, 8404, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_GLK_I2C_7, - 28924, 23674, 17453, 8373, 0, + 29026, 23770, 17544, 8406, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_GLK_UART_0, - 28924, 23674, 7983, 8134, 0, + 29026, 23770, 8016, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_GLK_UART_2, - 28924, 23674, 7983, 6411, 0, + 29026, 23770, 8016, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_GLK_SPI, - 28924, 23674, 17409, 0, + 29026, 23770, 17500, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_GLK_EMMC, - 28924, 23674, 23848, 0, + 29026, 23770, 23944, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_GLK_SMB, - 28924, 23674, 8962, 0, + 29026, 23770, 9058, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_GLK_PCIE_4, - 28924, 23674, 8204, 28963, 0, + 29026, 23770, 8237, 29065, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_GLK_PCIE_5, - 28924, 23674, 8204, 28963, 0, + 29026, 23770, 8237, 29065, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_GLK_PCIE_0, - 28924, 23674, 8204, 24546, 0, + 29026, 23770, 8237, 24642, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_GLK_PCIE_1, - 28924, 23674, 8204, 24546, 0, + 29026, 23770, 8237, 24642, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_GLK_PCIE_2, - 28924, 23674, 8204, 24546, 0, + 29026, 23770, 8237, 24642, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_GLK_PCIE_3, - 28924, 23674, 8204, 24546, 0, + 29026, 23770, 8237, 24642, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_GLK_CNVI, - 28924, 23674, 23903, 0, + 29026, 23770, 23999, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_GLK_SATA, - 28924, 23674, 8762, 0, + 29026, 23770, 8800, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_GLK_LPC, - 28924, 23674, 8958, 0, + 29026, 23770, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_GLK_SSRAM, - 28924, 23674, 23891, 23898, 0, + 29026, 23770, 23987, 23994, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_GLK_HB, - 28924, 23674, 6953, 6563, 0, + 29026, 23770, 6971, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_31244, - 28966, 14833, 6446, 6455, 0, + 29068, 14929, 6464, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82855PM_DDR, - 28972, 27728, 6953, 6455, 0, + 29074, 27824, 6971, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82855PM_AGP, - 28972, 27808, 6563, 0, + 29074, 27904, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82855PM_PM, - 28972, 3740, 7078, 6455, 0, + 29074, 3740, 7096, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SNR_CPU_RP_A, - 24394, 3961, 2535, 8204, 26891, 11222, 28980, 28985, 0, + 24490, 3961, 2535, 8237, 26987, 11337, 29082, 29087, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SNR_CPU_RP_B, - 24394, 3961, 2535, 8204, 26891, 5171, 28980, 28990, 0, + 24490, 3961, 2535, 8237, 26987, 5171, 29082, 29092, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SNR_CPU_RP_C, - 24394, 3961, 2535, 8204, 26891, 11224, 28980, 28994, 0, + 24490, 3961, 2535, 8237, 26987, 11339, 29082, 29096, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SNR_CPU_RP_D, - 24394, 3961, 2535, 8204, 26891, 3154, 28980, 28990, 0, + 24490, 3961, 2535, 8237, 26987, 3154, 29082, 29092, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3400_HB, - 28998, 29007, 6788, 0, + 29100, 29109, 6806, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5500_HB, - 28998, 27989, 8153, 0, + 29100, 28085, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82X58_HB, - 29011, 6953, 0, + 29113, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_825520_HB, - 29015, 27989, 8153, 0, + 29117, 28085, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82X58_PCIE_1, - 29020, 8204, 8140, 8153, 8136, 0, + 29122, 8237, 8173, 8186, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82X58_PCIE_2, - 29020, 8204, 8140, 8153, 6411, 0, + 29122, 8237, 8173, 8186, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82X58_PCIE_3, - 29020, 8204, 8140, 8153, 6422, 0, + 29122, 8237, 8173, 8186, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82X58_PCIE_4, - 29020, 8204, 8140, 8153, 6786, 0, + 29122, 8237, 8173, 8186, 6804, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82X58_PCIE_5, - 29020, 8204, 8140, 8153, 8138, 0, + 29122, 8237, 8173, 8186, 8171, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82X58_PCIE_6, - 29020, 8204, 8140, 8153, 8371, 0, + 29122, 8237, 8173, 8186, 8404, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82X58_PCIE_7, - 29020, 8204, 8140, 8153, 8373, 0, + 29122, 8237, 8173, 8186, 8406, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82X58_PCIE_8, - 29020, 8204, 8140, 8153, 6811, 0, + 29122, 8237, 8173, 8186, 6829, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82X58_PCIE_9, - 29020, 8204, 8140, 8153, 1047, 0, + 29122, 8237, 8173, 8186, 1047, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82X58_PCIE_10, - 29020, 8204, 8140, 8153, 9329, 0, + 29122, 8237, 8173, 8186, 9425, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82X58_QP0_PHY, - 29034, 28617, 0, + 29136, 28719, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5520_QP1_PHY, - 29015, 28617, 0, + 29117, 28719, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82X58_PCIE_0_0, - 29020, 8204, 8140, 8153, 8134, 0, + 29122, 8237, 8173, 8186, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82X58_PCIE_0_1, - 29020, 8204, 8140, 8153, 8134, 0, + 29122, 8237, 8173, 8186, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82X58_GPIO, - 29020, 29043, 558, 17400, 0, + 29122, 29145, 558, 17491, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82X58_RAS, - 29020, 9186, 19661, 558, 24422, 0, + 29122, 9282, 19739, 558, 24518, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82X58_QP0_P0, - 29020, 28617, 8153, 8134, 0, + 29122, 28719, 8186, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82X58_QP0_P1, - 29020, 28617, 8153, 8134, 0, + 29122, 28719, 8186, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82X58_QP1_P0, - 29020, 28617, 8153, 8136, 0, + 29122, 28719, 8186, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82X58_QP1_P1, - 29020, 28617, 8153, 8136, 0, + 29122, 28719, 8186, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82X58_IOXAPIC, - 29020, 23948, 0, + 29122, 24044, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82X58_MISC, - 29020, 29055, 0, + 29122, 29157, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82X58_THROTTLE, - 29020, 29060, 0, + 29122, 29162, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SNR_SMB_SPD, - 24394, 3961, 29071, 8962, 0, + 24490, 3961, 29173, 9058, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SNR_IMC, - 24394, 3961, 24799, 0, + 24490, 3961, 24895, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SNR_MCC, - 24394, 3961, 29075, 29080, 8020, 0, + 24490, 3961, 29177, 29182, 8053, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SNR_IMC_CM, - 24394, 3961, 24799, 20237, 29087, 0, + 24490, 3961, 24895, 20315, 29189, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SNR_CHAALL0, - 24394, 3961, 24835, 8046, 29095, 0, + 24490, 3961, 24931, 8079, 29197, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SNR_UBOX_RACU, - 24394, 3961, 24735, 29101, 0, + 24490, 3961, 24831, 29203, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SNR_UBOX_NCDECS, - 24394, 3961, 24735, 29106, 0, + 24490, 3961, 24831, 29208, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SNR_UBOX_EH, - 24394, 3961, 24735, 24815, 29113, 0, + 24490, 3961, 24831, 24911, 29215, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SNR_CPU_TRACE, - 24394, 3961, 23830, 8949, 29122, 17786, 0, + 24490, 3961, 23926, 9045, 29224, 17870, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SNR_CHAALL1, - 24394, 3961, 24835, 29127, 29095, 0, + 24490, 3961, 24931, 29229, 29197, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SNR_PCU_0, - 24394, 3961, 24849, 0, + 24490, 3961, 24945, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SNR_PCU_1, - 24394, 3961, 24849, 0, + 24490, 3961, 24945, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SNR_PCU_2, - 24394, 3961, 24849, 0, + 24490, 3961, 24945, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SNR_PCU_3, - 24394, 3961, 24849, 0, + 24490, 3961, 24945, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SNR_PCU_4, - 24394, 3961, 24849, 0, + 24490, 3961, 24945, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SNR_PCU_5, - 24394, 3961, 24849, 0, + 24490, 3961, 24945, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SNR_PCU_6, - 24394, 3961, 24849, 0, + 24490, 3961, 24945, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SNR_PCU_7, - 24394, 3961, 24849, 0, + 24490, 3961, 24945, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SNR_UBOX_NCEVENTS, - 24394, 3961, 24735, 29132, 0, + 24490, 3961, 24831, 29234, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_495_U_P_ESPI, - 29141, 6476, 23796, 27192, 23808, 0, + 29243, 6494, 23892, 27288, 23904, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_495_Y_P_ESPI, - 29141, 6476, 29145, 27192, 23808, 0, + 29243, 6494, 29247, 27288, 23904, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_495_YU_P2SB, - 29141, 6476, 23813, 0, + 29243, 6494, 23909, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_495_YU_PMC, - 29141, 6476, 23818, 0, + 29243, 6494, 23914, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_495_YU_SMB, - 29141, 6476, 8962, 0, + 29243, 6494, 9058, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_495_YU_SPI, - 29141, 6476, 17409, 23822, 0, + 29243, 6494, 17500, 23918, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_495_YU_UART_0, - 29141, 6476, 7983, 8134, 0, + 29243, 6494, 8016, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_495_YU_UART_1, - 29141, 6476, 7983, 8136, 0, + 29243, 6494, 8016, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_495_YU_GSPI_0, - 29141, 6476, 24211, 8134, 0, + 29243, 6494, 24307, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_495_YU_GSPI_1, - 29141, 6476, 24211, 8136, 0, + 29243, 6494, 24307, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_495_YU_PCIE_9, - 29141, 6476, 8204, 8140, 8153, 1047, 0, + 29243, 6494, 8237, 8173, 8186, 1047, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_495_YU_PCIE_10, - 29141, 6476, 8204, 8140, 8153, 9329, 0, + 29243, 6494, 8237, 8173, 8186, 9425, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_495_YU_PCIE_11, - 29141, 6476, 8204, 8140, 8153, 23836, 0, + 29243, 6494, 8237, 8173, 8186, 23932, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_495_YU_PCIE_12, - 29141, 6476, 8204, 8140, 8153, 14592, 0, + 29243, 6494, 8237, 8173, 8186, 14697, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_495_YU_PCIE_13, - 29141, 6476, 8204, 8140, 8153, 23839, 0, + 29243, 6494, 8237, 8173, 8186, 23935, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_495_YU_PCIE_14, - 29141, 6476, 8204, 8140, 8153, 23842, 0, + 29243, 6494, 8237, 8173, 8186, 23938, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_495_YU_PCIE_15, - 29141, 6476, 8204, 8140, 8153, 23845, 0, + 29243, 6494, 8237, 8173, 8186, 23941, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_495_YU_PCIE_16, - 29141, 6476, 8204, 8140, 8153, 19210, 0, + 29243, 6494, 8237, 8173, 8186, 19288, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_495_YU_PCIE_1, - 29141, 6476, 8204, 8140, 8153, 8136, 0, + 29243, 6494, 8237, 8173, 8186, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_495_YU_PCIE_2, - 29141, 6476, 8204, 8140, 8153, 6411, 0, + 29243, 6494, 8237, 8173, 8186, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_495_YU_PCIE_3, - 29141, 6476, 8204, 8140, 8153, 6422, 0, + 29243, 6494, 8237, 8173, 8186, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_495_YU_PCIE_4, - 29141, 6476, 8204, 8140, 8153, 6786, 0, + 29243, 6494, 8237, 8173, 8186, 6804, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_495_YU_PCIE_5, - 29141, 6476, 8204, 8140, 8153, 8138, 0, + 29243, 6494, 8237, 8173, 8186, 8171, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_495_YU_PCIE_6, - 29141, 6476, 8204, 8140, 8153, 8371, 0, + 29243, 6494, 8237, 8173, 8186, 8404, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_495_YU_PCIE_7, - 29141, 6476, 8204, 8140, 8153, 8373, 0, + 29243, 6494, 8237, 8173, 8186, 8406, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_495_YU_PCIE_8, - 29141, 6476, 8204, 8140, 8153, 6811, 0, + 29243, 6494, 8237, 8173, 8186, 6829, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_495_YU_PCIE_EMMC, - 29141, 6476, 23848, 0, + 29243, 6494, 23944, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_495_YU_I2C_4, - 29141, 6476, 17453, 6786, 0, + 29243, 6494, 17544, 6804, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_495_YU_I2C_5, - 29141, 6476, 17453, 8138, 0, + 29243, 6494, 17544, 8171, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_495_YU_UART_2, - 29141, 6476, 7983, 6411, 0, + 29243, 6494, 8016, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_495_YU_AHCI, - 29141, 6476, 8762, 8984, 0, + 29243, 6494, 8800, 9080, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_495_YU_RAID, - 29141, 6476, 8762, 8991, 0, + 29243, 6494, 8800, 9087, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_495_YU_RAID_P, - 29141, 6476, 8762, 8991, 23853, 0, + 29243, 6494, 8800, 9087, 23949, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_495_YU_HECI_1, - 29141, 6476, 24265, 8136, 0, + 29243, 6494, 24361, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_495_YU_HECI_2, - 29141, 6476, 24265, 6411, 0, + 29243, 6494, 24361, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_495_YU_IDER, - 29141, 6476, 23865, 0, + 29243, 6494, 23961, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_495_YU_KT, - 29141, 6476, 23871, 0, + 29243, 6494, 23967, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_495_YU_HECI_3, - 29141, 6476, 24265, 6422, 0, + 29243, 6494, 24361, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_495_YU_HECI_4, - 29141, 6476, 24265, 6786, 0, + 29243, 6494, 24361, 6804, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_495_YU_I2C_0, - 29141, 6476, 17453, 8134, 0, + 29243, 6494, 17544, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_495_YU_I2C_1, - 29141, 6476, 17453, 8136, 0, + 29243, 6494, 17544, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_495_YU_I2C_2, - 29141, 6476, 17453, 6411, 0, + 29243, 6494, 17544, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_495_YU_I2C_3, - 29141, 6476, 17453, 6422, 0, + 29243, 6494, 17544, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_495_YU_XHCI, - 29141, 6476, 6945, 8450, 23874, 23878, 8233, 0, + 29243, 6494, 6963, 8483, 23970, 23974, 8266, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_495_YU_XDCI, - 29141, 6476, 6945, 8450, 23874, 23882, 23886, 0, + 29243, 6494, 6963, 8483, 23970, 23978, 23982, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_495_YU_SSRAM, - 29141, 6476, 23891, 23898, 0, + 29243, 6494, 23987, 23994, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_495_YU_SDXC, - 29141, 6476, 23908, 0, + 29243, 6494, 24004, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_495_YU_GSPI_2, - 29141, 6476, 24211, 6411, 0, + 29243, 6494, 24307, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_495_YU_ISH, - 29141, 6476, 29147, 0, + 29243, 6494, 29249, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_63XXESB_EXP_UP, - 28092, 615, 4320, 29151, 8153, 0, + 28188, 615, 4320, 8860, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_63XXESB_PCIX, - 28092, 615, 4320, 7009, 8885, 6563, 0, + 28188, 615, 4320, 7027, 8981, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_63XXESB_EXP_DN_1, - 28092, 615, 4320, 29160, 8153, 23974, 0, + 28188, 615, 4320, 8869, 8186, 24070, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_63XXESB_EXP_DN_2, - 28092, 615, 4320, 29160, 8153, 28073, 0, + 28188, 615, 4320, 8869, 8186, 28169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_63XXESB_EXP_DN_3, - 28092, 615, 4320, 29160, 8153, 28100, 0, + 28188, 615, 4320, 8869, 8186, 28196, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82830MP_IO_1, - 29171, 2535, 7009, 8945, 6563, 8136, 0, + 29253, 2535, 7027, 9041, 6581, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82830MP_AGP, - 29171, 2535, 7009, 8804, 6563, 0, + 29253, 2535, 7027, 8900, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82830MP_IV, - 29171, 692, 234, 0, + 29253, 692, 234, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82830MP_IO_2, - 29171, 2535, 7009, 8945, 6563, 6411, 0, + 29253, 2535, 7027, 9041, 6581, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82855GM_MCH, - 29179, 27837, 6455, 0, + 29261, 27933, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82855GM_AGP, - 29179, 27808, 6563, 0, + 29261, 27904, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82855GM_IGD, - 29179, 29187, 692, 1716, 2418, 0, + 29261, 29269, 692, 1716, 2418, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82855GM_MC, - 29179, 29187, 4504, 6455, 0, + 29261, 29269, 4504, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82855GM_CP, - 29179, 29187, 8020, 29192, 0, + 29261, 29269, 8053, 29274, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E7525_MCH, - 29200, 4504, 6455, 8949, 0, + 29282, 4504, 6473, 9045, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E7525_MCHER, - 29200, 24815, 27817, 2418, 0, + 29282, 24911, 27913, 2418, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E7520_DMA, - 29206, 24519, 6455, 0, + 29288, 24615, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E7525_PCIE_A, - 29200, 615, 4320, 8153, 11222, 0, + 29282, 615, 4320, 8186, 11337, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E7525_PCIE_A1, - 29200, 615, 4320, 8153, 29212, 0, + 29282, 615, 4320, 8186, 29294, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E7525_PCIE_B, - 29200, 615, 4320, 8153, 5171, 0, + 29282, 615, 4320, 8186, 5171, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E7520_PCIE_B1, - 29206, 615, 4320, 8153, 15193, 0, + 29288, 615, 4320, 8186, 15289, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E7520_PCIE_C, - 29206, 615, 4320, 8153, 11224, 0, + 29288, 615, 4320, 8186, 11339, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E7520_PCIE_C1, - 29206, 615, 4320, 8153, 20146, 0, + 29288, 615, 4320, 8186, 20224, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E7520_CFG, - 29206, 26046, 8020, 0, + 29288, 26142, 8053, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_X722_A0, - 29215, 29220, 8538, 0, + 29297, 29302, 8571, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_X722_A0_VF, - 29215, 29220, 8538, 15833, 0, + 29297, 29302, 8571, 15929, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_THERM_SENS, - 29223, 23913, 23921, 0, + 29305, 24009, 24017, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_NPX16, - 29223, 8204, 24523, 29228, 29235, 0, + 29305, 8237, 24619, 29310, 29317, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_NPX8, - 29223, 8204, 24527, 29228, 29243, 0, + 29305, 8237, 24623, 29310, 29325, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_VSWP_0, - 29223, 19987, 17501, 8153, 26843, 26876, 9079, 0, + 29305, 20065, 8853, 8186, 26939, 26972, 9175, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_VSWP_1, - 29223, 19987, 17501, 8153, 26843, 26876, 9097, 0, + 29305, 20065, 8853, 8186, 26939, 26972, 9193, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_VSWP_2, - 29223, 19987, 17501, 8153, 26843, 26876, 9100, 0, + 29305, 20065, 8853, 8186, 26939, 26972, 9196, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_VSWP_3, - 29223, 19987, 17501, 8153, 26843, 8538, 29250, 0, + 29305, 20065, 8853, 8186, 26939, 8571, 29332, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_VSWP_5, - 29223, 19987, 17501, 8153, 26843, 29255, 29262, 0, + 29305, 20065, 8853, 8186, 26939, 29337, 29344, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_QAT, - 29223, 26876, 0, + 29305, 26972, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_QAT_VF, - 29223, 26876, 19987, 8125, 0, + 29305, 26972, 20065, 8158, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_X722, - 29215, 8538, 0, + 29297, 8571, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_X722_VF, - 29215, 8538, 15833, 0, + 29297, 8571, 15929, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_X722_KX, - 29215, 8538, 25339, 0, + 29297, 8571, 25435, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_X722_QSFP, - 29215, 8538, 26523, 0, + 29297, 8571, 26619, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_X722_SFP, - 29215, 8538, 25334, 29270, 0, + 29297, 8571, 25430, 29352, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_X722_1G_BASET, - 29215, 29274, 0, + 29297, 29356, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_X722_10G_BASET, - 29215, 26600, 0, + 29297, 26696, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_X722_I_SFP, - 29215, 29282, 8538, 25334, 0, + 29297, 29364, 8571, 25430, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801JD_SATA_IDE, - 29284, 8762, 6455, 10481, 10486, 0, + 29366, 8800, 6473, 10602, 8830, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801JD_SATA_AHCI, - 29284, 8762, 6455, 10492, 10486, 0, + 29366, 8800, 6473, 10607, 8830, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801JD_SATA_RAID, - 29284, 8762, 6455, 17879, 10486, 0, + 29366, 8800, 6473, 8824, 8830, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801JD_SATA_IDE2, - 29284, 8762, 6455, 10481, 10486, 0, + 29366, 8800, 6473, 10602, 8830, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801JDO_LPC, - 29292, 8958, 3018, 6563, 0, + 29374, 9054, 3018, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801JIR_LPC, - 29301, 8958, 3018, 6563, 0, + 29383, 9054, 3018, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801JIB_LPC, - 29310, 8958, 3018, 6563, 0, + 29392, 9054, 3018, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801JD_LPC, - 29284, 8958, 3018, 6563, 0, + 29366, 9054, 3018, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801JI_SATA_IDE, - 29319, 8762, 6455, 10481, 10486, 0, + 29401, 8800, 6473, 10602, 8830, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801JI_SATA_AHCI, - 29319, 8762, 6455, 10492, 10486, 0, + 29401, 8800, 6473, 10607, 8830, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801JI_SATA_RAID, - 29319, 8762, 6455, 17879, 10486, 0, + 29401, 8800, 6473, 8824, 8830, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801JI_SATA_IDE2, - 29319, 8762, 6455, 10481, 10486, 0, + 29401, 8800, 6473, 10602, 8830, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801JI_SMB, - 29319, 8962, 6455, 0, + 29401, 9058, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801JI_THERMAL, - 29319, 23913, 6455, 0, + 29401, 24009, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801JI_USB_1, - 29319, 6945, 27657, 6455, 0, + 29401, 6963, 27753, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801JI_USB_2, - 29319, 6945, 27657, 6455, 0, + 29401, 6963, 27753, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801JI_USB_3, - 29319, 6945, 27657, 6455, 0, + 29401, 6963, 27753, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801JI_USB_4, - 29319, 6945, 27657, 6455, 0, + 29401, 6963, 27753, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801JI_USB_5, - 29319, 6945, 27657, 6455, 0, + 29401, 6963, 27753, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801JI_USB_6, - 29319, 6945, 27657, 6455, 0, + 29401, 6963, 27753, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801JI_EHCI_1, - 29319, 6945, 8727, 6455, 0, + 29401, 6963, 8760, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801JI_EHCI_2, - 29319, 6945, 8727, 6455, 0, + 29401, 6963, 8760, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801JI_HDA, - 29319, 28076, 28081, 7054, 6455, 0, + 29401, 28172, 28177, 7072, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801JI_PCIE_1, - 29319, 615, 4320, 8153, 0, + 29401, 615, 4320, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801JI_PCIE_2, - 29319, 615, 4320, 8153, 0, + 29401, 615, 4320, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801JI_PCIE_3, - 29319, 615, 4320, 8153, 0, + 29401, 615, 4320, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801JI_PCIE_4, - 29319, 615, 4320, 8153, 0, + 29401, 615, 4320, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801JI_PCIE_5, - 29319, 615, 4320, 8153, 0, + 29401, 615, 4320, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801JI_PCIE_6, - 29319, 615, 4320, 8153, 0, + 29401, 615, 4320, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801JI_LAN, - 29319, 4540, 6455, 0, + 29401, 4540, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801JD_SMB, - 29284, 8962, 6455, 0, + 29366, 9058, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801JD_THERMAL, - 29284, 23913, 6455, 0, + 29366, 24009, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801JD_USB_1, - 29284, 6945, 27657, 6455, 0, + 29366, 6963, 27753, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801JD_USB_2, - 29284, 6945, 27657, 6455, 0, + 29366, 6963, 27753, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801JD_USB_3, - 29284, 6945, 27657, 6455, 0, + 29366, 6963, 27753, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801JD_USB_4, - 29284, 6945, 27657, 6455, 0, + 29366, 6963, 27753, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801JD_USB_5, - 29284, 6945, 27657, 6455, 0, + 29366, 6963, 27753, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801JD_USB_6, - 29284, 6945, 27657, 6455, 0, + 29366, 6963, 27753, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801JD_EHCI_1, - 29284, 6945, 8727, 6455, 0, + 29366, 6963, 8760, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801JD_EHCI_2, - 29284, 6945, 8727, 6455, 0, + 29366, 6963, 8760, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801JD_HDA, - 29284, 28076, 28081, 7054, 6455, 0, + 29366, 28172, 28177, 7072, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801JD_PCIE_1, - 29284, 615, 4320, 8153, 0, + 29366, 615, 4320, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801JD_PCIE_2, - 29284, 615, 4320, 8153, 0, + 29366, 615, 4320, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801JD_PCIE_3, - 29284, 615, 4320, 8153, 0, + 29366, 615, 4320, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801JD_PCIE_4, - 29284, 615, 4320, 8153, 0, + 29366, 615, 4320, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801JD_PCIE_5, - 29284, 615, 4320, 8153, 0, + 29366, 615, 4320, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801JD_PCIE_6, - 29284, 615, 4320, 8153, 0, + 29366, 615, 4320, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801JD_LAN, - 29284, 4540, 6455, 0, + 29366, 4540, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_P55_LPC, - 29327, 8958, 3018, 6563, 0, + 29409, 9054, 3018, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PM55_LPC, - 29331, 8958, 3018, 6563, 0, + 29413, 9054, 3018, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_H55_LPC, - 29336, 8958, 3018, 6563, 0, + 29418, 9054, 3018, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_QM57_LPC, - 29340, 8958, 3018, 6563, 0, + 29422, 9054, 3018, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_H57_LPC, - 29345, 8958, 3018, 6563, 0, + 29427, 9054, 3018, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_HM55_LPC, - 29349, 8958, 3018, 6563, 0, + 29431, 9054, 3018, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_Q57_LPC, - 29354, 8958, 3018, 6563, 0, + 29436, 9054, 3018, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_HM57_LPC, - 29358, 8958, 3018, 6563, 0, + 29440, 9054, 3018, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_QS57_LPC, - 29363, 8958, 3018, 6563, 0, + 29445, 9054, 3018, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3400_LPC, - 13779, 8958, 3018, 6563, 0, + 13889, 9054, 3018, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3420_LPC, - 29368, 8958, 3018, 6563, 0, + 29450, 9054, 3018, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3450_LPC, - 13803, 8958, 3018, 6563, 0, + 13913, 9054, 3018, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3400_SATA_1, - 13779, 8762, 0, + 13889, 8800, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3400_SATA_2, - 13779, 8762, 0, + 13889, 8800, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3400_AHCI_1, - 13779, 8775, 0, + 13889, 8819, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3400_AHCI_2, - 13779, 8775, 0, + 13889, 8819, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3400_RAID_1, - 13779, 6450, 0, + 13889, 6468, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3400_SATA_3, - 13779, 8762, 0, + 13889, 8800, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3400_SATA_4, - 13779, 8762, 0, + 13889, 8800, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3400_AHCI_3, - 13779, 8775, 0, + 13889, 8819, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3400_RAID_2, - 13779, 6450, 0, + 13889, 6468, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3400_SATA_5, - 13779, 8762, 0, + 13889, 8800, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3400_SATA_6, - 13779, 8762, 0, + 13889, 8800, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3400_AHCI_4, - 13779, 8775, 0, + 13889, 8819, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3400_SMB, - 13779, 8962, 0, + 13889, 9058, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3400_THERMAL, - 13779, 23913, 0, + 13889, 24009, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3400_EHCI_1, - 13779, 6945, 8727, 0, + 13889, 6963, 8760, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3400_UHCI_1, - 13779, 6945, 0, + 13889, 6963, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3400_UHCI_2, - 13779, 6945, 0, + 13889, 6963, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3400_UHCI_3, - 13779, 6945, 0, + 13889, 6963, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3400_UHCI_4, - 13779, 6945, 0, + 13889, 6963, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3400_UHCI_5, - 13779, 6945, 0, + 13889, 6963, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3400_UHCI_6, - 13779, 6945, 0, + 13889, 6963, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3400_EHCI_2, - 13779, 6945, 29373, 0, + 13889, 6963, 29455, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3400_UHCI_7, - 13779, 6945, 0, + 13889, 6963, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3400_UHCI_8, - 13779, 6945, 0, + 13889, 6963, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3400_PCIE_1, - 13779, 8204, 0, + 13889, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3400_PCIE_2, - 13779, 8204, 0, + 13889, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3400_PCIE_3, - 13779, 8204, 0, + 13889, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3400_PCIE_4, - 13779, 8204, 0, + 13889, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3400_PCIE_5, - 13779, 8204, 0, + 13889, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3400_PCIE_6, - 13779, 8204, 0, + 13889, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3400_PCIE_7, - 13779, 8204, 0, + 13889, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3400_PCIE_8, - 13779, 8204, 0, + 13889, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3400_HDA, - 13779, 8230, 7054, 0, + 13889, 8263, 7072, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_QS57_HDA, - 29363, 8230, 7054, 0, + 29445, 8263, 7072, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3400_MEI_1, - 13779, 23861, 0, + 13889, 23957, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3400_MEI_2, - 13779, 23861, 0, + 13889, 23957, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3400_PT_IDER, - 13779, 29378, 28585, 0, + 13889, 29460, 28687, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3400_KT, - 13779, 23871, 0, + 13889, 23967, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5_HB, - 24700, 6953, 0, + 24796, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5_PCIE_DMI, - 24700, 8204, 24546, 24711, 24717, 0, + 24796, 8237, 24642, 24807, 24813, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5_PCIE_1, - 24700, 8204, 24527, 22213, 24546, 0, + 24796, 8237, 24623, 22309, 24642, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5_PCIE_2, - 24700, 8204, 24527, 22213, 24546, 0, + 24796, 8237, 24623, 22309, 24642, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5_PCIE_3, - 24700, 8204, 24723, 24527, 22213, 24546, 0, + 24796, 8237, 24819, 24623, 22309, 24642, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5_PCIE_4, - 24700, 8204, 24723, 24527, 22213, 24546, 0, + 24796, 8237, 24819, 24623, 22309, 24642, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5_PCIE_5, - 24700, 8204, 24723, 24527, 22213, 24546, 0, + 24796, 8237, 24819, 24623, 22309, 24642, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5_PCIE_6, - 24700, 8204, 24723, 24527, 22213, 24546, 0, + 24796, 8237, 24819, 24623, 22309, 24642, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5_PCIE_7, - 24700, 8204, 24723, 24527, 22213, 24546, 0, + 24796, 8237, 24819, 24623, 22309, 24642, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5_PCIE_8, - 24700, 8204, 24723, 24527, 22213, 24546, 0, + 24796, 8237, 24819, 24623, 22309, 24642, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5_PCIE_9, - 24700, 8204, 24723, 24527, 22213, 24546, 0, + 24796, 8237, 24819, 24623, 22309, 24642, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5_PCIE_10, - 24700, 8204, 24723, 24527, 22213, 24546, 0, + 24796, 8237, 24819, 24623, 22309, 24642, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5_NTB_NTB, - 24700, 8307, 8311, 6563, 29381, 0, + 24796, 8340, 8344, 6581, 29463, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5_NTB_RP, - 24700, 8307, 8311, 6563, 29398, 0, + 24796, 8340, 8344, 6581, 29480, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5_NTB_SECONDARY, - 24700, 8307, 8311, 6563, 8323, 0, + 24796, 8340, 8344, 6581, 8356, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5_DMA_1, - 24700, 24519, 0, + 24796, 24615, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5_DMA_2, - 24700, 24519, 0, + 24796, 24615, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5_DMA_3, - 24700, 24519, 0, + 24796, 24615, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5_DMA_4, - 24700, 24519, 0, + 24796, 24615, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5_DMA_5, - 24700, 24519, 0, + 24796, 24615, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5_DMA_6, - 24700, 24519, 0, + 24796, 24615, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5_DMA_7, - 24700, 24519, 0, + 24796, 24615, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5_DMA_8, - 24700, 24519, 0, + 24796, 24615, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5_ADDRMAP, - 24700, 8034, 8042, 0, + 24796, 8067, 8075, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5_ERR, - 24700, 24815, 27817, 0, + 24796, 24911, 27913, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5_IOAPIC, - 24700, 8945, 24759, 0, + 24796, 9041, 24855, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5_QD_1, - 24700, 29414, 17879, 29424, 0, + 24796, 29496, 8824, 29506, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5_QD_2, - 24700, 29414, 17879, 29424, 0, + 24796, 29496, 8824, 29506, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5_IIO, - 24700, 29429, 17501, 558, 29433, 29437, 0, + 24796, 29511, 8853, 558, 29515, 29519, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5_R2PCIE_MON, - 24700, 8204, 24787, 0, + 24796, 8237, 24883, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5_QPI_L_MON_0, - 24700, 24795, 8075, 24787, 0, + 24796, 24891, 8108, 24883, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5_QPI_L_MON_1, - 24700, 24795, 8075, 24787, 0, + 24796, 24891, 8108, 24883, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5_HA_2, - 24700, 24764, 24769, 0, + 24796, 24860, 24865, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5_IMC_RAS, - 24700, 24422, 0, + 24796, 24518, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5_QPI_L_0, - 24700, 24795, 8075, 8134, 0, + 24796, 24891, 8108, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5_QPI_L_REUT_0_1, - 24700, 24795, 8075, 24803, 8134, 0, + 24796, 24891, 8108, 24899, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5_QPI_L_REUT_0_2, - 24700, 24795, 8075, 24803, 8134, 0, + 24796, 24891, 8108, 24899, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5_QPI_L_1, - 24700, 24795, 8075, 8136, 0, + 24796, 24891, 8108, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5_QPI_L_REUT_1_1, - 24700, 24795, 8075, 24803, 8136, 0, + 24796, 24891, 8108, 24899, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5_QPI_L_REUT_1_2, - 24700, 24795, 8075, 24803, 8136, 0, + 24796, 24891, 8108, 24899, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5_HA_1, - 24700, 24764, 24769, 0, + 24796, 24860, 24865, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5_IMC_TA, - 24700, 24799, 14741, 8034, 2173, 23913, 0, + 24796, 24895, 14837, 8067, 2173, 24009, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5_IMC_TAD_1, - 24700, 24799, 29445, 14741, 8034, 6919, 0, + 24796, 24895, 29527, 14837, 8067, 6937, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5_IMC_TAD_2, - 24700, 24799, 29445, 14741, 8034, 6919, 0, + 24796, 24895, 29527, 14837, 8067, 6937, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5_IMC_TAD_3, - 24700, 24799, 29445, 14741, 8034, 6919, 0, + 24796, 24895, 29527, 14837, 8067, 6937, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5_IMC_TAD_4, - 24700, 24799, 29445, 14741, 8034, 6919, 0, + 24796, 24895, 29527, 14837, 8067, 6937, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5_IMC_TAD_5, - 24700, 24799, 29445, 14741, 8034, 6919, 0, + 24796, 24895, 29527, 14837, 8067, 6937, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5_IMC_THERMAL_1, - 24700, 24799, 23913, 0, + 24796, 24895, 24009, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5_IMC_THERMAL_2, - 24700, 24799, 23913, 0, + 24796, 24895, 24009, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5_IMC_ERR_2, - 24700, 24799, 24815, 0, + 24796, 24895, 24911, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5_IMC_ERR_3, - 24700, 24799, 24815, 0, + 24796, 24895, 24911, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5_IMC_THERMAL_3, - 24700, 24799, 23913, 0, + 24796, 24895, 24009, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5_IMC_THERMAL_4, - 24700, 24799, 23913, 0, + 24796, 24895, 24009, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5_IMC_ERR_4, - 24700, 24799, 24815, 0, + 24796, 24895, 24911, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5_IMC_ERR_5, - 24700, 24799, 24815, 0, + 24796, 24895, 24911, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5_IMC_DDRIO, - 24700, 24799, 24821, 0, + 24796, 24895, 24917, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5_PCU_0, - 24700, 24849, 0, + 24796, 24945, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5_PCU_1, - 24700, 24849, 0, + 24796, 24945, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5_PCU_2, - 24700, 24849, 0, + 24796, 24945, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5_PCU_3, - 24700, 24849, 0, + 24796, 24945, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5_SCRATCH_1, - 24700, 29454, 0, + 24796, 29536, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5_SCRATCH_2, - 24700, 29454, 0, + 24796, 29536, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5_R2PCIE, - 24700, 24728, 0, + 24796, 24824, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5_R3_QPI, - 24700, 24795, 0, + 24796, 24891, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5_UNICAST, - 24700, 24867, 0, + 24796, 24963, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5_SAD_1, - 24700, 24853, 0, + 24796, 24949, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5_BROADCAST, - 24700, 24857, 0, + 24796, 24953, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E5_SAD_2, - 24700, 24853, 0, + 24796, 24949, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONE_S_D_HOST_DRAM_2C, - 24530, 11226, 26966, 29462, 6953, 24459, 8046, 0, + 24626, 11341, 27062, 29544, 6971, 24555, 8079, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONE_H_HOST_DRAM_4C, - 24530, 11226, 29471, 6953, 24459, 8046, 0, + 24626, 11341, 29553, 6971, 24555, 8079, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONE_S_W_HOST_DRAM_4C, - 24530, 11226, 26966, 29475, 6953, 24459, 8046, 0, + 24626, 11341, 27062, 29557, 6971, 24555, 8079, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE8G_S_HOST_DRAM_4C, - 23679, 29479, 29482, 6953, 24459, 8046, 0, + 23775, 29561, 29564, 6971, 24555, 8079, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE8G_H_H_HOST_DRAM_8C, - 23679, 29479, 26944, 29486, 6953, 24459, 8046, 0, + 23775, 29561, 27040, 29568, 6971, 24555, 8079, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONE_S_D_HOST_DRAM_8C, - 24530, 11226, 26966, 29462, 6953, 24459, 8046, 0, + 24626, 11341, 27062, 29544, 6971, 24555, 8079, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONE_S_W_HOST_DRAM_8C, - 24530, 11226, 26966, 29475, 6953, 24459, 8046, 0, + 24626, 11341, 27062, 29557, 6971, 24555, 8079, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONE_S_S_HOST_DRAM_8C, - 24530, 11226, 26966, 29492, 6953, 24459, 8046, 0, + 24626, 11341, 27062, 29574, 6971, 24555, 8079, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONE_S_S_HOST_DRAM_4C, - 24530, 11226, 26966, 29492, 6953, 24459, 8046, 0, + 24626, 11341, 27062, 29574, 6971, 24555, 8079, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE8G_U_HOST_DRAM_4C, - 23679, 29479, 26958, 6953, 24459, 8046, 0, + 23775, 29561, 27054, 6971, 24555, 8079, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE8G_U_HOST_DRAM_2C, - 23679, 29479, 26958, 6953, 24459, 8046, 0, + 23775, 29561, 27054, 6971, 24555, 8079, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONE_H_HOST_DRAM_6C, - 24530, 11226, 29471, 6953, 24459, 8046, 0, + 24626, 11341, 29553, 6971, 24555, 8079, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE8G_PCIE_X16, - 23679, 29479, 29482, 8204, 24523, 0, + 23775, 29561, 29564, 8237, 24619, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE8G_PCIE_X8, - 23679, 29479, 29482, 8204, 24523, 0, + 23775, 29561, 29564, 8237, 24619, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE8G_PCIE_X4, - 23679, 29479, 29482, 8204, 24523, 0, + 23775, 29561, 29564, 8237, 24619, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_COFLK_IGD_1, - 28916, 1716, 29500, 0, + 29018, 1716, 29582, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_COFLK_IGD_2, - 28916, 1716, 29504, 0, + 29018, 1716, 29586, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_COFLK_IGD_3, - 28916, 1716, 29504, 0, + 29018, 1716, 29586, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_COFLK_IGD_4, - 28916, 1716, 29500, 0, + 29018, 1716, 29582, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_COFLK_H_GT2_4, - 28916, 1716, 29508, 0, + 29018, 1716, 29590, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONE_IGD, - 28916, 1716, 29508, 0, + 29018, 1716, 29590, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_COFLK_S_GT2_4, - 28916, 1716, 29504, 0, + 29018, 1716, 29586, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_COFLK_S_GT1_3, - 28916, 1716, 29500, 0, + 29018, 1716, 29582, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_COFLK_S_GT2_5, - 28916, 1716, 29508, 0, + 29018, 1716, 29590, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_COFLK_IGD_5, - 28916, 1716, 29504, 0, + 29018, 1716, 29586, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_COFLK_H_GT1, - 28916, 1716, 29500, 0, + 29018, 1716, 29582, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_WHISKYLK_IGD_1, - 28916, 1716, 29513, 0, + 29018, 1716, 29595, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_WHISKYLK_IGD_2, - 28916, 1716, 29500, 0, + 29018, 1716, 29582, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_COFLK_IGD_6, - 24496, 19240, 1716, 29517, 0, + 24592, 19318, 1716, 29599, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_COFLK_U_GT3_2, - 24496, 19240, 1716, 29521, 0, + 24592, 19318, 1716, 29603, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_COFLK_U_GT3_4, - 24496, 19240, 1716, 29517, 0, + 24592, 19318, 1716, 29599, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_COFLK_U_GT2_2, - 28916, 1716, 29513, 0, + 29018, 1716, 29595, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE8G_S_HOST_DRAM_6C, - 23679, 29479, 29482, 6953, 24459, 8046, 0, + 23775, 29561, 29564, 6971, 24555, 8079, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE8G_H_H_HOST_DRAM_6C, - 23679, 29479, 26944, 29486, 6953, 24459, 8046, 0, + 23775, 29561, 27040, 29568, 6971, 24555, 8079, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONE_S_W_HOST_DRAM_6C, - 24530, 11226, 26966, 29475, 6953, 24459, 8046, 0, + 24626, 11341, 27062, 29557, 6971, 24555, 8079, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONE_S_S_HOST_DRAM_6C, - 24530, 11226, 26966, 29492, 6953, 24459, 8046, 0, + 24626, 11341, 27062, 29574, 6971, 24555, 8079, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONE_U_HOST_DRAM_2C, - 24530, 11226, 26958, 6953, 24459, 8046, 0, + 24626, 11341, 27054, 6971, 24555, 8079, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONE_U_HOST_DRAM_4C, - 24530, 11226, 26958, 6953, 24459, 8046, 0, + 24626, 11341, 27054, 6971, 24555, 8079, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5400_HB, - 29525, 6953, 0, + 29607, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5400A_HB, - 29530, 6953, 0, + 29612, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5400B_HB, - 29536, 6953, 0, + 29618, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5400_PCIE_1, - 29525, 8204, 0, + 29607, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5400_PCIE_2, - 29525, 8204, 0, + 29607, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5400_PCIE_3, - 29525, 8204, 0, + 29607, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5400_PCIE_4, - 29525, 8204, 0, + 29607, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5400_PCIE_5, - 29525, 8204, 0, + 29607, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5400_PCIE_6, - 29525, 8204, 0, + 29607, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5400_PCIE_7, - 29525, 8204, 0, + 29607, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5400_PCIE_8, - 29525, 8204, 0, + 29607, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5400_PCIE_9, - 29525, 8204, 0, + 29607, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_IOAT_SNB, - 24740, 29542, 0, + 24836, 29624, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5400_FSBINT, - 29525, 29546, 0, + 29607, 29628, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5400_CE, - 29525, 29565, 24997, 0, + 29607, 29647, 25093, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5400_IOAPIC, - 29525, 8930, 0, + 29607, 9026, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5400_RAS_0, - 29525, 24422, 0, + 29607, 24518, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5400_RAS_1, - 29525, 24422, 0, + 29607, 24518, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E600_VGA, - 29575, 692, 8679, 0, + 29657, 692, 8712, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E600_HB, - 29575, 6953, 0, + 29657, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_WL_2200BG, - 25268, 4540, 29580, 5755, 5909, 0, + 25364, 4540, 29662, 5773, 5927, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_WL_2225BG, - 25268, 4540, 29587, 5755, 5909, 0, + 25364, 4540, 29669, 5773, 5927, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_WL_3945ABG_1, - 25268, 4540, 29594, 5755, 5909, 0, + 25364, 4540, 29676, 5773, 5927, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_WL_2915ABG_1, - 25268, 4540, 29602, 5755, 5909, 0, + 25364, 4540, 29684, 5773, 5927, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_WL_2915ABG_2, - 25268, 4540, 29602, 5755, 5909, 0, + 25364, 4540, 29684, 5773, 5927, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_WL_3945ABG_2, - 25268, 4540, 29594, 5755, 5909, 0, + 25364, 4540, 29676, 5773, 5927, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_WIFI_LINK_4965_1, - 4761, 23709, 8075, 29610, 0, + 4761, 23805, 8108, 29692, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_WIFI_LINK_6000_3X3_1, - 23684, 29615, 29626, 0, + 23780, 29697, 29708, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_WIFI_LINK_6000_IPA_1, - 23684, 23693, 29631, 0, + 23780, 23789, 29713, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_WIFI_LINK_4965_3, - 4761, 23709, 8075, 29610, 0, + 4761, 23805, 8108, 29692, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_WIFI_LINK_4965_2, - 4761, 23709, 8075, 29610, 0, + 4761, 23805, 8108, 29692, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_WIFI_LINK_5100_1, - 23709, 8075, 12072, 0, + 23805, 8108, 12182, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_WIFI_LINK_4965_4, - 4761, 23709, 8075, 29610, 0, + 4761, 23805, 8108, 29692, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_WIFI_LINK_5300_1, - 23709, 8075, 19010, 0, + 23805, 8108, 19088, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_WIFI_LINK_5300_2, - 23709, 8075, 19010, 0, + 23805, 8108, 19088, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_WIFI_LINK_5100_2, - 23709, 8075, 12072, 0, + 23805, 8108, 12182, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_WIFI_LINK_6000_3X3_2, - 23684, 29615, 29626, 0, + 23780, 29697, 29708, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_WIFI_LINK_6000_IPA_2, - 23684, 23693, 29631, 0, + 23780, 23789, 29713, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_WIFI_LINK_5350_1, - 23709, 8075, 29636, 0, + 23805, 8108, 29718, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_WIFI_LINK_5350_2, - 23709, 8075, 29636, 0, + 23805, 8108, 29718, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_WIFI_LINK_5150_1, - 23709, 8075, 29641, 0, + 23805, 8108, 29723, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_WIFI_LINK_5150_2, - 23709, 8075, 29641, 0, + 23805, 8108, 29723, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_Q570_ESPI, - 29646, 23808, 0, + 29728, 23904, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_Z590_ESPI, - 29651, 23808, 0, + 29733, 23904, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_H570_ESPI, - 29656, 23808, 0, + 29738, 23904, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_B560_ESPI, - 29661, 23808, 0, + 29743, 23904, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_H510_ESPI, - 29666, 23808, 0, + 29748, 23904, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_W580_ESPI, - 29671, 23808, 0, + 29753, 23904, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_H_P2SB, - 8780, 6476, 29676, 23813, 0, + 8840, 6494, 29758, 23909, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_H_PMC, - 8780, 6476, 29676, 23818, 0, + 8840, 6494, 29758, 23914, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_H_SMB, - 8780, 6476, 29676, 8962, 0, + 8840, 6494, 29758, 9058, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_H_SPI, - 8780, 6476, 29676, 17409, 23822, 0, + 8840, 6494, 29758, 17500, 23918, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_H_TRACE, - 8780, 6476, 29676, 23830, 8949, 0, + 8840, 6494, 29758, 23926, 9045, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_H_UART_2, - 8780, 6476, 29676, 7983, 6411, 0, + 8840, 6494, 29758, 8016, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_H_UART_0, - 8780, 6476, 29676, 7983, 8134, 0, + 8840, 6494, 29758, 8016, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_H_UART_1, - 8780, 6476, 29676, 7983, 8136, 0, + 8840, 6494, 29758, 8016, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_H_GSPI_0, - 8780, 6476, 29676, 24211, 8134, 0, + 8840, 6494, 29758, 24307, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_H_GSPI_1, - 8780, 6476, 29676, 24211, 8136, 0, + 8840, 6494, 29758, 24307, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_H_I2C_4, - 8780, 6476, 29676, 17453, 6786, 0, + 8840, 6494, 29758, 17544, 6804, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_H_I2C_5, - 8780, 6476, 29676, 17453, 8138, 0, + 8840, 6494, 29758, 17544, 8171, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_H_PCIE_9, - 8780, 6476, 29676, 8204, 26891, 1047, 0, + 8840, 6494, 29758, 8237, 26987, 1047, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_H_PCIE_10, - 8780, 6476, 29676, 8204, 26891, 9329, 0, + 8840, 6494, 29758, 8237, 26987, 9425, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_H_PCIE_11, - 8780, 6476, 29676, 8204, 26891, 23836, 0, + 8840, 6494, 29758, 8237, 26987, 23932, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_H_PCIE_12, - 8780, 6476, 29676, 8204, 26891, 14592, 0, + 8840, 6494, 29758, 8237, 26987, 14697, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_H_PCIE_13, - 8780, 6476, 29676, 8204, 26891, 23839, 0, + 8840, 6494, 29758, 8237, 26987, 23935, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_H_PCIE_14, - 8780, 6476, 29676, 8204, 26891, 23842, 0, + 8840, 6494, 29758, 8237, 26987, 23938, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_H_PCIE_15, - 8780, 6476, 29676, 8204, 26891, 23845, 0, + 8840, 6494, 29758, 8237, 26987, 23941, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_H_PCIE_16, - 8780, 6476, 29676, 8204, 26891, 19210, 0, + 8840, 6494, 29758, 8237, 26987, 19288, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_H_PCIE_1, - 8780, 6476, 29676, 8204, 26891, 8136, 0, + 8840, 6494, 29758, 8237, 26987, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_H_PCIE_2, - 8780, 6476, 29676, 8204, 26891, 6411, 0, + 8840, 6494, 29758, 8237, 26987, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_H_PCIE_3, - 8780, 6476, 29676, 8204, 26891, 6422, 0, + 8840, 6494, 29758, 8237, 26987, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_H_PCIE_4, - 8780, 6476, 29676, 8204, 26891, 6786, 0, + 8840, 6494, 29758, 8237, 26987, 6804, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_H_PCIE_5, - 8780, 6476, 29676, 8204, 26891, 8138, 0, + 8840, 6494, 29758, 8237, 26987, 8171, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_H_PCIE_6, - 8780, 6476, 29676, 8204, 26891, 8371, 0, + 8840, 6494, 29758, 8237, 26987, 8404, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_H_PCIE_7, - 8780, 6476, 29676, 8204, 26891, 8373, 0, + 8840, 6494, 29758, 8237, 26987, 8406, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_H_PCIE_8, - 8780, 6476, 29676, 8204, 26891, 6811, 0, + 8840, 6494, 29758, 8237, 26987, 6829, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_H_PCIE_17, - 8780, 6476, 29676, 8204, 26891, 24225, 0, + 8840, 6494, 29758, 8237, 26987, 24321, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_H_PCIE_18, - 8780, 6476, 29676, 8204, 26891, 24228, 0, + 8840, 6494, 29758, 8237, 26987, 24324, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_H_PCIE_19, - 8780, 6476, 29676, 8204, 26891, 24231, 0, + 8840, 6494, 29758, 8237, 26987, 24327, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_H_PCIE_20, - 8780, 6476, 29676, 8204, 26891, 11629, 0, + 8840, 6494, 29758, 8237, 26987, 11739, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_H_PCIE_21, - 8780, 6476, 29676, 8204, 26891, 24216, 0, + 8840, 6494, 29758, 8237, 26987, 24312, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_H_PCIE_22, - 8780, 6476, 29676, 8204, 26891, 14584, 0, + 8840, 6494, 29758, 8237, 26987, 14689, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_H_PCIE_23, - 8780, 6476, 29676, 8204, 26891, 24219, 0, + 8840, 6494, 29758, 8237, 26987, 24315, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_H_PCIE_24, - 8780, 6476, 29676, 8204, 26891, 24222, 0, + 8840, 6494, 29758, 8237, 26987, 24318, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_H_HDA, - 8780, 6476, 29676, 8230, 7054, 0, + 8840, 6494, 29758, 8263, 7072, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_H_THC_0, - 8780, 6476, 29676, 29682, 8134, 0, + 8840, 6494, 29758, 29764, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_H_THC_1, - 8780, 6476, 29676, 29682, 8136, 0, + 8840, 6494, 29758, 29764, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_H_D_AHCI, - 8780, 6476, 29676, 8762, 29686, 29693, 0, + 8840, 6494, 29758, 8800, 29768, 29775, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_H_M_AHCI, - 8780, 6476, 29676, 8762, 29686, 29702, 0, + 8840, 6494, 29758, 8800, 29768, 29784, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_H_D_RAID, - 8780, 6476, 29676, 8762, 29710, 29693, 0, + 8840, 6494, 29758, 8800, 29792, 29775, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_H_M_RAID, - 8780, 6476, 29676, 8762, 29710, 29702, 0, + 8840, 6494, 29758, 8800, 29792, 29784, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_H_D_RAID_P, - 8780, 6476, 29676, 8762, 29710, 29693, 23853, 0, + 8840, 6494, 29758, 8800, 29792, 29775, 23949, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_H_M_RAID_P, - 8780, 6476, 29676, 8762, 29710, 29702, 23853, 0, + 8840, 6494, 29758, 8800, 29792, 29784, 23949, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_H_I2C_6, - 8780, 6476, 29676, 17453, 8371, 0, + 8840, 6494, 29758, 17544, 8404, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_H_UART_3, - 8780, 6476, 29676, 7983, 6422, 0, + 8840, 6494, 29758, 8016, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_H_HECI_1, - 8780, 6476, 29676, 24265, 8136, 0, + 8840, 6494, 29758, 24361, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_H_HECI_2, - 8780, 6476, 29676, 24265, 6411, 0, + 8840, 6494, 29758, 24361, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_H_IDER, - 8780, 6476, 29676, 23865, 0, + 8840, 6494, 29758, 23961, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_H_KT, - 8780, 6476, 29676, 23871, 0, + 8840, 6494, 29758, 23967, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_H_HECI_3, - 8780, 6476, 29676, 24265, 6422, 0, + 8840, 6494, 29758, 24361, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_H_HECI_4, - 8780, 6476, 29676, 24265, 6786, 0, + 8840, 6494, 29758, 24361, 6804, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_H_I2C_0, - 8780, 6476, 29676, 17453, 8134, 0, + 8840, 6494, 29758, 17544, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_H_I2C_1, - 8780, 6476, 29676, 17453, 8136, 0, + 8840, 6494, 29758, 17544, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_H_I2C_2, - 8780, 6476, 29676, 17453, 6411, 0, + 8840, 6494, 29758, 17544, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_H_I2C_3, - 8780, 6476, 29676, 17453, 6422, 0, + 8840, 6494, 29758, 17544, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_H_XHCI, - 8780, 6476, 29676, 6945, 8450, 23874, 29717, 8233, 0, + 8840, 6494, 29758, 6963, 8483, 23970, 29799, 8266, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_H_XDCI, - 8780, 6476, 29676, 6945, 8450, 23874, 23882, 23886, 0, + 8840, 6494, 29758, 6963, 8483, 23970, 23978, 23982, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_H_SSRAM, - 8780, 6476, 29676, 23891, 23898, 0, + 8840, 6494, 29758, 23987, 23994, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_H_CNVI, - 8780, 6476, 29676, 23903, 23709, 0, + 8840, 6494, 29758, 23999, 23805, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_H_GSPI_2, - 8780, 6476, 29676, 24211, 6411, 0, + 8840, 6494, 29758, 24307, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_H_ISH, - 8780, 6476, 29676, 692, 23921, 8949, 0, + 8840, 6494, 29758, 692, 24017, 9045, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_H_GSPI_3, - 8780, 6476, 29676, 24211, 6422, 0, + 8840, 6494, 29758, 24307, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_DPTF, - 29721, 23674, 28931, 0, + 29803, 23770, 29033, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_TROUTER_2C_S, - 29721, 23674, 24885, 24897, 29729, 4943, 26690, 0, + 29803, 23770, 24981, 24993, 29811, 4943, 26786, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_GNA, - 29721, 23674, 28936, 0, + 29803, 23770, 29038, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_TROUTER_3, - 29721, 23674, 24885, 24897, 29734, 9103, 0, + 29803, 23770, 24981, 24993, 29816, 9199, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_TROUTER_5, - 29721, 23674, 24885, 24897, 29734, 9109, 0, + 29803, 23770, 24981, 24993, 29816, 9205, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_TROUTER_8, - 29721, 23674, 24885, 24897, 29734, 29739, 0, + 29803, 23770, 24981, 24993, 29816, 29821, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_TROUTER_12, - 29721, 23674, 24885, 24897, 29734, 29742, 0, + 29803, 23770, 24981, 24993, 29816, 29824, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_TROUTER_3A, - 29721, 23674, 24885, 24897, 29734, 29746, 0, + 29803, 23770, 24981, 24993, 29816, 29828, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_TROUTER_4C_S, - 29721, 23674, 24885, 24897, 29750, 4943, 26690, 0, + 29803, 23770, 24981, 24993, 29832, 4943, 26786, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_TROUTER_1, - 29721, 23674, 24885, 24897, 29734, 9097, 0, + 29803, 23770, 24981, 24993, 29816, 9193, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_TROUTER_2_PREQS, - 29721, 23674, 24885, 24897, 29734, 26888, 29755, 0, + 29803, 23770, 24981, 24993, 29816, 26984, 29837, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_TROUTER_4, - 29721, 23674, 24885, 24897, 29734, 9106, 0, + 29803, 23770, 24981, 24993, 29816, 9202, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_TROUTER_6, - 29721, 23674, 24885, 24897, 29734, 29763, 0, + 29803, 23770, 24981, 24993, 29816, 29845, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_TRACE_2, - 29721, 23674, 23830, 8949, 29766, 29775, 0, + 29803, 23770, 23926, 9045, 29848, 29857, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_TROUTER_7, - 29721, 23674, 24885, 24897, 29734, 29780, 0, + 29803, 23770, 24981, 24993, 29816, 29862, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_TROUTER_9, - 29721, 23674, 24885, 24897, 29734, 29783, 0, + 29803, 23770, 24981, 24993, 29816, 29865, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_TROUTER_10, - 29721, 23674, 24885, 24897, 29734, 29786, 0, + 29803, 23770, 24981, 24993, 29816, 29868, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_TROUTER_4C_S_2, - 29721, 23674, 24885, 24897, 29750, 4943, 26690, 0, + 29803, 23770, 24981, 24993, 29832, 4943, 26786, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_TROUTER_11, - 29721, 23674, 24885, 24897, 29734, 29790, 0, + 29803, 23770, 24981, 24993, 29816, 29872, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_TROUTER_1A, - 29721, 23674, 24885, 24897, 29734, 29794, 0, + 29803, 23770, 24981, 24993, 29816, 29876, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_TROUTER_2, - 29721, 23674, 24885, 24897, 29734, 9100, 0, + 29803, 23770, 24981, 24993, 29816, 9196, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_GPU_8EU_S, - 29721, 23674, 8396, 29798, 29803, 0, + 29803, 23770, 8429, 29880, 29885, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_GPU_8EU, - 29721, 23674, 8396, 29798, 29803, 0, + 29803, 23770, 8429, 29880, 29885, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_GPU_16EU_S, - 29721, 23674, 8396, 29810, 29803, 0, + 29803, 23770, 8429, 29892, 29885, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_GPU_16EU_OLD, - 29721, 23674, 8396, 29816, 0, + 29803, 23770, 8429, 29898, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_GPU_16EU, - 29721, 23674, 8396, 29816, 0, + 29803, 23770, 8429, 29898, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_GPU_32_S, - 29721, 23674, 8396, 29823, 29803, 0, + 29803, 23770, 8429, 29905, 29885, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_GPU_32, - 29721, 23674, 8396, 29829, 0, + 29803, 23770, 8429, 29911, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_U15_2_8_HOST, - 29836, 23674, 29842, 6953, 0, + 29918, 23770, 29924, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_U9_2_8_HOST, - 29836, 23674, 29852, 6953, 0, + 29918, 23770, 29934, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_U15_2_4_HOST, - 29836, 23674, 29861, 6953, 0, + 29918, 23770, 29943, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_U9_2_4_HOST, - 29836, 23674, 29871, 6953, 0, + 29918, 23770, 29953, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_PCIE_RP_0, - 29836, 23674, 8204, 29880, 8140, 8153, 8134, 29883, 0, + 29918, 23770, 8237, 29962, 8173, 8186, 8167, 29965, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_XDCI, - 29836, 23674, 29889, 2418, 28956, 0, + 29918, 23770, 29971, 2418, 29058, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_S_2_0_HOST, - 29836, 23674, 29895, 29903, 6953, 0, + 29918, 23770, 29977, 29985, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_N_8_HOST, - 29836, 29911, 29918, 6953, 0, + 29918, 29993, 30000, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_U15_1_4_HOST, - 29836, 23674, 29924, 6953, 0, + 29918, 23770, 30006, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_U9_1_4_HOST, - 29836, 23674, 29934, 6953, 0, + 29918, 23770, 30016, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_N_4_N2_HOST, - 29836, 29911, 29943, 29949, 6953, 0, + 29918, 29993, 30025, 30031, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_N_4_N1_HOST, - 29836, 29911, 29943, 29955, 6953, 0, + 29918, 29993, 30025, 30037, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_DTT, - 29836, 23674, 2881, 29961, 127, 0, + 29918, 23770, 2881, 30043, 127, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_XHCI, - 29836, 23674, 29889, 6953, 28949, 0, + 29918, 23770, 29971, 6971, 29051, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_TBT_PCIE_3, - 29836, 23674, 29968, 8204, 6422, 0, + 29918, 23770, 30050, 8237, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_H_4_8_HOST, - 29836, 23674, 29980, 6953, 0, + 29918, 23770, 30062, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_HX_4_8_HOST, - 29836, 23674, 29988, 6953, 0, + 29918, 23770, 30070, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_H_4_4_HOST, - 29836, 23674, 29997, 6953, 0, + 29918, 23770, 30079, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_HX_4_4_HOST, - 29836, 23674, 30005, 6953, 0, + 29918, 23770, 30087, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_PCIE_RP_1, - 29836, 23674, 8204, 29880, 8140, 8153, 8136, 30014, 0, + 29918, 23770, 8237, 29962, 8173, 8186, 8169, 30096, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_N_IPU, - 29836, 29911, 4342, 811, 27003, 0, + 29918, 29993, 4342, 811, 27099, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_TBT_PCIE_2, - 29836, 23674, 29968, 8204, 6411, 0, + 29918, 23770, 30050, 8237, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_S_4_0_HOST, - 29836, 23674, 30019, 6953, 0, + 29918, 23770, 30101, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_HX_8_8_HOST, - 29836, 23674, 30027, 6953, 0, + 29918, 23770, 30109, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_HX_6_8_HOST, - 29836, 23674, 30036, 6953, 0, + 29918, 23770, 30118, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_PCIE_RP_3, - 29836, 23674, 8204, 30045, 8140, 8153, 6422, 30048, 0, + 29918, 23770, 8237, 30127, 8173, 8186, 6440, 30130, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_TBTDMA_0, - 29836, 23674, 29968, 24519, 8134, 0, + 29918, 23770, 30050, 24615, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_TBT_PCIE_1, - 29836, 23674, 29968, 8204, 8136, 0, + 29918, 23770, 30050, 8237, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_RPL_S_6_8_HOST_2, - 30053, 23674, 30060, 6953, 0, + 30135, 23770, 30142, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_H_6_8_HOST, - 29836, 23674, 30068, 6953, 0, + 29918, 23770, 30150, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_RPL_HX_6_4_HOST_2, - 30053, 23674, 30076, 6953, 0, + 30135, 23770, 30158, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_S_6_4_HOST, - 29836, 23674, 30085, 6953, 0, + 29918, 23770, 30167, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_H_6_4_HOST, - 29836, 23674, 30093, 6953, 0, + 29918, 23770, 30175, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_PCIE_RP_2, - 29836, 23674, 8204, 30045, 8140, 8153, 6411, 30048, 0, + 29918, 23770, 8237, 30127, 8173, 8186, 6429, 30130, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_N_XHCI, - 29836, 29911, 6945, 6953, 28949, 0, + 29918, 29993, 6963, 6971, 29051, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_GNA, - 29836, 23674, 30101, 30107, 30114, 0, + 29918, 23770, 30183, 30189, 30196, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_S_6_0_HOST, - 29836, 23674, 30124, 6953, 0, + 29918, 23770, 30206, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_IPU, - 29836, 23674, 4342, 811, 27003, 0, + 29918, 23770, 4342, 811, 27099, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_N_XDCI, - 29836, 29911, 6945, 2418, 28956, 0, + 29918, 29993, 6963, 2418, 29058, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_S_8_8_HOST, - 29836, 23674, 30132, 6953, 0, + 29918, 23770, 30214, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_S_8_4_HOST, - 29836, 23674, 30140, 6953, 0, + 29918, 23770, 30222, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_TBTDMA_1, - 29836, 23674, 29968, 24519, 8136, 0, + 29918, 23770, 30050, 24615, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_TBT_PCIE_0, - 29836, 23674, 29968, 8204, 8134, 0, + 29918, 23770, 30050, 8237, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_TRACE, - 29836, 23674, 23830, 8949, 29766, 29775, 0, + 29918, 23770, 23926, 9045, 29848, 29857, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_CLSRAM, - 29836, 23674, 30148, 30154, 647, 30158, 0, + 29918, 23770, 30230, 30236, 647, 30240, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_N_GNA, - 29836, 29911, 30101, 30107, 30114, 0, + 29918, 29993, 30183, 30189, 30196, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_VMD, - 29836, 23674, 30168, 7078, 2418, 0, + 29918, 23770, 30250, 7096, 2418, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_IGD_1, - 29836, 23674, 1716, 29829, 0, + 29918, 23770, 1716, 29911, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_IGD_2, - 29836, 23674, 1716, 30175, 0, + 29918, 23770, 1716, 30257, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_IGD_8, - 29836, 23674, 1716, 29829, 0, + 29918, 23770, 1716, 29911, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_IGD_9, - 29836, 23674, 1716, 29816, 0, + 29918, 23770, 1716, 29898, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_IGD_3, - 29836, 23674, 1716, 29829, 0, + 29918, 23770, 1716, 29911, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_IGD_4, - 29836, 23674, 1716, 30175, 0, + 29918, 23770, 1716, 30257, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_IGD_5, - 29836, 23674, 1716, 29816, 0, + 29918, 23770, 1716, 29898, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_IGD_6, - 29836, 23674, 1716, 30182, 0, + 29918, 23770, 1716, 30264, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_IGD_7, - 29836, 23674, 1716, 0, + 29918, 23770, 1716, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_IGD_10, - 29836, 23674, 1716, 0, + 29918, 23770, 1716, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_IGD_11, - 29836, 23674, 1716, 0, + 29918, 23770, 1716, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_IGD_12, - 29836, 23674, 1716, 0, + 29918, 23770, 1716, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_IGD_13, - 29836, 23674, 1716, 0, + 29918, 23770, 1716, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_N_IGD_1, - 29836, 23674, 1716, 29829, 0, + 29918, 23770, 1716, 29911, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_N_IGD_2, - 29836, 23674, 1716, 30175, 0, + 29918, 23770, 1716, 30257, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_ESPI, - 29721, 23674, 23808, 0, + 29803, 23770, 23904, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_P2SB, - 29721, 23674, 23813, 0, + 29803, 23770, 23909, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_PMC, - 29721, 23674, 23818, 0, + 29803, 23770, 23914, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_SMB, - 29721, 23674, 8962, 0, + 29803, 23770, 9058, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_SPI_FLASH, - 29721, 23674, 17409, 30189, 647, 30196, 0, + 29803, 23770, 17500, 30271, 647, 30278, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_TRACE_1, - 29721, 23674, 23830, 8949, 30201, 0, + 29803, 23770, 23926, 9045, 30283, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_SIO_UART_0, - 29721, 23674, 27495, 7983, 8134, 0, + 29803, 23770, 27591, 8016, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_SIO_UART_1, - 29721, 23674, 27495, 7983, 8136, 0, + 29803, 23770, 27591, 8016, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_SIO_SPI_0, - 29721, 23674, 27495, 17409, 8134, 0, + 29803, 23770, 27591, 17500, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_SIO_SPI_1, - 29721, 23674, 27495, 17409, 8136, 0, + 29803, 23770, 27591, 17500, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_IEH, - 29721, 23674, 24399, 0, + 29803, 23770, 24495, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_ETH, - 29721, 23674, 5717, 0, + 29803, 23770, 5735, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_SIO_SPI_2, - 29721, 23674, 27495, 17409, 6411, 0, + 29803, 23770, 27591, 17500, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_PCIE_RP_0, - 29721, 23674, 8204, 8140, 8153, 8134, 10520, 26894, 6575, 30207, 0, + 29803, 23770, 8237, 8173, 8186, 8167, 10635, 26990, 6593, 30289, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_PCIE_RP_1, - 29721, 23674, 8204, 8140, 8153, 8136, 10520, 26894, 6575, 30207, 0, + 29803, 23770, 8237, 8173, 8186, 8169, 10635, 26990, 6593, 30289, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_PCIE_RP_2, - 29721, 23674, 8204, 8140, 8153, 6411, 10520, 26894, 6575, 30207, 0, + 29803, 23770, 8237, 8173, 8186, 6429, 10635, 26990, 6593, 30289, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_PCIE_RP_3, - 29721, 23674, 8204, 8140, 8153, 6422, 10520, 26894, 6575, 30207, 0, + 29803, 23770, 8237, 8173, 8186, 6440, 10635, 26990, 6593, 30289, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_PCIE_RP_4, - 29721, 23674, 8204, 8140, 8153, 6786, 10520, 30211, 9756, 30207, 0, + 29803, 23770, 8237, 8173, 8186, 6804, 10635, 30293, 9852, 30289, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_PCIE_RP_5, - 29721, 23674, 8204, 8140, 8153, 8138, 10520, 26888, 9756, 30207, 0, + 29803, 23770, 8237, 8173, 8186, 8171, 10635, 26984, 9852, 30289, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_PCIE_RP_6, - 29721, 23674, 8204, 8140, 8153, 8371, 10520, 30214, 9756, 30207, 0, + 29803, 23770, 8237, 8173, 8186, 8404, 10635, 30296, 9852, 30289, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_SIO_I2C_6, - 29721, 23674, 27495, 17453, 8371, 0, + 29803, 23770, 27591, 17544, 8404, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_SIO_I2C_7, - 29721, 23674, 27495, 17453, 8373, 0, + 29803, 23770, 27591, 17544, 8406, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_EMMC, - 29721, 23674, 23848, 0, + 29803, 23770, 23944, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_SDIO, - 29721, 23674, 27535, 0, + 29803, 23770, 27631, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_SI, - 29721, 23674, 30217, 30224, 0, + 29803, 23770, 30299, 30306, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_SIO_I2C_4, - 29721, 23674, 27495, 17453, 6786, 0, + 29803, 23770, 27591, 17544, 6804, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_SIO_I2C_5, - 29721, 23674, 27495, 17453, 8138, 0, + 29803, 23770, 27591, 17544, 8171, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_SIO_UART_2, - 29721, 23674, 27495, 7983, 6411, 0, + 29803, 23770, 27591, 8016, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_CAVS_1, - 29721, 23674, 24234, 0, + 29803, 23770, 24330, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_CAVS_2, - 29721, 23674, 24234, 0, + 29803, 23770, 24330, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_CAVS_3, - 29721, 23674, 24234, 0, + 29803, 23770, 24330, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_CAVS_4, - 29721, 23674, 24234, 0, + 29803, 23770, 24330, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_CAVS_5, - 29721, 23674, 24234, 0, + 29803, 23770, 24330, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_CAVS_6, - 29721, 23674, 24234, 0, + 29803, 23770, 24330, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_CAVS_7, - 29721, 23674, 24234, 0, + 29803, 23770, 24330, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_CAVS_8, - 29721, 23674, 24234, 0, + 29803, 23770, 24330, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_AHCI, - 29721, 23674, 8775, 0, + 29803, 23770, 8819, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_AHCI_2, - 29721, 23674, 8775, 0, + 29803, 23770, 8819, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_HPET, - 29721, 23674, 30231, 0, + 29803, 23770, 30313, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_IOAPIC, - 29721, 23674, 8930, 0, + 29803, 23770, 9026, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_CSE_PTTDMA, - 29721, 23674, 30236, 30240, 24519, 0, + 29803, 23770, 30318, 30322, 24615, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_CSE_UMA, - 29721, 23674, 30236, 30244, 17766, 0, + 29803, 23770, 30318, 30326, 17850, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_CSE_HECI_0, - 29721, 23674, 30236, 24265, 8134, 0, + 29803, 23770, 30318, 24361, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_CSE_HECI_1, - 29721, 23674, 30236, 24265, 8136, 0, + 29803, 23770, 30318, 24361, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_CSE_HECI_2, - 29721, 23674, 30236, 24265, 6411, 0, + 29803, 23770, 30318, 24361, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_CSE_HECI_3, - 29721, 23674, 30236, 24265, 6422, 0, + 29803, 23770, 30318, 24361, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_SIO_I2C_0, - 29721, 23674, 27495, 17453, 8134, 0, + 29803, 23770, 27591, 17544, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_SIO_I2C_1, - 29721, 23674, 27495, 17453, 8136, 0, + 29803, 23770, 27591, 17544, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_SIO_I2C_2, - 29721, 23674, 27495, 17453, 6411, 0, + 29803, 23770, 27591, 17544, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_SIO_I2C_3, - 29721, 23674, 27495, 17453, 6422, 0, + 29803, 23770, 27591, 17544, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_XHCI, - 29721, 23674, 8233, 0, + 29803, 23770, 8266, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_XDCI, - 29721, 23674, 23886, 0, + 29803, 23770, 23982, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_SSRAM, - 29721, 23674, 23891, 23898, 0, + 29803, 23770, 23987, 23994, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_PSE_QEP_1, - 29721, 23674, 30248, 30252, 8136, 0, + 29803, 23770, 30330, 30334, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_PSE_QEP_2, - 29721, 23674, 30248, 30252, 6411, 0, + 29803, 23770, 30330, 30334, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_PSE_QEP_3, - 29721, 23674, 30248, 30252, 6422, 0, + 29803, 23770, 30330, 30334, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_PSE_SPI_0, - 29721, 23674, 30248, 17409, 8134, 0, + 29803, 23770, 30330, 17500, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_PSE_SPI_1, - 29721, 23674, 30248, 17409, 8136, 0, + 29803, 23770, 30330, 17500, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_PSE_SPI_2, - 29721, 23674, 30248, 17409, 6411, 0, + 29803, 23770, 30330, 17500, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_PSE_SPI_3, - 29721, 23674, 30248, 17409, 6422, 0, + 29803, 23770, 30330, 17500, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_PSE_GPIO_0, - 29721, 23674, 30248, 17400, 8134, 0, + 29803, 23770, 30330, 17491, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_PSE_GPIO_1, - 29721, 23674, 30248, 17400, 8136, 0, + 29803, 23770, 30330, 17491, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_PSE_UART_0, - 29721, 23674, 30248, 7983, 8134, 0, + 29803, 23770, 30330, 8016, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_PSE_UART_1, - 29721, 23674, 30248, 7983, 8136, 0, + 29803, 23770, 30330, 8016, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_PSE_UART_2, - 29721, 23674, 30248, 7983, 6411, 0, + 29803, 23770, 30330, 8016, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_PSE_UART_3, - 29721, 23674, 30248, 7983, 6422, 0, + 29803, 23770, 30330, 8016, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_PSE_UART_4, - 29721, 23674, 30248, 7983, 6786, 0, + 29803, 23770, 30330, 8016, 6804, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_PSE_UART_5, - 29721, 23674, 30248, 7983, 8138, 0, + 29803, 23770, 30330, 8016, 8171, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_PSE_I2S_0, - 29721, 23674, 30248, 8526, 8134, 0, + 29803, 23770, 30330, 8559, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_PSE_I2S_1, - 29721, 23674, 30248, 8526, 8136, 0, + 29803, 23770, 30330, 8559, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_PSE_ETH_0_RGMII, - 29721, 23674, 30248, 5717, 8134, 30256, 30263, 0, + 29803, 23770, 30330, 5735, 8167, 30338, 30345, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_PSE_ETH_0_SGMII_1G, - 29721, 23674, 30248, 5717, 8134, 30267, 30263, 0, + 29803, 23770, 30330, 5735, 8167, 30349, 30345, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_PSE_ETH_0_SGMII_2_5G, - 29721, 23674, 30248, 5717, 8134, 30267, 26699, 0, + 29803, 23770, 30330, 5735, 8167, 30349, 26795, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_PSE_ETH_1_RGMII, - 29721, 23674, 30248, 5717, 8136, 30256, 30263, 0, + 29803, 23770, 30330, 5735, 8169, 30338, 30345, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_PSE_ETH_1_SGMII_1G, - 29721, 23674, 30248, 5717, 8136, 30267, 30263, 0, + 29803, 23770, 30330, 5735, 8169, 30349, 30345, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_PSE_ETH_1_SGMII_2_5G, - 29721, 23674, 30248, 5717, 8136, 30267, 26699, 0, + 29803, 23770, 30330, 5735, 8169, 30349, 26795, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_PSE_LH2OSE, - 29721, 23674, 30248, 30274, 0, + 29803, 23770, 30330, 30356, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_PSE_DMA_0, - 29721, 23674, 30248, 24519, 8134, 0, + 29803, 23770, 30330, 24615, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_PSE_DMA_1, - 29721, 23674, 30248, 24519, 8136, 0, + 29803, 23770, 30330, 24615, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_PSE_DMA_2, - 29721, 23674, 30248, 24519, 6411, 0, + 29803, 23770, 30330, 24615, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_PSE_PWM, - 29721, 23674, 30248, 30281, 0, + 29803, 23770, 30330, 30363, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_PSE_I2C_0, - 29721, 23674, 30248, 17453, 8134, 0, + 29803, 23770, 30330, 17544, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_PSE_I2C_1, - 29721, 23674, 30248, 17453, 8136, 0, + 29803, 23770, 30330, 17544, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_PSE_I2C_2, - 29721, 23674, 30248, 17453, 6411, 0, + 29803, 23770, 30330, 17544, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_PSE_I2C_3, - 29721, 23674, 30248, 17453, 6422, 0, + 29803, 23770, 30330, 17544, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_PSE_I2C_4, - 29721, 23674, 30248, 17453, 6786, 0, + 29803, 23770, 30330, 17544, 6804, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_PSE_I2C_5, - 29721, 23674, 30248, 17453, 8138, 0, + 29803, 23770, 30330, 17544, 8171, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_PSE_I2C_6, - 29721, 23674, 30248, 17453, 8371, 0, + 29803, 23770, 30330, 17544, 8404, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_PSE_I2C_7, - 29721, 23674, 30248, 17453, 8373, 0, + 29803, 23770, 30330, 17544, 8406, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_PSE_CAN_0, - 29721, 23674, 30248, 30285, 8134, 0, + 29803, 23770, 30330, 30367, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_PSE_CAN_1, - 29721, 23674, 30248, 30285, 8136, 0, + 29803, 23770, 30330, 30367, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EHL_PSE_QEP_0, - 29721, 23674, 30248, 30252, 8134, 0, + 29803, 23770, 30330, 30334, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_RKL_PCIE_RP_0, - 30289, 23674, 8204, 8140, 8153, 8134, 29883, 0, + 30371, 23770, 8237, 8173, 8186, 8167, 29965, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_RKL_DPTF, - 30289, 23674, 28931, 0, + 30371, 23770, 29033, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_RKL_PCIE_RP_1, - 30289, 23674, 8204, 8140, 8153, 8136, 30014, 0, + 30371, 23770, 8237, 8173, 8186, 8169, 30096, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_RKL_PCIE_RP_2, - 30289, 23674, 8204, 8140, 8153, 6411, 30048, 0, + 30371, 23770, 8237, 8173, 8186, 6429, 30130, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_RKL_PCIE_RP_3, - 30289, 23674, 8204, 8140, 8153, 6422, 30048, 0, + 30371, 23770, 8237, 8173, 8186, 6440, 30130, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_RKL_GNA, - 30289, 23674, 30101, 30107, 30114, 0, + 30371, 23770, 30183, 30189, 30196, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_RKL_8C_HOST, - 30289, 23674, 30296, 6953, 0, + 30371, 23770, 30378, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_RKL_6C_HOST, - 30289, 23674, 30296, 6953, 0, + 30371, 23770, 30378, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_RKL_IGD_1, - 30289, 23674, 28916, 1716, 24354, 29829, 0, + 30371, 23770, 29018, 1716, 24450, 29911, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_RKL_IGD_2, - 30289, 23674, 28916, 1716, 30304, 30175, 0, + 30371, 23770, 29018, 1716, 30386, 30257, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_RKL_IGD_3, - 30289, 23674, 30308, 30314, 28916, 1716, 24354, 0, + 30371, 23770, 30390, 30396, 29018, 1716, 24450, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_RKL_IGD_4, - 30289, 23674, 30308, 30317, 28916, 1716, 24354, 0, + 30371, 23770, 30390, 30399, 29018, 1716, 24450, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_JSL_ESPI, - 30320, 23674, 23808, 0, + 30402, 23770, 23904, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_JSL_P2SB, - 30320, 23674, 23813, 0, + 30402, 23770, 23909, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_JSL_PMC, - 30320, 23674, 23818, 0, + 30402, 23770, 23914, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_JSL_SMB, - 30320, 23674, 8962, 0, + 30402, 23770, 9058, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_JSL_SPI_FLASH, - 30320, 23674, 17409, 23822, 0, + 30402, 23770, 17500, 23918, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_JSL_TRACE_1, - 30320, 23674, 5577, 23830, 8949, 30201, 0, + 30402, 23770, 5595, 23926, 9045, 30283, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_JSL_UART_0, - 30320, 23674, 7983, 8134, 0, + 30402, 23770, 8016, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_JSL_UART_1, - 30320, 23674, 7983, 8136, 0, + 30402, 23770, 8016, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_JSL_SPI_0, - 30320, 23674, 17409, 8134, 0, + 30402, 23770, 17500, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_JSL_SPI_1, - 30320, 23674, 17409, 8136, 0, + 30402, 23770, 17500, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_JSL_PCIE_1, - 30320, 23674, 8204, 8140, 8153, 8136, 0, + 30402, 23770, 8237, 8173, 8186, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_JSL_PCIE_2, - 30320, 23674, 8204, 8140, 8153, 6411, 0, + 30402, 23770, 8237, 8173, 8186, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_JSL_PCIE_3, - 30320, 23674, 8204, 8140, 8153, 6422, 0, + 30402, 23770, 8237, 8173, 8186, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_JSL_PCIE_4, - 30320, 23674, 8204, 8140, 8153, 6786, 0, + 30402, 23770, 8237, 8173, 8186, 6804, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_JSL_PCIE_5, - 30320, 23674, 8204, 8140, 8153, 8138, 0, + 30402, 23770, 8237, 8173, 8186, 8171, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_JSL_PCIE_6, - 30320, 23674, 8204, 8140, 8153, 8371, 0, + 30402, 23770, 8237, 8173, 8186, 8404, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_JSL_PCIE_7, - 30320, 23674, 8204, 8140, 8153, 8373, 0, + 30402, 23770, 8237, 8173, 8186, 8406, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_JSL_PCIE_8, - 30320, 23674, 8204, 8140, 8153, 6811, 0, + 30402, 23770, 8237, 8173, 8186, 6829, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_JSL_EMMC, - 30320, 23674, 23848, 0, + 30402, 23770, 23944, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_JSL_LPSS_I2C_4, - 30320, 23674, 30327, 17453, 6786, 0, + 30402, 23770, 30409, 17544, 6804, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_JSL_LPSS_I2C_5, - 30320, 23674, 30327, 17453, 8138, 0, + 30402, 23770, 30409, 17544, 8171, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_JSL_UART_2, - 30320, 23674, 7983, 6411, 0, + 30402, 23770, 8016, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_JSL_CAVS, - 30320, 23674, 24234, 0, + 30402, 23770, 24330, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_JSL_AHCI_1, - 30320, 23674, 8762, 8984, 0, + 30402, 23770, 8800, 9080, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_JSL_AHCI_2, - 30320, 23674, 8762, 8984, 0, + 30402, 23770, 8800, 9080, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_JSL_D_RAID, - 30320, 23674, 8762, 29710, 29693, 0, + 30402, 23770, 8800, 29792, 29775, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_JSL_M_RAID, - 30320, 23674, 8762, 29710, 29702, 0, + 30402, 23770, 8800, 29792, 29784, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_JSL_AHCI_OPTANE, - 30320, 23674, 8762, 30332, 29693, 0, + 30402, 23770, 8800, 30414, 29775, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_JSL_HECI_1, - 30320, 23674, 24265, 8136, 0, + 30402, 23770, 24361, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_JSL_HECI_2, - 30320, 23674, 24265, 6411, 0, + 30402, 23770, 24361, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_JSL_HECI_3, - 30320, 23674, 24265, 6422, 0, + 30402, 23770, 24361, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_JSL_LPSS_I2C_0, - 30320, 23674, 30327, 17453, 8134, 0, + 30402, 23770, 30409, 17544, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_JSL_LPSS_I2C_1, - 30320, 23674, 30327, 17453, 8136, 0, + 30402, 23770, 30409, 17544, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_JSL_LPSS_I2C_2, - 30320, 23674, 30327, 17453, 6411, 0, + 30402, 23770, 30409, 17544, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_JSL_LPSS_I2C_3, - 30320, 23674, 30327, 17453, 6422, 0, + 30402, 23770, 30409, 17544, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_JSL_XHCI, - 30320, 23674, 6945, 6953, 28949, 0, + 30402, 23770, 6963, 6971, 29051, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_JSL_XDCI, - 30320, 23674, 6945, 2418, 28956, 0, + 30402, 23770, 6963, 2418, 29058, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_JSL_SSRAM, - 30320, 23674, 23891, 23898, 0, + 30402, 23770, 23987, 23994, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_JSL_CNVI_0, - 30320, 23674, 23903, 23709, 29734, 9079, 0, + 30402, 23770, 23999, 23805, 29816, 9175, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_JSL_CNVI_1, - 30320, 23674, 23903, 23709, 29734, 9097, 0, + 30402, 23770, 23999, 23805, 29816, 9193, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_JSL_CNVI_2, - 30320, 23674, 23903, 23709, 29734, 9100, 0, + 30402, 23770, 23999, 23805, 29816, 9196, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_JSL_CNVI_3, - 30320, 23674, 23903, 23709, 29734, 9103, 0, + 30402, 23770, 23999, 23805, 29816, 9199, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_JSL_SCS, - 30320, 23674, 9017, 15031, 0, + 30402, 23770, 9113, 15127, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_JSL_SPI_2, - 30320, 23674, 17409, 6411, 0, + 30402, 23770, 17500, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_JSL_DPTF, - 30320, 23674, 28931, 0, + 30402, 23770, 29033, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_JSL_TROUTER_4_1, - 30320, 23674, 8115, 24885, 24897, 29734, 9106, 0, + 30402, 23770, 8148, 24981, 24993, 29816, 9202, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_JSL_TROUTER_2_1, - 30320, 23674, 8115, 24885, 24897, 29734, 9100, 0, + 30402, 23770, 8148, 24981, 24993, 29816, 9196, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_JSL_TROUTER_2_2, - 30320, 23674, 8115, 24885, 24897, 29734, 9100, 0, + 30402, 23770, 8148, 24981, 24993, 29816, 9196, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_JSL_TROUTER_4_2, - 30320, 23674, 8115, 24885, 24897, 29734, 9106, 0, + 30402, 23770, 8148, 24981, 24993, 29816, 9202, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_JSL_TROUTER_4_3, - 30320, 23674, 8115, 24885, 24897, 29734, 9106, 0, + 30402, 23770, 8148, 24981, 24993, 29816, 9202, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_JSL_TROUTER_4_4, - 30320, 23674, 8115, 24885, 24897, 29734, 9106, 0, + 30402, 23770, 8148, 24981, 24993, 29816, 9202, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_JSL_TRACE_2, - 30320, 23674, 5577, 23830, 8949, 29766, 29775, 0, + 30402, 23770, 5595, 23926, 9045, 29848, 29857, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_JSL_GPU_EU_16, - 30320, 23674, 8396, 19210, 30341, 0, + 30402, 23770, 8429, 19288, 30423, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_JSL_GPU_EU_24, - 30320, 23674, 8396, 24222, 30341, 0, + 30402, 23770, 8429, 24318, 30423, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_JSL_GPU_EU_32, - 30320, 23674, 8396, 19207, 30341, 0, + 30402, 23770, 8429, 19285, 30423, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EP80579_HB, - 30344, 6953, 0, + 30426, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EP80579_MEM, - 30344, 4504, 0, + 30426, 4504, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EP80579_EDMA, - 30344, 30352, 0, + 30426, 30434, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EP80579_PCIE_1, - 30344, 8204, 0, + 30426, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EP80579_PCIE_2, - 30344, 8204, 0, + 30426, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EP80579_SATA, - 30344, 8762, 0, + 30426, 8800, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EP80579_AHCI, - 30344, 8775, 0, + 30426, 8819, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EP80579_ASU, - 30344, 30357, 0, + 30426, 30439, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EP80579_RESERVED1, - 30344, 8252, 0, + 30426, 8285, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EP80579_LPC, - 30344, 8958, 0, + 30426, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EP80579_SMB, - 30344, 8962, 0, + 30426, 9058, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EP80579_UHCI, - 30344, 6945, 0, + 30426, 6963, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EP80579_EHCI, - 30344, 6945, 0, + 30426, 6963, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EP80579_PPB, - 30344, 8791, 10513, 0, + 30426, 8887, 10628, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EP80579_CAN_1, - 30344, 30361, 0, + 30426, 30443, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EP80579_CAN_2, - 30344, 30361, 0, + 30426, 30443, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EP80579_SERIAL, - 30344, 14833, 0, + 30426, 14929, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EP80579_1588, - 30344, 30368, 0, + 30426, 30450, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EP80579_LEB, - 30344, 30373, 0, + 30426, 30455, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EP80579_GCU, - 30344, 30377, 0, + 30426, 30459, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EP80579_RESERVED2, - 30344, 8252, 0, + 30426, 8285, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EP80579_LAN_1, - 30344, 4540, 0, + 30426, 4540, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EP80579_LAN_2, - 30344, 4540, 0, + 30426, 4540, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EP80579_LAN_3, - 30344, 4540, 0, + 30426, 4540, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_LP_ESPI, - 14633, 6476, 30381, 23808, 0, + 8849, 6494, 30463, 23904, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7HS_P_ESPI, - 30388, 6476, 30392, 23808, 0, + 30470, 6494, 30474, 23904, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_LP_P2SB, - 14633, 6476, 30381, 23813, 0, + 8849, 6494, 30463, 23909, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_LP_PMC, - 14633, 6476, 30381, 23818, 0, + 8849, 6494, 30463, 23914, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_LP_SMB, - 14633, 6476, 30381, 8962, 0, + 8849, 6494, 30463, 9058, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_LP_SPI, - 14633, 6476, 30381, 17409, 23822, 0, + 8849, 6494, 30463, 17500, 23918, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_LP_TRACE, - 14633, 6476, 30381, 23830, 8949, 0, + 8849, 6494, 30463, 23926, 9045, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_LP_UART_0, - 14633, 6476, 30381, 7983, 8134, 0, + 8849, 6494, 30463, 8016, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_LP_UART_1, - 14633, 6476, 30381, 7983, 8136, 0, + 8849, 6494, 30463, 8016, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_LP_GSPI_0, - 14633, 6476, 30381, 24211, 8134, 0, + 8849, 6494, 30463, 24307, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_LP_GSIP_1, - 14633, 6476, 30381, 24211, 8136, 0, + 8849, 6494, 30463, 24307, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_LP_PCIE_9, - 14633, 6476, 30381, 8204, 26891, 1047, 0, + 8849, 6494, 30463, 8237, 26987, 1047, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_LP_PCIE_10, - 14633, 6476, 30381, 8204, 26891, 9329, 0, + 8849, 6494, 30463, 8237, 26987, 9425, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_LP_PCIE_11, - 14633, 6476, 30381, 8204, 26891, 23836, 0, + 8849, 6494, 30463, 8237, 26987, 23932, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_LP_PCIE_12, - 14633, 6476, 30381, 8204, 26891, 14592, 0, + 8849, 6494, 30463, 8237, 26987, 14697, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_LP_PCIE_1, - 14633, 6476, 30381, 8204, 26891, 8136, 0, + 8849, 6494, 30463, 8237, 26987, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_LP_PCIE_2, - 14633, 6476, 30381, 8204, 26891, 6411, 0, + 8849, 6494, 30463, 8237, 26987, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_LP_PCIE_3, - 14633, 6476, 30381, 8204, 26891, 6422, 0, + 8849, 6494, 30463, 8237, 26987, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_LP_PCIE_4, - 14633, 6476, 30381, 8204, 26891, 6786, 0, + 8849, 6494, 30463, 8237, 26987, 6804, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_LP_PCIE_5, - 14633, 6476, 30381, 8204, 26891, 8138, 0, + 8849, 6494, 30463, 8237, 26987, 8171, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_LP_PCIE_6, - 14633, 6476, 30381, 8204, 26891, 8371, 0, + 8849, 6494, 30463, 8237, 26987, 8404, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_LP_PCIE_7, - 14633, 6476, 30381, 8204, 26891, 8373, 0, + 8849, 6494, 30463, 8237, 26987, 8406, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_LP_PCIE_8, - 14633, 6476, 30381, 8204, 26891, 6811, 0, + 8849, 6494, 30463, 8237, 26987, 6829, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_LP_I2C_4, - 14633, 6476, 30381, 17453, 6786, 0, + 8849, 6494, 30463, 17544, 6804, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_LP_I2C_5, - 14633, 6476, 30381, 17453, 8138, 0, + 8849, 6494, 30463, 17544, 8171, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_LP_UART_2, - 14633, 6476, 30381, 7983, 6411, 0, + 8849, 6494, 30463, 8016, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_LP_HDA, - 14633, 6476, 30381, 8230, 7054, 0, + 8849, 6494, 30463, 8263, 7072, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7HS_P_HDA, - 30388, 6476, 25800, 8230, 7054, 0, + 30470, 6494, 25896, 8263, 7072, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_LP_THC_0, - 14633, 6476, 30381, 29682, 8134, 0, + 8849, 6494, 30463, 29764, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_LP_THC_1, - 14633, 6476, 30381, 29682, 8136, 0, + 8849, 6494, 30463, 29764, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_LP_AHCI, - 14633, 6476, 30381, 8762, 8984, 0, + 8849, 6494, 30463, 8800, 9080, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_LP_RAID_P, - 14633, 6476, 30381, 8762, 8991, 23853, 0, + 8849, 6494, 30463, 8800, 9087, 23949, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_LP_I2C_6, - 14633, 6476, 30381, 17453, 8371, 0, + 8849, 6494, 30463, 17544, 8404, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_LP_I2C_7, - 14633, 6476, 30381, 17453, 8373, 0, + 8849, 6494, 30463, 17544, 8406, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_LP_UART_3, - 14633, 6476, 30381, 7983, 6422, 0, + 8849, 6494, 30463, 8016, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_LP_HECI_1, - 14633, 6476, 30381, 24265, 8136, 0, + 8849, 6494, 30463, 24361, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_LP_HECI_2, - 14633, 6476, 30381, 24265, 6411, 0, + 8849, 6494, 30463, 24361, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_LP_IDER, - 14633, 6476, 30381, 23865, 0, + 8849, 6494, 30463, 23961, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_LP_KT, - 14633, 6476, 30381, 23871, 0, + 8849, 6494, 30463, 23967, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_LP_HECI_3, - 14633, 6476, 30381, 24265, 6422, 0, + 8849, 6494, 30463, 24361, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_LP_HECI_4, - 14633, 6476, 30381, 24265, 6786, 0, + 8849, 6494, 30463, 24361, 6804, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_LP_I2C_0, - 14633, 6476, 30381, 17453, 8134, 0, + 8849, 6494, 30463, 17544, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_LP_I2C_1, - 14633, 6476, 30381, 17453, 8136, 0, + 8849, 6494, 30463, 17544, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_LP_I2C_2, - 14633, 6476, 30381, 17453, 6411, 0, + 8849, 6494, 30463, 17544, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_LP_I2C_3, - 14633, 6476, 30381, 17453, 6422, 0, + 8849, 6494, 30463, 17544, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_LP_XHCI, - 14633, 6476, 30381, 6945, 8450, 23874, 23878, 8233, 0, + 8849, 6494, 30463, 6963, 8483, 23970, 23974, 8266, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_LP_XDCI, - 14633, 6476, 30381, 6945, 8450, 23874, 23882, 23886, 0, + 8849, 6494, 30463, 6963, 8483, 23970, 23978, 23982, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_LP_SSRAM, - 14633, 6476, 30381, 23891, 23898, 0, + 8849, 6494, 30463, 23987, 23994, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_AX211, - 30398, 8371, 30404, 0, + 28210, 8404, 30480, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_LP_GSPI_2, - 14633, 6476, 30381, 24211, 6411, 0, + 8849, 6494, 30463, 24307, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_LP_ISH, - 14633, 6476, 30381, 692, 23921, 8949, 0, + 8849, 6494, 30463, 692, 24017, 9045, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_LP_UFS, - 14633, 6476, 30381, 30410, 0, + 8849, 6494, 30463, 30486, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_80312_ATU, - 30414, 30420, 0, + 30490, 30496, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_N_ESPI, - 29836, 29911, 23808, 0, + 29918, 29993, 23904, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_N_P2SB, - 29836, 29911, 23813, 0, + 29918, 29993, 23909, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_N_PMC, - 29836, 29911, 23818, 0, + 29918, 29993, 23914, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_N_SMB, - 29836, 29911, 8962, 0, + 29918, 29993, 9058, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_N_SPI_FLASH, - 29836, 29911, 17409, 23822, 0, + 29918, 29993, 17500, 23918, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_N_TRACE_1, - 29836, 29911, 23830, 8949, 30201, 0, + 29918, 29993, 23926, 9045, 30283, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_N_UART_0, - 29836, 29911, 7983, 8134, 0, + 29918, 29993, 8016, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_N_UART_1, - 29836, 29911, 7983, 8136, 0, + 29918, 29993, 8016, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_N_GSPI_0, - 29836, 29911, 24211, 8134, 0, + 29918, 29993, 24307, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_N_GSPI_1, - 29836, 29911, 24211, 8136, 0, + 29918, 29993, 24307, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_N_PCIE_RP_9, - 29836, 29911, 8204, 8140, 8153, 1047, 0, + 29918, 29993, 8237, 8173, 8186, 1047, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_N_PCIE_RP_10, - 29836, 29911, 8204, 8140, 8153, 9329, 0, + 29918, 29993, 8237, 8173, 8186, 9425, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_N_PCIE_RP_11, - 29836, 29911, 8204, 8140, 8153, 23836, 0, + 29918, 29993, 8237, 8173, 8186, 23932, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_N_PCIE_RP_12, - 29836, 29911, 8204, 8140, 8153, 14592, 0, + 29918, 29993, 8237, 8173, 8186, 14697, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_N_PCIE_RP_1, - 29836, 29911, 8204, 8140, 8153, 8136, 0, + 29918, 29993, 8237, 8173, 8186, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_N_PCIE_RP_2, - 29836, 29911, 8204, 8140, 8153, 6411, 0, + 29918, 29993, 8237, 8173, 8186, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_N_PCIE_RP_3, - 29836, 29911, 8204, 8140, 8153, 6422, 0, + 29918, 29993, 8237, 8173, 8186, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_N_PCIE_RP_4, - 29836, 29911, 8204, 8140, 8153, 6786, 0, + 29918, 29993, 8237, 8173, 8186, 6804, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_N_PCIE_RP_7, - 29836, 29911, 8204, 8140, 8153, 8373, 0, + 29918, 29993, 8237, 8173, 8186, 8406, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_N_SCS_EMMC, - 29836, 29911, 23848, 0, + 29918, 29993, 23944, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_N_I2C_4, - 29836, 29911, 17453, 6786, 0, + 29918, 29993, 17544, 6804, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_N_I2C_5, - 29836, 29911, 17453, 8138, 0, + 29918, 29993, 17544, 8171, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_N_UART_2, - 29836, 29911, 7983, 6411, 0, + 29918, 29993, 8016, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_N_HDA_1, - 29836, 29911, 8230, 7054, 0, + 29918, 29993, 8263, 7072, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_N_THC_0, - 29836, 29911, 30424, 6953, 6455, 8134, 0, + 29918, 29993, 30500, 6971, 6473, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_N_THC_1, - 29836, 29911, 30424, 6953, 6455, 8136, 0, + 29918, 29993, 30500, 6971, 6473, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_N_AHCI, - 29836, 29911, 8762, 8984, 0, + 29918, 29993, 8800, 9080, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_N_UART_3, - 29836, 29911, 7983, 6422, 0, + 29918, 29993, 8016, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_N_HECI_1, - 29836, 29911, 24265, 8136, 0, + 29918, 29993, 24361, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_N_HECI_2, - 29836, 29911, 24265, 6411, 0, + 29918, 29993, 24361, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_N_HECI_3, - 29836, 29911, 24265, 6422, 0, + 29918, 29993, 24361, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_N_HECI_4, - 29836, 29911, 24265, 6786, 0, + 29918, 29993, 24361, 6804, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_N_I2C_0, - 29836, 29911, 17453, 8134, 0, + 29918, 29993, 17544, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_N_I2C_1, - 29836, 29911, 17453, 8136, 0, + 29918, 29993, 17544, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_N_I2C_2, - 29836, 29911, 17453, 6411, 0, + 29918, 29993, 17544, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_N_I2C_3, - 29836, 29911, 17453, 6422, 0, + 29918, 29993, 17544, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_N_PCH_XHCI, - 29836, 29911, 25800, 6945, 8450, 23874, 23878, 8233, 0, + 29918, 29993, 25896, 6963, 8483, 23970, 23974, 8266, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_N_PCH_XDCI, - 29836, 29911, 25800, 6945, 8450, 23874, 23882, 23886, 0, + 29918, 29993, 25896, 6963, 8483, 23970, 23978, 23982, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_N_SSRAM, - 29836, 29911, 23891, 23898, 0, + 29918, 29993, 23987, 23994, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_N_CNVI_1, - 29836, 29911, 23903, 23709, 0, + 29918, 29993, 23999, 23805, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_N_CNVI_2, - 29836, 29911, 23903, 23709, 0, + 29918, 29993, 23999, 23805, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_N_CNVI_3, - 29836, 29911, 23903, 23709, 0, + 29918, 29993, 23999, 23805, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_N_CNVI_4, - 29836, 29911, 23903, 23709, 0, + 29918, 29993, 23999, 23805, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_N_GSPI_2, - 29836, 29911, 24211, 6411, 0, + 29918, 29993, 24307, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_N_ISH, - 29836, 29911, 692, 23921, 8949, 0, + 29918, 29993, 692, 24017, 9045, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ADL_N_SCS_UFS, - 29836, 29911, 30410, 0, + 29918, 29993, 30486, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I225_LMVP, - 30430, 5717, 24654, 0, + 30506, 5735, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I226_LMVP, - 30440, 5717, 24654, 0, + 30516, 5735, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I219_LM18, - 24641, 30450, 5717, 24654, 0, + 24737, 30526, 5735, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I219_V18, - 24665, 30450, 5717, 24654, 0, + 24761, 30526, 5735, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I219_LM19, - 24641, 30455, 5717, 24654, 0, + 24737, 30531, 5735, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I219_V19, - 24665, 30455, 5717, 24654, 0, + 24761, 30531, 5735, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I219_LM20, - 24641, 30460, 5717, 24654, 0, + 24737, 30536, 5735, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I219_V20, - 24665, 30460, 5717, 24654, 0, + 24761, 30536, 5735, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I219_LM21, - 24641, 30465, 5717, 24654, 0, + 24737, 30541, 5735, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I219_V21, - 24665, 30465, 5717, 24654, 0, + 24761, 30541, 5735, 24750, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARC_A770M, - 30470, 30474, 1716, 0, + 30546, 30550, 1716, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARC_A730M, - 30470, 30480, 1716, 0, + 30546, 30556, 1716, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARC_A550M, - 30470, 30486, 1716, 0, + 30546, 30562, 1716, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARC_A370M, - 30470, 30492, 1716, 0, + 30546, 30568, 1716, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARC_A350M, - 30470, 30498, 1716, 0, + 30546, 30574, 1716, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARC_A570M, - 30470, 30504, 1716, 0, + 30546, 30580, 1716, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARC_A530M, - 30470, 30510, 1716, 0, + 30546, 30586, 1716, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARC_A770, - 30470, 30516, 1716, 0, + 30546, 30592, 1716, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARC_A750, - 30470, 30521, 1716, 0, + 30546, 30597, 1716, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARC_A580, - 30470, 30526, 1716, 0, + 30546, 30602, 1716, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARC_A380, - 30470, 30531, 1716, 0, + 30546, 30607, 1716, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARC_A310, - 30470, 30536, 1716, 0, + 30546, 30612, 1716, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARC_PRO_A30M, - 30470, 7253, 30541, 1716, 0, + 30546, 7271, 30617, 1716, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARC_PRO_A40, - 30470, 7253, 30546, 1716, 0, + 30546, 7271, 30622, 1716, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARC_PRO_A60M, - 30470, 7253, 30554, 1716, 0, + 30546, 7271, 30630, 1716, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARC_PRO_A60, - 30470, 7253, 30559, 1716, 0, + 30546, 7271, 30635, 1716, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARC_A810E, - 30470, 30563, 1716, 0, + 30546, 30639, 1716, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARC_A310E, - 30470, 30569, 1716, 0, + 30546, 30645, 1716, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARC_A370E, - 30470, 30575, 1716, 0, + 30546, 30651, 1716, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARC_A350E, - 30470, 30581, 1716, 0, + 30546, 30657, 1716, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE7G_H_M_D_HOST_DRAM, - 23679, 30587, 26944, 30590, 30598, 6953, 24459, 8046, 0, + 23775, 30663, 27040, 30666, 30674, 6971, 24555, 8079, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE7G_PCIE_X16, - 23679, 30587, 8204, 24523, 0, + 23775, 30663, 8237, 24619, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE7G_S_GT1, - 8230, 1716, 29500, 24467, 0, + 8263, 1716, 29582, 24563, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE7G_U_HOST_DRAM, - 23679, 30587, 26958, 6953, 24459, 8046, 0, + 23775, 30663, 27054, 6971, 24555, 8079, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE7G_PCIE_X8, - 23679, 30587, 8204, 24527, 0, + 23775, 30663, 8237, 24623, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE7G_U_GT1, - 8230, 1716, 29500, 24467, 0, + 8263, 1716, 29582, 24563, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE7G_PCIE_X4, - 23679, 30587, 8204, 24546, 0, + 23775, 30663, 8237, 24642, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE7G_H_GT1, - 8230, 1716, 24467, 0, + 8263, 1716, 24563, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE7G_Y_HOST_DRAM, - 23679, 30587, 26962, 6953, 24459, 8046, 0, + 23775, 30663, 27058, 6971, 24555, 8079, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE7G_Y_GT1, - 8230, 1716, 24467, 0, + 8263, 1716, 24563, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE7G_S_D_HOST_DRAM, - 23679, 30587, 26966, 30598, 6953, 24459, 8046, 0, + 23775, 30663, 27062, 30674, 6971, 24555, 8079, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE7G_H_M_Q_HOST_DRAM, - 23679, 30587, 26944, 30590, 30604, 6953, 24459, 8046, 0, + 23775, 30663, 27040, 30666, 30680, 6971, 24555, 8079, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE7G_GMM, - 23679, 30587, 26970, 26979, 26987, 0, + 23775, 30663, 27066, 27075, 27083, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE7G_S_GT2, - 8230, 1716, 29504, 24467, 0, + 8263, 1716, 29586, 24563, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE8G_U_HB_DRAM, - 23679, 30610, 6953, 24459, 8046, 0, + 23775, 30686, 6971, 24555, 8079, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE7G_U_GT2, - 8230, 1716, 29513, 24484, 0, + 8263, 1716, 29595, 24580, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE8G_U_GT2, - 28916, 1716, 29513, 24484, 0, + 29018, 1716, 29595, 24580, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE7G_H_SW_HOST_DRAM, - 23679, 30587, 26944, 6225, 22213, 30616, 6953, 24459, 8046, 0, + 23775, 30663, 27040, 6243, 22309, 30692, 6971, 24555, 8079, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE7G_IU, - 23679, 30587, 4342, 27003, 0, + 23775, 30663, 4342, 27099, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE7G_H_M_GT2, - 8230, 1716, 29504, 30629, 30635, 0, + 8263, 1716, 29586, 30705, 30711, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_AMBLK_Y_GT2, - 28916, 1716, 30643, 24484, 0, + 29018, 1716, 30719, 24580, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE7G_HU_GT2, - 8230, 1716, 29508, 30629, 11272, 22213, 30647, 0, + 8263, 1716, 29590, 30705, 11387, 22309, 30723, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE7G_Y_GT2, - 28916, 1716, 30643, 24484, 0, + 29018, 1716, 30719, 24580, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE7G_S_Q_HOST_DRAM, - 23679, 30587, 26966, 30604, 6953, 24459, 8046, 0, + 23775, 30663, 27062, 30680, 6971, 24555, 8079, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE7G_U_GT3, - 8230, 1716, 24490, 0, + 8263, 1716, 24586, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE7G_U_GT3E_15W, - 24496, 19240, 1716, 13039, 30650, 30657, 0, + 24592, 19318, 1716, 13149, 30726, 30733, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE7G_U_GT3E_28W, - 24496, 19240, 1716, 30662, 30650, 30666, 0, + 24592, 19318, 1716, 30738, 30726, 30742, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_APL_IGD_1, - 30671, 23674, 1716, 30678, 0, + 30747, 23770, 1716, 30754, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_APL_IGD_2, - 30671, 23674, 1716, 30685, 0, + 30747, 23770, 1716, 30761, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_APL_IU, - 30671, 23674, 2792, 9186, 30692, 0, + 30747, 23770, 2792, 9282, 30768, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_APL_DPTF, - 30671, 23674, 28931, 0, + 30747, 23770, 29033, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_APL_P2SB, - 30671, 23674, 8299, 7009, 28940, 6563, 0, + 30747, 23770, 8332, 7027, 29042, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_APL_PMC, - 30671, 23674, 23818, 0, + 30747, 23770, 23914, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_APL_FASTSPI, - 30671, 23674, 2430, 17409, 0, + 30747, 23770, 2430, 17500, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_APL_HDA, - 30671, 23674, 8230, 7054, 0, + 30747, 23770, 8263, 7072, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_APL_TXE_HECI_1, - 30671, 23674, 27540, 30697, 0, + 30747, 23770, 27636, 30773, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_APL_TXE_HECI_2, - 30671, 23674, 27540, 30703, 0, + 30747, 23770, 27636, 30779, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_APL_TXE_HECI_3, - 30671, 23674, 27540, 30709, 0, + 30747, 23770, 27636, 30785, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_APL_ISH, - 30671, 23674, 692, 23921, 8949, 0, + 30747, 23770, 692, 24017, 9045, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_APL_XHCI, - 30671, 23674, 6945, 6953, 28949, 0, + 30747, 23770, 6963, 6971, 29051, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_APL_XDCI, - 30671, 23674, 6945, 2418, 28956, 0, + 30747, 23770, 6963, 2418, 29058, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_APL_I2C_0, - 30671, 23674, 17453, 8134, 0, + 30747, 23770, 17544, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_APL_I2C_1, - 30671, 23674, 17453, 8136, 0, + 30747, 23770, 17544, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_APL_I2C_2, - 30671, 23674, 17453, 6411, 0, + 30747, 23770, 17544, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_APL_I2C_3, - 30671, 23674, 17453, 6422, 0, + 30747, 23770, 17544, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_APL_I2C_4, - 30671, 23674, 17453, 6786, 0, + 30747, 23770, 17544, 6804, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_APL_I2C_5, - 30671, 23674, 17453, 8138, 0, + 30747, 23770, 17544, 8171, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_APL_I2C_6, - 30671, 23674, 17453, 8371, 0, + 30747, 23770, 17544, 8404, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_APL_I2C_7, - 30671, 23674, 17453, 8373, 0, + 30747, 23770, 17544, 8406, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_APL_UART_0, - 30671, 23674, 7983, 8134, 0, + 30747, 23770, 8016, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_APL_UART_1, - 30671, 23674, 7983, 8136, 0, + 30747, 23770, 8016, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_APL_UART_2, - 30671, 23674, 7983, 6411, 0, + 30747, 23770, 8016, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_APL_SPI_0, - 30671, 23674, 17409, 8134, 0, + 30747, 23770, 17500, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_APL_SPI_1, - 30671, 23674, 17409, 8136, 0, + 30747, 23770, 17500, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_APL_SPI_2, - 30671, 23674, 17409, 6411, 0, + 30747, 23770, 17500, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_APL_SD, - 30671, 23674, 9017, 15031, 0, + 30747, 23770, 9113, 15127, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_APL_EMMC, - 30671, 23674, 23848, 0, + 30747, 23770, 23944, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_APL_SMB, - 30671, 23674, 8962, 0, + 30747, 23770, 9058, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_APL_PCIE_B0, - 30671, 23674, 8204, 30715, 0, + 30747, 23770, 8237, 30791, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_APL_PCIE_B1, - 30671, 23674, 8204, 15193, 0, + 30747, 23770, 8237, 15289, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_APL_PCIE_A0, - 30671, 23674, 8204, 29220, 0, + 30747, 23770, 8237, 29302, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_APL_PCIE_A1, - 30671, 23674, 8204, 29212, 0, + 30747, 23770, 8237, 29294, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_APL_PCIE_A2, - 30671, 23674, 8204, 30718, 0, + 30747, 23770, 8237, 30794, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_APL_PCIE_A3, - 30671, 23674, 8204, 30721, 0, + 30747, 23770, 8237, 30797, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_APL_SATA, - 30671, 23674, 8762, 0, + 30747, 23770, 8800, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_APL_LPC, - 30671, 23674, 8958, 0, + 30747, 23770, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_APL_SSRAM, - 30671, 23674, 23891, 23898, 0, + 30747, 23770, 23987, 23994, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_APL_UART_3, - 30671, 23674, 7983, 6422, 0, + 30747, 23770, 8016, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_APL_HB, - 30671, 23674, 6953, 6563, 0, + 30747, 23770, 6971, 6581, 0, + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_NPU_LNL, + 30800, 23770, 30806, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_HB_DMI2, - 23679, 30724, 6953, 6563, 30740, 0, + 23775, 30810, 6971, 6581, 30826, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_HB_PCIE, - 30747, 6953, 6563, 5313, 0, + 30833, 6971, 6581, 5331, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_PCIE_1, - 30747, 8204, 8140, 8153, 30754, 22213, 24546, 30758, 0, + 30833, 8237, 8173, 8186, 30840, 22309, 24642, 30844, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_PCIE_2, - 30747, 8204, 8140, 8153, 30754, 22213, 24546, 30758, 0, + 30833, 8237, 8173, 8186, 30840, 22309, 24642, 30844, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_PCIE_3, - 23679, 30724, 8204, 8140, 8153, 0, + 23775, 30810, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_COREI76K_PCIE_2, - 23679, 28744, 8204, 8140, 8153, 0, + 23775, 28846, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_PCIE_5, - 23679, 30724, 8204, 8140, 8153, 0, + 23775, 30810, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_COREI76K_PCIE_4, - 23679, 28744, 8204, 8140, 8153, 0, + 23775, 28846, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_PCIE_7, - 23679, 30724, 8204, 8140, 8153, 30763, 24527, 22213, 24546, 30758, 0, + 23775, 30810, 8237, 8173, 8186, 30849, 24623, 22309, 24642, 30844, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_PCIE_8, - 23679, 30724, 8204, 8140, 8153, 30763, 24527, 22213, 24546, 30758, 0, + 23775, 30810, 8237, 8173, 8186, 30849, 24623, 22309, 24642, 30844, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_PCIE_9, - 23679, 30724, 8204, 8140, 8153, 30763, 24527, 22213, 24546, 30758, 0, + 23775, 30810, 8237, 8173, 8186, 30849, 24623, 22309, 24642, 30844, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_PCIE_10, - 23679, 30724, 8204, 8140, 8153, 30763, 24527, 22213, 24546, 30758, 0, + 23775, 30810, 8237, 8173, 8186, 30849, 24623, 22309, 24642, 30844, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_PCIE_NTBNTB, - 30747, 8204, 8140, 8153, 30769, 0, + 30833, 8237, 8173, 8186, 30855, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_PCIE_NTBRP, - 30747, 8204, 8140, 8153, 30777, 0, + 30833, 8237, 8173, 8186, 30863, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_PCIE_NTB2ND, - 30747, 8204, 8140, 8153, 30784, 0, + 30833, 8237, 8173, 8186, 30870, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_IIO_DEBUG_0, - 30747, 24755, 24571, 0, + 30833, 24851, 24667, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_IIO_DEBUG_1, - 30747, 24755, 24571, 0, + 30833, 24851, 24667, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_IIO_DEBUG_2, - 30747, 24755, 24571, 0, + 30833, 24851, 24667, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_IIO_DEBUG_3, - 30747, 24755, 24571, 0, + 30833, 24851, 24667, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_IIO_DEBUG_4, - 30747, 24755, 24571, 0, + 30833, 24851, 24667, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_IIO_DEBUG_5, - 30747, 24755, 24571, 0, + 30833, 24851, 24667, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_IIO_DEBUG_6, - 30747, 24755, 24571, 0, + 30833, 24851, 24667, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_IIO_DEBUG_7, - 30747, 24755, 24571, 0, + 30833, 24851, 24667, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_IIO_DEBUG_8, - 30747, 24755, 24571, 0, + 30833, 24851, 24667, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_IIO_DEBUG_9, - 30747, 24755, 24571, 0, + 30833, 24851, 24667, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_IIO_DEBUG_10, - 30747, 24755, 24571, 0, + 30833, 24851, 24667, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_IIO_DEBUG_11, - 30747, 24755, 24571, 0, + 30833, 24851, 24667, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_IIO_DEBUG_12, - 30747, 24755, 24571, 0, + 30833, 24851, 24667, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_R2_0, - 30747, 14010, 8204, 24769, 0, + 30833, 14120, 8237, 24865, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_UBOX_0, - 23679, 30724, 27417, 0, + 23775, 30810, 27513, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_UBOX_1, - 23679, 30724, 27417, 0, + 23775, 30810, 27513, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONDNS_QD_0, - 30747, 10856, 29414, 24519, 20237, 8134, 0, + 30833, 10971, 29496, 24615, 20315, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONDNS_QD_1, - 30747, 10856, 29414, 24519, 20237, 8136, 0, + 30833, 10971, 29496, 24615, 20315, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONDNS_QD_2, - 30747, 10856, 29414, 24519, 20237, 6411, 0, + 30833, 10971, 29496, 24615, 20315, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONDNS_QD_3, - 30747, 10856, 29414, 24519, 20237, 6422, 0, + 30833, 10971, 29496, 24615, 20315, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONDNS_QD_4, - 30747, 10856, 29414, 24519, 20237, 6786, 0, + 30833, 10971, 29496, 24615, 20315, 6804, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONDNS_QD_5, - 30747, 10856, 29414, 24519, 20237, 8138, 0, + 30833, 10971, 29496, 24615, 20315, 8171, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONDNS_QD_6, - 30747, 10856, 29414, 24519, 20237, 8371, 0, + 30833, 10971, 29496, 24615, 20315, 8404, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONDNS_QD_7, - 30747, 10856, 29414, 24519, 20237, 8373, 0, + 30833, 10971, 29496, 24615, 20315, 8406, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEONDNS_ADDRMAP, - 23679, 30724, 24755, 8034, 28779, 30798, 6, 7078, 0, + 23775, 30810, 24851, 8067, 28881, 30884, 6, 7096, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_HOTPLUG, - 30747, 24755, 26274, 26278, 0, + 30833, 24851, 26370, 26374, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_RAS, - 23679, 30724, 24755, 28793, 9186, 30808, 353, 28802, 0, + 23775, 30810, 24851, 28895, 9282, 30894, 353, 28904, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_IOAPIC_2, - 23679, 30724, 8945, 24759, 0, + 23775, 30810, 9041, 24855, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_HA0_0, - 30747, 24764, 24769, 8134, 0, + 30833, 24860, 24865, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_R2_1, - 30747, 14010, 8204, 24769, 0, + 30833, 14120, 8237, 24865, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_QPI_0, - 30747, 24795, 0, + 30833, 24891, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_QPI_1, - 30747, 24795, 0, + 30833, 24891, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_IO_PMON, - 30747, 8898, 30816, 0, + 30833, 8994, 30902, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_QD_1, - 30747, 29414, 24519, 20237, 8134, 0, + 30833, 29496, 24615, 20315, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_QD_2, - 30747, 29414, 24519, 20237, 8136, 0, + 30833, 29496, 24615, 20315, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_QD_3, - 30747, 29414, 24519, 20237, 6411, 0, + 30833, 29496, 24615, 20315, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_QD_4, - 30747, 29414, 24519, 20237, 6422, 0, + 30833, 29496, 24615, 20315, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_QAT, - 30747, 26876, 0, + 30833, 26972, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_QAT_VF, - 30747, 26876, 19987, 8125, 0, + 30833, 26972, 20065, 8158, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_COREI76K_IMC_0, - 23679, 28744, 24799, 0, + 23775, 28846, 24895, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_HA0_DEBUG, - 30747, 24764, 24769, 8134, 24571, 0, + 30833, 24860, 24865, 8167, 24667, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_MEM_0_TTR_0, - 23679, 30724, 4504, 6455, 30821, 28837, 30829, 30838, 0, + 23775, 30810, 4504, 6473, 30907, 28939, 30915, 30924, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_QPI_2, - 30747, 24795, 0, + 30833, 24891, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_UBOX_2, - 23679, 30724, 27417, 0, + 23775, 30810, 27513, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_QPI_3, - 30747, 24795, 0, + 30833, 24891, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_PCU_0, - 30747, 24849, 0, + 30833, 24945, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_PCU_1, - 30747, 24849, 0, + 30833, 24945, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_PCU_2, - 23679, 30724, 24849, 0, + 23775, 30810, 24945, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_PCU_3, - 23679, 30724, 24849, 0, + 23775, 30810, 24945, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_PCU_4, - 23679, 30724, 24849, 0, + 23775, 30810, 24945, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_PCU_5, - 23679, 30724, 24849, 0, + 23775, 30810, 24945, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_HA0_1, - 30747, 24764, 24769, 8134, 0, + 30833, 24860, 24865, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_MEM_0_TTR_1, - 23679, 30724, 4504, 6455, 30821, 28837, 30829, 30838, 0, + 23775, 30810, 4504, 6473, 30907, 28939, 30915, 30924, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_MEM_0_TAD_0, - 23679, 30724, 4504, 6455, 30821, 8034, 30843, 0, + 23775, 30810, 4504, 6473, 30907, 8067, 30929, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_MEM_0_TAD_1, - 23679, 30724, 4504, 6455, 30821, 8034, 30843, 0, + 23775, 30810, 4504, 6473, 30907, 8067, 30929, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_MEM_0_TAD_2, - 23679, 30724, 4504, 6455, 30821, 8034, 30843, 0, + 23775, 30810, 4504, 6473, 30907, 8067, 30929, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_MEM_0_TAD_3, - 23679, 30724, 4504, 6455, 30821, 8034, 30843, 0, + 23775, 30810, 4504, 6473, 30907, 8067, 30929, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_DDR_CH_BR, - 30747, 30852, 30856, 24857, 0, + 30833, 30938, 30942, 24953, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_DDR_GL_BR, - 30747, 30852, 353, 24857, 0, + 30833, 30938, 353, 24953, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_MEM_0_TH_0, - 23679, 30724, 4504, 6455, 30862, 0, + 23775, 30810, 4504, 6473, 30948, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_MEM_0_TH_1, - 23679, 30724, 4504, 6455, 30862, 0, + 23775, 30810, 4504, 6473, 30948, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_MEM_0_ERR_0, - 23679, 30724, 4504, 6455, 30872, 0, + 23775, 30810, 4504, 6473, 30958, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_MEM_0_ERR_1, - 23679, 30724, 4504, 6455, 30872, 0, + 23775, 30810, 4504, 6473, 30958, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_MEM_0_UNK_0, - 23679, 30724, 4504, 6455, 0, + 23775, 30810, 4504, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_MEM_0_UNK_1, - 23679, 30724, 4504, 6455, 0, + 23775, 30810, 4504, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_MEM_0_UNK_2, - 23679, 30724, 4504, 6455, 0, + 23775, 30810, 4504, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_MEM_0_UNK_3, - 23679, 30724, 4504, 6455, 0, + 23775, 30810, 4504, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_DDR_CH_IF_0, - 30747, 30852, 20237, 28876, 3018, 0, + 30833, 30938, 20315, 28978, 3018, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_DDR_CH_IF_1, - 30747, 30852, 20237, 28876, 3018, 0, + 30833, 30938, 20315, 28978, 3018, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_DDR_CH_IF_2, - 30747, 30852, 20237, 28876, 3018, 0, + 30833, 30938, 20315, 28978, 3018, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_DDR_CH_IF_3, - 30747, 30852, 20237, 28876, 3018, 0, + 30833, 30938, 20315, 28978, 3018, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_PCU_6, - 23679, 30724, 24849, 0, + 23775, 30810, 24945, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_COREI76K_IMC_1, - 23679, 28744, 24799, 0, + 23775, 28846, 24895, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_CACHE_UNI_0, - 30747, 30880, 24769, 30888, 30893, 0, + 30833, 30966, 24865, 30974, 30979, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_CACHE_UNI_1, - 30747, 30880, 24769, 30888, 30893, 0, + 30833, 30966, 24865, 30974, 30979, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_CACHE_UNI_2, - 30747, 30880, 24769, 30888, 30893, 0, + 30833, 30966, 24865, 30974, 30979, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_CACHE_UNI_3, - 30747, 30880, 24769, 30888, 30893, 0, + 30833, 30966, 24865, 30974, 30979, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_CACHE_UNI_4, - 30747, 30880, 24769, 30888, 30893, 0, + 30833, 30966, 24865, 30974, 30979, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_CACHE_UNI_5, - 30747, 30880, 24769, 30888, 30893, 0, + 30833, 30966, 24865, 30974, 30979, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_CACHE_UNI_6, - 30747, 30880, 24769, 30888, 30893, 0, + 30833, 30966, 24865, 30974, 30979, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_CACHE_UNI_7, - 30747, 30880, 24769, 30888, 30893, 0, + 30833, 30966, 24865, 30974, 30979, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_CACHE_UNK_0, - 30747, 30880, 24769, 0, + 30833, 30966, 24865, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_CACHE_BRO_0, - 30747, 30880, 24769, 30888, 30902, 0, + 30833, 30966, 24865, 30974, 30988, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_CACHE_BRO_1, - 30747, 30880, 24769, 30888, 30902, 0, + 30833, 30966, 24865, 30974, 30988, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND_CACHE_BRO_2, - 30747, 30880, 24769, 30888, 30902, 0, + 30833, 30966, 24865, 30974, 30988, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82371SB_ISA, - 30913, 30921, 6837, 6563, 0, + 30999, 31007, 6855, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82371SB_IDE, - 30913, 30921, 6626, 3018, 0, + 30999, 31007, 6644, 3018, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82371SB_USB, - 30913, 30921, 6945, 6953, 6455, 0, + 30999, 31007, 6963, 6971, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82437VX, - 30929, 30937, 6, 6455, 0, + 31015, 31023, 6, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82439TX, - 30943, 30951, 6, 6455, 0, + 31029, 31037, 6, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82371AB_ISA, - 30958, 30966, 6837, 6563, 0, + 31044, 31052, 6855, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82371AB_IDE, - 30958, 30966, 6626, 6455, 0, + 31044, 31052, 6644, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82371AB_USB, - 30958, 30966, 6945, 6953, 6455, 0, + 31044, 31052, 6963, 6971, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82371AB_PMC, - 30958, 30966, 3740, 7078, 6455, 0, + 31044, 31052, 3740, 7096, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82810_MCH, - 30974, 4504, 6455, 8949, 0, + 31060, 4504, 6473, 9045, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82810_GC, - 30974, 1716, 6455, 0, + 31060, 1716, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82810_DC100_MCH, - 30980, 4504, 6455, 8949, 0, + 31066, 4504, 6473, 9045, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82810_DC100_GC, - 30980, 1716, 6455, 0, + 31066, 1716, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82810E_MCH, - 30992, 4504, 6455, 8949, 0, + 31078, 4504, 6473, 9045, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82810E_GC, - 30992, 1716, 6455, 0, + 31078, 1716, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82443LX, - 30999, 615, 8804, 6455, 0, + 31085, 615, 8900, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82443LX_AGP, - 30999, 8804, 3018, 0, + 31085, 8900, 3018, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82443BX, - 31007, 6953, 31015, 0, + 31093, 6971, 31101, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82443BX_AGP, - 31007, 8804, 3018, 0, + 31093, 8900, 3018, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82443BX_NOAGP, - 31007, 6953, 31015, 10543, 31033, 0, + 31093, 6971, 31101, 10658, 31119, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82440MX, - 31043, 6953, 31015, 0, + 31129, 6971, 31101, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82440MX_ACA, - 31043, 27586, 7054, 6455, 0, + 31129, 27682, 7072, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82440MX_ISA, - 31043, 6837, 6563, 0, + 31129, 6855, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82440MX_IDE, - 31043, 6626, 6455, 0, + 31129, 6644, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82440MX_USB, - 31043, 6945, 6953, 6455, 0, + 31129, 6963, 6971, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82440MX_PMC, - 31043, 3740, 7078, 6455, 0, + 31129, 3740, 7096, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82443GX, - 31051, 6953, 31015, 0, + 31137, 6971, 31101, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82443GX_AGP, - 31051, 8804, 3018, 0, + 31137, 8900, 3018, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82443GX_NOAGP, - 31051, 6953, 31015, 10543, 31033, 0, + 31137, 6971, 31101, 10658, 31119, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XMM7360, - 31059, 31063, 31068, 5764, 0, + 31145, 31149, 31154, 5782, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_I740, - 31072, 1716, 7847, 0, + 31158, 1716, 7880, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7HS_Z790_ESPI, - 31077, 23808, 0, + 31163, 23904, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7HS_H770_ESPI, - 31082, 23808, 0, + 31168, 23904, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7HS_B760_ESPI, - 31087, 23808, 0, + 31173, 23904, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7HS_C266_ESPI, - 31092, 23808, 0, + 31178, 23904, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7HS_C262_ESPI, - 31097, 23808, 0, + 31183, 23904, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7HS_P2SB, - 30388, 6476, 25800, 23813, 0, + 30470, 6494, 25896, 23909, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7HS_PMC, - 30388, 6476, 25800, 23818, 0, + 30470, 6494, 25896, 23914, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7HS_SMB, - 30388, 6476, 25800, 8962, 0, + 30470, 6494, 25896, 9058, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7HS_SPI, - 30388, 6476, 25800, 17409, 23822, 0, + 30470, 6494, 25896, 17500, 23918, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7HS_TRACE, - 30388, 6476, 25800, 23830, 8949, 0, + 30470, 6494, 25896, 23926, 9045, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7HS_SSRAM, - 30388, 6476, 25800, 23891, 23898, 0, + 30470, 6494, 25896, 23987, 23994, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7HS_UART_0, - 30388, 6476, 25800, 7983, 8134, 0, + 30470, 6494, 25896, 8016, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7HS_UART_1, - 30388, 6476, 25800, 7983, 8136, 0, + 30470, 6494, 25896, 8016, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7HS_GSPI_0, - 30388, 6476, 25800, 24211, 8134, 0, + 30470, 6494, 25896, 24307, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7HS_GSPI_1, - 30388, 6476, 25800, 24211, 8136, 0, + 30470, 6494, 25896, 24307, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7HS_PCIE_9, - 30388, 6476, 25800, 8204, 26891, 1047, 0, + 30470, 6494, 25896, 8237, 26987, 1047, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7HS_PCIE_10, - 30388, 6476, 25800, 8204, 26891, 9329, 0, + 30470, 6494, 25896, 8237, 26987, 9425, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7HS_PCIE_11, - 30388, 6476, 25800, 8204, 26891, 23836, 0, + 30470, 6494, 25896, 8237, 26987, 23932, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7HS_PCIE_12, - 30388, 6476, 25800, 8204, 26891, 14592, 0, + 30470, 6494, 25896, 8237, 26987, 14697, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7HS_PCIE_13, - 30388, 6476, 25800, 8204, 26891, 23839, 0, + 30470, 6494, 25896, 8237, 26987, 23935, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7HS_PCIE_14, - 30388, 6476, 25800, 8204, 26891, 23842, 0, + 30470, 6494, 25896, 8237, 26987, 23938, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7HS_PCIE_15, - 30388, 6476, 25800, 8204, 26891, 23845, 0, + 30470, 6494, 25896, 8237, 26987, 23941, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7HS_PCIE_16, - 30388, 6476, 25800, 8204, 26891, 19210, 0, + 30470, 6494, 25896, 8237, 26987, 19288, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7HS_PCIE_1, - 30388, 6476, 25800, 8204, 26891, 8136, 0, + 30470, 6494, 25896, 8237, 26987, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7HS_PCIE_2, - 30388, 6476, 25800, 8204, 26891, 6411, 0, + 30470, 6494, 25896, 8237, 26987, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7HS_PCIE_3, - 30388, 6476, 25800, 8204, 26891, 6422, 0, + 30470, 6494, 25896, 8237, 26987, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7HS_PCIE_4, - 30388, 6476, 25800, 8204, 26891, 6786, 0, + 30470, 6494, 25896, 8237, 26987, 6804, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7HS_PCIE_5, - 30388, 6476, 25800, 8204, 26891, 8138, 0, + 30470, 6494, 25896, 8237, 26987, 8171, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7HS_PCIE_6, - 30388, 6476, 25800, 8204, 26891, 8371, 0, + 30470, 6494, 25896, 8237, 26987, 8404, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7HS_PCIE_7, - 30388, 6476, 25800, 8204, 26891, 8373, 0, + 30470, 6494, 25896, 8237, 26987, 8406, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7HS_PCIE_8, - 30388, 6476, 25800, 8204, 26891, 6811, 0, + 30470, 6494, 25896, 8237, 26987, 6829, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7HS_PCIE_17, - 30388, 6476, 25800, 8204, 26891, 24225, 0, + 30470, 6494, 25896, 8237, 26987, 24321, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7HS_PCIE_18, - 30388, 6476, 25800, 8204, 26891, 24228, 0, + 30470, 6494, 25896, 8237, 26987, 24324, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7HS_PCIE_19, - 30388, 6476, 25800, 8204, 26891, 24231, 0, + 30470, 6494, 25896, 8237, 26987, 24327, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7HS_PCIE_20, - 30388, 6476, 25800, 8204, 26891, 11629, 0, + 30470, 6494, 25896, 8237, 26987, 11739, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7HS_PCIE_21, - 30388, 6476, 25800, 8204, 26891, 24216, 0, + 30470, 6494, 25896, 8237, 26987, 24312, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7HS_PCIE_22, - 30388, 6476, 25800, 8204, 26891, 14584, 0, + 30470, 6494, 25896, 8237, 26987, 14689, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7HS_PCIE_23, - 30388, 6476, 25800, 8204, 26891, 24219, 0, + 30470, 6494, 25896, 8237, 26987, 24315, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7HS_PCIE_24, - 30388, 6476, 25800, 8204, 26891, 24222, 0, + 30470, 6494, 25896, 8237, 26987, 24318, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7HS_PCIE_25, - 30388, 6476, 25800, 8204, 26891, 23201, 0, + 30470, 6494, 25896, 8237, 26987, 23297, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7HS_PCIE_26, - 30388, 6476, 25800, 8204, 26891, 31102, 0, + 30470, 6494, 25896, 8237, 26987, 31188, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7HS_PCIE_27, - 30388, 6476, 25800, 8204, 26891, 31105, 0, + 30470, 6494, 25896, 8237, 26987, 31191, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7HS_PCIE_28, - 30388, 6476, 25800, 8204, 26891, 31108, 0, + 30470, 6494, 25896, 8237, 26987, 31194, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7HS_I2C_0, - 30388, 6476, 25800, 17453, 8134, 0, + 30470, 6494, 25896, 17544, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7HS_I2C_1, - 30388, 6476, 25800, 17453, 8136, 0, + 30470, 6494, 25896, 17544, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7HS_I2C_2, - 30388, 6476, 25800, 17453, 6411, 0, + 30470, 6494, 25896, 17544, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7HS_I2C_3, - 30388, 6476, 25800, 17453, 6422, 0, + 30470, 6494, 25896, 17544, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7HS_HDA, - 30388, 6476, 25800, 8230, 7054, 0, + 30470, 6494, 25896, 8263, 7072, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7HS_UART_3, - 30388, 6476, 25800, 7983, 6422, 0, + 30470, 6494, 25896, 8016, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7HS_XHCI, - 30388, 6476, 25800, 6945, 8450, 23874, 29717, 8233, 0, + 30470, 6494, 25896, 6963, 8483, 23970, 29799, 8266, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7HS_XDCI, - 30388, 6476, 25800, 6945, 8450, 23874, 23882, 23886, 0, + 30470, 6494, 25896, 6963, 8483, 23970, 23978, 23982, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7HS_D_AHCI, - 30388, 6476, 25800, 8762, 8984, 0, + 30470, 6494, 25896, 8800, 9080, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7HS_HECI_1, - 30388, 6476, 25800, 24265, 8136, 0, + 30470, 6494, 25896, 24361, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7HS_HECI_2, - 30388, 6476, 25800, 24265, 6411, 0, + 30470, 6494, 25896, 24361, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7HS_IDER, - 30388, 6476, 25800, 23865, 0, + 30470, 6494, 25896, 23961, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7HS_KT, - 30388, 6476, 25800, 23871, 0, + 30470, 6494, 25896, 23967, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7HS_HECI_3, - 30388, 6476, 25800, 24265, 6422, 0, + 30470, 6494, 25896, 24361, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7HS_HECI_4, - 30388, 6476, 25800, 24265, 6786, 0, + 30470, 6494, 25896, 24361, 6804, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7HS_ISH, - 30388, 6476, 25800, 692, 23921, 8949, 0, + 30470, 6494, 25896, 692, 24017, 9045, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7HS_GSPI_3, - 30388, 6476, 25800, 24211, 6422, 0, + 30470, 6494, 25896, 24307, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7HS_GSPI_2, - 30388, 6476, 25800, 24211, 6411, 0, + 30470, 6494, 25896, 24307, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7HS_I2C_4, - 30388, 6476, 25800, 17453, 6786, 0, + 30470, 6494, 25896, 17544, 6804, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7HS_I2C_5, - 30388, 6476, 25800, 17453, 8138, 0, + 30470, 6494, 25896, 17544, 8171, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_7HS_UART_2, - 30388, 6476, 25800, 7983, 6411, 0, + 30470, 6494, 25896, 8016, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_Q670_ESPI, - 31111, 23808, 0, + 31197, 23904, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_Z690_ESPI, - 31116, 23808, 0, + 31202, 23904, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_H670_ESPI, - 31121, 23808, 0, + 31207, 23904, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_B660_ESPI, - 31126, 23808, 0, + 31212, 23904, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_H610_ESPI, - 31131, 23808, 0, + 31217, 23904, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_W680_ESPI, - 31136, 23808, 0, + 31222, 23904, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_HM670_ESPI, - 31141, 23808, 0, + 31227, 23904, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_WM690_ESPI, - 31147, 23808, 0, + 31233, 23904, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_H_P2SB, - 14633, 6476, 29676, 23813, 0, + 8849, 6494, 29758, 23909, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_H_PMC, - 14633, 6476, 29676, 23818, 0, + 8849, 6494, 29758, 23914, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_H_SMB, - 14633, 6476, 29676, 8962, 0, + 8849, 6494, 29758, 9058, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_H_SPI, - 14633, 6476, 29676, 17409, 23822, 0, + 8849, 6494, 29758, 17500, 23918, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_H_TRACE, - 14633, 6476, 29676, 23830, 8949, 0, + 8849, 6494, 29758, 23926, 9045, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_H_SSRAM, - 14633, 6476, 29676, 23891, 23898, 0, + 8849, 6494, 29758, 23987, 23994, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_H_UART_0, - 14633, 6476, 29676, 7983, 8134, 0, + 8849, 6494, 29758, 8016, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_H_UART_1, - 14633, 6476, 29676, 7983, 8136, 0, + 8849, 6494, 29758, 8016, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_H_GSPI_0, - 14633, 6476, 29676, 24211, 8134, 0, + 8849, 6494, 29758, 24307, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_H_GSPI_1, - 14633, 6476, 29676, 24211, 8136, 0, + 8849, 6494, 29758, 24307, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_H_PCIE_9, - 14633, 6476, 29676, 8204, 26891, 1047, 0, + 8849, 6494, 29758, 8237, 26987, 1047, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_H_PCIE_10, - 14633, 6476, 29676, 8204, 26891, 9329, 0, + 8849, 6494, 29758, 8237, 26987, 9425, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_H_PCIE_11, - 14633, 6476, 29676, 8204, 26891, 23836, 0, + 8849, 6494, 29758, 8237, 26987, 23932, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_H_PCIE_12, - 14633, 6476, 29676, 8204, 26891, 14592, 0, + 8849, 6494, 29758, 8237, 26987, 14697, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_H_PCIE_13, - 14633, 6476, 29676, 8204, 26891, 23839, 0, + 8849, 6494, 29758, 8237, 26987, 23935, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_H_PCIE_14, - 14633, 6476, 29676, 8204, 26891, 23842, 0, + 8849, 6494, 29758, 8237, 26987, 23938, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_H_PCIE_15, - 14633, 6476, 29676, 8204, 26891, 23845, 0, + 8849, 6494, 29758, 8237, 26987, 23941, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_H_PCIE_16, - 14633, 6476, 29676, 8204, 26891, 19210, 0, + 8849, 6494, 29758, 8237, 26987, 19288, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_H_PCIE_1, - 14633, 6476, 29676, 8204, 26891, 8136, 0, + 8849, 6494, 29758, 8237, 26987, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_H_PCIE_2, - 14633, 6476, 29676, 8204, 26891, 6411, 0, + 8849, 6494, 29758, 8237, 26987, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_H_PCIE_3, - 14633, 6476, 29676, 8204, 26891, 6422, 0, + 8849, 6494, 29758, 8237, 26987, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_H_PCIE_4, - 14633, 6476, 29676, 8204, 26891, 6786, 0, + 8849, 6494, 29758, 8237, 26987, 6804, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_H_PCIE_5, - 14633, 6476, 29676, 8204, 26891, 8138, 0, + 8849, 6494, 29758, 8237, 26987, 8171, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_H_PCIE_6, - 14633, 6476, 29676, 8204, 26891, 8371, 0, + 8849, 6494, 29758, 8237, 26987, 8404, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_H_PCIE_7, - 14633, 6476, 29676, 8204, 26891, 8373, 0, + 8849, 6494, 29758, 8237, 26987, 8406, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_H_PCIE_8, - 14633, 6476, 29676, 8204, 26891, 6811, 0, + 8849, 6494, 29758, 8237, 26987, 6829, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_H_PCIE_17, - 14633, 6476, 29676, 8204, 26891, 24225, 0, + 8849, 6494, 29758, 8237, 26987, 24321, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_H_PCIE_18, - 14633, 6476, 29676, 8204, 26891, 24228, 0, + 8849, 6494, 29758, 8237, 26987, 24324, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_H_PCIE_19, - 14633, 6476, 29676, 8204, 26891, 24231, 0, + 8849, 6494, 29758, 8237, 26987, 24327, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_H_PCIE_20, - 14633, 6476, 29676, 8204, 26891, 11629, 0, + 8849, 6494, 29758, 8237, 26987, 11739, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_H_PCIE_21, - 14633, 6476, 29676, 8204, 26891, 24216, 0, + 8849, 6494, 29758, 8237, 26987, 24312, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_H_PCIE_22, - 14633, 6476, 29676, 8204, 26891, 14584, 0, + 8849, 6494, 29758, 8237, 26987, 14689, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_H_PCIE_23, - 14633, 6476, 29676, 8204, 26891, 24219, 0, + 8849, 6494, 29758, 8237, 26987, 24315, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_H_PCIE_24, - 14633, 6476, 29676, 8204, 26891, 24222, 0, + 8849, 6494, 29758, 8237, 26987, 24318, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_H_PCIE_25, - 14633, 6476, 29676, 8204, 26891, 23201, 0, + 8849, 6494, 29758, 8237, 26987, 23297, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_H_PCIE_26, - 14633, 6476, 29676, 8204, 26891, 31102, 0, + 8849, 6494, 29758, 8237, 26987, 31188, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_H_PCIE_27, - 14633, 6476, 29676, 8204, 26891, 31105, 0, + 8849, 6494, 29758, 8237, 26987, 31191, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_H_PCIE_28, - 14633, 6476, 29676, 8204, 26891, 31108, 0, + 8849, 6494, 29758, 8237, 26987, 31194, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_H_I2C_0, - 14633, 6476, 29676, 17453, 8134, 0, + 8849, 6494, 29758, 17544, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_H_I2C_1, - 14633, 6476, 29676, 17453, 8136, 0, + 8849, 6494, 29758, 17544, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_H_I2C_2, - 14633, 6476, 29676, 17453, 6411, 0, + 8849, 6494, 29758, 17544, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_H_I2C_3, - 14633, 6476, 29676, 17453, 6422, 0, + 8849, 6494, 29758, 17544, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_H_HDA, - 14633, 6476, 29676, 8230, 7054, 0, + 8849, 6494, 29758, 8263, 7072, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_H_UART_3, - 14633, 6476, 29676, 7983, 6422, 0, + 8849, 6494, 29758, 8016, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_H_XHCI, - 14633, 6476, 29676, 6945, 8450, 23874, 29717, 8233, 0, + 8849, 6494, 29758, 6963, 8483, 23970, 29799, 8266, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_H_XDCI, - 14633, 6476, 29676, 6945, 8450, 23874, 23882, 23886, 0, + 8849, 6494, 29758, 6963, 8483, 23970, 23978, 23982, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_H_D_AHCI, - 14633, 6476, 29676, 8762, 8984, 0, + 8849, 6494, 29758, 8800, 9080, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_H_HECI_1, - 14633, 6476, 29676, 24265, 8136, 0, + 8849, 6494, 29758, 24361, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_H_HECI_2, - 14633, 6476, 29676, 24265, 6411, 0, + 8849, 6494, 29758, 24361, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_H_IDER, - 14633, 6476, 29676, 23865, 0, + 8849, 6494, 29758, 23961, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_H_KT, - 14633, 6476, 29676, 23871, 0, + 8849, 6494, 29758, 23967, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_H_HECI_3, - 14633, 6476, 29676, 24265, 6422, 0, + 8849, 6494, 29758, 24361, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_H_HECI_4, - 14633, 6476, 29676, 24265, 6786, 0, + 8849, 6494, 29758, 24361, 6804, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_H_ISH, - 14633, 6476, 29676, 692, 23921, 8949, 0, + 8849, 6494, 29758, 692, 24017, 9045, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_H_GSPI_3, - 14633, 6476, 29676, 24211, 6422, 0, + 8849, 6494, 29758, 24307, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_H_GSPI_2, - 14633, 6476, 29676, 24211, 6411, 0, + 8849, 6494, 29758, 24307, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_H_I2C_4, - 14633, 6476, 29676, 17453, 6786, 0, + 8849, 6494, 29758, 17544, 6804, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_H_I2C_5, - 14633, 6476, 29676, 17453, 8138, 0, + 8849, 6494, 29758, 17544, 8171, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6HS_H_UART_2, - 14633, 6476, 29676, 7983, 6411, 0, + 8849, 6494, 29758, 8016, 6429, 0, + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_VMD_MTL, + 30250, 7096, 2418, 0, + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_NPU_MTL, + 31239, 23770, 30806, 0, + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_LPC_MTL, + 31239, 23770, 31246, 6581, 0, + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PCH_MTL, + 31239, 23770, 25896, 0, + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SMBUS_MTL, + 31239, 23770, 31254, 0, + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SPI_MTL, + 31239, 23770, 17500, 6473, 0, + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_ARCG_MTL, + 31239, 23770, 30546, 1716, 0, + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_AHCI_MTL, + 31239, 23770, 8819, 6473, 0, + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_USB32_MTL, + 31239, 23770, 6963, 8483, 23970, 23974, 8266, 6971, 6473, 0, + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_MPM_MTL, + 31239, 23770, 4504, 3740, 7096, 0, + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_TB4USB_MTL, + 31239, 23770, 30050, 6804, 6963, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SCH_IDE, - 31153, 6626, 6455, 0, + 31260, 6644, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E600_HDA, - 29575, 8230, 7054, 0, + 29657, 8263, 7072, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E600_PCIB_0, - 29575, 19987, 8791, 6563, 0, + 29657, 20065, 8887, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E600_PCIB_1, - 29575, 19987, 8791, 6563, 0, + 29657, 20065, 8887, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E600_GVD, - 29575, 692, 31157, 234, 31165, 0, + 29657, 692, 31264, 234, 31272, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E600_PCIB_2, - 29575, 19987, 8791, 6563, 0, + 29657, 20065, 8887, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E600_PCIB_3, - 29575, 19987, 8791, 6563, 0, + 29657, 20065, 8887, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_E600_LPC, - 24549, 8115, 31173, 8958, 6563, 0, + 24645, 8148, 31280, 9054, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PCI450_PB, - 31178, 615, 6563, 31189, 0, + 31285, 615, 6581, 31296, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PCI450_MC, - 31194, 4504, 6455, 31205, 0, + 31301, 4504, 6473, 31312, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82451NX_MIOC, - 31210, 4504, 647, 8945, 6455, 31218, 0, + 31317, 4504, 647, 9041, 6473, 31325, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82451NX_PXB, - 31210, 615, 31225, 6563, 31234, 0, + 31317, 615, 31332, 6581, 31341, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_AMBLK_Y_GT2_2, - 28916, 1716, 15380, 24484, 0, + 29018, 1716, 15476, 24580, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_AMBLK_Y_IGD, - 28916, 1716, 0, + 29018, 1716, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EG20T_PCIB, - 31240, 25800, 8204, 6563, 0, + 31347, 25896, 8237, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EG20T_PCTHUB, - 31240, 25800, 4478, 8949, 0, + 31347, 25896, 4478, 9045, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EG20T_GBE, - 31240, 25800, 5709, 31246, 0, + 31347, 25896, 5727, 31353, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EG20T_GPIO, - 31240, 25800, 17400, 0, + 31347, 25896, 17491, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EG20T_OHCI1_0, - 31240, 25800, 6945, 8722, 6953, 6455, 23974, 0, + 31347, 25896, 6963, 8755, 6971, 6473, 24070, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EG20T_OHCI1_1, - 31240, 25800, 6945, 8722, 6953, 6455, 23974, 0, + 31347, 25896, 6963, 8755, 6971, 6473, 24070, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EG20T_OHCI1_2, - 31240, 25800, 6945, 8722, 6953, 6455, 23974, 0, + 31347, 25896, 6963, 8755, 6971, 6473, 24070, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EG20T_EHCI1, - 31240, 25800, 6945, 8727, 6953, 6455, 23974, 0, + 31347, 25896, 6963, 8760, 6971, 6473, 24070, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EG20T_USB_DEV, - 31240, 25800, 6945, 2418, 0, + 31347, 25896, 6963, 2418, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EG20T_SDIO_0, - 31240, 25800, 27535, 6455, 23971, 0, + 31347, 25896, 27631, 6473, 24067, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EG20T_SDIO_1, - 31240, 25800, 27535, 6455, 23974, 0, + 31347, 25896, 27631, 6473, 24070, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EG20T_AHCI, - 31240, 25800, 8775, 8762, 6455, 0, + 31347, 25896, 8819, 8800, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EG20T_OHCI0_0, - 31240, 25800, 6945, 8722, 6953, 6455, 23971, 0, + 31347, 25896, 6963, 8755, 6971, 6473, 24067, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EG20T_OHCI0_1, - 31240, 25800, 6945, 8722, 6953, 6455, 23971, 0, + 31347, 25896, 6963, 8755, 6971, 6473, 24067, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EG20T_OHCI0_2, - 31240, 25800, 6945, 8722, 6953, 6455, 23971, 0, + 31347, 25896, 6963, 8755, 6971, 6473, 24067, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EG20T_EHCI0, - 31240, 25800, 6945, 8727, 6953, 6455, 23971, 0, + 31347, 25896, 6963, 8760, 6971, 6473, 24067, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EG20T_DMA_0, - 31240, 25800, 31252, 23971, 0, + 31347, 25896, 31359, 24067, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EG20T_UART_0, - 31240, 25800, 7983, 23971, 0, + 31347, 25896, 8016, 24067, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EG20T_UART_1, - 31240, 25800, 7983, 23974, 0, + 31347, 25896, 8016, 24070, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EG20T_UART_2, - 31240, 25800, 7983, 28073, 0, + 31347, 25896, 8016, 28169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EG20T_UART_3, - 31240, 25800, 7983, 28100, 0, + 31347, 25896, 8016, 28196, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EG20T_DMA_1, - 31240, 25800, 31252, 23974, 0, + 31347, 25896, 31359, 24070, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EG20T_SPI, - 31240, 25800, 17409, 0, + 31347, 25896, 17500, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EG20T_I2C, - 31240, 25800, 17453, 3018, 0, + 31347, 25896, 17544, 3018, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EG20T_CAN, - 31240, 25800, 30285, 6455, 0, + 31347, 25896, 30367, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_EG20T_IEEE1588, - 31240, 25800, 31257, 0, + 31347, 25896, 31364, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_8SER_DT_SATA, - 6811, 6476, 23741, 8762, 6455, 0, + 6829, 6494, 23837, 8800, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_8SER_MO_SATA, - 6811, 6476, 23755, 8762, 6455, 0, + 6829, 6494, 23851, 8800, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_8SER_DT_SATA_AHCI, - 6811, 6476, 23741, 8762, 6455, 8984, 0, + 6829, 6494, 23837, 8800, 6473, 9080, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_8SER_MO_SATA_AHCI, - 6811, 6476, 23755, 8762, 6455, 8984, 0, + 6829, 6494, 23851, 8800, 6473, 9080, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_8SER_DT_SATA_RAID, - 6811, 6476, 23741, 8762, 6455, 8991, 0, + 6829, 6494, 23837, 8800, 6473, 9087, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_8SER_MO_SATA_RAID, - 6811, 6476, 23755, 8762, 6455, 8991, 0, + 6829, 6494, 23851, 8800, 6473, 9087, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_8SER_DT_SATA_RAID_SR, - 6811, 6476, 23741, 8762, 6455, 8991, 9782, 18970, 31266, 0, + 6829, 6494, 23837, 8800, 6473, 9087, 9878, 19048, 31373, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_8SER_MO_SATA_RAID_SR, - 6811, 6476, 23755, 8762, 6455, 8991, 9782, 18970, 31266, 0, + 6829, 6494, 23851, 8800, 6473, 9087, 9878, 19048, 31373, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_8SER_DT_SATA_2, - 6811, 6476, 23741, 8762, 6455, 0, + 6829, 6494, 23837, 8800, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_8SER_MO_SATA_2, - 6811, 6476, 23755, 8762, 6455, 0, + 6829, 6494, 23851, 8800, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_8SER_DT_SATA_RAID1, - 6811, 6476, 23741, 8762, 6455, 31275, 0, + 6829, 6494, 23837, 8800, 6473, 31382, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_8SER_MO_SATA_RAID1, - 6811, 6476, 23755, 8762, 6455, 31275, 0, + 6829, 6494, 23851, 8800, 6473, 31382, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_8SERIES_PCIE_1, - 6811, 6476, 8204, 0, + 6829, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_8SERIES_PCIE_2, - 6811, 6476, 8204, 0, + 6829, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_8SERIES_PCIE_3, - 6811, 6476, 8204, 0, + 6829, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_8SERIES_PCIE_4, - 6811, 6476, 8204, 0, + 6829, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_8SERIES_PCIE_5, - 6811, 6476, 8204, 0, + 6829, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_8SERIES_PCIE_6, - 6811, 6476, 8204, 0, + 6829, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_8SERIES_PCIE_7, - 6811, 6476, 8204, 0, + 6829, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_8SERIES_PCIE_8, - 6811, 6476, 8204, 0, + 6829, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_8SERIES_HDA, - 6811, 6476, 8230, 7054, 0, + 6829, 6494, 8263, 7072, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_8SERIES_SMB, - 6811, 6476, 8962, 6455, 0, + 6829, 6494, 9058, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_8SERIES_THERM, - 6811, 6476, 23913, 0, + 6829, 6494, 24009, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_8SERIES_EHCI_1, - 6811, 6476, 6945, 8727, 0, + 6829, 6494, 6963, 8760, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_8SERIES_EHCI_2, - 6811, 6476, 6945, 8727, 0, + 6829, 6494, 6963, 8760, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_8SERIES_XHCI, - 6811, 6476, 6945, 8233, 0, + 6829, 6494, 6963, 8266, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_8SERIES_LAN, - 6811, 6476, 4540, 0, + 6829, 6494, 4540, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_8SERIES_MEI_1, - 6811, 6476, 23861, 6455, 0, + 6829, 6494, 23957, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_8SERIES_MEI_2, - 6811, 6476, 23861, 6455, 0, + 6829, 6494, 23957, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_8SERIES_IDE_R, - 6811, 6476, 23865, 0, + 6829, 6494, 23961, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_8SERIES_KT, - 6811, 6476, 23871, 0, + 6829, 6494, 23967, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_8SERIES_M_LPC, - 6811, 6476, 11578, 31283, 31288, 31297, 8958, 0, + 6829, 6494, 11693, 31390, 31395, 31404, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_8SERIES_D_LPC, - 6811, 6476, 31300, 31283, 31288, 31297, 8958, 0, + 6829, 6494, 31407, 31390, 31395, 31404, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_Z87_LPC, - 31308, 8958, 0, + 31415, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_Z85_LPC, - 31312, 8958, 0, + 31419, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_HM86_LPC, - 31316, 8958, 0, + 31423, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_H87_LPC, - 31321, 8958, 0, + 31428, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_HM87_LPC, - 31325, 8958, 0, + 31432, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_Q85_LPC, - 31330, 8958, 0, + 31437, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_Q87_LPC, - 31334, 8958, 0, + 31441, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_QM87_LPC, - 31338, 8958, 0, + 31445, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_B85_LPC, - 31343, 8958, 0, + 31450, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C222_LPC, - 31347, 8958, 0, + 31454, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C224_LPC, - 31352, 8958, 0, + 31459, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C226_LPC, - 31357, 8958, 0, + 31464, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_H81_LPC, - 31362, 8958, 0, + 31469, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_9SERIES_SATA, - 1047, 6476, 8762, 6455, 0, + 1047, 6494, 8800, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_9SERIES_SATA_AHCI, - 1047, 6476, 8762, 6455, 8984, 0, + 1047, 6494, 8800, 6473, 9080, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_9SERIES_SATA_RAID, - 1047, 6476, 8762, 6455, 8991, 0, + 1047, 6494, 8800, 6473, 9087, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_9SERIES_SATA_RAID_SR, - 1047, 6476, 8762, 6455, 8991, 9782, 18970, 31266, 0, + 1047, 6494, 8800, 6473, 9087, 9878, 19048, 31373, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_9SERIES_SATA_2, - 1047, 6476, 8762, 6455, 0, + 1047, 6494, 8800, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_9SERIES_SATA_RAID1, - 1047, 6476, 8762, 6455, 31275, 0, + 1047, 6494, 8800, 6473, 31382, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_9SERIES_PCIE_1, - 1047, 6476, 8204, 0, + 1047, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_9SERIES_PCIE_2, - 1047, 6476, 8204, 0, + 1047, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_9SERIES_PCIE_3, - 1047, 6476, 8204, 0, + 1047, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_9SERIES_PCIE_4, - 1047, 6476, 8204, 0, + 1047, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_9SERIES_PCIE_5, - 1047, 6476, 8204, 0, + 1047, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_9SERIES_PCIE_6, - 1047, 6476, 8204, 0, + 1047, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_9SERIES_PCIE_7, - 1047, 6476, 8204, 0, + 1047, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_9SERIES_PCIE_8, - 1047, 6476, 8204, 0, + 1047, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_9SERIES_HDA, - 1047, 6476, 8230, 7054, 0, + 1047, 6494, 8263, 7072, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_9SERIES_SMB, - 1047, 6476, 8962, 6455, 0, + 1047, 6494, 9058, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_9SERIES_THERM, - 1047, 6476, 23913, 0, + 1047, 6494, 24009, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_9SERIES_EHCI_1, - 1047, 6476, 6945, 8727, 0, + 1047, 6494, 6963, 8760, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_9SERIES_EHCI_2, - 1047, 6476, 6945, 8727, 0, + 1047, 6494, 6963, 8760, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_9SERIES_XHCI, - 1047, 6476, 6945, 8233, 0, + 1047, 6494, 6963, 8266, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_9SERIES_LAN, - 1047, 6476, 4540, 0, + 1047, 6494, 4540, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_9SERIES_MEI_1, - 1047, 6476, 23861, 6455, 0, + 1047, 6494, 23957, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_9SERIES_MEI_2, - 1047, 6476, 23861, 6455, 0, + 1047, 6494, 23957, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_9SERIES_IDE_R, - 1047, 6476, 23865, 0, + 1047, 6494, 23961, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_9SERIES_KT, - 1047, 6476, 23871, 0, + 1047, 6494, 23967, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_9SERIES_LPC_ES, - 1047, 6476, 31283, 31288, 31297, 8958, 0, + 1047, 6494, 31390, 31395, 31404, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_Z97_LPC, - 31366, 8958, 0, + 31473, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_H97_LPC, - 31370, 8958, 0, + 31477, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C610_SATA, - 31374, 8762, 6455, 0, + 31481, 8800, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C610_SATA_AHCI, - 31374, 8762, 6455, 8984, 0, + 31481, 8800, 6473, 9080, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C610_SATA_RAID_2, - 31374, 8762, 6455, 8991, 0, + 31481, 8800, 6473, 9087, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C610_SATA_2, - 31374, 8762, 6455, 0, + 31481, 8800, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C610_PCIE_1_1, - 31374, 8204, 0, + 31481, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C610_PCIE_1_2, - 31374, 8204, 0, + 31481, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C610_PCIE_2_1, - 31374, 8204, 0, + 31481, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C610_PCIE_2_2, - 31374, 8204, 0, + 31481, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C610_PCIE_3_1, - 31374, 8204, 0, + 31481, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C610_PCIE_3_2, - 31374, 8204, 0, + 31481, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C610_PCIE_4_1, - 31374, 8204, 0, + 31481, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C610_PCIE_4_2, - 31374, 8204, 0, + 31481, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C610_PCIE_5_1, - 31374, 8204, 0, + 31481, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C610_PCIE_5_2, - 31374, 8204, 0, + 31481, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C610_PCIE_6_1, - 31374, 8204, 0, + 31481, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C610_PCIE_6_2, - 31374, 8204, 0, + 31481, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C610_PCIE_7_1, - 31374, 8204, 0, + 31481, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C610_PCIE_7_2, - 31374, 8204, 0, + 31481, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C610_PCIE_8_1, - 31374, 8204, 0, + 31481, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C610_PCIE_8_2, - 31374, 8204, 0, + 31481, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C610_HDA, - 31374, 8230, 7054, 0, + 31481, 8263, 7072, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C610_HDA_2, - 31374, 8230, 7054, 0, + 31481, 8263, 7072, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C610_SMB, - 31374, 8962, 6455, 0, + 31481, 9058, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C610_THERM, - 31374, 23913, 0, + 31481, 24009, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C610_EHCI, - 31374, 6945, 8727, 0, + 31481, 6963, 8760, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C610_EHCI_2, - 31374, 6945, 8727, 0, + 31481, 6963, 8760, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C610_XHCI, - 31374, 6945, 8233, 0, + 31481, 6963, 8266, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C610_LAN, - 31374, 4540, 0, + 31481, 4540, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C610_MEI, - 31374, 23861, 6455, 0, + 31481, 23957, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C610_MEI_2, - 31374, 23861, 6455, 0, + 31481, 23957, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C610_IDE_R, - 31374, 23865, 0, + 31481, 23961, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C610_KT, - 31374, 23871, 0, + 31481, 23967, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_X99_LPC, - 31383, 8958, 0, + 31490, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_X99_LPC_2, - 31383, 8958, 0, + 31490, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C610_SSATA, - 31374, 28329, 6455, 0, + 31481, 28431, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C610_SSATA_AHCI, - 31374, 28329, 6455, 8984, 0, + 31481, 28431, 6473, 9080, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C610_SSATA_RAID, - 31374, 28329, 6455, 8991, 0, + 31481, 28431, 6473, 9087, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C610_SPSR, - 31374, 31387, 0, + 31481, 31494, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C610_MS_SMB0, - 31374, 31392, 31395, 0, + 31481, 31499, 31254, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C610_MS_SMB1, - 31374, 31392, 31395, 0, + 31481, 31499, 31254, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C610_MS_SMB2, - 31374, 31392, 31395, 0, + 31481, 31499, 31254, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_TGL_H_PCIE_RC_010, - 31401, 23674, 29471, 8204, 31407, 31410, 29883, 0, + 31502, 23770, 29553, 8237, 31508, 31511, 29965, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_TGL_UP4_2C_HOST, - 31401, 23674, 31414, 31419, 6953, 0, + 31502, 23770, 31515, 31520, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_TGL_DTT, - 31401, 23674, 2881, 29961, 127, 0, + 31502, 23770, 2881, 30043, 127, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_TGL_UP3_2C_HOST, - 31401, 23674, 31426, 31419, 6953, 0, + 31502, 23770, 31527, 31520, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_TGL_H_PCIE_RC_011, - 31401, 23674, 29471, 8204, 31407, 31431, 30014, 0, + 31502, 23770, 29553, 8237, 31508, 31532, 30096, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_TGL_H_PCIE_RC_012, - 31401, 23674, 29471, 8204, 31407, 31435, 30048, 0, + 31502, 23770, 29553, 8237, 31508, 31536, 30130, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_TGL_PEG60, - 31401, 23674, 31439, 31445, 10513, 0, + 31502, 23770, 31540, 31546, 10628, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_TGL_VMD, - 31401, 23674, 30168, 7078, 2418, 0, + 31502, 23770, 30250, 7096, 2418, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_TGL_CLSRAM, - 31401, 23674, 30148, 30154, 647, 30158, 2418, 0, + 31502, 23770, 30230, 30236, 647, 30240, 2418, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_TGL_H_PCIE_RC_060, - 31401, 23674, 29471, 8204, 31407, 31455, 30048, 0, + 31502, 23770, 29553, 8237, 31508, 31556, 30130, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_TGL_GNA, - 31401, 23674, 30101, 30107, 30114, 2418, 0, + 31502, 23770, 30183, 30189, 30196, 2418, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_TGL_UP4_4C_HOST, - 31401, 23674, 31414, 31459, 6953, 0, + 31502, 23770, 31515, 31560, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_TGL_UP_XHCI, - 31401, 23674, 31439, 29889, 6953, 28949, 0, + 31502, 23770, 31540, 29971, 6971, 29051, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_TGL_UP3_4C_HOST, - 31401, 23674, 31426, 31459, 6953, 0, + 31502, 23770, 31527, 31560, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_TGL_XDCI, - 31401, 23674, 29889, 2418, 28956, 0, + 31502, 23770, 29971, 2418, 29058, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_TGL_H_XHCI, - 31401, 23674, 29471, 29889, 6953, 28949, 0, + 31502, 23770, 29553, 29971, 6971, 29051, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_TGL_UP_IPU, - 31401, 23674, 31439, 4342, 811, 27003, 0, + 31502, 23770, 31540, 4342, 811, 27099, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_TGL_UP_4C_HOST, - 31401, 23674, 31426, 31466, 31470, 31459, 6953, 0, + 31502, 23770, 31527, 31567, 31571, 31560, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_TGL_UP_TBTDMA_0, - 31401, 23674, 31439, 29968, 24519, 8134, 0, + 31502, 23770, 31540, 30050, 24615, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_TGL_UP_TBTDMA_1, - 31401, 23674, 31439, 29968, 24519, 8136, 0, + 31502, 23770, 31540, 30050, 24615, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_TGL_H_TBTDMA_0, - 31401, 23674, 29471, 29968, 24519, 8134, 0, + 31502, 23770, 29553, 30050, 24615, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_TGL_H_TBTDMA_1, - 31401, 23674, 29471, 29968, 24519, 8136, 0, + 31502, 23770, 29553, 30050, 24615, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_TGL_UP_TBT_PCIE_0, - 31401, 23674, 31439, 29968, 8204, 8134, 0, + 31502, 23770, 31540, 30050, 8237, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_TGL_UP_TBT_PCIE_1, - 31401, 23674, 31439, 29968, 8204, 8136, 0, + 31502, 23770, 31540, 30050, 8237, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_TGL_H_6C_HOST, - 31401, 23674, 31478, 31481, 6953, 0, + 31502, 23770, 31579, 31582, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_TGL_UP_TBT_PCIE_2, - 31401, 23674, 31439, 29968, 8204, 6411, 0, + 31502, 23770, 31540, 30050, 8237, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_TGL_UP_TBT_PCIE_3, - 31401, 23674, 31439, 29968, 8204, 6422, 0, + 31502, 23770, 31540, 30050, 8237, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_TGL_H_TBT_PCIE_0, - 31401, 23674, 29471, 29968, 8204, 8134, 0, + 31502, 23770, 29553, 30050, 8237, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_TGL_H_TBT_PCIE_1, - 31401, 23674, 29471, 29968, 8204, 8136, 0, + 31502, 23770, 29553, 30050, 8237, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_TGL_H_TBT_PCIE_2, - 31401, 23674, 29471, 29968, 8204, 6411, 0, + 31502, 23770, 29553, 30050, 8237, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_TGL_H_TBT_PCIE_3, - 31401, 23674, 29471, 29968, 8204, 6422, 0, + 31502, 23770, 29553, 30050, 8237, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_TGL_NPK, - 31401, 23674, 31488, 0, + 31502, 23770, 31589, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_TGL_H_8C_HOST, - 31401, 23674, 31478, 31492, 6953, 0, + 31502, 23770, 31579, 31593, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_TGL_H_IPU, - 31401, 23674, 29471, 4342, 811, 27003, 0, + 31502, 23770, 29553, 4342, 811, 27099, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_TGL_GT2_96_80EU_1, - 28916, 1716, 30629, 31499, 31505, 0, + 29018, 1716, 30705, 31600, 31606, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_TGL_GT2_96_80EU_2, - 28916, 1716, 30629, 31499, 31505, 0, + 29018, 1716, 30705, 31600, 31606, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_TGL_GT2_32EU, - 28916, 1716, 31509, 31515, 0, + 29018, 1716, 31610, 31616, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_TGL_GT2_16EU, - 28916, 1716, 31509, 31521, 0, + 29018, 1716, 31610, 31622, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_TGL_GT2_48EU, - 28916, 1716, 30629, 31527, 0, + 29018, 1716, 30705, 31628, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CMTLK_GTx, - 28916, 1716, 0, + 29018, 1716, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CMTLK_U_HOST, - 23790, 23674, 23796, 6953, 6563, 0, + 23886, 23770, 23892, 6971, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CMTLK_GT1_6, - 28916, 1716, 29500, 0, + 29018, 1716, 29582, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CMTLK_GT1_7, - 28916, 1716, 29500, 0, + 29018, 1716, 29582, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CMTLK_GTx_2, - 28916, 1716, 0, + 29018, 1716, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CMTLK_GT2_6, - 28916, 1716, 29504, 0, + 29018, 1716, 29586, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CMTLK_GT2_10, - 28916, 1716, 29508, 0, + 29018, 1716, 29590, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CMTLK_GT2_7, - 28916, 1716, 29504, 0, + 29018, 1716, 29586, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CMTLK_GT2_11, - 28916, 1716, 29508, 0, + 29018, 1716, 29590, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CMTLK_GT2_12, - 28916, 1716, 29508, 0, + 29018, 1716, 29590, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE4G_M_AHCI, - 23679, 24456, 23755, 8762, 6455, 8984, 0, + 23775, 24552, 23851, 8800, 6473, 9080, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE4G_M_RAID_1, - 23679, 24456, 23755, 8762, 6455, 8991, 0, + 23775, 24552, 23851, 8800, 6473, 9087, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE4G_M_RAID_2, - 23679, 24456, 23755, 8762, 6455, 8991, 27192, 0, + 23775, 24552, 23851, 8800, 6473, 9087, 27288, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE4G_M_RAID_3, - 23679, 24456, 23755, 8762, 6455, 8991, 27192, 0, + 23775, 24552, 23851, 8800, 6473, 9087, 27288, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE4G_M_PCIE_1, - 23679, 24456, 23755, 8204, 0, + 23775, 24552, 23851, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE4G_M_PCIE_2, - 23679, 24456, 23755, 8204, 0, + 23775, 24552, 23851, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE4G_M_PCIE_3, - 23679, 24456, 23755, 8204, 0, + 23775, 24552, 23851, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE4G_M_PCIE_4, - 23679, 24456, 23755, 8204, 0, + 23775, 24552, 23851, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE4G_M_PCIE_5, - 23679, 24456, 23755, 8204, 0, + 23775, 24552, 23851, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE4G_M_PCIE_6, - 23679, 24456, 23755, 8204, 0, + 23775, 24552, 23851, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE4G_M_HDA, - 23679, 24456, 23755, 8230, 7054, 0, + 23775, 24552, 23851, 8263, 7072, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE4G_M_SMB, - 23679, 24456, 23755, 8962, 0, + 23775, 24552, 23851, 9058, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE4G_M_THERM, - 23679, 24456, 23755, 23913, 0, + 23775, 24552, 23851, 24009, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE4G_M_EHCI, - 23679, 24456, 23755, 6945, 8727, 0, + 23775, 24552, 23851, 6963, 8760, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE4G_M_XHCI, - 23679, 24456, 23755, 6945, 8233, 0, + 23775, 24552, 23851, 6963, 8266, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE4G_M_SDIO, - 23679, 24456, 23755, 27535, 0, + 23775, 24552, 23851, 27631, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE4G_M_SSOUND, - 23679, 24456, 23755, 18970, 3384, 0, + 23775, 24552, 23851, 19048, 3384, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE4G_M_MEI_1, - 23679, 24456, 23755, 23861, 0, + 23775, 24552, 23851, 23957, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE4G_M_MEI_2, - 23679, 24456, 23755, 23861, 0, + 23775, 24552, 23851, 23957, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE4G_M_IDE_R, - 23679, 24456, 23755, 23865, 0, + 23775, 24552, 23851, 23961, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE4G_M_KT, - 23679, 24456, 23755, 23871, 0, + 23775, 24552, 23851, 23967, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE4G_M_LPC_1, - 23679, 24456, 23755, 8958, 0, + 23775, 24552, 23851, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE4G_M_LPC_2, - 23679, 24456, 23755, 8958, 0, + 23775, 24552, 23851, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE4G_M_LPC_3, - 23679, 24456, 23755, 8958, 0, + 23775, 24552, 23851, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE4G_M_S_DMA, - 23679, 24456, 23755, 14833, 8945, 24519, 0, + 23775, 24552, 23851, 14929, 9041, 24615, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE4G_M_S_I2C_0, - 23679, 24456, 23755, 14833, 8945, 17453, 0, + 23775, 24552, 23851, 14929, 9041, 17544, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE4G_M_S_I2C_1, - 23679, 24456, 23755, 14833, 8945, 17453, 0, + 23775, 24552, 23851, 14929, 9041, 17544, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE4G_M_S_UART_0, - 23679, 24456, 23755, 14833, 8945, 7983, 0, + 23775, 24552, 23851, 14929, 9041, 8016, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE4G_M_S_UART_1, - 23679, 24456, 23755, 14833, 8945, 7983, 0, + 23775, 24552, 23851, 14929, 9041, 8016, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE4G_M_S_GSPI_0, - 23679, 24456, 23755, 14833, 8945, 24211, 0, + 23775, 24552, 23851, 14929, 9041, 24307, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE4G_M_S_GSPI_1, - 23679, 24456, 23755, 14833, 8945, 24211, 0, + 23775, 24552, 23851, 14929, 9041, 24307, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE5G_M_AHCI, - 23679, 26796, 23755, 8762, 6455, 8984, 0, + 23775, 26892, 23851, 8800, 6473, 9080, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE5G_M_RAID_1, - 23679, 26796, 23755, 8762, 6455, 8991, 0, + 23775, 26892, 23851, 8800, 6473, 9087, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE5G_M_RAID_2, - 23679, 26796, 23755, 8762, 6455, 8991, 27192, 0, + 23775, 26892, 23851, 8800, 6473, 9087, 27288, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE5G_M_RAID_3, - 23679, 26796, 23755, 8762, 6455, 8991, 31533, 31537, 0, + 23775, 26892, 23851, 8800, 6473, 9087, 31634, 31638, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE5G_M_PCIE_1, - 23679, 26796, 23755, 8204, 0, + 23775, 26892, 23851, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE5G_M_PCIE_2, - 23679, 26796, 23755, 8204, 0, + 23775, 26892, 23851, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE5G_M_PCIE_3, - 23679, 26796, 23755, 8204, 0, + 23775, 26892, 23851, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE5G_M_PCIE_4, - 23679, 26796, 23755, 8204, 0, + 23775, 26892, 23851, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE5G_M_PCIE_5, - 23679, 26796, 23755, 8204, 0, + 23775, 26892, 23851, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE5G_M_PCIE_6, - 23679, 26796, 23755, 8204, 0, + 23775, 26892, 23851, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE5G_M_HDA, - 23679, 26796, 23755, 8230, 7054, 0, + 23775, 26892, 23851, 8263, 7072, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE5G_M_SMB, - 23679, 26796, 23755, 8962, 0, + 23775, 26892, 23851, 9058, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE5G_M_THERM, - 23679, 26796, 23755, 23913, 0, + 23775, 26892, 23851, 24009, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE5G_M_EHCI, - 23679, 26796, 23755, 6945, 8727, 0, + 23775, 26892, 23851, 6963, 8760, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE5G_M_XHCI, - 23679, 26796, 23755, 6945, 8233, 0, + 23775, 26892, 23851, 6963, 8266, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE5G_M_SDIO, - 23679, 26796, 23755, 27535, 0, + 23775, 26892, 23851, 27631, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE5G_M_SSOUND, - 23679, 26796, 23755, 18970, 3384, 0, + 23775, 26892, 23851, 19048, 3384, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE5G_M_MEI_1, - 23679, 26796, 23755, 26905, 3018, 0, + 23775, 26892, 23851, 27001, 3018, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE5G_M_MEI_2, - 23679, 26796, 23755, 26905, 3018, 0, + 23775, 26892, 23851, 27001, 3018, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE5G_M_IDE_R, - 23679, 26796, 23755, 23865, 0, + 23775, 26892, 23851, 23961, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE5G_M_KT, - 23679, 26796, 23755, 23871, 0, + 23775, 26892, 23851, 23967, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE5G_M_LPC_1, - 23679, 26796, 23755, 8958, 0, + 23775, 26892, 23851, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE5G_M_LPC_2, - 23679, 26796, 23755, 8958, 0, + 23775, 26892, 23851, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE5G_M_LPC_3, - 23679, 26796, 23755, 8958, 0, + 23775, 26892, 23851, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE5G_M_LPC_4, - 23679, 26796, 23755, 8958, 0, + 23775, 26892, 23851, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE5G_M_LPC_5, - 23679, 26796, 23755, 8958, 0, + 23775, 26892, 23851, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE5G_M_LPC_6, - 23679, 26796, 23755, 8958, 0, + 23775, 26892, 23851, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE5G_M_LPC_7, - 23679, 26796, 23755, 8958, 0, + 23775, 26892, 23851, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE5G_M_S_DMA, - 23679, 26796, 23755, 14833, 8945, 24519, 0, + 23775, 26892, 23851, 14929, 9041, 24615, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE5G_M_S_I2C_0, - 23679, 26796, 23755, 14833, 8945, 17453, 0, + 23775, 26892, 23851, 14929, 9041, 17544, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE5G_M_S_I2C_1, - 23679, 26796, 23755, 14833, 8945, 17453, 0, + 23775, 26892, 23851, 14929, 9041, 17544, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE5G_M_S_UART_0, - 23679, 26796, 23755, 14833, 8945, 7983, 0, + 23775, 26892, 23851, 14929, 9041, 8016, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE5G_M_S_UART_1, - 23679, 26796, 23755, 14833, 8945, 7983, 0, + 23775, 26892, 23851, 14929, 9041, 8016, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE5G_M_S_GSPI_0, - 23679, 26796, 23755, 14833, 8945, 24211, 0, + 23775, 26892, 23851, 14929, 9041, 24307, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CORE5G_M_S_GSPI_1, - 23679, 26796, 23755, 14833, 8945, 24211, 0, + 23775, 26892, 23851, 14929, 9041, 24307, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_LP_AHCI, - 6142, 6476, 8762, 8984, 0, + 6160, 6494, 8800, 9080, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_LP_RAID, - 6142, 6476, 8762, 29686, 31542, 0, + 6160, 6494, 8800, 29768, 31643, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_LP_PCIE_1, - 6142, 6476, 8204, 0, + 6160, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_LP_PCIE_2, - 6142, 6476, 8204, 0, + 6160, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_LP_PCIE_3, - 6142, 6476, 8204, 0, + 6160, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_LP_PCIE_4, - 6142, 6476, 8204, 0, + 6160, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_LP_PCIE_5, - 6142, 6476, 8204, 0, + 6160, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_LP_PCIE_6, - 6142, 6476, 8204, 0, + 6160, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_LP_PCIE_7, - 6142, 6476, 8204, 0, + 6160, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_LP_PCIE_8, - 6142, 6476, 8204, 0, + 6160, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_LP_PCIE_9, - 6142, 6476, 8204, 0, + 6160, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_LP_PCIE_10, - 6142, 6476, 8204, 0, + 6160, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_LP_PCIE_11, - 6142, 6476, 8204, 0, + 6160, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_LP_PCIE_12, - 6142, 6476, 8204, 0, + 6160, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_LP_P2SB, - 6142, 6476, 23813, 0, + 6160, 6494, 23909, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_LP_PMC, - 6142, 6476, 23818, 0, + 6160, 6494, 23914, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_LP_SMB, - 6142, 6476, 8962, 0, + 6160, 6494, 9058, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_LP_SPI, - 6142, 6476, 17409, 0, + 6160, 6494, 17500, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_LP_TRACE, - 6142, 6476, 23830, 8949, 0, + 6160, 6494, 23926, 9045, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_LP_UART_0, - 6142, 6476, 7983, 8134, 0, + 6160, 6494, 8016, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_LP_UART_1, - 6142, 6476, 7983, 8136, 0, + 6160, 6494, 8016, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_LP_GSPI_0, - 6142, 6476, 24211, 8134, 0, + 6160, 6494, 24307, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_LP_GSPI_1, - 6142, 6476, 24211, 8136, 0, + 6160, 6494, 24307, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_LP_EMMC, - 6142, 6476, 23848, 0, + 6160, 6494, 23944, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_LP_SDXC, - 6142, 6476, 23908, 0, + 6160, 6494, 24004, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_LP_XHCI, - 6142, 6476, 8233, 0, + 6160, 6494, 8266, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_LP_USBOTG, - 6142, 6476, 6945, 27549, 0, + 6160, 6494, 6963, 27645, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_LP_THERM, - 6142, 6476, 23913, 0, + 6160, 6494, 24009, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_LP_CAMERA, - 6142, 6476, 25004, 8898, 0, + 6160, 6494, 25100, 8994, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_LP_ISH, - 6142, 6476, 29147, 0, + 6160, 6494, 29249, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_LP_MEI_1, - 6142, 6476, 23861, 0, + 6160, 6494, 23957, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_LP_MEI_2, - 6142, 6476, 23861, 0, + 6160, 6494, 23957, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_LP_IDER, - 6142, 6476, 28585, 0, + 6160, 6494, 28687, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_LP_KT, - 6142, 6476, 23871, 0, + 6160, 6494, 23967, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_LP_MEI_3, - 6142, 6476, 23861, 0, + 6160, 6494, 23957, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_LP_LPC_1, - 6142, 6476, 31548, 8958, 0, + 6160, 6494, 31649, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_LP_LPC_2, - 6142, 6476, 31556, 8958, 0, + 6160, 6494, 31657, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_LP_LPC_3, - 6142, 6476, 31548, 8958, 0, + 6160, 6494, 31649, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_2HS_Y_LPC_1, - 11274, 6476, 8958, 0, + 11389, 6494, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_2HS_U_LPC_1, - 11274, 6476, 8958, 0, + 11389, 6494, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_2HS_U_LPC_2, - 11274, 6476, 8958, 0, + 11389, 6494, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_2HS_U_LPC_3, - 11274, 6476, 8958, 0, + 11389, 6494, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_2HS_Y_LPC_2, - 11274, 6476, 8958, 0, + 11389, 6494, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_2HS_U_LPC_4, - 11274, 6476, 8958, 0, + 11389, 6494, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_LP_I2C_0, - 6142, 6476, 17453, 8134, 0, + 6160, 6494, 17544, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_LP_I2C_1, - 6142, 6476, 17453, 8136, 0, + 6160, 6494, 17544, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_LP_I2C_2, - 6142, 6476, 17453, 6411, 0, + 6160, 6494, 17544, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_LP_I2C_3, - 6142, 6476, 17453, 6422, 0, + 6160, 6494, 17544, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_LP_I2C_4, - 6142, 6476, 17453, 6786, 0, + 6160, 6494, 17544, 6804, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_LP_I2C_5, - 6142, 6476, 17453, 8138, 0, + 6160, 6494, 17544, 8171, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_LP_UART_2, - 6142, 6476, 7983, 6411, 0, + 6160, 6494, 8016, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_LP_HDA, - 6142, 6476, 8230, 7054, 0, + 6160, 6494, 8263, 7072, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_2HS_U_HDA, - 11274, 6476, 8230, 7054, 0, + 11389, 6494, 8263, 7072, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_Y_P_LPC, - 8758, 6476, 31564, 8958, 0, + 8791, 6494, 31665, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_U_P_LPC, - 8758, 6476, 31574, 8958, 0, + 8791, 6494, 31675, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_U_M_LPC, - 8758, 6476, 31584, 23796, 8958, 0, + 8791, 6494, 31685, 23892, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_U_P2SB, - 8758, 6476, 23813, 0, + 8791, 6494, 23909, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_U_PMC, - 8758, 6476, 23818, 0, + 8791, 6494, 23914, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_U_SMB, - 8758, 6476, 8962, 0, + 8791, 6494, 9058, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_U_SPI_FLASH, - 8758, 6476, 17409, 31600, 0, + 8791, 6494, 17500, 31701, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_U_TRACE, - 8758, 6476, 23830, 8949, 0, + 8791, 6494, 23926, 9045, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_U_UART_0, - 8758, 6476, 7983, 23971, 0, + 8791, 6494, 8016, 24067, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_U_UART_1, - 8758, 6476, 7983, 23974, 0, + 8791, 6494, 8016, 24070, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_U_SPI_0, - 8758, 6476, 17409, 23971, 0, + 8791, 6494, 17500, 24067, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_U_SPI_1, - 8758, 6476, 17409, 23974, 0, + 8791, 6494, 17500, 24070, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_U_PCIE_9, - 8758, 6476, 8204, 8140, 8153, 1047, 0, + 8791, 6494, 8237, 8173, 8186, 1047, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_U_PCIE_10, - 8758, 6476, 8204, 8140, 8153, 9329, 0, + 8791, 6494, 8237, 8173, 8186, 9425, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_U_PCIE_11, - 8758, 6476, 8204, 8140, 8153, 23836, 0, + 8791, 6494, 8237, 8173, 8186, 23932, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_U_PCIE_12, - 8758, 6476, 8204, 8140, 8153, 14592, 0, + 8791, 6494, 8237, 8173, 8186, 14697, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_U_PCIE_13, - 8758, 6476, 8204, 8140, 8153, 23839, 0, + 8791, 6494, 8237, 8173, 8186, 23935, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_U_PCIE_14, - 8758, 6476, 8204, 8140, 8153, 23842, 0, + 8791, 6494, 8237, 8173, 8186, 23938, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_U_PCIE_15, - 8758, 6476, 8204, 8140, 8153, 23845, 0, + 8791, 6494, 8237, 8173, 8186, 23941, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_U_PCIE_16, - 8758, 6476, 8204, 8140, 8153, 19210, 0, + 8791, 6494, 8237, 8173, 8186, 19288, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_U_PCIE_1, - 8758, 6476, 8204, 8140, 8153, 8136, 0, + 8791, 6494, 8237, 8173, 8186, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_U_PCIE_2, - 8758, 6476, 8204, 8140, 8153, 6411, 0, + 8791, 6494, 8237, 8173, 8186, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_U_PCIE_3, - 8758, 6476, 8204, 8140, 8153, 6422, 0, + 8791, 6494, 8237, 8173, 8186, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_U_PCIE_4, - 8758, 6476, 8204, 8140, 8153, 6786, 0, + 8791, 6494, 8237, 8173, 8186, 6804, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_U_PCIE_5, - 8758, 6476, 8204, 8140, 8153, 8138, 0, + 8791, 6494, 8237, 8173, 8186, 8171, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_U_PCIE_6, - 8758, 6476, 8204, 8140, 8153, 8371, 0, + 8791, 6494, 8237, 8173, 8186, 8404, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_U_PCIE_7, - 8758, 6476, 8204, 8140, 8153, 8373, 0, + 8791, 6494, 8237, 8173, 8186, 8406, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_U_PCIE_8, - 8758, 6476, 8204, 8140, 8153, 6811, 0, + 8791, 6494, 8237, 8173, 8186, 6829, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_U_EMMC, - 8758, 6476, 23848, 0, + 8791, 6494, 23944, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_U_I2C_4, - 8758, 6476, 17453, 28103, 0, + 8791, 6494, 17544, 28199, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_U_I2C_5, - 8758, 6476, 17453, 28238, 0, + 8791, 6494, 17544, 28340, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_U_UART_2, - 8758, 6476, 7983, 28073, 0, + 8791, 6494, 8016, 28169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_U_HDA, - 8758, 6476, 8230, 7054, 0, + 8791, 6494, 8263, 7072, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_U_AHCI, - 8758, 6476, 8762, 8775, 0, + 8791, 6494, 8800, 8819, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_U_RAID_1, - 8758, 6476, 8762, 6450, 0, + 8791, 6494, 8800, 6468, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_U_RAID_2, - 8758, 6476, 8762, 6450, 23853, 0, + 8791, 6494, 8800, 6468, 23949, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_U_MEI_1, - 8758, 6476, 23861, 23974, 0, + 8791, 6494, 23957, 24070, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_U_MEI_2, - 8758, 6476, 23861, 28073, 0, + 8791, 6494, 23957, 28169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_U_IDER, - 8758, 6476, 23865, 0, + 8791, 6494, 23961, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_U_KT, - 8758, 6476, 23871, 0, + 8791, 6494, 23967, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_U_MEI_3, - 8758, 6476, 23861, 28100, 0, + 8791, 6494, 23957, 28196, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_U_MEI_4, - 8758, 6476, 23861, 28103, 0, + 8791, 6494, 23957, 28199, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_U_I2C_0, - 8758, 6476, 17453, 23971, 0, + 8791, 6494, 17544, 24067, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_U_I2C_1, - 8758, 6476, 17453, 23974, 0, + 8791, 6494, 17544, 24070, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_U_I2C_2, - 8758, 6476, 17453, 28073, 0, + 8791, 6494, 17544, 28169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_U_I2C_3, - 8758, 6476, 17453, 28100, 0, + 8791, 6494, 17544, 28196, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_U_XHCI, - 8758, 6476, 6945, 8375, 8233, 0, + 8791, 6494, 6963, 8408, 8266, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_U_USBOTG, - 8758, 6476, 6945, 27549, 0, + 8791, 6494, 6963, 27645, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_U_SSRAM, - 8758, 6476, 23891, 23898, 0, + 8791, 6494, 23987, 23994, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_WL_9560_1, - 11247, 24324, 4761, 24329, 31608, 0, + 11362, 24420, 4761, 24425, 31709, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_U_SDXC, - 8758, 6476, 23908, 0, + 8791, 6494, 24004, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_U_THERM, - 8758, 6476, 23913, 0, + 8791, 6494, 24009, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_U_SPI_2, - 8758, 6476, 17409, 28073, 0, + 8791, 6494, 17500, 28169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_U_ISH, - 8758, 6476, 4342, 23921, 8949, 0, + 8791, 6494, 4342, 24017, 9045, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PINEVIEW_HB, - 31613, 6953, 6563, 0, + 31714, 6971, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PINEVIEW_IGD, - 31613, 692, 1716, 2418, 0, + 31714, 692, 1716, 2418, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PINEVIEW_IGD_1, - 31613, 692, 1716, 2418, 0, + 31714, 692, 1716, 2418, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PINEVIEW_M_HB, - 31613, 6953, 6563, 0, + 31714, 6971, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PINEVIEW_M_IGD, - 31613, 692, 1716, 2418, 0, + 31714, 692, 1716, 2418, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PINEVIEW_M_IGD_1, - 31613, 692, 1716, 2418, 0, + 31714, 692, 1716, 2418, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_LP_UP3_ESPI, - 8780, 6476, 31622, 23808, 0, + 8840, 6494, 31723, 23904, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_LP_UP4_ESPI, - 8780, 6476, 31626, 23808, 0, + 8840, 6494, 31727, 23904, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_LP_P2SB, - 8780, 6476, 23813, 0, + 8840, 6494, 23909, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_LP_PMC, - 8780, 6476, 23818, 0, + 8840, 6494, 23914, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_LP_SMB, - 8780, 6476, 8962, 0, + 8840, 6494, 9058, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_LP_SPI, - 8780, 6476, 17409, 23822, 0, + 8840, 6494, 17500, 23918, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_LP_TRACE, - 8780, 6476, 23830, 8949, 0, + 8840, 6494, 23926, 9045, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_LP_UART_0, - 8780, 6476, 7983, 8134, 0, + 8840, 6494, 8016, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_LP_UART_1, - 8780, 6476, 7983, 8136, 0, + 8840, 6494, 8016, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_LP_GSPI_0, - 8780, 6476, 24211, 8134, 0, + 8840, 6494, 24307, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_LP_GSPI_1, - 8780, 6476, 24211, 8136, 0, + 8840, 6494, 24307, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_LP_PCIE_9, - 8780, 6476, 8204, 1047, 0, + 8840, 6494, 8237, 1047, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_LP_PCIE_10, - 8780, 6476, 8204, 9329, 0, + 8840, 6494, 8237, 9425, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_LP_PCIE_11, - 8780, 6476, 8204, 23836, 0, + 8840, 6494, 8237, 23932, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_LP_PCIE_12, - 8780, 6476, 8204, 14592, 0, + 8840, 6494, 8237, 14697, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_LP_PCIE_1, - 8780, 6476, 8204, 8136, 0, + 8840, 6494, 8237, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_LP_PCIE_2, - 8780, 6476, 8204, 6411, 0, + 8840, 6494, 8237, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_LP_PCIE_3, - 8780, 6476, 8204, 6422, 0, + 8840, 6494, 8237, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_LP_PCIE_4, - 8780, 6476, 8204, 6786, 0, + 8840, 6494, 8237, 6804, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_LP_PCIE_5, - 8780, 6476, 8204, 8138, 0, + 8840, 6494, 8237, 8171, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_LP_PCIE_6, - 8780, 6476, 8204, 8371, 0, + 8840, 6494, 8237, 8404, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_LP_PCIE_7, - 8780, 6476, 8204, 8373, 0, + 8840, 6494, 8237, 8406, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_LP_PCIE_8, - 8780, 6476, 8204, 6811, 0, + 8840, 6494, 8237, 6829, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_LP_I2C_4, - 8780, 6476, 17453, 6786, 0, + 8840, 6494, 17544, 6804, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_LP_I2C_5, - 8780, 6476, 17453, 8138, 0, + 8840, 6494, 17544, 8171, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_LP_UART_2, - 8780, 6476, 7983, 6411, 0, + 8840, 6494, 8016, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_LP_HDA, - 8780, 6476, 8230, 7054, 0, + 8840, 6494, 8263, 7072, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_LP_THC_0, - 8780, 6476, 29682, 8134, 0, + 8840, 6494, 29764, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_LP_THC_1, - 8780, 6476, 29682, 8136, 0, + 8840, 6494, 29764, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_LP_AHCI, - 8780, 6476, 8762, 8984, 0, + 8840, 6494, 8800, 9080, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_LP_RAID, - 8780, 6476, 8762, 8991, 0, + 8840, 6494, 8800, 9087, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_LP_RAID_P, - 8780, 6476, 8762, 8991, 23853, 0, + 8840, 6494, 8800, 9087, 23949, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_LP_UART_3, - 8780, 6476, 7983, 6422, 0, + 8840, 6494, 8016, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_LP_HECI_1, - 8780, 6476, 24265, 8136, 0, + 8840, 6494, 24361, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_LP_HECI_2, - 8780, 6476, 24265, 6411, 0, + 8840, 6494, 24361, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_LP_IDER, - 8780, 6476, 23865, 0, + 8840, 6494, 23961, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_LP_KT, - 8780, 6476, 23871, 0, + 8840, 6494, 23967, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_LP_HECI_3, - 8780, 6476, 24265, 6422, 0, + 8840, 6494, 24361, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_LP_HECI_4, - 8780, 6476, 24265, 6786, 0, + 8840, 6494, 24361, 6804, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_LP_I2C_0, - 8780, 6476, 17453, 8134, 0, + 8840, 6494, 17544, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_LP_I2C_1, - 8780, 6476, 17453, 8136, 0, + 8840, 6494, 17544, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_LP_I2C_2, - 8780, 6476, 17453, 6411, 0, + 8840, 6494, 17544, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_LP_I2C_3, - 8780, 6476, 17453, 6422, 0, + 8840, 6494, 17544, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_LP_XHCI, - 8780, 6476, 6945, 8450, 23874, 23878, 8233, 0, + 8840, 6494, 6963, 8483, 23970, 23974, 8266, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_LP_XDCI, - 8780, 6476, 6945, 8450, 23874, 23882, 23886, 0, + 8840, 6494, 6963, 8483, 23970, 23978, 23982, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_LP_SSRAM, - 8780, 6476, 23891, 23898, 0, + 8840, 6494, 23987, 23994, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_AX201, - 23709, 8371, 31630, 0, + 23805, 8404, 31731, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_LP_GSPI_2, - 8780, 6476, 24211, 6411, 0, + 8840, 6494, 24307, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_LP_ISH, - 8780, 6476, 692, 23921, 8949, 0, + 8840, 6494, 692, 24017, 9045, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_5HS_LP_GSPI_3, - 8780, 6476, 24211, 6422, 0, + 8840, 6494, 24307, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_Z170_AHCI, - 31636, 8775, 0, + 31737, 8819, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_AHCI_2, - 31641, 31648, 8775, 0, + 31742, 31749, 8819, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_Z170_3RD_AHCI, - 31636, 31654, 31658, 6450, 0, + 31737, 31755, 31759, 6468, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_3RD_RAID, - 31641, 31648, 31654, 31658, 6450, 0, + 31742, 31749, 31755, 31759, 6468, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_PCIE_1, - 6142, 6476, 8204, 0, + 6160, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_PCIE_2, - 6142, 6476, 8204, 0, + 6160, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_PCIE_3, - 6142, 6476, 8204, 0, + 6160, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_PCIE_4, - 6142, 6476, 8204, 0, + 6160, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_PCIE_5, - 6142, 6476, 8204, 0, + 6160, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_PCIE_6, - 6142, 6476, 8204, 0, + 6160, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_PCIE_7, - 6142, 6476, 8204, 0, + 6160, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_PCIE_8, - 6142, 6476, 8204, 0, + 6160, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_PCIE_9, - 6142, 6476, 8204, 0, + 6160, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_PCIE_10, - 6142, 6476, 8204, 0, + 6160, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_PCIE_11, - 6142, 6476, 8204, 0, + 6160, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_PCIE_12, - 6142, 6476, 8204, 0, + 6160, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_PCIE_13, - 6142, 6476, 8204, 0, + 6160, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_PCIE_14, - 6142, 6476, 8204, 0, + 6160, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_PCIE_15, - 6142, 6476, 8204, 0, + 6160, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_PCIE_16, - 6142, 6476, 8204, 0, + 6160, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_P2SB, - 6142, 6476, 23813, 0, + 6160, 6494, 23909, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_PMC, - 6142, 6476, 23818, 0, + 6160, 6494, 23914, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_SMB, - 6142, 6476, 8962, 0, + 6160, 6494, 9058, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_SPI, - 6142, 6476, 17409, 0, + 6160, 6494, 17500, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_GBE, - 6142, 6476, 25872, 0, + 6160, 6494, 25968, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_TRACE, - 6142, 6476, 23830, 8949, 0, + 6160, 6494, 23926, 9045, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_UART_0, - 6142, 6476, 7983, 8134, 0, + 6160, 6494, 8016, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_UART_1, - 6142, 6476, 7983, 8136, 0, + 6160, 6494, 8016, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_GSPI_0, - 6142, 6476, 24211, 8134, 0, + 6160, 6494, 24307, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_GSPI_1, - 6142, 6476, 24211, 8136, 0, + 6160, 6494, 24307, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_XHCI, - 6142, 6476, 8233, 0, + 6160, 6494, 8266, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_USB_OTG, - 6142, 6476, 6945, 2418, 27549, 0, + 6160, 6494, 6963, 2418, 27645, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_THERM, - 6142, 6476, 23913, 0, + 6160, 6494, 24009, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_ISH, - 6142, 6476, 29147, 0, + 6160, 6494, 29249, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_MEI_1, - 6142, 6476, 23861, 8136, 0, + 6160, 6494, 23957, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_MEI_2, - 6142, 6476, 23861, 6411, 0, + 6160, 6494, 23957, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_IDE_R, - 6142, 6476, 23865, 0, + 6160, 6494, 23961, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_KT, - 6142, 6476, 23871, 0, + 6160, 6494, 23967, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_MEI_3, - 6142, 6476, 23861, 6422, 0, + 6160, 6494, 23957, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_H110_LPC, - 31664, 8958, 0, + 31765, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_H170_LPC, - 31669, 8958, 0, + 31770, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_Z170_LPC, - 31636, 8958, 0, + 31737, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_Q170_LPC, - 31674, 8958, 0, + 31775, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_Q150_LPC, - 31679, 8958, 0, + 31780, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_B150_LPC, - 31684, 8958, 0, + 31785, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C236_LPC, - 31689, 8958, 0, + 31790, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C232_LPC, - 31694, 8958, 0, + 31795, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_QM170_LPC, - 31648, 8958, 0, + 31749, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_HM170_LPC, - 31699, 8958, 0, + 31800, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CM236_LPC, - 31705, 8958, 0, + 31806, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_HM175_LPC, - 31711, 8958, 0, + 31812, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_QM175_LPC, - 31717, 8958, 0, + 31818, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CM238_LPC, - 31723, 8958, 0, + 31824, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_I2C_0, - 6142, 6476, 17453, 8134, 0, + 6160, 6494, 17544, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_I2C_1, - 6142, 6476, 17453, 8136, 0, + 6160, 6494, 17544, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_I2C_2, - 6142, 6476, 17453, 6411, 0, + 6160, 6494, 17544, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_I2C_3, - 6142, 6476, 17453, 6422, 0, + 6160, 6494, 17544, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_UART_2, - 6142, 6476, 7983, 6411, 0, + 6160, 6494, 8016, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_PCIE_17, - 6142, 6476, 8204, 0, + 6160, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_PCIE_18, - 6142, 6476, 8204, 0, + 6160, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_PCIE_19, - 6142, 6476, 8204, 0, + 6160, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_PCIE_20, - 6142, 6476, 8204, 0, + 6160, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_HDA, - 6142, 6476, 8230, 7054, 0, + 6160, 6494, 8263, 7072, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_100SERIES_HDA_2, - 6142, 6476, 8230, 7054, 0, + 6160, 6494, 8263, 7072, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_AHCI, - 29223, 8775, 0, + 29305, 8819, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_3RD_RAID, - 29223, 31654, 31658, 6450, 0, + 29305, 31755, 31759, 6468, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_PCIE_0, - 29223, 8204, 8140, 8153, 0, + 29305, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_PCIE_1, - 29223, 8204, 8140, 8153, 0, + 29305, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_PCIE_2, - 29223, 8204, 8140, 8153, 0, + 29305, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_PCIE_3, - 29223, 8204, 8140, 8153, 0, + 29305, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_PCIE_4, - 29223, 8204, 8140, 8153, 0, + 29305, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_PCIE_5, - 29223, 8204, 8140, 8153, 0, + 29305, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_PCIE_6, - 29223, 8204, 8140, 8153, 0, + 29305, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_PCIE_7, - 29223, 8204, 8140, 8153, 0, + 29305, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_PCIE_8, - 29223, 8204, 8140, 8153, 0, + 29305, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_PCIE_9, - 29223, 8204, 8140, 8153, 0, + 29305, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_PCIE_10, - 29223, 8204, 8140, 8153, 0, + 29305, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_PCIE_11, - 29223, 8204, 8140, 8153, 0, + 29305, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_PCIE_12, - 29223, 8204, 8140, 8153, 0, + 29305, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_PCIE_13, - 29223, 8204, 8140, 8153, 0, + 29305, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_PCIE_14, - 29223, 8204, 8140, 8153, 0, + 29305, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_PCIE_15, - 29223, 8204, 8140, 8153, 0, + 29305, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_P2SB, - 29223, 23813, 0, + 29305, 23909, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_PMC, - 29223, 23818, 0, + 29305, 23914, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_SMB, - 29223, 8962, 0, + 29305, 9058, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_SPI, - 29223, 17409, 0, + 29305, 17500, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_TRACE, - 29223, 23830, 8949, 0, + 29305, 23926, 9045, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_XHCI, - 29223, 8233, 0, + 29305, 8266, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_THERM, - 29223, 23913, 27568, 0, + 29305, 24009, 27664, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND21_TRACE, - 24530, 31729, 23830, 8949, 31736, 31744, 0, + 24626, 31830, 23926, 9045, 31837, 31845, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_ME_HCI_1, - 29223, 26905, 31751, 0, + 29305, 27001, 31852, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_ME_HCI_2, - 29223, 26905, 31751, 0, + 29305, 27001, 31852, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_ME_IDER, - 29223, 26905, 28585, 0, + 29305, 27001, 28687, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_ME_KT, - 29223, 26905, 23871, 0, + 29305, 27001, 23967, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_ME_HCI_3, - 29223, 26905, 24265, 0, + 29305, 27001, 24361, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_LPC_1, - 31755, 8958, 22213, 23808, 0, + 31856, 9054, 22309, 23904, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_LPC_2, - 31760, 8958, 22213, 23808, 0, + 31861, 9054, 22309, 23904, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_LPC_3, - 31765, 8958, 22213, 23808, 0, + 31866, 9054, 22309, 23904, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_LPC_4, - 31770, 8958, 22213, 23808, 0, + 31871, 9054, 22309, 23904, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_LPC_5, - 31775, 8958, 22213, 23808, 0, + 31876, 9054, 22309, 23904, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_LPC_6, - 31780, 8958, 22213, 23808, 0, + 31881, 9054, 22309, 23904, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_LPC_7, - 31785, 8958, 22213, 23808, 0, + 31886, 9054, 22309, 23904, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND21_LPC_4, - 24530, 31729, 26915, 0, + 24626, 31830, 27011, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_LPC_8, - 31790, 8958, 22213, 23808, 0, + 31891, 9054, 22309, 23904, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_LPC_9, - 31795, 8958, 22213, 23808, 0, + 31896, 9054, 22309, 23904, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_LPC_10, - 31801, 8958, 22213, 23808, 0, + 31902, 9054, 22309, 23904, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_LPC_11, - 31807, 8958, 22213, 23808, 0, + 31908, 9054, 22309, 23904, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_SSATA_AHCI, - 29223, 28329, 8775, 0, + 29305, 28431, 8819, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_SSATA_RAID, - 29223, 28329, 31654, 31658, 6450, 0, + 29305, 28431, 31755, 31759, 6468, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND21_SSATA_RAID, - 29223, 28329, 6450, 0, + 29305, 28431, 6468, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_PCIE_16, - 29223, 8204, 8140, 8153, 0, + 29305, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_PCIE_17, - 29223, 8204, 8140, 8153, 0, + 29305, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_PCIE_18, - 29223, 8204, 8140, 8153, 0, + 29305, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_PCIE_19, - 29223, 8204, 8140, 8153, 0, + 29305, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_MROM_0, - 29223, 31813, 0, + 29305, 31914, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_MROM_1, - 29223, 31813, 0, + 29305, 31914, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_HDA, - 29223, 8230, 7054, 0, + 29305, 8263, 7072, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_IE_HECI_1, - 29223, 27082, 24265, 0, + 29305, 27178, 24361, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_IE_HECI_2, - 29223, 27082, 24265, 0, + 29305, 27178, 24361, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_IE_IDER, - 29223, 27082, 28585, 0, + 29305, 27178, 28687, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_IE_KT, - 29223, 27082, 23871, 0, + 29305, 27178, 23967, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_IE_HECI_3, - 29223, 27082, 24265, 0, + 29305, 27178, 24361, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_AHCI_S, - 29223, 8775, 0, + 29305, 8819, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_3RD_RAID_S, - 29223, 31654, 31658, 6450, 0, + 29305, 31755, 31759, 6468, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_PCIE_S_0, - 29223, 8204, 8140, 8153, 0, + 29305, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_PCIE_S_1, - 29223, 8204, 8140, 8153, 0, + 29305, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_PCIE_S_2, - 29223, 8204, 8140, 8153, 0, + 29305, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_PCIE_S_3, - 29223, 8204, 8140, 8153, 0, + 29305, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_PCIE_S_4, - 29223, 8204, 8140, 8153, 0, + 29305, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_PCIE_S_5, - 29223, 8204, 8140, 8153, 0, + 29305, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_PCIE_S_6, - 29223, 8204, 8140, 8153, 0, + 29305, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_PCIE_S_7, - 29223, 8204, 8140, 8153, 0, + 29305, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_PCIE_S_8, - 29223, 8204, 8140, 8153, 0, + 29305, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_PCIE_S_9, - 29223, 8204, 8140, 8153, 0, + 29305, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_PCIE_S_10, - 29223, 8204, 8140, 8153, 0, + 29305, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_PCIE_S_11, - 29223, 8204, 8140, 8153, 0, + 29305, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_PCIE_S_12, - 29223, 8204, 8140, 8153, 0, + 29305, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_PCIE_S_13, - 29223, 8204, 8140, 8153, 0, + 29305, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_PCIE_S_14, - 29223, 8204, 8140, 8153, 0, + 29305, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_PCIE_S_15, - 29223, 8204, 8140, 8153, 0, + 29305, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_P2SB_S, - 29223, 23813, 0, + 29305, 23909, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_PMC_S, - 29223, 23818, 0, + 29305, 23914, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_SMB_S, - 29223, 8962, 0, + 29305, 9058, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_SPI_S, - 29223, 17409, 0, + 29305, 17500, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_TRACE_S, - 29223, 23830, 8949, 0, + 29305, 23926, 9045, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_XHCI_S, - 29223, 8233, 0, + 29305, 8266, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_THERM_S, - 29223, 23913, 27568, 0, + 29305, 24009, 27664, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_ME_HCI_S_1, - 29223, 26905, 31751, 0, + 29305, 27001, 31852, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_ME_HCI_S_2, - 29223, 26905, 31751, 0, + 29305, 27001, 31852, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_ME_IDER_S, - 29223, 26905, 28585, 0, + 29305, 27001, 28687, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_ME_KT_S, - 29223, 26905, 23871, 0, + 29305, 27001, 23967, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_ME_HCI_S_3, - 29223, 26905, 24265, 0, + 29305, 27001, 24361, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_LPC_S_1, - 31765, 8958, 22213, 23808, 0, + 31866, 9054, 22309, 23904, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_LPC_S_2, - 31780, 8958, 22213, 23808, 0, + 31881, 9054, 22309, 23904, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_LPC_S_3, - 31755, 8958, 22213, 23808, 0, + 31856, 9054, 22309, 23904, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_LPC_S_4, - 31780, 8958, 22213, 23808, 0, + 31881, 9054, 22309, 23904, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_LPC_S_5, - 31785, 8958, 22213, 23808, 0, + 31886, 9054, 22309, 23904, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND21_LPC_1, - 24530, 31729, 26915, 0, + 24626, 31830, 27011, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND21_LPC_2, - 24530, 31729, 26915, 0, + 24626, 31830, 27011, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_XEOND21_LPC_3, - 24530, 31729, 26915, 0, + 24626, 31830, 27011, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_LPC_S_6, - 31795, 8958, 22213, 23808, 0, + 31896, 9054, 22309, 23904, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_LPC_12, - 31801, 8958, 22213, 23808, 0, + 31902, 9054, 22309, 23904, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_LPC_13, - 31807, 8958, 22213, 23808, 0, + 31908, 9054, 22309, 23904, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_SSATA_AHCI_S, - 29223, 28329, 8775, 0, + 29305, 28431, 8819, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_SSATA_RAID_S, - 29223, 28329, 31654, 31658, 6450, 0, + 29305, 28431, 31755, 31759, 6468, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_PCIE_S_16, - 29223, 8204, 8140, 8153, 0, + 29305, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_PCIE_S_17, - 29223, 8204, 8140, 8153, 0, + 29305, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_PCIE_S_18, - 29223, 8204, 8140, 8153, 0, + 29305, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_PCIE_S_19, - 29223, 8204, 8140, 8153, 0, + 29305, 8237, 8173, 8186, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_MROM_S_0, - 29223, 31813, 0, + 29305, 31914, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_MROM_S_1, - 29223, 31813, 0, + 29305, 31914, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_HDA_S, - 29223, 8230, 7054, 0, + 29305, 8263, 7072, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_IE_HECI_S_1, - 29223, 27082, 24265, 0, + 29305, 27178, 24361, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_IE_HECI_S_2, - 29223, 27082, 24265, 0, + 29305, 27178, 24361, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_IE_IDER_S, - 29223, 27082, 28585, 0, + 29305, 27178, 28687, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_IE_KT_S, - 29223, 27082, 23871, 0, + 29305, 27178, 23967, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C620_IE_HECI_S_3, - 29223, 27082, 24265, 0, + 29305, 27178, 24361, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_2HS_AHCI, - 11274, 6476, 8762, 8984, 0, + 11389, 6494, 8800, 9080, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_2HS_RAID, - 11274, 6476, 8762, 8991, 0, + 11389, 6494, 8800, 9087, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_2HS_RAID_RST_OPTANE, - 11274, 6476, 8762, 31818, 14052, 31832, 0, + 11389, 6494, 8800, 31919, 14162, 31933, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_2HS_PCIE_1, - 11274, 6476, 8204, 0, + 11389, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_2HS_PCIE_2, - 11274, 6476, 8204, 0, + 11389, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_2HS_PCIE_3, - 11274, 6476, 8204, 0, + 11389, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_2HS_PCIE_4, - 11274, 6476, 8204, 0, + 11389, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_2HS_PCIE_5, - 11274, 6476, 8204, 0, + 11389, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_2HS_PCIE_6, - 11274, 6476, 8204, 0, + 11389, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_2HS_PCIE_7, - 11274, 6476, 8204, 0, + 11389, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_2HS_PCIE_8, - 11274, 6476, 8204, 0, + 11389, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_2HS_PCIE_9, - 11274, 6476, 8204, 0, + 11389, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_2HS_PCIE_10, - 11274, 6476, 8204, 0, + 11389, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_2HS_PCIE_11, - 11274, 6476, 8204, 0, + 11389, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_2HS_PCIE_12, - 11274, 6476, 8204, 0, + 11389, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_2HS_PCIE_13, - 11274, 6476, 8204, 0, + 11389, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_2HS_PCIE_14, - 11274, 6476, 8204, 0, + 11389, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_2HS_PCIE_15, - 11274, 6476, 8204, 0, + 11389, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_2HS_PCIE_16, - 11274, 6476, 8204, 0, + 11389, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_2HS_P2SB, - 11274, 6476, 23813, 0, + 11389, 6494, 23909, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_2HS_PMC, - 11274, 6476, 23818, 0, + 11389, 6494, 23914, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_2HS_SMB, - 11274, 6476, 8962, 0, + 11389, 6494, 9058, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_2HS_SPI, - 11274, 6476, 17409, 0, + 11389, 6494, 17500, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_2HS_TRACE, - 11274, 6476, 23830, 8949, 0, + 11389, 6494, 23926, 9045, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_2HS_UART_0, - 11274, 6476, 7983, 8134, 0, + 11389, 6494, 8016, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_2HS_UART_1, - 11274, 6476, 7983, 8136, 0, + 11389, 6494, 8016, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_2HS_GSPI_0, - 11274, 6476, 24211, 8134, 0, + 11389, 6494, 24307, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_2HS_GSPI_1, - 11274, 6476, 24211, 8136, 0, + 11389, 6494, 24307, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_2HS_XHCI, - 11274, 6476, 8233, 0, + 11389, 6494, 8266, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_2HS_USBOTG, - 11274, 6476, 6945, 27549, 0, + 11389, 6494, 6963, 27645, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_2HS_THERM, - 11274, 6476, 23913, 0, + 11389, 6494, 24009, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_2HS_ISH, - 11274, 6476, 29147, 0, + 11389, 6494, 29249, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_2HS_MEI_1, - 11274, 6476, 23861, 0, + 11389, 6494, 23957, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_2HS_MEI_2, - 11274, 6476, 23861, 0, + 11389, 6494, 23957, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_2HS_IDER, - 11274, 6476, 28585, 0, + 11389, 6494, 28687, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_2HS_KT, - 11274, 6476, 23871, 0, + 11389, 6494, 23967, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_2HS_MEI_3, - 11274, 6476, 23861, 0, + 11389, 6494, 23957, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_2HS_LPC_H27, - 31840, 8958, 0, + 31941, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_2HS_LPC_Z27, - 31845, 8958, 0, + 31946, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_2HS_LPC_Q27, - 31850, 8958, 0, + 31951, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_2HS_LPC_Q25, - 31855, 8958, 0, + 31956, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_2HS_LPC_B25, - 31860, 8958, 0, + 31961, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_2HS_LPC_Z37, - 31865, 8958, 0, + 31966, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_2HS_LPC_H310C, - 31870, 8958, 0, + 31971, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_2HS_LPC_X29, - 31876, 8958, 0, + 31977, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_2HS_LPC_C422, - 31881, 8958, 0, + 31982, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_2HS_I2C_0, - 11274, 6476, 17453, 8134, 0, + 11389, 6494, 17544, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_2HS_I2C_1, - 11274, 6476, 17453, 8136, 0, + 11389, 6494, 17544, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_2HS_I2C_2, - 11274, 6476, 17453, 6411, 0, + 11389, 6494, 17544, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_2HS_I2C_3, - 11274, 6476, 17453, 6422, 0, + 11389, 6494, 17544, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_2HS_UART_2, - 11274, 6476, 7983, 6411, 0, + 11389, 6494, 8016, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_2HS_PCIE_17, - 11274, 6476, 8204, 0, + 11389, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_2HS_PCIE_18, - 11274, 6476, 8204, 0, + 11389, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_2HS_PCIE_19, - 11274, 6476, 8204, 0, + 11389, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_2HS_PCIE_20, - 11274, 6476, 8204, 0, + 11389, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_2HS_PCIE_21, - 11274, 6476, 8204, 0, + 11389, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_2HS_PCIE_22, - 11274, 6476, 8204, 0, + 11389, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_2HS_PCIE_23, - 11274, 6476, 8204, 0, + 11389, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_2HS_PCIE_24, - 11274, 6476, 8204, 0, + 11389, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_2HS_HDA, - 11274, 6476, 8230, 7054, 0, + 11389, 6494, 8263, 7072, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_LPC_H31, - 31886, 8958, 0, + 31987, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_LPC_H37, - 31891, 8958, 0, + 31992, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_LPC_Z39, - 31896, 8958, 0, + 31997, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_LPC_Q37, - 31901, 8958, 0, + 32002, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_LPC_B36, - 31906, 8958, 0, + 32007, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C240_LPC_C246, - 31911, 8958, 0, + 32012, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C240_LPC_C242, - 31916, 8958, 0, + 32017, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_LPC_QM37, - 31921, 8958, 0, + 32022, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_LPC_HM37, - 31927, 8958, 0, + 32028, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_C240_LPC_CM246, - 31933, 8958, 0, + 32034, 9054, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_P2SB, - 8758, 6476, 23813, 0, + 8791, 6494, 23909, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_PMC, - 8758, 6476, 23818, 0, + 8791, 6494, 23914, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_SMB, - 8758, 6476, 8962, 0, + 8791, 6494, 9058, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_SPI, - 8758, 6476, 17409, 23822, 0, + 8791, 6494, 17500, 23918, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_TRACE, - 8758, 6476, 23830, 8949, 0, + 8791, 6494, 23926, 9045, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_UART_0, - 8758, 6476, 7983, 8134, 0, + 8791, 6494, 8016, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_UART_1, - 8758, 6476, 7983, 8136, 0, + 8791, 6494, 8016, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_GSPI_0, - 8758, 6476, 24211, 8134, 0, + 8791, 6494, 24307, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_GSPI_1, - 8758, 6476, 24211, 8136, 0, + 8791, 6494, 24307, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_PCIE_21, - 8758, 6476, 8204, 0, + 8791, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_PCIE_22, - 8758, 6476, 8204, 0, + 8791, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_PCIE_23, - 8758, 6476, 8204, 0, + 8791, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_PCIE_24, - 8758, 6476, 8204, 0, + 8791, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_PCIE_9, - 8758, 6476, 8204, 0, + 8791, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_PCIE_10, - 8758, 6476, 8204, 0, + 8791, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_PCIE_11, - 8758, 6476, 8204, 0, + 8791, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_PCIE_12, - 8758, 6476, 8204, 0, + 8791, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_PCIE_13, - 8758, 6476, 8204, 0, + 8791, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_PCIE_14, - 8758, 6476, 8204, 0, + 8791, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_PCIE_15, - 8758, 6476, 8204, 0, + 8791, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_PCIE_16, - 8758, 6476, 8204, 0, + 8791, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_PCIE_1, - 8758, 6476, 8204, 0, + 8791, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_PCIE_2, - 8758, 6476, 8204, 0, + 8791, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_PCIE_3, - 8758, 6476, 8204, 0, + 8791, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_PCIE_4, - 8758, 6476, 8204, 0, + 8791, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_PCIE_5, - 8758, 6476, 8204, 0, + 8791, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_PCIE_6, - 8758, 6476, 8204, 0, + 8791, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_PCIE_7, - 8758, 6476, 8204, 0, + 8791, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_PCIE_8, - 8758, 6476, 8204, 0, + 8791, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_PCIE_17, - 8758, 6476, 8204, 0, + 8791, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_PCIE_18, - 8758, 6476, 8204, 0, + 8791, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_PCIE_19, - 8758, 6476, 8204, 0, + 8791, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_PCIE_20, - 8758, 6476, 8204, 0, + 8791, 6494, 8237, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_UART_2, - 8758, 6476, 7983, 6411, 0, + 8791, 6494, 8016, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_CAVS, - 8758, 6476, 24234, 0, + 8791, 6494, 24330, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_D_AHCI, - 8758, 6476, 8762, 8984, 24243, 0, + 8791, 6494, 8800, 9080, 24339, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_M_AHCI, - 8758, 6476, 8762, 8984, 24251, 0, + 8791, 6494, 8800, 9080, 24347, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_D_RAID, - 8758, 6476, 8762, 8991, 24243, 0, + 8791, 6494, 8800, 9087, 24339, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_M_RAID, - 8758, 6476, 8762, 8991, 24251, 0, + 8791, 6494, 8800, 9087, 24347, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_D_P_RAID, - 8758, 6476, 8762, 8991, 23853, 24243, 0, + 8791, 6494, 8800, 9087, 23949, 24339, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_M_P_RAID, - 8758, 6476, 8762, 8991, 23853, 24251, 0, + 8791, 6494, 8800, 9087, 23949, 24347, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_SATA_OPTANE, - 8758, 6476, 8762, 31939, 0, + 8791, 6494, 8800, 32040, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_MEI_1, - 8758, 6476, 23861, 0, + 8791, 6494, 23957, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_MEI_2, - 8758, 6476, 23861, 0, + 8791, 6494, 23957, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_IDER, - 8758, 6476, 28585, 0, + 8791, 6494, 28687, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_KT, - 8758, 6476, 23871, 0, + 8791, 6494, 23967, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_MEI_3, - 8758, 6476, 23861, 0, + 8791, 6494, 23957, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_MEI_4, - 8758, 6476, 23861, 0, + 8791, 6494, 23957, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_I2C_0, - 8758, 6476, 17453, 8134, 0, + 8791, 6494, 17544, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_I2C_1, - 8758, 6476, 17453, 8136, 0, + 8791, 6494, 17544, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_I2C_2, - 8758, 6476, 17453, 6411, 0, + 8791, 6494, 17544, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_I2C_3, - 8758, 6476, 17453, 6422, 0, + 8791, 6494, 17544, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_XHCI, - 8758, 6476, 6945, 8375, 8233, 0, + 8791, 6494, 6963, 8408, 8266, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_USBOTG, - 8758, 6476, 6945, 27549, 0, + 8791, 6494, 6963, 27645, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_SSRAM, - 8758, 6476, 23891, 23898, 0, + 8791, 6494, 23987, 23994, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_THERM, - 8758, 6476, 23913, 0, + 8791, 6494, 24009, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_SPI_2, - 8758, 6476, 17409, 0, + 8791, 6494, 17500, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_3HS_ISH, - 8758, 6476, 29147, 0, + 8791, 6494, 29249, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_V_AHCI, - 8771, 6476, 31948, 8762, 8984, 0, + 8836, 6494, 32049, 8800, 9080, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_V_RAID, - 8771, 6476, 31948, 8762, 8991, 0, + 8836, 6494, 32049, 8800, 9087, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_V_P_RAID, - 8771, 6476, 31948, 8762, 8991, 23853, 0, + 8836, 6494, 32049, 8800, 9087, 23949, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_V_OPTANE, - 8771, 6476, 31948, 8762, 31939, 0, + 8836, 6494, 32049, 8800, 32040, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_V_PCIE_1, - 8771, 6476, 31948, 8204, 8140, 8153, 8136, 0, + 8836, 6494, 32049, 8237, 8173, 8186, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_V_PCIE_2, - 8771, 6476, 31948, 8204, 8140, 8153, 6411, 0, + 8836, 6494, 32049, 8237, 8173, 8186, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_V_PCIE_3, - 8771, 6476, 31948, 8204, 8140, 8153, 6422, 0, + 8836, 6494, 32049, 8237, 8173, 8186, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_V_PCIE_4, - 8771, 6476, 31948, 8204, 8140, 8153, 6786, 0, + 8836, 6494, 32049, 8237, 8173, 8186, 6804, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_V_PCIE_5, - 8771, 6476, 31948, 8204, 8140, 8153, 8138, 0, + 8836, 6494, 32049, 8237, 8173, 8186, 8171, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_V_PCIE_6, - 8771, 6476, 31948, 8204, 8140, 8153, 8371, 0, + 8836, 6494, 32049, 8237, 8173, 8186, 8404, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_V_PCIE_7, - 8771, 6476, 31948, 8204, 8140, 8153, 8373, 0, + 8836, 6494, 32049, 8237, 8173, 8186, 8406, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_V_PCIE_8, - 8771, 6476, 31948, 8204, 8140, 8153, 6811, 0, + 8836, 6494, 32049, 8237, 8173, 8186, 6829, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_V_PCIE_9, - 8771, 6476, 31948, 8204, 8140, 8153, 1047, 0, + 8836, 6494, 32049, 8237, 8173, 8186, 1047, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_V_PCIE_10, - 8771, 6476, 31948, 8204, 8140, 8153, 9329, 0, + 8836, 6494, 32049, 8237, 8173, 8186, 9425, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_V_PCIE_11, - 8771, 6476, 31948, 8204, 8140, 8153, 23836, 0, + 8836, 6494, 32049, 8237, 8173, 8186, 23932, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_V_PCIE_12, - 8771, 6476, 31948, 8204, 8140, 8153, 14592, 0, + 8836, 6494, 32049, 8237, 8173, 8186, 14697, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_V_PCIE_13, - 8771, 6476, 31948, 8204, 8140, 8153, 23839, 0, + 8836, 6494, 32049, 8237, 8173, 8186, 23935, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_V_PCIE_14, - 8771, 6476, 31948, 8204, 8140, 8153, 23842, 0, + 8836, 6494, 32049, 8237, 8173, 8186, 23938, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_V_PCIE_15, - 8771, 6476, 31948, 8204, 8140, 8153, 23845, 0, + 8836, 6494, 32049, 8237, 8173, 8186, 23941, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_V_PCIE_16, - 8771, 6476, 31948, 8204, 8140, 8153, 19210, 0, + 8836, 6494, 32049, 8237, 8173, 8186, 19288, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_V_P2SB, - 8771, 6476, 31948, 23813, 0, + 8836, 6494, 32049, 23909, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_V_PMC, - 8771, 6476, 31948, 23818, 0, + 8836, 6494, 32049, 23914, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_V_SMB, - 8771, 6476, 31948, 8962, 0, + 8836, 6494, 32049, 9058, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_V_SPI, - 8771, 6476, 31948, 17409, 23822, 0, + 8836, 6494, 32049, 17500, 23918, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_V_TRACE, - 8771, 6476, 31948, 23830, 8949, 0, + 8836, 6494, 32049, 23926, 9045, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_V_UART_0, - 8771, 6476, 31948, 7983, 8134, 0, + 8836, 6494, 32049, 8016, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_V_UART_1, - 8771, 6476, 31948, 7983, 8136, 0, + 8836, 6494, 32049, 8016, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_V_SPI_0, - 8771, 6476, 31948, 17409, 8134, 0, + 8836, 6494, 32049, 17500, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_V_SPI_1, - 8771, 6476, 31948, 17409, 8136, 0, + 8836, 6494, 32049, 17500, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_V_XHCI, - 8771, 6476, 31948, 6945, 8450, 23874, 23882, 8233, 0, + 8836, 6494, 32049, 6963, 8483, 23970, 23978, 8266, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_V_XDCI, - 8771, 6476, 31948, 6945, 23886, 0, + 8836, 6494, 32049, 6963, 23982, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_V_THERM, - 8771, 6476, 31948, 23913, 0, + 8836, 6494, 32049, 24009, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_V_ISH, - 8771, 6476, 31948, 692, 23921, 8949, 0, + 8836, 6494, 32049, 692, 24017, 9045, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_V_HECI_1, - 8771, 6476, 31948, 24265, 8136, 0, + 8836, 6494, 32049, 24361, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_V_HECI_2, - 8771, 6476, 31948, 24265, 6411, 0, + 8836, 6494, 32049, 24361, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_V_IDER, - 8771, 6476, 31948, 23865, 0, + 8836, 6494, 32049, 23961, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_V_KT, - 8771, 6476, 31948, 23871, 0, + 8836, 6494, 32049, 23967, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_V_HECI_3, - 8771, 6476, 31948, 24265, 6422, 0, + 8836, 6494, 32049, 24361, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_V_B460_LPC, - 31954, 31948, 8958, 22213, 23808, 0, + 32055, 32049, 9054, 22309, 23904, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_V_H410_LPC, - 31959, 31948, 8958, 22213, 23808, 0, + 32060, 32049, 9054, 22309, 23904, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_V_I2C_0, - 8771, 6476, 31948, 17453, 8134, 0, + 8836, 6494, 32049, 17544, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_V_I2C_1, - 8771, 6476, 31948, 17453, 8136, 0, + 8836, 6494, 32049, 17544, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_V_I2C_2, - 8771, 6476, 31948, 17453, 6411, 0, + 8836, 6494, 32049, 17544, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_V_I2C_3, - 8771, 6476, 31948, 17453, 6422, 0, + 8836, 6494, 32049, 17544, 6440, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_V_UART_2, - 8771, 6476, 31948, 7983, 6411, 0, + 8836, 6494, 32049, 8016, 6429, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_V_PCIE_17, - 8771, 6476, 31948, 8204, 8140, 8153, 24225, 0, + 8836, 6494, 32049, 8237, 8173, 8186, 24321, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_V_PCIE_18, - 8771, 6476, 31948, 8204, 8140, 8153, 24228, 0, + 8836, 6494, 32049, 8237, 8173, 8186, 24324, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_V_PCIE_19, - 8771, 6476, 31948, 8204, 8140, 8153, 24231, 0, + 8836, 6494, 32049, 8237, 8173, 8186, 24327, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_V_PCIE_20, - 8771, 6476, 31948, 8204, 8140, 8153, 11629, 0, + 8836, 6494, 32049, 8237, 8173, 8186, 11739, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_V_PCIE_21, - 8771, 6476, 31948, 8204, 8140, 8153, 24216, 0, + 8836, 6494, 32049, 8237, 8173, 8186, 24312, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_V_PCIE_22, - 8771, 6476, 31948, 8204, 8140, 8153, 14584, 0, + 8836, 6494, 32049, 8237, 8173, 8186, 14689, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_V_PCIE_23, - 8771, 6476, 31948, 8204, 8140, 8153, 24219, 0, + 8836, 6494, 32049, 8237, 8173, 8186, 24315, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_V_PCIE_24, - 8771, 6476, 31948, 8204, 8140, 8153, 24222, 0, + 8836, 6494, 32049, 8237, 8173, 8186, 24318, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_4HS_V_CAVS, - 8771, 6476, 31948, 24234, 0, + 8836, 6494, 32049, 24330, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_RPL_S_8_16_HOST, - 30053, 23674, 31964, 6953, 0, + 30135, 23770, 32065, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_RPL_HX_8_16_HOST, - 30053, 23674, 31973, 6953, 0, + 30135, 23770, 32074, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_RPL_S_8_8_HOST, - 30053, 23674, 30132, 6953, 0, + 30135, 23770, 30214, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_RPL_S_6_8_HOST, - 30053, 23674, 30060, 6953, 0, + 30135, 23770, 30142, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_RPL_S_6_4_HOST, - 30053, 23674, 30085, 6953, 0, + 30135, 23770, 30167, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_RPL_H_6_8_HOST, - 30053, 23674, 30068, 6953, 0, + 30135, 23770, 30150, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_RPL_H_4_8_HOST, - 30053, 23674, 29980, 6953, 0, + 30135, 23770, 30062, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_RPL_U_2_8_HOST, - 30053, 23674, 31983, 6953, 0, + 30135, 23770, 32084, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_RPL_PX_6_8_HOST, - 30053, 23674, 31991, 6953, 0, + 30135, 23770, 32092, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_RPL_PX_4_8_HOST, - 30053, 23674, 32000, 6953, 0, + 30135, 23770, 32101, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_RPL_PCIE_RP_0, - 30053, 23674, 8204, 29880, 8140, 8153, 8134, 29883, 0, + 30135, 23770, 8237, 29962, 8173, 8186, 8167, 29965, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_RPL_E_8_0_HOST, - 30053, 23674, 32009, 6953, 0, + 30135, 23770, 32110, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_RPL_E_6_0_HOST, - 30053, 23674, 32017, 6953, 0, + 30135, 23770, 32118, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_RPL_E_4_0_HOST, - 30053, 23674, 32025, 6953, 0, + 30135, 23770, 32126, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_RPL_H_4_4_HOST, - 30053, 23674, 29997, 6953, 0, + 30135, 23770, 30079, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_RPL_HX_6_4_HOST, - 30053, 23674, 30076, 6953, 0, + 30135, 23770, 30158, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_RPL_U_2_4_HOST, - 30053, 23674, 32033, 6953, 0, + 30135, 23770, 32134, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_RPL_U_1_4_HOST, - 30053, 23674, 32041, 6953, 0, + 30135, 23770, 32142, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_RPL_DTT, - 30053, 23674, 2881, 29961, 127, 0, + 30135, 23770, 2881, 30043, 127, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_RPL_XHCI, - 30053, 23674, 29889, 6953, 28949, 0, + 30135, 23770, 29971, 6971, 29051, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_RPL_HX_8_8_HOST, - 30053, 23674, 30027, 6953, 0, + 30135, 23770, 30109, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_RPL_HX_8_12_HOST, - 30053, 23674, 32049, 6953, 0, + 30135, 23770, 32150, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_RPL_HX_6_8_HOST, - 30053, 23674, 30036, 6953, 0, + 30135, 23770, 30118, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_RPL_PCIE_RP_1, - 30053, 23674, 8204, 29880, 8140, 8153, 8136, 30014, 0, + 30135, 23770, 8237, 29962, 8173, 8186, 8169, 30096, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_RPL_TBTDMA_0, - 30053, 23674, 29968, 24519, 8134, 0, + 30135, 23770, 30050, 24615, 8167, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_RPL_S_8_12_HOST, - 30053, 23674, 29895, 32059, 6953, 0, + 30135, 23770, 29977, 32160, 6971, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_RPL_PCIE_RP_2, - 30053, 23674, 8204, 30045, 8140, 8153, 6411, 30048, 0, + 30135, 23770, 8237, 30127, 8173, 8186, 6429, 30130, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_RPL_GNA, - 30053, 23674, 30101, 30107, 30114, 0, + 30135, 23770, 30183, 30189, 30196, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_RPL_TBTDMA_1, - 30053, 23674, 29968, 24519, 8136, 0, + 30135, 23770, 30050, 24615, 8169, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_RPL_TRACE, - 30053, 23674, 23830, 8949, 29766, 29775, 0, + 30135, 23770, 23926, 9045, 29848, 29857, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_RPL_CLSRAM, - 30053, 23674, 30148, 30154, 647, 30158, 0, + 30135, 23770, 30230, 30236, 647, 30240, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_RPL_VMD, - 30053, 23674, 30168, 7078, 2418, 0, + 30135, 23770, 30250, 7096, 2418, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_RPL_IGD_1, - 30053, 23674, 1716, 29829, 0, + 30135, 23770, 1716, 29911, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_RPL_IGD_2, - 30053, 23674, 1716, 30175, 0, + 30135, 23770, 1716, 30257, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_RPL_IGD_3, - 30053, 23674, 1716, 29816, 0, + 30135, 23770, 1716, 29898, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_RPL_IGD_4, - 30053, 23674, 1716, 29829, 0, + 30135, 23770, 1716, 29911, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_RPL_IGD_5, - 30053, 23674, 1716, 29816, 0, + 30135, 23770, 1716, 29898, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_RPL_IGD_6, - 30053, 23674, 1716, 32068, 22213, 32072, 0, + 30135, 23770, 1716, 32169, 22309, 32173, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_RPL_IGD_7, - 30053, 23674, 1716, 32068, 22213, 32072, 0, + 30135, 23770, 1716, 32169, 22309, 32173, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_RPL_IGD_8, - 30053, 23674, 1716, 32078, 22213, 31527, 0, + 30135, 23770, 1716, 32179, 22309, 31628, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_RPL_IGD_9, - 30053, 23674, 1716, 32078, 22213, 31527, 0, + 30135, 23770, 1716, 32179, 22309, 31628, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_RPL_IGD_10, - 30053, 23674, 1716, 32068, 22213, 32072, 0, + 30135, 23770, 1716, 32169, 22309, 32173, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_RPL_IGD_11, - 30053, 23674, 1716, 32068, 22213, 32072, 0, + 30135, 23770, 1716, 32169, 22309, 32173, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_RPL_IGD_12, - 30053, 23674, 1716, 32082, 0, + 30135, 23770, 1716, 32183, 0, + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_NPU_ARL, + 32190, 23770, 30806, 0, + PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_NPU_PTL, + 32196, 23770, 30806, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_21152, - 32089, 8791, 6563, 0, + 32204, 8887, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_21154, - 32098, 8791, 6563, 0, + 32213, 8887, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_21555, - 32119, 32125, 8791, 6563, 0, + 32234, 32240, 8887, 6581, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CP_DMI_1, - 23679, 8115, 29007, 0, + 23775, 8148, 29109, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CP_DMI_2, - 23679, 8115, 29007, 0, + 23775, 8148, 29109, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CP_PCIE_1, - 23679, 8115, 8204, 8140, 8153, 32141, 22213, 24527, 30758, 0, + 23775, 8148, 8237, 8173, 8186, 32256, 22309, 24623, 30844, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CP_PCIE_2, - 23679, 8115, 8204, 8140, 8153, 30754, 30758, 0, + 23775, 8148, 8237, 8173, 8186, 30840, 30844, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CP_QPI_LINK, - 23679, 8115, 24795, 8075, 0, + 23775, 8148, 24891, 8108, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CP_QPI_RPREGS, - 23679, 8115, 24795, 32146, 558, 32154, 28009, 0, + 23775, 8148, 24891, 32261, 558, 32269, 28105, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CP_SYS_MREGS, - 23679, 8115, 6, 7078, 28009, 0, + 23775, 8148, 6, 7096, 28105, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CP_SS_REGS, - 23679, 8115, 32163, 558, 28753, 28009, 0, + 23775, 8148, 32278, 558, 28855, 28105, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CP_SCS_REGS, - 23679, 8115, 6, 9186, 558, 19661, 28009, 0, + 23775, 8148, 6, 9282, 558, 19739, 28105, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_CP_MISC_REGS, - 23679, 8115, 8051, 28009, 0, + 23775, 8148, 8084, 28105, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_HANKSVILLE, - 32173, 4540, 6455, 0, + 32288, 4540, 6473, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SSD_760P, - 7957, 7962, 32184, 0, + 7990, 7995, 32299, 0, PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_SSD_660P, - 7957, 7962, 32203, 0, + 7990, 7995, 32318, 0, PCI_VENDOR_INTERGRAPH, PCI_PRODUCT_INTERGRAPH_4D60T, - 32208, 32219, 0, + 32323, 32334, 0, PCI_VENDOR_INTERGRAPH, PCI_PRODUCT_INTERGRAPH_4D50T, - 32208, 32225, 0, + 32323, 32340, 0, PCI_VENDOR_INTERSIL, PCI_PRODUCT_INTERSIL_MINI_PCI_WLAN, - 32231, 5755, 7694, 0, + 32346, 5773, 7727, 0, PCI_VENDOR_INTERSIL, PCI_PRODUCT_INTERSIL_MINI_PCI_3877, - 32240, 32246, 5755, 7694, 0, + 32355, 32361, 5773, 7727, 0, PCI_VENDOR_INTERSIL, PCI_PRODUCT_INTERSIL_MINI_PCI_3890, - 32240, 32253, 5755, 7694, 0, + 32355, 32368, 5773, 7727, 0, PCI_VENDOR_INVERTEX, PCI_PRODUCT_INVERTEX_AEON, - 32260, 0, + 32375, 0, PCI_VENDOR_IODATA, PCI_PRODUCT_IODATA_CBIDE2, - 32265, 32279, 6626, 0, + 32380, 32394, 6644, 0, PCI_VENDOR_IODATA, PCI_PRODUCT_IODATA_CBSCII, - 32293, 32300, 6670, 0, + 32408, 32415, 6688, 0, PCI_VENDOR_IODATA, PCI_PRODUCT_IODATA_RSAPCI, - 32315, 19736, 14833, 0, + 32430, 19814, 14929, 0, PCI_VENDOR_IODATA, PCI_PRODUCT_IODATA_GVBCTV5DL, - 32323, 14623, 32338, 0, + 32438, 14723, 32453, 0, PCI_VENDOR_ITE, PCI_PRODUCT_ITE_IT8152, - 32344, 6953, 6563, 0, + 32459, 6971, 6581, 0, PCI_VENDOR_ITE, PCI_PRODUCT_ITE_IT8211, - 32351, 6626, 6455, 0, + 32466, 6644, 6473, 0, PCI_VENDOR_ITE, PCI_PRODUCT_ITE_IT8212, - 32358, 6626, 6455, 0, + 32473, 6644, 6473, 0, PCI_VENDOR_ITE, PCI_PRODUCT_ITE_IT8213, - 32365, 6626, 6455, 0, + 32480, 6644, 6473, 0, PCI_VENDOR_ITE, PCI_PRODUCT_ITE_IT8888, - 6837, 6563, 0, + 6855, 6581, 0, PCI_VENDOR_ITE, PCI_PRODUCT_ITE_IT8892, - 9831, 6563, 0, + 9927, 6581, 0, PCI_VENDOR_ITT, PCI_PRODUCT_ITT_AGX016, - 32372, 0, + 32487, 0, PCI_VENDOR_ITT, PCI_PRODUCT_ITT_ITT3204, - 32379, 6914, 6919, 0, + 32494, 6932, 6937, 0, PCI_VENDOR_JMICRON, PCI_PRODUCT_JMICRON_JMC250, - 32387, 5709, 5717, 6455, 0, + 32502, 5727, 5735, 6473, 0, PCI_VENDOR_JMICRON, PCI_PRODUCT_JMICRON_JMC260, - 32394, 2430, 5717, 6455, 0, + 32509, 2430, 5735, 6473, 0, PCI_VENDOR_JMICRON, PCI_PRODUCT_JMICRON_JMB360, - 32401, 8762, 6455, 0, + 32516, 8800, 6473, 0, PCI_VENDOR_JMICRON, PCI_PRODUCT_JMICRON_JMB361, - 32408, 32415, 6455, 0, + 32523, 32530, 6473, 0, PCI_VENDOR_JMICRON, PCI_PRODUCT_JMICRON_JMB362, - 32425, 8762, 6455, 0, + 32540, 8800, 6473, 0, PCI_VENDOR_JMICRON, PCI_PRODUCT_JMICRON_JMB363, - 32432, 32415, 6455, 0, + 32547, 32530, 6473, 0, PCI_VENDOR_JMICRON, PCI_PRODUCT_JMICRON_JMB365, - 32439, 32415, 6455, 0, + 32554, 32530, 6473, 0, PCI_VENDOR_JMICRON, PCI_PRODUCT_JMICRON_JMB366, - 32446, 32415, 6455, 0, + 32561, 32530, 6473, 0, PCI_VENDOR_JMICRON, PCI_PRODUCT_JMICRON_JMB368, - 32453, 32460, 6455, 0, + 32568, 32575, 6473, 0, PCI_VENDOR_JMICRON, PCI_PRODUCT_JMICRON_JMB38X_FW, - 32465, 20632, 20637, 6953, 6455, 0, + 32580, 20728, 20733, 6971, 6473, 0, PCI_VENDOR_JMICRON, PCI_PRODUCT_JMICRON_JMB38X_SD, - 32465, 9017, 6953, 6455, 0, + 32580, 9113, 6971, 6473, 0, PCI_VENDOR_JMICRON, PCI_PRODUCT_JMICRON_JMB38X_MMC, - 32465, 32472, 6953, 6455, 0, + 32580, 32587, 6971, 6473, 0, PCI_VENDOR_JMICRON, PCI_PRODUCT_JMICRON_JMB38X_MS, - 32465, 4504, 32479, 6953, 6455, 0, + 32580, 4504, 32594, 6971, 6473, 0, PCI_VENDOR_JMICRON, PCI_PRODUCT_JMICRON_JMB38X_XD, - 32465, 16562, 6953, 6455, 0, + 32580, 16658, 6971, 6473, 0, PCI_VENDOR_JMICRON, PCI_PRODUCT_JMICRON_JMB388_SD, - 32485, 9017, 6953, 6455, 0, + 32600, 9113, 6971, 6473, 0, PCI_VENDOR_JMICRON, PCI_PRODUCT_JMICRON_JMB388_MMC, - 32485, 32472, 6953, 6455, 0, + 32600, 32587, 6971, 6473, 0, PCI_VENDOR_JMICRON, PCI_PRODUCT_JMICRON_JMB388_MS, - 32485, 4504, 32479, 6953, 6455, 0, + 32600, 4504, 32594, 6971, 6473, 0, PCI_VENDOR_JMICRON, PCI_PRODUCT_JMICRON_JMB388_XD, - 32485, 16562, 6953, 6455, 0, + 32600, 16658, 6971, 6473, 0, PCI_VENDOR_JNI, PCI_PRODUCT_JNI_JNIC1460, - 32492, 32502, 5909, 0, + 32607, 32617, 5927, 0, PCI_VENDOR_JNI, PCI_PRODUCT_JNI_JNIC1560, - 32516, 11247, 32502, 5909, 0, + 32631, 11362, 32617, 5927, 0, PCI_VENDOR_JNI, PCI_PRODUCT_JNI_FCI1063, - 32526, 32502, 5909, 0, + 32641, 32617, 5927, 0, PCI_VENDOR_JNI, PCI_PRODUCT_JNI_FCX26562, - 32535, 11247, 32502, 5909, 0, + 32650, 11362, 32617, 5927, 0, PCI_VENDOR_JNI, PCI_PRODUCT_JNI_FCX6562, - 32545, 32502, 5909, 0, + 32660, 32617, 5927, 0, PCI_VENDOR_JUNIPER, PCI_PRODUCT_JUNIPER_XCLK0, - 32554, 32567, 32573, 8134, 0, + 32669, 32682, 32688, 8167, 0, PCI_VENDOR_KTI, PCI_PRODUCT_KTI_NE2KETHER, - 5717, 0, + 5735, 0, PCI_VENDOR_LMC, PCI_PRODUCT_LMC_HSSI, - 32581, 3018, 0, + 32696, 3018, 0, PCI_VENDOR_LMC, PCI_PRODUCT_LMC_DS3, - 32586, 3018, 0, + 32701, 3018, 0, PCI_VENDOR_LMC, PCI_PRODUCT_LMC_SSI, - 32590, 0, + 32705, 0, PCI_VENDOR_LMC, PCI_PRODUCT_LMC_DS1, - 32594, 0, + 32709, 0, PCI_VENDOR_LAVA, PCI_PRODUCT_LAVA_TWOSP_2S, - 11247, 14833, 0, + 11362, 14929, 0, PCI_VENDOR_LAVA, PCI_PRODUCT_LAVA_QUATTRO_AB, - 11247, 14833, 0, + 11362, 14929, 0, PCI_VENDOR_LAVA, PCI_PRODUCT_LAVA_QUATTRO_CD, - 11247, 14833, 0, + 11362, 14929, 0, PCI_VENDOR_LAVA, PCI_PRODUCT_LAVA_IOFLEX_2S_0, - 14833, 0, + 14929, 0, PCI_VENDOR_LAVA, PCI_PRODUCT_LAVA_IOFLEX_2S_1, - 14833, 0, + 14929, 0, PCI_VENDOR_LAVA, PCI_PRODUCT_LAVA_QUATTRO_AB2, - 11247, 14833, 0, + 11362, 14929, 0, PCI_VENDOR_LAVA, PCI_PRODUCT_LAVA_QUATTRO_CD2, - 11247, 14833, 0, + 11362, 14929, 0, PCI_VENDOR_LAVA, PCI_PRODUCT_LAVA_OCTOPUS550_0, - 19213, 14833, 0, + 19291, 14929, 0, PCI_VENDOR_LAVA, PCI_PRODUCT_LAVA_OCTOPUS550_1, - 19213, 14833, 0, + 19291, 14929, 0, PCI_VENDOR_LAVA, PCI_PRODUCT_LAVA_LAVAPORT_2, - 14833, 0, + 14929, 0, PCI_VENDOR_LAVA, PCI_PRODUCT_LAVA_LAVAPORT_0, - 14833, 0, + 14929, 0, PCI_VENDOR_LAVA, PCI_PRODUCT_LAVA_LAVAPORT_1, - 14833, 0, + 14929, 0, PCI_VENDOR_LAVA, PCI_PRODUCT_LAVA_SSERIAL, - 6575, 14833, 0, + 6593, 14929, 0, PCI_VENDOR_LAVA, PCI_PRODUCT_LAVA_650, - 14833, 0, + 14929, 0, PCI_VENDOR_LAVA, PCI_PRODUCT_LAVA_TWOSP_1P, - 17862, 0, + 17946, 0, PCI_VENDOR_LAVA, PCI_PRODUCT_LAVA_PARALLEL2, - 11247, 17862, 0, + 11362, 17946, 0, PCI_VENDOR_LAVA, PCI_PRODUCT_LAVA_PARALLEL2A, - 11247, 17862, 0, + 11362, 17946, 0, PCI_VENDOR_LAVA, PCI_PRODUCT_LAVA_PARALLELB, - 11247, 17862, 0, + 11362, 17946, 0, PCI_VENDOR_LEADTEK, PCI_PRODUCT_LEADTEK_S3_805, - 5511, 32598, 0, + 5529, 32713, 0, PCI_VENDOR_LEVELONE, PCI_PRODUCT_LEVELONE_LXT1001, - 32602, 5732, 5717, 0, + 32717, 5750, 5735, 0, PCI_VENDOR_LINEARSYS, PCI_PRODUCT_LINEARSYS_DVB_TX, - 32611, 32615, 0, + 32726, 32730, 0, PCI_VENDOR_LINEARSYS, PCI_PRODUCT_LINEARSYS_DVB_RX, - 32611, 32627, 0, + 32726, 32742, 0, PCI_VENDOR_LINKSYS, PCI_PRODUCT_LINKSYS_EG1032, - 32636, 24703, 32643, 5709, 3879, 5909, 0, + 32751, 24799, 32758, 5727, 3879, 5927, 0, PCI_VENDOR_LINKSYS, PCI_PRODUCT_LINKSYS_EG1064, - 32651, 24703, 32643, 5709, 3879, 5909, 0, + 32766, 24799, 32758, 5727, 3879, 5927, 0, PCI_VENDOR_LINKSYS, PCI_PRODUCT_LINKSYS_PCMPC200, - 32658, 0, + 32773, 0, PCI_VENDOR_LINKSYS, PCI_PRODUCT_LINKSYS_PCM200, - 6515, 0, + 6533, 0, PCI_VENDOR_LINKSYS2, PCI_PRODUCT_LINKSYS2_IPN2220, - 32667, 32671, 4761, 4540, 5909, 32676, 32681, 0, + 32782, 32786, 4761, 4540, 5927, 32791, 32796, 0, PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C168, - 32685, 32699, 5819, 5717, 0, + 32800, 32814, 5837, 5735, 0, PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C115, - 32706, 32713, 32719, 5819, 5717, 0, + 32821, 32828, 32834, 5837, 5735, 0, PCI_VENDOR_LUCENT, PCI_PRODUCT_LUCENT_LTMODEM_0440, - 32723, 32731, 32736, 0, + 32838, 32846, 32851, 0, PCI_VENDOR_LUCENT, PCI_PRODUCT_LUCENT_LTMODEM_0441, - 32736, 0, + 32851, 0, PCI_VENDOR_LUCENT, PCI_PRODUCT_LUCENT_LTMODEM_0442, - 32736, 0, + 32851, 0, PCI_VENDOR_LUCENT, PCI_PRODUCT_LUCENT_LTMODEM_0443, - 32736, 0, + 32851, 0, PCI_VENDOR_LUCENT, PCI_PRODUCT_LUCENT_LTMODEM_0444, - 32736, 0, + 32851, 0, PCI_VENDOR_LUCENT, PCI_PRODUCT_LUCENT_LTMODEM_0445, - 32736, 0, + 32851, 0, PCI_VENDOR_LUCENT, PCI_PRODUCT_LUCENT_LTMODEM_0446, - 32736, 0, + 32851, 0, PCI_VENDOR_LUCENT, PCI_PRODUCT_LUCENT_LTMODEM_0447, - 32736, 0, + 32851, 0, PCI_VENDOR_LUCENT, PCI_PRODUCT_LUCENT_LTMODEM_0448, - 32736, 0, + 32851, 0, PCI_VENDOR_LUCENT, PCI_PRODUCT_LUCENT_LTMODEM_0449, - 32736, 0, + 32851, 0, PCI_VENDOR_LUCENT, PCI_PRODUCT_LUCENT_LTMODEM_044a, - 32736, 0, + 32851, 0, PCI_VENDOR_LUCENT, PCI_PRODUCT_LUCENT_LTMODEM_044b, - 32736, 0, + 32851, 0, PCI_VENDOR_LUCENT, PCI_PRODUCT_LUCENT_LTMODEM_044c, - 32736, 0, + 32851, 0, PCI_VENDOR_LUCENT, PCI_PRODUCT_LUCENT_LTMODEM_044d, - 32736, 0, + 32851, 0, PCI_VENDOR_LUCENT, PCI_PRODUCT_LUCENT_LTMODEM_044e, - 32736, 0, + 32851, 0, PCI_VENDOR_LUCENT, PCI_PRODUCT_LUCENT_LTMODEM_0450, - 32736, 0, + 32851, 0, PCI_VENDOR_LUCENT, PCI_PRODUCT_LUCENT_LTMODEM_0451, - 32736, 0, + 32851, 0, PCI_VENDOR_LUCENT, PCI_PRODUCT_LUCENT_LTMODEM_0452, - 32736, 0, + 32851, 0, PCI_VENDOR_LUCENT, PCI_PRODUCT_LUCENT_LTMODEM_0453, - 32736, 0, + 32851, 0, PCI_VENDOR_LUCENT, PCI_PRODUCT_LUCENT_LTMODEM_0454, - 32736, 0, + 32851, 0, PCI_VENDOR_LUCENT, PCI_PRODUCT_LUCENT_LTMODEM_0455, - 32736, 0, + 32851, 0, PCI_VENDOR_LUCENT, PCI_PRODUCT_LUCENT_LTMODEM_0456, - 32736, 0, + 32851, 0, PCI_VENDOR_LUCENT, PCI_PRODUCT_LUCENT_LTMODEM_0457, - 32736, 0, + 32851, 0, PCI_VENDOR_LUCENT, PCI_PRODUCT_LUCENT_LTMODEM_0458, - 32736, 0, + 32851, 0, PCI_VENDOR_LUCENT, PCI_PRODUCT_LUCENT_LTMODEM_0459, - 32736, 0, + 32851, 0, PCI_VENDOR_LUCENT, PCI_PRODUCT_LUCENT_LTMODEM_045a, - 32736, 0, + 32851, 0, PCI_VENDOR_LUCENT, PCI_PRODUCT_LUCENT_VENUSMODEM, - 32744, 5764, 0, + 32859, 5782, 0, PCI_VENDOR_LUCENT, PCI_PRODUCT_LUCENT_OR3LP26, - 32750, 18438, 6156, 32755, 615, 32762, 23679, 0, + 32865, 18516, 6174, 32870, 615, 32877, 23775, 0, PCI_VENDOR_LUCENT, PCI_PRODUCT_LUCENT_OR3TP12, - 32750, 18438, 6156, 13161, 615, 32762, 23679, 0, + 32865, 18516, 6174, 13271, 615, 32877, 23775, 0, PCI_VENDOR_LUCENT, PCI_PRODUCT_LUCENT_USBHC, - 6945, 6953, 6455, 0, + 6963, 6971, 6473, 0, PCI_VENDOR_LUCENT, PCI_PRODUCT_LUCENT_USBHC2, - 19736, 6945, 6953, 6455, 0, + 19814, 6963, 6971, 6473, 0, PCI_VENDOR_LUCENT, PCI_PRODUCT_LUCENT_FW322_323, - 32767, 20632, 20637, 6953, 6455, 0, + 32882, 20728, 20733, 6971, 6473, 0, PCI_VENDOR_LUCENT, PCI_PRODUCT_LUCENT_FW643_PCIE, - 32777, 8204, 20632, 32783, 6953, 6455, 0, + 32892, 8237, 20728, 32898, 6971, 6473, 0, PCI_VENDOR_LUCENT, PCI_PRODUCT_LUCENT_ET1310, - 32789, 5732, 5717, 0, + 32904, 5750, 5735, 0, PCI_VENDOR_LUCENT, PCI_PRODUCT_LUCENT_ET1301, - 32796, 5819, 5717, 0, + 32911, 5837, 5735, 0, PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98713, - 32803, 32811, 5819, 5717, 0, + 32918, 32926, 5837, 5735, 0, PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX987x5, - 32818, 32811, 5819, 5717, 0, + 32933, 32926, 5837, 5735, 0, PCI_VENDOR_MADGE, PCI_PRODUCT_MADGE_SMARTRN2, - 18970, 23181, 615, 32826, 32835, 0, + 19048, 23277, 615, 32941, 32950, 0, PCI_VENDOR_MADGE, PCI_PRODUCT_MADGE_COLLAGE25, - 32839, 23201, 7125, 5909, 0, + 32954, 23297, 7143, 5927, 0, PCI_VENDOR_MADGE, PCI_PRODUCT_MADGE_COLLAGE155, - 32839, 32847, 7125, 5909, 0, + 32954, 32962, 7143, 5927, 0, PCI_VENDOR_MAGMA, PCI_PRODUCT_MAGMA_SERIAL16, - 19210, 24519, 32851, 0, + 19288, 24615, 32966, 0, PCI_VENDOR_MAGMA, PCI_PRODUCT_MAGMA_SERIAL4, - 6786, 24519, 32851, 0, + 6804, 24615, 32966, 0, PCI_VENDOR_MATROX, PCI_PRODUCT_MATROX_ATLAS, - 32860, 32864, 32871, 0, + 32975, 32979, 32986, 0, PCI_VENDOR_MATROX, PCI_PRODUCT_MATROX_MILLENNIUM, - 32860, 32881, 32892, 32898, 0, + 32975, 32996, 33007, 33013, 0, PCI_VENDOR_MATROX, PCI_PRODUCT_MATROX_MYSTIQUE, - 32860, 32908, 32917, 0, + 32975, 33023, 33032, 0, PCI_VENDOR_MATROX, PCI_PRODUCT_MATROX_MILLENNIUM2, - 32860, 32881, 7596, 32924, 0, + 32975, 32996, 7629, 33039, 0, PCI_VENDOR_MATROX, PCI_PRODUCT_MATROX_MILLENNIUM2_AGP, - 32860, 32881, 7596, 32930, 8804, 0, + 32975, 32996, 7629, 33045, 8900, 0, PCI_VENDOR_MATROX, PCI_PRODUCT_MATROX_G200_PCI, - 32860, 32939, 615, 0, + 32975, 33054, 615, 0, PCI_VENDOR_MATROX, PCI_PRODUCT_MATROX_G200_AGP, - 32860, 32939, 8804, 0, + 32975, 33054, 8900, 0, PCI_VENDOR_MATROX, PCI_PRODUCT_MATROX_G200E_SE, - 32860, 32944, 32950, 0, + 32975, 33059, 33065, 0, PCI_VENDOR_MATROX, PCI_PRODUCT_MATROX_G400_AGP, - 32860, 32966, 8804, 0, + 32975, 33081, 8900, 0, PCI_VENDOR_MATROX, PCI_PRODUCT_MATROX_G200EW, - 32860, 32971, 0, + 32975, 33086, 0, PCI_VENDOR_MATROX, PCI_PRODUCT_MATROX_G200EH, - 32860, 32978, 0, + 32975, 33093, 0, PCI_VENDOR_MATROX, PCI_PRODUCT_MATROX_IMPRESSION, - 32860, 32985, 0, + 32975, 33100, 0, PCI_VENDOR_MATROX, PCI_PRODUCT_MATROX_G100_PCI, - 32860, 32996, 615, 0, + 32975, 33111, 615, 0, PCI_VENDOR_MATROX, PCI_PRODUCT_MATROX_G100_AGP, - 32860, 32996, 8804, 0, + 32975, 33111, 8900, 0, PCI_VENDOR_MATROX, PCI_PRODUCT_MATROX_G550_AGP, - 32860, 33001, 8804, 0, + 32975, 33116, 8900, 0, PCI_VENDOR_MEDIAQ, PCI_PRODUCT_MEDIAQ_MQ200, - 33006, 0, + 33121, 0, PCI_VENDOR_MELLANOX, PCI_PRODUCT_MELLANOX_MT27700, - 33012, 0, + 33127, 0, PCI_VENDOR_MELLANOX, PCI_PRODUCT_MELLANOX_MT27700VF, - 33012, 15833, 0, + 33127, 15929, 0, PCI_VENDOR_MELLANOX, PCI_PRODUCT_MELLANOX_MT27710, - 33012, 33023, 0, + 33127, 33138, 0, PCI_VENDOR_MELLANOX, PCI_PRODUCT_MELLANOX_MT27710VF, - 33012, 33023, 15833, 0, + 33127, 33138, 15929, 0, PCI_VENDOR_MELLANOX, PCI_PRODUCT_MELLANOX_MT27800, - 33026, 0, + 33141, 0, PCI_VENDOR_MELLANOX, PCI_PRODUCT_MELLANOX_MT27800VF, - 33026, 15833, 0, + 33141, 15929, 0, PCI_VENDOR_MELLANOX, PCI_PRODUCT_MELLANOX_MT28800, - 33026, 33037, 0, + 33141, 33152, 0, PCI_VENDOR_MELLANOX, PCI_PRODUCT_MELLANOX_MT28800VF, - 33026, 33037, 15833, 0, + 33141, 33152, 15929, 0, PCI_VENDOR_MELLANOX, PCI_PRODUCT_MELLANOX_MT28908, - 33040, 0, + 33155, 0, PCI_VENDOR_MELLANOX, PCI_PRODUCT_MELLANOX_MT28908VF, - 33040, 15833, 0, + 33155, 15929, 0, PCI_VENDOR_MELLANOX, PCI_PRODUCT_MELLANOX_MT2892, - 33040, 33051, 0, + 33155, 33166, 0, PCI_VENDOR_MELLANOX, PCI_PRODUCT_MELLANOX_MT2894, - 33040, 33023, 0, + 33155, 33138, 0, PCI_VENDOR_MELLANOX, PCI_PRODUCT_MELLANOX_MT23108, - 33054, 33065, 0, + 33169, 33180, 0, PCI_VENDOR_MELLANOX, PCI_PRODUCT_MELLANOX_MT23108_PCI, - 33054, 615, 6563, 33065, 0, + 33169, 615, 6581, 33180, 0, PCI_VENDOR_MELLANOX, PCI_PRODUCT_MELLANOX_MT25204_OLD, - 33054, 9770, 33023, 33073, 33078, 0, + 33169, 9866, 33138, 33188, 33193, 0, PCI_VENDOR_MELLANOX, PCI_PRODUCT_MELLANOX_MT25204, - 33054, 9770, 33023, 33085, 0, + 33169, 9866, 33138, 33200, 0, PCI_VENDOR_MELLANOX, PCI_PRODUCT_MELLANOX_MT25208_COMPAT, - 33054, 9770, 33037, 33093, 8352, 33100, 33106, 0, + 33169, 9866, 33152, 33208, 8385, 33215, 33221, 0, PCI_VENDOR_MELLANOX, PCI_PRODUCT_MELLANOX_MT25208, - 33054, 9770, 33037, 33119, 0, + 33169, 9866, 33152, 33234, 0, PCI_VENDOR_MELLANOX, PCI_PRODUCT_MELLANOX_MT25408_SDR, - 33127, 33136, 33140, 0, + 33242, 33251, 33255, 0, PCI_VENDOR_MELLANOX, PCI_PRODUCT_MELLANOX_MT25408_DDR, - 33127, 30852, 33140, 0, + 33242, 30938, 33255, 0, PCI_VENDOR_MELLANOX, PCI_PRODUCT_MELLANOX_MT25408_QDR, - 33127, 33149, 8204, 6964, 33153, 33140, 0, + 33242, 33264, 8237, 6982, 33268, 33255, 0, PCI_VENDOR_MELLANOX, PCI_PRODUCT_MELLANOX_MT25408_EN, - 33127, 33161, 33164, 8204, 6964, 33153, 33140, 0, + 33242, 33276, 33279, 8237, 6982, 33268, 33255, 0, PCI_VENDOR_MELLANOX, PCI_PRODUCT_MELLANOX_MT25408_DDR_2, - 33127, 30852, 8204, 6964, 33171, 33140, 0, + 33242, 30938, 8237, 6982, 33286, 33255, 0, PCI_VENDOR_MELLANOX, PCI_PRODUCT_MELLANOX_MT25408_QDR_2, - 33127, 33149, 8204, 6964, 33171, 33140, 0, + 33242, 33264, 8237, 6982, 33286, 33255, 0, PCI_VENDOR_MELLANOX, PCI_PRODUCT_MELLANOX_MT25408_EN_2, - 33127, 33161, 33164, 8204, 6964, 33171, 33140, 0, + 33242, 33276, 33279, 8237, 6982, 33286, 33255, 0, PCI_VENDOR_MICROMEMORY, PCI_PRODUCT_MICROMEMORY_5415CN, - 33177, 4504, 14799, 0, + 33292, 4504, 14895, 0, PCI_VENDOR_MICROMEMORY, PCI_PRODUCT_MICROMEMORY_5425CN, - 33187, 4504, 14799, 0, + 33302, 4504, 14895, 0, PCI_VENDOR_MICROSOFT, PCI_PRODUCT_MICROSOFT_MN120, - 33197, 5819, 5717, 18952, 5909, 0, + 33312, 5837, 5735, 19030, 5927, 0, PCI_VENDOR_MICREL, PCI_PRODUCT_MICREL_KSZ8841, - 5819, 5717, 0, + 5837, 5735, 0, PCI_VENDOR_MICREL, PCI_PRODUCT_MICREL_KSZ8842, - 33204, 6411, 8153, 5819, 5717, 0, - PCI_VENDOR_MICRON, PCI_PRODUCT_MICRON_SM2263, - 33213, 7957, 6455, 0, + 33319, 6429, 8186, 5837, 5735, 0, + PCI_VENDOR_MICRON, PCI_PRODUCT_MICRON_P1, + 33328, 7990, 7995, 0, + PCI_VENDOR_MICRON, PCI_PRODUCT_MICRON_P1_1, + 33328, 7990, 7995, 0, + PCI_VENDOR_MICRON, PCI_PRODUCT_MICRON_P5PLUS, + 33331, 19318, 7990, 7995, 0, + PCI_VENDOR_MICRON, PCI_PRODUCT_MICRON_P2P3P3P, + 33334, 2173, 33337, 2173, 33337, 19318, 7990, 7995, 0, + PCI_VENDOR_MICRON, PCI_PRODUCT_MICRON_P5, + 33331, 7990, 7995, 0, + PCI_VENDOR_MICRON, PCI_PRODUCT_MICRON_T500, + 33340, 7990, 7995, 0, + PCI_VENDOR_MICRON, PCI_PRODUCT_MICRON_T700, + 33345, 7990, 7995, 0, PCI_VENDOR_MIDDLE_DIGITAL, PCI_PRODUCT_MIDDLE_DIGITAL_WEASEL_VGA, - 33220, 19987, 8679, 0, + 33350, 20065, 8712, 0, PCI_VENDOR_MIDDLE_DIGITAL, PCI_PRODUCT_MIDDLE_DIGITAL_WEASEL_SERIAL, - 33220, 14833, 8153, 0, + 33350, 14929, 8186, 0, PCI_VENDOR_MIDDLE_DIGITAL, PCI_PRODUCT_MIDDLE_DIGITAL_WEASEL_CONTROL, - 33220, 9186, 0, + 33350, 9282, 0, PCI_VENDOR_MITSUBISHIELEC, PCI_PRODUCT_MITSUBISHIELEC_TORNADO, - 33227, 13829, 8804, 0, + 33357, 13939, 8900, 0, PCI_VENDOR_MOT, PCI_PRODUCT_MOT_MPC105, - 33235, 33242, 6953, 6563, 0, + 33365, 33372, 6971, 6581, 0, PCI_VENDOR_MOT, PCI_PRODUCT_MOT_MPC106, - 33250, 33257, 6953, 6563, 0, + 33380, 33387, 6971, 6581, 0, PCI_VENDOR_MOT, PCI_PRODUCT_MOT_MPC8240, - 33267, 33275, 6953, 6563, 0, + 33397, 33405, 6971, 6581, 0, PCI_VENDOR_MOT, PCI_PRODUCT_MOT_MPC107, - 33284, 33291, 6953, 6563, 0, + 33414, 33421, 6971, 6581, 0, PCI_VENDOR_MOT, PCI_PRODUCT_MOT_MPC8245, - 33303, 33311, 33319, 6953, 6563, 0, + 33433, 33441, 33449, 6971, 6581, 0, PCI_VENDOR_MOT, PCI_PRODUCT_MOT_MPC8555E, - 33323, 0, + 33453, 0, PCI_VENDOR_MOT, PCI_PRODUCT_MOT_MPC8541, - 33332, 0, + 33462, 0, PCI_VENDOR_MOT, PCI_PRODUCT_MOT_MPC8548E, - 20982, 0, + 21078, 0, PCI_VENDOR_MOT, PCI_PRODUCT_MOT_MPC8548, - 20991, 0, + 21087, 0, PCI_VENDOR_MOT, PCI_PRODUCT_MOT_RAVEN, - 33340, 6953, 6563, 647, 33346, 17390, 6455, 0, + 10160, 6971, 6581, 647, 33470, 17481, 6473, 0, PCI_VENDOR_MOT, PCI_PRODUCT_MOT_FALCON, - 33362, 33369, 4504, 6455, 4575, 33373, 0, + 33486, 33493, 4504, 6473, 4575, 33497, 0, PCI_VENDOR_MOT, PCI_PRODUCT_MOT_HAWK, - 33377, 6, 4504, 6455, 647, 615, 6953, 6563, 0, + 33501, 6, 4504, 6473, 647, 615, 6971, 6581, 0, PCI_VENDOR_MOT, PCI_PRODUCT_MOT_MPC5200B, - 33382, 6953, 6563, 0, + 33506, 6971, 6581, 0, PCI_VENDOR_MOXA, PCI_PRODUCT_MOXA_CP102U, - 33391, 0, + 33515, 0, PCI_VENDOR_MOXA, PCI_PRODUCT_MOXA_C104H, - 33398, 0, + 33522, 0, PCI_VENDOR_MOXA, PCI_PRODUCT_MOXA_CP104, - 33404, 0, + 33528, 0, PCI_VENDOR_MOXA, PCI_PRODUCT_MOXA_CP104V2, - 33412, 0, + 33536, 0, PCI_VENDOR_MOXA, PCI_PRODUCT_MOXA_CP104EL, - 33420, 0, + 33544, 0, PCI_VENDOR_MOXA, PCI_PRODUCT_MOXA_CP114, - 33428, 0, + 33552, 0, PCI_VENDOR_MOXA, PCI_PRODUCT_MOXA_C168H, - 33434, 0, + 33558, 0, PCI_VENDOR_MOXA, PCI_PRODUCT_MOXA_C168U, - 33440, 0, + 33564, 0, PCI_VENDOR_MOXA, PCI_PRODUCT_MOXA_C168EL, - 33446, 0, + 33570, 0, PCI_VENDOR_MOXA, PCI_PRODUCT_MOXA_C168ELA, - 33446, 11222, 0, + 33570, 11337, 0, PCI_VENDOR_MUTECH, PCI_PRODUCT_MUTECH_MV1000, - 33453, 0, + 33577, 0, PCI_VENDOR_MYLEX, PCI_PRODUCT_MYLEX_RAID_V2, - 33460, 6450, 33467, 17574, 0, + 33584, 6468, 33591, 17658, 0, PCI_VENDOR_MYLEX, PCI_PRODUCT_MYLEX_RAID_V3, - 33460, 6450, 33471, 17574, 0, + 33584, 6468, 33595, 17658, 0, PCI_VENDOR_MYLEX, PCI_PRODUCT_MYLEX_RAID_V4, - 33460, 6450, 33475, 17574, 0, + 33584, 6468, 33599, 17658, 0, PCI_VENDOR_MYLEX, PCI_PRODUCT_MYLEX_RAID_V5, - 33460, 6450, 33479, 17574, 0, + 33584, 6468, 33603, 17658, 0, PCI_VENDOR_MYLEX, PCI_PRODUCT_MYLEX_EXTREMERAID_3000, - 33483, 13829, 0, + 33607, 13939, 0, PCI_VENDOR_MYLEX, PCI_PRODUCT_MYLEX_EXTREMERAID_2000, - 33483, 1319, 0, + 33607, 1319, 0, PCI_VENDOR_MYLEX, PCI_PRODUCT_MYLEX_ACCELERAID, - 33495, 33506, 0, + 33619, 33630, 0, PCI_VENDOR_MYLEX, PCI_PRODUCT_MYLEX_ACCELERAID_170, - 33495, 33510, 0, + 33619, 33634, 0, PCI_VENDOR_MYLEX, PCI_PRODUCT_MYLEX_ACCELERAID_160, - 33495, 33514, 0, + 33619, 33638, 0, PCI_VENDOR_MYLEX, PCI_PRODUCT_MYLEX_EXTREMERAID1100, - 33483, 33518, 0, + 33607, 33642, 0, PCI_VENDOR_MYLEX, PCI_PRODUCT_MYLEX_EXTREMERAID, - 33483, 33523, 0, + 33607, 33647, 0, PCI_VENDOR_MYRICOM, PCI_PRODUCT_MYRICOM_MYRINET, - 14748, 0, + 14844, 0, PCI_VENDOR_MYSON, PCI_PRODUCT_MYSON_MTD803, - 33533, 33540, 2430, 5717, 6455, 0, + 33657, 33664, 2430, 5735, 6473, 0, PCI_VENDOR_NCUBE, PCI_PRODUCT_NCUBE_TG3648, - 33547, 33555, 24703, 5709, 5717, 0, + 33671, 33679, 24799, 5727, 5735, 0, PCI_VENDOR_NDC, PCI_PRODUCT_NDC_NCP130, - 33563, 4761, 22551, 0, + 33687, 4761, 22647, 0, PCI_VENDOR_NDC, PCI_PRODUCT_NDC_NCP130A2, - 33563, 9582, 30718, 4761, 22551, 0, + 33687, 9678, 30794, 4761, 22647, 0, PCI_VENDOR_NETOCTAVE, PCI_PRODUCT_NETOCTAVE_NSP2K, - 33570, 0, + 33694, 0, PCI_VENDOR_NETBOOST, PCI_PRODUCT_NETBOOST_POLICY, - 33576, 7847, 0, + 33700, 7880, 0, PCI_VENDOR_NETLOGIC, PCI_PRODUCT_NETLOGIC_XLP_SBC, - 33583, 6, 6563, 17722, 0, + 33707, 6, 6581, 17806, 0, PCI_VENDOR_NETLOGIC, PCI_PRODUCT_NETLOGIC_XLP_ICI, - 33583, 33587, 33598, 0, + 33707, 33711, 33722, 0, PCI_VENDOR_NETLOGIC, PCI_PRODUCT_NETLOGIC_XLP_PIC, - 33583, 25962, 17390, 17722, 0, + 33707, 26058, 17481, 17806, 0, PCI_VENDOR_NETLOGIC, PCI_PRODUCT_NETLOGIC_XLP_PCIROOT, - 33583, 33611, 33623, 6788, 0, + 33707, 33735, 33747, 6806, 0, PCI_VENDOR_NETLOGIC, PCI_PRODUCT_NETLOGIC_XLP_INTERLAKEN, - 33583, 33644, 33655, 33658, 0, + 33707, 33768, 33779, 33782, 0, PCI_VENDOR_NETLOGIC, PCI_PRODUCT_NETLOGIC_XLP_DEVUSB, - 33583, 2418, 6945, 17722, 0, + 33707, 2418, 6963, 17806, 0, PCI_VENDOR_NETLOGIC, PCI_PRODUCT_NETLOGIC_XLP_EHCIUSB, - 33583, 8727, 6945, 17722, 0, + 33707, 8760, 6963, 17806, 0, PCI_VENDOR_NETLOGIC, PCI_PRODUCT_NETLOGIC_XLP_OHCIUSB, - 33583, 8722, 6945, 17722, 0, + 33707, 8755, 6963, 17806, 0, PCI_VENDOR_NETLOGIC, PCI_PRODUCT_NETLOGIC_XLP_NAE, - 33583, 3879, 33668, 33681, 0, + 33707, 3879, 33792, 33805, 0, PCI_VENDOR_NETLOGIC, PCI_PRODUCT_NETLOGIC_XLP_POE, - 33583, 4478, 33688, 33681, 0, + 33707, 4478, 33812, 33805, 0, PCI_VENDOR_NETLOGIC, PCI_PRODUCT_NETLOGIC_XLP_FMN, - 33583, 2430, 33697, 3879, 0, + 33707, 2430, 33821, 3879, 0, PCI_VENDOR_NETLOGIC, PCI_PRODUCT_NETLOGIC_XLP_DMA, - 33583, 490, 33707, 558, 6450, 33681, 0, + 33707, 490, 33831, 558, 6468, 33805, 0, PCI_VENDOR_NETLOGIC, PCI_PRODUCT_NETLOGIC_XLP_SAE, - 33583, 8509, 33716, 0, + 33707, 8542, 33840, 0, PCI_VENDOR_NETLOGIC, PCI_PRODUCT_NETLOGIC_XLP_PKE, - 33583, 33728, 33716, 0, + 33707, 33852, 33840, 0, PCI_VENDOR_NETLOGIC, PCI_PRODUCT_NETLOGIC_XLP_CDE, - 33583, 33736, 33681, 0, + 33707, 33860, 33805, 0, PCI_VENDOR_NETLOGIC, PCI_PRODUCT_NETLOGIC_XLP_UART, - 33583, 7983, 17722, 0, + 33707, 8016, 17806, 0, PCI_VENDOR_NETLOGIC, PCI_PRODUCT_NETLOGIC_XLP_I2C, - 33583, 17453, 17722, 0, + 33707, 17544, 17806, 0, PCI_VENDOR_NETLOGIC, PCI_PRODUCT_NETLOGIC_XLP_GPIO, - 33583, 17400, 17722, 0, + 33707, 17491, 17806, 0, PCI_VENDOR_NETLOGIC, PCI_PRODUCT_NETLOGIC_XLP_SYSTEM, - 33583, 6, 17722, 0, + 33707, 6, 17806, 0, PCI_VENDOR_NETLOGIC, PCI_PRODUCT_NETLOGIC_XLP_JTAG, - 33583, 33759, 33658, 0, + 33707, 33883, 33782, 0, PCI_VENDOR_NETLOGIC, PCI_PRODUCT_NETLOGIC_XLP_NOR, - 33583, 33764, 33768, 17722, 0, + 33707, 33888, 33892, 17806, 0, PCI_VENDOR_NETLOGIC, PCI_PRODUCT_NETLOGIC_XLP_NAND, - 33583, 33774, 33768, 17722, 0, + 33707, 33898, 33892, 17806, 0, PCI_VENDOR_NETLOGIC, PCI_PRODUCT_NETLOGIC_XLP_SPI, - 33583, 17409, 17722, 0, + 33707, 17500, 17806, 0, PCI_VENDOR_NETLOGIC, PCI_PRODUCT_NETLOGIC_XLP_SDHC, - 33583, 33779, 17722, 0, + 33707, 33903, 17806, 0, PCI_VENDOR_NETLOGIC, PCI_PRODUCT_NETLOGIC_XLP_RXE, - 33583, 33792, 33800, 33716, 0, + 33707, 33916, 33924, 33840, 0, PCI_VENDOR_NETLOGIC, PCI_PRODUCT_NETLOGIC_XLP_AHCISATA, - 33583, 8775, 8762, 17722, 0, + 33707, 8819, 8800, 17806, 0, PCI_VENDOR_NETLOGIC, PCI_PRODUCT_NETLOGIC_XLP_SRIO, - 33583, 33811, 17714, 33816, 33822, 17722, 0, + 33707, 33935, 17798, 33940, 33946, 17806, 0, PCI_VENDOR_NETVIN, PCI_PRODUCT_NETVIN_5000, - 14367, 5717, 0, + 14472, 5735, 0, PCI_VENDOR_NEWBRIDGE, PCI_PRODUCT_NEWBRIDGE_CA91CX42, - 33826, 33835, 6563, 0, + 33950, 33959, 6581, 0, PCI_VENDOR_NEWBRIDGE, PCI_PRODUCT_NEWBRIDGE_CA91L826A, - 33839, 7596, 615, 6563, 0, + 33963, 7629, 615, 6581, 0, PCI_VENDOR_NEWBRIDGE, PCI_PRODUCT_NEWBRIDGE_TSI381, - 33845, 9831, 0, + 33969, 9927, 0, PCI_VENDOR_NEWBRIDGE, PCI_PRODUCT_NEWBRIDGE_PEB383, - 33852, 9831, 0, + 33976, 9927, 0, PCI_VENDOR_NEWBRIDGE, PCI_PRODUCT_NEWBRIDGE_CA91L8260, - 33859, 615, 6563, 0, + 33983, 615, 6581, 0, PCI_VENDOR_NEWBRIDGE, PCI_PRODUCT_NEWBRIDGE_CA91L8261, - 33859, 7596, 615, 6563, 0, + 33983, 7629, 615, 6581, 0, PCI_VENDOR_NATIONALINST, PCI_PRODUCT_NATIONALINST_MXI3, - 33869, 615, 33875, 0, + 33993, 615, 33999, 0, PCI_VENDOR_NS, PCI_PRODUCT_NS_DP83810, - 33884, 5819, 5717, 0, + 34008, 5837, 5735, 0, PCI_VENDOR_NS, PCI_PRODUCT_NS_PC87415, - 33892, 6626, 0, + 34016, 6644, 0, PCI_VENDOR_NS, PCI_PRODUCT_NS_PC87560, - 33900, 24376, 8945, 0, + 34024, 24472, 9041, 0, PCI_VENDOR_NS, PCI_PRODUCT_NS_USB, - 6945, 0, + 6963, 0, PCI_VENDOR_NS, PCI_PRODUCT_NS_DP83815, - 33906, 5819, 5717, 0, + 34030, 5837, 5735, 0, PCI_VENDOR_NS, PCI_PRODUCT_NS_DP83820, - 33914, 5732, 5717, 0, + 34038, 5750, 5735, 0, PCI_VENDOR_NS, PCI_PRODUCT_NS_CS5535_HB, - 33922, 6851, 6563, 0, + 34046, 6869, 6581, 0, PCI_VENDOR_NS, PCI_PRODUCT_NS_CS5535_ISA, - 33922, 6837, 6563, 0, + 34046, 6855, 6581, 0, PCI_VENDOR_NS, PCI_PRODUCT_NS_CS5535_IDE, - 33922, 6626, 6455, 0, + 34046, 6644, 6473, 0, PCI_VENDOR_NS, PCI_PRODUCT_NS_CS5535_AUDIO, - 33922, 7054, 6455, 0, + 34046, 7072, 6473, 0, PCI_VENDOR_NS, PCI_PRODUCT_NS_CS5535_USB, - 33922, 6945, 6953, 6455, 0, + 34046, 6963, 6971, 6473, 0, PCI_VENDOR_NS, PCI_PRODUCT_NS_CS5535_VIDEO, - 33922, 234, 6455, 0, + 34046, 234, 6473, 0, PCI_VENDOR_NS, PCI_PRODUCT_NS_SATURN, - 33929, 0, + 34053, 0, PCI_VENDOR_NS, PCI_PRODUCT_NS_SC1100_IDE, - 33936, 615, 6626, 0, + 34060, 615, 6644, 0, PCI_VENDOR_NS, PCI_PRODUCT_NS_SC1100_AUDIO, - 33936, 33943, 0, + 34060, 34067, 0, PCI_VENDOR_NS, PCI_PRODUCT_NS_SC1100_ISA, - 33936, 6837, 6563, 0, + 34060, 6855, 6581, 0, PCI_VENDOR_NS, PCI_PRODUCT_NS_SC1100_ACPI, - 33936, 33955, 0, + 34060, 34079, 0, PCI_VENDOR_NS, PCI_PRODUCT_NS_SC1100_XBUS, - 33936, 33964, 0, + 34060, 34088, 0, PCI_VENDOR_NS, PCI_PRODUCT_NS_NS87410, - 33970, 0, + 34094, 0, PCI_VENDOR_PHILIPS, PCI_PRODUCT_PHILIPS_SAA7130HL, - 33978, 615, 234, 24857, 6919, 0, + 34102, 615, 234, 24953, 6937, 0, PCI_VENDOR_PHILIPS, PCI_PRODUCT_PHILIPS_SAA7133HL, - 33988, 615, 33998, 24857, 6919, 0, + 34112, 615, 34122, 24953, 6937, 0, PCI_VENDOR_PHILIPS, PCI_PRODUCT_PHILIPS_SAA7134HL, - 34002, 615, 33998, 24857, 6919, 0, + 34126, 615, 34122, 24953, 6937, 0, PCI_VENDOR_PHILIPS, PCI_PRODUCT_PHILIPS_SAA7135HL, - 34012, 615, 33998, 24857, 6919, 0, + 34136, 615, 34122, 24953, 6937, 0, PCI_VENDOR_PHILIPS, PCI_PRODUCT_PHILIPS_SAA7146AH, - 34022, 615, 2446, 6563, 0, + 34146, 615, 2446, 6581, 0, PCI_VENDOR_PHISON, PCI_PRODUCT_PHISON_PS5000, - 34032, 0, + 34156, 0, PCI_VENDOR_PHISON, PCI_PRODUCT_PHISON_PS5016, - 34039, 0, + 34163, 0, PCI_VENDOR_PHISON, PCI_PRODUCT_PHISON_PS5021, - 34046, 0, + 34170, 0, PCI_VENDOR_PHISON, PCI_PRODUCT_PHISON_PS5026, - 34053, 0, + 34177, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_810, - 34060, 0, + 34184, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_820, - 34067, 0, + 34191, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_825, - 34074, 0, + 34198, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_815, - 34081, 0, + 34205, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_810AP, - 34088, 0, + 34212, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_860, - 34097, 0, + 34221, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_1510D, - 34104, 0, + 34228, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_896, - 34113, 0, + 34237, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_895, - 34120, 0, + 34244, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_885, - 34127, 0, + 34251, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_875, - 34134, 0, + 34258, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_1510, - 34145, 0, + 34269, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_895A, - 34153, 0, + 34277, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_875A, - 34161, 0, + 34285, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_MEGARAID_3516, - 9125, 34169, 0, + 9221, 34293, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_MEGARAID_3416, - 9125, 34177, 0, + 9221, 34301, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_MEGARAID_3508, - 9125, 34185, 0, + 9221, 34309, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_MEGARAID_3408, - 9125, 34193, 0, + 9221, 34317, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_MEGARAID_3504, - 9125, 34201, 0, + 9221, 34325, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_MEGARAID_3404, - 9125, 34209, 0, + 9221, 34333, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_1010, - 34217, 0, + 34341, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_1010_2, - 34217, 34225, 0, + 34341, 34349, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_1030, - 34233, 0, + 34357, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_1030ZC, - 34249, 0, + 34373, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_1035, - 34259, 0, + 34383, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_1035ZC, - 34267, 0, + 34391, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_SAS1064, - 34277, 0, + 34401, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_MEGARAID_32XX_1, - 9125, 34285, 0, + 9221, 34409, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_MEGARAID_32XX_2, - 9125, 34285, 0, + 9221, 34409, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_SAS1068, - 34298, 0, + 34422, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_SAS1068_2, - 34298, 0, + 34422, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_SAS1064E, - 34306, 0, + 34430, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_SAS1064E_2, - 34306, 0, + 34430, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_SAS1068E, - 34315, 0, + 34439, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_SAS1068E_2, - 34315, 0, + 34439, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_SAS1066E, - 34324, 0, + 34448, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_MEGARAID_2208, - 9125, 34333, 0, + 9221, 34457, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_SAS1064A, - 34341, 0, + 34465, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_MEGARAID_3108, - 9125, 34350, 0, + 9221, 34474, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_SAS1066, - 34358, 0, + 34482, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_MEGARAID_3008, - 9125, 34366, 0, + 9221, 34490, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_SAS1078, - 34374, 615, 0, + 34498, 615, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_SAS1078_PCIE, - 34374, 615, 4320, 0, + 34498, 615, 4320, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_SAS2116_1, - 34382, 0, + 34506, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_SAS2116_2, - 34382, 0, + 34506, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_SAS2308_3, - 34390, 0, + 34514, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_SAS2004, - 34398, 0, + 34522, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_SAS2008, - 34406, 0, + 34530, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_SAS2008_1, - 9125, 34406, 0, + 9221, 34530, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_SAS2108_3, - 34414, 0, + 34538, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_SAS2108_4, - 34414, 0, + 34538, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_SAS2108_5, - 34414, 0, + 34538, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_SAS2108_1, - 9125, 34414, 34422, 34429, 0, + 9221, 34538, 34546, 34553, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_SAS2108_2, - 9125, 34414, 34429, 0, + 9221, 34538, 34553, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_SAS1078DE, - 34434, 0, + 34558, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_SAS2208_1, - 34333, 0, + 34457, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_SAS2208_2, - 34333, 0, + 34457, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_SAS2208_3, - 34333, 0, + 34457, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_SAS2208_4, - 34333, 0, + 34457, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_SAS2208_5, - 34333, 0, + 34457, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_SAS2208_6, - 34333, 0, + 34457, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_SAS2308_1, - 34390, 0, + 34514, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_SAS2308_2, - 34390, 0, + 34514, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_875J, - 34444, 0, + 34568, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_SAS3108_1, - 34350, 0, + 34474, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_SAS3108_2, - 34350, 0, + 34474, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_SAS3108_3, - 34350, 0, + 34474, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_SAS3108_4, - 34350, 0, + 34474, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_SAS3004, - 34452, 0, + 34576, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_SAS3008, - 34366, 0, + 34490, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_SAS3516, - 34169, 0, + 34293, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_SAS3516_1, - 34169, 0, + 34293, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_SAS3416, - 34177, 0, + 34301, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_SAS3508, - 34185, 0, + 34309, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_SAS3508_1, - 34185, 0, + 34309, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_SAS3408, - 34193, 0, + 34317, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_SAS3504, - 34201, 0, + 34325, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_SAS3404, - 34209, 0, + 34333, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_SAS3324_1, - 34460, 0, + 34584, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_SAS3324_2, - 34460, 0, + 34584, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_SAS3324_3, - 34460, 0, + 34584, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_SAS3324_4, - 34460, 0, + 34584, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_SAS3324_5, - 34460, 0, + 34584, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_SAS3324_6, - 34460, 0, + 34584, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_SAS3324_7, - 34460, 0, + 34584, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_SAS3324_8, - 34460, 0, + 34584, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_SAS3324_9, - 34460, 0, + 34584, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_SAS3324_10, - 34460, 0, + 34584, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_MEGARAID_3316, - 34468, 0, + 34592, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_MEGARAID_3324, - 34460, 0, + 34584, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_MEGARAID_320X, - 289, 34476, 6670, 34485, 0, + 289, 34600, 6688, 34609, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_MEGARAID_320E, - 289, 34476, 6670, 34491, 0, + 289, 34600, 6688, 34615, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_MEGARAID_300X, - 289, 34476, 8762, 34497, 0, + 289, 34600, 8800, 34621, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_MEGARAID_SAS, - 9125, 6009, 0, + 9221, 6027, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_MEGARAID_VERDE_ZCR, - 9125, 34513, 34519, 0, + 9221, 34637, 34643, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_FC909, - 34523, 0, + 34647, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_FC909A, - 34529, 0, + 34653, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_FC929, - 34536, 0, + 34660, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_FC929_1, - 34536, 0, + 34660, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_FC919, - 34542, 0, + 34666, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_FC919_1, - 34542, 0, + 34666, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_FC929X, - 34548, 0, + 34672, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_FC919X, - 34555, 0, + 34679, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_FC949X, - 34562, 0, + 34686, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_FC939X, - 34569, 0, + 34693, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_FC949E, - 34576, 0, + 34700, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_PE_GNIC, - 4478, 4485, 34583, 5717, 0, + 4478, 4485, 34707, 5735, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_1030R, - 34589, 0, + 34713, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_MEGARAID_39XX_1, - 9125, 34598, 34610, 0, + 9221, 34722, 34734, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_MEGARAID_39XX_2, - 9125, 34610, 0, + 9221, 34734, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_MEGARAID_39XX_3, - 9125, 8379, 34610, 0, + 9221, 8412, 34734, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_MEGARAID_39XX_4, - 9125, 34598, 34610, 0, + 9221, 34722, 34734, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_MEGARAID_38XX_1, - 9125, 34598, 34618, 0, + 9221, 34722, 34742, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_MEGARAID_38XX_2, - 9125, 34618, 0, + 9221, 34742, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_MEGARAID_38XX_3, - 9125, 8379, 34618, 0, + 9221, 8412, 34742, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_MEGARAID_38XX_4, - 9125, 34598, 34618, 0, + 9221, 34722, 34742, 0, PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_PERC_4SC, - 7553, 34626, 0, + 7586, 34750, 0, PCI_VENDOR_PARALLELS, PCI_PRODUCT_PARALLELS_TOOLS, - 34631, 0, + 34755, 0, PCI_VENDOR_PARALLELS, PCI_PRODUCT_PARALLELS_VIDEO, 234, 0, PCI_VENDOR_PARALLELS, PCI_PRODUCT_PARALLELS_VIDEO2, - 234, 7596, 0, + 234, 7629, 0, PCI_VENDOR_NEC, PCI_PRODUCT_NEC_USB, - 6945, 6953, 6455, 0, + 6963, 6971, 6473, 0, PCI_VENDOR_NEC, PCI_PRODUCT_NEC_VRC4173_CARDU, - 34637, 34645, 27003, 0, + 34761, 34769, 27099, 0, PCI_VENDOR_NEC, PCI_PRODUCT_NEC_POWERVR2, - 34653, 34661, 0, + 34777, 34785, 0, PCI_VENDOR_NEC, PCI_PRODUCT_NEC_PD72872, - 34666, 20632, 20637, 6953, 6455, 0, + 34790, 20728, 20733, 6971, 6473, 0, PCI_VENDOR_NEC, PCI_PRODUCT_NEC_PKUGX001, - 34675, 32723, 5764, 0, + 34799, 32838, 5782, 0, PCI_VENDOR_NEC, PCI_PRODUCT_NEC_PKUGX008, - 34686, 0, + 34810, 0, PCI_VENDOR_NEC, PCI_PRODUCT_NEC_VRC4173_BCU, - 34637, 17871, 9186, 27003, 0, + 34761, 17955, 9282, 27099, 0, PCI_VENDOR_NEC, PCI_PRODUCT_NEC_VRC4173_AC97U, - 34637, 8872, 27003, 0, + 34761, 8968, 27099, 0, PCI_VENDOR_NEC, PCI_PRODUCT_NEC_PD72870, - 34697, 20632, 20637, 6953, 6455, 0, + 34821, 20728, 20733, 6971, 6473, 0, PCI_VENDOR_NEC, PCI_PRODUCT_NEC_PD72871, - 34706, 20632, 20637, 6953, 6455, 0, + 34830, 20728, 20733, 6971, 6473, 0, PCI_VENDOR_NEC, PCI_PRODUCT_NEC_PD720100A, - 10383, 6953, 6455, 0, + 10504, 6971, 6473, 0, PCI_VENDOR_NEC, PCI_PRODUCT_NEC_PD720400, - 34715, 615, 4320, 23005, 34725, 6563, 0, + 34839, 615, 4320, 23101, 34849, 6581, 0, PCI_VENDOR_NEC, PCI_PRODUCT_NEC_PD720200, - 5177, 932, 6945, 8265, 6953, 6455, 0, + 5177, 932, 6963, 8298, 6971, 6473, 0, PCI_VENDOR_NEC, PCI_PRODUCT_NEC_VA26D, - 34735, 7253, 8676, 34741, 0, + 34859, 7271, 8709, 34865, 0, PCI_VENDOR_NEC, PCI_PRODUCT_NEC_VERSALX, - 34735, 8676, 0, + 34859, 8709, 0, PCI_VENDOR_NEOMAGIC, PCI_PRODUCT_NEOMAGIC_NMMG2070, - 34747, 34758, 0, + 34871, 34882, 0, PCI_VENDOR_NEOMAGIC, PCI_PRODUCT_NEOMAGIC_NMMG128V, - 34747, 34765, 0, + 34871, 34889, 0, PCI_VENDOR_NEOMAGIC, PCI_PRODUCT_NEOMAGIC_NMMG128ZV, - 34747, 34770, 0, + 34871, 34894, 0, PCI_VENDOR_NEOMAGIC, PCI_PRODUCT_NEOMAGIC_NMMG2160, - 34747, 34776, 0, + 34871, 34900, 0, PCI_VENDOR_NEOMAGIC, PCI_PRODUCT_NEOMAGIC_NMMM256AV_VGA, - 34782, 34793, 8679, 0, + 34906, 34917, 8712, 0, PCI_VENDOR_NEOMAGIC, PCI_PRODUCT_NEOMAGIC_NMMM256ZX_VGA, - 34782, 34799, 8679, 0, + 34906, 34923, 8712, 0, PCI_VENDOR_NEOMAGIC, PCI_PRODUCT_NEOMAGIC_NMMM256XLP_AU, - 34782, 34805, 7054, 0, + 34906, 34929, 7072, 0, PCI_VENDOR_NEOMAGIC, PCI_PRODUCT_NEOMAGIC_NMMM256AV_AU, - 34782, 34793, 7054, 0, + 34906, 34917, 7072, 0, PCI_VENDOR_NEOMAGIC, PCI_PRODUCT_NEOMAGIC_NMMM256ZX_AU, - 34782, 34799, 7054, 0, + 34906, 34923, 7072, 0, PCI_VENDOR_NETCHIP, PCI_PRODUCT_NETCHIP_NET2280, - 34812, 6945, 2418, 6455, 0, + 34936, 6963, 2418, 6473, 0, PCI_VENDOR_NETCHIP, PCI_PRODUCT_NETCHIP_NET2282, - 34820, 6945, 2418, 6455, 0, + 34944, 6963, 2418, 6473, 0, PCI_VENDOR_NETGEAR, PCI_PRODUCT_NETGEAR_MA301, - 34828, 615, 20632, 7686, 0, + 34952, 615, 20728, 7719, 0, PCI_VENDOR_NETGEAR, PCI_PRODUCT_NETGEAR_GA620, - 34834, 7876, 5717, 0, + 34958, 7909, 5735, 0, PCI_VENDOR_NETGEAR, PCI_PRODUCT_NETGEAR_GA620T, - 34834, 7887, 5717, 0, + 34958, 7920, 5735, 0, PCI_VENDOR_NETMOS, PCI_PRODUCT_NETMOS_NM9805, - 34840, 34845, 8153, 0, + 34964, 34969, 8186, 0, PCI_VENDOR_NETMOS, PCI_PRODUCT_NETMOS_NM9815, - 11247, 34840, 34845, 8153, 0, + 11362, 34964, 34969, 8186, 0, PCI_VENDOR_NETMOS, PCI_PRODUCT_NETMOS_NM9820, - 6575, 7983, 0, + 6593, 8016, 0, PCI_VENDOR_NETMOS, PCI_PRODUCT_NETMOS_NM9835, - 11247, 7983, 558, 34840, 34845, 8153, 0, + 11362, 8016, 558, 34964, 34969, 8186, 0, PCI_VENDOR_NETMOS, PCI_PRODUCT_NETMOS_NM9845, - 19213, 7983, 558, 34840, 34845, 8153, 0, + 19291, 8016, 558, 34964, 34969, 8186, 0, PCI_VENDOR_NETMOS, PCI_PRODUCT_NETMOS_NM9855, - 34853, 19213, 7983, 558, 34840, 34845, 8153, 0, + 34977, 19291, 8016, 558, 34964, 34969, 8186, 0, PCI_VENDOR_NETMOS, PCI_PRODUCT_NETMOS_NM9865, - 34858, 19213, 7983, 558, 34840, 34845, 8153, 0, + 34982, 19291, 8016, 558, 34964, 34969, 8186, 0, PCI_VENDOR_NETMOS, PCI_PRODUCT_NETMOS_NM9900, - 6575, 21948, 7983, 0, + 6593, 22044, 8016, 0, PCI_VENDOR_NETMOS, PCI_PRODUCT_NETMOS_NM9901, - 11247, 21948, 7983, 0, + 11362, 22044, 8016, 0, PCI_VENDOR_NETMOS, PCI_PRODUCT_NETMOS_NM9904, - 19213, 21948, 7983, 0, + 19291, 22044, 8016, 0, PCI_VENDOR_NETMOS, PCI_PRODUCT_NETMOS_NM9912, - 11247, 21948, 7983, 558, 34840, 34845, 8153, 0, + 11362, 22044, 8016, 558, 34964, 34969, 8186, 0, PCI_VENDOR_NETMOS, PCI_PRODUCT_NETMOS_NM9922, - 11247, 21948, 7983, 0, + 11362, 22044, 8016, 0, PCI_VENDOR_NETMOS, PCI_PRODUCT_NETMOS_MCS9990, - 34863, 19213, 6945, 6964, 8153, 0, + 34987, 19291, 6963, 6982, 8186, 0, PCI_VENDOR_NETSEC, PCI_PRODUCT_NETSEC_7751, - 22879, 0, + 22975, 0, PCI_VENDOR_NETXEN, PCI_PRODUCT_NETXEN_NXB_10GXxR, - 34871, 0, + 34995, 0, PCI_VENDOR_NETXEN, PCI_PRODUCT_NETXEN_NXB_10GCX4, - 34882, 0, + 35006, 0, PCI_VENDOR_NETXEN, PCI_PRODUCT_NETXEN_NXB_4GCU, - 34893, 0, + 35017, 0, PCI_VENDOR_NETXEN, PCI_PRODUCT_NETXEN_NXB_IMEZ, - 34902, 8538, 0, + 35026, 8571, 0, PCI_VENDOR_NETXEN, PCI_PRODUCT_NETXEN_NXB_HMEZ, - 34907, 8538, 0, + 35031, 8571, 0, PCI_VENDOR_NETXEN, PCI_PRODUCT_NETXEN_NXB_IMEZ_2, - 34902, 8538, 34912, 0, + 35026, 8571, 35036, 0, PCI_VENDOR_NETXEN, PCI_PRODUCT_NETXEN_NXB_HMEZ_2, - 34907, 8538, 34912, 0, + 35031, 8571, 35036, 0, PCI_VENDOR_NETXEN, PCI_PRODUCT_NETXEN_NX3031, - 34917, 0, + 35041, 0, PCI_VENDOR_NEXGEN, PCI_PRODUCT_NEXGEN_NX82C501, - 34924, 6851, 6563, 0, + 35048, 6869, 6581, 0, PCI_VENDOR_NKK, PCI_PRODUCT_NKK_NDR4600, - 34933, 6851, 6563, 0, + 35057, 6869, 6581, 0, PCI_VENDOR_NORTEL, PCI_PRODUCT_NORTEL_BAYSTACK_21, - 34941, 24216, 34950, 6722, 34958, 0, + 35065, 24312, 35074, 6740, 35082, 0, PCI_VENDOR_NUMBER9, PCI_PRODUCT_NUMBER9_I128, - 34966, 0, + 35090, 0, PCI_VENDOR_NUMBER9, PCI_PRODUCT_NUMBER9_I128_2, - 34966, 7596, 0, + 35090, 7629, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_RIVATNT, - 34978, 34983, 0, + 35102, 35107, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_RIVATNT2, - 34978, 34987, 0, + 35102, 35111, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_RIVATNT2U, - 34978, 34987, 7147, 0, + 35102, 35111, 7165, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_VANTA, - 34992, 0, + 35116, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_RIVATNT2M64, - 34978, 34987, 26987, 34998, 0, + 35102, 35111, 27083, 35122, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP04_PCIB, - 35001, 6837, 6563, 0, + 35125, 6855, 6581, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP04_SMBUS, - 35001, 8962, 0, + 35125, 9058, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP04_IDE, - 35001, 6626, 0, + 35125, 6644, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP04_SATA, - 35001, 8762, 0, + 35125, 8800, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP04_LAN1, - 35001, 5717, 0, + 35125, 5735, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP04_LAN2, - 35001, 5717, 0, + 35125, 5735, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP04_SATA2, - 35001, 8762, 0, + 35125, 8800, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GEFORCE_6800U, - 35007, 12619, 7147, 0, + 35131, 12729, 7165, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GEFORCE_6800, - 35007, 12619, 0, + 35131, 12729, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GEFORCE_6800LE, - 35007, 12619, 10285, 0, + 35131, 12729, 10406, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GEFORCE_6800GT, - 35007, 12619, 13318, 0, + 35131, 12729, 13428, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE4_PCIB1, - 35015, 6837, 6563, 0, + 35139, 6855, 6581, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE4_PCIB2, - 35015, 6837, 6563, 0, + 35139, 6855, 6581, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE4_SMBUS, - 35015, 8962, 0, + 35139, 9058, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE4_ATA133, - 35015, 35023, 6626, 0, + 35139, 35147, 6644, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE4_SATA1, - 35015, 14833, 6446, 8136, 0, + 35139, 14929, 6464, 8169, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE4_SATA2, - 35015, 14833, 6446, 6411, 0, + 35139, 14929, 6464, 6429, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE4_LAN1, - 35015, 5717, 0, + 35139, 5735, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE4_LAN2, - 35015, 5717, 0, + 35139, 5735, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE4_AC, - 35015, 27586, 0, + 35139, 27682, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE4_USB, - 35015, 6945, 6953, 6455, 0, + 35139, 6963, 6971, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE4_USB2, - 35015, 10383, 6953, 6455, 0, + 35139, 10504, 6971, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE4_PCI, - 35015, 615, 6953, 6563, 0, + 35139, 615, 6971, 6581, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE4_PCIE, - 35015, 8204, 6953, 6563, 0, + 35139, 8237, 6971, 6581, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE4_MEM, - 35015, 4504, 6455, 0, + 35139, 4504, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE2_PCIB, - 35030, 6837, 6563, 0, + 35154, 6855, 6581, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE2_SMBUS, - 35030, 8962, 6455, 0, + 35154, 9058, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE2_ATA133, - 35030, 35023, 6626, 0, + 35154, 35147, 6644, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE2_LAN, - 35030, 5717, 0, + 35154, 5735, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE2_OHCI, - 35030, 6945, 6953, 6455, 0, + 35154, 6963, 6971, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE2_EHCI, - 35030, 10383, 6953, 6455, 0, + 35154, 10504, 6971, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE2_MCPT_AC, - 35030, 35038, 27586, 0, + 35154, 35162, 27682, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE2_MCPT_AP, - 35030, 35038, 7054, 811, 27003, 0, + 35154, 35162, 7072, 811, 27099, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE2_PPB, - 35030, 8791, 6563, 0, + 35154, 8887, 6581, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE2_FW, - 35030, 9235, 6455, 0, + 35154, 9331, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE2_400_PCIB, - 35030, 7147, 8771, 6837, 6563, 0, + 35154, 7165, 8836, 6855, 6581, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE2_400_SMBUS, - 35030, 7147, 8771, 8962, 6455, 0, + 35154, 7165, 8836, 9058, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE2_400_ATA133, - 35030, 7147, 8771, 35023, 6626, 0, + 35154, 7165, 8836, 35147, 6644, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE2_400_LAN1, - 35030, 7147, 8771, 5717, 0, + 35154, 7165, 8836, 5735, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE2_400_OHCI, - 35030, 7147, 8771, 6945, 6953, 6455, 0, + 35154, 7165, 8836, 6963, 6971, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE2_400_EHCI, - 35030, 7147, 8771, 10383, 6953, 6455, 0, + 35154, 7165, 8836, 10504, 6971, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE2_400_MCPT_AC, - 35030, 7147, 8771, 27586, 0, + 35154, 7165, 8836, 27682, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE2_400_PPB, - 35030, 7147, 8771, 8791, 6563, 0, + 35154, 7165, 8836, 8887, 6581, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE2_400_LAN2, - 35030, 7147, 8771, 5717, 0, + 35154, 7165, 8836, 5735, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE2_400_SATA, - 35030, 7147, 8771, 14833, 6446, 6455, 0, + 35154, 7165, 8836, 14929, 6464, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_ALADDINTNT2, - 35044, 34987, 0, + 35168, 35111, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE3_PCIB, - 35052, 6837, 6563, 0, + 35176, 6855, 6581, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE3_PCHB, - 35052, 6851, 6563, 0, + 35176, 6869, 6581, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE3_PPB2, - 35052, 8791, 0, + 35176, 8887, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE3_SMBUS, - 35052, 8962, 6455, 0, + 35176, 9058, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE3_ATA133, - 35052, 35023, 6626, 0, + 35176, 35147, 6644, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE3_LAN1, - 35052, 5717, 0, + 35176, 5735, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE3_OHCI, - 35052, 6945, 6953, 6455, 0, + 35176, 6963, 6971, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE3_EHCI, - 35052, 10383, 6953, 6455, 0, + 35176, 10504, 6971, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE3_MCPT_AC, - 35052, 35038, 27586, 0, + 35176, 35162, 27682, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE3_PPB, - 35052, 8791, 6563, 0, + 35176, 8887, 6581, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE3_LAN4, - 35052, 5717, 28103, 0, + 35176, 5735, 28199, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE3_250_PCIB, - 35052, 12382, 6837, 6563, 0, + 35176, 12492, 6855, 6581, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE3_250_PCHB, - 35052, 12382, 6851, 6563, 0, + 35176, 12492, 6869, 6581, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE3_250_AGP, - 35052, 12382, 8804, 0, + 35176, 12492, 8900, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE3_250_SATA, - 35052, 12382, 14833, 6446, 6455, 0, + 35176, 12492, 14929, 6464, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE3_250_SMBUS, - 35052, 12382, 8962, 6455, 0, + 35176, 12492, 9058, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE3_250_ATA133, - 35052, 12382, 35023, 6626, 0, + 35176, 12492, 35147, 6644, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE3_250_LAN, - 35052, 12382, 5717, 0, + 35176, 12492, 5735, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE3_250_OHCI, - 35052, 12382, 6945, 6953, 6455, 0, + 35176, 12492, 6963, 6971, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE3_250_EHCI, - 35052, 12382, 10383, 6953, 6455, 0, + 35176, 12492, 10504, 6971, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE3_250_MCPT_AC, - 35052, 12382, 35038, 27586, 0, + 35176, 12492, 35162, 27682, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE3_250_PPB, - 35052, 12382, 8791, 6563, 0, + 35176, 12492, 8887, 6581, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE3_250_SATA2, - 35052, 12382, 14833, 6446, 6455, 0, + 35176, 12492, 14929, 6464, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADROFX3400, - 35060, 35067, 13779, 0, + 35184, 35191, 13889, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO4_280NVS2, - 35070, 11994, 35078, 0, + 35194, 12104, 35202, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADROFX1300, - 35060, 35067, 35082, 0, + 35184, 35191, 35206, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GEFORCEPCX4300, - 35007, 35087, 35091, 0, + 35131, 35211, 35215, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GEFORCE256, - 35007, 35096, 0, + 35131, 35220, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GEFORCEDDR, - 35007, 30852, 0, + 35131, 30938, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO, - 35060, 0, + 35184, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GEFORCE2MX, - 35100, 35109, 0, + 35224, 35233, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GEFORCE2MX200, - 35100, 35109, 35112, 0, + 35224, 35233, 35236, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GEFORCE2GO, - 35100, 35120, 0, + 35224, 35244, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO2_MXR, - 35123, 35131, 0, + 35247, 35255, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GEFORCE6600GT, - 35007, 35138, 13318, 0, + 35131, 35262, 13428, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GEFORCE6600, - 35007, 35138, 0, + 35131, 35262, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GEFORCE6600_2, - 35007, 35138, 0, + 35131, 35262, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GEFORCE6600GO, - 35007, 35138, 35120, 0, + 35131, 35262, 35244, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GEFORCE6610XL, - 35007, 35143, 5807, 0, + 35131, 35267, 5825, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GEFORCE6600GO_2, - 35007, 35138, 35120, 0, + 35131, 35262, 35244, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADROFX5500, - 35060, 35067, 26799, 0, + 35184, 35191, 26895, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADROFX540, - 35060, 35067, 35148, 0, + 35184, 35191, 35272, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GEFORCE6200, - 35007, 29631, 0, + 35131, 29713, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GEFORCE2, - 35100, 35152, 0, + 35224, 35276, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GEFORCE2DDR, - 35100, 35152, 35156, 0, + 35224, 35276, 35280, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GEFORCE2BR, - 35100, 35152, 0, + 35224, 35276, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO2, - 35123, 0, + 35247, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GEFORCE6200TC, - 35007, 35162, 0, + 35131, 35286, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GEFORCE6200LE, - 35007, 35169, 0, + 35131, 35293, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GEFORCE4_MX460, - 35176, 35109, 35185, 0, + 35300, 35233, 35309, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GEFORCE4_MX440, - 35176, 35109, 35189, 0, + 35300, 35233, 35313, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GEFORCE4_MX420, - 35176, 35109, 35193, 0, + 35300, 35233, 35317, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF4_MX440_SE, - 35176, 35109, 35189, 35197, 0, + 35300, 35233, 35313, 35321, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF4_MX440_GO, - 35176, 35109, 35189, 35120, 0, + 35300, 35233, 35313, 35244, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO4_500XGL, - 35070, 35200, 0, + 35194, 35324, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO4_200NVS, - 35070, 35207, 0, + 35194, 35331, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF4_MX440_8X, - 35176, 35109, 35189, 35218, 0, + 35300, 35233, 35313, 35342, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF4_MX440_SE_8X, - 35176, 35109, 35189, 35197, 35218, 0, + 35300, 35233, 35313, 35321, 35342, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF4_MX420_8X, - 35176, 35109, 35193, 35218, 0, + 35300, 35233, 35317, 35342, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO4_580XGL, - 35070, 13090, 35226, 0, + 35194, 13200, 35350, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO4_280NVS, - 35070, 11994, 35078, 0, + 35194, 12104, 35202, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO4_380XGL, - 35070, 35230, 35226, 0, + 35194, 35354, 35350, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADROFX4600, - 35060, 35067, 13577, 0, + 35184, 35191, 13687, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GEFORCE2_IGP, - 35100, 692, 8396, 0, + 35224, 692, 8429, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE_PCHB, - 35234, 615, 6953, 0, + 35358, 615, 6971, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE_DDR2, - 35234, 12895, 30852, 0, + 35358, 13005, 30938, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE_DDR, - 35234, 35193, 30852, 0, + 35358, 35317, 30938, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE_MEM, - 35234, 35241, 0, + 35358, 35365, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE_MEM1, - 35234, 35241, 0, + 35358, 35365, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE_APU, - 35234, 7054, 811, 27003, 0, + 35358, 7072, 811, 27099, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE_MCP_AC, - 35234, 35249, 27586, 0, + 35358, 35373, 27682, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE_ISA, - 35234, 23031, 0, + 35358, 23127, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_XBOX_SMBUS, - 35253, 35234, 8962, 6455, 0, + 35377, 35358, 9058, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE_AGP, - 35234, 8804, 0, + 35358, 8900, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE_PPB, - 35234, 8791, 6563, 0, + 35358, 8887, 6581, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE_ATA100, - 35234, 35258, 6626, 0, + 35358, 35382, 6644, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE_USB, - 35234, 6945, 0, + 35358, 6963, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE_LAN, - 35234, 5717, 0, + 35358, 5735, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GEFORCE_7300LE, - 35007, 12860, 10285, 0, + 35131, 12970, 10406, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE2_PCHB, - 35030, 6851, 6563, 0, + 35154, 6869, 6581, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE2_PPB2, - 35030, 8791, 6563, 0, + 35154, 8887, 6581, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE2_MEM1, - 35030, 4504, 6455, 0, + 35154, 4504, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE2_MEM2, - 35030, 4504, 6455, 0, + 35154, 4504, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE2_MEM3, - 35030, 4504, 6455, 0, + 35154, 4504, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE2_MEM4, - 35030, 4504, 6455, 0, + 35154, 4504, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE2_MEM5, - 35030, 4504, 6455, 0, + 35154, 4504, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF4_MX_IGP, - 35176, 35109, 692, 8396, 0, + 35300, 35233, 692, 8429, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GEFORCE3, - 35265, 0, + 35389, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GEFORCE3_TI200, - 35265, 35274, 11274, 0, + 35389, 35398, 11389, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GEFORCE3_TI500, - 35265, 35274, 8780, 0, + 35389, 35398, 8840, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO_DCC, - 35060, 35277, 0, + 35184, 35401, 0, + PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GEFORCE_6200A, + 35131, 35405, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GEFORCE_6150, - 35007, 24270, 0, + 35131, 24366, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GEFORCE_6150LE, - 35007, 24270, 10285, 0, + 35131, 24366, 10406, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GEFORCE4_TI4600, - 35176, 35274, 13577, 0, + 35300, 35398, 13687, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GEFORCE4_TI4400, - 35176, 35274, 35281, 0, + 35300, 35398, 35411, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GEFORCE4_TI4200, - 35176, 35274, 13882, 0, + 35300, 35398, 13992, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO4_900XGL, - 35070, 35286, 0, + 35194, 35416, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO4_750XGL, - 35070, 35293, 0, + 35194, 35423, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO4_700XGL, - 35070, 35300, 0, + 35194, 35430, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE430_PCIB, - 35307, 6837, 6563, 0, + 35437, 6855, 6581, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE430_SMBUS, - 35307, 8962, 6455, 0, + 35437, 9058, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE430_ATA133, - 35307, 35023, 6626, 6455, 0, + 35437, 35147, 6644, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE430_SATA1, - 35307, 14833, 6446, 6455, 0, + 35437, 14929, 6464, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE430_SATA2, - 35307, 14833, 6446, 6455, 0, + 35437, 14929, 6464, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE430_LAN1, - 35307, 5709, 5717, 6455, 0, + 35437, 5727, 5735, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE430_LAN2, - 35307, 5709, 5717, 6455, 0, + 35437, 5727, 5735, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE430_AC, - 35307, 27586, 7054, 6455, 0, + 35437, 27682, 7072, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE430_HDA, - 35307, 28076, 28081, 7054, 6455, 0, + 35437, 28172, 28177, 7072, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE430_OHCI, - 35307, 6945, 6455, 0, + 35437, 6963, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE430_EHCI, - 35307, 10383, 6455, 0, + 35437, 10504, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE430_PPB, - 35307, 8791, 6563, 0, + 35437, 8887, 6581, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE430_HB, - 35307, 6953, 6563, 0, + 35437, 6971, 6581, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NFORCE430_MC, - 35307, 4504, 6455, 0, + 35437, 4504, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_C51_MC2, - 35317, 4504, 6455, 6411, 0, + 35447, 4504, 6473, 6429, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_C51_MC3, - 35317, 4504, 6455, 6422, 0, + 35447, 4504, 6473, 6440, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF4_TI_4800, - 35176, 35274, 35321, 0, + 35300, 35398, 35451, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF4_TI_4200_8X, - 35176, 35274, 13882, 35218, 0, + 35300, 35398, 13992, 35342, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF4_TI_4800_SE, - 35176, 35274, 35321, 35197, 0, + 35300, 35398, 35451, 35321, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF4_TI_4200_GO, - 35176, 35274, 13882, 35120, 8804, 35326, 0, + 35300, 35398, 13992, 35244, 8900, 35456, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO4_980_XGL, - 35070, 35329, 35226, 0, + 35194, 35459, 35350, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO4_780_XGL, - 35070, 35333, 35226, 0, + 35194, 35463, 35350, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO_FX_1500, - 35060, 35067, 35337, 0, + 35184, 35191, 35467, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_XBOXFB, - 35253, 35342, 35348, 0, + 35377, 35472, 35478, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_XBOX_PCHB, - 35253, 35234, 6851, 6563, 0, + 35377, 35358, 6869, 6581, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_C51_HB_02F0, - 35317, 6953, 6563, 35355, 0, + 35447, 6971, 6581, 35485, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_C51_HB_02F1, - 35317, 6953, 6563, 35364, 0, + 35447, 6971, 6581, 35494, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_C51_HB_02F2, - 35317, 6953, 6563, 35373, 0, + 35447, 6971, 6581, 35503, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_C51_HB_02F3, - 35317, 6953, 6563, 35382, 0, + 35447, 6971, 6581, 35512, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_C51_HB_02F4, - 35317, 6953, 6563, 35391, 0, + 35447, 6971, 6581, 35521, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_C51_HB_02F5, - 35317, 6953, 6563, 35400, 0, + 35447, 6971, 6581, 35530, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_C51_HB_02F6, - 35317, 6953, 6563, 35409, 0, + 35447, 6971, 6581, 35539, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_C51_HB_02F7, - 35317, 6953, 6563, 35418, 0, + 35447, 6971, 6581, 35548, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_C51_MC5, - 35317, 4504, 6455, 8138, 0, + 35447, 4504, 6473, 8171, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_C51_MC4, - 35317, 4504, 6455, 6786, 0, + 35447, 4504, 6473, 6804, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_C51_MC0, - 35317, 4504, 6455, 8134, 0, + 35447, 4504, 6473, 8167, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_C51_PPB_02FB, - 35317, 615, 4320, 6563, 35427, 0, + 35447, 615, 4320, 6581, 35557, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_C51_PPB_02FC, - 35317, 615, 4320, 6563, 35436, 0, + 35447, 615, 4320, 6581, 35566, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_C51_PPB_02FD, - 35317, 615, 4320, 6563, 35445, 0, + 35447, 615, 4320, 6581, 35575, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_C51_MC1, - 35317, 4504, 6455, 8136, 0, + 35447, 4504, 6473, 8169, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_C51_HB_02FF, - 35317, 6953, 6563, 35454, 0, + 35447, 6971, 6581, 35584, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GEFORCE_FX5800U, - 35007, 35067, 35463, 7147, 0, + 35131, 35191, 35593, 7165, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GEFORCE_FX5800, - 35007, 35067, 35463, 0, + 35131, 35191, 35593, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO_FX_2000, - 35060, 35067, 1319, 0, + 35184, 35191, 1319, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO_FX_1000, - 35060, 35067, 20323, 0, + 35184, 35191, 20401, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_FX5600U, - 35007, 35067, 13351, 7147, 0, + 35131, 35191, 13461, 7165, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_FX5600, - 35007, 35067, 13351, 0, + 35131, 35191, 13461, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_FX5600_SE, - 35007, 35067, 13351, 35197, 0, + 35131, 35191, 13461, 35321, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_FX5200U, - 35007, 35067, 35468, 7147, 0, + 35131, 35191, 35598, 7165, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_FX5200, - 35007, 35067, 35468, 0, + 35131, 35191, 35598, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_FX5200SE, - 35007, 35067, 35473, 0, + 35131, 35191, 35603, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_FXGO5200, - 35007, 35067, 35480, 0, + 35131, 35191, 35610, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO_FX_500, - 35060, 35067, 8780, 0, + 35184, 35191, 8840, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_FX5900U, - 35007, 35067, 35487, 7147, 0, + 35131, 35191, 35617, 7165, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_FX5900, - 35007, 35067, 35487, 0, + 35131, 35191, 35617, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_FX5900XT, - 35007, 35067, 35492, 0, + 35131, 35191, 35622, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_FX5950U, - 35007, 35067, 35499, 7147, 0, + 35131, 35191, 35629, 7165, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO_FX_3000, - 35060, 35067, 13829, 0, + 35184, 35191, 13939, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_FX5700_LE, - 35007, 35067, 14362, 10285, 0, + 35131, 35191, 14467, 10406, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP55_LPC1, - 35234, 35504, 8958, 6563, 0, + 35358, 35634, 9054, 6581, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP55_LPC2, - 35234, 35504, 8958, 6563, 0, + 35358, 35634, 9054, 6581, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP55_LPC3, - 35234, 35504, 8958, 6563, 0, + 35358, 35634, 9054, 6581, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP55_LPC4, - 35234, 35504, 8958, 6563, 0, + 35358, 35634, 9054, 6581, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP55_LPC5, - 35234, 35504, 8958, 6563, 0, + 35358, 35634, 9054, 6581, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP55_LPC6, - 35234, 35504, 8958, 6563, 0, + 35358, 35634, 9054, 6581, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP55_LPC7, - 35234, 35504, 8958, 6563, 0, + 35358, 35634, 9054, 6581, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP55_LPC8, - 35234, 35504, 8958, 6563, 0, + 35358, 35634, 9054, 6581, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP55_SMB, - 35234, 35504, 8962, 6455, 0, + 35358, 35634, 9058, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP55_MEM, - 35234, 35504, 4504, 6455, 0, + 35358, 35634, 4504, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP55_MEM2, - 35234, 35504, 4504, 6455, 0, + 35358, 35634, 4504, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP55_OHCI, - 35234, 35504, 8722, 6945, 6455, 0, + 35358, 35634, 8755, 6963, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP55_EHCI, - 35234, 35504, 8727, 6945, 6455, 0, + 35358, 35634, 8760, 6963, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP55_IDE, - 35234, 35504, 35023, 6626, 6455, 0, + 35358, 35634, 35147, 6644, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP55_PPB, - 35234, 35504, 8791, 6563, 0, + 35358, 35634, 8887, 6581, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP55_HDA, - 35234, 35504, 28076, 28081, 7054, 6455, 0, + 35358, 35634, 28172, 28177, 7072, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP55_LAN1, - 35234, 35504, 5709, 5717, 6455, 0, + 35358, 35634, 5727, 5735, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP55_LAN2, - 35234, 35504, 5709, 5717, 6455, 0, + 35358, 35634, 5727, 5735, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP55_PCIE, - 35234, 35504, 33611, 35510, 8153, 0, + 35358, 35634, 33735, 35640, 8186, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP55_PCIE2, - 35234, 35504, 33611, 35510, 8153, 0, + 35358, 35634, 33735, 35640, 8186, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP55_SATA, - 35234, 35504, 14833, 6446, 6455, 0, + 35358, 35634, 14929, 6464, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP55_SATA2, - 35234, 35504, 14833, 6446, 6455, 0, + 35358, 35634, 14929, 6464, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GO_7600, - 35007, 35120, 11828, 0, + 35131, 35244, 11938, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_6100_430, - 35007, 26809, 35234, 35514, 0, + 35131, 26905, 35358, 35644, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_6100_405, - 35007, 26809, 35234, 35518, 0, + 35131, 26905, 35358, 35648, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_7025_630A, - 35007, 35522, 35234, 35527, 0, + 35131, 35652, 35358, 35657, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP61_ISA, - 35234, 35532, 6837, 6563, 0, + 35358, 35662, 6855, 6581, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP61_HDA, - 35234, 35532, 28076, 28081, 7054, 6455, 0, + 35358, 35662, 28172, 28177, 7072, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP61_LAN1, - 35234, 35532, 5709, 5717, 6455, 0, + 35358, 35662, 5727, 5735, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP61_LAN2, - 35234, 35532, 5709, 5717, 6455, 0, + 35358, 35662, 5727, 5735, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP61_SATA, - 35234, 35532, 14833, 6446, 6455, 0, + 35358, 35662, 14929, 6464, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP61_PPB_1, - 35234, 35532, 8791, 6563, 0, + 35358, 35662, 8887, 6581, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP61_PPB_2, - 35234, 35532, 8791, 6563, 0, + 35358, 35662, 8887, 6581, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP61_MEM, - 35234, 35532, 4504, 6455, 0, + 35358, 35662, 4504, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP61_SMB, - 35234, 35532, 8962, 6455, 0, + 35358, 35662, 9058, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP61_IDE, - 35234, 35532, 35023, 6626, 6455, 0, + 35358, 35662, 35147, 6644, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP61_LAN3, - 35234, 35532, 5709, 5717, 6455, 0, + 35358, 35662, 5727, 5735, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP61_LAN4, - 35234, 35532, 5709, 5717, 6455, 0, + 35358, 35662, 5727, 5735, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP61_HDA2, - 35234, 35532, 28076, 28081, 7054, 6455, 0, + 35358, 35662, 28172, 28177, 7072, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP61_OHCI, - 35234, 35532, 8722, 6945, 6455, 0, + 35358, 35662, 8755, 6963, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP61_EHCI, - 35234, 35532, 8727, 6945, 6455, 0, + 35358, 35662, 8760, 6963, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP61_PCI, - 35234, 35532, 8791, 6563, 0, + 35358, 35662, 8887, 6581, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP61_SMC, - 35234, 35532, 6, 7078, 6455, 0, + 35358, 35662, 6, 7096, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP61_MEM2, - 35234, 35532, 4504, 6455, 0, + 35358, 35662, 4504, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP61_SATA2, - 35234, 35532, 14833, 6446, 6455, 0, + 35358, 35662, 14929, 6464, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP61_SATA3, - 35234, 35532, 14833, 6446, 6455, 0, + 35358, 35662, 14929, 6464, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GEFORCE_8600GTS, - 35007, 35538, 35152, 0, + 35131, 35668, 35276, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GEFORCE_8600GT, - 35007, 35538, 13318, 0, + 35131, 35668, 13428, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_8500_GT, - 35007, 10306, 13318, 0, + 35131, 10427, 13428, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_8400M_GS, - 35007, 35543, 35549, 0, + 35131, 35673, 35679, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO_NVS140M, - 35060, 35078, 35552, 0, + 35184, 35202, 35682, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_ISA, - 35234, 35557, 6837, 6563, 0, + 35358, 35687, 6855, 6581, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_LPC1, - 35234, 35557, 35563, 6563, 0, + 35358, 35687, 35693, 6581, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_LPC2, - 35234, 35557, 35563, 6563, 0, + 35358, 35687, 35693, 6581, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_LPC3, - 35234, 35557, 35563, 6563, 0, + 35358, 35687, 35693, 6581, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_MEM, - 35234, 35557, 4504, 6455, 0, + 35358, 35687, 4504, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_MEM2, - 35234, 35557, 4504, 6455, 0, + 35358, 35687, 4504, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_SMB, - 35234, 35557, 8962, 6455, 0, + 35358, 35687, 9058, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_SMU, - 35234, 35557, 6, 7078, 27003, 0, + 35358, 35687, 6, 7096, 27099, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_IDE, - 35234, 35557, 35023, 6626, 6455, 0, + 35358, 35687, 35147, 6644, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_PCI, - 35234, 35557, 615, 6563, 0, + 35358, 35687, 615, 6581, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_HDA_1, - 35234, 35557, 28076, 28081, 7054, 6455, 0, + 35358, 35687, 28172, 28177, 7072, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_HDA_2, - 35234, 35557, 28076, 28081, 7054, 6455, 0, + 35358, 35687, 28172, 28177, 7072, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_AHCI_1, - 35234, 35557, 8775, 6455, 0, + 35358, 35687, 8819, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_AHCI_2, - 35234, 35557, 8775, 6455, 0, + 35358, 35687, 8819, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_AHCI_3, - 35234, 35557, 8775, 6455, 0, + 35358, 35687, 8819, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_AHCI_4, - 35234, 35557, 8775, 6455, 0, + 35358, 35687, 8819, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_LAN1, - 35234, 35557, 5709, 5717, 6455, 0, + 35358, 35687, 5727, 5735, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_LAN2, - 35234, 35557, 5709, 5717, 6455, 0, + 35358, 35687, 5727, 5735, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_LAN3, - 35234, 35557, 5709, 5717, 6455, 0, + 35358, 35687, 5727, 5735, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_LAN4, - 35234, 35557, 5709, 5717, 6455, 0, + 35358, 35687, 5727, 5735, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_USB_1, - 35234, 35557, 6945, 6455, 0, + 35358, 35687, 6963, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_USB_2, - 35234, 35557, 6945, 6455, 0, + 35358, 35687, 6963, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_USB_3, - 35234, 35557, 6945, 6455, 0, + 35358, 35687, 6963, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_USB_4, - 35234, 35557, 6945, 6455, 0, + 35358, 35687, 6963, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_PPB_1, - 35234, 35557, 8791, 6563, 0, + 35358, 35687, 8887, 6581, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_PPB_2, - 35234, 35557, 8791, 6563, 0, + 35358, 35687, 8887, 6581, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_PPB_3, - 35234, 35557, 8791, 6563, 0, + 35358, 35687, 8887, 6581, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_SATA, - 35234, 35557, 14833, 6446, 6455, 0, + 35358, 35687, 14929, 6464, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_SATA2, - 35234, 35557, 14833, 6446, 6455, 0, + 35358, 35687, 14929, 6464, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_SATA3, - 35234, 35557, 14833, 6446, 6455, 0, + 35358, 35687, 14929, 6464, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_SATA4, - 35234, 35557, 14833, 6446, 6455, 0, + 35358, 35687, 14929, 6464, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP67_SMB, - 35234, 35571, 8962, 6455, 0, + 35358, 35701, 9058, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP67_LAN1, - 35234, 35571, 5709, 5717, 6455, 0, + 35358, 35701, 5727, 5735, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP67_LAN2, - 35234, 35571, 5709, 5717, 6455, 0, + 35358, 35701, 5727, 5735, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP67_LAN3, - 35234, 35571, 5709, 5717, 6455, 0, + 35358, 35701, 5727, 5735, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP67_LAN4, - 35234, 35571, 5709, 5717, 6455, 0, + 35358, 35701, 5727, 5735, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP67_SATA, - 35234, 35571, 14833, 6446, 6455, 0, + 35358, 35701, 14929, 6464, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP67_SATA2, - 35234, 35571, 14833, 6446, 6455, 0, + 35358, 35701, 14929, 6464, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP67_SATA3, - 35234, 35571, 14833, 6446, 6455, 0, + 35358, 35701, 14929, 6464, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP67_SATA4, - 35234, 35571, 14833, 6446, 6455, 0, + 35358, 35701, 14929, 6464, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP67_AHCI_1, - 35234, 35571, 8775, 6455, 0, + 35358, 35701, 8819, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP67_AHCI_2, - 35234, 35571, 8775, 6455, 0, + 35358, 35701, 8819, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP67_AHCI_3, - 35234, 35571, 8775, 6455, 0, + 35358, 35701, 8819, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP67_AHCI_4, - 35234, 35571, 8775, 6455, 0, + 35358, 35701, 8819, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP67_AHCI_5, - 35234, 35571, 8775, 6455, 0, + 35358, 35701, 8819, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP67_AHCI_6, - 35234, 35571, 8775, 6455, 0, + 35358, 35701, 8819, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP67_AHCI_7, - 35234, 35571, 8775, 6455, 0, + 35358, 35701, 8819, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP67_AHCI_8, - 35234, 35571, 8775, 6455, 0, + 35358, 35701, 8819, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP67_HDA_1, - 35234, 35571, 28076, 28081, 7054, 6455, 0, + 35358, 35701, 28172, 28177, 7072, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP67_HDA_2, - 35234, 35571, 28076, 28081, 7054, 6455, 0, + 35358, 35701, 28172, 28177, 7072, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP67_IDE, - 35234, 35571, 35023, 6626, 6455, 0, + 35358, 35701, 35147, 6644, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP73_IDE, - 35234, 35577, 35023, 6626, 6455, 0, + 35358, 35707, 35147, 6644, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GEFORCE_8800_GT, - 35007, 35583, 13318, 0, + 35131, 35713, 13428, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GEFORCE_9800_GT, - 35007, 10215, 13318, 0, + 35131, 10336, 13428, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GEFORCE_9600_GT, - 35007, 10232, 13318, 0, + 35131, 10353, 13428, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GEFORCE_9500_GT, - 35007, 10181, 13318, 0, + 35131, 10302, 13428, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_TESLA_M2050, - 35588, 35596, 35603, 0, + 35718, 35726, 35733, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GEFORCE_9300_GE_1, - 35007, 35610, 35615, 0, + 35131, 35740, 35745, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GEFORCE8400GS, - 35007, 13927, 35549, 0, + 35131, 14037, 35679, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GEFORCE9300M_GS, - 35007, 35618, 35549, 0, + 35131, 35748, 35679, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRONVS150, - 35060, 35078, 35624, 0, + 35184, 35202, 35754, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRONVS160, - 35060, 35078, 35629, 0, + 35184, 35202, 35759, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRONVS295, - 35060, 35078, 35634, 0, + 35184, 35202, 35764, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP78S_SMB, - 35234, 35638, 8962, 6455, 0, + 35358, 35768, 9058, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP77_IDE, - 35234, 35645, 35023, 6626, 6455, 0, + 35358, 35775, 35147, 6644, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP77_LAN1, - 35234, 35645, 5709, 5717, 6455, 0, + 35358, 35775, 5727, 5735, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP77_LAN2, - 35234, 35645, 5709, 5717, 6455, 0, + 35358, 35775, 5727, 5735, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP77_LAN3, - 35234, 35645, 5709, 5717, 6455, 0, + 35358, 35775, 5727, 5735, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP77_LAN4, - 35234, 35645, 5709, 5717, 6455, 0, + 35358, 35775, 5727, 5735, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP77_HDA_1, - 35234, 35645, 28076, 28081, 7054, 6455, 0, + 35358, 35775, 28172, 28177, 7072, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP77_HDA_2, - 35234, 35645, 28076, 28081, 7054, 6455, 0, + 35358, 35775, 28172, 28177, 7072, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP77_HDA_3, - 35234, 35645, 28076, 28081, 7054, 6455, 0, + 35358, 35775, 28172, 28177, 7072, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP77_HDA_4, - 35234, 35645, 28076, 28081, 7054, 6455, 0, + 35358, 35775, 28172, 28177, 7072, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP73_SMB, - 35234, 35577, 8962, 6455, 0, + 35358, 35707, 9058, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP73_LAN1, - 35234, 35577, 5709, 5717, 6455, 0, + 35358, 35707, 5727, 5735, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP73_LAN2, - 35234, 35577, 5709, 5717, 6455, 0, + 35358, 35707, 5727, 5735, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP73_LAN3, - 35234, 35577, 5709, 5717, 6455, 0, + 35358, 35707, 5727, 5735, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP73_LAN4, - 35234, 35577, 5709, 5717, 6455, 0, + 35358, 35707, 5727, 5735, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP73_AHCI_1, - 35234, 35577, 8775, 6455, 0, + 35358, 35707, 8819, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP73_AHCI_2, - 35234, 35577, 8775, 6455, 0, + 35358, 35707, 8819, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP73_AHCI_3, - 35234, 35577, 8775, 6455, 0, + 35358, 35707, 8819, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP73_AHCI_4, - 35234, 35577, 8775, 6455, 0, + 35358, 35707, 8819, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP73_AHCI_5, - 35234, 35577, 8775, 6455, 0, + 35358, 35707, 8819, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP73_AHCI_6, - 35234, 35577, 8775, 6455, 0, + 35358, 35707, 8819, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP73_AHCI_7, - 35234, 35577, 8775, 6455, 0, + 35358, 35707, 8819, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP73_AHCI_8, - 35234, 35577, 8775, 6455, 0, + 35358, 35707, 8819, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP73_AHCI_9, - 35234, 35577, 8775, 6455, 0, + 35358, 35707, 8819, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP73_AHCI_10, - 35234, 35577, 8775, 6455, 0, + 35358, 35707, 8819, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP73_AHCI_11, - 35234, 35577, 8775, 6455, 0, + 35358, 35707, 8819, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP73_AHCI_12, - 35234, 35577, 8775, 6455, 0, + 35358, 35707, 8819, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP73_HDA_1, - 35234, 35577, 28076, 28081, 7054, 6455, 0, + 35358, 35707, 28172, 28177, 7072, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP73_HDA_2, - 35234, 35577, 28076, 28081, 7054, 6455, 0, + 35358, 35707, 28172, 28177, 7072, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GEFORCE_9400M, - 35007, 35651, 0, + 35131, 35781, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GEFORCE_210, - 35007, 35657, 0, + 35131, 35787, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP79_SMB, - 35234, 35661, 8962, 6455, 0, + 35358, 35791, 9058, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP79_LAN1, - 35234, 35661, 5709, 5717, 6455, 0, + 35358, 35791, 5727, 5735, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP79_LAN2, - 35234, 35661, 5709, 5717, 6455, 0, + 35358, 35791, 5727, 5735, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP79_LAN3, - 35234, 35661, 5709, 5717, 6455, 0, + 35358, 35791, 5727, 5735, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP79_LAN4, - 35234, 35661, 5709, 5717, 6455, 0, + 35358, 35791, 5727, 5735, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP79_AHCI_1, - 35234, 35661, 8775, 6455, 0, + 35358, 35791, 8819, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP79_AHCI_2, - 35234, 35661, 8775, 6455, 0, + 35358, 35791, 8819, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP79_AHCI_3, - 35234, 35661, 8775, 6455, 0, + 35358, 35791, 8819, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP79_AHCI_4, - 35234, 35661, 8775, 6455, 0, + 35358, 35791, 8819, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP79_AHCI_5, - 35234, 35661, 8775, 6455, 0, + 35358, 35791, 8819, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP79_AHCI_6, - 35234, 35661, 8775, 6455, 0, + 35358, 35791, 8819, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP79_AHCI_7, - 35234, 35661, 8775, 6455, 0, + 35358, 35791, 8819, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP79_AHCI_8, - 35234, 35661, 8775, 6455, 0, + 35358, 35791, 8819, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP79_AHCI_9, - 35234, 35661, 8775, 6455, 0, + 35358, 35791, 8819, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP79_AHCI_10, - 35234, 35661, 8775, 6455, 0, + 35358, 35791, 8819, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP79_AHCI_11, - 35234, 35661, 8775, 6455, 0, + 35358, 35791, 8819, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP79_AHCI_12, - 35234, 35661, 8775, 6455, 0, + 35358, 35791, 8819, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP77_AHCI_1, - 35234, 35645, 8775, 6455, 0, + 35358, 35775, 8819, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP77_AHCI_2, - 35234, 35645, 8775, 6455, 0, + 35358, 35775, 8819, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP77_AHCI_3, - 35234, 35645, 8775, 6455, 0, + 35358, 35775, 8819, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP77_AHCI_4, - 35234, 35645, 8775, 6455, 0, + 35358, 35775, 8819, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP77_AHCI_5, - 35234, 35645, 8775, 6455, 0, + 35358, 35775, 8819, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP77_AHCI_6, - 35234, 35645, 8775, 6455, 0, + 35358, 35775, 8819, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP77_AHCI_7, - 35234, 35645, 8775, 6455, 0, + 35358, 35775, 8819, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP77_AHCI_8, - 35234, 35645, 8775, 6455, 0, + 35358, 35775, 8819, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP77_AHCI_9, - 35234, 35645, 8775, 6455, 0, + 35358, 35775, 8819, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP77_AHCI_10, - 35234, 35645, 8775, 6455, 0, + 35358, 35775, 8819, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP77_AHCI_11, - 35234, 35645, 8775, 6455, 0, + 35358, 35775, 8819, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP77_AHCI_12, - 35234, 35645, 8775, 6455, 0, + 35358, 35775, 8819, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GEFORCE_210_HDA, - 35007, 35657, 28076, 28081, 7054, 6455, 0, + 35131, 35787, 28172, 28177, 7072, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF100_HDA, - 35667, 8230, 7054, 0, + 35797, 8263, 7072, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF108_HDA, - 35673, 8230, 7054, 0, + 35803, 8263, 7072, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF116_HDA, - 35679, 8230, 7054, 0, + 35809, 8263, 7072, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_440, - 35007, 13318, 35189, 0, + 35131, 13428, 35313, 0, + PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GT630, + 35131, 13428, 29586, 0, + PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GT620, + 35131, 13428, 29595, 0, + PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GT730_4, + 35131, 13428, 30386, 0, + PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GT640_1, + 35131, 13428, 13149, 0, + PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GT640_2, + 35131, 13428, 13149, 0, + PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GT630_2, + 35131, 13428, 29586, 0, + PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX650, + 35131, 35815, 30738, 0, + PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GT740, + 35131, 13428, 35819, 0, + PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GT730_3, + 35131, 13428, 30386, 0, + PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GT755M, + 35131, 13428, 35823, 0, + PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GT640M_LE, + 35131, 13428, 35828, 10406, 0, + PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GT650M, + 35131, 13428, 35833, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GT640M, - 35007, 13318, 35685, 0, + 35131, 13428, 35828, 0, + PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GT640M_LE_2, + 35131, 13428, 35828, 10406, 0, + PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX660M, + 35131, 35815, 35838, 0, + PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GT650M_2, + 35131, 13428, 35833, 0, + PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GT640M_2, + 35131, 13428, 35828, 0, + PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GT645M, + 35131, 13428, 35843, 0, + PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GT740M_2, + 35131, 13428, 35848, 0, + PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX660M_2, + 35131, 35815, 35838, 0, + PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GT730M_2, + 35131, 13428, 35853, 0, + PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GT745M, + 35131, 13428, 35858, 0, + PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GT745M_2, + 35131, 13428, 35858, 0, + PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GT750M, + 35131, 13428, 35863, 0, + PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GT750M_2, + 35131, 13428, 35863, 0, + PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GT755M_2, + 35131, 13428, 35823, 0, + PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GT710A, + 35131, 35868, 0, + PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GRID_K340, + 35873, 35878, 0, + PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GRID_K1, + 35873, 35883, 0, + PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO_K420, + 35184, 35886, 0, + PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO_K1100M, + 35184, 35891, 0, + PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO_K500M, + 35184, 35898, 0, + PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO_K2000D, + 35184, 35904, 0, + PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO_K600, + 35184, 35911, 0, + PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO_K2000M, + 35184, 35916, 0, + PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO_K1000M, + 35184, 35923, 0, + PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO_NVS510, + 35202, 27050, 0, + PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO_K2000, + 35184, 35930, 0, + PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO_410, + 35184, 35936, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GT520, - 35007, 13318, 11472, 0, + 35131, 13428, 11587, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GEFORCE_510, - 35007, 26954, 0, + 35131, 27050, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GEFORCE_605, - 35007, 28920, 0, + 35131, 29022, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GT620, - 35007, 13318, 29513, 0, + 35131, 13428, 29595, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GT610, - 35007, 13318, 29500, 0, + 35131, 13428, 29582, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GT520M, - 35007, 13318, 35690, 0, + 35131, 13428, 35940, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GT520MX, - 35007, 13318, 35695, 0, + 35131, 13428, 35945, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GT520M2, - 35007, 13318, 35690, 0, + 35131, 13428, 35940, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GEFORCE_410M, - 35007, 35701, 0, + 35131, 35951, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GEFORCE_410M2, - 35007, 35701, 0, + 35131, 35951, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NVS_4200M, - 35007, 35078, 35706, 0, + 35131, 35202, 35956, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_NVS_4200M2, - 35007, 35078, 35706, 0, + 35131, 35202, 35956, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GEFORCE_610M, - 35007, 35712, 0, + 35131, 35962, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GEFORCE_610M2, - 35007, 35712, 0, + 35131, 35962, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GT610M, - 35007, 13318, 35712, 0, + 35131, 13428, 35962, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX680, - 35007, 35717, 35721, 0, + 35131, 35815, 35967, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX770, - 35007, 35717, 35725, 0, + 35131, 35815, 35971, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX560_Ti, - 35007, 35717, 35729, 35274, 0, + 35131, 35815, 35975, 35398, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX560, - 35007, 35717, 35729, 0, + 35131, 35815, 35975, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX560_TiOEM, - 35007, 35717, 35729, 35274, 11476, 0, + 35131, 35815, 35975, 35398, 11591, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX460_SEv2, - 35007, 35717, 35185, 35197, 24703, 0, + 35131, 35815, 35309, 35321, 24799, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX460_V2, - 35007, 35717, 35185, 24703, 0, + 35131, 35815, 35309, 24799, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX555, - 35007, 35717, 35733, 0, + 35131, 35815, 35979, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GT645_OEM, - 35007, 13318, 29521, 11476, 0, + 35131, 13428, 29603, 11591, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX560_SE, - 35007, 35717, 35729, 35197, 0, + 35131, 35815, 35975, 35321, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX570M, - 35007, 35717, 35737, 0, + 35131, 35815, 35983, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX580M, - 35007, 35717, 35742, 0, + 35131, 35815, 35988, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX680M, - 35007, 35717, 35747, 0, + 35131, 35815, 35993, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX670M, - 35007, 35717, 35752, 0, + 35131, 35815, 35998, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GT545_OEM, - 35007, 35717, 35757, 11476, 0, + 35131, 35815, 36003, 11591, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX545, - 35007, 35717, 35757, 0, + 35131, 35815, 36003, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF116, - 35007, 35717, 12196, 35274, 0, + 35131, 35815, 12306, 35398, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTS450_R2, - 35007, 35152, 35761, 35765, 6411, 0, + 35131, 35276, 36007, 36011, 6429, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GT550M, - 35007, 13318, 35770, 0, + 35131, 13428, 36016, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GT555M, - 35007, 13318, 35775, 0, + 35131, 13428, 36021, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GT635M, - 35007, 13318, 35775, 0, + 35131, 13428, 36021, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTS450_R3, - 35007, 35152, 35761, 35765, 6422, 0, + 35131, 35276, 36007, 36011, 6440, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GT640_OEM, - 35007, 13318, 13039, 11476, 0, + 35131, 13428, 13149, 11591, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GT550M_2, - 35007, 13318, 35775, 0, + 35131, 13428, 36021, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GT560M, - 35007, 13318, 35785, 0, + 35131, 13428, 36031, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GT635, - 35007, 13318, 35790, 0, + 35131, 13428, 36036, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GT710, - 35007, 13318, 35794, 0, + 35131, 13428, 36040, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GT640_R2, - 35007, 13318, 13039, 35798, 0, + 35131, 13428, 13149, 36044, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GT630_R2, - 35007, 13318, 29504, 35798, 0, + 35131, 13428, 29586, 36044, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GT720, - 35007, 13318, 35804, 0, + 35131, 13428, 36050, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GT730, - 35007, 13318, 30304, 0, + 35131, 13428, 30386, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GT720_2, - 35007, 13318, 35804, 0, + 35131, 13428, 36050, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GT710_2, - 35007, 13318, 35794, 0, + 35131, 13428, 36040, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GK208B, - 35808, 0, + 36054, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GT710_3, - 35007, 13318, 35794, 0, + 35131, 13428, 36040, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GK208B_2, - 35808, 0, + 36054, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GT730M, - 35007, 13318, 35815, 0, + 35131, 13428, 35853, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GT735M, - 35007, 13318, 35820, 0, + 35131, 13428, 36061, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GT740M, - 35007, 13318, 35825, 0, + 35131, 13428, 35848, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GT730M2, - 35007, 13318, 35815, 0, + 35131, 13428, 35853, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GT740M2, - 35007, 13318, 35825, 0, + 35131, 13428, 35848, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_710M, - 35007, 35830, 0, + 35131, 36066, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_825M, - 35007, 35835, 0, + 35131, 36071, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GT720M, - 35007, 13318, 35840, 0, + 35131, 13428, 36076, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_920M, - 35007, 35845, 0, + 35131, 36081, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_910M, - 35007, 35850, 0, + 35131, 36086, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO_K610M, - 35060, 35855, 0, + 35184, 36091, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO_K510M, - 35060, 35861, 0, + 35184, 36097, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_830M, - 35007, 35867, 0, + 35131, 36103, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_840M, - 35007, 35872, 0, + 35131, 36108, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_845M, - 35007, 35877, 0, + 35131, 36113, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_930M, - 35007, 35882, 0, + 35131, 36118, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_940M, - 35007, 35887, 0, + 35131, 36123, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_945MA, - 35007, 35892, 2173, 35897, 0, + 35131, 36128, 2173, 36133, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_930M_2, - 35007, 35882, 0, + 35131, 36118, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_940MX, - 35007, 35902, 0, + 35131, 36138, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_940MX_2, - 35007, 35902, 0, + 35131, 36138, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_930MX, - 35007, 35908, 0, + 35131, 36144, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_920MX, - 35007, 35914, 0, + 35131, 36150, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO_K620M, - 35060, 35920, 2173, 35060, 35926, 0, + 35184, 36156, 2173, 35184, 36162, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO_M520M, - 35060, 35932, 11578, 0, + 35184, 36168, 11693, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_940A, - 35007, 35937, 0, + 35131, 36173, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX750_Ti, - 35007, 35717, 24354, 35274, 0, + 35131, 35815, 24450, 35398, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX750, - 35007, 35717, 24354, 0, + 35131, 35815, 24450, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX745, - 35007, 35717, 35942, 0, + 35131, 35815, 36178, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX710, - 35007, 35717, 35942, 0, + 35131, 35815, 36178, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_845M_2, - 35007, 35877, 0, + 35131, 36113, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX850M, - 35007, 35717, 35946, 0, + 35131, 35815, 36182, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX860M, - 35007, 35717, 35951, 0, + 35131, 35815, 36187, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_840M_2, - 35007, 35872, 0, + 35131, 36108, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_845M_3, - 35007, 35877, 0, + 35131, 36113, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_945M, - 35007, 35892, 0, + 35131, 36128, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX950M, - 35007, 35717, 35956, 0, + 35131, 35815, 36192, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX960M, - 35007, 35717, 35961, 0, + 35131, 35815, 36197, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_940M_2, - 35007, 35887, 0, + 35131, 36123, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX750_Ti_2, - 35007, 35717, 24354, 35274, 0, + 35131, 35815, 24450, 35398, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO_M2000M, - 35060, 35966, 0, + 35184, 36202, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO_M1000M, - 35060, 35973, 0, + 35184, 36209, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO_M600M, - 35060, 35980, 0, + 35184, 36216, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO_K2200M, - 35060, 35986, 0, + 35184, 36222, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO_M620M, - 35060, 35993, 11578, 0, + 35184, 36229, 11693, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO_M1200M, - 35060, 35998, 11578, 0, + 35184, 36234, 11693, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO_NVS810, - 35078, 36004, 0, + 35202, 36240, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO_K2200, - 35060, 36008, 0, + 35184, 36244, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO_K620, - 35060, 36014, 0, + 35184, 36250, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO_K1200, - 35060, 36019, 0, + 35184, 36255, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO_M10, - 36025, 36031, 0, + 36261, 36267, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX980, - 35007, 35717, 35329, 0, + 35131, 35815, 35459, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX970, - 35007, 35717, 36035, 0, + 35131, 35815, 36271, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX980M, - 35007, 35717, 36039, 0, + 35131, 35815, 36275, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX970M, - 35007, 35717, 36044, 0, + 35131, 35815, 36280, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX965M, - 35007, 35717, 36049, 0, + 35131, 35815, 36285, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX980M2, - 35007, 35717, 35329, 11578, 0, + 35131, 35815, 35459, 11693, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO_M5000, - 35060, 36054, 0, + 35184, 36290, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO_M4000, - 35060, 12398, 0, + 35184, 12508, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_TESLA_M60, - 36025, 36060, 0, + 36261, 36296, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_TESLA_M6, - 36025, 10723, 0, + 36261, 10838, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO_M5000M, - 35060, 36064, 2173, 36054, 35197, 0, + 35184, 36300, 2173, 36290, 35321, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO_M4000M, - 35060, 36071, 0, + 35184, 36307, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO_M3000, - 35060, 36078, 0, + 35184, 36314, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO_M5500, - 35060, 36084, 0, + 35184, 36320, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX960, - 35007, 35717, 36090, 0, + 35131, 35815, 36326, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX950, - 35007, 35717, 36094, 0, + 35131, 35815, 36330, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX960_2, - 35007, 35717, 36090, 0, + 35131, 35815, 36326, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX750_2, - 35007, 35717, 24354, 0, + 35131, 35815, 24450, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX950_2, - 35007, 35717, 36094, 0, + 35131, 35815, 36330, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO_M2000, - 35060, 36098, 0, + 35184, 36334, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_TESLA_M4, - 36025, 36104, 0, + 36261, 36340, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO_M2200, - 35060, 36107, 0, + 35184, 36343, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO_GP100, - 35060, 36113, 0, + 35184, 36349, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_TESLA_12G, - 36025, 36119, 8204, 36124, 0, + 36261, 36355, 8237, 36360, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_TESLA_16G, - 36025, 36119, 8204, 36129, 0, + 36261, 36355, 8237, 36365, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_TESLA_16G_SXM2, - 36025, 36119, 36134, 36129, 0, + 36261, 36355, 36370, 36365, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX980M3, - 35007, 35717, 36049, 0, + 35131, 35815, 36285, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX970M2, - 35007, 35717, 36049, 0, + 35131, 35815, 36285, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX965M_2, - 35007, 35717, 36049, 0, + 35131, 35815, 36285, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX9804, - 35007, 35717, 35329, 0, + 35131, 35815, 35459, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX965M_3, - 35007, 35717, 36049, 0, + 35131, 35815, 36285, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_TITAN_X, - 35007, 36139, 36145, 0, + 35131, 36375, 36381, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX1080_TI, - 35007, 35717, 36147, 35274, 0, + 35131, 35815, 36383, 35398, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO_P6000, - 35060, 36152, 0, + 35184, 36388, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_TESLA_P40, - 36025, 36158, 0, + 36261, 36394, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX1080, - 35007, 35717, 36147, 0, + 35131, 35815, 36383, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX1070, - 35007, 35717, 36162, 0, + 35131, 35815, 36398, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX1060, - 35007, 35717, 36167, 36172, 0, + 35131, 35815, 36403, 36408, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX1080M, - 35007, 35717, 36147, 11578, 0, + 35131, 35815, 36383, 11693, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX1070M, - 35007, 35717, 36162, 11578, 0, + 35131, 35815, 36398, 11693, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO_P5000, - 35060, 36176, 0, + 35184, 36412, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_TESLA_P4, - 36025, 36182, 0, + 36261, 36418, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_TESLA_P6, - 36025, 36185, 0, + 36261, 36421, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO_P5000M, - 35060, 36176, 11578, 0, + 35184, 36412, 11693, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO_P4000M, - 35060, 36188, 11578, 0, + 35184, 36424, 11693, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO_P3000M, - 35060, 36194, 11578, 0, + 35184, 36430, 11693, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX1080M_2, - 35007, 35717, 36147, 11578, 0, + 35131, 35815, 36383, 11693, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX1070M_2, - 35007, 35717, 36162, 11578, 0, + 35131, 35815, 36398, 11693, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX1060_3, - 35007, 35717, 36167, 36172, 0, + 35131, 35815, 36403, 36408, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX1060_6, - 35007, 35717, 36167, 36200, 0, + 35131, 35815, 36403, 36436, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX1060M, - 35007, 35717, 36167, 11578, 0, + 35131, 35815, 36403, 11693, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX1060M_2, - 35007, 35717, 36167, 11578, 0, + 35131, 35815, 36403, 11693, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX1060_TiM, - 35007, 35717, 36167, 35274, 11578, 0, + 35131, 35815, 36403, 35398, 11693, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX1060_M, - 35007, 35717, 36167, 11578, 0, + 35131, 35815, 36403, 11693, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX1050_X, - 35007, 35717, 36204, 0, + 35131, 35815, 36440, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX1050_Ti, - 35007, 35717, 36204, 35274, 0, + 35131, 35815, 36440, 35398, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX1050_TiM, - 35007, 35717, 36204, 35274, 11578, 0, + 35131, 35815, 36440, 35398, 11693, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX1050_M, - 35007, 35717, 36204, 11578, 0, + 35131, 35815, 36440, 11693, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX1030, - 35007, 13318, 23725, 0, + 35131, 13428, 23821, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_MX150, - 35007, 36209, 0, + 35131, 36445, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_MX230, - 35007, 36215, 0, + 35131, 36451, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_MX150_2, - 35007, 36209, 0, + 35131, 36445, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_MX250, - 35007, 36221, 0, + 35131, 36457, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_MX330, - 35007, 36227, 0, + 35131, 36463, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO_P520M, - 35060, 36233, 11578, 0, + 35184, 36469, 11693, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO_P520, - 35060, 36238, 0, + 35184, 36474, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_MX250_2, - 35007, 36221, 0, + 35131, 36457, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_MX330_2, - 35007, 36227, 0, + 35131, 36463, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_TITAN_V, - 36243, 36139, 26765, 0, + 36479, 36375, 26861, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_TESLA_V100S16, - 36025, 22732, 36134, 36129, 0, + 36261, 22828, 36370, 36365, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_TESLA_V100D16, - 36025, 22732, 36249, 36129, 0, + 36261, 22828, 36485, 36365, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_TESLA_V100F16, - 36025, 22732, 36254, 36129, 0, + 36261, 22828, 36490, 36365, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_TESLA_V100P16, - 36025, 22732, 8204, 36129, 0, + 36261, 22828, 8237, 36365, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_TESLA_V100S32, - 36025, 22732, 36134, 36259, 0, + 36261, 22828, 36370, 36495, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_TESLA_V100P32, - 36025, 22732, 8204, 36259, 0, + 36261, 22828, 8237, 36495, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_TESLA_V100D32, - 36025, 22732, 36249, 36259, 0, + 36261, 22828, 36485, 36495, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_TESLA_V100S332, - 36025, 22732, 36264, 36259, 0, + 36261, 22828, 36500, 36495, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO_GV100, - 35060, 36243, 0, + 35184, 36479, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_TESLA_PG500216, - 36025, 36269, 0, + 36261, 36505, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_TESLA_PG503216, - 36025, 36279, 0, + 36261, 36515, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_TESLA_V100S216, - 36025, 22732, 36134, 36129, 0, + 36261, 22828, 36370, 36365, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_TESLA_V100SP32, - 36025, 36289, 8204, 36259, 0, + 36261, 36525, 8237, 36495, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_TITAN_RTX, - 36139, 36295, 0, + 36375, 36531, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX2080_Ti, - 35007, 35717, 36299, 35274, 0, + 35131, 35815, 36535, 35398, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX2080_Ti_2, - 35007, 35717, 36299, 35274, 0, + 35131, 35815, 36535, 35398, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX2080_Ti_3, - 35007, 35717, 36299, 35274, 0, + 35131, 35815, 36535, 35398, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO_RTX8000, - 35060, 36295, 36304, 2173, 26804, 0, + 35184, 36531, 36540, 2173, 26900, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO_RTX6000, - 35060, 36295, 26804, 0, + 35184, 36531, 26900, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GRID_RTXT104816, - 36309, 36295, 36314, 0, + 35873, 36531, 36545, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO_RTX60002, - 35060, 36295, 26804, 0, + 35184, 36531, 26900, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO_RTX80002, - 35060, 36295, 36333, 0, + 35184, 36531, 36564, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_RTX2080S, - 35007, 36295, 36299, 36343, 0, + 35131, 36531, 36535, 36574, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_RTX2080, - 35007, 36295, 36299, 0, + 35131, 36531, 36535, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_RTX2070S, - 35007, 36295, 36349, 36343, 0, + 35131, 36531, 36580, 36574, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_RTX2080_2, - 35007, 36295, 36299, 35765, 11222, 0, + 35131, 36531, 36535, 36011, 11337, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_RTX2060, - 35007, 36295, 36354, 0, + 35131, 36531, 36585, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_RTX2080_M, - 35007, 36295, 36299, 11578, 0, + 35131, 36531, 36535, 11693, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_RTX2070_SMMQ, - 35007, 36295, 36349, 36343, 11578, 2173, 36359, 0, + 35131, 36531, 36580, 36574, 11693, 2173, 36590, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_RTX2080_SMMQ, - 35007, 36295, 36299, 36343, 11578, 2173, 36359, 0, + 35131, 36531, 36535, 36574, 11693, 2173, 36590, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO_RTX5000, - 35060, 36295, 14367, 0, + 35184, 36531, 14472, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO_RTX4000, - 35060, 36295, 19105, 0, + 35184, 36531, 19183, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO_RTX5000S, - 35060, 36295, 14367, 11578, 2173, 36359, 0, + 35184, 36531, 14472, 11693, 2173, 36590, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO_RTX4000S, - 35060, 36295, 19105, 11578, 2173, 36359, 0, + 35184, 36531, 19183, 11693, 2173, 36590, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_TESLA_T4, - 36025, 36365, 0, + 36261, 36596, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_RTX2070S2, - 35007, 36295, 36349, 36343, 0, + 35131, 36531, 36580, 36574, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_RTX2070S3, - 35007, 36295, 36349, 36343, 0, + 35131, 36531, 36580, 36574, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_RTX2080M, - 35007, 36295, 36299, 11578, 0, + 35131, 36531, 36535, 11693, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_RTX2070SM, - 35007, 36295, 36349, 36343, 11578, 2173, 36359, 0, + 35131, 36531, 36580, 36574, 11693, 2173, 36590, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_RTX2080SM, - 35007, 36295, 36299, 36343, 11578, 2173, 36359, 0, + 35131, 36531, 36535, 36574, 11693, 2173, 36590, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_RTX2070, - 35007, 36295, 36349, 0, + 35131, 36531, 36580, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_RTX2060S, - 35007, 36295, 36354, 36343, 0, + 35131, 36531, 36585, 36574, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_RTX2070_2, - 35007, 36295, 36349, 35765, 11222, 0, + 35131, 36531, 36580, 36011, 11337, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_RTX2060_2, - 35007, 36295, 36354, 35765, 11222, 0, + 35131, 36531, 36585, 36011, 11337, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX1660S, - 35007, 35717, 36368, 36343, 0, + 35131, 35815, 36599, 36574, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX1650, - 35007, 35717, 36373, 0, + 35131, 35815, 36604, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_CMP_40HX, - 36378, 36382, 0, + 36609, 36613, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_RTX2070_M, - 35007, 36295, 36349, 11578, 0, + 35131, 36531, 36580, 11693, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_RTX2060_M, - 35007, 36295, 36354, 11578, 0, + 35131, 36531, 36585, 11693, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_RTX2060_MQ, - 35007, 36295, 36354, 36359, 0, + 35131, 36531, 36585, 36590, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_RTX2070_MMQ, - 35007, 36295, 36349, 11578, 2173, 36359, 29895, 0, + 35131, 36531, 36580, 11693, 2173, 36590, 29977, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_RTX2060_M2, - 35007, 36295, 36354, 11578, 0, + 35131, 36531, 36585, 11693, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO_RTX3000M, - 35060, 36295, 13829, 11578, 2173, 36359, 0, + 35184, 36531, 13939, 11693, 2173, 36590, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_RTX2060S_2, - 35007, 36295, 36354, 36343, 0, + 35131, 36531, 36585, 36574, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_RTX2060S_3, - 35007, 36295, 36354, 36343, 0, + 35131, 36531, 36585, 36574, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_RTX2070_M2, - 35007, 36295, 36349, 11578, 0, + 35131, 36531, 36580, 11693, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_RTX2060_M3, - 35007, 36295, 36354, 11578, 0, + 35131, 36531, 36585, 11693, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_RTX2070_M3, - 35007, 36295, 36349, 11578, 0, + 35131, 36531, 36580, 11693, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_RTX2060_M4, - 35007, 36295, 36354, 11578, 0, + 35131, 36531, 36585, 11693, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO_RTX3000MR, - 35060, 36295, 13829, 11578, 29895, 0, + 35184, 36531, 13939, 11693, 29977, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX1650_2, - 35007, 35717, 36373, 0, + 35131, 35815, 36604, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX1650_MMQ, - 35007, 35717, 36373, 11578, 2173, 36359, 0, + 35131, 35815, 36604, 11693, 2173, 36590, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX1650_M, - 35007, 35717, 36373, 11578, 0, + 35131, 35815, 36604, 11693, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX1650_M2, - 35007, 35717, 36373, 11578, 0, + 35131, 35815, 36604, 11693, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX1650_TiM, - 35007, 35717, 36373, 35274, 11578, 0, + 35131, 35815, 36604, 35398, 11693, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX1650_MMQ2, - 35007, 35717, 36373, 11578, 2173, 36359, 0, + 35131, 35815, 36604, 11693, 2173, 36590, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_MX450, - 35007, 36387, 0, + 35131, 36618, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_MX450_2, - 35007, 36387, 0, + 35131, 36618, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_MX450_3, - 35007, 36387, 0, + 35131, 36618, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX1650_MMQ3, - 35007, 35717, 36373, 11578, 2173, 36359, 0, + 35131, 35815, 36604, 11693, 2173, 36590, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO_T1000_M, - 35060, 36393, 11578, 0, + 35184, 36624, 11693, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO_T600, - 35060, 36399, 0, + 35184, 36630, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO_T400_M, - 35060, 36404, 11578, 0, + 35184, 36635, 11693, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO_T2000_M, - 35060, 36409, 11578, 2173, 36359, 0, + 35184, 36640, 11693, 2173, 36590, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO_T1000_M2, - 35060, 36393, 11578, 0, + 35184, 36624, 11693, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO_T600_M, - 35060, 36399, 11578, 0, + 35184, 36630, 11693, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO_T500_M, - 35060, 36415, 11578, 0, + 35184, 33340, 11693, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX1650_MR, - 35007, 35717, 36373, 11578, 29895, 0, + 35131, 35815, 36604, 11693, 29977, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX1650_MR2, - 35007, 35717, 36373, 11578, 29895, 0, + 35131, 35815, 36604, 11693, 29977, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_QUADRO_T1000_M3, - 35060, 36393, 11578, 0, + 35184, 36624, 11693, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_A100_S40, - 36420, 36425, 36430, 0, + 36646, 36651, 36656, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_A100_P40, - 36420, 8204, 36430, 0, + 36646, 8237, 36656, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_A100_S80, - 36420, 36425, 36435, 0, + 36646, 36651, 36661, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_A100_P80, - 36420, 8204, 36435, 0, + 36646, 8237, 36661, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_PG506_232, - 36440, 0, + 36666, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_A30_P, - 36450, 8204, 0, + 36676, 8237, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GRID_A100A, - 36309, 36454, 0, + 35873, 36680, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GRID_A100B, - 36309, 36460, 0, + 35873, 36686, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_A100_P40_2, - 36420, 8204, 36430, 0, + 36646, 8237, 36656, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX1660_Ti, - 35007, 35717, 36368, 35274, 0, + 35131, 35815, 36599, 35398, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX1660, - 35007, 35717, 36368, 0, + 35131, 35815, 36599, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX1660S_2, - 35007, 35717, 36368, 36343, 0, + 35131, 35815, 36599, 36574, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX1650_3, - 35007, 35717, 36373, 0, + 35131, 35815, 36604, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_CMP_30HX, - 36378, 36466, 0, + 36609, 36692, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX1660_TiM, - 35007, 35717, 36368, 35274, 11578, 0, + 35131, 35815, 36599, 35398, 11693, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX1650_TiM2, - 35007, 35717, 36373, 35274, 11578, 0, + 35131, 35815, 36604, 35398, 11693, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX1660S_3, - 35007, 35717, 36368, 36343, 0, + 35131, 35815, 36599, 36574, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX1660_TiM2, - 35007, 35717, 36368, 35274, 11578, 0, + 35131, 35815, 36599, 35398, 11693, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX3090, - 35007, 35717, 36471, 0, + 35131, 35815, 36697, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX3080_20, - 35007, 35717, 36476, 36481, 0, + 35131, 35815, 36702, 36707, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX3080, - 35007, 35717, 36476, 0, + 35131, 35815, 36702, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX3080_Ti, - 35007, 35717, 36476, 35274, 0, + 35131, 35815, 36702, 35398, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_CMP_90HX, - 36378, 36486, 0, + 36609, 36712, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_GTX3080LHR, - 35007, 35717, 36476, 23012, 36491, 15188, 0, + 35131, 35815, 36702, 23108, 36717, 15284, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_RTX_A6000, - 36295, 36496, 0, + 36531, 36722, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_RTX_A40, - 36295, 36502, 0, + 36531, 36728, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_RTX_A10, - 36295, 36506, 0, + 36531, 36732, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_RTX_A10G, - 36295, 36510, 0, + 36531, 36736, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GA104_HDAUDIO, - 36515, 28076, 28081, 7054, 6455, 0, + 36741, 28172, 28177, 7072, 6473, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_TEGRA_PCIE_EPVN, - 36521, 8204, 24040, 19987, 3879, 0, + 36747, 8237, 24136, 20065, 3879, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_RTX3090_Ti, - 35007, 36295, 36527, 35274, 0, + 35131, 36531, 36753, 35398, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_RTX3070, - 35007, 36295, 36527, 0, + 35131, 36531, 36753, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_RTX3060_Ti, - 35007, 36295, 36532, 35274, 0, + 35131, 36531, 36758, 35398, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_RTX3070_LHR, - 35007, 36295, 36295, 36527, 23012, 36491, 15188, 0, + 35131, 36531, 36531, 36753, 23108, 36717, 15284, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_RTX3060_LHR, - 35007, 36295, 36295, 36532, 35274, 23012, 36491, 15188, 0, + 35131, 36531, 36531, 36758, 35398, 23108, 36717, 15284, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_CMP_70HX, - 36378, 36537, 0, + 36609, 36763, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_RTX3080_MM, - 35007, 36295, 36476, 11578, 2173, 36359, 36542, 0, + 35131, 36531, 36702, 11693, 2173, 36590, 36768, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_RTX3070_MM, - 35007, 36295, 36527, 11578, 2173, 36359, 0, + 35131, 36531, 36753, 11693, 2173, 36590, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_RTX_A4000, - 36295, 36551, 0, + 36531, 36777, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_RTX_A5000M, - 36295, 36557, 11578, 0, + 36531, 36783, 11693, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_RTX_A4000M, - 36295, 36551, 11578, 0, + 36531, 36777, 11693, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_RTX_A3000M, - 36295, 36563, 11578, 0, + 36531, 36789, 11693, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_RTX3070_M, - 35007, 36295, 36527, 11578, 0, + 35131, 36531, 36753, 11693, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_RTX3070_MM3, - 35007, 36295, 36527, 11578, 2173, 36359, 0, + 35131, 36531, 36753, 11693, 2173, 36590, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_RTX3060, - 35007, 36295, 36532, 0, + 35131, 36531, 36758, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_RTX3060_2, - 35007, 36295, 36532, 0, + 35131, 36531, 36758, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_RTX3060_LHR2, - 35007, 36295, 36532, 23012, 36491, 15188, 0, + 35131, 36531, 36758, 23108, 36717, 15284, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_RTX3060_MM, - 35007, 36295, 36532, 11578, 2173, 36359, 0, + 35131, 36531, 36758, 11693, 2173, 36590, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_RTX3060_TiMM, - 35007, 36295, 36569, 35274, 11578, 2173, 36359, 0, + 35131, 36531, 36795, 35398, 11693, 2173, 36590, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_RTX3060_MM2, - 35007, 36295, 36532, 11578, 2173, 36359, 0, + 35131, 36531, 36758, 11693, 2173, 36590, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_RTX3050_TiMM, - 35007, 36295, 36569, 35274, 11578, 2173, 36359, 0, + 35131, 36531, 36795, 35398, 11693, 2173, 36590, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_RTX3050, - 35007, 36295, 36569, 0, + 35131, 36531, 36795, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_RTX3050_TiM, - 35007, 36295, 36569, 35274, 11578, 0, + 35131, 36531, 36795, 35398, 11693, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_RTX3050_M, - 35007, 36295, 36569, 11578, 0, + 35131, 36531, 36795, 11693, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_RTX3050_M2, - 35007, 36295, 36569, 11578, 0, + 35131, 36531, 36795, 11693, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_RTXA4_M, - 35007, 36295, 36574, 11578, 0, + 35131, 36531, 36800, 11693, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_RTXA2000_M, - 35007, 36295, 36577, 11578, 0, + 35131, 36531, 36803, 11693, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_RTX3050_M3, - 35007, 36295, 36569, 11578, 0, + 35131, 36531, 36795, 11693, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_RTX3050_M4, - 35007, 36295, 36569, 11578, 0, + 35131, 36531, 36795, 11693, 0, PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_GF_RTX3050_TiM2, - 35007, 36295, 36569, 35274, 11578, 0, + 35131, 36531, 36795, 35398, 11693, 0, PCI_VENDOR_NVIDIA_SGS, PCI_PRODUCT_NVIDIA_SGS_RIVA128, - 36583, 10746, 0, + 36809, 10861, 0, PCI_VENDOR_NVIDIA_SGS, PCI_PRODUCT_NVIDIA_SGS_RIVA128_ZX, - 36583, 10746, 36588, 0, + 36809, 10861, 36814, 0, PCI_VENDOR_OAKTECH, PCI_PRODUCT_OAKTECH_OTI1007, - 36591, 0, + 36817, 0, PCI_VENDOR_OLICOM, PCI_PRODUCT_OLICOM_OC3136, - 36598, 36611, 23181, 0, + 36824, 36837, 23277, 0, PCI_VENDOR_OLICOM, PCI_PRODUCT_OLICOM_OC3139, - 36622, 36631, 23181, 6013, 6019, 0, + 36848, 36857, 23277, 6031, 6037, 0, PCI_VENDOR_OLICOM, PCI_PRODUCT_OLICOM_OC3140, - 36640, 36653, 6013, 6019, 23181, 0, + 36866, 36879, 6031, 6037, 23277, 0, PCI_VENDOR_OLICOM, PCI_PRODUCT_OLICOM_OC3250, - 36663, 36671, 6013, 6019, 23181, 0, + 36889, 36897, 6031, 6037, 23277, 0, PCI_VENDOR_OLICOM, PCI_PRODUCT_OLICOM_OC3530, - 36678, 36653, 6013, 6019, 6142, 0, + 36904, 36879, 6031, 6037, 6160, 0, PCI_VENDOR_OLICOM, PCI_PRODUCT_OLICOM_OC3141, - 36686, 36653, 6013, 6019, 23181, 0, + 36912, 36879, 6031, 6037, 23277, 0, PCI_VENDOR_OLICOM, PCI_PRODUCT_OLICOM_OC3540, - 36694, 36653, 36702, 36707, 0, + 36920, 36879, 36928, 36933, 0, PCI_VENDOR_OLICOM, PCI_PRODUCT_OLICOM_OC3150, - 36716, 36653, 36611, 23181, 0, + 36942, 36879, 36837, 23277, 0, PCI_VENDOR_OLICOM, PCI_PRODUCT_OLICOM_OC2805, - 36724, 5717, 0, + 36950, 5735, 0, PCI_VENDOR_OLICOM, PCI_PRODUCT_OLICOM_OC2325, - 36732, 5717, 5819, 0, + 36958, 5735, 5837, 0, PCI_VENDOR_OLICOM, PCI_PRODUCT_OLICOM_OC2183, - 36740, 5717, 0, + 36966, 5735, 0, PCI_VENDOR_OLICOM, PCI_PRODUCT_OLICOM_OC2326, - 36753, 36761, 5717, 0, + 36979, 36987, 5735, 0, PCI_VENDOR_OLICOM, PCI_PRODUCT_OLICOM_OC2327, - 36771, 5819, 5717, 0, + 36997, 5837, 5735, 0, PCI_VENDOR_OLICOM, PCI_PRODUCT_OLICOM_OC6151, - 36784, 32847, 9977, 7125, 0, + 37010, 32962, 10073, 7143, 0, PCI_VENDOR_OLICOM, PCI_PRODUCT_OLICOM_OCATM, - 7125, 0, + 7143, 0, PCI_VENDOR_OPTI, PCI_PRODUCT_OPTI_82C557, - 36797, 0, + 37023, 0, PCI_VENDOR_OPTI, PCI_PRODUCT_OPTI_82C558, - 36804, 0, + 37030, 0, PCI_VENDOR_OPTI, PCI_PRODUCT_OPTI_82C568, - 36811, 0, + 37037, 0, PCI_VENDOR_OPTI, PCI_PRODUCT_OPTI_82C621, - 36818, 0, + 37044, 0, PCI_VENDOR_OPTI, PCI_PRODUCT_OPTI_82C700, - 36825, 0, + 37051, 0, PCI_VENDOR_OPTI, PCI_PRODUCT_OPTI_82C701, - 36832, 0, + 37058, 0, PCI_VENDOR_OPTI, PCI_PRODUCT_OPTI_82C822, - 36839, 0, + 37065, 0, PCI_VENDOR_OPTI, PCI_PRODUCT_OPTI_82C861, - 36846, 0, + 37072, 0, PCI_VENDOR_OPTI, PCI_PRODUCT_OPTI_82D568, - 36853, 0, + 37079, 0, PCI_VENDOR_OXFORDSEMI, PCI_PRODUCT_OXFORDSEMI_VSCOM_PCI011H, - 36860, 0, + 37086, 0, PCI_VENDOR_OXFORDSEMI, PCI_PRODUCT_OXFORDSEMI_OX16PCI954, - 36865, 0, + 37091, 0, PCI_VENDOR_OXFORDSEMI, PCI_PRODUCT_OXFORDSEMI_OX16PCI954K, - 36876, 0, + 37102, 0, PCI_VENDOR_OXFORDSEMI, PCI_PRODUCT_OXFORDSEMI_OXUPCI952, - 36888, 0, + 37114, 0, PCI_VENDOR_OXFORDSEMI, PCI_PRODUCT_OXFORDSEMI_EXSYS_EX41092, - 36898, 36904, 0, + 37124, 37130, 0, PCI_VENDOR_OXFORDSEMI, PCI_PRODUCT_OXFORDSEMI_OXCB950, - 36913, 0, + 37139, 0, PCI_VENDOR_OXFORDSEMI, PCI_PRODUCT_OXFORDSEMI_OXMPCI954, - 36921, 0, + 37147, 0, PCI_VENDOR_OXFORDSEMI, PCI_PRODUCT_OXFORDSEMI_OXMPCI954D, - 36921, 36931, 0, + 37147, 37157, 0, PCI_VENDOR_OXFORDSEMI, PCI_PRODUCT_OXFORDSEMI_EXSYS_EX41098, - 36898, 36940, 0, + 37124, 37166, 0, PCI_VENDOR_OXFORDSEMI, PCI_PRODUCT_OXFORDSEMI_OX16PCI954P, - 36865, 17862, 0, + 37091, 17946, 0, PCI_VENDOR_OXFORDSEMI, PCI_PRODUCT_OXFORDSEMI_OX16PCI952, - 36949, 0, + 37175, 0, PCI_VENDOR_OXFORDSEMI, PCI_PRODUCT_OXFORDSEMI_OX16PCI952P, - 36949, 17862, 0, + 37175, 17946, 0, PCI_VENDOR_OXFORDSEMI, PCI_PRODUCT_OXFORDSEMI_OX16PCI958, - 36960, 0, + 37186, 0, PCI_VENDOR_OXFORDSEMI, PCI_PRODUCT_OXFORDSEMI_OXPCIE952_0, - 36971, 0, + 37197, 0, PCI_VENDOR_OXFORDSEMI, PCI_PRODUCT_OXFORDSEMI_OXPCIE952_1, - 36971, 0, + 37197, 0, PCI_VENDOR_OXFORDSEMI, PCI_PRODUCT_OXFORDSEMI_OXPCIE952P, - 36971, 17862, 0, + 37197, 17946, 0, + PCI_VENDOR_OXFORDSEMI, PCI_PRODUCT_OXFORDSEMI_OXPCIE952SN1, + 37197, 8169, 37207, 14929, 0, PCI_VENDOR_OXFORDSEMI, PCI_PRODUCT_OXFORDSEMI_OXPCIE952_2S, - 36971, 6411, 14833, 0, + 37197, 6429, 14929, 0, PCI_VENDOR_OXFORDSEMI, PCI_PRODUCT_OXFORDSEMI_OXPCIE952_2, - 36971, 0, + 37197, 0, + PCI_VENDOR_OXFORDSEMI, PCI_PRODUCT_OXFORDSEMI_OXPCIE952SN1_2, + 37197, 8169, 37207, 14929, 0, PCI_VENDOR_OXFORDSEMI, PCI_PRODUCT_OXFORDSEMI_OXPCIE952_3, - 36971, 0, + 37197, 0, PCI_VENDOR_OXFORDSEMI, PCI_PRODUCT_OXFORDSEMI_OXPCIE952_4, - 36971, 0, + 37197, 0, PCI_VENDOR_OXFORDSEMI, PCI_PRODUCT_OXFORDSEMI_OXPCIE952_5, - 36971, 0, + 37197, 0, PCI_VENDOR_OXFORDSEMI, PCI_PRODUCT_OXFORDSEMI_OXPCIE952_6, - 36971, 0, + 37197, 0, + PCI_VENDOR_OXFORDSEMI, PCI_PRODUCT_OXFORDSEMI_OXPCIE952SN2, + 37197, 6429, 37207, 14929, 0, + PCI_VENDOR_OXFORDSEMI, PCI_PRODUCT_OXFORDSEMI_OXPCIE952SN2_2, + 37197, 6429, 37207, 14929, 0, PCI_VENDOR_OXFORDSEMI, PCI_PRODUCT_OXFORDSEMI_OXPCIE954, - 36981, 0, + 37214, 0, + PCI_VENDOR_OXFORDSEMI, PCI_PRODUCT_OXFORDSEMI_OXPCIE954SN4, + 37214, 6804, 37207, 14929, 0, + PCI_VENDOR_OXFORDSEMI, PCI_PRODUCT_OXFORDSEMI_OXPCIE958, + 37224, 0, + PCI_VENDOR_OXFORDSEMI, PCI_PRODUCT_OXFORDSEMI_OXPCIE958SN8, + 37224, 6829, 37207, 14929, 0, PCI_VENDOR_PACKETENGINES, PCI_PRODUCT_PACKETENGINES_GNICII, - 34583, 7596, 5717, 0, + 34707, 7629, 5735, 0, PCI_VENDOR_PCHDTV, PCI_PRODUCT_PCHDTV_HD2000, - 36991, 36999, 234, 17242, 0, + 37234, 37242, 234, 17333, 0, PCI_VENDOR_PCHDTV, PCI_PRODUCT_PCHDTV_HD5500, - 37004, 36999, 234, 17242, 0, + 37247, 37242, 234, 17333, 0, PCI_VENDOR_PCTECH, PCI_PRODUCT_PCTECH_RZ1000, - 37012, 0, + 37255, 0, PCI_VENDOR_PEAK, PCI_PRODUCT_PEAK_PCAN, - 37019, 30285, 6455, 0, + 37262, 30367, 6473, 0, PCI_VENDOR_PERICOM, PCI_PRODUCT_PERICOM_PI7C21P100, - 37024, 37035, 0, + 37267, 37278, 0, PCI_VENDOR_PERICOM, PCI_PRODUCT_PERICOM_PI7C9X20303UL, - 37045, 37059, 37065, 8204, 37071, 0, + 37288, 37302, 37308, 8237, 37314, 0, PCI_VENDOR_PERICOM, PCI_PRODUCT_PERICOM_PI7C9X20505GP, - 37078, 37092, 37098, 8204, 37071, 0, + 37321, 37335, 37341, 8237, 37314, 0, PCI_VENDOR_PERICOM, PCI_PRODUCT_PERICOM_PI7C9X20508GP, - 37104, 37092, 37118, 8204, 37071, 0, + 37347, 37335, 37361, 8237, 37314, 0, PCI_VENDOR_PERICOM, PCI_PRODUCT_PERICOM_PI7C9X2G303EL, - 37124, 37059, 37065, 8204, 37138, 37071, 0, + 37367, 37302, 37308, 8237, 37381, 37314, 0, PCI_VENDOR_PERICOM, PCI_PRODUCT_PERICOM_PI7C9X2G304EL, - 37143, 37059, 37157, 8204, 37138, 37071, 0, + 37386, 37302, 37400, 8237, 37381, 37314, 0, PCI_VENDOR_PERICOM, PCI_PRODUCT_PERICOM_PI7C9X2G308GP, - 37163, 37059, 37118, 8204, 37138, 37071, 0, + 37406, 37302, 37361, 8237, 37381, 37314, 0, PCI_VENDOR_PERICOM, PCI_PRODUCT_PERICOM_PI7C9X2G312GP, - 37177, 37059, 37191, 8204, 37138, 37071, 0, + 37420, 37302, 37434, 8237, 37381, 37314, 0, PCI_VENDOR_PERICOM, PCI_PRODUCT_PERICOM_PI7C9X2G404SL, - 37198, 37212, 37157, 8204, 37138, 37071, 0, + 37441, 37455, 37400, 8237, 37381, 37314, 0, PCI_VENDOR_PERICOM, PCI_PRODUCT_PERICOM_PI7C9X2G608GP, - 37218, 37232, 37118, 8204, 37138, 37071, 0, + 37461, 37475, 37361, 8237, 37381, 37314, 0, PCI_VENDOR_PERICOM, PCI_PRODUCT_PERICOM_PI7C9X2G612GP, - 37238, 37232, 37191, 8204, 37138, 37071, 0, + 37481, 37475, 37434, 8237, 37381, 37314, 0, PCI_VENDOR_PERICOM, PCI_PRODUCT_PERICOM_PI7C9X2G912GP, - 37252, 37266, 37191, 8204, 37138, 37071, 0, + 37495, 37509, 37434, 8237, 37381, 37314, 0, PCI_VENDOR_PERICOM, PCI_PRODUCT_PERICOM_PI7C9X2G808PR, - 37272, 37286, 37118, 8204, 37138, 37071, 0, + 37515, 37529, 37361, 8237, 37381, 37314, 0, PCI_VENDOR_PERICOM, PCI_PRODUCT_PERICOM_PI7C9X2G304EV, - 37292, 37059, 37157, 8204, 37138, 37071, 0, + 37535, 37302, 37400, 8237, 37381, 37314, 0, PCI_VENDOR_PERICOM, PCI_PRODUCT_PERICOM_PI7C9X2G404EV, - 37306, 37212, 37157, 8204, 37138, 37071, 0, + 37549, 37455, 37400, 8237, 37381, 37314, 0, PCI_VENDOR_PERICOM, PCI_PRODUCT_PERICOM_PI7C9X3G808GP, - 37320, 37286, 37118, 8204, 37334, 37071, 0, + 37563, 37529, 37361, 8237, 37577, 37314, 0, PCI_VENDOR_PERICOM, PCI_PRODUCT_PERICOM_PI7C9X3G816GP, - 37339, 37286, 37353, 8204, 37334, 37071, 0, + 37582, 37529, 37596, 8237, 37577, 37314, 0, PCI_VENDOR_PERICOM, PCI_PRODUCT_PERICOM_PI7C9X3G1224GP, - 37360, 37375, 37382, 8204, 37334, 37071, 0, + 37603, 37618, 37625, 8237, 37577, 37314, 0, PCI_VENDOR_PERICOM, PCI_PRODUCT_PERICOM_PI7C9X3G1632GP, - 37389, 37404, 37411, 8204, 37334, 37071, 0, + 37632, 37647, 37654, 8237, 37577, 37314, 0, PCI_VENDOR_PERICOM, PCI_PRODUCT_PERICOM_PI7C8140A, - 37418, 6411, 6788, 8791, 6563, 0, + 37661, 6429, 6806, 8887, 6581, 0, PCI_VENDOR_PERICOM, PCI_PRODUCT_PERICOM_PI7C8148, - 37428, 37437, 6411, 6788, 8791, 6563, 0, + 37671, 37680, 6429, 6806, 8887, 6581, 0, PCI_VENDOR_PERICOM, PCI_PRODUCT_PERICOM_PI7C8152, - 37450, 6411, 6788, 8791, 6563, 0, + 37693, 6429, 6806, 8887, 6581, 0, PCI_VENDOR_PERICOM, PCI_PRODUCT_PERICOM_PI7C8154, - 37459, 37437, 6411, 6788, 8791, 6563, 0, + 37702, 37680, 6429, 6806, 8887, 6581, 0, PCI_VENDOR_PERICOM, PCI_PRODUCT_PERICOM_PI7C9X20303SL, - 37468, 37059, 37065, 8204, 37071, 0, + 37711, 37302, 37308, 8237, 37314, 0, PCI_VENDOR_PERICOM, PCI_PRODUCT_PERICOM_PI7C9X20404SL, - 37468, 37212, 37157, 8204, 37071, 0, + 37711, 37455, 37400, 8237, 37314, 0, PCI_VENDOR_PERICOM, PCI_PRODUCT_PERICOM_PI7C9X110, - 37482, 8204, 7009, 615, 6563, 0, + 37725, 8237, 7027, 615, 6581, 0, PCI_VENDOR_PERICOM, PCI_PRODUCT_PERICOM_PI7C9X111SL, - 37492, 8204, 7009, 615, 37504, 6563, 0, + 37735, 8237, 7027, 615, 37747, 6581, 0, PCI_VENDOR_PERICOM, PCI_PRODUCT_PERICOM_PI7C9X130, - 37512, 37522, 37504, 6563, 0, + 37755, 37765, 37747, 6581, 0, PCI_VENDOR_PHOBOS, PCI_PRODUCT_PHOBOS_P1000, - 37532, 5709, 5717, 0, + 37775, 5727, 5735, 0, PCI_VENDOR_PLANEX, PCI_PRODUCT_PLANEX_FNW_3603_TX, - 37538, 5819, 5717, 0, + 37781, 5837, 5735, 0, PCI_VENDOR_PLANEX, PCI_PRODUCT_PLANEX_FNW_3800_TX, - 37550, 5819, 5717, 0, + 37793, 5837, 5735, 0, PCI_VENDOR_PLX, PCI_PRODUCT_PLX_PCI_800, - 37562, 37568, 6811, 6788, 6761, 0, + 37805, 37811, 6829, 6806, 6779, 0, PCI_VENDOR_PLX, PCI_PRODUCT_PLX_PCI_400, - 37562, 37576, 6786, 6788, 6761, 0, + 37805, 37819, 6804, 6806, 6779, 0, PCI_VENDOR_PLX, PCI_PRODUCT_PLX_PCI_200, - 37562, 37584, 6411, 6788, 6761, 0, + 37805, 37827, 6429, 6806, 6779, 0, PCI_VENDOR_PLX, PCI_PRODUCT_PLX_9656FPBGA, - 37592, 8945, 7847, 37597, 0, + 37835, 9041, 7880, 37840, 0, PCI_VENDOR_PLX, PCI_PRODUCT_PLX_PEX_8111, - 37603, 37607, 14848, 6563, 0, + 37846, 37850, 14944, 6581, 0, PCI_VENDOR_PLX, PCI_PRODUCT_PLX_PEX_8112, - 37603, 37612, 14848, 6563, 0, + 37846, 37855, 14944, 6581, 0, PCI_VENDOR_PLX, PCI_PRODUCT_PLX_PEX_8114, - 37603, 37617, 37622, 6563, 0, + 37846, 37860, 37865, 6581, 0, PCI_VENDOR_PLX, PCI_PRODUCT_PLX_PEX_8605, - 37603, 37640, 37212, 37157, 8204, 23874, 6411, 37071, 0, + 37846, 37883, 37455, 37400, 8237, 23970, 6429, 37314, 0, PCI_VENDOR_PLX, PCI_PRODUCT_PLX_9030, - 37645, 8945, 37650, 0, + 37888, 9041, 37893, 0, PCI_VENDOR_PLX, PCI_PRODUCT_PLX_9050, - 37661, 8945, 37650, 0, + 37904, 9041, 37893, 0, PCI_VENDOR_PLX, PCI_PRODUCT_PLX_9054, - 37666, 8945, 7847, 0, + 37909, 9041, 7880, 0, PCI_VENDOR_PLX, PCI_PRODUCT_PLX_9060ES, - 37671, 615, 17871, 6455, 0, + 37914, 615, 17955, 6473, 0, PCI_VENDOR_PLX, PCI_PRODUCT_PLX_9656, - 37592, 8945, 7847, 0, + 37835, 9041, 7880, 0, PCI_VENDOR_POWERHOUSE, PCI_PRODUCT_POWERHOUSE_POWERTOP, - 37678, 23164, 6, 6455, 0, + 37921, 23260, 6, 6473, 0, PCI_VENDOR_POWERHOUSE, PCI_PRODUCT_POWERHOUSE_POWERPRO, - 37687, 23164, 6, 6455, 0, + 37930, 23260, 6, 6473, 0, PCI_VENDOR_PROLAN, PCI_PRODUCT_PROLAN_NE2KETHER, - 5717, 0, + 5735, 0, PCI_VENDOR_PROMISE, PCI_PRODUCT_PROMISE_PDC20265, - 37696, 37705, 6626, 6455, 0, + 37939, 37948, 6644, 6473, 0, PCI_VENDOR_PROMISE, PCI_PRODUCT_PROMISE_PDC20263, - 37715, 37724, 6626, 6455, 0, + 37958, 37967, 6644, 6473, 0, PCI_VENDOR_PROMISE, PCI_PRODUCT_PROMISE_PDC20275, - 37733, 37742, 6626, 6455, 0, + 37976, 37985, 6644, 6473, 0, PCI_VENDOR_PROMISE, PCI_PRODUCT_PROMISE_PDC20318, - 37752, 14833, 6446, 6455, 0, + 37995, 14929, 6464, 6473, 0, PCI_VENDOR_PROMISE, PCI_PRODUCT_PROMISE_PDC20319, - 37761, 14833, 6446, 6455, 0, + 38004, 14929, 6464, 6473, 0, PCI_VENDOR_PROMISE, PCI_PRODUCT_PROMISE_PDC20371, - 37770, 14833, 6446, 6455, 0, + 38013, 14929, 6464, 6473, 0, PCI_VENDOR_PROMISE, PCI_PRODUCT_PROMISE_PDC20379, - 37779, 14833, 6446, 6455, 0, + 38022, 14929, 6464, 6473, 0, PCI_VENDOR_PROMISE, PCI_PRODUCT_PROMISE_PDC20378, - 37788, 14833, 6446, 6455, 0, + 38031, 14929, 6464, 6473, 0, PCI_VENDOR_PROMISE, PCI_PRODUCT_PROMISE_PDC20375, - 37797, 14833, 6446, 6455, 0, + 38040, 14929, 6464, 6473, 0, PCI_VENDOR_PROMISE, PCI_PRODUCT_PROMISE_PDC20376, - 37806, 14833, 6446, 6455, 0, + 38049, 14929, 6464, 6473, 0, PCI_VENDOR_PROMISE, PCI_PRODUCT_PROMISE_PDC20377, - 37815, 14833, 6446, 6455, 0, + 38058, 14929, 6464, 6473, 0, PCI_VENDOR_PROMISE, PCI_PRODUCT_PROMISE_PDC40719, - 37824, 14833, 6446, 6455, 0, + 38067, 14929, 6464, 6473, 0, PCI_VENDOR_PROMISE, PCI_PRODUCT_PROMISE_PDC40519, - 37833, 14833, 6446, 6455, 0, + 38076, 14929, 6464, 6473, 0, PCI_VENDOR_PROMISE, PCI_PRODUCT_PROMISE_PDC20771, - 37842, 14833, 6446, 6455, 0, + 38085, 14929, 6464, 6473, 0, PCI_VENDOR_PROMISE, PCI_PRODUCT_PROMISE_PDC20571, - 37851, 14833, 6446, 6455, 0, + 38094, 14929, 6464, 6473, 0, PCI_VENDOR_PROMISE, PCI_PRODUCT_PROMISE_PDC20579, - 37860, 14833, 6446, 6455, 0, + 38103, 14929, 6464, 6473, 0, PCI_VENDOR_PROMISE, PCI_PRODUCT_PROMISE_PDC40779, - 37869, 14833, 6446, 6455, 0, + 38112, 14929, 6464, 6473, 0, PCI_VENDOR_PROMISE, PCI_PRODUCT_PROMISE_PDC40718, - 37878, 14833, 6446, 6455, 0, + 38121, 14929, 6464, 6473, 0, PCI_VENDOR_PROMISE, PCI_PRODUCT_PROMISE_PDC40518, - 37887, 14833, 6446, 6455, 0, + 38130, 14929, 6464, 6473, 0, PCI_VENDOR_PROMISE, PCI_PRODUCT_PROMISE_PDC20775, - 37896, 14833, 6446, 6455, 0, + 38139, 14929, 6464, 6473, 0, PCI_VENDOR_PROMISE, PCI_PRODUCT_PROMISE_PDC20575, - 37905, 14833, 6446, 6455, 0, + 38148, 14929, 6464, 6473, 0, PCI_VENDOR_PROMISE, PCI_PRODUCT_PROMISE_PDC20267, - 37914, 37705, 6626, 6455, 0, + 38157, 37948, 6644, 6473, 0, PCI_VENDOR_PROMISE, PCI_PRODUCT_PROMISE_PDC20246, - 37923, 37932, 6626, 6455, 0, + 38166, 38175, 6644, 6473, 0, PCI_VENDOR_PROMISE, PCI_PRODUCT_PROMISE_PDC20262, - 37941, 37724, 6626, 6455, 0, + 38184, 37967, 6644, 6473, 0, PCI_VENDOR_PROMISE, PCI_PRODUCT_PROMISE_PDC20268, - 37950, 37705, 6626, 6455, 0, + 38193, 37948, 6644, 6473, 0, PCI_VENDOR_PROMISE, PCI_PRODUCT_PROMISE_PDC20269, - 37959, 37742, 6626, 6455, 0, + 38202, 37985, 6644, 6473, 0, PCI_VENDOR_PROMISE, PCI_PRODUCT_PROMISE_PDC20276, - 37968, 37742, 6626, 6455, 0, + 38211, 37985, 6644, 6473, 0, PCI_VENDOR_PROMISE, PCI_PRODUCT_PROMISE_DC5030, - 37977, 6626, 6455, 0, + 38220, 6644, 6473, 0, PCI_VENDOR_PROMISE, PCI_PRODUCT_PROMISE_PDC20270, - 37984, 37705, 6626, 6455, 0, + 38227, 37948, 6644, 6473, 0, PCI_VENDOR_PROMISE, PCI_PRODUCT_PROMISE_PDC20271, - 37993, 37742, 6626, 6455, 0, + 38236, 37985, 6644, 6473, 0, PCI_VENDOR_PROMISE, PCI_PRODUCT_PROMISE_PDC20617, - 38002, 11247, 37742, 6626, 6455, 0, + 38245, 11362, 37985, 6644, 6473, 0, PCI_VENDOR_PROMISE, PCI_PRODUCT_PROMISE_PDC20620, - 38011, 11247, 37742, 6626, 6455, 0, + 38254, 11362, 37985, 6644, 6473, 0, PCI_VENDOR_PROMISE, PCI_PRODUCT_PROMISE_PDC20621, - 38020, 11247, 37742, 6626, 6455, 0, + 38263, 11362, 37985, 6644, 6473, 0, PCI_VENDOR_PROMISE, PCI_PRODUCT_PROMISE_PDC20618, - 38029, 11247, 37742, 6626, 6455, 0, + 38272, 11362, 37985, 6644, 6473, 0, PCI_VENDOR_PROMISE, PCI_PRODUCT_PROMISE_PDC20619, - 38038, 11247, 37742, 6626, 6455, 0, + 38281, 11362, 37985, 6644, 6473, 0, PCI_VENDOR_PROMISE, PCI_PRODUCT_PROMISE_PDC20277, - 38047, 37742, 6626, 6455, 0, + 38290, 37985, 6644, 6473, 0, PCI_VENDOR_QINHENG, PCI_PRODUCT_QINHENG_CH352_2S, - 38056, 38062, 0, + 38299, 38305, 0, PCI_VENDOR_QINHENG, PCI_PRODUCT_QINHENG_CH353_4S, - 38065, 38071, 0, + 38308, 38314, 0, PCI_VENDOR_QINHENG, PCI_PRODUCT_QINHENG_CH356_8S, - 38074, 38080, 0, + 38317, 38323, 0, PCI_VENDOR_QINHENG, PCI_PRODUCT_QINHENG_CH356_6S, - 38074, 38083, 0, + 38317, 38326, 0, PCI_VENDOR_QINHENG, PCI_PRODUCT_QINHENG_CH353_2S1PAR, - 38065, 38086, 38090, 38093, 38100, 0, + 38308, 38329, 38333, 38336, 38343, 0, PCI_VENDOR_QINHENG, PCI_PRODUCT_QINHENG_CH352_1S1P, - 38056, 38109, 38090, 0, + 38299, 38352, 38333, 0, PCI_VENDOR_QINHENG, PCI_PRODUCT_QINHENG_CH357_4S, - 38113, 38071, 0, + 38356, 38314, 0, PCI_VENDOR_QINHENG, PCI_PRODUCT_QINHENG_CH358_4S1P, - 38119, 38125, 38090, 0, + 38362, 38368, 38333, 0, PCI_VENDOR_QINHENG, PCI_PRODUCT_QINHENG_CH358_8S, - 38119, 38080, 0, + 38362, 38323, 0, PCI_VENDOR_QINHENG, PCI_PRODUCT_QINHENG_CH359_16S, - 38129, 38135, 0, + 38372, 38378, 0, PCI_VENDOR_QINHENG, PCI_PRODUCT_QINHENG_CH353_2S1P, - 38065, 38086, 38090, 0, + 38308, 38329, 38333, 0, PCI_VENDOR_QINHENG, PCI_PRODUCT_QINHENG_CH356_4S1P, - 38074, 38125, 38090, 0, + 38317, 38368, 38333, 0, PCI_VENDOR_QINHENG, PCI_PRODUCT_QINHENG_CH355_4S, - 38139, 38071, 0, + 38382, 38314, 0, PCI_VENDOR_QINHENG2, PCI_PRODUCT_QINHENG2_CH382_2S1P, - 38145, 38086, 38090, 0, + 38388, 38329, 38333, 0, PCI_VENDOR_QINHENG2, PCI_PRODUCT_QINHENG2_CH382_2S, - 38145, 38062, 0, + 38388, 38305, 0, PCI_VENDOR_QINHENG2, PCI_PRODUCT_QINHENG2_CH384_4S1P, - 38151, 38125, 38090, 0, + 38394, 38368, 38333, 0, PCI_VENDOR_QINHENG2, PCI_PRODUCT_QINHENG2_CH384_4S, - 38151, 38071, 0, + 38394, 38314, 0, PCI_VENDOR_QINHENG2, PCI_PRODUCT_QINHENG2_CH384_8S, - 38151, 38080, 0, + 38394, 38323, 0, PCI_VENDOR_QINHENG2, PCI_PRODUCT_QINHENG2_CH384_28S, - 38151, 38157, 0, + 38394, 38400, 0, PCI_VENDOR_QLOGIC, PCI_PRODUCT_QLOGIC_QLA200, - 38161, 0, + 38404, 0, PCI_VENDOR_QLOGIC, PCI_PRODUCT_QLOGIC_ISP10160, - 38168, 0, + 38411, 0, PCI_VENDOR_QLOGIC, PCI_PRODUCT_QLOGIC_ISP1020, - 38177, 0, + 38420, 0, PCI_VENDOR_QLOGIC, PCI_PRODUCT_QLOGIC_ISP1022, - 38185, 0, + 38428, 0, PCI_VENDOR_QLOGIC, PCI_PRODUCT_QLOGIC_ISP1080, - 38193, 0, + 38436, 0, PCI_VENDOR_QLOGIC, PCI_PRODUCT_QLOGIC_ISP12160, - 38201, 0, + 38444, 0, PCI_VENDOR_QLOGIC, PCI_PRODUCT_QLOGIC_ISP1240, - 38210, 0, + 38453, 0, PCI_VENDOR_QLOGIC, PCI_PRODUCT_QLOGIC_ISP1280, - 38218, 0, + 38461, 0, PCI_VENDOR_QLOGIC, PCI_PRODUCT_QLOGIC_ISP2100, - 38226, 0, + 38469, 0, PCI_VENDOR_QLOGIC, PCI_PRODUCT_QLOGIC_ISP2200, - 38234, 0, + 38477, 0, PCI_VENDOR_QLOGIC, PCI_PRODUCT_QLOGIC_ISP2300, - 38242, 0, + 38485, 0, PCI_VENDOR_QLOGIC, PCI_PRODUCT_QLOGIC_ISP2312, - 38250, 0, + 38493, 0, PCI_VENDOR_QLOGIC, PCI_PRODUCT_QLOGIC_ISP2322, - 38258, 0, + 38501, 0, PCI_VENDOR_QLOGIC, PCI_PRODUCT_QLOGIC_ISP2422, - 38266, 0, + 38509, 0, PCI_VENDOR_QLOGIC, PCI_PRODUCT_QLOGIC_ISP2432, - 38274, 0, + 38517, 0, PCI_VENDOR_QLOGIC, PCI_PRODUCT_QLOGIC_ISP2512, - 38282, 0, + 38525, 0, PCI_VENDOR_QLOGIC, PCI_PRODUCT_QLOGIC_ISP2522, - 38290, 0, + 38533, 0, PCI_VENDOR_QLOGIC, PCI_PRODUCT_QLOGIC_ISP2532, - 38298, 0, + 38541, 0, PCI_VENDOR_QLOGIC, PCI_PRODUCT_QLOGIC_ISP4010_TOE, - 38306, 7841, 38314, 0, + 38549, 7874, 38557, 0, PCI_VENDOR_QLOGIC, PCI_PRODUCT_QLOGIC_ISP4022_TOE, - 38318, 7841, 38314, 0, + 38561, 7874, 38557, 0, PCI_VENDOR_QLOGIC, PCI_PRODUCT_QLOGIC_ISP4032_TOE, - 38326, 7841, 38314, 0, + 38569, 7874, 38557, 0, PCI_VENDOR_QLOGIC, PCI_PRODUCT_QLOGIC_ISP4010_HBA, - 38306, 7841, 38334, 0, + 38549, 7874, 38577, 0, PCI_VENDOR_QLOGIC, PCI_PRODUCT_QLOGIC_ISP4022_HBA, - 38318, 7841, 38334, 0, + 38561, 7874, 38577, 0, PCI_VENDOR_QLOGIC, PCI_PRODUCT_QLOGIC_ISP4032_HBA, - 38326, 7841, 38334, 0, + 38569, 7874, 38577, 0, PCI_VENDOR_QLOGIC, PCI_PRODUCT_QLOGIC_ISP5422, - 38338, 0, + 38581, 0, PCI_VENDOR_QLOGIC, PCI_PRODUCT_QLOGIC_ISP5432, - 38346, 0, + 38589, 0, PCI_VENDOR_QLOGIC, PCI_PRODUCT_QLOGIC_ISP6312, - 38354, 0, + 38597, 0, PCI_VENDOR_QLOGIC, PCI_PRODUCT_QLOGIC_ISP6322, - 38362, 0, + 38605, 0, PCI_VENDOR_QLOGIC, PCI_PRODUCT_QLOGIC_ISP8432, - 38370, 0, + 38613, 0, PCI_VENDOR_QUANCOM, PCI_PRODUCT_QUANCOM_PWDOG1, - 38378, 0, + 38621, 0, PCI_VENDOR_QUANTUMDESIGNS, PCI_PRODUCT_QUANTUMDESIGNS_8500, - 10306, 0, + 10427, 0, PCI_VENDOR_QUANTUMDESIGNS, PCI_PRODUCT_QUANTUMDESIGNS_8580, - 38385, 0, + 38628, 0, PCI_VENDOR_QUICKLOGIC, PCI_PRODUCT_QUICKLOGIC_PCWATCHDOG, - 788, 23547, 0, + 788, 23643, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1000, - 38390, 3879, 0, + 38633, 3879, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1001, - 38390, 24931, 0, + 38633, 25027, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1002, - 38390, 4504, 38397, 0, + 38633, 4504, 38640, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1003, - 38390, 38405, 0, + 38633, 38648, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1004, - 38390, 6670, 0, + 38633, 6688, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1005, - 38390, 38413, 38417, 0, + 38633, 38656, 38660, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1006, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1007, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1008, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1009, - 38390, 38425, 38428, 0, + 38633, 38668, 38671, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_100A, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_100B, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_100C, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_100D, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_100E, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_100F, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1010, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1011, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1012, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1013, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1014, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1015, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1016, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1017, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1018, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1019, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_101A, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_101B, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_101C, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_101D, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_101E, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_101F, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1020, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1021, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1022, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1023, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1024, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1025, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1026, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1027, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1028, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1029, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_102A, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_102B, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_102C, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_102D, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_102E, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_102F, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1030, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1031, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1032, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1033, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1034, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1035, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1036, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1037, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1038, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1039, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_103A, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_103B, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_103C, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_103D, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_103E, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_103F, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1040, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1041, - 38390, 3879, 0, + 38633, 3879, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1042, - 38390, 24931, 0, + 38633, 25027, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1043, - 38390, 38405, 0, + 38633, 38648, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1044, - 38390, 38413, 38417, 0, + 38633, 38656, 38660, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1045, - 38390, 4504, 38397, 0, + 38633, 4504, 38640, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1046, - 38390, 8945, 38439, 0, + 38633, 9041, 38682, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1047, - 38390, 38446, 8115, 33697, 0, + 38633, 38689, 8148, 33821, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1048, - 38390, 6670, 0, + 38633, 6688, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1049, - 38390, 38425, 38428, 0, + 38633, 38668, 38671, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_104A, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_104B, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_104C, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_104D, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_104E, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_104F, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1050, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1051, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1052, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1053, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1054, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1055, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1056, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1057, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1058, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1059, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_105A, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_105B, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_105C, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_105D, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_105E, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_105F, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1060, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1061, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1062, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1063, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1064, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1065, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1066, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1067, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1068, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1069, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_106A, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_106B, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_106C, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_106D, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_106E, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_106F, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1070, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1071, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1072, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1073, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1074, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1075, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1076, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1077, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1078, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_1079, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_107A, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_107B, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_107C, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_107D, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_107E, - 38390, 0, + 38633, 0, PCI_VENDOR_QUMRANET, PCI_PRODUCT_QUMRANET_VIRTIO_107F, - 38390, 0, + 38633, 0, PCI_VENDOR_RAINBOW, PCI_PRODUCT_RAINBOW_CS200, - 38453, 11274, 38465, 7847, 0, + 38696, 11389, 38708, 7880, 0, PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT2460A, - 38469, 7686, 0, + 38712, 7719, 0, PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT2560, - 38477, 38484, 0, + 38720, 38727, 0, PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT2561S, - 38494, 38484, 0, + 38737, 38727, 0, PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT2561, - 38502, 38484, 0, + 38745, 38727, 0, PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT2661, - 38509, 17013, 0, + 38752, 17109, 0, PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT2860, - 20299, 0, + 20377, 0, PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT2890, - 15216, 0, + 15312, 0, PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT2760, - 38516, 0, + 38759, 0, PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT2790, - 38523, 0, + 38766, 0, PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT3060, - 38530, 0, + 38773, 0, PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT3062, - 38537, 0, + 38780, 0, PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT3090, - 22373, 17013, 0, + 22469, 17109, 0, PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT3091, - 38544, 0, + 38787, 0, PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT3092, - 38551, 0, + 38794, 0, PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT3298, - 8544, 0, + 8577, 0, PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT3562, - 38558, 0, + 38801, 0, PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT3592, - 38565, 0, + 38808, 0, PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT3593, - 38572, 0, + 38815, 0, PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT5360, - 38579, 0, + 38822, 0, PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT5362, - 38586, 0, + 38829, 0, PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT5390_1, - 38593, 0, + 38836, 0, PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT5390_2, - 38593, 0, + 38836, 0, PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT5390_3, - 38593, 0, + 38836, 0, PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT5390_4, - 38593, 0, + 38836, 0, PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT5390_5, - 38593, 0, + 38836, 0, PCI_VENDOR_RATOC, PCI_PRODUCT_RATOC_REXPCI31, - 38600, 38604, 6670, 0, + 38843, 38847, 6688, 0, PCI_VENDOR_RASPBERRYPI, PCI_PRODUCT_RASPBERRYPI_RP1_ETH, - 38614, 8204, 6964, 8710, 6563, 5717, 0, + 38857, 8237, 6982, 8743, 6581, 5735, 0, PCI_VENDOR_RDC, PCI_PRODUCT_RDC_R1010_IDE, - 38618, 6626, 6455, 0, + 38861, 6644, 6473, 0, PCI_VENDOR_RDC, PCI_PRODUCT_RDC_R1011_IDE, - 38624, 6626, 6455, 0, + 38867, 6644, 6473, 0, PCI_VENDOR_RDC, PCI_PRODUCT_RDC_R1012_IDE, - 38630, 6626, 6455, 0, + 38873, 6644, 6473, 0, PCI_VENDOR_RDC, PCI_PRODUCT_RDC_R1031_PPB, - 38636, 9082, 6563, 0, + 38879, 9178, 6581, 0, PCI_VENDOR_RDC, PCI_PRODUCT_RDC_R1060_USBD, - 38642, 6945, 2418, 0, + 38885, 6963, 2418, 0, PCI_VENDOR_RDC, PCI_PRODUCT_RDC_R1061_USBD, - 38648, 6945, 2418, 0, + 38891, 6963, 2418, 0, PCI_VENDOR_RDC, PCI_PRODUCT_RDC_R1070_CAN, - 38654, 30361, 0, + 38897, 30443, 0, PCI_VENDOR_RDC, PCI_PRODUCT_RDC_R1331_MC, - 38660, 4268, 9186, 0, + 38903, 4268, 9282, 0, PCI_VENDOR_RDC, PCI_PRODUCT_RDC_R1710_SPI, - 38666, 17409, 0, + 38909, 17500, 0, PCI_VENDOR_RDC, PCI_PRODUCT_RDC_R1930_HBRD, - 38672, 38678, 8125, 9186, 28653, 0, + 38915, 38921, 8158, 9282, 28755, 0, PCI_VENDOR_RDC, PCI_PRODUCT_RDC_R2010_VGA, - 38685, 8679, 6455, 0, + 38928, 8712, 6473, 0, PCI_VENDOR_RDC, PCI_PRODUCT_RDC_R2012_VGA, - 38691, 8679, 6455, 0, + 38934, 8712, 6473, 0, PCI_VENDOR_RDC, PCI_PRODUCT_RDC_R2015_VGA, - 38697, 8679, 6455, 0, + 38940, 8712, 6473, 0, PCI_VENDOR_RDC, PCI_PRODUCT_RDC_R6011_PCIB, - 38703, 6837, 10513, 0, + 38946, 6855, 10628, 0, PCI_VENDOR_RDC, PCI_PRODUCT_RDC_R6013_PCIB, - 38709, 6837, 10513, 0, + 38952, 6855, 10628, 0, PCI_VENDOR_RDC, PCI_PRODUCT_RDC_R6021_HB, - 38715, 6953, 0, + 38958, 6971, 0, PCI_VENDOR_RDC, PCI_PRODUCT_RDC_R6022_HB, - 38721, 6953, 0, + 38964, 6971, 0, PCI_VENDOR_RDC, PCI_PRODUCT_RDC_R6023_HB, - 38727, 6953, 0, + 38970, 6971, 0, PCI_VENDOR_RDC, PCI_PRODUCT_RDC_R6025_HB, - 38733, 6953, 0, + 38976, 6971, 0, PCI_VENDOR_RDC, PCI_PRODUCT_RDC_R6026_HB, - 38739, 6953, 0, + 38982, 6971, 0, PCI_VENDOR_RDC, PCI_PRODUCT_RDC_R6031_PCIB, - 38745, 6837, 10513, 0, + 38988, 6855, 10628, 0, PCI_VENDOR_RDC, PCI_PRODUCT_RDC_R6035_PCIB, - 38751, 6837, 10513, 0, + 38994, 6855, 10628, 0, PCI_VENDOR_RDC, PCI_PRODUCT_RDC_R6036_PCIB, - 38757, 6837, 10513, 0, + 39000, 6855, 10628, 0, PCI_VENDOR_RDC, PCI_PRODUCT_RDC_R6040, - 38763, 5819, 5717, 0, + 39006, 5837, 5735, 0, PCI_VENDOR_RDC, PCI_PRODUCT_RDC_R6060_OHCI, - 38769, 6945, 8722, 0, + 39012, 6963, 8755, 0, PCI_VENDOR_RDC, PCI_PRODUCT_RDC_R6061_EHCI, - 38775, 6945, 8727, 0, + 39018, 6963, 8760, 0, PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_E2600, - 9994, 38781, 0, + 10090, 39024, 0, PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_E3000, - 9994, 38787, 0, + 10090, 39030, 0, PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RTS5208, - 38793, 21948, 15031, 20421, 0, + 39036, 22044, 15127, 20499, 0, PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RTS5209, - 38801, 21948, 15031, 20421, 0, + 39044, 22044, 15127, 20499, 0, PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RTS5227, - 38809, 21948, 15031, 20421, 0, + 39052, 22044, 15127, 20499, 0, PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RTS5229, - 38817, 21948, 15031, 20421, 0, + 39060, 22044, 15127, 20499, 0, PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RTS522A, - 38825, 21948, 15031, 20421, 0, + 39068, 22044, 15127, 20499, 0, PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RTS5249, - 38833, 21948, 15031, 20421, 0, + 39076, 22044, 15127, 20499, 0, PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RTS525A, - 38841, 21948, 15031, 20421, 0, + 39084, 22044, 15127, 20499, 0, PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RTL8402, - 38849, 21948, 15031, 20421, 0, + 39092, 22044, 15127, 20499, 0, PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RTL8411B, - 38857, 21948, 15031, 20421, 0, + 39100, 22044, 15127, 20499, 0, PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RTL8411, - 38866, 21948, 15031, 20421, 0, + 39109, 22044, 15127, 20499, 0, PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8029, - 38874, 5717, 0, + 39117, 5735, 0, PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8139D, - 38879, 5819, 5717, 0, + 39122, 5837, 5735, 0, PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8100, - 38885, 5819, 5717, 0, + 39128, 5837, 5735, 0, PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8125, - 38890, 38895, 5717, 0, + 39133, 39138, 5735, 0, PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8126, - 38910, 38915, 5717, 0, + 39153, 39158, 5735, 0, + PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8127, + 39176, 39158, 5735, 0, PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8129, - 38933, 5819, 5717, 0, + 39181, 5837, 5735, 0, PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8101E, - 38938, 5819, 5717, 0, + 39186, 5837, 5735, 0, PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8138, - 38956, 5819, 5717, 0, + 39204, 5837, 5735, 0, PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8139, - 7599, 5819, 5717, 0, + 7632, 5837, 5735, 0, PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8169SC, - 38961, 5732, 5717, 0, + 39209, 5750, 5735, 0, PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8168, - 38975, 5732, 5717, 0, + 39223, 5750, 5735, 0, PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8169, - 38985, 5732, 5717, 0, + 39233, 5750, 5735, 0, PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RTL8188CE, - 38995, 4761, 4540, 39005, 21948, 22551, 0, + 39243, 4761, 4540, 39253, 22044, 22647, 0, PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RTL8192CE, - 39013, 4761, 4540, 39005, 21948, 22551, 0, + 39261, 4761, 4540, 39253, 22044, 22647, 0, PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RTL8188EE, - 39023, 4761, 4540, 39005, 21948, 22551, 0, + 39271, 4761, 4540, 39253, 22044, 22647, 0, PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8180, - 13979, 7686, 0, + 14089, 7719, 0, PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8185, - 39033, 39038, 0, + 39281, 39286, 0, PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RTL8192EE, - 39050, 4761, 4540, 39005, 21948, 22551, 0, + 39298, 4761, 4540, 39253, 22044, 22647, 0, PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RTL8821CE, - 39060, 17108, 8204, 22551, 0, + 39308, 17204, 8237, 22647, 0, PCI_VENDOR_REDHAT, PCI_PRODUCT_REDHAT_PPB, - 39070, 8791, 0, + 39318, 8887, 0, PCI_VENDOR_REDHAT, PCI_PRODUCT_REDHAT_QXL, - 39075, 234, 0, + 39323, 234, 0, PCI_VENDOR_RENESAS, PCI_PRODUCT_RENESAS_SH7780, - 39079, 615, 6455, 0, + 39327, 615, 6473, 0, PCI_VENDOR_RENESAS, PCI_PRODUCT_RENESAS_SH7785, - 39086, 615, 6455, 0, + 39334, 615, 6473, 0, PCI_VENDOR_RENESAS, PCI_PRODUCT_RENESAS_SH7757_PBI, - 39093, 8204, 39100, 39110, 0, + 39341, 8237, 39348, 39358, 0, PCI_VENDOR_RENESAS, PCI_PRODUCT_RENESAS_SH7757_PPB, - 39093, 9831, 6563, 39116, 0, + 39341, 9927, 6581, 39364, 0, PCI_VENDOR_RENESAS, PCI_PRODUCT_RENESAS_SH7757_PS, - 39093, 8204, 17501, 39122, 0, + 39341, 8237, 8853, 39370, 0, PCI_VENDOR_RENESAS, PCI_PRODUCT_RENESAS_PD720201, - 39127, 6945, 8265, 6953, 6455, 0, + 39375, 6963, 8298, 6971, 6473, 0, PCI_VENDOR_RENESAS, PCI_PRODUCT_RENESAS_PD720202, - 39137, 6945, 8265, 6953, 6455, 0, + 39385, 6963, 8298, 6971, 6473, 0, PCI_VENDOR_RICOH, PCI_PRODUCT_RICOH_Rx5C465, - 39147, 18587, 6563, 0, + 39395, 18665, 6581, 0, PCI_VENDOR_RICOH, PCI_PRODUCT_RICOH_Rx5C466, - 39153, 18587, 6563, 0, + 39401, 18665, 6581, 0, PCI_VENDOR_RICOH, PCI_PRODUCT_RICOH_Rx5C475, - 39159, 18587, 6563, 0, + 39407, 18665, 6581, 0, PCI_VENDOR_RICOH, PCI_PRODUCT_RICOH_RL5C476, - 39165, 18587, 6563, 0, + 39413, 18665, 6581, 0, PCI_VENDOR_RICOH, PCI_PRODUCT_RICOH_Rx5C477, - 39171, 18587, 6563, 0, + 39419, 18665, 6581, 0, PCI_VENDOR_RICOH, PCI_PRODUCT_RICOH_Rx5C478, - 39177, 18587, 6563, 0, + 39425, 18665, 6581, 0, PCI_VENDOR_RICOH, PCI_PRODUCT_RICOH_Rx5C551, - 39183, 18587, 39189, 0, + 39431, 18665, 39437, 0, PCI_VENDOR_RICOH, PCI_PRODUCT_RICOH_Rx5C552, - 39205, 18587, 39189, 0, + 39453, 18665, 39437, 0, PCI_VENDOR_RICOH, PCI_PRODUCT_RICOH_RL5C576, - 39211, 9017, 15031, 6455, 0, + 39459, 9113, 15127, 6473, 0, PCI_VENDOR_RICOH, PCI_PRODUCT_RICOH_Rx5C592, - 39218, 18587, 39224, 0, + 39466, 18665, 39472, 0, PCI_VENDOR_RICOH, PCI_PRODUCT_RICOH_Rx5C593, - 39246, 18587, 39224, 0, + 39494, 18665, 39472, 0, PCI_VENDOR_RICOH, PCI_PRODUCT_RICOH_Rx5C821, - 39252, 18587, 39258, 0, + 39500, 18665, 39506, 0, PCI_VENDOR_RICOH, PCI_PRODUCT_RICOH_Rx5C822, - 39278, 18587, 39258, 0, + 39526, 18665, 39506, 0, PCI_VENDOR_RICOH, PCI_PRODUCT_RICOH_Rx5C832, - 39284, 39290, 0, + 39532, 39538, 0, PCI_VENDOR_RICOH, PCI_PRODUCT_RICOH_Rx5C843, - 39321, 18587, 39327, 0, + 39569, 18665, 39575, 0, PCI_VENDOR_RICOH, PCI_PRODUCT_RICOH_Rx5C847, - 39361, 18587, 39327, 0, + 39609, 18665, 39575, 0, PCI_VENDOR_RICOH, PCI_PRODUCT_RICOH_RxDPCC, - 39367, 15031, 6455, 0, + 39615, 15127, 6473, 0, PCI_VENDOR_RICOH, PCI_PRODUCT_RICOH_Rx5C853, - 39378, 18587, 39384, 0, + 39626, 18665, 39632, 0, PCI_VENDOR_RICOH, PCI_PRODUCT_RICOH_Rx5U230, - 39421, 39427, 6455, 0, + 39669, 39675, 6473, 0, PCI_VENDOR_RICOH, PCI_PRODUCT_RICOH_Rx5U822, - 39449, 32472, 6455, 0, + 39697, 32587, 6473, 0, PCI_VENDOR_RICOH, PCI_PRODUCT_RICOH_Rx5U823, - 39455, 32472, 6455, 0, + 39703, 32587, 6473, 0, PCI_VENDOR_RICOH, PCI_PRODUCT_RICOH_Rx5U832, - 39461, 9235, 6455, 0, + 39709, 9331, 6473, 0, PCI_VENDOR_RICOH, PCI_PRODUCT_RICOH_Rx5C852, - 39467, 16562, 6455, 0, + 39715, 16658, 6473, 0, PCI_VENDOR_RISCOM, PCI_PRODUCT_RISCOM_N2, - 39473, 0, + 39721, 0, PCI_VENDOR_RNS, PCI_PRODUCT_RNS_FDDI, - 24285, 39476, 0, + 24381, 39724, 0, PCI_VENDOR_ROCKCHIP, PCI_PRODUCT_ROCKCHIP_RK3399_RC, - 39481, 8140, 8145, 0, + 39729, 8173, 8178, 0, PCI_VENDOR_S2IO, PCI_PRODUCT_S2IO_XFRAME, - 39488, 9329, 5709, 5717, 5909, 0, + 39736, 9425, 5727, 5735, 5927, 0, PCI_VENDOR_S2IO, PCI_PRODUCT_S2IO_XFRAME2, - 39495, 9329, 5709, 5717, 5909, 0, + 39743, 9425, 5727, 5735, 5927, 0, PCI_VENDOR_S2IO, PCI_PRODUCT_S2IO_XFRAME3, - 39503, 9329, 5709, 5717, 5909, 0, + 39751, 9425, 5727, 5735, 5927, 0, PCI_VENDOR_S3, PCI_PRODUCT_S3_VIRGE, - 39511, 0, + 39759, 0, PCI_VENDOR_S3, PCI_PRODUCT_S3_TRIO32, - 39517, 0, + 39765, 0, PCI_VENDOR_S3, PCI_PRODUCT_S3_TRIO64, - 39524, 0, + 39772, 0, PCI_VENDOR_S3, PCI_PRODUCT_S3_AURORA64P, - 39534, 0, + 39782, 0, PCI_VENDOR_S3, PCI_PRODUCT_S3_TRIO64UVP, - 39545, 0, + 39793, 0, PCI_VENDOR_S3, PCI_PRODUCT_S3_VIRGE_VX, - 39555, 0, + 39803, 0, PCI_VENDOR_S3, PCI_PRODUCT_S3_868, - 39564, 0, + 39812, 0, PCI_VENDOR_S3, PCI_PRODUCT_S3_928, - 39568, 0, + 39816, 0, PCI_VENDOR_S3, PCI_PRODUCT_S3_864_0, - 39575, 39584, 0, + 39823, 39832, 0, PCI_VENDOR_S3, PCI_PRODUCT_S3_864_1, - 39598, 39584, 0, + 39846, 39832, 0, PCI_VENDOR_S3, PCI_PRODUCT_S3_864_2, - 39607, 39584, 0, + 39855, 39832, 0, PCI_VENDOR_S3, PCI_PRODUCT_S3_864_3, - 39616, 39584, 0, + 39864, 39832, 0, PCI_VENDOR_S3, PCI_PRODUCT_S3_964_0, - 39625, 39634, 0, + 39873, 39882, 0, PCI_VENDOR_S3, PCI_PRODUCT_S3_964_1, - 39648, 39634, 0, + 39896, 39882, 0, PCI_VENDOR_S3, PCI_PRODUCT_S3_964_2, - 39657, 39634, 0, + 39905, 39882, 0, PCI_VENDOR_S3, PCI_PRODUCT_S3_964_3, - 39666, 39634, 0, + 39914, 39882, 0, PCI_VENDOR_S3, PCI_PRODUCT_S3_968_0, - 39675, 39684, 0, + 39923, 39932, 0, PCI_VENDOR_S3, PCI_PRODUCT_S3_968_1, - 39698, 39684, 0, + 39946, 39932, 0, PCI_VENDOR_S3, PCI_PRODUCT_S3_968_2, - 39707, 39684, 0, + 39955, 39932, 0, PCI_VENDOR_S3, PCI_PRODUCT_S3_968_3, - 39716, 39684, 0, + 39964, 39932, 0, PCI_VENDOR_S3, PCI_PRODUCT_S3_TRIO64V2_DX, - 39725, 0, + 39973, 0, PCI_VENDOR_S3, PCI_PRODUCT_S3_PLATO_PX, - 39737, 0, + 39985, 0, PCI_VENDOR_S3, PCI_PRODUCT_S3_TRIO3D, - 39746, 39753, 0, + 39994, 40001, 0, PCI_VENDOR_S3, PCI_PRODUCT_S3_VIRGE_DX, - 39760, 0, + 40008, 0, PCI_VENDOR_S3, PCI_PRODUCT_S3_VIRGE_GX2, - 39769, 0, + 40017, 0, PCI_VENDOR_S3, PCI_PRODUCT_S3_TRIO3D2X, - 39779, 0, + 40027, 0, PCI_VENDOR_S3, PCI_PRODUCT_S3_SAVAGE3D, - 39789, 0, + 40037, 0, PCI_VENDOR_S3, PCI_PRODUCT_S3_SAVAGE3D_MV, - 39798, 0, + 40046, 0, PCI_VENDOR_S3, PCI_PRODUCT_S3_SAVAGE4, - 39810, 0, + 40058, 0, PCI_VENDOR_S3, PCI_PRODUCT_S3_PROSAVAGE_KM133, - 39818, 39828, 0, + 40066, 40076, 0, PCI_VENDOR_S3, PCI_PRODUCT_S3_VIRGE_MX, - 39834, 0, + 40082, 0, PCI_VENDOR_S3, PCI_PRODUCT_S3_VIRGE_MXP, - 39843, 0, + 40091, 0, PCI_VENDOR_S3, PCI_PRODUCT_S3_SAVAGE_MX_MV, - 39853, 0, + 40101, 0, PCI_VENDOR_S3, PCI_PRODUCT_S3_SAVAGE_MX, - 39866, 0, + 40114, 0, PCI_VENDOR_S3, PCI_PRODUCT_S3_SAVAGE_IX_MV, - 39876, 0, + 40124, 0, PCI_VENDOR_S3, PCI_PRODUCT_S3_SAVAGE_IX, - 39889, 0, + 40137, 0, PCI_VENDOR_S3, PCI_PRODUCT_S3_SAVAGE_IXC, - 39899, 0, + 40147, 0, PCI_VENDOR_S3, PCI_PRODUCT_S3_CHROME_500, - 39910, 26993, 39917, 39924, 0, + 40158, 27089, 40165, 40172, 0, PCI_VENDOR_S3, PCI_PRODUCT_S3_SAVAGE2000, - 39934, 0, + 40182, 0, PCI_VENDOR_S3, PCI_PRODUCT_S3_SONICVIBES, - 39945, 0, + 40193, 0, PCI_VENDOR_SAFENET, PCI_PRODUCT_SAFENET_SAFEXCEL, - 39956, 0, + 40204, 0, PCI_VENDOR_SAMSUNGELEC3, PCI_PRODUCT_SAMSUNGELEC3_XP941, - 39965, 39971, 7962, 0, + 40213, 40219, 7995, 0, PCI_VENDOR_SAMSUNGELEC3, PCI_PRODUCT_SAMSUNGELEC3_SM951, - 39975, 39971, 7962, 0, + 40223, 40219, 7995, 0, PCI_VENDOR_SAMSUNGELEC3, PCI_PRODUCT_SAMSUNGELEC3_SM951_NVME, - 39975, 39971, 7957, 7962, 0, + 40223, 40219, 7990, 7995, 0, PCI_VENDOR_SAMSUNGELEC3, PCI_PRODUCT_SAMSUNGELEC3_SM961, - 39981, 39971, 7957, 7962, 0, + 40229, 40219, 7990, 7995, 0, PCI_VENDOR_SAMSUNGELEC3, PCI_PRODUCT_SAMSUNGELEC3_SM981, - 39987, 39971, 7957, 7962, 0, + 40235, 40219, 7990, 7995, 0, PCI_VENDOR_SAMSUNGELEC3, PCI_PRODUCT_SAMSUNGELEC3_SM980, - 39993, 39971, 7957, 7962, 0, + 40241, 40219, 7990, 7995, 0, PCI_VENDOR_SAMSUNGELEC3, PCI_PRODUCT_SAMSUNGELEC3_PM9A1, - 39999, 39971, 7957, 7962, 0, + 40247, 40219, 7990, 7995, 0, PCI_VENDOR_SAMSUNGELEC3, PCI_PRODUCT_SAMSUNGELEC3_SM990, - 40005, 39971, 7957, 7962, 0, + 40253, 40219, 7990, 7995, 0, PCI_VENDOR_SAMSUNGELEC3, PCI_PRODUCT_SAMSUNGELEC3_171X, - 7957, 7962, 6455, 40011, 0, + 7990, 7995, 6473, 40259, 0, PCI_VENDOR_SAMSUNGELEC3, PCI_PRODUCT_SAMSUNGELEC3_172X, - 7957, 7962, 6455, 40016, 0, + 7990, 7995, 6473, 40264, 0, PCI_VENDOR_SAMSUNGELEC3, PCI_PRODUCT_SAMSUNGELEC3_172XAB, - 7957, 7962, 6455, 40021, 0, + 7990, 7995, 6473, 40269, 0, PCI_VENDOR_SAMSUNGELEC3, PCI_PRODUCT_SAMSUNGELEC3_PM173X, - 7957, 7962, 6455, 40033, 0, + 7990, 7995, 6473, 40281, 0, PCI_VENDOR_SAMSUNGELEC3, PCI_PRODUCT_SAMSUNGELEC3_PM173Xa, - 7957, 7962, 6455, 40040, 0, + 7990, 7995, 6473, 40288, 0, PCI_VENDOR_SAMSUNGELEC3, PCI_PRODUCT_SAMSUNGELEC3_PM174X, - 7957, 7962, 6455, 40048, 0, + 7990, 7995, 6473, 40296, 0, PCI_VENDOR_SAMSUNGSEMI, PCI_PRODUCT_SAMSUNGSEMI_KS8920, - 40055, 5819, 5717, 0, + 40303, 5837, 5735, 0, PCI_VENDOR_SANDBURST, PCI_PRODUCT_SANDBURST_QE1000, - 40062, 0, + 40310, 0, PCI_VENDOR_SANDBURST, PCI_PRODUCT_SANDBURST_FE1000, - 40069, 0, + 40317, 0, PCI_VENDOR_SANDISK, PCI_PRODUCT_SANDISK_WDBLACK_NVME, - 40076, 40079, 7957, 7962, 0, + 40324, 40327, 7990, 7995, 0, PCI_VENDOR_SANDISK, PCI_PRODUCT_SANDISK_WDBLUE_SN550, - 40076, 40085, 40090, 7957, 7962, 0, + 40324, 40333, 40338, 7990, 7995, 0, PCI_VENDOR_SEGA, PCI_PRODUCT_SEGA_BROADBAND, - 40096, 5909, 0, + 40344, 5927, 0, PCI_VENDOR_SERVERENGINES, PCI_PRODUCT_SERVERENGINES_BE2, - 40106, 8538, 0, + 40354, 8571, 0, PCI_VENDOR_SERVERENGINES, PCI_PRODUCT_SERVERENGINES_BE3, - 40119, 8538, 0, + 40367, 8571, 0, PCI_VENDOR_SERVERENGINES, PCI_PRODUCT_SERVERENGINES_OCBE2, - 40106, 8538, 0, + 40354, 8571, 0, PCI_VENDOR_SERVERENGINES, PCI_PRODUCT_SERVERENGINES_OCBE3, - 40119, 8538, 0, + 40367, 8571, 0, PCI_VENDOR_SERVERENGINES, PCI_PRODUCT_SERVERENGINES_IRMC, - 40132, 0, + 40380, 0, PCI_VENDOR_SERVERWORKS, PCI_PRODUCT_SERVERWORKS_CNB20_LE_AGP, - 40137, 40146, 6563, 0, + 40385, 40394, 6581, 0, PCI_VENDOR_SERVERWORKS, PCI_PRODUCT_SERVERWORKS_CNB30_LE_PCI, - 40154, 615, 6563, 0, + 40402, 615, 6581, 0, PCI_VENDOR_SERVERWORKS, PCI_PRODUCT_SERVERWORKS_CNB20_LE_PCI, - 40137, 615, 6563, 0, + 40385, 615, 6581, 0, PCI_VENDOR_SERVERWORKS, PCI_PRODUCT_SERVERWORKS_CNB20_HE_PCI, - 40163, 615, 6563, 0, + 40411, 615, 6581, 0, PCI_VENDOR_SERVERWORKS, PCI_PRODUCT_SERVERWORKS_CNB20_HE_AGP, - 40163, 40146, 6563, 0, + 40411, 40394, 6581, 0, PCI_VENDOR_SERVERWORKS, PCI_PRODUCT_SERVERWORKS_CIOB_X, - 40172, 8885, 6563, 0, + 40420, 8981, 6581, 0, PCI_VENDOR_SERVERWORKS, PCI_PRODUCT_SERVERWORKS_CMIC_HE, - 40179, 40146, 6563, 0, + 40427, 40394, 6581, 0, PCI_VENDOR_SERVERWORKS, PCI_PRODUCT_SERVERWORKS_CNB30_HE, - 40187, 615, 6563, 0, + 40435, 615, 6581, 0, PCI_VENDOR_SERVERWORKS, PCI_PRODUCT_SERVERWORKS_CNB20_HE_PCI2, - 40163, 40146, 6563, 0, + 40411, 40394, 6581, 0, PCI_VENDOR_SERVERWORKS, PCI_PRODUCT_SERVERWORKS_CMIC_LE, - 40196, 40146, 6563, 0, + 40444, 40394, 6581, 0, PCI_VENDOR_SERVERWORKS, PCI_PRODUCT_SERVERWORKS_CMIC_SL, - 40204, 40146, 6563, 0, + 40452, 40394, 6581, 0, PCI_VENDOR_SERVERWORKS, PCI_PRODUCT_SERVERWORKS_HT1000_PPB0, - 40212, 34725, 6563, 0, + 40460, 34849, 6581, 0, PCI_VENDOR_SERVERWORKS, PCI_PRODUCT_SERVERWORKS_CIOB_X2, - 40219, 8885, 6563, 0, + 40467, 8981, 6581, 0, PCI_VENDOR_SERVERWORKS, PCI_PRODUCT_SERVERWORKS_BCM5714, - 40227, 40243, 21948, 7009, 8885, 6563, 0, + 40475, 40491, 22044, 7027, 8981, 6581, 0, PCI_VENDOR_SERVERWORKS, PCI_PRODUCT_SERVERWORKS_HT1000_PPB1, - 40212, 34725, 6563, 0, + 40460, 34849, 6581, 0, PCI_VENDOR_SERVERWORKS, PCI_PRODUCT_SERVERWORKS_CIOB_E, - 40252, 8885, 6563, 0, + 40500, 8981, 6581, 0, PCI_VENDOR_SERVERWORKS, PCI_PRODUCT_SERVERWORKS_HT2100_PPB0, - 40259, 33611, 6563, 0, + 40507, 33735, 6581, 0, PCI_VENDOR_SERVERWORKS, PCI_PRODUCT_SERVERWORKS_HT2100_PPB1, - 40259, 33611, 6563, 0, + 40507, 33735, 6581, 0, PCI_VENDOR_SERVERWORKS, PCI_PRODUCT_SERVERWORKS_HT2100_PPB2, - 40259, 33611, 6563, 0, + 40507, 33735, 6581, 0, PCI_VENDOR_SERVERWORKS, PCI_PRODUCT_SERVERWORKS_HT2100_PPB3, - 40259, 33611, 6563, 0, + 40507, 33735, 6581, 0, PCI_VENDOR_SERVERWORKS, PCI_PRODUCT_SERVERWORKS_OSB4, - 40266, 8710, 6563, 0, + 40514, 8743, 6581, 0, PCI_VENDOR_SERVERWORKS, PCI_PRODUCT_SERVERWORKS_CSB5, - 40271, 8710, 6563, 0, + 40519, 8743, 6581, 0, PCI_VENDOR_SERVERWORKS, PCI_PRODUCT_SERVERWORKS_CSB6, - 40276, 8710, 6563, 0, + 40524, 8743, 6581, 0, PCI_VENDOR_SERVERWORKS, PCI_PRODUCT_SERVERWORKS_HT1000SB, - 40281, 8710, 6563, 0, + 40529, 8743, 6581, 0, PCI_VENDOR_SERVERWORKS, PCI_PRODUCT_SERVERWORKS_OSB4_IDE, - 40266, 6626, 0, + 40514, 6644, 0, PCI_VENDOR_SERVERWORKS, PCI_PRODUCT_SERVERWORKS_CSB5_IDE, - 40271, 6626, 0, + 40519, 6644, 0, PCI_VENDOR_SERVERWORKS, PCI_PRODUCT_SERVERWORKS_CSB6_RAID, - 40276, 40290, 0, + 40524, 40538, 0, PCI_VENDOR_SERVERWORKS, PCI_PRODUCT_SERVERWORKS_HT1000_IDE, - 40299, 6626, 6455, 0, + 40547, 6644, 6473, 0, PCI_VENDOR_SERVERWORKS, PCI_PRODUCT_SERVERWORKS_CSB6_IDE, - 40276, 40290, 0, + 40524, 40538, 0, PCI_VENDOR_SERVERWORKS, PCI_PRODUCT_SERVERWORKS_OSB4_USB, - 40307, 6945, 6953, 6455, 0, + 40555, 6963, 6971, 6473, 0, PCI_VENDOR_SERVERWORKS, PCI_PRODUCT_SERVERWORKS_CSB6_USB, - 40276, 6945, 6953, 6455, 0, + 40524, 6963, 6971, 6473, 0, PCI_VENDOR_SERVERWORKS, PCI_PRODUCT_SERVERWORKS_HT1000_USB, - 40212, 6945, 0, + 40460, 6963, 0, PCI_VENDOR_SERVERWORKS, PCI_PRODUCT_SERVERWORKS_CSB5_LPC, - 40271, 40317, 6563, 0, + 40519, 40565, 6581, 0, PCI_VENDOR_SERVERWORKS, PCI_PRODUCT_SERVERWORKS_CSB6_LPC, - 40276, 40317, 6563, 0, + 40524, 40565, 6581, 0, PCI_VENDOR_SERVERWORKS, PCI_PRODUCT_SERVERWORKS_HT1000_LPC, - 40212, 8958, 0, + 40460, 9054, 0, PCI_VENDOR_SERVERWORKS, PCI_PRODUCT_SERVERWORKS_HT1000_XIOAPIC, - 40212, 40325, 0, + 40460, 40573, 0, PCI_VENDOR_SERVERWORKS, PCI_PRODUCT_SERVERWORKS_HT1000_WDTIMER, - 40212, 23547, 20920, 0, + 40460, 23643, 21016, 0, PCI_VENDOR_SERVERWORKS, PCI_PRODUCT_SERVERWORKS_K2_SATA, - 9288, 8762, 0, + 9384, 8800, 0, PCI_VENDOR_SERVERWORKS, PCI_PRODUCT_SERVERWORKS_FRODO4_SATA, - 40333, 8762, 0, + 40581, 8800, 0, PCI_VENDOR_SERVERWORKS, PCI_PRODUCT_SERVERWORKS_FRODO8_SATA, - 40340, 8762, 0, + 40588, 8800, 0, PCI_VENDOR_SERVERWORKS, PCI_PRODUCT_SERVERWORKS_HT1000_SATA_1, - 40299, 8762, 0, + 40547, 8800, 0, PCI_VENDOR_SERVERWORKS, PCI_PRODUCT_SERVERWORKS_HT1000_SATA_2, - 40299, 8762, 0, + 40547, 8800, 0, PCI_VENDOR_SERVERWORKS, PCI_PRODUCT_SERVERWORKS_HT1100SB, - 40347, 8710, 6563, 0, + 40595, 8743, 6581, 0, PCI_VENDOR_SERVERWORKS, PCI_PRODUCT_SERVERWORKS_HT1100_SATA_1, - 40356, 8762, 0, + 40604, 8800, 0, PCI_VENDOR_SERVERWORKS, PCI_PRODUCT_SERVERWORKS_HT1100_SATA_2, - 40356, 8762, 0, + 40604, 8800, 0, PCI_VENDOR_SGI, PCI_PRODUCT_SGI_IOC3, - 40364, 0, + 40612, 0, PCI_VENDOR_SGI, PCI_PRODUCT_SGI_RAD1, - 40369, 40377, 0, + 40617, 40625, 0, PCI_VENDOR_SGI, PCI_PRODUCT_SGI_TIGON, - 40382, 5709, 5717, 0, + 40630, 5727, 5735, 0, PCI_VENDOR_SGSTHOMSON, PCI_PRODUCT_SGSTHOMSON_2000, - 40388, 40392, 0, + 40636, 40640, 0, PCI_VENDOR_SGSTHOMSON, PCI_PRODUCT_SGSTHOMSON_2000_VGA, - 40388, 40392, 8679, 0, + 40636, 40640, 8712, 0, PCI_VENDOR_SGSTHOMSON, PCI_PRODUCT_SGSTHOMSON_1764, - 40388, 40398, 0, + 40636, 40646, 0, PCI_VENDOR_SIBYTE, PCI_PRODUCT_SIBYTE_BCM1250_PCIHB, - 40404, 615, 6953, 6563, 0, + 40652, 615, 6971, 6581, 0, PCI_VENDOR_SIBYTE, PCI_PRODUCT_SIBYTE_BCM1250_LDTHB, - 40404, 40412, 6953, 6563, 0, + 40652, 40660, 6971, 6581, 0, PCI_VENDOR_SIGMA, PCI_PRODUCT_SIGMA_HOLLYWOODPLUS, - 40416, 40426, 40441, 6919, 0, + 40664, 40674, 40689, 6937, 0, PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_CYBER10_S550, - 40448, 14833, 40457, 615, 0, + 40696, 14929, 40705, 615, 0, PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_CYBER10_S650, - 40448, 14833, 40463, 615, 0, + 40696, 14929, 40711, 615, 0, PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_CYBER10_S850, - 40448, 14833, 40469, 615, 0, + 40696, 14929, 40717, 615, 0, PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_CYBER10_IO550, - 40448, 8945, 40457, 615, 0, + 40696, 9041, 40705, 615, 0, PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_CYBER10_IO650, - 40448, 8945, 40463, 615, 0, + 40696, 9041, 40711, 615, 0, PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_CYBER10_IO850, - 40448, 8945, 40469, 615, 0, + 40696, 9041, 40717, 615, 0, PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_CYBER10_P, - 40448, 17862, 615, 0, + 40696, 17946, 615, 0, PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_CYBER10_2P, - 40448, 17862, 11247, 615, 0, + 40696, 17946, 11362, 615, 0, PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_CYBER10_2S550, - 40448, 14833, 11247, 40457, 615, 0, + 40696, 14929, 11362, 40705, 615, 0, PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_CYBER10_2S650, - 40448, 14833, 11247, 40463, 615, 0, + 40696, 14929, 11362, 40711, 615, 0, PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_CYBER10_2S850, - 40448, 14833, 11247, 40469, 615, 0, + 40696, 14929, 11362, 40717, 615, 0, PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_CYBER10_2S1P550, - 40448, 40475, 40457, 615, 0, + 40696, 40723, 40705, 615, 0, PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_CYBER10_2S1P650, - 40448, 40475, 40463, 615, 0, + 40696, 40723, 40711, 615, 0, PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_CYBER10_2S1P850, - 40448, 40475, 40469, 615, 0, + 40696, 40723, 40717, 615, 0, PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_CYBER10_4S550, - 40448, 38071, 40457, 615, 0, + 40696, 38314, 40705, 615, 0, PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_CYBER10_4S650, - 40448, 38071, 40463, 615, 0, + 40696, 38314, 40711, 615, 0, PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_CYBER10_4S850, - 40448, 38071, 40469, 615, 0, + 40696, 38314, 40717, 615, 0, PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_CYBER20_S550, - 40480, 14833, 40457, 615, 0, + 40728, 14929, 40705, 615, 0, PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_CYBER20_S650, - 40480, 14833, 40463, 615, 0, + 40728, 14929, 40711, 615, 0, PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_CYBER20_S850, - 40480, 14833, 40469, 615, 0, + 40728, 14929, 40717, 615, 0, PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_CYBER20_IO550, - 40480, 8945, 40457, 615, 0, + 40728, 9041, 40705, 615, 0, PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_CYBER20_IO650, - 40480, 8945, 40463, 615, 0, + 40728, 9041, 40711, 615, 0, PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_CYBER20_IO850, - 40480, 8945, 40469, 615, 0, + 40728, 9041, 40717, 615, 0, PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_CYBER20_P, - 40480, 17862, 615, 0, + 40728, 17946, 615, 0, PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_CYBER20_2P, - 40480, 17862, 11247, 615, 0, + 40728, 17946, 11362, 615, 0, PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_CYBER20_2S550, - 40480, 14833, 11247, 40457, 615, 0, + 40728, 14929, 11362, 40705, 615, 0, PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_CYBER20_2S650, - 40480, 14833, 11247, 40463, 615, 0, + 40728, 14929, 11362, 40711, 615, 0, PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_CYBER20_2S850, - 40480, 14833, 11247, 40469, 615, 0, + 40728, 14929, 11362, 40717, 615, 0, PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_CYBER20_2P1S550, - 40480, 40489, 40457, 615, 0, + 40728, 40737, 40705, 615, 0, PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_CYBER20_2P1S650, - 40480, 40489, 40463, 615, 0, + 40728, 40737, 40711, 615, 0, PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_CYBER20_2P1S850, - 40480, 40489, 40469, 615, 0, + 40728, 40737, 40717, 615, 0, PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_CYBER20_4S550, - 40480, 38071, 40457, 615, 0, + 40728, 38314, 40705, 615, 0, PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_CYBER20_4S650, - 40480, 38071, 40463, 615, 0, + 40728, 38314, 40711, 615, 0, PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_CYBER20_4S850, - 40480, 38071, 40469, 615, 0, + 40728, 38314, 40717, 615, 0, PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_CYBER20_2S1P550, - 40480, 40475, 40457, 615, 0, + 40728, 40723, 40705, 615, 0, PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_CYBER20_2S1P650, - 40480, 40475, 40463, 615, 0, + 40728, 40723, 40711, 615, 0, PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_CYBER20_2S1P850, - 40480, 40475, 40469, 615, 0, + 40728, 40723, 40717, 615, 0, PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_PS8000P550, - 615, 14833, 36304, 19240, 40457, 0, + 615, 14929, 36540, 19318, 40705, 0, PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_PS8000P650, - 615, 14833, 36304, 19240, 40463, 0, + 615, 14929, 36540, 19318, 40711, 0, PCI_VENDOR_SIIG, PCI_PRODUCT_SIIG_PS8000P850, - 615, 14833, 36304, 19240, 40469, 0, + 615, 14929, 36540, 19318, 40717, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_86C201, - 40494, 0, + 40742, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_86C202, - 40501, 0, + 40749, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_86C205, - 40508, 0, + 40756, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_85C503, - 40515, 22213, 40522, 23031, 6563, 0, + 40763, 22309, 40770, 23127, 6581, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_600PMC, - 14633, 3740, 40532, 6455, 0, + 8849, 3740, 40780, 6473, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_180_SATA, - 40538, 8762, 6455, 0, + 40786, 8800, 6473, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_181_SATA, - 40542, 8762, 6455, 0, + 40790, 8800, 6473, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_182_SATA, - 40546, 8762, 6455, 0, + 40794, 8800, 6473, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_183_SATA, - 40550, 8762, 17722, 0, + 40798, 8800, 17806, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_190, - 40554, 5717, 0, + 40802, 5735, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_191, - 40558, 5709, 5717, 0, + 40806, 5727, 5735, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_5597_VGA, - 40522, 692, 8679, 0, + 40770, 692, 8712, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_300, - 40562, 8804, 8679, 0, + 40810, 8900, 8712, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_315PRO_VGA, - 40570, 7253, 8679, 0, + 40818, 7271, 8712, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_85C501, - 40574, 0, + 40822, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_85C496, - 40581, 0, + 40829, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_530HB, - 26993, 6851, 6563, 0, + 27089, 6869, 6581, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_540HB, - 35148, 6851, 6563, 0, + 35272, 6869, 6581, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_550HB, - 12196, 6851, 6563, 0, + 12306, 6869, 6581, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_85C601, - 40588, 0, + 40836, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_620, - 29513, 6953, 6563, 0, + 29595, 6971, 6581, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_630, - 29504, 6953, 6563, 0, + 29586, 6971, 6581, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_633, - 40595, 6953, 6563, 0, + 40843, 6971, 6581, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_635, - 35790, 6953, 6563, 0, + 36036, 6971, 6581, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_640, - 13039, 6953, 6563, 0, + 13149, 6971, 6581, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_645, - 29521, 6953, 6563, 0, + 29603, 6971, 6581, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_646, - 40599, 6953, 6563, 0, + 40847, 6971, 6581, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_648, - 40603, 6953, 6563, 0, + 40851, 6971, 6581, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_650, - 30662, 6953, 6563, 0, + 30738, 6971, 6581, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_651, - 40607, 6953, 6563, 0, + 40855, 6971, 6581, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_652, - 40611, 6953, 6563, 0, + 40859, 6971, 6581, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_655, - 29517, 6953, 6563, 0, + 29599, 6971, 6581, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_658, - 40615, 6953, 6563, 0, + 40863, 6971, 6581, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_661, - 40619, 6953, 6563, 0, + 40867, 6971, 6581, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_671, - 40623, 6953, 6563, 0, + 40871, 6971, 6581, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_730, - 30304, 6953, 6563, 0, + 30386, 6971, 6581, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_733, - 40627, 6953, 6563, 0, + 40875, 6971, 6581, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_735, - 40631, 6953, 6563, 0, + 40879, 6971, 6581, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_740, - 40635, 6953, 6563, 0, + 35819, 6971, 6581, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_741, - 40639, 6953, 6563, 0, + 40883, 6971, 6581, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_745, - 35942, 6953, 6563, 0, + 36178, 6971, 6581, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_746, - 40643, 6953, 6563, 0, + 40887, 6971, 6581, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_748, - 40647, 6953, 6563, 0, + 40891, 6971, 6581, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_750, - 24354, 6953, 6563, 0, + 24450, 6971, 6581, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_751, - 40651, 6953, 6563, 0, + 40895, 6971, 6581, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_752, - 40655, 6953, 6563, 0, + 40899, 6971, 6581, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_755, - 40659, 6953, 6563, 0, + 40903, 6971, 6581, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_756, - 40663, 6953, 6563, 0, + 40907, 6971, 6581, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_760, - 40667, 6953, 6563, 0, + 40911, 6971, 6581, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_761, - 40671, 6953, 6563, 0, + 40915, 6971, 6581, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_900, - 40675, 5819, 5717, 0, + 40919, 5837, 5735, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_961, - 40679, 6953, 6563, 0, + 40923, 6971, 6581, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_962, - 40683, 6953, 6563, 0, + 40927, 6971, 6581, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_963, - 40687, 6953, 6563, 0, + 40931, 6971, 6581, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_964, - 40691, 6953, 6563, 0, + 40935, 6971, 6581, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_965, - 40695, 6953, 6563, 0, + 40939, 6971, 6581, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_966, - 40699, 6953, 6563, 0, + 40943, 6971, 6581, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_968, - 40703, 6953, 6563, 0, + 40947, 6971, 6581, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_5597_IDE, - 40522, 6626, 6455, 0, + 40770, 6644, 6473, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_5597_HB, - 40522, 6953, 6563, 0, + 40770, 6971, 6581, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_6300, - 29504, 8804, 8679, 0, + 29586, 8900, 8712, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_530VGA, - 26993, 40707, 40711, 0, + 27089, 40951, 40955, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_6325, - 30662, 8804, 8679, 0, + 30738, 8900, 8712, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_6326, - 40726, 8804, 8679, 0, + 40970, 8900, 8712, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_6330, - 40731, 8679, 0, + 40975, 8712, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_5597_USB, - 40522, 6945, 6953, 6455, 0, + 40770, 6963, 6971, 6473, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_7002, - 40736, 6945, 6964, 6953, 6455, 0, + 40980, 6963, 6982, 6971, 6473, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_7012_AC, - 40741, 27586, 3384, 0, + 40985, 27682, 3384, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_7013, - 40746, 5764, 0, + 40990, 5782, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_7016, - 40751, 5819, 5717, 0, + 40995, 5837, 5735, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_7018, - 40756, 3384, 0, + 41000, 3384, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_7019, - 40761, 7054, 0, + 41005, 7072, 0, PCI_VENDOR_SIS, PCI_PRODUCT_SIS_7502, - 40766, 8230, 24478, 0, + 41010, 8263, 24574, 0, PCI_VENDOR_SILMOTION, PCI_PRODUCT_SILMOTION_SM502, - 40771, 10595, 0, + 41015, 10710, 0, PCI_VENDOR_SILMOTION, PCI_PRODUCT_SILMOTION_SM710, - 40779, 0, + 41023, 0, PCI_VENDOR_SILMOTION, PCI_PRODUCT_SILMOTION_SM712, - 40786, 0, + 41030, 0, PCI_VENDOR_SILMOTION, PCI_PRODUCT_SILMOTION_SM720, - 40794, 0, + 41038, 0, PCI_VENDOR_SILMOTION, PCI_PRODUCT_SILMOTION_SM810, - 40802, 0, + 41046, 0, PCI_VENDOR_SILMOTION, PCI_PRODUCT_SILMOTION_SM811, - 40802, 0, + 41046, 0, PCI_VENDOR_SILMOTION, PCI_PRODUCT_SILMOTION_SM820, - 40808, 0, + 41052, 0, PCI_VENDOR_SILMOTION, PCI_PRODUCT_SILMOTION_SM910, - 40815, 0, + 41059, 0, PCI_VENDOR_SMC, PCI_PRODUCT_SMC_83C170, - 40820, 40827, 2430, 5717, 0, + 41064, 41071, 2430, 5735, 0, PCI_VENDOR_SMC, PCI_PRODUCT_SMC_83C175, - 40840, 40827, 2430, 5717, 0, + 41084, 41071, 2430, 5735, 0, PCI_VENDOR_SMC, PCI_PRODUCT_SMC_37C665, - 40847, 0, + 41091, 0, PCI_VENDOR_SMC, PCI_PRODUCT_SMC_37C922, - 40857, 0, + 41101, 0, PCI_VENDOR_SOLIDUM, PCI_PRODUCT_SOLIDUM_PAXWARE1100, - 40867, 33518, 11247, 40876, 40879, 24997, 0, + 41111, 33642, 11362, 41120, 41123, 25093, 0, PCI_VENDOR_SOLIDUM, PCI_PRODUCT_SOLIDUM_AMD971, - 40890, 458, 40899, 0, + 41134, 458, 41143, 0, PCI_VENDOR_SOLIDUM, PCI_PRODUCT_SOLIDUM_CLASS802, - 40890, 40879, 24997, 0, + 41134, 41123, 25093, 0, PCI_VENDOR_SONY, PCI_PRODUCT_SONY_CXD1947A, - 40903, 20632, 20637, 6953, 6455, 0, + 41147, 20728, 20733, 6971, 6473, 0, PCI_VENDOR_SONY, PCI_PRODUCT_SONY_CXD3222, - 40912, 20632, 20637, 6953, 6455, 0, + 41156, 20728, 20733, 6971, 6473, 0, PCI_VENDOR_SONY, PCI_PRODUCT_SONY_MEMSTICK, - 4504, 32479, 27846, 6455, 0, + 4504, 32594, 27942, 6473, 0, PCI_VENDOR_SUN, PCI_PRODUCT_SUN_EBUS, - 40920, 40925, 0, + 41164, 41169, 0, PCI_VENDOR_SUN, PCI_PRODUCT_SUN_HMENETWORK, - 40920, 40931, 40937, 5717, 0, + 41164, 41175, 41181, 5735, 0, PCI_VENDOR_SUN, PCI_PRODUCT_SUN_EBUSIII, - 40920, 40925, 40942, 40946, 0, + 41164, 41169, 41186, 41190, 0, PCI_VENDOR_SUN, PCI_PRODUCT_SUN_ERINETWORK, - 40951, 5717, 0, + 41195, 5735, 0, PCI_VENDOR_SUN, PCI_PRODUCT_SUN_FIREWIRE, - 9313, 6455, 0, + 9409, 6473, 0, PCI_VENDOR_SUN, PCI_PRODUCT_SUN_USB, - 6945, 6455, 0, + 6963, 6473, 0, PCI_VENDOR_SUN, PCI_PRODUCT_SUN_GEMNETWORK, - 40955, 5709, 5717, 0, + 41199, 5727, 5735, 0, PCI_VENDOR_SUN, PCI_PRODUCT_SUN_SIMBA, - 40959, 615, 6563, 0, + 41203, 615, 6581, 0, PCI_VENDOR_SUN, PCI_PRODUCT_SUN_5821, - 40965, 0, + 41209, 0, PCI_VENDOR_SUN, PCI_PRODUCT_SUN_SCA1K, - 8223, 7847, 20323, 0, + 8256, 7880, 20401, 0, PCI_VENDOR_SUN, PCI_PRODUCT_SUN_PSYCHO, - 40973, 615, 6455, 0, + 41217, 615, 6473, 0, PCI_VENDOR_SUN, PCI_PRODUCT_SUN_MS_IIep, - 40980, 40991, 615, 0, + 41224, 41235, 615, 0, PCI_VENDOR_SUN, PCI_PRODUCT_SUN_US_IIi, - 40996, 41007, 615, 0, + 41240, 41251, 615, 0, PCI_VENDOR_SUN, PCI_PRODUCT_SUN_US_IIe, - 40996, 21883, 615, 0, + 41240, 21979, 615, 0, PCI_VENDOR_SUN, PCI_PRODUCT_SUN_CASSINI, - 41011, 5709, 5717, 0, + 41255, 5727, 5735, 0, PCI_VENDOR_SUN, PCI_PRODUCT_SUN_NEPTUNE, - 41019, 0, + 41263, 0, PCI_VENDOR_SUNDANCETI, PCI_PRODUCT_SUNDANCETI_IP100A, - 41027, 5819, 5717, 0, + 41271, 5837, 5735, 0, PCI_VENDOR_SUNDANCETI, PCI_PRODUCT_SUNDANCETI_ST201, - 41034, 5819, 5717, 0, + 41278, 5837, 5735, 0, PCI_VENDOR_SUNDANCETI, PCI_PRODUCT_SUNDANCETI_ST1023, - 41040, 5709, 5717, 0, + 41284, 5727, 5735, 0, PCI_VENDOR_SUNDANCETI, PCI_PRODUCT_SUNDANCETI_ST2021, - 41047, 5709, 5717, 0, + 41291, 5727, 5735, 0, PCI_VENDOR_SUNIX2, PCI_PRODUCT_SUNIX2_0001, - 41054, 6761, 41061, 0, + 41298, 6779, 41305, 0, PCI_VENDOR_SUNIX2, PCI_PRODUCT_SUNIX2_SER5XXXX, - 41069, 41077, 6761, 0, + 41313, 41321, 6779, 0, PCI_VENDOR_SUNIX, PCI_PRODUCT_SUNIX_PCI2S550, - 41087, 41077, 6761, 0, + 41331, 41321, 6779, 0, PCI_VENDOR_SUNIX, PCI_PRODUCT_SUNIX_SUN1888, - 41096, 41077, 41104, 0, + 41340, 41321, 41348, 0, PCI_VENDOR_SURECOM, PCI_PRODUCT_SURECOM_NE34, - 41113, 5717, 0, + 41357, 5735, 0, PCI_VENDOR_SYBA, PCI_PRODUCT_SYBA_4S2P, - 41119, 0, + 41363, 0, PCI_VENDOR_SYBA, PCI_PRODUCT_SYBA_4S, - 38071, 0, + 38314, 0, PCI_VENDOR_SYMPHONY, PCI_PRODUCT_SYMPHONY_82C101, - 41124, 0, + 41368, 0, PCI_VENDOR_SYMPHONY, PCI_PRODUCT_SYMPHONY_82C103, - 41131, 0, + 41375, 0, PCI_VENDOR_SYMPHONY, PCI_PRODUCT_SYMPHONY_82C105, - 41138, 0, + 41382, 0, PCI_VENDOR_SYMPHONY2, PCI_PRODUCT_SYMPHONY2_82C101, - 41124, 0, + 41368, 0, PCI_VENDOR_SYMPHONY, PCI_PRODUCT_SYMPHONY_83C553, - 41145, 6837, 6563, 0, + 41389, 6855, 6581, 0, PCI_VENDOR_SYSTEMBASE, PCI_PRODUCT_SYSTEMBASE_SB16C1054, - 41152, 41162, 0, + 41396, 41406, 0, PCI_VENDOR_SYSTEMBASE, PCI_PRODUCT_SYSTEMBASE_SB16C1058, - 41168, 41162, 0, + 41412, 41406, 0, PCI_VENDOR_SYSTEMBASE, PCI_PRODUCT_SYSTEMBASE_SB16C1050, - 41178, 41162, 0, + 41422, 41406, 0, PCI_VENDOR_SCHNEIDERKOCH, PCI_PRODUCT_SCHNEIDERKOCH_SKNET_FDDI, - 21446, 41188, 0, + 21542, 41432, 0, PCI_VENDOR_SCHNEIDERKOCH, PCI_PRODUCT_SCHNEIDERKOCH_SKNET_GE, - 21446, 35615, 0, + 21542, 35745, 0, PCI_VENDOR_SCHNEIDERKOCH, PCI_PRODUCT_SCHNEIDERKOCH_SK9821v2, - 41196, 9941, 0, + 41440, 10037, 0, PCI_VENDOR_SCHNEIDERKOCH, PCI_PRODUCT_SCHNEIDERKOCH_SK_9DX1, - 21446, 41204, 5709, 5717, 0, + 21542, 41448, 5727, 5735, 0, PCI_VENDOR_SCHNEIDERKOCH, PCI_PRODUCT_SCHNEIDERKOCH_SK_9MXX, - 21446, 41212, 5709, 5717, 0, + 21542, 41456, 5727, 5735, 0, PCI_VENDOR_SCHNEIDERKOCH, PCI_PRODUCT_SCHNEIDERKOCH_SK_9D21, - 41220, 41228, 0, + 41464, 41472, 0, PCI_VENDOR_SCHNEIDERKOCH, PCI_PRODUCT_SCHNEIDERKOCH_SK_9D41, - 41239, 41247, 0, + 41483, 41491, 0, PCI_VENDOR_SCHNEIDERKOCH, PCI_PRODUCT_SCHNEIDERKOCH_SK_9SXX, - 41258, 5709, 5717, 0, + 41502, 5727, 5735, 0, PCI_VENDOR_SCHNEIDERKOCH, PCI_PRODUCT_SCHNEIDERKOCH_SK_9E21, - 41266, 41283, 0, + 41510, 41527, 0, PCI_VENDOR_TAMARACK, PCI_PRODUCT_TAMARACK_TC9021, - 41294, 5709, 5717, 0, + 41538, 5727, 5735, 0, PCI_VENDOR_TAMARACK, PCI_PRODUCT_TAMARACK_TC9021_ALT, - 41294, 5709, 5717, 41301, 626, 0, + 41538, 5727, 5735, 41545, 626, 0, PCI_VENDOR_TANDEM, PCI_PRODUCT_TANDEM_SERVERNETII, - 41306, 7596, 2488, 5909, 0, + 41550, 7629, 2488, 5927, 0, PCI_VENDOR_TEKRAM, PCI_PRODUCT_TEKRAM_DC290, - 41316, 0, + 41560, 0, PCI_VENDOR_TEKRAM2, PCI_PRODUCT_TEKRAM2_DC315, - 41326, 0, + 41570, 0, PCI_VENDOR_TEKRAM2, PCI_PRODUCT_TEKRAM2_DC690C, - 41340, 0, + 41584, 0, PCI_VENDOR_TI, PCI_PRODUCT_TI_TLAN, - 41348, 0, + 41592, 0, PCI_VENDOR_TI, PCI_PRODUCT_TI_TVP4020, - 41353, 6396, 6411, 0, + 41597, 6414, 6429, 0, PCI_VENDOR_TI, PCI_PRODUCT_TI_TSB12LV21, - 41361, 20632, 20637, 6953, 6455, 0, + 41605, 20728, 20733, 6971, 6473, 0, PCI_VENDOR_TI, PCI_PRODUCT_TI_TSB12LV22, - 41371, 20632, 20637, 6953, 6455, 0, + 41615, 20728, 20733, 6971, 6473, 0, PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI4450LYNX, - 41381, 20632, 20637, 6953, 6455, 6156, 18587, 6563, 0, + 41625, 20728, 20733, 6971, 6473, 6174, 18665, 6581, 0, PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI4410LYNX, - 41389, 20632, 20637, 6953, 6455, 6156, 18587, 6563, 0, + 41633, 20728, 20733, 6971, 6473, 6174, 18665, 6581, 0, PCI_VENDOR_TI, PCI_PRODUCT_TI_TSB12LV23, - 41397, 20632, 20637, 6953, 6455, 0, + 41641, 20728, 20733, 6971, 6473, 0, PCI_VENDOR_TI, PCI_PRODUCT_TI_TSB12LV26, - 41407, 20632, 20637, 6953, 6455, 0, + 41651, 20728, 20733, 6971, 6473, 0, PCI_VENDOR_TI, PCI_PRODUCT_TI_TSB43AA22, - 41417, 20632, 20637, 6953, 6455, 0, + 41661, 20728, 20733, 6971, 6473, 0, PCI_VENDOR_TI, PCI_PRODUCT_TI_TSB43AA22A, - 41427, 20632, 20637, 6953, 6455, 0, + 41671, 20728, 20733, 6971, 6473, 0, PCI_VENDOR_TI, PCI_PRODUCT_TI_TSB43AA23, - 41439, 20632, 20637, 6953, 6455, 0, + 41683, 20728, 20733, 6971, 6473, 0, PCI_VENDOR_TI, PCI_PRODUCT_TI_TSB82AA2, - 41449, 20632, 20637, 6953, 6455, 0, + 41693, 20728, 20733, 6971, 6473, 0, PCI_VENDOR_TI, PCI_PRODUCT_TI_TSB43AB21, - 41458, 20632, 20637, 6953, 6455, 0, + 41702, 20728, 20733, 6971, 6473, 0, PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI4451LYNX, - 41468, 20632, 20637, 6953, 6455, 6156, 18587, 6563, 0, + 41712, 20728, 20733, 6971, 6473, 6174, 18665, 6581, 0, PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI4510LYNX, - 41476, 20632, 20637, 6953, 6455, 6156, 18587, 6563, 0, + 41720, 20728, 20733, 6971, 6473, 6174, 18665, 6581, 0, PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI4520LYNX, - 41484, 20632, 20637, 6953, 6455, 6156, 18587, 6563, 0, + 41728, 20728, 20733, 6971, 6473, 6174, 18665, 6581, 0, PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI7410LYNX, - 41492, 20632, 20637, 6953, 6455, 6156, 18587, 6563, 0, + 41736, 20728, 20733, 6971, 6473, 6174, 18665, 6581, 0, PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI72111CB, - 41504, 41517, 6455, 0, + 41748, 41761, 6473, 0, PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI72111FW, - 41504, 20632, 20637, 6953, 6455, 0, + 41748, 20728, 20733, 6971, 6473, 0, PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI72111FM, - 41504, 692, 41525, 6455, 0, + 41748, 692, 41769, 6473, 0, PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI72111SD, - 41504, 9017, 15031, 6455, 0, + 41748, 9113, 15127, 6473, 0, PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI72111SM, - 41504, 41536, 15031, 6455, 0, + 41748, 41780, 15127, 6473, 0, PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI6515A, - 41539, 41517, 6455, 0, + 41783, 41761, 6473, 0, PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI6515ASM, - 41539, 41517, 6455, 41548, 15031, 10486, 0, + 41783, 41761, 6473, 41792, 15127, 8830, 0, PCI_VENDOR_TI, PCI_PRODUCT_TI_PCIXX12CB, - 41555, 41517, 6455, 0, + 41799, 41761, 6473, 0, PCI_VENDOR_TI, PCI_PRODUCT_TI_PCIXX12FW, - 41555, 20632, 20637, 6953, 6455, 0, + 41799, 20728, 20733, 6971, 6473, 0, PCI_VENDOR_TI, PCI_PRODUCT_TI_PCIXX12FM, - 41555, 692, 41525, 6455, 0, + 41799, 692, 41769, 6473, 0, PCI_VENDOR_TI, PCI_PRODUCT_TI_PCIXX12SD, - 41555, 8379, 240, 6953, 6455, 0, + 41799, 8412, 240, 6971, 6473, 0, PCI_VENDOR_TI, PCI_PRODUCT_TI_PCIXX12SM, - 41555, 18970, 15031, 0, + 41799, 19048, 15127, 0, PCI_VENDOR_TI, PCI_PRODUCT_TI_ACX100A, - 41563, 7686, 0, + 41807, 7719, 0, PCI_VENDOR_TI, PCI_PRODUCT_TI_ACX100B, - 41571, 7686, 0, + 41815, 7719, 0, PCI_VENDOR_TI, PCI_PRODUCT_TI_ACX111, - 41579, 38484, 0, + 41823, 38727, 0, PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI1130, - 41586, 18587, 6563, 0, + 41830, 18665, 6581, 0, PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI1031, - 41594, 20649, 6563, 0, + 41838, 20745, 6581, 0, PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI1131, - 41602, 18587, 6563, 0, + 41846, 18665, 6581, 0, PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI1250, - 41610, 18587, 6563, 0, + 41854, 18665, 6581, 0, PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI1220, - 41618, 18587, 6563, 0, + 41862, 18665, 6581, 0, PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI1221, - 41626, 18587, 6563, 0, + 41870, 18665, 6581, 0, PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI1210, - 41634, 18587, 6563, 0, + 41878, 18665, 6581, 0, PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI1450, - 41642, 18587, 6563, 0, + 41886, 18665, 6581, 0, PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI1225, - 41650, 18587, 6563, 0, + 41894, 18665, 6581, 0, PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI1251, - 41658, 18587, 6563, 0, + 41902, 18665, 6581, 0, PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI1211, - 41666, 18587, 6563, 0, + 41910, 18665, 6581, 0, PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI1251B, - 41674, 18587, 6563, 0, + 41918, 18665, 6581, 0, PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI2030, - 41683, 8791, 6563, 0, + 41927, 8887, 6581, 0, PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI2050, - 41691, 8791, 6563, 0, + 41935, 8887, 6581, 0, PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI4450YENTA, - 41381, 18587, 6563, 6156, 20632, 20637, 6953, 6455, 0, + 41625, 18665, 6581, 6174, 20728, 20733, 6971, 6473, 0, PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI4410YENTA, - 41389, 18587, 6563, 6156, 20632, 20637, 6953, 6455, 0, + 41633, 18665, 6581, 6174, 20728, 20733, 6971, 6473, 0, PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI4451YENTA, - 41468, 18587, 6563, 6156, 20632, 20637, 6953, 6455, 0, + 41712, 18665, 6581, 6174, 20728, 20733, 6971, 6473, 0, PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI4510YENTA, - 41476, 18587, 6563, 6156, 20632, 20637, 6953, 6455, 0, + 41720, 18665, 6581, 6174, 20728, 20733, 6971, 6473, 0, PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI4520YENTA, - 41484, 18587, 6563, 6156, 20632, 20637, 6953, 6455, 0, + 41728, 18665, 6581, 6174, 20728, 20733, 6971, 6473, 0, PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI7510YENTA, - 41699, 18587, 6563, 6156, 20632, 20637, 6953, 6455, 0, + 41943, 18665, 6581, 6174, 20728, 20733, 6971, 6473, 0, PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI7610YENTA, - 41707, 18587, 6563, 6156, 20632, 20637, 6953, 6455, 0, + 41951, 18665, 6581, 6174, 20728, 20733, 6971, 6473, 0, PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI7410YENTA, - 41715, 18587, 6563, 6156, 20632, 20637, 6953, 6455, 0, + 41959, 18665, 6581, 6174, 20728, 20733, 6971, 6473, 0, PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI7610SM, - 41707, 18587, 6563, 41548, 15031, 24717, 0, + 41951, 18665, 6581, 41792, 15127, 24813, 0, PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI7410SD, - 41723, 18587, 6563, 41734, 24717, 0, + 41967, 18665, 6581, 41978, 24813, 0, PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI7410MS, - 41723, 18587, 6563, 41742, 32479, 24717, 0, + 41967, 18665, 6581, 41986, 32594, 24813, 0, PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI1410, - 41750, 18587, 6563, 0, + 41994, 18665, 6581, 0, PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI1420, - 41758, 18587, 6563, 0, + 42002, 18665, 6581, 0, PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI1451, - 41766, 18587, 6563, 0, + 42010, 18665, 6581, 0, PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI1421, - 41774, 18587, 6563, 0, + 42018, 18665, 6581, 0, PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI1620, - 41782, 18587, 6563, 0, + 42026, 18665, 6581, 0, PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI1520, - 41790, 18587, 6563, 0, + 42034, 18665, 6581, 0, PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI1510, - 41798, 18587, 6563, 0, + 42042, 18665, 6581, 0, PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI1530, - 41806, 18587, 6563, 0, + 42050, 18665, 6581, 0, PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI1515, - 41814, 18587, 6563, 0, + 42058, 18665, 6581, 0, PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI2040, - 41822, 41830, 6563, 0, + 42066, 42074, 6581, 0, PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI7420YENTA, - 41838, 41846, 6563, 6156, 20632, 20637, 6953, 6455, 0, + 42082, 42090, 6581, 6174, 20728, 20733, 6971, 6473, 0, PCI_VENDOR_TITAN, PCI_PRODUCT_TITAN_VSCOM_PCI010L, - 41858, 0, + 42102, 0, PCI_VENDOR_TITAN, PCI_PRODUCT_TITAN_VSCOM_PCI100L, - 41867, 0, + 42111, 0, PCI_VENDOR_TITAN, PCI_PRODUCT_TITAN_VSCOM_PCI110L, - 41876, 0, + 42120, 0, PCI_VENDOR_TITAN, PCI_PRODUCT_TITAN_VSCOM_PCI200L, - 41885, 0, + 42129, 0, PCI_VENDOR_TITAN, PCI_PRODUCT_TITAN_VSCOM_PCI210L, - 41894, 0, + 42138, 0, PCI_VENDOR_TITAN, PCI_PRODUCT_TITAN_VSCOM_PCI200LI, - 41903, 0, + 42147, 0, PCI_VENDOR_MOLEX, PCI_PRODUCT_MOLEX_VSCOM_PCI400L, - 41913, 0, + 42157, 0, PCI_VENDOR_TITAN, PCI_PRODUCT_TITAN_VSCOM_PCI800L, - 41922, 0, + 42166, 0, PCI_VENDOR_TITAN, PCI_PRODUCT_TITAN_VSCOM_PCI011H, - 41931, 0, + 42175, 0, PCI_VENDOR_TITAN, PCI_PRODUCT_TITAN_VSCOM_PCIx10H, - 41940, 0, + 42184, 0, PCI_VENDOR_TITAN, PCI_PRODUCT_TITAN_VSCOM_PCI100H, - 41949, 0, + 42193, 0, PCI_VENDOR_TITAN, PCI_PRODUCT_TITAN_VSCOM_PCI800H, - 41958, 0, + 42202, 0, PCI_VENDOR_TITAN, PCI_PRODUCT_TITAN_VSCOM_PCI800H_1, - 41967, 0, + 42211, 0, PCI_VENDOR_TITAN, PCI_PRODUCT_TITAN_VSCOM_PCI200H, - 41978, 0, + 42222, 0, PCI_VENDOR_TITAN, PCI_PRODUCT_TITAN_VSCOM_PCI010HV2, - 41987, 0, + 42231, 0, PCI_VENDOR_TITAN, PCI_PRODUCT_TITAN_VSCOM_PCI200HV2, - 41998, 0, + 42242, 0, PCI_VENDOR_TOSHIBA, PCI_PRODUCT_TOSHIBA_R4X00, - 42009, 6851, 6563, 0, + 42253, 6869, 6581, 0, PCI_VENDOR_TOSHIBA, PCI_PRODUCT_TOSHIBA_TC35856F, - 42015, 7125, 42024, 0, + 42259, 7143, 42268, 0, PCI_VENDOR_TOSHIBA2, PCI_PRODUCT_TOSHIBA2_PORTEGE, - 42035, 18952, 0, + 42279, 19030, 0, PCI_VENDOR_TOSHIBA2, PCI_PRODUCT_TOSHIBA2_PICCOLO, - 42043, 6626, 6455, 0, + 42287, 6644, 6473, 0, PCI_VENDOR_TOSHIBA2, PCI_PRODUCT_TOSHIBA2_PICCOLO2, - 42043, 6411, 6626, 6455, 0, + 42287, 6429, 6644, 6473, 0, PCI_VENDOR_TOSHIBA2, PCI_PRODUCT_TOSHIBA2_PICCOLO3, - 42043, 6422, 6626, 6455, 0, + 42287, 6440, 6644, 6473, 0, PCI_VENDOR_TOSHIBA2, PCI_PRODUCT_TOSHIBA2_PICCOLO5, - 42043, 8138, 6626, 6455, 0, + 42287, 8171, 6644, 6473, 0, PCI_VENDOR_TOSHIBA2, PCI_PRODUCT_TOSHIBA2_NVME_XG4, - 42051, 7957, 7962, 0, + 42295, 7990, 7995, 0, PCI_VENDOR_TOSHIBA2, PCI_PRODUCT_TOSHIBA2_NVME_XG5, - 42055, 7957, 7962, 0, + 42299, 7990, 7995, 0, PCI_VENDOR_TOSHIBA2, PCI_PRODUCT_TOSHIBA2_HOST, - 6953, 31015, 0, + 6971, 31101, 0, PCI_VENDOR_TOSHIBA2, PCI_PRODUCT_TOSHIBA2_ISA, - 6837, 6563, 0, + 6855, 6581, 0, PCI_VENDOR_TOSHIBA2, PCI_PRODUCT_TOSHIBA2_ToPIC95, - 42059, 18587, 6563, 0, + 42303, 18665, 6581, 0, PCI_VENDOR_TOSHIBA2, PCI_PRODUCT_TOSHIBA2_ToPIC95B, - 42067, 18587, 6563, 0, + 42311, 18665, 6581, 0, PCI_VENDOR_TOSHIBA2, PCI_PRODUCT_TOSHIBA2_ToPIC97, - 42076, 18587, 6563, 0, + 42320, 18665, 6581, 0, PCI_VENDOR_TOSHIBA2, PCI_PRODUCT_TOSHIBA2_ToPIC100, - 42084, 18587, 6563, 0, + 42328, 18665, 6581, 0, PCI_VENDOR_TOSHIBA2, PCI_PRODUCT_TOSHIBA2_SANREMO, - 42093, 42102, 6953, 6563, 0, + 42337, 42346, 6971, 6581, 0, PCI_VENDOR_TOSHIBA2, PCI_PRODUCT_TOSHIBA2_OBOE, - 2430, 42111, 42120, 42125, 0, + 2430, 42355, 42364, 42369, 0, PCI_VENDOR_TOSHIBA2, PCI_PRODUCT_TOSHIBA2_SMCARD, - 18970, 1926, 6455, 0, + 19048, 1926, 6473, 0, PCI_VENDOR_TOSHIBA2, PCI_PRODUCT_TOSHIBA2_SDCARD, - 8379, 240, 15031, 6455, 42127, 0, + 8412, 240, 15127, 6473, 42371, 0, PCI_VENDOR_TOSHIBA2, PCI_PRODUCT_TOSHIBA2_DONAUOBOE, - 2430, 42111, 42120, 42134, 0, + 2430, 42355, 42364, 42378, 0, PCI_VENDOR_TRANSMETA, PCI_PRODUCT_TRANSMETA_TM8000NB, - 42137, 692, 8410, 6563, 0, + 42381, 692, 8443, 6581, 0, PCI_VENDOR_TRANSMETA, PCI_PRODUCT_TRANSMETA_NORTHBRIDGE, - 19987, 8410, 6563, 0, + 20065, 8443, 6581, 0, PCI_VENDOR_TRANSMETA, PCI_PRODUCT_TRANSMETA_LONGRUN, - 42144, 8410, 6563, 0, + 42388, 8443, 6581, 0, PCI_VENDOR_TRANSMETA, PCI_PRODUCT_TRANSMETA_SDRAM, - 42152, 6455, 0, + 42396, 6473, 0, PCI_VENDOR_TRANSMETA, PCI_PRODUCT_TRANSMETA_BIOS_SCRATCH, - 42158, 28753, 0, + 42402, 28855, 0, PCI_VENDOR_TRIDENT, PCI_PRODUCT_TRIDENT_4DWAVE_DX, - 42163, 42170, 0, + 42407, 42414, 0, PCI_VENDOR_TRIDENT, PCI_PRODUCT_TRIDENT_4DWAVE_NX, - 42163, 42173, 0, + 42407, 42417, 0, PCI_VENDOR_TRIDENT, PCI_PRODUCT_TRIDENT_CYBERBLADE_I7, - 42176, 28834, 0, + 42420, 28936, 0, PCI_VENDOR_TRIDENT, PCI_PRODUCT_TRIDENT_TGUI_9320, - 42187, 42192, 0, + 42431, 42436, 0, PCI_VENDOR_TRIDENT, PCI_PRODUCT_TRIDENT_TGUI_9350, - 42187, 12604, 0, + 42431, 12714, 0, PCI_VENDOR_TRIDENT, PCI_PRODUCT_TRIDENT_TGUI_9360, - 42187, 42197, 0, + 42431, 42441, 0, PCI_VENDOR_TRIDENT, PCI_PRODUCT_TRIDENT_CYBER_9397, - 42202, 42208, 0, + 42446, 42452, 0, PCI_VENDOR_TRIDENT, PCI_PRODUCT_TRIDENT_CYBER_9397DVD, - 42202, 42213, 0, + 42446, 42457, 0, PCI_VENDOR_TRIDENT, PCI_PRODUCT_TRIDENT_TGUI_9420, - 42187, 42221, 0, + 42431, 42465, 0, PCI_VENDOR_TRIDENT, PCI_PRODUCT_TRIDENT_TGUI_9440, - 42187, 42226, 0, + 42431, 42470, 0, PCI_VENDOR_TRIDENT, PCI_PRODUCT_TRIDENT_CYBER_9525, - 42202, 42231, 0, + 42446, 42475, 0, PCI_VENDOR_TRIDENT, PCI_PRODUCT_TRIDENT_TGUI_9660, - 42187, 42236, 0, + 42431, 42480, 0, PCI_VENDOR_TRIDENT, PCI_PRODUCT_TRIDENT_TGUI_9680, - 42187, 42241, 0, + 42431, 42485, 0, PCI_VENDOR_TRIDENT, PCI_PRODUCT_TRIDENT_TGUI_9682, - 42187, 42246, 0, + 42431, 42490, 0, PCI_VENDOR_TRIDENT, PCI_PRODUCT_TRIDENT_CYBERBLADE, - 42176, 0, + 42420, 0, PCI_VENDOR_TRIONES, PCI_PRODUCT_TRIONES_HPT343, - 42251, 6626, 6455, 0, + 42495, 6644, 6473, 0, PCI_VENDOR_TRIONES, PCI_PRODUCT_TRIONES_HPT366, - 42262, 6626, 6455, 0, + 42506, 6644, 6473, 0, PCI_VENDOR_TRIONES, PCI_PRODUCT_TRIONES_HPT372A, - 42277, 6626, 6455, 0, + 42521, 6644, 6473, 0, PCI_VENDOR_TRIONES, PCI_PRODUCT_TRIONES_HPT302, - 42285, 6626, 6455, 0, + 42529, 6644, 6473, 0, PCI_VENDOR_TRIONES, PCI_PRODUCT_TRIONES_HPT371, - 42292, 6626, 6455, 0, + 42536, 6644, 6473, 0, PCI_VENDOR_TRIONES, PCI_PRODUCT_TRIONES_HPT374, - 42299, 6626, 6455, 0, + 42543, 6644, 6473, 0, PCI_VENDOR_TRIONES, PCI_PRODUCT_TRIONES_HPT372N, - 42306, 6626, 6455, 0, + 42550, 6644, 6473, 0, PCI_VENDOR_TRIONES, PCI_PRODUCT_TRIONES_ROCKETRAID_2310, - 42314, 42325, 6450, 42330, 0, + 42558, 42569, 6468, 42574, 0, PCI_VENDOR_TRIONES, PCI_PRODUCT_TRIONES_ROCKETRAID_2720, - 42314, 42335, 6450, 42330, 0, + 42558, 42579, 6468, 42574, 0, PCI_VENDOR_TRITECH, PCI_PRODUCT_TRITECH_TR25202, - 42340, 42350, 0, + 42584, 42594, 0, PCI_VENDOR_TSENG, PCI_PRODUCT_TSENG_ET4000_W32P_A, - 42358, 9582, 11222, 0, + 42602, 9678, 11337, 0, PCI_VENDOR_TSENG, PCI_PRODUCT_TSENG_ET4000_W32P_B, - 42358, 9582, 5171, 0, + 42602, 9678, 5171, 0, PCI_VENDOR_TSENG, PCI_PRODUCT_TSENG_ET4000_W32P_C, - 42358, 9582, 11224, 0, + 42602, 9678, 11339, 0, PCI_VENDOR_TSENG, PCI_PRODUCT_TSENG_ET4000_W32P_D, - 42358, 9582, 3154, 0, + 42602, 9678, 3154, 0, PCI_VENDOR_TSENG, PCI_PRODUCT_TSENG_ET6000, - 42369, 0, + 42613, 0, PCI_VENDOR_TURTLE_BEACH, PCI_PRODUCT_TURTLE_BEACH_SANTA_CRUZ, 2555, 2561, 0, PCI_VENDOR_UMC, PCI_PRODUCT_UMC_UM82C881, - 42376, 42385, 11160, 0, + 42620, 42629, 11275, 0, PCI_VENDOR_UMC, PCI_PRODUCT_UMC_UM82C886, - 42389, 6837, 6563, 0, + 42633, 6855, 6581, 0, PCI_VENDOR_UMC, PCI_PRODUCT_UMC_UM8673F, - 42398, 8867, 6455, 0, + 42642, 8963, 6473, 0, PCI_VENDOR_UMC, PCI_PRODUCT_UMC_UM8881, - 42406, 22948, 42385, 615, 11160, 0, + 42650, 23044, 42629, 615, 11275, 0, PCI_VENDOR_UMC, PCI_PRODUCT_UMC_UM82C891, - 42413, 0, + 42657, 0, PCI_VENDOR_UMC, PCI_PRODUCT_UMC_UM886A, - 42422, 0, + 42666, 0, PCI_VENDOR_UMC, PCI_PRODUCT_UMC_UM8886BF, - 42429, 0, + 42673, 0, PCI_VENDOR_UMC, PCI_PRODUCT_UMC_UM8710, - 42438, 0, + 42682, 0, PCI_VENDOR_UMC, PCI_PRODUCT_UMC_UM8886, - 42445, 0, + 42689, 0, PCI_VENDOR_UMC, PCI_PRODUCT_UMC_UM8881F, - 42452, 42460, 6563, 0, + 42696, 42704, 6581, 0, PCI_VENDOR_UMC, PCI_PRODUCT_UMC_UM8886F, - 42469, 6837, 6563, 0, + 42713, 6855, 6581, 0, PCI_VENDOR_UMC, PCI_PRODUCT_UMC_UM8886A, - 42477, 0, + 42721, 0, PCI_VENDOR_UMC, PCI_PRODUCT_UMC_UM8891A, - 42485, 0, + 42729, 0, PCI_VENDOR_UMC, PCI_PRODUCT_UMC_UM9017F, - 42493, 0, + 42737, 0, PCI_VENDOR_UMC, PCI_PRODUCT_UMC_UM8886N, - 42501, 0, + 42745, 0, PCI_VENDOR_UMC, PCI_PRODUCT_UMC_UM8891N, - 42509, 0, + 42753, 0, PCI_VENDOR_ULSI, PCI_PRODUCT_ULSI_US201, - 42517, 0, + 42761, 0, PCI_VENDOR_USR, PCI_PRODUCT_USR_3C2884A, - 19310, 42523, 8290, 615, 5764, 42529, 0, + 19388, 42767, 8323, 615, 5782, 42773, 0, PCI_VENDOR_USR, PCI_PRODUCT_USR_3CP5609, - 42540, 615, 40457, 5764, 0, + 42784, 615, 40705, 5782, 0, PCI_VENDOR_USR2, PCI_PRODUCT_USR2_USR997902, - 42548, 5709, 5717, 0, + 42792, 5727, 5735, 0, PCI_VENDOR_USR2, PCI_PRODUCT_USR2_2415, - 4761, 20649, 5909, 0, + 4761, 20745, 5927, 0, PCI_VENDOR_V3, PCI_PRODUCT_V3_V292PBCPSC, - 42558, 42569, 42575, 17871, 7009, 615, 6563, 0, + 42802, 42813, 42819, 17955, 7027, 615, 6581, 0, PCI_VENDOR_V3, PCI_PRODUCT_V3_V292PBC, - 42581, 42589, 6851, 6563, 0, + 42825, 42833, 6869, 6581, 0, PCI_VENDOR_V3, PCI_PRODUCT_V3_V960PBC, - 42598, 24383, 6851, 6563, 0, + 42842, 24479, 6869, 6581, 0, PCI_VENDOR_V3, PCI_PRODUCT_V3_V96DPC, - 42606, 24383, 42613, 6851, 6563, 0, + 42850, 24479, 42857, 6869, 6581, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT6305, - 42620, 20632, 20637, 6953, 6455, 0, + 42864, 20728, 20733, 6971, 6473, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_K8M800_0, - 42627, 6953, 0, + 42871, 6971, 6473, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_K8T890_0, - 42634, 6953, 0, + 42878, 6971, 6473, 0, + PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_CN400_AGP, + 42885, 8900, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_KT880, - 42641, 2535, 7009, 615, 6563, 0, + 42903, 2535, 7027, 615, 6581, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_K8HTB_0, - 42647, 6953, 0, + 42909, 6971, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8363_HB, - 42653, 42660, 42668, 6953, 6563, 0, + 42915, 42922, 42930, 6971, 6581, 0, + PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_P4M890_HB, + 42937, 6971, 6581, 0, + PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_K8M890CE_HB, + 42950, 6971, 6581, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT3351_HB_0351, - 42675, 6953, 6563, 0, + 42959, 6971, 6581, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VX800_HC, - 42682, 6953, 6455, 0, + 42966, 6971, 6473, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_P4M900, - 42694, 6953, 6563, 0, + 42978, 6971, 6581, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8371_HB, - 42707, 42660, 42714, 6953, 6563, 0, + 42991, 42922, 42998, 6971, 6581, 0, + PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VX855_HB, + 43005, 6971, 9282, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VX900_HB, - 42721, 6953, 6563, 0, + 43011, 6971, 6581, 0, + PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT6415_IDE, + 43017, 6644, 6473, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8501_MVP4, - 42727, 42660, 42734, 6953, 6563, 0, + 43031, 42922, 43038, 6971, 6581, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT82C505, - 42740, 42749, 0, + 43044, 43053, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT82C561, - 42757, 0, + 43061, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT82C586A_IDE, - 42766, 6626, 6455, 0, + 43070, 6644, 6473, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT82C576, - 42776, 42785, 0, + 43080, 43089, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_CX700_IDE, - 42788, 6626, 6455, 0, + 43092, 43114, 6468, 6473, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT82C580VP, - 42794, 42660, 42803, 6851, 6563, 0, + 43123, 42922, 43132, 6869, 6581, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT82C586_ISA, - 42807, 6837, 6563, 0, + 43136, 6855, 6581, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8237A_SATA, - 42816, 692, 8762, 6455, 0, + 43145, 692, 8800, 6473, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT82C595, - 42824, 42660, 42833, 6851, 6563, 0, + 43153, 42922, 43162, 6869, 6581, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT82C596A, - 42838, 6837, 6563, 0, + 43167, 6855, 6581, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT82C597, - 42848, 42660, 42857, 6851, 6563, 0, + 43177, 42922, 43186, 6869, 6581, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT82C598PCI, - 42862, 42660, 42871, 6851, 6563, 0, + 43191, 42922, 43200, 6869, 6581, 0, + PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8601A_HB, + 43206, 42922, 43214, 6971, 6581, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8605PCI, - 42877, 42660, 42884, 42893, 6851, 6563, 0, + 43222, 42922, 43229, 43238, 6869, 6581, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT82C686A_ISA, - 42898, 6837, 6563, 0, + 43243, 6855, 6581, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT82C691, - 42908, 42660, 42917, 6851, 0, + 43253, 42922, 43262, 6869, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT82C693, - 42922, 42660, 7253, 42931, 6851, 0, + 43267, 42922, 7271, 43276, 6869, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT86C926, - 42937, 42946, 42953, 6455, 0, + 43282, 43291, 43298, 6473, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT82C570M, - 42966, 42976, 6851, 6563, 0, + 43311, 43321, 6869, 6581, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT82C570MV, - 42966, 42976, 6837, 6563, 0, + 43311, 43321, 6855, 6581, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_CHROME9HC3, - 42682, 39910, 1047, 42985, 692, 1716, 0, + 42966, 40158, 1047, 43330, 692, 1716, 0, + PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_K8T890_ERR, + 42878, 24911, 27913, 0, + PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_CN400_ERR, + 42885, 24911, 27913, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_KT880_1, - 42641, 2535, 7009, 615, 6563, 0, + 42903, 2535, 7027, 615, 6581, 0, + PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_P4M890_HB_2, + 42937, 6971, 6581, 0, + PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_K8M890CE_HB_2, + 42950, 6971, 6581, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT3351_HB_1351, - 42675, 6953, 6563, 0, + 42959, 6971, 6581, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VX800_ERR, - 42682, 24815, 27817, 0, + 42966, 24911, 27913, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_P4M900_1, - 42694, 6953, 6563, 0, + 42978, 6971, 6581, 0, + PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VX855_ERR, + 43005, 24911, 27913, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VX900_ERR, - 42721, 24815, 27817, 0, + 43011, 24911, 27913, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT82C586_IDE, - 42807, 6626, 6455, 0, + 43136, 6644, 6473, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT82C595_2, - 42824, 42660, 42833, 6851, 6563, 0, + 43153, 42922, 43162, 6869, 6581, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT6105M_BOM, - 42989, 43001, 40946, 5819, 5717, 0, + 43334, 43346, 41190, 5837, 5735, 0, + PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_K8T890_HBC, + 42878, 6971, 17955, 9282, 0, + PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_CN400_HCB, + 42885, 6971, 2535, 17955, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_KT880_2, - 42641, 2535, 7009, 615, 6563, 0, + 42903, 2535, 7027, 615, 6581, 0, + PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_P4M890_HB_3, + 42937, 6971, 6581, 0, + PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_K8M890CE_HB_3, + 42950, 6971, 6581, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT3351_HB_2351, - 42675, 6953, 6563, 0, + 42959, 6971, 6581, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VX800_HBC, - 42682, 6953, 17871, 9186, 0, + 42966, 6971, 17955, 9282, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_P4M900_2, - 42694, 6953, 6563, 0, + 42978, 6971, 6581, 0, + PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VX855_HBC, + 43005, 6971, 17955, 9282, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VX900_0, - 42721, 2535, 17871, 6455, 0, + 43011, 2535, 17955, 6473, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8251_PPB_287A, - 43008, 8791, 6563, 0, + 43353, 8887, 6581, 0, + PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8251_HB, + 43353, 6971, 6581, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8251_PCIE1, - 43008, 8204, 8140, 43015, 0, + 43353, 8237, 8173, 43360, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8251_PCIE2, - 43008, 8204, 8140, 43021, 0, + 43353, 8237, 8173, 43366, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8251_VLINK, - 43008, 7147, 43027, 6455, 0, + 43372, 7165, 43395, 6473, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT83C572, - 43033, 6945, 6455, 0, + 43401, 6963, 6473, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT82C586_PWR, - 42807, 3740, 7078, 6455, 0, + 43136, 3740, 7096, 6473, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT3043, - 43042, 43049, 5819, 5717, 0, + 43410, 43417, 5837, 5735, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT6306, - 43057, 20632, 20637, 6953, 6455, 0, + 43425, 20728, 20733, 6971, 6473, 0, + PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT82C596B_PWR, + 43432, 3740, 7096, 6473, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT6105M, - 43064, 43001, 40946, 5819, 5717, 0, + 43442, 43346, 41190, 5837, 5735, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT82C686A_PWR, - 42898, 3740, 7078, 6455, 0, + 43243, 3740, 7096, 6473, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT82C686A_AC97, - 42898, 27586, 7054, 6455, 0, + 43243, 27682, 7072, 6473, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8233_AC97, - 43072, 27586, 7054, 6455, 0, + 43450, 27682, 7072, 6473, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT6102, - 43086, 43001, 32719, 5819, 5717, 0, + 43464, 43346, 32834, 5837, 5735, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT82C686A_MC97, - 42898, 43093, 5764, 6455, 0, + 43243, 43471, 5782, 6473, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8233, - 43099, 6837, 6563, 0, + 43477, 6855, 6581, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8366, - 43106, 42660, 43113, 43120, 6563, 0, + 43484, 42922, 43491, 43498, 6581, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8653, - 43128, 42660, 7253, 43135, 43120, 6563, 0, + 43506, 42922, 7271, 43513, 43498, 6581, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8237_EHCI, - 43141, 8727, 6945, 6455, 0, + 43519, 8760, 6963, 6473, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT6105, - 43148, 43001, 40946, 5819, 5717, 0, + 43526, 43346, 41190, 5837, 5735, 0, + PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT3108_IG, + 43533, 43550, 7271, 10417, 0, + PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8233C, + 43560, 6855, 6581, 0, + PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT3118_IG, + 43568, 43550, 7271, 10417, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT612X, - 43155, 43162, 5732, 5717, 0, + 43586, 43593, 5750, 5735, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8623_VGA, - 43173, 42660, 43180, 8679, 6455, 0, + 43604, 42922, 43611, 8712, 6473, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8623, - 43173, 42660, 43180, 43120, 6563, 0, + 43604, 42922, 43611, 43498, 6581, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8233A, - 43188, 6837, 6563, 0, + 43619, 6855, 6581, 0, + PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8751_HB, + 43627, 6971, 6581, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8237_SATA, - 43141, 692, 8762, 6455, 0, + 43519, 692, 8800, 6473, 0, + PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT3157_IG, + 43634, 43646, 7271, 10417, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT6410_RAID, - 43196, 35023, 6450, 6455, 0, + 43656, 35147, 6468, 6473, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8235, - 43203, 42660, 43210, 6837, 6563, 0, + 43663, 17955, 9282, 647, 3740, 7096, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_K8HTB, - 42647, 6953, 0, + 42909, 6971, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8377, - 43217, 30671, 43224, 2535, 7009, 615, 6563, 0, + 43670, 30747, 43677, 2535, 7027, 615, 6581, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8378, - 43230, 30671, 43237, 2535, 7009, 615, 6563, 0, + 43683, 30747, 43690, 2535, 7027, 615, 6581, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8237, - 43141, 35563, 6563, 0, + 43519, 35693, 6581, 0, + PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_K8T890_DRAM, + 42878, 8079, 17955, 9282, 0, + PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT3230_IG, + 43696, 40158, 1047, 10417, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT6421_RAID, - 43243, 14833, 6450, 6455, 0, + 43714, 14929, 6468, 6473, 0, + PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_CN400_DRAM, + 42885, 8079, 17955, 9282, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_KT880_3, - 42641, 2535, 7009, 615, 6563, 0, + 42903, 2535, 7027, 615, 6581, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8251, - 43008, 35563, 6563, 0, + 43353, 35693, 6581, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8237A_HDA, - 43250, 28076, 28081, 7054, 6455, 0, + 43721, 28172, 28177, 7072, 6473, 0, + PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_P4M890_HB_4, + 42937, 6971, 6581, 0, + PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_K8M890CE_HB_4, + 42950, 6971, 6581, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8237A_ISA, - 43265, 6837, 6563, 0, + 43736, 6855, 6581, 0, + PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT3343_IG, + 43754, 43550, 7271, 10417, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT3314_IG, - 43283, 43290, 43296, 692, 1716, 0, - PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8237R_SATA, - 43306, 692, 8762, 6455, 0, + 43761, 43774, 43550, 7271, 10417, 0, + PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8251_SATA, + 43353, 692, 8800, 6473, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT3351_HB_3351, - 42675, 6953, 6563, 0, + 42959, 6971, 6581, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VX800_PPB_2, - 42682, 8791, 6563, 0, + 42966, 8887, 6581, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_P4M900_3, - 42694, 6953, 6563, 0, - PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_CHROME9_HC, - 43314, 43322, 10296, 0, + 42978, 6971, 6581, 0, + PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT3371_IG, + 43789, 43808, 43816, 10417, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8237S_ISA, - 43325, 6837, 6563, 0, + 43819, 6855, 6581, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8237A_PPB, - 42816, 8791, 6563, 0, + 43827, 8887, 6581, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8237A_HB, - 42816, 6953, 6563, 0, + 43827, 6971, 6581, 0, + PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8261, + 43837, 6855, 6581, 0, + PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT6315_FW, + 43844, 9409, 6473, 0, + PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VX855_DRAM, + 43005, 8079, 17955, 9282, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VX900_DRAM, - 42721, 8046, 6455, 0, + 43011, 8079, 6473, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VL80x_XHCI, - 43333, 8233, 0, + 43858, 8266, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VL805_XHCI, - 43339, 8233, 0, + 43864, 8266, 0, + PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_CHROME_645_IGP, + 43870, 1716, 43875, 43883, 0, + PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_K8T890_PMC, + 42878, 3740, 7096, 9282, 0, + PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_CN400_PMC, + 42885, 3740, 7096, 9282, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_KT880_4, - 42641, 2535, 7009, 615, 6563, 0, + 42903, 2535, 7027, 615, 6581, 0, + PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_P4M890_HB_5, + 42937, 6971, 6581, 0, + PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_K8M890CE_HB_5, + 42950, 6971, 6581, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT3351_HB_4351, - 42675, 6953, 6563, 0, + 42959, 6971, 6581, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VX800_PMC, - 42682, 3740, 7078, 9186, 0, + 42966, 3740, 7096, 9282, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_P4M900_4, - 42694, 6953, 6563, 0, + 42978, 6971, 6581, 0, + PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VX855_PMC, + 43005, 3740, 7096, 9282, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VX900_1, - 42721, 3740, 7078, 6455, 0, + 43011, 3740, 7096, 6473, 0, + PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VX800_IG, + 43892, 43808, 43904, 10417, 0, + PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_K8T890_IOAPIC, + 42878, 24855, 558, 9274, 17641, 9282, 0, + PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8251_SATA_2, + 43353, 692, 8800, 6473, 10602, 8830, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_CX700M2_IDE, - 43345, 6626, 6455, 0, + 43908, 6644, 6473, 0, + PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_P4M890_IOAPIC, + 42937, 9041, 24855, 17481, 6473, 0, + PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_K8M890CE_IOAPIC, + 42950, 9041, 24855, 17481, 6473, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8237A_SATA_2, - 42816, 692, 8762, 6455, 0, + 43145, 692, 8800, 6473, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT3351_IOAPIC, - 42675, 8945, 24759, 17390, 6455, 0, + 42959, 9041, 24855, 17481, 6473, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VX800_APIC, - 42682, 24759, 558, 9178, 17557, 9186, 0, + 42966, 24855, 558, 9274, 17641, 9282, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_P4M900_IOAPIC, - 42694, 8930, 0, + 42978, 9026, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8237S_SATA, - 43325, 692, 8762, 6455, 0, + 43819, 692, 8800, 6473, 0, + PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VX855_APIC, + 43005, 24855, 558, 9274, 17641, 9282, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VX900_APIC, - 42721, 24759, 558, 17557, 6455, 0, + 43011, 24855, 558, 17641, 6473, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT86C100A, - 43359, 43369, 5819, 5717, 0, - PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8251_SATA, - 43008, 692, 8762, 6455, 0, + 43936, 43946, 5837, 5735, 0, + PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_CHROME520_IGP, + 43957, 1716, 43875, 11587, 43964, 0, + PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_K8T890_SCRATCH, + 42878, 29536, 28105, 0, + PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8251_AHCI, + 43353, 692, 8819, 8800, 6473, 0, + PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_K8M890CE_HB_6, + 42950, 6971, 6581, 0, + PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_P4M890_SECURITY, + 42937, 8542, 2418, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VX800_SCRATCH, - 42682, 29454, 28009, 0, + 42966, 29536, 28105, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_P4M900_6, - 42694, 8509, 2418, 0, + 42978, 8542, 2418, 0, + PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VX855_SCRATCH, + 43005, 29536, 28105, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VX900_SCRATCH, - 42721, 29454, 28009, 0, + 43011, 29536, 28105, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_CHROME9_HD, - 42721, 1716, 43380, 43389, 0, - PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8378_IG, - 43230, 43237, 43296, 692, 1716, 0, + 43011, 1716, 43969, 43978, 0, + PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT7205_IG, + 43982, 43550, 10417, 0, + PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_K8T890_VLINK, + 42878, 44001, 9282, 0, + PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_CN400_VLINK, + 42885, 44001, 9282, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_KT880_5, - 42641, 2535, 7009, 615, 6563, 0, + 42903, 2535, 7027, 615, 6581, 0, + PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_P4M890_HB_6, + 42937, 6971, 6581, 0, + PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_K8M890CE_HB_7, + 42950, 6971, 6581, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT3351_HB_7351, - 42675, 6953, 6563, 0, + 42959, 6971, 6581, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VX800_1, - 42682, 43393, 14799, 3018, 9186, 0, + 42966, 44008, 14895, 3018, 9282, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_P4M900_7, - 42694, 6953, 6563, 0, + 42978, 6971, 6581, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8237S_SATA_RAID, - 43325, 692, 8762, 6455, 17879, 10486, 0, + 43819, 692, 8800, 6473, 8824, 8830, 0, + PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VX855_NSMIC, + 43005, 44008, 14895, 3018, 9282, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VX900_2, - 42721, 43393, 14799, 3018, 9186, 0, + 43011, 44008, 14895, 3018, 9282, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8231, - 43405, 6837, 6563, 0, + 44020, 6855, 6581, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8231_PWR, - 43405, 3740, 7078, 6455, 0, + 44020, 3740, 7096, 6473, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8363_PPB, - 42653, 42660, 42668, 615, 7009, 8804, 6563, 0, + 42915, 42922, 42930, 615, 7027, 8900, 6581, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_CX700, - 42788, 35563, 6563, 0, + 44027, 35693, 6581, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VX800, - 42682, 35563, 6563, 0, + 42966, 35693, 6581, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8371_PPB, - 42707, 42660, 42714, 8791, 6563, 0, + 42991, 42922, 42998, 8887, 6581, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VX855, - 43412, 35563, 6563, 0, + 43005, 17955, 9282, 558, 3740, 7096, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VX900, - 42721, 17871, 9186, 558, 3740, 7078, 0, + 43011, 17955, 9282, 558, 3740, 7096, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8501AGP, - 42727, 42660, 42734, 43418, 6563, 0, + 43031, 42922, 43038, 44033, 6581, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT82C597AGP, - 42848, 42660, 42857, 43418, 6563, 0, + 43177, 42922, 43186, 44033, 6581, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT82C598AGP, - 42862, 42660, 42871, 43418, 6563, 0, + 43191, 42922, 43200, 44033, 6581, 0, + PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8601AGP, + 43206, 42922, 44041, 43238, 615, 7027, 8900, 6581, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8605AGP, - 42877, 42660, 42884, 42893, 27808, 6563, 0, + 43222, 42922, 43229, 43238, 27904, 6581, 0, + PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8261_SATA, + 43837, 692, 8800, 6473, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VX900_IDE, - 42721, 6626, 6455, 0, + 44045, 692, 8800, 6473, 0, + PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8261_RAID, + 43837, 692, 8800, 6473, 8824, 8830, 0, + PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VX900_RAID, + 44045, 692, 8800, 6473, 8824, 8830, 0, + PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VX900_AHCI, + 44045, 692, 8819, 8800, 6473, 0, + PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VX11_XHCI, + 43870, 6963, 8298, 8266, 6473, 0, + PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VX800_SD, + 44056, 9113, 15127, 6473, 0, + PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VX800_SDIO, + 44056, 27631, 6971, 6473, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_K8T890_PPB_A238, - 42634, 8791, 6563, 0, + 42878, 8887, 6581, 0, + PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_P4M890_PPB_A327, + 42937, 615, 7027, 615, 6581, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VX800_0, - 43426, 43438, 14799, 3018, 9186, 0, + 44068, 44080, 14895, 3018, 9282, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_P4M900_PPB_1, - 42694, 8791, 6563, 0, + 42978, 8887, 6581, 0, + PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VX855_USBD, + 43005, 6963, 2418, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VX900_PCIE_0, - 42721, 615, 4320, 8140, 8153, 8134, 0, + 43011, 615, 4320, 8173, 8186, 8167, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8633AGP, - 43450, 42660, 7253, 43457, 43418, 6563, 0, + 44092, 42922, 7271, 44099, 44033, 6581, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8366AGP, - 43106, 42660, 43113, 43418, 6563, 0, + 43484, 42922, 43491, 44033, 6581, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8377AGP, - 43217, 43418, 6563, 0, + 43670, 44033, 6581, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_K8HTB_AGP, - 42647, 8804, 0, + 42909, 8900, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8377CEAGP, - 43462, 43418, 6563, 0, + 44104, 44033, 6581, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VX800_PPB, - 43426, 615, 7009, 615, 6563, 0, + 44068, 615, 7027, 615, 6581, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VX900_PCIE_1, - 42721, 615, 4320, 8140, 8153, 8136, 0, + 43011, 615, 4320, 8173, 8186, 8169, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT3237_PPB, - 42634, 8410, 2173, 43141, 8710, 8791, 6563, 0, + 42878, 8443, 2173, 43519, 8743, 8887, 6581, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_K8T890_PPB_C238, - 42634, 8791, 6563, 0, + 42878, 8887, 6581, 0, + PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_P4M890_PPB_C327, + 42937, 615, 7027, 615, 6581, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VX800_PCIE_G0, - 42682, 615, 4320, 8140, 8153, 43471, 0, + 42966, 615, 4320, 8173, 8186, 44113, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_P4M900_PPB_2, - 42694, 8791, 6563, 0, + 42978, 8887, 6581, 0, + PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VX855_IDE, + 43892, 8963, 6473, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VX900_PCIE_2, - 42721, 615, 4320, 8140, 8153, 6411, 0, + 43011, 615, 4320, 8173, 8186, 6429, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_K8T890_PPB_D238, - 42634, 8791, 6563, 0, + 42878, 8887, 6581, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VX900_PCIE_3, - 42721, 615, 4320, 8140, 8153, 6422, 0, + 43011, 615, 4320, 8173, 8186, 6440, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_K8T890_PPB_E238, - 42634, 8791, 6563, 0, + 42878, 8887, 6581, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VX800_PCIE_0, - 42682, 615, 4320, 8140, 8153, 8134, 0, + 42966, 615, 4320, 8173, 8186, 8167, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VX900_PCIE_4, - 42721, 615, 4320, 27307, 43474, 43480, 43491, 0, + 43011, 615, 4320, 27403, 44116, 44122, 44133, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_K8T890_PPB_F238, - 42634, 8791, 6563, 0, + 42878, 8887, 6581, 0, PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VX800_PCIE_1, - 42682, 615, 4320, 8140, 8153, 8136, 0, + 42966, 615, 4320, 8173, 8186, 8169, 0, PCI_VENDOR_VIRTUALBOX, PCI_PRODUCT_VIRTUALBOX_GRAPHICS, 1716, 0, PCI_VENDOR_VIRTUALBOX, PCI_PRODUCT_VIRTUALBOX_GUEST, - 43501, 43507, 0, + 44143, 44149, 0, PCI_VENDOR_VORTEX, PCI_PRODUCT_VORTEX_GDT_60x0, - 43515, 0, + 44157, 0, PCI_VENDOR_VORTEX, PCI_PRODUCT_VORTEX_GDT_6000B, - 43533, 0, + 44175, 0, PCI_VENDOR_VORTEX, PCI_PRODUCT_VORTEX_GDT_6x10, - 43547, 0, + 44189, 0, PCI_VENDOR_VORTEX, PCI_PRODUCT_VORTEX_GDT_6x20, - 43560, 0, + 44202, 0, PCI_VENDOR_VORTEX, PCI_PRODUCT_VORTEX_GDT_6530, - 43573, 0, + 44215, 0, PCI_VENDOR_VORTEX, PCI_PRODUCT_VORTEX_GDT_6550, - 43581, 0, + 44223, 0, PCI_VENDOR_VORTEX, PCI_PRODUCT_VORTEX_GDT_6x17, - 43589, 0, + 44231, 0, PCI_VENDOR_VORTEX, PCI_PRODUCT_VORTEX_GDT_6x27, - 43602, 0, + 44244, 0, PCI_VENDOR_VORTEX, PCI_PRODUCT_VORTEX_GDT_6537, - 43615, 0, + 44257, 0, PCI_VENDOR_VORTEX, PCI_PRODUCT_VORTEX_GDT_6557, - 43623, 0, + 44265, 0, PCI_VENDOR_VORTEX, PCI_PRODUCT_VORTEX_GDT_6x15, - 43640, 0, + 44282, 0, PCI_VENDOR_VORTEX, PCI_PRODUCT_VORTEX_GDT_6x25, - 43653, 0, + 44295, 0, PCI_VENDOR_VORTEX, PCI_PRODUCT_VORTEX_GDT_6535, - 43666, 0, + 44308, 0, PCI_VENDOR_VORTEX, PCI_PRODUCT_VORTEX_GDT_6555, - 43674, 0, + 44316, 0, PCI_VENDOR_VORTEX, PCI_PRODUCT_VORTEX_GDT_6x17RP, - 43691, 0, + 44333, 0, PCI_VENDOR_VORTEX, PCI_PRODUCT_VORTEX_GDT_6x27RP, - 43704, 0, + 44346, 0, PCI_VENDOR_VORTEX, PCI_PRODUCT_VORTEX_GDT_6537RP, - 43717, 0, + 44359, 0, PCI_VENDOR_VORTEX, PCI_PRODUCT_VORTEX_GDT_6557RP, - 43727, 0, + 44369, 0, PCI_VENDOR_VORTEX, PCI_PRODUCT_VORTEX_GDT_6x11RP, - 43737, 0, + 44379, 0, PCI_VENDOR_VORTEX, PCI_PRODUCT_VORTEX_GDT_6x21RP, - 43750, 0, + 44392, 0, PCI_VENDOR_VORTEX, PCI_PRODUCT_VORTEX_GDT_6x17RD, - 43763, 0, + 44405, 0, PCI_VENDOR_VORTEX, PCI_PRODUCT_VORTEX_GDT_6x27RD, - 43776, 0, + 44418, 0, PCI_VENDOR_VORTEX, PCI_PRODUCT_VORTEX_GDT_6537RD, - 43789, 0, + 44431, 0, PCI_VENDOR_VORTEX, PCI_PRODUCT_VORTEX_GDT_6557RD, - 43799, 0, + 44441, 0, PCI_VENDOR_VORTEX, PCI_PRODUCT_VORTEX_GDT_6x11RD, - 43809, 0, + 44451, 0, PCI_VENDOR_VORTEX, PCI_PRODUCT_VORTEX_GDT_6x21RD, - 43822, 0, + 44464, 0, PCI_VENDOR_VORTEX, PCI_PRODUCT_VORTEX_GDT_6x18RD, - 43835, 0, + 44477, 0, PCI_VENDOR_VORTEX, PCI_PRODUCT_VORTEX_GDT_6x28RD, - 43849, 0, + 44491, 0, PCI_VENDOR_VORTEX, PCI_PRODUCT_VORTEX_GDT_6x38RD, - 43863, 0, + 44505, 0, PCI_VENDOR_VORTEX, PCI_PRODUCT_VORTEX_GDT_6x58RD, - 43876, 0, + 44518, 0, PCI_VENDOR_VORTEX, PCI_PRODUCT_VORTEX_GDT_6x17RP2, - 43889, 0, + 44531, 0, PCI_VENDOR_VORTEX, PCI_PRODUCT_VORTEX_GDT_6x27RP2, - 43903, 0, + 44545, 0, PCI_VENDOR_VORTEX, PCI_PRODUCT_VORTEX_GDT_6537RP2, - 43917, 0, + 44559, 0, PCI_VENDOR_VORTEX, PCI_PRODUCT_VORTEX_GDT_6x11RP2, - 43928, 0, + 44570, 0, PCI_VENDOR_VORTEX, PCI_PRODUCT_VORTEX_GDT_6x21RP2, - 43942, 0, + 44584, 0, PCI_VENDOR_VORTEX, PCI_PRODUCT_VORTEX_GDT_6x13RS, - 43956, 0, + 44598, 0, PCI_VENDOR_VORTEX, PCI_PRODUCT_VORTEX_GDT_6x23RS, - 43966, 0, + 44608, 0, PCI_VENDOR_VORTEX, PCI_PRODUCT_VORTEX_GDT_6518RS, - 43976, 0, + 44618, 0, PCI_VENDOR_VORTEX, PCI_PRODUCT_VORTEX_GDT_6x28RS, - 43986, 0, + 44628, 0, PCI_VENDOR_VORTEX, PCI_PRODUCT_VORTEX_GDT_6x38RS, - 43996, 0, + 44638, 0, PCI_VENDOR_VORTEX, PCI_PRODUCT_VORTEX_GDT_6x58RS, - 44006, 0, + 44648, 0, PCI_VENDOR_VORTEX, PCI_PRODUCT_VORTEX_GDT_6x33RS, - 44016, 0, + 44658, 0, PCI_VENDOR_VORTEX, PCI_PRODUCT_VORTEX_GDT_6x43RS, - 44026, 0, + 44668, 0, PCI_VENDOR_VORTEX, PCI_PRODUCT_VORTEX_GDT_6x53RS, - 44036, 0, + 44678, 0, PCI_VENDOR_VORTEX, PCI_PRODUCT_VORTEX_GDT_6x63RS, - 44046, 0, + 44688, 0, PCI_VENDOR_VORTEX, PCI_PRODUCT_VORTEX_GDT_7x13RN, - 44056, 0, + 44698, 0, PCI_VENDOR_VORTEX, PCI_PRODUCT_VORTEX_GDT_7x23RN, - 44066, 0, + 44708, 0, PCI_VENDOR_VORTEX, PCI_PRODUCT_VORTEX_GDT_7x18RN, - 44076, 0, + 44718, 0, PCI_VENDOR_VORTEX, PCI_PRODUCT_VORTEX_GDT_7x28RN, - 44090, 0, + 44732, 0, PCI_VENDOR_VORTEX, PCI_PRODUCT_VORTEX_GDT_7x38RN, - 44104, 0, + 44746, 0, PCI_VENDOR_VORTEX, PCI_PRODUCT_VORTEX_GDT_7x58RN, - 44117, 0, + 44759, 0, PCI_VENDOR_VORTEX, PCI_PRODUCT_VORTEX_GDT_7x43RN, - 44130, 0, + 44772, 0, PCI_VENDOR_VORTEX, PCI_PRODUCT_VORTEX_GDT_7x53RN, - 44143, 0, + 44785, 0, PCI_VENDOR_VORTEX, PCI_PRODUCT_VORTEX_GDT_7x63RN, - 44153, 0, + 44795, 0, PCI_VENDOR_VORTEX, PCI_PRODUCT_VORTEX_GDT_4x13RZ, - 44163, 0, + 44805, 0, PCI_VENDOR_VORTEX, PCI_PRODUCT_VORTEX_GDT_4x23RZ, - 44173, 0, + 44815, 0, PCI_VENDOR_VORTEX, PCI_PRODUCT_VORTEX_GDT_8x13RZ, - 44183, 0, + 44825, 0, PCI_VENDOR_VORTEX, PCI_PRODUCT_VORTEX_GDT_8x23RZ, - 44193, 0, + 44835, 0, PCI_VENDOR_VORTEX, PCI_PRODUCT_VORTEX_GDT_8x33RZ, - 44203, 0, + 44845, 0, PCI_VENDOR_VORTEX, PCI_PRODUCT_VORTEX_GDT_8x43RZ, - 44213, 0, + 44855, 0, PCI_VENDOR_VORTEX, PCI_PRODUCT_VORTEX_GDT_8x53RZ, - 44223, 0, + 44865, 0, PCI_VENDOR_VORTEX, PCI_PRODUCT_VORTEX_GDT_8x63RZ, - 44233, 0, + 44875, 0, PCI_VENDOR_VORTEX, PCI_PRODUCT_VORTEX_GDT_6x19RD, - 44243, 0, + 44885, 0, PCI_VENDOR_VORTEX, PCI_PRODUCT_VORTEX_GDT_6x29RD, - 44256, 0, + 44898, 0, PCI_VENDOR_VORTEX, PCI_PRODUCT_VORTEX_GDT_7x19RN, - 44269, 0, + 44911, 0, PCI_VENDOR_VORTEX, PCI_PRODUCT_VORTEX_GDT_7x29RN, - 44282, 0, + 44924, 0, PCI_VENDOR_VORTEX, PCI_PRODUCT_VORTEX_GDT_ICP, - 44295, 0, + 44937, 0, PCI_VENDOR_VLSI, PCI_PRODUCT_VLSI_82C592, - 44299, 2535, 6563, 0, + 44941, 2535, 6581, 0, PCI_VENDOR_VLSI, PCI_PRODUCT_VLSI_82C593, - 44306, 23031, 6563, 0, + 44948, 23127, 6581, 0, PCI_VENDOR_VLSI, PCI_PRODUCT_VLSI_82C594, - 44313, 44320, 6, 6455, 0, + 44955, 44962, 6, 6473, 0, PCI_VENDOR_VLSI, PCI_PRODUCT_VLSI_82C596597, - 44328, 44320, 23031, 6563, 0, + 44970, 44962, 23127, 6581, 0, PCI_VENDOR_VLSI, PCI_PRODUCT_VLSI_82C541, - 44339, 0, + 44981, 0, PCI_VENDOR_VLSI, PCI_PRODUCT_VLSI_82C543, - 44346, 0, + 44988, 0, PCI_VENDOR_VLSI, PCI_PRODUCT_VLSI_82C532, - 44353, 0, + 44995, 0, PCI_VENDOR_VLSI, PCI_PRODUCT_VLSI_82C534, - 44360, 0, + 45002, 0, PCI_VENDOR_VLSI, PCI_PRODUCT_VLSI_82C535, - 44367, 0, + 45009, 0, PCI_VENDOR_VLSI, PCI_PRODUCT_VLSI_82C147, - 44374, 0, + 45016, 0, PCI_VENDOR_VLSI, PCI_PRODUCT_VLSI_82C975, - 44381, 0, + 45023, 0, PCI_VENDOR_VLSI, PCI_PRODUCT_VLSI_82C925, - 44388, 0, + 45030, 0, PCI_VENDOR_VMWARE, PCI_PRODUCT_VMWARE_VIRTUAL2, - 19987, 44395, 7596, 0, + 20065, 45037, 7629, 0, PCI_VENDOR_VMWARE, PCI_PRODUCT_VMWARE_VIRTUAL, - 19987, 44395, 0, + 20065, 45037, 0, PCI_VENDOR_VMWARE, PCI_PRODUCT_VMWARE_VMXNET, - 19987, 3879, 0, + 20065, 3879, 0, PCI_VENDOR_VMWARE, PCI_PRODUCT_VMWARE_VMSCSI, - 19987, 6670, 0, + 20065, 6688, 0, PCI_VENDOR_VMWARE, PCI_PRODUCT_VMWARE_VMCI, - 19987, 44400, 44408, 3018, 0, + 20065, 45042, 45050, 3018, 0, PCI_VENDOR_VMWARE, PCI_PRODUCT_VMWARE_VMEM, - 19987, 44422, 0, + 20065, 45064, 0, PCI_VENDOR_VMWARE, PCI_PRODUCT_VMWARE_VMEB, - 19987, 44430, 0, + 20065, 45072, 0, PCI_VENDOR_VMWARE, PCI_PRODUCT_VMWARE_VMUSB, - 19987, 8727, 0, + 20065, 8760, 0, PCI_VENDOR_VMWARE, PCI_PRODUCT_VMWARE_VMUHCI, - 19987, 27657, 0, + 20065, 27753, 0, PCI_VENDOR_VMWARE, PCI_PRODUCT_VMWARE_VMXHCI, - 19987, 8233, 0, + 20065, 8266, 0, PCI_VENDOR_VMWARE, PCI_PRODUCT_VMWARE_VM1394, - 19987, 9235, 0, + 20065, 9331, 0, PCI_VENDOR_VMWARE, PCI_PRODUCT_VMWARE_VMPCIB, - 19987, 615, 6563, 0, + 20065, 615, 6581, 0, PCI_VENDOR_VMWARE, PCI_PRODUCT_VMWARE_VMPCIE, - 19987, 615, 4320, 8140, 8153, 0, + 20065, 615, 4320, 8173, 8186, 0, PCI_VENDOR_VMWARE, PCI_PRODUCT_VMWARE_VMXNET3, - 19987, 3879, 6422, 0, + 20065, 3879, 6440, 0, PCI_VENDOR_VMWARE, PCI_PRODUCT_VMWARE_PVSCSI, - 44438, 0, + 45080, 0, PCI_VENDOR_VMWARE, PCI_PRODUCT_VMWARE_AHCI, - 8775, 0, + 8819, 0, PCI_VENDOR_VMWARE, PCI_PRODUCT_VMWARE_NVME, - 7957, 0, + 7990, 0, PCI_VENDOR_VMWARE, PCI_PRODUCT_VMWARE_VMI3, - 44445, 44449, 44456, 0, + 45087, 45091, 45098, 0, PCI_VENDOR_WEITEK, PCI_PRODUCT_WEITEK_P9000, - 44460, 0, + 45102, 0, PCI_VENDOR_WEITEK, PCI_PRODUCT_WEITEK_P9100, - 44466, 0, + 45108, 0, PCI_VENDOR_WD, PCI_PRODUCT_WD_WD33C193A, - 44472, 0, + 45114, 0, PCI_VENDOR_WD, PCI_PRODUCT_WD_WD33C196A, - 44482, 0, + 45124, 0, PCI_VENDOR_WD, PCI_PRODUCT_WD_WD33C197A, - 44492, 0, + 45134, 0, PCI_VENDOR_WD, PCI_PRODUCT_WD_WD7193, - 44502, 0, + 45144, 0, PCI_VENDOR_WD, PCI_PRODUCT_WD_WD7197, - 44509, 0, + 45151, 0, PCI_VENDOR_WD, PCI_PRODUCT_WD_WD33C296A, - 44516, 0, + 45158, 0, PCI_VENDOR_WD, PCI_PRODUCT_WD_WD34C296, - 44526, 0, + 45168, 0, PCI_VENDOR_WD, PCI_PRODUCT_WD_90C, - 44535, 0, + 45177, 0, PCI_VENDOR_WINBOND, PCI_PRODUCT_WINBOND_W83769F, - 44539, 0, + 45181, 0, PCI_VENDOR_WINBOND, PCI_PRODUCT_WINBOND_W83C553F_1, - 44547, 6626, 6455, 0, + 45189, 6644, 6473, 0, PCI_VENDOR_WINBOND, PCI_PRODUCT_WINBOND_W83C553F_0, - 44547, 6837, 6563, 0, + 45189, 6855, 6581, 0, PCI_VENDOR_WINBOND, PCI_PRODUCT_WINBOND_W83628F, - 44556, 6837, 6563, 0, + 45198, 6855, 6581, 0, PCI_VENDOR_WINBOND, PCI_PRODUCT_WINBOND_W89C840F, - 44564, 5819, 5717, 0, + 45206, 5837, 5735, 0, PCI_VENDOR_WINBOND, PCI_PRODUCT_WINBOND_W89C940F, - 44573, 5717, 0, + 45215, 5735, 0, PCI_VENDOR_WINBOND, PCI_PRODUCT_WINBOND_W89C940F_1, - 44573, 5717, 0, + 45215, 5735, 0, PCI_VENDOR_WINBOND, PCI_PRODUCT_WINBOND_W6692, - 44582, 9891, 0, + 45224, 9987, 0, PCI_VENDOR_WORKBIT, PCI_PRODUCT_WORKBIT_NJSC32BI, - 32300, 6670, 0, + 32415, 6688, 0, PCI_VENDOR_WORKBIT, PCI_PRODUCT_WORKBIT_NJATA32BI, - 32279, 6626, 0, + 32394, 6644, 0, PCI_VENDOR_WORKBIT, PCI_PRODUCT_WORKBIT_NJSC32UDE, - 44588, 6670, 0, + 45230, 6688, 0, PCI_VENDOR_WORKBIT, PCI_PRODUCT_WORKBIT_NJSC32BI_KME, - 32300, 6670, 44604, 0, + 32415, 6688, 45246, 0, PCI_VENDOR_WORKBIT, PCI_PRODUCT_WORKBIT_NJATA32BI_KME, - 32279, 6626, 44604, 0, + 32394, 6644, 45246, 0, PCI_VENDOR_WORKBIT, PCI_PRODUCT_WORKBIT_NJSC32UDE_IODATA, - 44588, 6670, 44610, 0, + 45230, 6688, 45252, 0, PCI_VENDOR_WORKBIT, PCI_PRODUCT_WORKBIT_NJSC32UDE_LOGITEC, - 44588, 6670, 44619, 0, + 45230, 6688, 45261, 0, PCI_VENDOR_WORKBIT, PCI_PRODUCT_WORKBIT_NJSC32UDE_LOGITEC2, - 44588, 6670, 44629, 0, + 45230, 6688, 45271, 0, PCI_VENDOR_WORKBIT, PCI_PRODUCT_WORKBIT_NJSC32UDE_BUFFALO, - 44588, 6670, 44640, 0, + 45230, 6688, 45282, 0, PCI_VENDOR_WORKBIT, PCI_PRODUCT_WORKBIT_NPATA32_CF32A, - 44650, 44656, 5909, 0, + 45292, 45298, 5927, 0, PCI_VENDOR_WORKBIT, PCI_PRODUCT_WORKBIT_NPATA32_CF32A_BUFFALO, - 44650, 44669, 5909, 44640, 0, + 45292, 45311, 5927, 45282, 0, PCI_VENDOR_WORKBIT, PCI_PRODUCT_WORKBIT_NPATA32_KME, - 44672, 6626, 44604, 0, + 45314, 6644, 45246, 0, PCI_VENDOR_XENSOURCE, PCI_PRODUCT_XENSOURCE_XENPLATFORM, - 44681, 8500, 2418, 0, + 45323, 8533, 2418, 0, PCI_VENDOR_XGI, PCI_PRODUCT_XGI_VOLARI_Z7, - 44685, 44692, 0, + 45327, 45334, 0, PCI_VENDOR_XGI, PCI_PRODUCT_XGI_VOLARI_Z9M, - 44685, 44702, 0, + 45327, 45344, 0, PCI_VENDOR_XGI, PCI_PRODUCT_XGI_VOLARI_Z11, - 44685, 44706, 0, + 45327, 45348, 0, PCI_VENDOR_XGI, PCI_PRODUCT_XGI_VOLARI_V3XT, - 44685, 44715, 0, + 45327, 45357, 0, PCI_VENDOR_XGI, PCI_PRODUCT_XGI_VOLARI_XP10, - 44685, 44726, 0, + 45327, 45368, 0, PCI_VENDOR_XIRCOM, PCI_PRODUCT_XIRCOM_X3201_3, - 44731, 2430, 5717, 6455, 0, + 45373, 2430, 5735, 6473, 0, PCI_VENDOR_XIRCOM, PCI_PRODUCT_XIRCOM_X3201_3_21143, - 44731, 2430, 5717, 6455, 44739, 0, + 45373, 2430, 5735, 6473, 45381, 0, PCI_VENDOR_XIRCOM, PCI_PRODUCT_XIRCOM_WINGLOBAL, - 44747, 5764, 0, + 45389, 5782, 0, PCI_VENDOR_XIRCOM, PCI_PRODUCT_XIRCOM_MODEM56, - 5934, 5764, 0, + 5952, 5782, 0, PCI_VENDOR_YAMAHA, PCI_PRODUCT_YAMAHA_YMF724, - 44757, 7054, 0, + 45399, 7072, 0, PCI_VENDOR_YAMAHA, PCI_PRODUCT_YAMAHA_YMF740, - 40635, 7054, 0, + 35819, 7072, 0, PCI_VENDOR_YAMAHA, PCI_PRODUCT_YAMAHA_YMF740C, - 44761, 44766, 7054, 0, + 45403, 45408, 7072, 0, PCI_VENDOR_YAMAHA, PCI_PRODUCT_YAMAHA_YMF724F, - 44773, 44766, 7054, 0, + 45415, 45408, 7072, 0, PCI_VENDOR_YAMAHA, PCI_PRODUCT_YAMAHA_YMF744B, - 44778, 44782, 7054, 0, + 45420, 45424, 7072, 0, PCI_VENDOR_YAMAHA, PCI_PRODUCT_YAMAHA_YMF754, - 44790, 44794, 7054, 0, + 45432, 45436, 7072, 0, PCI_VENDOR_ZEINET, PCI_PRODUCT_ZEINET_1221, - 44802, 0, + 45444, 0, PCI_VENDOR_ZIATECH, PCI_PRODUCT_ZIATECH_ZT8905, - 44807, 6563, 0, + 45449, 6581, 0, PCI_VENDOR_ZHAOXIN, PCI_PRODUCT_ZHAOXIN_ZX100_PCIE, - 44816, 615, 4320, 8140, 8153, 0, + 45458, 615, 4320, 8173, 8186, 0, PCI_VENDOR_ZHAOXIN, PCI_PRODUCT_ZHAOXIN_ZX200_PCIE_0, - 44823, 615, 4320, 8140, 8153, 0, + 45465, 615, 4320, 8173, 8186, 0, PCI_VENDOR_ZHAOXIN, PCI_PRODUCT_ZHAOXIN_ZX200_PCIE_1, - 44823, 615, 4320, 8140, 8153, 0, + 45465, 615, 4320, 8173, 8186, 0, PCI_VENDOR_ZHAOXIN, PCI_PRODUCT_ZHAOXIN_ZX200_PCIE_2, - 44823, 615, 4320, 8140, 8153, 0, + 45465, 615, 4320, 8173, 8186, 0, PCI_VENDOR_ZHAOXIN, PCI_PRODUCT_ZHAOXIN_ZX200_PCIE_3, - 44823, 615, 4320, 8140, 8153, 0, + 45465, 615, 4320, 8173, 8186, 0, PCI_VENDOR_ZHAOXIN, PCI_PRODUCT_ZHAOXIN_ZX200_PCIE_4, - 44823, 615, 4320, 8140, 8153, 0, + 45465, 615, 4320, 8173, 8186, 0, PCI_VENDOR_ZHAOXIN, PCI_PRODUCT_ZHAOXIN_ZX200_PCIE_5, - 44823, 615, 4320, 8140, 8153, 0, + 45465, 615, 4320, 8173, 8186, 0, PCI_VENDOR_ZHAOXIN, PCI_PRODUCT_ZHAOXIN_ZXD_PCIE, - 44837, 615, 4320, 8140, 8153, 0, + 45479, 615, 4320, 8173, 8186, 0, PCI_VENDOR_ZHAOXIN, PCI_PRODUCT_ZHAOXIN_KX_PCIE_0, - 44842, 2173, 44863, 615, 4320, 8140, 8153, 0, + 45484, 2173, 45505, 615, 4320, 8173, 8186, 0, PCI_VENDOR_ZHAOXIN, PCI_PRODUCT_ZHAOXIN_KX_PCIE_1, - 44842, 2173, 44863, 615, 4320, 8140, 8153, 0, + 45484, 2173, 45505, 615, 4320, 8173, 8186, 0, PCI_VENDOR_ZHAOXIN, PCI_PRODUCT_ZHAOXIN_KX_PCIE_2, - 44842, 2173, 44863, 615, 4320, 8140, 8153, 0, + 45484, 2173, 45505, 615, 4320, 8173, 8186, 0, PCI_VENDOR_ZHAOXIN, PCI_PRODUCT_ZHAOXIN_KX_PCIE_3, - 44872, 2173, 44863, 615, 4320, 8140, 8153, 0, + 45514, 2173, 45505, 615, 4320, 8173, 8186, 0, PCI_VENDOR_ZHAOXIN, PCI_PRODUCT_ZHAOXIN_KX_PCIE_4, - 44842, 2173, 44863, 615, 4320, 8140, 8153, 0, + 45484, 2173, 45505, 615, 4320, 8173, 8186, 0, PCI_VENDOR_ZHAOXIN, PCI_PRODUCT_ZHAOXIN_KX_PCIE_5, - 44842, 2173, 44863, 615, 4320, 8140, 8153, 0, + 45484, 2173, 45505, 615, 4320, 8173, 8186, 0, PCI_VENDOR_ZHAOXIN, PCI_PRODUCT_ZHAOXIN_KX_PCIE_6, - 44872, 2173, 44863, 615, 4320, 8140, 8153, 0, + 45514, 2173, 45505, 615, 4320, 8173, 8186, 0, PCI_VENDOR_ZHAOXIN, PCI_PRODUCT_ZHAOXIN_KX_PCIE_7, - 44842, 2173, 44863, 615, 4320, 8140, 8153, 0, + 45484, 2173, 45505, 615, 4320, 8173, 8186, 0, PCI_VENDOR_ZHAOXIN, PCI_PRODUCT_ZHAOXIN_ZX200_UP_PCIE_SWITCH, - 44888, 29151, 8153, 293, 615, 4320, 17501, 0, + 45530, 8860, 8186, 293, 615, 4320, 8853, 0, PCI_VENDOR_ZHAOXIN, PCI_PRODUCT_ZHAOXIN_ZX200_DP_PCIE_SWITCH, - 44888, 29160, 8153, 293, 615, 4320, 17501, 0, + 45530, 8869, 8186, 293, 615, 4320, 8853, 0, PCI_VENDOR_ZHAOXIN, PCI_PRODUCT_ZHAOXIN_ZX200_PCIE_PC2_BRIDGE, - 44888, 8554, 44895, 10513, 0, + 45530, 8587, 45537, 10628, 0, PCI_VENDOR_ZHAOXIN, PCI_PRODUCT_ZHAOXIN_ZX_MISC_BUS, - 44899, 8051, 17871, 0, + 45541, 8084, 17955, 0, PCI_VENDOR_ZHAOXIN, PCI_PRODUCT_ZHAOXIN_ZX_PCHB_0, - 44926, 1848, 6953, 6563, 0, + 45568, 1848, 6971, 6581, 0, PCI_VENDOR_ZHAOXIN, PCI_PRODUCT_ZHAOXIN_ZX_UHCI, - 6945, 27657, 6455, 0, + 6963, 27753, 6473, 0, PCI_VENDOR_ZHAOXIN, PCI_PRODUCT_ZHAOXIN_ZX_EHCI, - 6945, 8727, 6455, 0, + 6963, 8760, 6473, 0, PCI_VENDOR_ZHAOXIN, PCI_PRODUCT_ZHAOXIN_ZX_PCHB_1, - 44816, 2173, 44842, 2173, 44863, 1848, 6953, 6563, 0, + 45458, 2173, 45484, 2173, 45505, 1848, 6971, 6581, 0, PCI_VENDOR_ZHAOXIN, PCI_PRODUCT_ZHAOXIN_ZX_PCHB_2, - 44816, 2173, 44842, 2173, 44863, 1848, 6953, 6563, 0, + 45458, 2173, 45484, 2173, 45505, 1848, 6971, 6581, 0, PCI_VENDOR_ZHAOXIN, PCI_PRODUCT_ZHAOXIN_ZX_DRAM, - 44816, 2173, 44842, 2173, 44863, 8046, 6455, 0, + 45458, 2173, 45484, 2173, 45505, 8079, 6473, 0, PCI_VENDOR_ZHAOXIN, PCI_PRODUCT_ZHAOXIN_ZX_PMC, - 44816, 2173, 44842, 2173, 44863, 3740, 7078, 6455, 0, + 45458, 2173, 45484, 2173, 45505, 3740, 7096, 6473, 0, PCI_VENDOR_ZHAOXIN, PCI_PRODUCT_ZHAOXIN_ZX_IOAPIC, - 44816, 2173, 44842, 2173, 44863, 8945, 24759, 0, + 45458, 2173, 45484, 2173, 45505, 9041, 24855, 0, PCI_VENDOR_ZHAOXIN, PCI_PRODUCT_ZHAOXIN_ZX_SCRATCH, - 44816, 2173, 44842, 2173, 44863, 29454, 2418, 0, + 45458, 2173, 45484, 2173, 45505, 29536, 2418, 0, PCI_VENDOR_ZHAOXIN, PCI_PRODUCT_ZHAOXIN_ZX_PCHB_3, - 44816, 2173, 44842, 2173, 44863, 1848, 6953, 6563, 0, + 45458, 2173, 45484, 2173, 45505, 1848, 6971, 6581, 0, PCI_VENDOR_ZHAOXIN, PCI_PRODUCT_ZHAOXIN_C320_GPU, - 44816, 44931, 8396, 0, + 45458, 45573, 8429, 0, PCI_VENDOR_ZHAOXIN, PCI_PRODUCT_ZHAOXIN_C860_GPU, - 44837, 44937, 692, 1716, 0, + 45479, 45579, 692, 1716, 0, PCI_VENDOR_ZHAOXIN, PCI_PRODUCT_ZHAOXIN_C960_GPU, - 44943, 44951, 692, 1716, 0, + 45585, 45593, 692, 1716, 0, PCI_VENDOR_ZHAOXIN, PCI_PRODUCT_ZHAOXIN_C1190_GPU, - 44957, 44965, 692, 1716, 0, + 45599, 45607, 692, 1716, 0, PCI_VENDOR_ZHAOXIN, PCI_PRODUCT_ZHAOXIN_ZX200_AHCI, - 44972, 8775, 6455, 0, + 45614, 8819, 6473, 0, PCI_VENDOR_ZHAOXIN, PCI_PRODUCT_ZHAOXIN_ZXE_HDAUDIO, - 44926, 28076, 28081, 7054, 6455, 0, + 45568, 28172, 28177, 7072, 6473, 0, PCI_VENDOR_ZHAOXIN, PCI_PRODUCT_ZHAOXIN_ZX100_XHCI, - 44816, 6945, 8233, 6455, 0, + 45458, 6963, 8266, 6473, 0, PCI_VENDOR_ZHAOXIN, PCI_PRODUCT_ZHAOXIN_ZX200_XHCI, - 44888, 6945, 8233, 6455, 0, + 45530, 6963, 8266, 6473, 0, PCI_VENDOR_ZHAOXIN, PCI_PRODUCT_ZHAOXIN_KX_XHCI, - 44978, 6945, 8233, 6455, 0, + 45620, 6963, 8266, 6473, 0, PCI_VENDOR_ZORAN, PCI_PRODUCT_ZORAN_ZR36057, - 44994, 2446, 6455, 0, + 45636, 2446, 6473, 0, PCI_VENDOR_ZORAN, PCI_PRODUCT_ZORAN_ZR36120, - 45002, 234, 6455, 0, + 45644, 234, 6473, 0, }; static const char pci_words[] = { "." "Peak\0" /* 1 refs @ 1 */ @@ -18826,7 +19135,7 @@ static const char pci_words[] = { "." "div.\0" /* 1 refs @ 540 */ "Matrox\0" /* 1 refs @ 545 */ "Chips\0" /* 1 refs @ 552 */ - "and\0" /* 59 refs @ 558 */ + "and\0" /* 62 refs @ 558 */ "WYSE\0" /* 1 refs @ 562 */ "Olivetti\0" /* 1 refs @ 567 */ "Advanced\0" /* 13 refs @ 576 */ @@ -18835,13 +19144,13 @@ static const char pci_words[] = { "." "TMC\0" /* 1 refs @ 601 */ "Miro\0" /* 1 refs @ 605 */ "(2nd\0" /* 14 refs @ 610 */ - "PCI\0" /* 363 refs @ 615 */ + "PCI\0" /* 368 refs @ 615 */ "Vendor\0" /* 16 refs @ 619 */ "ID)\0" /* 19 refs @ 626 */ "NEC\0" /* 2 refs @ 630 */ "Burndy\0" /* 1 refs @ 634 */ "Comp.\0" /* 1 refs @ 641 */ - "&\0" /* 28 refs @ 647 */ + "&\0" /* 29 refs @ 647 */ "Comm.\0" /* 1 refs @ 649 */ "Lab\0" /* 1 refs @ 655 */ "Future\0" /* 1 refs @ 659 */ @@ -18849,7 +19158,7 @@ static const char pci_words[] = { "." "Hitach\0" /* 1 refs @ 673 */ "AMP\0" /* 1 refs @ 680 */ "Silicon\0" /* 4 refs @ 684 */ - "Integrated\0" /* 106 refs @ 692 */ + "Integrated\0" /* 110 refs @ 692 */ "Seiko\0" /* 1 refs @ 703 */ "Tatung\0" /* 1 refs @ 709 */ "Hewlett-Packard\0" /* 2 refs @ 716 */ @@ -18892,7 +19201,7 @@ static const char pci_words[] = { "." "Wipro\0" /* 1 refs @ 1025 */ "Infotech\0" /* 1 refs @ 1031 */ "Number\0" /* 3 refs @ 1040 */ - "9\0" /* 41 refs @ 1047 */ + "9\0" /* 42 refs @ 1047 */ "Company\0" /* 2 refs @ 1049 */ "Vtech\0" /* 1 refs @ 1057 */ "Infotronic\0" /* 1 refs @ 1063 */ @@ -18983,7 +19292,7 @@ static const char pci_words[] = { "." "Industrial\0" /* 2 refs @ 1688 */ "Benchmarq\0" /* 1 refs @ 1699 */ "Sierra\0" /* 2 refs @ 1709 */ - "Graphics\0" /* 244 refs @ 1716 */ + "Graphics\0" /* 245 refs @ 1716 */ "ACC\0" /* 1 refs @ 1725 */ "Digicom\0" /* 1 refs @ 1729 */ "Honeywell\0" /* 1 refs @ 1737 */ @@ -19044,7 +19353,7 @@ static const char pci_words[] = { "." "(1st\0" /* 1 refs @ 2152 */ "Aptix\0" /* 1 refs @ 2157 */ "Newbridge\0" /* 1 refs @ 2163 */ - "/\0" /* 110 refs @ 2173 */ + "/\0" /* 112 refs @ 2173 */ "Tundra\0" /* 1 refs @ 2175 */ "Tandem\0" /* 1 refs @ 2182 */ "Industries\0" /* 2 refs @ 2189 */ @@ -19077,7 +19386,7 @@ static const char pci_words[] = { "." "F.\0" /* 1 refs @ 2395 */ "Mikroelektronik\0" /* 1 refs @ 2398 */ "I-O\0" /* 1 refs @ 2414 */ - "Device\0" /* 87 refs @ 2418 */ + "Device\0" /* 90 refs @ 2418 */ "Soyo\0" /* 1 refs @ 2425 */ "Fast\0" /* 25 refs @ 2430 */ "NCube\0" /* 1 refs @ 2435 */ @@ -19094,7 +19403,7 @@ static const char pci_words[] = { "." "Xenon\0" /* 1 refs @ 2515 */ "Mini-Max\0" /* 1 refs @ 2521 */ "Znyx\0" /* 1 refs @ 2530 */ - "CPU\0" /* 25 refs @ 2535 */ + "CPU\0" /* 26 refs @ 2535 */ "Ross\0" /* 1 refs @ 2539 */ "Powerhouse\0" /* 1 refs @ 2544 */ "Santa\0" /* 2 refs @ 2555 */ @@ -19156,7 +19465,7 @@ static const char pci_words[] = { "." "Milacron\0" /* 1 refs @ 2995 */ "Workbit\0" /* 1 refs @ 3004 */ "Force\0" /* 1 refs @ 3012 */ - "Interface\0" /* 97 refs @ 3018 */ + "Interface\0" /* 98 refs @ 3018 */ "Schneider\0" /* 1 refs @ 3028 */ "Koch\0" /* 1 refs @ 3038 */ "Win\0" /* 2 refs @ 3043 */ @@ -19177,7 +19486,7 @@ static const char pci_words[] = { "." "Avsys\0" /* 1 refs @ 3140 */ "Voarx\0" /* 1 refs @ 3146 */ "R\0" /* 1 refs @ 3152 */ - "D\0" /* 7 refs @ 3154 */ + "D\0" /* 6 refs @ 3154 */ "Mutech\0" /* 1 refs @ 3156 */ "Harlequin\0" /* 1 refs @ 3163 */ "Parallax\0" /* 1 refs @ 3173 */ @@ -19254,7 +19563,7 @@ static const char pci_words[] = { "." "Barco\0" /* 1 refs @ 3718 */ "MicroUnity\0" /* 1 refs @ 3724 */ "Pure\0" /* 1 refs @ 3735 */ - "Power\0" /* 24 refs @ 3740 */ + "Power\0" /* 31 refs @ 3740 */ "InnoSys\0" /* 1 refs @ 3746 */ "Actel\0" /* 1 refs @ 3754 */ "Marvell\0" /* 2 refs @ 3760 */ @@ -19284,7 +19593,7 @@ static const char pci_words[] = { "." "Dolphin\0" /* 1 refs @ 3935 */ "Interconnect\0" /* 1 refs @ 3943 */ "Mesa\0" /* 1 refs @ 3956 */ - "Ridge\0" /* 62 refs @ 3961 */ + "Ridge\0" /* 63 refs @ 3961 */ "(MAGMA)\0" /* 1 refs @ 3967 */ "Specialix\0" /* 1 refs @ 3975 */ "Michels\0" /* 1 refs @ 3985 */ @@ -19345,7 +19654,7 @@ static const char pci_words[] = { "." "Pericom\0" /* 1 refs @ 4405 */ "Rainbow\0" /* 1 refs @ 4413 */ "Datum\0" /* 1 refs @ 4421 */ - "Inc.\0" /* 5 refs @ 4427 */ + "Inc.\0" /* 6 refs @ 4427 */ "Bancomm-Timing\0" /* 1 refs @ 4432 */ "Division\0" /* 1 refs @ 4447 */ "Aureal\0" /* 1 refs @ 4456 */ @@ -19355,7 +19664,7 @@ static const char pci_words[] = { "." "Engines\0" /* 2 refs @ 4485 */ "Forte\0" /* 1 refs @ 4493 */ "Siig\0" /* 1 refs @ 4499 */ - "Memory\0" /* 64 refs @ 4504 */ + "Memory\0" /* 65 refs @ 4504 */ "Domex\0" /* 1 refs @ 4511 */ "Brainboxes\0" /* 75 refs @ 4517 */ "Ltd\0" /* 2 refs @ 4528 */ @@ -19464,5498 +19773,5572 @@ static const char pci_words[] = { "." "ASMedia\0" /* 1 refs @ 5274 */ "Red\0" /* 1 refs @ 5282 */ "Hat\0" /* 1 refs @ 5286 */ - "Fresco\0" /* 1 refs @ 5290 */ - "Nanjing\0" /* 2 refs @ 5297 */ - "QinHeng\0" /* 2 refs @ 5305 */ - "(PCIe)\0" /* 3 refs @ 5313 */ - "HGST,\0" /* 1 refs @ 5320 */ - "Beijing\0" /* 1 refs @ 5326 */ - "Memblaze\0" /* 1 refs @ 5334 */ - "Co.\0" /* 1 refs @ 5343 */ - "Ltd.\0" /* 1 refs @ 5347 */ - "Amazon.com,\0" /* 1 refs @ 5352 */ - "Zhaoxin\0" /* 1 refs @ 5364 */ - "Aquantia\0" /* 1 refs @ 5372 */ - "Rockchip\0" /* 1 refs @ 5381 */ - "Raspberry\0" /* 1 refs @ 5390 */ - "Pi\0" /* 1 refs @ 5400 */ - "(Trading)\0" /* 1 refs @ 5403 */ - "Ampere\0" /* 1 refs @ 5413 */ - "HiNT\0" /* 1 refs @ 5420 */ - "3D\0" /* 19 refs @ 5425 */ - "Addtron\0" /* 1 refs @ 5428 */ - "NetXen\0" /* 1 refs @ 5436 */ - "(iCompression)\0" /* 1 refs @ 5443 */ - "Source\0" /* 1 refs @ 5458 */ - "NetVin\0" /* 1 refs @ 5465 */ - "Buslogic\0" /* 1 refs @ 5472 */ - "MediaQ\0" /* 1 refs @ 5481 */ - "Guillemot\0" /* 1 refs @ 5488 */ - "Turtle\0" /* 1 refs @ 5498 */ - "Beach\0" /* 1 refs @ 5505 */ - "S3\0" /* 2 refs @ 5511 */ - "XenSource,\0" /* 1 refs @ 5514 */ - "c't\0" /* 1 refs @ 5525 */ - "Magazin\0" /* 1 refs @ 5529 */ - "Decision\0" /* 1 refs @ 5537 */ - "Kurusugawa\0" /* 1 refs @ 5546 */ - "pcHDTV\0" /* 1 refs @ 5557 */ - "QUANCOM\0" /* 1 refs @ 5564 */ - "GmbH\0" /* 1 refs @ 5572 */ - "Intel\0" /* 3 refs @ 5577 */ - "VirtualBox\0" /* 1 refs @ 5583 */ - "ProLAN\0" /* 1 refs @ 5594 */ - "Computone\0" /* 1 refs @ 5601 */ - "KTI\0" /* 2 refs @ 5611 */ - "Adaptec\0" /* 2 refs @ 5615 */ - "Atronics\0" /* 1 refs @ 5623 */ - "Netmos\0" /* 1 refs @ 5632 */ - "Parallels\0" /* 1 refs @ 5639 */ - "Micron/Crucial\0" /* 1 refs @ 5649 */ - "Chrysalis-ITS\0" /* 1 refs @ 5664 */ - "Middle\0" /* 1 refs @ 5678 */ - "INVALID\0" /* 1 refs @ 5685 */ - "VENDOR\0" /* 1 refs @ 5693 */ - "ID\0" /* 1 refs @ 5700 */ - "3c985\0" /* 1 refs @ 5703 */ - "Gigabit\0" /* 150 refs @ 5709 */ - "Ethernet\0" /* 573 refs @ 5717 */ - "3c996\0" /* 1 refs @ 5726 */ - "10/100/1000\0" /* 49 refs @ 5732 */ - "3c556\0" /* 2 refs @ 5744 */ - "V.90\0" /* 1 refs @ 5750 */ - "Mini-PCI\0" /* 15 refs @ 5755 */ - "Modem\0" /* 33 refs @ 5764 */ - "3c940\0" /* 1 refs @ 5770 */ - "3c339\0" /* 1 refs @ 5776 */ - "TokenLink\0" /* 2 refs @ 5782 */ - "Velocity\0" /* 2 refs @ 5792 */ - "3c359\0" /* 1 refs @ 5801 */ - "XL\0" /* 8 refs @ 5807 */ - "3c450-TX\0" /* 1 refs @ 5810 */ - "10/100\0" /* 116 refs @ 5819 */ - "3c555\0" /* 1 refs @ 5826 */ - "3c575-TX\0" /* 1 refs @ 5832 */ - "3CCFE575BT\0" /* 1 refs @ 5841 */ - "3CCFE575CT\0" /* 1 refs @ 5852 */ - "3c590\0" /* 1 refs @ 5863 */ - "3c595-TX\0" /* 1 refs @ 5869 */ - "3c595-T4\0" /* 1 refs @ 5878 */ - "3c595-MII\0" /* 1 refs @ 5887 */ - "3CRWE154G72\0" /* 1 refs @ 5897 */ - "Adapter\0" /* 104 refs @ 5909 */ - "3c556B\0" /* 1 refs @ 5917 */ - "3CCFEM656\0" /* 2 refs @ 5924 */ - "56k\0" /* 5 refs @ 5934 */ - "3CCFEM656B\0" /* 2 refs @ 5938 */ - "3CXFEM656C\0" /* 2 refs @ 5949 */ - "3cSOHO100-TX\0" /* 1 refs @ 5960 */ - "3crwe777a\0" /* 1 refs @ 5973 */ - "AirConnect\0" /* 1 refs @ 5983 */ - "3c804\0" /* 1 refs @ 5994 */ - "FDDILink\0" /* 1 refs @ 6000 */ - "SAS\0" /* 18 refs @ 6009 */ - "Token\0" /* 8 refs @ 6013 */ - "Ring\0" /* 18 refs @ 6019 */ - "3c900-TPO\0" /* 1 refs @ 6024 */ - "3c900-COMBO\0" /* 1 refs @ 6034 */ - "3c900B-TPO\0" /* 1 refs @ 6046 */ - "3c900B-COMBO\0" /* 1 refs @ 6057 */ - "3c900B-TPC\0" /* 1 refs @ 6070 */ - "3c905-TX\0" /* 1 refs @ 6081 */ - "3c905-T4\0" /* 1 refs @ 6090 */ - "3c905B-TX\0" /* 1 refs @ 6099 */ - "3c905B-T4\0" /* 1 refs @ 6109 */ - "3c905B-COMBO\0" /* 1 refs @ 6119 */ - "3c905B-FX\0" /* 1 refs @ 6132 */ - "100\0" /* 100 refs @ 6142 */ - "3c905C-TX\0" /* 1 refs @ 6146 */ - "w/\0" /* 48 refs @ 6156 */ - "mngmt\0" /* 2 refs @ 6159 */ - "3c905CX-TX\0" /* 1 refs @ 6165 */ - "3c920B-EMB-WNM\0" /* 1 refs @ 6176 */ - "3c910\0" /* 1 refs @ 6191 */ - "OfficeConnect\0" /* 1 refs @ 6197 */ - "10/100B\0" /* 1 refs @ 6211 */ - "3c980\0" /* 1 refs @ 6219 */ - "Server\0" /* 5 refs @ 6225 */ - "3c980C-TXM\0" /* 1 refs @ 6232 */ - "3c990-TX\0" /* 1 refs @ 6243 */ - "3XP\0" /* 8 refs @ 6252 */ - "3CR990-TX-95\0" /* 1 refs @ 6256 */ - "3CR990-TX-97\0" /* 1 refs @ 6269 */ - "3c990B\0" /* 1 refs @ 6282 */ - "3CR990-FX\0" /* 1 refs @ 6289 */ - "3CR990-SVR-95\0" /* 1 refs @ 6299 */ - "3CR990-SVR-97\0" /* 1 refs @ 6313 */ - "3c990BSVR\0" /* 1 refs @ 6327 */ - "Voodoo\0" /* 2 refs @ 6337 */ - "Voodoo2\0" /* 1 refs @ 6344 */ - "Banshee\0" /* 1 refs @ 6352 */ - "Voodoo3\0" /* 1 refs @ 6360 */ - "4/5\0" /* 2 refs @ 6368 */ - "GLINT\0" /* 9 refs @ 6372 */ - "300SX\0" /* 1 refs @ 6378 */ - "500TX\0" /* 1 refs @ 6384 */ - "DELTA\0" /* 1 refs @ 6390 */ - "Permedia\0" /* 5 refs @ 6396 */ - "500MX\0" /* 1 refs @ 6405 */ - "2\0" /* 160 refs @ 6411 */ - "GAMMA\0" /* 1 refs @ 6413 */ - "2V\0" /* 1 refs @ 6419 */ - "3\0" /* 100 refs @ 6422 */ - "WILDCAT\0" /* 1 refs @ 6424 */ - "5110\0" /* 1 refs @ 6432 */ - "Escalade\0" /* 2 refs @ 6437 */ - "ATA\0" /* 51 refs @ 6446 */ - "RAID\0" /* 61 refs @ 6450 */ - "Controller\0" /* 1078 refs @ 6455 */ - "7000/8000\0" /* 1 refs @ 6466 */ - "Series\0" /* 892 refs @ 6476 */ - "9000\0" /* 6 refs @ 6483 */ - "9550\0" /* 1 refs @ 6488 */ - "9650\0" /* 1 refs @ 6493 */ - "9690\0" /* 1 refs @ 6498 */ - "9750\0" /* 1 refs @ 6503 */ - "FE2500\0" /* 1 refs @ 6508 */ - "PCM200\0" /* 2 refs @ 6515 */ - "FE2000VX\0" /* 1 refs @ 6522 */ - "(OEM)\0" /* 1 refs @ 6531 */ - "FE2500MX\0" /* 1 refs @ 6537 */ - "ACCM\0" /* 1 refs @ 6546 */ - "2188\0" /* 1 refs @ 6551 */ - "VL-PCI\0" /* 3 refs @ 6556 */ - "Bridge\0" /* 703 refs @ 6563 */ - "2051\0" /* 2 refs @ 6570 */ - "Single\0" /* 11 refs @ 6575 */ - "Solution\0" /* 2 refs @ 6582 */ - "(host\0" /* 1 refs @ 6591 */ - "Bridge)\0" /* 2 refs @ 6597 */ - "(ISA\0" /* 1 refs @ 6605 */ - "ATP850U/UF\0" /* 1 refs @ 6610 */ - "UDMA\0" /* 6 refs @ 6621 */ - "IDE\0" /* 105 refs @ 6626 */ - "ATP860\0" /* 1 refs @ 6630 */ - "ATP860-A\0" /* 1 refs @ 6637 */ - "ATP865\0" /* 1 refs @ 6646 */ - "ATP865-A\0" /* 1 refs @ 6653 */ - "AEC6710\0" /* 1 refs @ 6662 */ - "SCSI\0" /* 28 refs @ 6670 */ - "AEC6712UW\0" /* 1 refs @ 6675 */ - "AEC6712U\0" /* 1 refs @ 6685 */ - "AEC6712S\0" /* 1 refs @ 6694 */ - "AEC6710D\0" /* 1 refs @ 6703 */ - "AEC6715UW\0" /* 1 refs @ 6712 */ - "MPX\0" /* 2 refs @ 6722 */ - "5030/5038\0" /* 1 refs @ 6726 */ - "EN2242\0" /* 1 refs @ 6736 */ - "M1435\0" /* 1 refs @ 6743 */ - "PCI-16[12]0\0" /* 1 refs @ 6749 */ - "serial\0" /* 13 refs @ 6761 */ - "PCI-1604\0" /* 1 refs @ 6768 */ - "PCI-1610\0" /* 1 refs @ 6777 */ - "4\0" /* 73 refs @ 6786 */ - "port\0" /* 19 refs @ 6788 */ - "PCI-1612\0" /* 1 refs @ 6793 */ - "PCI-1620\0" /* 2 refs @ 6802 */ - "8\0" /* 55 refs @ 6811 */ - "(1-4)\0" /* 1 refs @ 6813 */ - "(5-8)\0" /* 1 refs @ 6819 */ - "M1445\0" /* 1 refs @ 6825 */ - "M1449\0" /* 1 refs @ 6831 */ - "PCI-ISA\0" /* 51 refs @ 6837 */ - "M1451\0" /* 1 refs @ 6845 */ - "Host-PCI\0" /* 43 refs @ 6851 */ - "M1461\0" /* 1 refs @ 6860 */ - "M1531\0" /* 1 refs @ 6866 */ - "M1533\0" /* 1 refs @ 6872 */ - "M1541\0" /* 1 refs @ 6878 */ - "M1543\0" /* 1 refs @ 6884 */ - "M1563\0" /* 1 refs @ 6890 */ - "M1647\0" /* 1 refs @ 6896 */ - "M1689\0" /* 1 refs @ 6902 */ - "M3309\0" /* 1 refs @ 6908 */ - "MPEG\0" /* 3 refs @ 6914 */ - "Decoder\0" /* 30 refs @ 6919 */ - "M4803\0" /* 1 refs @ 6927 */ - "M5229\0" /* 1 refs @ 6933 */ - "M5237\0" /* 1 refs @ 6939 */ - "USB\0" /* 262 refs @ 6945 */ - "1.1\0" /* 1 refs @ 6949 */ - "Host\0" /* 397 refs @ 6953 */ - "M5239\0" /* 1 refs @ 6958 */ - "2.0\0" /* 11 refs @ 6964 */ - "M5243\0" /* 1 refs @ 6968 */ - "PCI-AGP\0" /* 2 refs @ 6974 */ - "M5247\0" /* 1 refs @ 6982 */ - "M5249\0" /* 1 refs @ 6988 */ - "Hypertransport\0" /* 1 refs @ 6994 */ - "to\0" /* 33 refs @ 7009 */ - "M5257\0" /* 1 refs @ 7012 */ - "M5261\0" /* 1 refs @ 7018 */ - "M5288\0" /* 1 refs @ 7024 */ - "SATA/Raid\0" /* 1 refs @ 7030 */ - "M5451\0" /* 1 refs @ 7040 */ - "AC-Link\0" /* 3 refs @ 7046 */ - "Audio\0" /* 170 refs @ 7054 */ - "M5453\0" /* 1 refs @ 7060 */ - "M5455\0" /* 1 refs @ 7066 */ - "M7101\0" /* 1 refs @ 7072 */ - "Management\0" /* 25 refs @ 7078 */ - "AIC-1160\0" /* 1 refs @ 7089 */ - "AIC-7850\0" /* 1 refs @ 7098 */ - "AIC-7855\0" /* 1 refs @ 7107 */ - "AIC-5900\0" /* 1 refs @ 7116 */ - "ATM\0" /* 13 refs @ 7125 */ - "AIC-5905\0" /* 1 refs @ 7129 */ - "APA-1480\0" /* 1 refs @ 7138 */ - "Ultra\0" /* 28 refs @ 7147 */ - "AIC-7860\0" /* 1 refs @ 7153 */ - "AHA-2940A\0" /* 1 refs @ 7162 */ - "AIC-6915\0" /* 1 refs @ 7172 */ - "AIC-7870\0" /* 1 refs @ 7181 */ - "AHA-2940\0" /* 3 refs @ 7190 */ - "AHA-3940\0" /* 2 refs @ 7199 */ - "AHA-3985\0" /* 1 refs @ 7208 */ - "AHA-2944\0" /* 2 refs @ 7217 */ - "AIC-7895\0" /* 1 refs @ 7226 */ - "AIC-7880\0" /* 1 refs @ 7235 */ - "AHA-389X\0" /* 1 refs @ 7244 */ - "Pro\0" /* 80 refs @ 7253 */ - "AHA-2940U2\0" /* 1 refs @ 7257 */ - "U2\0" /* 6 refs @ 7268 */ - "AHA-2930U2\0" /* 1 refs @ 7271 */ - "AIC-7890/1\0" /* 1 refs @ 7282 */ - "AHA-3950U2B\0" /* 1 refs @ 7293 */ - "AHA-3950U2D\0" /* 1 refs @ 7305 */ - "AIC-7896/7\0" /* 1 refs @ 7317 */ - "AIC-7892A\0" /* 1 refs @ 7328 */ - "U160\0" /* 8 refs @ 7338 */ - "AIC-7892B\0" /* 1 refs @ 7343 */ - "AIC-7892D\0" /* 1 refs @ 7353 */ - "AIC-7892P\0" /* 1 refs @ 7363 */ - "AIC-7899A\0" /* 1 refs @ 7373 */ - "AIC-7899B\0" /* 1 refs @ 7383 */ - "AIC-7899D\0" /* 1 refs @ 7393 */ - "AIC-7899F\0" /* 1 refs @ 7403 */ - "AIC-7899P\0" /* 1 refs @ 7413 */ - "1420SA\0" /* 1 refs @ 7423 */ - "1430SA\0" /* 1 refs @ 7430 */ - "ServeRAID\0" /* 4 refs @ 7437 */ - "6/7\0" /* 1 refs @ 7447 */ - "(marco)\0" /* 1 refs @ 7451 */ - "AAC-2622\0" /* 1 refs @ 7459 */ - "ASR-2200S\0" /* 2 refs @ 7468 */ - "ASR-2120S\0" /* 1 refs @ 7478 */ - "ASR-2410SA\0" /* 1 refs @ 7488 */ - "AAR-2810SA\0" /* 1 refs @ 7499 */ - "3405\0" /* 1 refs @ 7510 */ - "3805\0" /* 1 refs @ 7515 */ - "2405\0" /* 1 refs @ 7520 */ - "2445\0" /* 1 refs @ 7525 */ - "2805\0" /* 1 refs @ 7530 */ - "AAC-364\0" /* 1 refs @ 7535 */ - "ASR-5400S\0" /* 1 refs @ 7543 */ - "PERC\0" /* 23 refs @ 7553 */ - "2/QC\0" /* 1 refs @ 7558 */ - "3/QC\0" /* 1 refs @ 7563 */ - "HP\0" /* 1 refs @ 7568 */ - "M110\0" /* 1 refs @ 7571 */ - "G2\0" /* 1 refs @ 7576 */ - "ASR-2610SA\0" /* 1 refs @ 7579 */ - "Rhine\0" /* 2 refs @ 7590 */ - "II\0" /* 35 refs @ 7596 */ - "8139\0" /* 3 refs @ 7599 */ - "AL981\0" /* 1 refs @ 7604 */ - "(Comet)\0" /* 1 refs @ 7610 */ - "AN983\0" /* 1 refs @ 7618 */ - "(Centaur-P)\0" /* 1 refs @ 7624 */ - "AN985\0" /* 1 refs @ 7636 */ - "(Centaur-C)\0" /* 1 refs @ 7642 */ - "Infineon\0" /* 1 refs @ 7654 */ - "ADM5120\0" /* 1 refs @ 7663 */ - "ADM8211\0" /* 1 refs @ 7671 */ - "11Mbps\0" /* 1 refs @ 7679 */ - "802.11b\0" /* 10 refs @ 7686 */ - "WLAN\0" /* 6 refs @ 7694 */ - "ADM9511\0" /* 1 refs @ 7699 */ - "(Centaur-II)\0" /* 2 refs @ 7707 */ - "ADM9513\0" /* 1 refs @ 7720 */ - "ABP-930/40UA\0" /* 1 refs @ 7728 */ - "ABP-940UW\0" /* 1 refs @ 7741 */ - "ASB-3940U2W\0" /* 1 refs @ 7751 */ - "ASB-3940U3W\0" /* 1 refs @ 7763 */ - "Tachyon\0" /* 4 refs @ 7775 */ - "DX2\0" /* 1 refs @ 7783 */ - "FC\0" /* 4 refs @ 7787 */ - "PC4500/PC4800\0" /* 1 refs @ 7790 */ - "PCI350\0" /* 1 refs @ 7804 */ - "PC4500\0" /* 1 refs @ 7811 */ - "PC4800\0" /* 1 refs @ 7818 */ - "MPI350\0" /* 1 refs @ 7825 */ - "SES1001T\0" /* 1 refs @ 7832 */ - "iSCSI\0" /* 7 refs @ 7841 */ - "Accelerator\0" /* 19 refs @ 7847 */ - "AT24\0" /* 1 refs @ 7859 */ - "AT25\0" /* 1 refs @ 7864 */ - "ACEnic\0" /* 4 refs @ 7869 */ - "1000baseSX\0" /* 11 refs @ 7876 */ - "1000baseT\0" /* 48 refs @ 7887 */ - "BCM5700\0" /* 2 refs @ 7897 */ - "BCM5701\0" /* 3 refs @ 7905 */ - "EP4CGX15BF14C8N\0" /* 1 refs @ 7913 */ - "AC1000\0" /* 1 refs @ 7929 */ - "AC1001\0" /* 1 refs @ 7936 */ - "AC9100\0" /* 1 refs @ 7943 */ - "AC1003\0" /* 1 refs @ 7950 */ - "NVMe\0" /* 25 refs @ 7957 */ - "SSD\0" /* 28 refs @ 7962 */ - "16650-compatible\0" /* 1 refs @ 7966 */ - "UART\0" /* 105 refs @ 7983 */ - "Elastic\0" /* 1 refs @ 7988 */ - "K8\0" /* 4 refs @ 7996 */ - "AMD64\0" /* 14 refs @ 7999 */ - "HyperTransport\0" /* 9 refs @ 8005 */ - "Configuration\0" /* 48 refs @ 8020 */ - "Address\0" /* 48 refs @ 8034 */ - "Map\0" /* 10 refs @ 8042 */ - "DRAM\0" /* 51 refs @ 8046 */ - "Miscellaneous\0" /* 9 refs @ 8051 */ - "Family10h\0" /* 5 refs @ 8065 */ - "Link\0" /* 52 refs @ 8075 */ - "1Ah/0xh\0" /* 22 refs @ 8080 */ - "Fabric\0" /* 80 refs @ 8088 */ - "Family11h\0" /* 5 refs @ 8095 */ - "Family15h\0" /* 32 refs @ 8105 */ - "Processor\0" /* 59 refs @ 8115 */ - "Function\0" /* 45 refs @ 8125 */ - "0\0" /* 162 refs @ 8134 */ - "1\0" /* 190 refs @ 8136 */ - "5\0" /* 49 refs @ 8138 */ - "Root\0" /* 330 refs @ 8140 */ - "Complex\0" /* 17 refs @ 8145 */ - "Port\0" /* 461 refs @ 8153 */ - "IOMMU\0" /* 13 refs @ 8158 */ - "Family16h\0" /* 19 refs @ 8164 */ - "GPP\0" /* 31 refs @ 8174 */ - "17h/7xh\0" /* 12 refs @ 8178 */ - "17h/6xh\0" /* 20 refs @ 8186 */ - "Family17h\0" /* 21 refs @ 8194 */ - "PCIe\0" /* 749 refs @ 8204 */ - "17h/Axh\0" /* 19 refs @ 8209 */ - "Dummy\0" /* 11 refs @ 8217 */ - "Crypto\0" /* 6 refs @ 8223 */ - "HD\0" /* 377 refs @ 8230 */ - "xHCI\0" /* 52 refs @ 8233 */ - "Family17h/7xh\0" /* 5 refs @ 8238 */ - "Reserved\0" /* 7 refs @ 8252 */ - "SPP\0" /* 1 refs @ 8261 */ - "3.0\0" /* 7 refs @ 8265 */ - "19h/7xh\0" /* 3 refs @ 8269 */ - "19h/1xh\0" /* 26 refs @ 8277 */ - "RCEC\0" /* 3 refs @ 8285 */ - "Internal\0" /* 11 refs @ 8290 */ - "Primary\0" /* 4 refs @ 8299 */ - "Non\0" /* 6 refs @ 8307 */ - "Transparent\0" /* 6 refs @ 8311 */ - "Secondary\0" /* 33 refs @ 8323 */ - "vNTB\0" /* 1 refs @ 8333 */ - "Swith\0" /* 2 refs @ 8338 */ - "NBIF\0" /* 1 refs @ 8344 */ - "DS\0" /* 1 refs @ 8349 */ - "in\0" /* 3 refs @ 8352 */ - "PSP\0" /* 2 refs @ 8355 */ - "ACP\0" /* 1 refs @ 8359 */ - "19h/6xh\0" /* 18 refs @ 8363 */ - "6\0" /* 58 refs @ 8371 */ - "7\0" /* 53 refs @ 8373 */ - "3.1\0" /* 11 refs @ 8375 */ - "Secure\0" /* 6 refs @ 8379 */ - "BIOmetric\0" /* 2 refs @ 8386 */ - "GPU\0" /* 16 refs @ 8396 */ - "Family14h\0" /* 6 refs @ 8400 */ - "North\0" /* 14 refs @ 8410 */ - "C-state\0" /* 4 refs @ 8416 */ - "Cryptographic\0" /* 2 refs @ 8424 */ - "Coprocessor\0" /* 3 refs @ 8438 */ - "3.2\0" /* 20 refs @ 8450 */ - "SW.US\0" /* 1 refs @ 8454 */ - "SW.DS\0" /* 1 refs @ 8460 */ - "ASP\0" /* 1 refs @ 8466 */ - "15h/6xh\0" /* 13 refs @ 8470 */ - "15h/7xh\0" /* 6 refs @ 8478 */ - "Family17h/1xh\0" /* 17 refs @ 8486 */ - "Platform\0" /* 2 refs @ 8500 */ - "Security\0" /* 15 refs @ 8509 */ - "17h/1xh\0" /* 1 refs @ 8518 */ - "I2S\0" /* 4 refs @ 8526 */ - "17h/9xh\0" /* 14 refs @ 8530 */ - "10GbE\0" /* 22 refs @ 8538 */ - "Bluetooth\0" /* 2 refs @ 8544 */ - "PCIE\0" /* 3 refs @ 8554 */ - "19h/5xh\0" /* 8 refs @ 8559 */ - "Family12h/14h\0" /* 8 refs @ 8567 */ - "Family12h\0" /* 8 refs @ 8581 */ - "GPP0\0" /* 1 refs @ 8591 */ - "Misc.\0" /* 1 refs @ 8596 */ - "Seattle\0" /* 3 refs @ 8602 */ - "PCnet-PCI\0" /* 1 refs @ 8610 */ - "PCnet-Home\0" /* 1 refs @ 8620 */ - "HomePNA\0" /* 4 refs @ 8631 */ - "Alchemy\0" /* 1 refs @ 8639 */ - "AM\0" /* 1 refs @ 8647 */ - "1771\0" /* 1 refs @ 8650 */ - "MBW\0" /* 1 refs @ 8655 */ - "PCscsi-PCI\0" /* 1 refs @ 8659 */ - "Geode\0" /* 3 refs @ 8670 */ - "LX\0" /* 6 refs @ 8676 */ - "VGA\0" /* 17 refs @ 8679 */ - "AES\0" /* 1 refs @ 8683 */ - "Block\0" /* 1 refs @ 8687 */ - "CS5536\0" /* 9 refs @ 8693 */ - "GeodeLink\0" /* 1 refs @ 8700 */ - "South\0" /* 10 refs @ 8710 */ - "Flash\0" /* 3 refs @ 8716 */ - "OHCI\0" /* 19 refs @ 8722 */ - "EHCI\0" /* 46 refs @ 8727 */ - "UDC\0" /* 1 refs @ 8732 */ - "UOC\0" /* 1 refs @ 8736 */ - "Elan\0" /* 1 refs @ 8740 */ - "SC520\0" /* 1 refs @ 8745 */ - "Hudson\0" /* 20 refs @ 8751 */ - "300\0" /* 114 refs @ 8758 */ - "SATA\0" /* 272 refs @ 8762 */ - "FCH\0" /* 14 refs @ 8767 */ - "400\0" /* 125 refs @ 8771 */ - "AHCI\0" /* 94 refs @ 8775 */ - "500\0" /* 122 refs @ 8780 */ - "AMD751\0" /* 2 refs @ 8784 */ - "PCI-PCI\0" /* 81 refs @ 8791 */ - "IGR4\0" /* 2 refs @ 8799 */ - "AGP\0" /* 74 refs @ 8804 */ - "AMD762\0" /* 2 refs @ 8808 */ - "AMD761\0" /* 2 refs @ 8815 */ - "AMD755\0" /* 4 refs @ 8822 */ - "ACPI\0" /* 4 refs @ 8829 */ - "AMD756\0" /* 4 refs @ 8834 */ - "AMD766\0" /* 4 refs @ 8841 */ - "AMD768\0" /* 7 refs @ 8848 */ - "PCI-ISA/LPC\0" /* 1 refs @ 8855 */ - "EIDE\0" /* 2 refs @ 8867 */ - "AC97\0" /* 8 refs @ 8872 */ - "AMD8131\0" /* 2 refs @ 8877 */ - "PCI-X\0" /* 12 refs @ 8885 */ - "Tunnel\0" /* 1 refs @ 8891 */ - "IO\0" /* 18 refs @ 8898 */ - "Apic\0" /* 1 refs @ 8901 */ - "AMD8151\0" /* 2 refs @ 8906 */ - "AMD8123\0" /* 1 refs @ 8914 */ - "AMD8132\0" /* 1 refs @ 8922 */ - "IOAPIC\0" /* 4 refs @ 8930 */ - "AMD8111\0" /* 12 refs @ 8937 */ - "I/O\0" /* 57 refs @ 8945 */ - "Hub\0" /* 51 refs @ 8949 */ - "7461\0" /* 1 refs @ 8953 */ - "LPC\0" /* 206 refs @ 8958 */ - "SMBus\0" /* 88 refs @ 8962 */ - "MC97\0" /* 1 refs @ 8968 */ - "756b\0" /* 1 refs @ 8973 */ - "(IDE)\0" /* 3 refs @ 8978 */ - "(AHCI)\0" /* 29 refs @ 8984 */ - "(RAID)\0" /* 39 refs @ 8991 */ - "(RAID5)\0" /* 1 refs @ 8998 */ - "(AMD\0" /* 1 refs @ 9006 */ - "AHCI)\0" /* 1 refs @ 9011 */ - "SD\0" /* 11 refs @ 9017 */ - "X370/X399\0" /* 1 refs @ 9020 */ - "RS780\0" /* 8 refs @ 9030 */ - "RS785/RS880\0" /* 1 refs @ 9036 */ - "RS780/RS880\0" /* 5 refs @ 9048 */ - "(int\0" /* 2 refs @ 9060 */ - "gfx)\0" /* 2 refs @ 9065 */ - "(ext\0" /* 2 refs @ 9070 */ - "gfx\0" /* 2 refs @ 9075 */ - "0)\0" /* 5 refs @ 9079 */ - "PCI-PCIE\0" /* 9 refs @ 9082 */ - "(port\0" /* 6 refs @ 9091 */ - "1)\0" /* 6 refs @ 9097 */ - "2)\0" /* 7 refs @ 9100 */ - "3)\0" /* 4 refs @ 9103 */ - "4)\0" /* 6 refs @ 9106 */ - "5)\0" /* 2 refs @ 9109 */ - "(NB-SB\0" /* 3 refs @ 9112 */ - "link)\0" /* 1 refs @ 9119 */ - "MegaRAID\0" /* 27 refs @ 9125 */ - "eMAG\0" /* 8 refs @ 9134 */ - "AD1889\0" /* 1 refs @ 9139 */ - "SoundMAX\0" /* 1 refs @ 9146 */ - "ADSP-2141\0" /* 1 refs @ 9155 */ - "Bandit\0" /* 2 refs @ 9165 */ - "Grand\0" /* 1 refs @ 9172 */ - "Central\0" /* 2 refs @ 9178 */ - "Control\0" /* 41 refs @ 9186 */ - "PlanB\0" /* 1 refs @ 9194 */ - "OHare\0" /* 1 refs @ 9200 */ - "Heathrow\0" /* 1 refs @ 9206 */ - "Paddington\0" /* 1 refs @ 9215 */ - "UniNorth\0" /* 12 refs @ 9226 */ - "Firewire\0" /* 9 refs @ 9235 */ - "KeyLargo\0" /* 2 refs @ 9244 */ - "GMAC\0" /* 6 refs @ 9253 */ - "Pangea\0" /* 6 refs @ 9258 */ - "ATA/100\0" /* 1 refs @ 9265 */ - "Kauai\0" /* 1 refs @ 9273 */ - "Intrepid\0" /* 8 refs @ 9279 */ - "K2\0" /* 5 refs @ 9288 */ - "MAC-IO\0" /* 1 refs @ 9291 */ - "UATA\0" /* 1 refs @ 9298 */ - "U3\0" /* 6 refs @ 9303 */ - "Shasta\0" /* 8 refs @ 9306 */ - "FireWire\0" /* 2 refs @ 9313 */ - "AQC100\0" /* 1 refs @ 9322 */ - "10\0" /* 57 refs @ 9329 */ - "AQC113DEV\0" /* 1 refs @ 9332 */ - "AQC113\0" /* 1 refs @ 9342 */ - "AQC107\0" /* 1 refs @ 9349 */ - "AQC108\0" /* 1 refs @ 9356 */ - "AQC109\0" /* 1 refs @ 9363 */ - "2.5\0" /* 6 refs @ 9370 */ - "AQC111\0" /* 1 refs @ 9374 */ - "AQC116C\0" /* 1 refs @ 9381 */ - "AQC112\0" /* 1 refs @ 9389 */ - "AQC115C\0" /* 1 refs @ 9396 */ - "AQC113C\0" /* 1 refs @ 9404 */ - "AQC113CA\0" /* 1 refs @ 9412 */ - "AQC100S\0" /* 1 refs @ 9421 */ - "AQC107S\0" /* 1 refs @ 9429 */ - "AQC108S\0" /* 1 refs @ 9437 */ - "AQC109S\0" /* 1 refs @ 9445 */ - "AQC111S\0" /* 1 refs @ 9453 */ - "AQC112S\0" /* 1 refs @ 9461 */ - "AQC114CS\0" /* 1 refs @ 9469 */ - "AQC113CS\0" /* 1 refs @ 9478 */ - "D100\0" /* 1 refs @ 9487 */ - "D107\0" /* 1 refs @ 9492 */ - "D108\0" /* 1 refs @ 9497 */ - "D109\0" /* 1 refs @ 9502 */ - "1000PV\0" /* 1 refs @ 9507 */ - "2000PV\0" /* 1 refs @ 9514 */ - "2000MT\0" /* 1 refs @ 9521 */ - "ARC-1110\0" /* 1 refs @ 9528 */ - "ARC-1120\0" /* 1 refs @ 9537 */ - "ARC-1130\0" /* 1 refs @ 9546 */ - "ARC-1160\0" /* 1 refs @ 9555 */ - "ARC-1170\0" /* 1 refs @ 9564 */ - "ARC-1200\0" /* 2 refs @ 9573 */ - "rev\0" /* 6 refs @ 9582 */ - "ARC-1202\0" /* 1 refs @ 9586 */ - "ARC-1203\0" /* 1 refs @ 9595 */ - "ARC-1210\0" /* 1 refs @ 9604 */ - "ARC-1214\0" /* 1 refs @ 9613 */ - "ARC-1220\0" /* 1 refs @ 9622 */ - "ARC-1224\0" /* 1 refs @ 9631 */ - "ARC-1230\0" /* 1 refs @ 9640 */ - "ARC-1260\0" /* 1 refs @ 9649 */ - "ARC-1270\0" /* 1 refs @ 9658 */ - "ARC-1280\0" /* 1 refs @ 9667 */ - "ARC-1380\0" /* 1 refs @ 9676 */ - "ARC-1381\0" /* 1 refs @ 9685 */ - "ARC-1680\0" /* 1 refs @ 9694 */ - "ARC-1681\0" /* 1 refs @ 9703 */ - "ARC-1880\0" /* 1 refs @ 9712 */ - "ARC-1884\0" /* 1 refs @ 9721 */ - "ARC-1886\0" /* 1 refs @ 9730 */ - "AX88140A\0" /* 1 refs @ 9739 */ - "AX99100\0" /* 1 refs @ 9748 */ - "Multi\0" /* 4 refs @ 9756 */ - "ASM1061\0" /* 4 refs @ 9762 */ - "III\0" /* 13 refs @ 9770 */ - "ASM1062\0" /* 1 refs @ 9774 */ - "+\0" /* 6 refs @ 9782 */ - "JMB575\0" /* 1 refs @ 9784 */ - "Multiplier\0" /* 1 refs @ 9791 */ - "ASM106x\0" /* 1 refs @ 9802 */ - "ASM1042\0" /* 1 refs @ 9810 */ - "ASM1083/1085\0" /* 1 refs @ 9818 */ - "PCIe-PCI\0" /* 6 refs @ 9831 */ - "ASM1042A\0" /* 1 refs @ 9840 */ - "ASM1182E\0" /* 1 refs @ 9849 */ - "ASM1184E\0" /* 1 refs @ 9858 */ - "ASM1142\0" /* 1 refs @ 9867 */ - "ASM1143\0" /* 1 refs @ 9875 */ - "ASM2142\0" /* 1 refs @ 9883 */ - "ISDN\0" /* 8 refs @ 9891 */ - "L1E\0" /* 1 refs @ 9896 */ - "L1\0" /* 1 refs @ 9900 */ - "AR8132\0" /* 1 refs @ 9903 */ - "L2C\0" /* 4 refs @ 9910 */ - "AR8131\0" /* 1 refs @ 9914 */ - "L1C\0" /* 1 refs @ 9921 */ - "AR8151\0" /* 2 refs @ 9925 */ - "v1.0\0" /* 1 refs @ 9932 */ - "L1D\0" /* 2 refs @ 9937 */ - "v2.0\0" /* 4 refs @ 9941 */ - "AR8162\0" /* 1 refs @ 9946 */ - "AR8161\0" /* 1 refs @ 9953 */ - "AR8172\0" /* 1 refs @ 9960 */ - "AR8171\0" /* 1 refs @ 9967 */ - "L2\0" /* 1 refs @ 9974 */ - "Mbit\0" /* 2 refs @ 9977 */ - "AR8152\0" /* 2 refs @ 9982 */ - "v1.1\0" /* 1 refs @ 9989 */ - "Killer\0" /* 5 refs @ 9994 */ - "E2200\0" /* 1 refs @ 10001 */ - "E2400\0" /* 2 refs @ 10007 */ - "E2500\0" /* 1 refs @ 10013 */ - "Kaveri\0" /* 2 refs @ 10019 */ - "HDMI\0" /* 10 refs @ 10026 */ - "Radeon\0" /* 528 refs @ 10031 */ - "R7\0" /* 20 refs @ 10038 */ - "(Kaveri)\0" /* 1 refs @ 10041 */ - "Wrestler\0" /* 1 refs @ 10050 */ - "BeaverCreek\0" /* 1 refs @ 10059 */ - "Mobility\0" /* 84 refs @ 10071 */ - "X600\0" /* 3 refs @ 10080 */ - "(M24)\0" /* 1 refs @ 10085 */ - "3150\0" /* 1 refs @ 10091 */ - "FireGL\0" /* 43 refs @ 10096 */ - "M24\0" /* 1 refs @ 10103 */ - "GL\0" /* 6 refs @ 10107 */ - "3154\0" /* 1 refs @ 10110 */ - "(RV380)\0" /* 2 refs @ 10115 */ - "3E50\0" /* 1 refs @ 10123 */ - "V3200\0" /* 1 refs @ 10128 */ - "3E54\0" /* 1 refs @ 10134 */ - "IGP320\0" /* 1 refs @ 10139 */ - "(A3)\0" /* 1 refs @ 10146 */ - "4136\0" /* 1 refs @ 10151 */ - "IGP330/340/350\0" /* 1 refs @ 10156 */ - "(A4)\0" /* 2 refs @ 10171 */ - "4137\0" /* 1 refs @ 10176 */ - "9500\0" /* 3 refs @ 10181 */ - "AD\0" /* 1 refs @ 10186 */ - "AE\0" /* 1 refs @ 10189 */ - "9600TX\0" /* 2 refs @ 10192 */ - "AF\0" /* 3 refs @ 10199 */ - "Z1\0" /* 1 refs @ 10202 */ - "9800SE\0" /* 1 refs @ 10205 */ - "AH\0" /* 1 refs @ 10212 */ - "9800\0" /* 6 refs @ 10215 */ - "AI\0" /* 1 refs @ 10220 */ - "AJ\0" /* 1 refs @ 10223 */ - "X2\0" /* 11 refs @ 10226 */ - "AK\0" /* 1 refs @ 10229 */ - "9600\0" /* 8 refs @ 10232 */ - "AP\0" /* 1 refs @ 10237 */ - "9600SE\0" /* 1 refs @ 10240 */ - "AQ\0" /* 1 refs @ 10247 */ - "9600XT\0" /* 1 refs @ 10250 */ - "AR\0" /* 1 refs @ 10257 */ - "AS\0" /* 1 refs @ 10260 */ - "T2\0" /* 2 refs @ 10263 */ - "AT\0" /* 2 refs @ 10266 */ - "RV360\0" /* 1 refs @ 10269 */ - "AV\0" /* 1 refs @ 10275 */ - "Mach32\0" /* 1 refs @ 10278 */ - "LE\0" /* 6 refs @ 10285 */ - "XT\0" /* 21 refs @ 10288 */ - "7000\0" /* 2 refs @ 10291 */ - "IGP\0" /* 9 refs @ 10296 */ - "(A4+)\0" /* 1 refs @ 10300 */ - "8500\0" /* 5 refs @ 10306 */ - "AIW\0" /* 2 refs @ 10311 */ - "BB\0" /* 1 refs @ 10315 */ - "BC\0" /* 1 refs @ 10318 */ - "IGP320M\0" /* 1 refs @ 10321 */ - "(U1)\0" /* 1 refs @ 10329 */ - "4336\0" /* 1 refs @ 10334 */ - "IGP330M/340M/350M\0" /* 1 refs @ 10339 */ - "(U2)\0" /* 1 refs @ 10357 */ - "4337\0" /* 1 refs @ 10362 */ - "IXP\0" /* 7 refs @ 10367 */ - "AC'97\0" /* 14 refs @ 10371 */ - "SB200\0" /* 8 refs @ 10377 */ - "USB2\0" /* 9 refs @ 10383 */ - "Mach64\0" /* 6 refs @ 10388 */ - "CT\0" /* 1 refs @ 10395 */ - "CX\0" /* 1 refs @ 10398 */ - "SB300\0" /* 2 refs @ 10401 */ - "IXP300\0" /* 1 refs @ 10407 */ - "SB400\0" /* 10 refs @ 10414 */ - "SB600\0" /* 12 refs @ 10420 */ - "SBx00\0" /* 3 refs @ 10426 */ - "Azalia\0" /* 1 refs @ 10432 */ - "OHCI0\0" /* 1 refs @ 10439 */ - "OHCI1\0" /* 1 refs @ 10445 */ - "OHCI2\0" /* 1 refs @ 10451 */ - "OHCI3\0" /* 1 refs @ 10457 */ - "OHCI4\0" /* 1 refs @ 10463 */ - "SB700-SB900\0" /* 14 refs @ 10469 */ - "(IDE\0" /* 6 refs @ 10481 */ - "mode)\0" /* 14 refs @ 10486 */ - "(AHCI\0" /* 4 refs @ 10492 */ - "RAID5\0" /* 1 refs @ 10498 */ - "(Storage\0" /* 1 refs @ 10504 */ - "bridge\0" /* 16 refs @ 10513 */ - "(PCIe\0" /* 13 refs @ 10520 */ - "SB900\0" /* 2 refs @ 10526 */ - "Rage\0" /* 66 refs @ 10532 */ - "(AGP)\0" /* 6 refs @ 10537 */ - "(AGP\0" /* 5 refs @ 10543 */ - "1x)\0" /* 1 refs @ 10548 */ - "Turbo\0" /* 1 refs @ 10552 */ - "XC\0" /* 3 refs @ 10558 */ - "(PCI66)\0" /* 2 refs @ 10561 */ - "(limited\0" /* 1 refs @ 10569 */ - "3D)\0" /* 1 refs @ 10578 */ - "I/II\0" /* 1 refs @ 10582 */ - "II+\0" /* 1 refs @ 10587 */ - "IIC\0" /* 4 refs @ 10591 */ - "GX\0" /* 2 refs @ 10595 */ - "9000/PRO\0" /* 1 refs @ 10598 */ - "If\0" /* 1 refs @ 10607 */ - "Ig\0" /* 1 refs @ 10610 */ - "X800\0" /* 6 refs @ 10613 */ - "(R420)\0" /* 7 refs @ 10618 */ - "JH\0" /* 1 refs @ 10625 */ - "X800PRO\0" /* 2 refs @ 10628 */ - "JI\0" /* 1 refs @ 10636 */ - "X800SE\0" /* 2 refs @ 10639 */ - "JJ\0" /* 1 refs @ 10646 */ - "JK\0" /* 1 refs @ 10649 */ - "JL\0" /* 1 refs @ 10652 */ - "X3\0" /* 1 refs @ 10655 */ - "JM\0" /* 1 refs @ 10658 */ - "(M18)\0" /* 1 refs @ 10661 */ - "JN\0" /* 1 refs @ 10667 */ - "X800XT\0" /* 2 refs @ 10670 */ - "JP\0" /* 1 refs @ 10677 */ - "LT\0" /* 6 refs @ 10680 */ - "133MHz)\0" /* 1 refs @ 10683 */ - "66MHz)\0" /* 1 refs @ 10691 */ - "M3\0" /* 2 refs @ 10698 */ - "L\0" /* 2 refs @ 10701 */ - "M1\0" /* 1 refs @ 10703 */ - "(PCI)\0" /* 2 refs @ 10706 */ - "M7\0" /* 2 refs @ 10712 */ - "LW\0" /* 1 refs @ 10715 */ - "7800\0" /* 1 refs @ 10718 */ - "M6\0" /* 3 refs @ 10723 */ - "LY\0" /* 1 refs @ 10726 */ - "LZ\0" /* 1 refs @ 10729 */ - "(M9)\0" /* 3 refs @ 10732 */ - "Ld\0" /* 1 refs @ 10737 */ - "Lf\0" /* 1 refs @ 10740 */ - "Lg\0" /* 1 refs @ 10743 */ - "128\0" /* 40 refs @ 10746 */ - "4x\0" /* 19 refs @ 10750 */ - "2x\0" /* 13 refs @ 10753 */ - "9700\0" /* 2 refs @ 10756 */ - "ND\0" /* 1 refs @ 10761 */ - "9700/9500Pro\0" /* 1 refs @ 10764 */ - "NE\0" /* 1 refs @ 10777 */ - "NF\0" /* 1 refs @ 10780 */ - "X1\0" /* 1 refs @ 10783 */ - "NG\0" /* 1 refs @ 10786 */ - "9800PRO\0" /* 1 refs @ 10789 */ - "NH\0" /* 1 refs @ 10797 */ - "NI\0" /* 1 refs @ 10800 */ - "9800XT\0" /* 1 refs @ 10803 */ - "NJ\0" /* 1 refs @ 10810 */ - "NK\0" /* 1 refs @ 10813 */ - "9600/9700\0" /* 1 refs @ 10816 */ - "(M10/11)\0" /* 1 refs @ 10826 */ - "NP\0" /* 1 refs @ 10835 */ - "(M10)\0" /* 3 refs @ 10838 */ - "NQ\0" /* 1 refs @ 10844 */ - "(M11)\0" /* 2 refs @ 10847 */ - "NR\0" /* 1 refs @ 10853 */ - "NS\0" /* 9 refs @ 10856 */ - "NT\0" /* 1 refs @ 10859 */ - "T2e\0" /* 1 refs @ 10862 */ - "NV\0" /* 1 refs @ 10866 */ - "9700/9500\0" /* 2 refs @ 10869 */ - "(TMDS)\0" /* 12 refs @ 10879 */ - "Fury\0" /* 1 refs @ 10886 */ - "MAXX\0" /* 1 refs @ 10891 */ - "QD\0" /* 1 refs @ 10896 */ - "QE\0" /* 1 refs @ 10899 */ - "QF\0" /* 1 refs @ 10902 */ - "QG\0" /* 1 refs @ 10905 */ - "8700/8800\0" /* 1 refs @ 10908 */ - "QH\0" /* 1 refs @ 10918 */ - "QL\0" /* 1 refs @ 10921 */ - "9100\0" /* 6 refs @ 10924 */ - "QM\0" /* 1 refs @ 10929 */ - "7500\0" /* 2 refs @ 10932 */ - "QW\0" /* 1 refs @ 10937 */ - "QX\0" /* 1 refs @ 10940 */ - "7000/VE\0" /* 2 refs @ 10943 */ - "QY\0" /* 1 refs @ 10951 */ - "QZ\0" /* 1 refs @ 10954 */ - "ES1000\0" /* 1 refs @ 10957 */ - "VR\0" /* 2 refs @ 10964 */ - "TF\0" /* 1 refs @ 10967 */ - "M300\0" /* 1 refs @ 10970 */ - "(M22)\0" /* 1 refs @ 10975 */ - "5460\0" /* 1 refs @ 10981 */ - "M22\0" /* 1 refs @ 10986 */ - "5464\0" /* 1 refs @ 10990 */ - "(R423)\0" /* 8 refs @ 10995 */ - "UH\0" /* 1 refs @ 11002 */ - "UI\0" /* 1 refs @ 11005 */ - "X800LE\0" /* 1 refs @ 11008 */ - "UJ\0" /* 1 refs @ 11015 */ - "UK\0" /* 1 refs @ 11018 */ - "GTO\0" /* 5 refs @ 11021 */ - "(R430)\0" /* 2 refs @ 11025 */ - "554F\0" /* 1 refs @ 11032 */ - "V7200\0" /* 3 refs @ 11037 */ - "UQ\0" /* 1 refs @ 11043 */ - "V5100\0" /* 1 refs @ 11046 */ - "UR\0" /* 1 refs @ 11052 */ - "V7100\0" /* 1 refs @ 11055 */ - "UT\0" /* 1 refs @ 11061 */ - "VT\0" /* 1 refs @ 11064 */ - "VTB\0" /* 1 refs @ 11067 */ - "VT4\0" /* 1 refs @ 11071 */ - "RS300\0" /* 2 refs @ 11075 */ - "(U3)\0" /* 1 refs @ 11081 */ - "9200\0" /* 7 refs @ 11086 */ - "RS480\0" /* 6 refs @ 11091 */ - "RD580\0" /* 1 refs @ 11097 */ - "CrossFire\0" /* 1 refs @ 11103 */ - "Xpress\0" /* 9 refs @ 11113 */ - "3200\0" /* 5 refs @ 11120 */ - "200G\0" /* 1 refs @ 11125 */ - "RD790\0" /* 12 refs @ 11130 */ - "(Dual\0" /* 1 refs @ 11136 */ - "Slot)\0" /* 1 refs @ 11142 */ - "RX780/RX790\0" /* 1 refs @ 11148 */ - "Chipset\0" /* 43 refs @ 11160 */ - "9200PRO\0" /* 1 refs @ 11168 */ - "5960\0" /* 1 refs @ 11176 */ - "5961\0" /* 1 refs @ 11181 */ - "5962\0" /* 1 refs @ 11186 */ - "5963\0" /* 1 refs @ 11191 */ - "9200SE\0" /* 2 refs @ 11196 */ - "5964\0" /* 1 refs @ 11203 */ - "(RS482M)\0" /* 1 refs @ 11208 */ - "GFX0\0" /* 4 refs @ 11217 */ - "A\0" /* 19 refs @ 11222 */ - "C\0" /* 7 refs @ 11224 */ - "E\0" /* 14 refs @ 11226 */ - "F\0" /* 2 refs @ 11228 */ - "GFX1\0" /* 4 refs @ 11230 */ - "Link)\0" /* 2 refs @ 11235 */ - "RD890\0" /* 17 refs @ 11241 */ - "Dual\0" /* 58 refs @ 11247 */ - "Slot\0" /* 3 refs @ 11252 */ - "2x16\0" /* 1 refs @ 11257 */ - "GFX\0" /* 5 refs @ 11262 */ - "2x8\0" /* 1 refs @ 11266 */ - "G\0" /* 1 refs @ 11270 */ - "H\0" /* 2 refs @ 11272 */ - "200\0" /* 62 refs @ 11274 */ - "X300\0" /* 2 refs @ 11278 */ - "(RV370)\0" /* 3 refs @ 11283 */ - "5B60\0" /* 1 refs @ 11291 */ - "Sapphire\0" /* 1 refs @ 11296 */ - "X550\0" /* 5 refs @ 11305 */ - "Silent\0" /* 1 refs @ 11310 */ - "V3100\0" /* 1 refs @ 11317 */ - "5B64\0" /* 1 refs @ 11323 */ - "D1100\0" /* 1 refs @ 11328 */ - "5B65\0" /* 1 refs @ 11334 */ - "RV370\0" /* 1 refs @ 11339 */ - "(M9+)\0" /* 2 refs @ 11345 */ - "X850\0" /* 2 refs @ 11351 */ - "5D57\0" /* 1 refs @ 11356 */ - "X700\0" /* 2 refs @ 11361 */ - "8670A/8670M/8750M\0" /* 1 refs @ 11366 */ - "8730M\0" /* 1 refs @ 11384 */ - "M265/M365X/M465\0" /* 1 refs @ 11390 */ - "M260X\0" /* 1 refs @ 11406 */ - "8790M\0" /* 1 refs @ 11412 */ - "8530M\0" /* 1 refs @ 11418 */ - "R5\0" /* 13 refs @ 11424 */ - "M240\0" /* 2 refs @ 11427 */ - "FirePro\0" /* 45 refs @ 11432 */ - "W2100\0" /* 1 refs @ 11440 */ - "8670\0" /* 1 refs @ 11446 */ - "250/350\0" /* 1 refs @ 11451 */ - "8570\0" /* 1 refs @ 11459 */ - "240/340\0" /* 2 refs @ 11464 */ - "520\0" /* 5 refs @ 11472 */ - "OEM\0" /* 16 refs @ 11476 */ - "M6100\0" /* 1 refs @ 11480 */ - "8930M\0" /* 1 refs @ 11486 */ - "R9\0" /* 26 refs @ 11492 */ - "M280X\0" /* 1 refs @ 11495 */ - "M270X/M280X\0" /* 1 refs @ 11501 */ - "W5100\0" /* 1 refs @ 11513 */ - "260X/360\0" /* 1 refs @ 11519 */ - "7790/8770\0" /* 1 refs @ 11528 */ - "360\0" /* 4 refs @ 11538 */ - "260/360\0" /* 1 refs @ 11542 */ - "8670A/8670M/8690M\0" /* 1 refs @ 11550 */ - "M330\0" /* 1 refs @ 11568 */ - "M430\0" /* 1 refs @ 11573 */ - "Mobile\0" /* 99 refs @ 11578 */ - "8570A/8570M\0" /* 1 refs @ 11585 */ - "M230\0" /* 3 refs @ 11597 */ - "M260DX\0" /* 1 refs @ 11602 */ - "8550M\0" /* 1 refs @ 11609 */ - "Instinct\0" /* 3 refs @ 11615 */ - "Vega\0" /* 13 refs @ 11624 */ - "20\0" /* 10 refs @ 11629 */ - "VII\0" /* 2 refs @ 11632 */ - "V7900\0" /* 1 refs @ 11636 */ - "V5900\0" /* 1 refs @ 11642 */ - "6970\0" /* 1 refs @ 11648 */ - "6950\0" /* 1 refs @ 11653 */ - "6990\0" /* 2 refs @ 11658 */ - "6930\0" /* 1 refs @ 11663 */ - "6970M/6990M\0" /* 1 refs @ 11668 */ - "6900M\0" /* 1 refs @ 11680 */ - "6870\0" /* 1 refs @ 11686 */ - "6850\0" /* 1 refs @ 11691 */ - "6790\0" /* 1 refs @ 11696 */ - "6730M/6770M/7690M\0" /* 1 refs @ 11701 */ - "6630M/6650M/6750M/7670M/7690M\0" /* 1 refs @ 11719 */ - "6610M/7610M\0" /* 1 refs @ 11749 */ - "E6760\0" /* 1 refs @ 11761 */ - "V4900\0" /* 1 refs @ 11767 */ - "V3900\0" /* 1 refs @ 11773 */ - "6650A/7650A\0" /* 1 refs @ 11779 */ - "7650A/7670A\0" /* 1 refs @ 11791 */ - "6670/7670\0" /* 1 refs @ 11803 */ - "6570/7570/8550\0" /* 1 refs @ 11813 */ - "7600\0" /* 2 refs @ 11828 */ - "7570\0" /* 1 refs @ 11833 */ - "5570/6510/7510/8510\0" /* 1 refs @ 11838 */ - "6400M/7400M\0" /* 1 refs @ 11858 */ - "6430M\0" /* 1 refs @ 11870 */ - "B6460\0" /* 1 refs @ 11876 */ - "6400M\0" /* 2 refs @ 11882 */ - "6450A/7450A\0" /* 1 refs @ 11888 */ - "8490\0" /* 1 refs @ 11900 */ - "235X\0" /* 1 refs @ 11905 */ - "7450A\0" /* 1 refs @ 11910 */ - "7470/8470\0" /* 1 refs @ 11916 */ - "235/310\0" /* 1 refs @ 11926 */ - "6450/7450/8450\0" /* 1 refs @ 11934 */ - "230\0" /* 1 refs @ 11949 */ - "7450\0" /* 1 refs @ 11953 */ - "W9000\0" /* 1 refs @ 11958 */ - "7970/8970\0" /* 1 refs @ 11964 */ - "280X\0" /* 1 refs @ 11974 */ - "7900\0" /* 1 refs @ 11979 */ - "7950/8950\0" /* 1 refs @ 11984 */ - "280\0" /* 3 refs @ 11994 */ - "7990/8990\0" /* 1 refs @ 11998 */ - "7870\0" /* 2 refs @ 12008 */ - "W9100\0" /* 1 refs @ 12013 */ - "W8100\0" /* 1 refs @ 12019 */ - "290X/390X\0" /* 1 refs @ 12025 */ - "290/390\0" /* 1 refs @ 12035 */ - "295X2\0" /* 1 refs @ 12043 */ - "WX\0" /* 12 refs @ 12049 */ - "7100\0" /* 2 refs @ 12052 */ - "V7300X\0" /* 2 refs @ 12057 */ - "V7350x2\0" /* 2 refs @ 12064 */ - "5100\0" /* 4 refs @ 12072 */ - "Polaris10\0" /* 3 refs @ 12077 */ - "RX\0" /* 18 refs @ 12087 */ - "470/480/570/570X/580/580X/590\0" /* 1 refs @ 12090 */ - "4170\0" /* 1 refs @ 12120 */ - "4100\0" /* 2 refs @ 12125 */ - "4130/4150\0" /* 1 refs @ 12130 */ - "Polaris11\0" /* 1 refs @ 12140 */ - "V5300X\0" /* 1 refs @ 12150 */ - "460/560D\0" /* 1 refs @ 12157 */ - "450/455/460/555/555X/560/560X\0" /* 1 refs @ 12166 */ - "550\0" /* 5 refs @ 12196 */ - "640SP\0" /* 3 refs @ 12200 */ - "560/560X\0" /* 3 refs @ 12206 */ - "7970M\0" /* 1 refs @ 12215 */ - "8970M\0" /* 1 refs @ 12221 */ - "W7000\0" /* 1 refs @ 12227 */ - "W5000\0" /* 1 refs @ 12233 */ - "370\0" /* 5 refs @ 12239 */ - "270X/370X\0" /* 1 refs @ 12243 */ - "270/370\0" /* 1 refs @ 12253 */ - "GHz\0" /* 1 refs @ 12261 */ - "Edition\0" /* 4 refs @ 12265 */ - "7850\0" /* 1 refs @ 12273 */ - "265\0" /* 1 refs @ 12278 */ - "270\0" /* 1 refs @ 12282 */ - "1024SP\0" /* 1 refs @ 12286 */ - "8890M\0" /* 1 refs @ 12293 */ - "M275X/M375X\0" /* 1 refs @ 12299 */ - "8870M\0" /* 1 refs @ 12311 */ - "M270X/M370X\0" /* 1 refs @ 12317 */ - "E8860\0" /* 1 refs @ 12329 */ - "8850M\0" /* 1 refs @ 12335 */ - "M265X\0" /* 1 refs @ 12341 */ - "7870M\0" /* 1 refs @ 12347 */ - "7700M\0" /* 2 refs @ 12353 */ - "7850M/8850M\0" /* 1 refs @ 12359 */ - "W600\0" /* 1 refs @ 12371 */ - "8830M\0" /* 1 refs @ 12376 */ - "250\0" /* 13 refs @ 12382 */ - "M465X\0" /* 1 refs @ 12386 */ - "W4100\0" /* 1 refs @ 12392 */ - "M4000\0" /* 2 refs @ 12398 */ - "7730M\0" /* 1 refs @ 12404 */ - "7800M\0" /* 1 refs @ 12410 */ - "255\0" /* 1 refs @ 12416 */ - "7730/8730\0" /* 1 refs @ 12420 */ - "7700\0" /* 2 refs @ 12430 */ - "7770/8760\0" /* 1 refs @ 12435 */ - "250X\0" /* 1 refs @ 12445 */ - "7750/8740\0" /* 1 refs @ 12450 */ - "250E\0" /* 1 refs @ 12460 */ - "7500M/7600M\0" /* 1 refs @ 12465 */ - "7550M/7570M/7650M\0" /* 1 refs @ 12477 */ - "7000M\0" /* 1 refs @ 12495 */ - "7670M\0" /* 1 refs @ 12501 */ - "7400\0" /* 1 refs @ 12507 */ - "MI25\0" /* 2 refs @ 12512 */ - "PRO\0" /* 16 refs @ 12517 */ - "SSG\0" /* 1 refs @ 12521 */ - "Frontier\0" /* 1 refs @ 12525 */ - "V340\0" /* 1 refs @ 12534 */ - "56\0" /* 1 refs @ 12539 */ - "8100/8200\0" /* 1 refs @ 12542 */ - "MxGPU\0" /* 1 refs @ 12552 */ - "56/64\0" /* 2 refs @ 12558 */ - "6550M\0" /* 1 refs @ 12564 */ - "V8800\0" /* 1 refs @ 12570 */ - "V7800\0" /* 1 refs @ 12576 */ - "V9800\0" /* 1 refs @ 12582 */ - "FireStream\0" /* 5 refs @ 12588 */ - "9370\0" /* 1 refs @ 12599 */ - "9350\0" /* 2 refs @ 12604 */ - "5870\0" /* 2 refs @ 12609 */ - "5850\0" /* 2 refs @ 12614 */ - "6800\0" /* 5 refs @ 12619 */ - "5970\0" /* 2 refs @ 12624 */ - "5830\0" /* 1 refs @ 12629 */ - "6850M/6870M\0" /* 1 refs @ 12634 */ - "V5800\0" /* 2 refs @ 12646 */ - "5670\0" /* 1 refs @ 12652 */ - "6770\0" /* 1 refs @ 12657 */ - "5750\0" /* 1 refs @ 12662 */ - "6750\0" /* 1 refs @ 12667 */ - "5730\0" /* 1 refs @ 12672 */ - "6570M\0" /* 1 refs @ 12677 */ - "5650/5750\0" /* 1 refs @ 12683 */ - "6530M/6550M\0" /* 1 refs @ 12693 */ - "5570/6550A\0" /* 1 refs @ 12705 */ - "V4800\0" /* 1 refs @ 12716 */ - "V3800\0" /* 1 refs @ 12722 */ - "5670/5690/5730\0" /* 1 refs @ 12728 */ - "5570/5570/5630/6510/6610/7570\0" /* 1 refs @ 12743 */ - "5550/5570/5630/6390/6490/7570\0" /* 1 refs @ 12773 */ - "5430/5450/5470\0" /* 1 refs @ 12803 */ - "5430\0" /* 1 refs @ 12818 */ - "6370M/7370M\0" /* 1 refs @ 12823 */ - "6330M\0" /* 1 refs @ 12835 */ - "(FireGL)\0" /* 1 refs @ 12841 */ - "2460\0" /* 1 refs @ 12850 */ - "2270\0" /* 1 refs @ 12855 */ - "7300\0" /* 2 refs @ 12860 */ - "5000/6000/7350/8350\0" /* 1 refs @ 12865 */ - "7350/8350\0" /* 1 refs @ 12885 */ - "220\0" /* 2 refs @ 12895 */ - "M260/M265\0" /* 1 refs @ 12899 */ - "M340/M360\0" /* 1 refs @ 12909 */ - "M440/M445\0" /* 1 refs @ 12919 */ - "530/535\0" /* 1 refs @ 12929 */ - "620/625\0" /* 1 refs @ 12937 */ - "M255\0" /* 1 refs @ 12945 */ - "M315\0" /* 1 refs @ 12950 */ - "M395/\0" /* 1 refs @ 12955 */ - "M395X\0" /* 1 refs @ 12961 */ - "Mac\0" /* 1 refs @ 12967 */ - "M295X\0" /* 2 refs @ 12971 */ - "M390X\0" /* 1 refs @ 12977 */ - "S7150\0" /* 1 refs @ 12983 */ - "W7100\0" /* 1 refs @ 12989 */ - "S7150V\0" /* 1 refs @ 12995 */ - "380X\0" /* 1 refs @ 13002 */ - "285/380\0" /* 2 refs @ 13007 */ - "M\0" /* 4 refs @ 13015 */ - "GH\0" /* 1 refs @ 13017 */ - "3100\0" /* 3 refs @ 13020 */ - "540X/550X/630\0" /* 1 refs @ 13025 */ - "640\0" /* 5 refs @ 13039 */ - "E9171\0" /* 1 refs @ 13043 */ - "MCM\0" /* 1 refs @ 13049 */ - "2100\0" /* 3 refs @ 13053 */ - "540/540X/550/550X\0" /* 1 refs @ 13058 */ - "540X/550/550X\0" /* 1 refs @ 13076 */ - "580\0" /* 2 refs @ 13090 */ - "2048SP\0" /* 1 refs @ 13094 */ - "X1800\0" /* 8 refs @ 13101 */ - "V7300\0" /* 2 refs @ 13107 */ - "V7350\0" /* 3 refs @ 13113 */ - "X1300/X1550/X1600\0" /* 1 refs @ 13119 */ - "X1300/X1550\0" /* 9 refs @ 13137 */ - "X1400\0" /* 1 refs @ 13149 */ - "X1550\0" /* 6 refs @ 13155 */ - "64-bit\0" /* 4 refs @ 13161 */ - "X1300\0" /* 4 refs @ 13168 */ - "V3300\0" /* 2 refs @ 13174 */ - "V3350\0" /* 2 refs @ 13180 */ - "(RV515)\0" /* 1 refs @ 13186 */ - "X1600/X1650\0" /* 3 refs @ 13194 */ - "X1450\0" /* 2 refs @ 13206 */ - "X2300\0" /* 2 refs @ 13212 */ - "X1350\0" /* 3 refs @ 13218 */ - "FireMV\0" /* 1 refs @ 13224 */ - "2250\0" /* 1 refs @ 13231 */ - "X1600\0" /* 5 refs @ 13236 */ - "XT/X1650\0" /* 1 refs @ 13242 */ - "X1650\0" /* 9 refs @ 13251 */ - "V5200\0" /* 1 refs @ 13257 */ - "XT/X1600\0" /* 1 refs @ 13263 */ - "V3400\0" /* 2 refs @ 13272 */ - "V5250\0" /* 1 refs @ 13278 */ - "X1700\0" /* 2 refs @ 13284 */ - "X1700/X2500\0" /* 1 refs @ 13290 */ - "X1950\0" /* 7 refs @ 13302 */ - "XTX\0" /* 1 refs @ 13308 */ - "X1900\0" /* 4 refs @ 13312 */ - "GT\0" /* 47 refs @ 13318 */ - "Stream\0" /* 1 refs @ 13321 */ - "FURY\0" /* 2 refs @ 13328 */ - "NANO\0" /* 1 refs @ 13333 */ - "W5700X\0" /* 1 refs @ 13338 */ - "W5700\0" /* 1 refs @ 13345 */ - "5600\0" /* 27 refs @ 13351 */ - "OEM/5600\0" /* 1 refs @ 13356 */ - "5700/5700\0" /* 1 refs @ 13365 */ - "5500/5500M\0" /* 1 refs @ 13375 */ - "5500M\0" /* 1 refs @ 13386 */ - "W5500\0" /* 1 refs @ 13392 */ - "W5500M\0" /* 1 refs @ 13398 */ - "W5300M\0" /* 1 refs @ 13405 */ - "RS350\0" /* 1 refs @ 13412 */ - "PRO/XT\0" /* 2 refs @ 13418 */ - "RS690\0" /* 7 refs @ 13425 */ - "RS740\0" /* 1 refs @ 13431 */ - "X1200\0" /* 1 refs @ 13437 */ - "1200/1250/1270\0" /* 2 refs @ 13443 */ - "1250\0" /* 3 refs @ 13458 */ - "2900\0" /* 5 refs @ 13463 */ - "V8650\0" /* 1 refs @ 13468 */ - "V8600\0" /* 1 refs @ 13474 */ - "V7600\0" /* 1 refs @ 13480 */ - "4870\0" /* 3 refs @ 13486 */ - "4850\0" /* 5 refs @ 13491 */ - "V8750\0" /* 1 refs @ 13496 */ - "V7760\0" /* 1 refs @ 13502 */ - "4830\0" /* 2 refs @ 13508 */ - "4710\0" /* 1 refs @ 13513 */ - "9270\0" /* 1 refs @ 13518 */ - "9250\0" /* 1 refs @ 13523 */ - "V8700\0" /* 1 refs @ 13528 */ - "4890\0" /* 1 refs @ 13534 */ - "4860\0" /* 2 refs @ 13539 */ - "M7750\0" /* 1 refs @ 13544 */ - "4650/5165\0" /* 1 refs @ 13550 */ - "4670\0" /* 2 refs @ 13560 */ - "V5725\0" /* 1 refs @ 13565 */ - "E4690\0" /* 1 refs @ 13571 */ - "4600\0" /* 3 refs @ 13577 */ - "4650\0" /* 1 refs @ 13582 */ - "V7750\0" /* 1 refs @ 13587 */ - "V5700\0" /* 2 refs @ 13593 */ - "V3750\0" /* 1 refs @ 13599 */ - "M7740\0" /* 1 refs @ 13605 */ - "4770\0" /* 1 refs @ 13611 */ - "4750\0" /* 1 refs @ 13616 */ - "2400\0" /* 7 refs @ 13621 */ - "2350\0" /* 1 refs @ 13626 */ - "3850\0" /* 5 refs @ 13631 */ - "3870\0" /* 4 refs @ 13636 */ - "3690/3850\0" /* 1 refs @ 13641 */ - "3830\0" /* 1 refs @ 13651 */ - "V7700\0" /* 1 refs @ 13656 */ - "9170\0" /* 1 refs @ 13662 */ - "4550\0" /* 1 refs @ 13667 */ - "4350/4550\0" /* 2 refs @ 13672 */ - "4330/4350/4550\0" /* 1 refs @ 13682 */ - "4530/4570/545v\0" /* 1 refs @ 13697 */ - "RG220\0" /* 1 refs @ 13712 */ - "4330\0" /* 1 refs @ 13718 */ - "2600\0" /* 10 refs @ 13723 */ - "XT/2700\0" /* 1 refs @ 13728 */ - "GDDR3\0" /* 1 refs @ 13736 */ - "V5600\0" /* 1 refs @ 13742 */ - "V3600\0" /* 1 refs @ 13748 */ - "3650\0" /* 5 refs @ 13754 */ - "3670\0" /* 1 refs @ 13759 */ - "3470\0" /* 1 refs @ 13764 */ - "3410/3430\0" /* 1 refs @ 13769 */ - "3400\0" /* 40 refs @ 13779 */ - "(M82)\0" /* 1 refs @ 13784 */ - "4250\0" /* 2 refs @ 13790 */ - "(RV610)\0" /* 1 refs @ 13795 */ - "3450\0" /* 3 refs @ 13803 */ - "V3700\0" /* 1 refs @ 13808 */ - "2450\0" /* 1 refs @ 13814 */ - "2260\0" /* 1 refs @ 13819 */ - "3300\0" /* 1 refs @ 13824 */ - "3000\0" /* 7 refs @ 13829 */ - "6550D\0" /* 1 refs @ 13834 */ - "6620G\0" /* 1 refs @ 13840 */ - "6370D\0" /* 1 refs @ 13846 */ - "6380G\0" /* 1 refs @ 13852 */ - "6410D\0" /* 2 refs @ 13858 */ - "6520G\0" /* 1 refs @ 13864 */ - "6480G\0" /* 2 refs @ 13870 */ - "6530D\0" /* 1 refs @ 13876 */ - "4200\0" /* 6 refs @ 13882 */ - "4290\0" /* 1 refs @ 13887 */ - "6310\0" /* 2 refs @ 13892 */ - "6250\0" /* 3 refs @ 13897 */ - "6320\0" /* 1 refs @ 13902 */ - "6290\0" /* 1 refs @ 13907 */ - "7340\0" /* 1 refs @ 13912 */ - "7310\0" /* 1 refs @ 13917 */ - "7290\0" /* 1 refs @ 13922 */ - "8400\0" /* 2 refs @ 13927 */ - "R3\0" /* 3 refs @ 13932 */ - "8400E\0" /* 1 refs @ 13935 */ - "8330\0" /* 1 refs @ 13941 */ - "8330E\0" /* 1 refs @ 13946 */ - "8210\0" /* 1 refs @ 13952 */ - "8310E\0" /* 1 refs @ 13957 */ - "8280\0" /* 1 refs @ 13963 */ - "8280E\0" /* 1 refs @ 13968 */ - "8240\0" /* 1 refs @ 13974 */ - "8180\0" /* 2 refs @ 13979 */ - "8250/8280G\0" /* 1 refs @ 13984 */ - "Kabini\0" /* 1 refs @ 13995 */ - "HDMI/DP\0" /* 2 refs @ 14002 */ - "R2\0" /* 6 refs @ 14010 */ - "R4/R5\0" /* 1 refs @ 14013 */ - "R2/R3/R4\0" /* 1 refs @ 14019 */ - "R6\0" /* 1 refs @ 14028 */ - "R1E/R2E\0" /* 1 refs @ 14031 */ - "APU\0" /* 2 refs @ 14039 */ - "XX-2200M\0" /* 1 refs @ 14043 */ - "with\0" /* 6 refs @ 14052 */ - "R5/R6/R7\0" /* 1 refs @ 14057 */ - "R2/R3/R4/R5\0" /* 1 refs @ 14066 */ - "7660G\0" /* 2 refs @ 14078 */ - "7660D\0" /* 1 refs @ 14084 */ - "Trinity\0" /* 1 refs @ 14090 */ - "7640G\0" /* 2 refs @ 14098 */ - "7560D\0" /* 1 refs @ 14104 */ - "A300\0" /* 1 refs @ 14110 */ - "A320\0" /* 1 refs @ 14115 */ - "7620G\0" /* 2 refs @ 14120 */ - "7600G\0" /* 2 refs @ 14126 */ - "7500G\0" /* 3 refs @ 14132 */ - "8650G\0" /* 1 refs @ 14138 */ - "8670D\0" /* 1 refs @ 14144 */ - "8550G\0" /* 1 refs @ 14150 */ - "8570D\0" /* 1 refs @ 14156 */ - "8610G\0" /* 1 refs @ 14162 */ - "Playstation\0" /* 1 refs @ 14168 */ - "Liverpool\0" /* 1 refs @ 14180 */ - "7520G\0" /* 2 refs @ 14190 */ - "7540D\0" /* 1 refs @ 14196 */ - "7420G\0" /* 2 refs @ 14202 */ - "7480D\0" /* 1 refs @ 14208 */ - "7400G\0" /* 2 refs @ 14214 */ - "8450G\0" /* 1 refs @ 14220 */ - "8470D\0" /* 1 refs @ 14226 */ - "8350G\0" /* 1 refs @ 14232 */ - "8370D\0" /* 1 refs @ 14238 */ - "8510G\0" /* 1 refs @ 14244 */ - "8410G\0" /* 1 refs @ 14250 */ - "8310G\0" /* 1 refs @ 14256 */ - "8650D\0" /* 1 refs @ 14262 */ - "8550D\0" /* 1 refs @ 14268 */ - "3650/3730/3750\0" /* 2 refs @ 14274 */ - "2350PRO/2400PRO/2400XT/3410\0" /* 1 refs @ 14289 */ - "3690/3800\0" /* 1 refs @ 14317 */ - "34xx\0" /* 1 refs @ 14327 */ - "4350\0" /* 1 refs @ 14332 */ - "5830/5850/5870/6850/6870\0" /* 1 refs @ 14337 */ - "5700\0" /* 2 refs @ 14362 */ - "5000\0" /* 20 refs @ 14367 */ - "5400/6300/7300\0" /* 1 refs @ 14372 */ - "6930/6950/6970/6990\0" /* 1 refs @ 14387 */ - "6790/6850/6870/7720\0" /* 1 refs @ 14407 */ - "6500/6600/6700M\0" /* 1 refs @ 14427 */ - "6450/7450/8450/8490,\0" /* 1 refs @ 14443 */ - "230/235/235X\0" /* 1 refs @ 14464 */ - "7870XT/7950/7970\0" /* 1 refs @ 14477 */ - "Tiran\0" /* 1 refs @ 14494 */ - "360,\0" /* 1 refs @ 14500 */ - "290/290X,\0" /* 1 refs @ 14505 */ - "390/390X\0" /* 1 refs @ 14515 */ - "460/550/640SP,\0" /* 1 refs @ 14524 */ - "Nano,\0" /* 1 refs @ 14539 */ - "470/480/570/580/590\0" /* 1 refs @ 14545 */ - "550/640SP/560/560X\0" /* 1 refs @ 14565 */ - "22\0" /* 6 refs @ 14584 */ - "Lexa\0" /* 1 refs @ 14587 */ - "12\0" /* 12 refs @ 14592 */ - "Navi\0" /* 1 refs @ 14595 */ - "Theater\0" /* 16 refs @ 14600 */ - "506\0" /* 7 refs @ 14608 */ - "World-Wide\0" /* 4 refs @ 14612 */ - "TV\0" /* 3 refs @ 14623 */ - "Wonder\0" /* 1 refs @ 14626 */ - "600\0" /* 111 refs @ 14633 */ - "External\0" /* 7 refs @ 14637 */ - "506A\0" /* 8 refs @ 14646 */ - "Demodulator\0" /* 2 refs @ 14651 */ - "T507\0" /* 1 refs @ 14663 */ - "(DVB-T)\0" /* 1 refs @ 14668 */ - "tuner/capture\0" /* 1 refs @ 14676 */ - "device\0" /* 2 refs @ 14690 */ - "VxP524\0" /* 1 refs @ 14697 */ - "AU8820\0" /* 1 refs @ 14704 */ - "AU8830\0" /* 1 refs @ 14711 */ - "S5933\0" /* 1 refs @ 14718 */ - "Matchmaker\0" /* 1 refs @ 14724 */ - "S5920\0" /* 1 refs @ 14735 */ - "Target\0" /* 20 refs @ 14741 */ - "Myrinet\0" /* 2 refs @ 14748 */ - "LANai\0" /* 1 refs @ 14756 */ - "FZJ/ZEL\0" /* 3 refs @ 14762 */ - "CAMAC\0" /* 2 refs @ 14770 */ - "VICBUS\0" /* 1 refs @ 14776 */ - "Synchronisation\0" /* 1 refs @ 14783 */ - "Module\0" /* 8 refs @ 14799 */ - "ADDI-DATA\0" /* 1 refs @ 14806 */ - "APCI-7800\0" /* 1 refs @ 14816 */ - "8-port\0" /* 5 refs @ 14826 */ - "Serial\0" /* 117 refs @ 14833 */ - "AST1150\0" /* 1 refs @ 14840 */ - "PCIe-to-PCI\0" /* 3 refs @ 14848 */ - "AST1180\0" /* 1 refs @ 14860 */ - "Family\0" /* 27 refs @ 14868 */ - "AR5201\0" /* 3 refs @ 14875 */ - "AR5211\0" /* 5 refs @ 14882 */ - "AR5212\0" /* 9 refs @ 14889 */ - "AR2413\0" /* 1 refs @ 14896 */ - "AR5413\0" /* 1 refs @ 14903 */ - "AR5424\0" /* 1 refs @ 14910 */ - "AR5416\0" /* 1 refs @ 14917 */ - "AR5418\0" /* 1 refs @ 14924 */ - "AR9160\0" /* 1 refs @ 14931 */ - "AR9280\0" /* 1 refs @ 14938 */ - "AR9281\0" /* 1 refs @ 14945 */ - "AR9285\0" /* 1 refs @ 14952 */ - "AR2427\0" /* 1 refs @ 14959 */ - "AR9227\0" /* 1 refs @ 14966 */ - "AR9287\0" /* 1 refs @ 14973 */ - "AR9300\0" /* 1 refs @ 14980 */ - "AR9485\0" /* 1 refs @ 14987 */ - "AR9462\0" /* 1 refs @ 14994 */ - "AR9565\0" /* 1 refs @ 15001 */ - "QCA986x/988x\0" /* 1 refs @ 15008 */ - "Reference\0" /* 4 refs @ 15021 */ - "Card\0" /* 28 refs @ 15031 */ - "(Early\0" /* 1 refs @ 15036 */ - "AP11)\0" /* 1 refs @ 15043 */ - "(no\0" /* 3 refs @ 15049 */ - "eeprom)\0" /* 3 refs @ 15053 */ - "(emulation\0" /* 1 refs @ 15061 */ - "board)\0" /* 3 refs @ 15072 */ - "(11b\0" /* 1 refs @ 15079 */ - "emulation\0" /* 2 refs @ 15084 */ - "(original\0" /* 1 refs @ 15094 */ - "IDE-2015PL\0" /* 1 refs @ 15104 */ - "AVL2301\0" /* 1 refs @ 15115 */ - "AVG2302\0" /* 1 refs @ 15123 */ - "ALG2301\0" /* 1 refs @ 15131 */ - "ALG2302\0" /* 1 refs @ 15139 */ - "ALS4000\0" /* 1 refs @ 15147 */ - "Low\0" /* 5 refs @ 15155 */ - "Profile\0" /* 3 refs @ 15159 */ - "Cinemaster\0" /* 1 refs @ 15167 */ - "DVD\0" /* 1 refs @ 15178 */ - "Basic\0" /* 1 refs @ 15182 */ - "Rate\0" /* 6 refs @ 15188 */ - "B1\0" /* 4 refs @ 15193 */ - "Fritz!\0" /* 1 refs @ 15196 */ - "Fritz!PCI\0" /* 1 refs @ 15203 */ - "T1\0" /* 1 refs @ 15213 */ - "RT2890\0" /* 2 refs @ 15216 */ - "XLR\0" /* 1 refs @ 15223 */ - "XLS\0" /* 1 refs @ 15227 */ - "PCIe-PCIe\0" /* 1 refs @ 15231 */ - "single-channel\0" /* 2 refs @ 15241 */ - "RS-485\0" /* 8 refs @ 15256 */ - "dual-channel\0" /* 3 refs @ 15263 */ - "quad-channel\0" /* 4 refs @ 15276 */ - "octal-channel\0" /* 3 refs @ 15289 */ - "Isolated\0" /* 4 refs @ 15303 */ - "PBlaze4\0" /* 1 refs @ 15312 */ - "F5D6001\0" /* 1 refs @ 15320 */ - "F5D6020v3\0" /* 1 refs @ 15328 */ - "F5D7010\0" /* 1 refs @ 15338 */ - "EC8/32\0" /* 1 refs @ 15346 */ - "EC8/64\0" /* 1 refs @ 15353 */ - "EasyIO\0" /* 1 refs @ 15360 */ - "PCI-VME\0" /* 3 refs @ 15367 */ - "Mod.\0" /* 3 refs @ 15375 */ - "617\0" /* 2 refs @ 15380 */ - "618\0" /* 1 refs @ 15384 */ - "2706\0" /* 1 refs @ 15388 */ - "5501\0" /* 1 refs @ 15393 */ - "5601\0" /* 1 refs @ 15398 */ - "UC-268\0" /* 1 refs @ 15403 */ - "UC-257\0" /* 3 refs @ 15410 */ - "UC-279\0" /* 1 refs @ 15417 */ - "UC-313\0" /* 3 refs @ 15424 */ - "UC-310\0" /* 1 refs @ 15431 */ - "UC-302\0" /* 3 refs @ 15438 */ - "UC-431\0" /* 1 refs @ 15445 */ - "UC-420\0" /* 1 refs @ 15452 */ - "UC-475\0" /* 2 refs @ 15459 */ - "UC-607\0" /* 3 refs @ 15466 */ - "UC-324\0" /* 1 refs @ 15473 */ - "UC-357\0" /* 3 refs @ 15480 */ - "UC-246\0" /* 2 refs @ 15487 */ - "UP-189\0" /* 3 refs @ 15494 */ - "UC-346\0" /* 2 refs @ 15501 */ - "UP-200\0" /* 3 refs @ 15508 */ - "UC-101\0" /* 1 refs @ 15515 */ - "UC-203\0" /* 2 refs @ 15522 */ - "UP-869\0" /* 3 refs @ 15529 */ - "UP-880\0" /* 3 refs @ 15536 */ - "UC-368\0" /* 1 refs @ 15543 */ - "UC-253\0" /* 1 refs @ 15550 */ - "UC-260\0" /* 1 refs @ 15557 */ - "UC-836\0" /* 1 refs @ 15564 */ - "Intashield\0" /* 7 refs @ 15571 */ - "IS-100\0" /* 1 refs @ 15582 */ - "IS-200\0" /* 1 refs @ 15589 */ - "IS-300\0" /* 1 refs @ 15596 */ - "IS-400\0" /* 1 refs @ 15603 */ - "PX-279\0" /* 1 refs @ 15610 */ - "UC-414\0" /* 1 refs @ 15617 */ - "PX-420\0" /* 2 refs @ 15624 */ - "PX-431\0" /* 2 refs @ 15631 */ - "PX-820\0" /* 2 refs @ 15638 */ - "PX-831\0" /* 2 refs @ 15645 */ - "PX-246\0" /* 2 refs @ 15652 */ - "PX-101\0" /* 2 refs @ 15659 */ - "PX-257\0" /* 2 refs @ 15666 */ - "PX-846\0" /* 2 refs @ 15673 */ - "PX-857\0" /* 2 refs @ 15680 */ - "PX-260\0" /* 1 refs @ 15687 */ - "PX-320\0" /* 1 refs @ 15694 */ - "PX-313\0" /* 1 refs @ 15701 */ - "PX-310\0" /* 1 refs @ 15708 */ - "PX-346\0" /* 1 refs @ 15715 */ - "PX-368\0" /* 1 refs @ 15722 */ - "PX-475\0" /* 1 refs @ 15729 */ - "PX-803\0" /* 1 refs @ 15736 */ - "IX-100\0" /* 1 refs @ 15743 */ - "IX-200\0" /* 1 refs @ 15750 */ - "IX-400\0" /* 1 refs @ 15757 */ - "BCM5752\0" /* 1 refs @ 15764 */ - "NetXtreme\0" /* 32 refs @ 15772 */ - "BCM5752M\0" /* 1 refs @ 15782 */ - "BCM5709\0" /* 2 refs @ 15791 */ - "BCM5716\0" /* 2 refs @ 15799 */ - "BCM57811\0" /* 3 refs @ 15807 */ - "10Gb\0" /* 22 refs @ 15816 */ - "MF\0" /* 6 refs @ 15821 */ - "Ehternet\0" /* 1 refs @ 15824 */ - "VF\0" /* 16 refs @ 15833 */ - "BCM57787\0" /* 1 refs @ 15836 */ - "BCM57764\0" /* 1 refs @ 15845 */ - "BCM5725\0" /* 1 refs @ 15854 */ - "BCM5702\0" /* 2 refs @ 15862 */ - "BCM5703\0" /* 2 refs @ 15870 */ - "BCM5704C\0" /* 1 refs @ 15878 */ - "BCM5704S\0" /* 2 refs @ 15887 */ - "BCM5706\0" /* 2 refs @ 15896 */ - "BCM5708\0" /* 2 refs @ 15904 */ - "BCM5702FE\0" /* 1 refs @ 15912 */ - "BCM57710\0" /* 1 refs @ 15922 */ - "BCM57711\0" /* 1 refs @ 15931 */ - "BCM57711E\0" /* 1 refs @ 15940 */ - "BCM5705\0" /* 1 refs @ 15950 */ - "BCM5705K\0" /* 1 refs @ 15958 */ - "BCM5717\0" /* 2 refs @ 15967 */ - "BCM5718\0" /* 1 refs @ 15975 */ - "BCM5719\0" /* 1 refs @ 15983 */ - "BCM5721\0" /* 1 refs @ 15991 */ - "BCM5722\0" /* 1 refs @ 15999 */ - "BCM5723\0" /* 1 refs @ 16007 */ - "BCM5724\0" /* 1 refs @ 16015 */ - "BCM5705M\0" /* 2 refs @ 16023 */ - "BCM5720\0" /* 1 refs @ 16032 */ - "BCM57712\0" /* 3 refs @ 16040 */ - "BCM5714\0" /* 1 refs @ 16049 */ - "BCM5714S\0" /* 1 refs @ 16057 */ - "BCM5780\0" /* 1 refs @ 16066 */ - "BCM5780S\0" /* 1 refs @ 16074 */ - "BCM5705F\0" /* 1 refs @ 16083 */ - "BCM5754M\0" /* 1 refs @ 16092 */ - "BCM5755M\0" /* 1 refs @ 16101 */ - "BCM5756\0" /* 1 refs @ 16110 */ - "BCM5750\0" /* 1 refs @ 16118 */ - "BCM5751\0" /* 1 refs @ 16126 */ - "BCM5715\0" /* 1 refs @ 16134 */ - "BCM5715S\0" /* 1 refs @ 16142 */ - "BCM5754\0" /* 1 refs @ 16151 */ - "BCM5755\0" /* 1 refs @ 16159 */ - "BCM5750M\0" /* 1 refs @ 16167 */ - "BCM5751M\0" /* 1 refs @ 16176 */ - "BCM5751F\0" /* 1 refs @ 16185 */ - "BCM5787F\0" /* 1 refs @ 16194 */ - "BCM5761E\0" /* 1 refs @ 16203 */ - "BCM5761\0" /* 1 refs @ 16212 */ - "BCM57762\0" /* 1 refs @ 16220 */ - "BCM57767\0" /* 1 refs @ 16229 */ - "BCM5764\0" /* 1 refs @ 16238 */ - "BCM57766\0" /* 1 refs @ 16246 */ - "BCM5762\0" /* 1 refs @ 16255 */ - "BCM5761S\0" /* 1 refs @ 16263 */ - "BCM5761SE\0" /* 1 refs @ 16272 */ - "BCM57800\0" /* 3 refs @ 16282 */ - "BCM57840\0" /* 6 refs @ 16291 */ - "BCM57810\0" /* 3 refs @ 16300 */ - "BCM57760\0" /* 1 refs @ 16309 */ - "BCM57788\0" /* 1 refs @ 16318 */ - "NetLink\0" /* 7 refs @ 16327 */ - "BCM57780\0" /* 1 refs @ 16335 */ - "BCM5787M\0" /* 1 refs @ 16344 */ - "BCM57790\0" /* 1 refs @ 16353 */ - "BCM5782\0" /* 1 refs @ 16362 */ - "BCM5784M\0" /* 1 refs @ 16370 */ - "BCM5785G\0" /* 1 refs @ 16379 */ - "BCM5786\0" /* 1 refs @ 16388 */ - "BCM5787\0" /* 1 refs @ 16396 */ - "BCM5788\0" /* 1 refs @ 16404 */ - "BCM5789\0" /* 1 refs @ 16412 */ - "BCM5785F\0" /* 1 refs @ 16420 */ - "4x10Gb\0" /* 1 refs @ 16429 */ - "2x20Gb\0" /* 1 refs @ 16436 */ - "BCM5702X\0" /* 1 refs @ 16443 */ - "BCM5703X\0" /* 1 refs @ 16452 */ - "20Gb\0" /* 1 refs @ 16461 */ - "BCM57761\0" /* 1 refs @ 16466 */ - "BCM57781\0" /* 1 refs @ 16475 */ - "BCM57791\0" /* 1 refs @ 16484 */ - "BCM57786\0" /* 1 refs @ 16493 */ - "BCM57765\0" /* 1 refs @ 16502 */ - "BCM57785\0" /* 1 refs @ 16511 */ - "BCM57795\0" /* 1 refs @ 16520 */ - "BCM57782\0" /* 1 refs @ 16529 */ - "BCM577x5\0" /* 3 refs @ 16538 */ - "SDMMC\0" /* 1 refs @ 16547 */ - "Memstick\0" /* 1 refs @ 16553 */ - "xD\0" /* 4 refs @ 16562 */ - "BCM57301\0" /* 1 refs @ 16565 */ - "NetXtreme-C\0" /* 5 refs @ 16574 */ - "BCM57302\0" /* 1 refs @ 16586 */ - "25Gb\0" /* 4 refs @ 16595 */ - "BCM57304\0" /* 1 refs @ 16600 */ - "50Gb\0" /* 1 refs @ 16609 */ - "BCM57311\0" /* 1 refs @ 16614 */ - "BCM57312\0" /* 1 refs @ 16623 */ - "BCM57402\0" /* 1 refs @ 16632 */ - "NetXtreme-E\0" /* 11 refs @ 16641 */ - "BCM57404\0" /* 1 refs @ 16653 */ - "BCM57406\0" /* 1 refs @ 16662 */ - "10GBase-T\0" /* 1 refs @ 16671 */ - "BCM57407\0" /* 2 refs @ 16681 */ - "BCM57412\0" /* 1 refs @ 16690 */ - "BCM57414\0" /* 1 refs @ 16699 */ - "BCM57416\0" /* 2 refs @ 16708 */ - "BCM57417\0" /* 2 refs @ 16717 */ - "BCM5781\0" /* 1 refs @ 16726 */ - "BCM57314\0" /* 1 refs @ 16734 */ - "10Gb/25Gb\0" /* 1 refs @ 16743 */ - "SFP\0" /* 7 refs @ 16753 */ - "BCM5727\0" /* 1 refs @ 16757 */ - "BCM5753\0" /* 1 refs @ 16765 */ - "BCM5753M\0" /* 1 refs @ 16773 */ - "BCM5753F\0" /* 1 refs @ 16782 */ - "BCM5903M\0" /* 1 refs @ 16791 */ - "BCM4401-B1\0" /* 1 refs @ 16800 */ - "BCM5901\0" /* 1 refs @ 16811 */ - "BCM5901A\0" /* 1 refs @ 16819 */ - "BCM5906\0" /* 1 refs @ 16828 */ - "BCM5906M\0" /* 1 refs @ 16836 */ - "BCM2711\0" /* 1 refs @ 16845 */ - "BCM4303\0" /* 1 refs @ 16853 */ - "BCM4307\0" /* 1 refs @ 16861 */ - "BCM4311\0" /* 1 refs @ 16869 */ - "2.4GHz\0" /* 4 refs @ 16877 */ - "BCM4312\0" /* 1 refs @ 16884 */ - "Dualband\0" /* 3 refs @ 16892 */ - "BCM4313\0" /* 1 refs @ 16901 */ - "5GHz\0" /* 1 refs @ 16909 */ - "BCM4315\0" /* 1 refs @ 16914 */ - "BCM4318\0" /* 1 refs @ 16922 */ - "AirForce\0" /* 1 refs @ 16930 */ - "54g\0" /* 1 refs @ 16939 */ - "BCM4319\0" /* 1 refs @ 16943 */ - "BCM4306\0" /* 2 refs @ 16951 */ - "BCM4322\0" /* 1 refs @ 16959 */ - "BCM4309\0" /* 1 refs @ 16967 */ - "BCM43XG\0" /* 1 refs @ 16975 */ - "BCM4328\0" /* 1 refs @ 16983 */ - "802.11a/b/g/n\0" /* 2 refs @ 16991 */ - "BCM4329\0" /* 1 refs @ 17005 */ - "802.11b/g/n\0" /* 5 refs @ 17013 */ - "BCM432A\0" /* 1 refs @ 17025 */ - "802.11\0" /* 7 refs @ 17033 */ - "BCM432B\0" /* 1 refs @ 17040 */ - "BCM432C\0" /* 1 refs @ 17048 */ - "BCM432D\0" /* 1 refs @ 17056 */ - "BCM43224\0" /* 1 refs @ 17064 */ - "BCM43225\0" /* 1 refs @ 17073 */ - "BCM43227\0" /* 1 refs @ 17082 */ - "BCM43228\0" /* 1 refs @ 17091 */ - "BCM4350\0" /* 1 refs @ 17100 */ - "802.11ac\0" /* 3 refs @ 17108 */ - "BCM43602\0" /* 1 refs @ 17117 */ - "SoC\0" /* 27 refs @ 17126 */ - "BCM4401\0" /* 1 refs @ 17130 */ - "BCM4401-B0\0" /* 1 refs @ 17138 */ - "BCM4371\0" /* 1 refs @ 17149 */ - "BCM4378\0" /* 1 refs @ 17157 */ - "BCM4387\0" /* 1 refs @ 17165 */ - "BCM4727\0" /* 1 refs @ 17173 */ - "5801\0" /* 1 refs @ 17181 */ - "5802\0" /* 1 refs @ 17186 */ - "5805\0" /* 1 refs @ 17191 */ - "5820\0" /* 1 refs @ 17196 */ - "5821\0" /* 1 refs @ 17201 */ - "5822\0" /* 1 refs @ 17206 */ - "5823\0" /* 1 refs @ 17211 */ - "5825\0" /* 1 refs @ 17216 */ - "5860\0" /* 1 refs @ 17221 */ - "5861\0" /* 1 refs @ 17226 */ - "5862\0" /* 1 refs @ 17231 */ - "Bt848\0" /* 1 refs @ 17236 */ - "Capture\0" /* 11 refs @ 17242 */ - "Bt849\0" /* 1 refs @ 17250 */ - "Bt878\0" /* 2 refs @ 17256 */ - "Bt879\0" /* 2 refs @ 17262 */ - "Bt880\0" /* 2 refs @ 17268 */ - "(Audio\0" /* 3 refs @ 17274 */ - "Section)\0" /* 3 refs @ 17281 */ - "Bt8474\0" /* 1 refs @ 17290 */ - "Multichannel\0" /* 2 refs @ 17297 */ - "HDLC\0" /* 1 refs @ 17310 */ - "MultiMaster\0" /* 2 refs @ 17315 */ - "NC\0" /* 1 refs @ 17327 */ - "FlashPoint\0" /* 1 refs @ 17330 */ - "GPPCI\0" /* 1 refs @ 17341 */ - "Nitrox\0" /* 1 refs @ 17347 */ - "Master\0" /* 1 refs @ 17354 */ - "RML\0" /* 1 refs @ 17361 */ - "RSL\0" /* 1 refs @ 17365 */ - "devices\0" /* 1 refs @ 17369 */ - "SMMU\0" /* 1 refs @ 17377 */ - "Generic\0" /* 8 refs @ 17382 */ - "Interrupt\0" /* 6 refs @ 17390 */ - "GPIO\0" /* 8 refs @ 17400 */ - "MPI\0" /* 1 refs @ 17405 */ - "SPI\0" /* 51 refs @ 17409 */ - "MIO-PTP\0" /* 1 refs @ 17413 */ - "MIX\0" /* 1 refs @ 17421 */ - "Reset\0" /* 3 refs @ 17425 */ - "eMMC/SD\0" /* 1 refs @ 17431 */ - "MIO-BOOT\0" /* 1 refs @ 17439 */ - "TWSI\0" /* 1 refs @ 17448 */ - "I2C\0" /* 136 refs @ 17453 */ - "CCPI\0" /* 1 refs @ 17457 */ - "(Multi-node\0" /* 1 refs @ 17462 */ - "connect)\0" /* 1 refs @ 17474 */ - "Voltage\0" /* 1 refs @ 17483 */ - "Regulator\0" /* 1 refs @ 17491 */ - "Switch\0" /* 11 refs @ 17501 */ - "Key\0" /* 1 refs @ 17508 */ - "GTI\0" /* 1 refs @ 17512 */ - "(Global\0" /* 1 refs @ 17516 */ - "Timers)\0" /* 1 refs @ 17524 */ - "Random\0" /* 2 refs @ 17532 */ - "Generator\0" /* 2 refs @ 17539 */ - "DFA\0" /* 1 refs @ 17549 */ - "Zip\0" /* 1 refs @ 17553 */ - "Traffic\0" /* 3 refs @ 17557 */ - "PEM\0" /* 1 refs @ 17565 */ - "(PCI\0" /* 1 refs @ 17569 */ - "Interface)\0" /* 6 refs @ 17574 */ - "(Level-2\0" /* 1 refs @ 17585 */ - "Controller)\0" /* 5 refs @ 17594 */ - "OCLA\0" /* 1 refs @ 17606 */ - "(On-Chip\0" /* 1 refs @ 17611 */ - "Analyzer)\0" /* 1 refs @ 17620 */ - "OSM\0" /* 1 refs @ 17630 */ - "GSER\0" /* 1 refs @ 17634 */ - "(General\0" /* 1 refs @ 17639 */ - "Serializer/Deserializer)\0" /* 1 refs @ 17648 */ - "Common\0" /* 1 refs @ 17673 */ - "IOBN\0" /* 1 refs @ 17680 */ - "NCSI\0" /* 1 refs @ 17685 */ - "(Network\0" /* 1 refs @ 17690 */ - "Sideband\0" /* 1 refs @ 17699 */ - "SGPIO\0" /* 1 refs @ 17708 */ - "(Serial\0" /* 2 refs @ 17714 */ - "controller\0" /* 17 refs @ 17722 */ - "disk\0" /* 1 refs @ 17733 */ - "lights)\0" /* 1 refs @ 17738 */ - "SMI\0" /* 1 refs @ 17746 */ - "MDIO\0" /* 1 refs @ 17750 */ - "DAP\0" /* 1 refs @ 17755 */ - "(Debug\0" /* 1 refs @ 17759 */ - "Access\0" /* 3 refs @ 17766 */ - "Port)\0" /* 1 refs @ 17773 */ - "PCIERC\0" /* 1 refs @ 17779 */ - "Complex)\0" /* 2 refs @ 17786 */ - "cache\0" /* 1 refs @ 17795 */ - "tag\0" /* 1 refs @ 17801 */ - "data\0" /* 1 refs @ 17805 */ - "L2C-CBC\0" /* 1 refs @ 17810 */ - "L2C-MCI\0" /* 1 refs @ 17818 */ - "MIO-FUS\0" /* 1 refs @ 17826 */ - "(Fuse\0" /* 2 refs @ 17834 */ - "FUSF\0" /* 1 refs @ 17840 */ - "virtual\0" /* 4 refs @ 17845 */ - "function\0" /* 6 refs @ 17853 */ - "Parallel\0" /* 14 refs @ 17862 */ - "Bus\0" /* 8 refs @ 17871 */ - "RAD\0" /* 1 refs @ 17875 */ - "(RAID\0" /* 6 refs @ 17879 */ - "acceleration\0" /* 1 refs @ 17885 */ - "engine)\0" /* 1 refs @ 17898 */ - "ZIP\0" /* 1 refs @ 17906 */ - "CPT\0" /* 1 refs @ 17910 */ - "PE9000\0" /* 1 refs @ 17914 */ - "T302e\0" /* 1 refs @ 17921 */ - "T310e\0" /* 1 refs @ 17927 */ - "T320x\0" /* 1 refs @ 17933 */ - "T302x\0" /* 1 refs @ 17939 */ - "T320e\0" /* 1 refs @ 17945 */ - "T310x\0" /* 1 refs @ 17951 */ - "T3B10\0" /* 1 refs @ 17957 */ - "T3B20\0" /* 1 refs @ 17963 */ - "T3B02\0" /* 1 refs @ 17969 */ - "T3B04\0" /* 1 refs @ 17975 */ - "T3C10\0" /* 1 refs @ 17981 */ - "S320E-CR\0" /* 1 refs @ 17987 */ - "N320E-G2\0" /* 1 refs @ 17996 */ - "T440-dbg\0" /* 1 refs @ 18005 */ - "T420-CR\0" /* 1 refs @ 18014 */ - "T422-CR\0" /* 1 refs @ 18022 */ - "T440-CR\0" /* 1 refs @ 18030 */ - "T420-BCH\0" /* 1 refs @ 18038 */ - "T440-BCH\0" /* 1 refs @ 18047 */ - "T440-CH\0" /* 1 refs @ 18056 */ - "T420-SO\0" /* 1 refs @ 18064 */ - "T420-CX\0" /* 1 refs @ 18072 */ - "T420-BT\0" /* 1 refs @ 18080 */ - "T404-BT\0" /* 1 refs @ 18088 */ - "T440-LP-CR\0" /* 1 refs @ 18096 */ - "T580-dbg\0" /* 1 refs @ 18107 */ - "T520-CR\0" /* 1 refs @ 18116 */ - "T522-CR\0" /* 1 refs @ 18124 */ - "T540-CR\0" /* 1 refs @ 18132 */ - "T520-SO\0" /* 1 refs @ 18140 */ - "T520-BT\0" /* 1 refs @ 18148 */ - "T504-BT\0" /* 1 refs @ 18156 */ - "T580-CR\0" /* 1 refs @ 18164 */ - "T540-LP-CR\0" /* 1 refs @ 18172 */ - "T580-LP-CR\0" /* 1 refs @ 18183 */ - "T520-LL-CR\0" /* 1 refs @ 18194 */ - "T560-CR\0" /* 1 refs @ 18205 */ - "T580-LP-SO-CR\0" /* 1 refs @ 18213 */ - "T502-BT\0" /* 1 refs @ 18227 */ - "T6-DBG-25\0" /* 1 refs @ 18235 */ - "T6225-CR\0" /* 1 refs @ 18245 */ - "T6225-SO-CR\0" /* 1 refs @ 18254 */ - "T6425-CR\0" /* 1 refs @ 18266 */ - "T6425-SO-CR\0" /* 1 refs @ 18275 */ - "T6225-OCP-SO\0" /* 1 refs @ 18287 */ - "T62100-OCP-SO\0" /* 1 refs @ 18300 */ - "T62100-LP-CR\0" /* 1 refs @ 18314 */ - "T62100-SO-CR\0" /* 1 refs @ 18327 */ - "T6210-BT\0" /* 1 refs @ 18340 */ - "T62100-CR\0" /* 1 refs @ 18349 */ - "T6-DBG-100\0" /* 1 refs @ 18359 */ - "T6225-LL-CR\0" /* 1 refs @ 18370 */ - "T61100-OCP-SO\0" /* 1 refs @ 18382 */ - "T6201-BT\0" /* 1 refs @ 18396 */ - "T6225\0" /* 1 refs @ 18405 */ - "80\0" /* 1 refs @ 18411 */ - "T62100\0" /* 2 refs @ 18414 */ - "81\0" /* 1 refs @ 18421 */ - "84\0" /* 1 refs @ 18424 */ - "Terminator\0" /* 3 refs @ 18427 */ - "FPGA\0" /* 5 refs @ 18438 */ - "64310\0" /* 1 refs @ 18443 */ - "69000\0" /* 1 refs @ 18449 */ - "65545\0" /* 1 refs @ 18455 */ - "65548\0" /* 1 refs @ 18461 */ - "65550\0" /* 1 refs @ 18467 */ - "65554\0" /* 1 refs @ 18473 */ - "69030\0" /* 1 refs @ 18479 */ - "LunaVPN\0" /* 1 refs @ 18485 */ - "CL-GD7548\0" /* 1 refs @ 18493 */ - "CL-GD5430\0" /* 1 refs @ 18503 */ - "CL-GD5434-4\0" /* 1 refs @ 18513 */ - "CL-GD5434-8\0" /* 1 refs @ 18525 */ - "CL-GD5436\0" /* 1 refs @ 18537 */ - "CL-GD5446\0" /* 1 refs @ 18547 */ - "CL-GD5480\0" /* 1 refs @ 18557 */ - "CL-PD6729\0" /* 1 refs @ 18567 */ - "CL-PD6832\0" /* 1 refs @ 18577 */ - "PCI-CardBus\0" /* 65 refs @ 18587 */ - "CL-PD6833\0" /* 1 refs @ 18599 */ - "CL-GD7542\0" /* 1 refs @ 18609 */ - "CL-GD7543\0" /* 1 refs @ 18619 */ - "CL-GD7541\0" /* 1 refs @ 18629 */ - "CL-CD4400\0" /* 1 refs @ 18639 */ - "CS4610\0" /* 1 refs @ 18649 */ - "SoundFusion\0" /* 1 refs @ 18656 */ - "CS4280\0" /* 1 refs @ 18668 */ - "CrystalClear\0" /* 2 refs @ 18675 */ - "CS4615\0" /* 1 refs @ 18688 */ - "CS4281\0" /* 1 refs @ 18695 */ - "AAR-1210SA\0" /* 1 refs @ 18702 */ - "AAR-1220SA\0" /* 1 refs @ 18713 */ - "PCI0640\0" /* 1 refs @ 18724 */ - "PCI0642\0" /* 1 refs @ 18732 */ - "PCI0643\0" /* 1 refs @ 18740 */ - "PCI0646\0" /* 1 refs @ 18748 */ - "PCI0647\0" /* 1 refs @ 18756 */ - "PCI0648\0" /* 1 refs @ 18764 */ - "PCI0649\0" /* 1 refs @ 18772 */ - "PCI0650A\0" /* 1 refs @ 18780 */ - "USB0670\0" /* 1 refs @ 18789 */ - "USB0673\0" /* 1 refs @ 18797 */ - "SiI0680\0" /* 1 refs @ 18805 */ - "SiI3112\0" /* 1 refs @ 18813 */ - "SATALink\0" /* 6 refs @ 18821 */ - "SiI3114\0" /* 1 refs @ 18830 */ - "SiI3124\0" /* 1 refs @ 18838 */ - "SiI3132\0" /* 1 refs @ 18846 */ - "SiI3512\0" /* 1 refs @ 18854 */ - "SiI3531\0" /* 1 refs @ 18862 */ - "CMI8338A\0" /* 1 refs @ 18870 */ - "CMI8338B\0" /* 1 refs @ 18879 */ - "CMI8738/C3DX\0" /* 1 refs @ 18888 */ - "CMI8738B\0" /* 1 refs @ 18901 */ - "HSP56\0" /* 1 refs @ 18910 */ - "Audiomodem\0" /* 1 refs @ 18916 */ - "Riser\0" /* 1 refs @ 18927 */ - "EX110TX\0" /* 1 refs @ 18933 */ - "HFC-S\0" /* 1 refs @ 18941 */ - "38W2\0" /* 1 refs @ 18947 */ - "Notebook\0" /* 3 refs @ 18952 */ - "PCI-EISA\0" /* 2 refs @ 18961 */ - "Smart\0" /* 85 refs @ 18970 */ - "Array\0" /* 76 refs @ 18976 */ - "64xx\0" /* 1 refs @ 18982 */ - "Triflex\0" /* 3 refs @ 18987 */ - "QVision\0" /* 3 refs @ 18995 */ - "1280/p\0" /* 1 refs @ 19003 */ - "5300\0" /* 5 refs @ 19010 */ - "5i\0" /* 1 refs @ 19015 */ - "532\0" /* 1 refs @ 19018 */ - "5312\0" /* 1 refs @ 19022 */ - "6i\0" /* 1 refs @ 19027 */ - "641\0" /* 1 refs @ 19030 */ - "642\0" /* 1 refs @ 19034 */ - "6400\0" /* 2 refs @ 19038 */ - "EM\0" /* 1 refs @ 19043 */ - "6422\0" /* 1 refs @ 19046 */ - "SMART2P\0" /* 1 refs @ 19051 */ - "Netelligent\0" /* 6 refs @ 19059 */ - "TX\0" /* 4 refs @ 19071 */ - "T\0" /* 1 refs @ 19074 */ - "NetFlex\0" /* 3 refs @ 19076 */ - "3/P\0" /* 3 refs @ 19084 */ - "ProLiant\0" /* 1 refs @ 19088 */ - "Deskpro\0" /* 1 refs @ 19097 */ - "4000\0" /* 3 refs @ 19105 */ - "5233MMX\0" /* 1 refs @ 19110 */ - "T/2\0" /* 1 refs @ 19118 */ - "UTP/Coax\0" /* 1 refs @ 19122 */ - "rev.\0" /* 2 refs @ 19131 */ - "Presario\0" /* 1 refs @ 19136 */ - "56xx\0" /* 1 refs @ 19145 */ - "Armada\0" /* 12 refs @ 19150 */ - "M700\0" /* 1 refs @ 19157 */ - "5i/532\0" /* 1 refs @ 19162 */ - "iLO\0" /* 2 refs @ 19169 */ - "BNC\0" /* 1 refs @ 19173 */ - "RL100-ATX\0" /* 1 refs @ 19177 */ - "RL100-TX\0" /* 1 refs @ 19187 */ - "RocketPort\0" /* 23 refs @ 19196 */ - "32\0" /* 2 refs @ 19207 */ - "16\0" /* 12 refs @ 19210 */ - "Quad\0" /* 17 refs @ 19213 */ - "Cable\0" /* 2 refs @ 19218 */ - "Octa\0" /* 3 refs @ 19224 */ - "RJ11s\0" /* 2 refs @ 19229 */ - "DB78\0" /* 2 refs @ 19235 */ - "Plus\0" /* 10 refs @ 19240 */ - "RocketModem\0" /* 2 refs @ 19245 */ - "RS232\0" /* 1 refs @ 19257 */ - "RS422\0" /* 1 refs @ 19263 */ - "550/8\0" /* 6 refs @ 19269 */ - "RJ11\0" /* 2 refs @ 19275 */ - "part\0" /* 8 refs @ 19280 */ - "550/4\0" /* 1 refs @ 19285 */ - "550/Quad\0" /* 1 refs @ 19291 */ - "550/16\0" /* 2 refs @ 19300 */ - "HW\0" /* 1 refs @ 19307 */ - "56K\0" /* 2 refs @ 19310 */ - "Fax\0" /* 1 refs @ 19314 */ - "LANfinity\0" /* 1 refs @ 19318 */ - "MiniPCI\0" /* 1 refs @ 19328 */ - "SoftK56\0" /* 1 refs @ 19336 */ - "CX23880/1/2/3\0" /* 4 refs @ 19344 */ - "Video/Audio\0" /* 1 refs @ 19358 */ - "IR\0" /* 1 refs @ 19370 */ - "CX23885\0" /* 1 refs @ 19373 */ - "82C599\0" /* 1 refs @ 19381 */ - "PCI-VLB\0" /* 1 refs @ 19388 */ - "82C693\0" /* 1 refs @ 19396 */ - "FEther\0" /* 2 refs @ 19403 */ - "CB-TXD\0" /* 2 refs @ 19410 */ - "CG-LAPCIGT\0" /* 1 refs @ 19417 */ - "\"C-Bus\0" /* 1 refs @ 19428 */ - "II\"-PCI\0" /* 1 refs @ 19435 */ - "SBLive!\0" /* 2 refs @ 19443 */ - "EMU\0" /* 3 refs @ 19451 */ - "10000\0" /* 3 refs @ 19455 */ - "SoundBlaster\0" /* 3 refs @ 19461 */ - "AWE64D\0" /* 1 refs @ 19474 */ - "SB\0" /* 3 refs @ 19481 */ - "Audigy\0" /* 4 refs @ 19484 */ - "X-Fi\0" /* 1 refs @ 19491 */ - "LS\0" /* 2 refs @ 19496 */ - "Gameport\0" /* 4 refs @ 19499 */ - "Joystick\0" /* 4 refs @ 19508 */ - "Ectiva\0" /* 1 refs @ 19517 */ - "1938\0" /* 1 refs @ 19524 */ - "Cyclom-Y\0" /* 2 refs @ 19529 */ - "below\0" /* 4 refs @ 19538 */ - "1M\0" /* 8 refs @ 19544 */ - "above\0" /* 4 refs @ 19547 */ - "Cyclom-4Y\0" /* 2 refs @ 19553 */ - "Cyclom-8Y\0" /* 2 refs @ 19563 */ - "Cyclom-Z\0" /* 2 refs @ 19573 */ - "IQ80310\0" /* 1 refs @ 19582 */ - "(PCI-700)\0" /* 1 refs @ 19590 */ - "MediaGX\0" /* 1 refs @ 19600 */ - "Built-in\0" /* 1 refs @ 19608 */ - "Cx5520\0" /* 1 refs @ 19617 */ - "Companion\0" /* 10 refs @ 19624 */ - "Cx5530\0" /* 5 refs @ 19634 */ - "Multi-Function\0" /* 1 refs @ 19641 */ - "(SMI\0" /* 1 refs @ 19656 */ - "Status\0" /* 3 refs @ 19661 */ - "Timer)\0" /* 1 refs @ 19668 */ - "(XpressAUDIO)\0" /* 1 refs @ 19675 */ - "(Video\0" /* 1 refs @ 19689 */ - "BC635PCI-U\0" /* 1 refs @ 19696 */ - "TC\0" /* 1 refs @ 19707 */ - "FREQ.\0" /* 1 refs @ 19710 */ - "DM9102\0" /* 1 refs @ 19716 */ - "PCCOM\0" /* 3 refs @ 19723 */ - "4-port\0" /* 2 refs @ 19729 */ - "2-port\0" /* 3 refs @ 19736 */ - "DC21050\0" /* 1 refs @ 19743 */ - "DC21040\0" /* 1 refs @ 19751 */ - "(\"Tulip\")\0" /* 1 refs @ 19759 */ - "DC21030\0" /* 1 refs @ 19769 */ - "(\"TGA\")\0" /* 1 refs @ 19777 */ - "Zephyr\0" /* 1 refs @ 19785 */ - "NV-RAM\0" /* 1 refs @ 19792 */ - "KZPSA\0" /* 1 refs @ 19799 */ - "DC21140\0" /* 1 refs @ 19805 */ - "(\"FasterNet\")\0" /* 1 refs @ 19813 */ - "TGA2\0" /* 1 refs @ 19827 */ - "DEFPA\0" /* 1 refs @ 19832 */ - "DC21041\0" /* 1 refs @ 19838 */ - "(\"Tulip\0" /* 1 refs @ 19846 */ - "Plus\")\0" /* 1 refs @ 19854 */ - "DGLPB\0" /* 1 refs @ 19861 */ - "(\"OPPO\")\0" /* 1 refs @ 19867 */ - "DC21142/21143\0" /* 1 refs @ 19876 */ - "Farallon\0" /* 1 refs @ 19890 */ - "PN9000SX\0" /* 1 refs @ 19899 */ - "DC21052\0" /* 1 refs @ 19908 */ - "DC21150\0" /* 1 refs @ 19916 */ - "DC21152\0" /* 1 refs @ 19924 */ - "DC21153\0" /* 1 refs @ 19932 */ - "DC21154\0" /* 1 refs @ 19940 */ - "DC21554\0" /* 1 refs @ 19948 */ - "SWXCR\0" /* 1 refs @ 19956 */ - "2/Si\0" /* 1 refs @ 19962 */ - "3/Di\0" /* 9 refs @ 19967 */ - "3/Si\0" /* 3 refs @ 19972 */ - "4/Di\0" /* 2 refs @ 19977 */ - "DRAC\0" /* 3 refs @ 19982 */ - "Virtual\0" /* 47 refs @ 19987 */ - "4e/Si\0" /* 1 refs @ 19995 */ - "SMIC\0" /* 1 refs @ 20001 */ - "CERC\0" /* 1 refs @ 20006 */ - "1.5/6ch\0" /* 1 refs @ 20011 */ - "5/e\0" /* 1 refs @ 20019 */ - "5/i\0" /* 1 refs @ 20023 */ - "Viper/PCI\0" /* 1 refs @ 20027 */ - "AccelePort\0" /* 1 refs @ 20037 */ - "8r\0" /* 1 refs @ 20048 */ - "920\0" /* 1 refs @ 20051 */ - "Neo\0" /* 3 refs @ 20055 */ - "DL-1002\0" /* 1 refs @ 20059 */ - "DFE-530TXPLUS\0" /* 1 refs @ 20067 */ - "DFE-690TXD\0" /* 1 refs @ 20081 */ - "DWL-610\0" /* 1 refs @ 20092 */ - "DL-4000\0" /* 1 refs @ 20100 */ - "DGE-550SX\0" /* 1 refs @ 20108 */ - "DFE-520TX\0" /* 1 refs @ 20118 */ - "DGE-528T\0" /* 1 refs @ 20128 */ - "DGE-530T\0" /* 2 refs @ 20137 */ - "C1\0" /* 2 refs @ 20146 */ - "DGE-560T\0" /* 1 refs @ 20149 */ - "DGE-560T_2\0" /* 1 refs @ 20158 */ - "DGE-560SX\0" /* 1 refs @ 20169 */ - "DGE-550T\0" /* 1 refs @ 20179 */ - "SmartCache/SmartRAID\0" /* 1 refs @ 20188 */ - "(EATA)\0" /* 1 refs @ 20209 */ - "SmartRAID\0" /* 2 refs @ 20216 */ - "(I2O)\0" /* 2 refs @ 20226 */ - "Zero\0" /* 1 refs @ 20232 */ - "Channel\0" /* 68 refs @ 20237 */ - "PCI-SCI\0" /* 3 refs @ 20245 */ - "(32-bit,\0" /* 1 refs @ 20253 */ - "33\0" /* 2 refs @ 20262 */ - "MHz)\0" /* 3 refs @ 20265 */ - "(64-bit,\0" /* 2 refs @ 20270 */ - "66\0" /* 1 refs @ 20279 */ - "DMX-3191D\0" /* 1 refs @ 20282 */ - "IS64PH\0" /* 1 refs @ 20292 */ - "RT2860\0" /* 8 refs @ 20299 */ - "RT3591\0" /* 2 refs @ 20306 */ - "QuickStep\0" /* 1 refs @ 20313 */ - "1000\0" /* 5 refs @ 20323 */ - "Gloria\0" /* 1 refs @ 20328 */ - "1624\0" /* 1 refs @ 20335 */ - "LP6000\0" /* 1 refs @ 20340 */ - "FibreChannel\0" /* 9 refs @ 20347 */ - "LP952\0" /* 1 refs @ 20360 */ - "LP982\0" /* 1 refs @ 20366 */ - "LP101\0" /* 1 refs @ 20372 */ - "LP7000\0" /* 1 refs @ 20378 */ - "LP8000\0" /* 1 refs @ 20385 */ - "LP9000\0" /* 1 refs @ 20392 */ - "LP9802\0" /* 1 refs @ 20399 */ - "LP10000\0" /* 1 refs @ 20406 */ - "MCR510\0" /* 1 refs @ 20414 */ - "Reader\0" /* 12 refs @ 20421 */ - "CB712/714/810\0" /* 1 refs @ 20428 */ - "CB1211\0" /* 1 refs @ 20442 */ - "CardBus\0" /* 6 refs @ 20449 */ - "CB1225\0" /* 1 refs @ 20457 */ - "CB1410\0" /* 1 refs @ 20464 */ - "CB710\0" /* 1 refs @ 20471 */ - "CB1420\0" /* 1 refs @ 20477 */ - "CB720\0" /* 1 refs @ 20484 */ - "AudioPCI\0" /* 2 refs @ 20490 */ - "97\0" /* 1 refs @ 20499 */ - "CT5880\0" /* 1 refs @ 20502 */ - "SST-64P\0" /* 1 refs @ 20509 */ - "SST-128P\0" /* 1 refs @ 20517 */ - "SST-16P\0" /* 3 refs @ 20526 */ - "SST-4P\0" /* 1 refs @ 20534 */ - "SST-8P\0" /* 1 refs @ 20541 */ - "RoadRunner\0" /* 2 refs @ 20548 */ - "HIPPI\0" /* 1 refs @ 20559 */ - "Gig-E\0" /* 1 refs @ 20565 */ - "Maestro\0" /* 7 refs @ 20571 */ - "Solo-1\0" /* 1 refs @ 20579 */ - "AudioDrive\0" /* 1 refs @ 20586 */ - "2E\0" /* 1 refs @ 20597 */ - "Allegro-1\0" /* 1 refs @ 20600 */ - "WL11000P\0" /* 1 refs @ 20610 */ - "WaveLAN/IEEE\0" /* 1 refs @ 20619 */ - "IEEE\0" /* 40 refs @ 20632 */ - "1394\0" /* 36 refs @ 20637 */ - "OZ6729\0" /* 1 refs @ 20642 */ - "PCI-PCMCIA\0" /* 4 refs @ 20649 */ - "OZ6730\0" /* 1 refs @ 20660 */ - "OZ6832/OZ6833\0" /* 1 refs @ 20667 */ - "OZ6836/OZ6860\0" /* 1 refs @ 20681 */ - "OZ6812/OZ6872\0" /* 1 refs @ 20695 */ - "OZ6922\0" /* 1 refs @ 20709 */ - "OZ6933\0" /* 1 refs @ 20716 */ - "OZ6912/OZ6972\0" /* 1 refs @ 20723 */ - "OZ7120\0" /* 1 refs @ 20737 */ - "MMC/SD\0" /* 1 refs @ 20744 */ - "OZ7130\0" /* 1 refs @ 20751 */ - "MS/xD/SM\0" /* 1 refs @ 20758 */ - "OZ711E0\0" /* 1 refs @ 20767 */ - "Freedom\0" /* 1 refs @ 20775 */ - "PCI-GBus\0" /* 1 refs @ 20783 */ - "Universal\0" /* 4 refs @ 20792 */ - "PCA-200\0" /* 1 refs @ 20802 */ - "PCA-200e\0" /* 1 refs @ 20810 */ - "801\0" /* 1 refs @ 20819 */ - "FL1000\0" /* 1 refs @ 20823 */ - "USB3\0" /* 2 refs @ 20830 */ - "FL1009\0" /* 1 refs @ 20835 */ - "TMC-18C30\0" /* 1 refs @ 20842 */ - "(36C70)\0" /* 1 refs @ 20852 */ - "PW008GE5\0" /* 1 refs @ 20860 */ - "PW008GE4\0" /* 1 refs @ 20869 */ - "PRIMEPOWER250/450\0" /* 1 refs @ 20878 */ - "STR1100\0" /* 1 refs @ 20896 */ - "HOTlink\0" /* 2 refs @ 20904 */ - "Counter\0" /* 1 refs @ 20912 */ - "Timer\0" /* 6 refs @ 20920 */ - "PROFIBUS\0" /* 1 refs @ 20926 */ - "old\0" /* 1 refs @ 20935 */ - "155P-MF1\0" /* 2 refs @ 20939 */ - "(FPGA)\0" /* 1 refs @ 20948 */ - "(ASIC)\0" /* 1 refs @ 20955 */ - "SpeedStream\0" /* 2 refs @ 20962 */ - "ENI-25p\0" /* 1 refs @ 20974 */ - "MPC8548E\0" /* 2 refs @ 20982 */ - "MPC8548\0" /* 2 refs @ 20991 */ - "MPC8543E\0" /* 1 refs @ 20999 */ - "MPC8543\0" /* 1 refs @ 21008 */ - "MPC8547E\0" /* 1 refs @ 21016 */ - "MPC8545E\0" /* 1 refs @ 21025 */ - "MPC8545\0" /* 1 refs @ 21034 */ - "MPC8544E\0" /* 1 refs @ 21042 */ - "MPC8544\0" /* 1 refs @ 21051 */ - "MPC8572E\0" /* 1 refs @ 21059 */ - "MPC8572\0" /* 1 refs @ 21068 */ - "MPC8536E\0" /* 1 refs @ 21076 */ - "MPC8536\0" /* 1 refs @ 21085 */ - "P2020E\0" /* 1 refs @ 21093 */ - "P2020\0" /* 1 refs @ 21100 */ - "P2010E\0" /* 1 refs @ 21106 */ - "P2010\0" /* 1 refs @ 21113 */ - "MPC8349E\0" /* 1 refs @ 21119 */ - "MPC8349\0" /* 1 refs @ 21128 */ - "MPC8347E\0" /* 2 refs @ 21136 */ - "TBGA\0" /* 2 refs @ 21145 */ - "MPC8347\0" /* 2 refs @ 21150 */ - "PBGA\0" /* 2 refs @ 21158 */ - "MPC8343E\0" /* 1 refs @ 21163 */ - "MPC8343\0" /* 1 refs @ 21172 */ - "P1021E\0" /* 2 refs @ 21180 */ - "P1020\0" /* 1 refs @ 21187 */ - "P1021\0" /* 1 refs @ 21193 */ - "P1024E\0" /* 1 refs @ 21199 */ - "P1024\0" /* 1 refs @ 21206 */ - "P1025E\0" /* 1 refs @ 21212 */ - "P1025\0" /* 1 refs @ 21219 */ - "P1011E\0" /* 1 refs @ 21225 */ - "P1011\0" /* 1 refs @ 21232 */ - "P1022E\0" /* 1 refs @ 21238 */ - "P1022\0" /* 1 refs @ 21245 */ - "P1013E\0" /* 1 refs @ 21251 */ - "P1013\0" /* 1 refs @ 21258 */ - "P4080E\0" /* 1 refs @ 21264 */ - "P4080\0" /* 1 refs @ 21271 */ - "P4040E\0" /* 1 refs @ 21277 */ - "P4040\0" /* 1 refs @ 21284 */ - "P2040E\0" /* 1 refs @ 21290 */ - "P2040\0" /* 1 refs @ 21297 */ - "P3041E\0" /* 1 refs @ 21303 */ - "P3041\0" /* 1 refs @ 21310 */ - "P5020E\0" /* 1 refs @ 21316 */ - "P5020\0" /* 1 refs @ 21323 */ - "P5010E\0" /* 1 refs @ 21329 */ - "P5010\0" /* 1 refs @ 21336 */ - "GT-64010A\0" /* 1 refs @ 21342 */ - "88AP510\0" /* 1 refs @ 21352 */ - "88F1181\0" /* 1 refs @ 21360 */ - "88F1281\0" /* 1 refs @ 21368 */ - "Orion2\0" /* 2 refs @ 21376 */ - "Libertas\0" /* 5 refs @ 21383 */ - "88W8300\0" /* 2 refs @ 21392 */ - "88W8310\0" /* 1 refs @ 21400 */ - "88W8335\0" /* 2 refs @ 21408 */ - "88SB2211\0" /* 1 refs @ 21416 */ - "x1\0" /* 1 refs @ 21425 */ - "GT-64115\0" /* 1 refs @ 21428 */ - "GT-64011\0" /* 1 refs @ 21437 */ - "SK-NET\0" /* 5 refs @ 21446 */ - "Yukon-II\0" /* 8 refs @ 21453 */ - "88E8021CU\0" /* 1 refs @ 21462 */ - "88E8022CU\0" /* 1 refs @ 21472 */ - "88E8061CU\0" /* 1 refs @ 21482 */ - "88E8062CU\0" /* 1 refs @ 21492 */ - "88E8021X\0" /* 1 refs @ 21502 */ - "88E8022X\0" /* 1 refs @ 21511 */ - "88E8061X\0" /* 1 refs @ 21520 */ - "88E8062X\0" /* 1 refs @ 21529 */ - "Yukon\0" /* 27 refs @ 21538 */ - "88E8035\0" /* 1 refs @ 21544 */ - "88E8036\0" /* 1 refs @ 21552 */ - "88E8038\0" /* 1 refs @ 21560 */ - "88E8039\0" /* 1 refs @ 21568 */ - "88E8040\0" /* 1 refs @ 21576 */ - "88E8040T\0" /* 1 refs @ 21584 */ - "88EC033\0" /* 1 refs @ 21593 */ - "88E8042\0" /* 1 refs @ 21601 */ - "88E8048\0" /* 1 refs @ 21609 */ - "88E8052\0" /* 1 refs @ 21617 */ - "88E8050\0" /* 1 refs @ 21625 */ - "88E8053\0" /* 1 refs @ 21633 */ - "88E8055\0" /* 1 refs @ 21641 */ - "88E8056\0" /* 1 refs @ 21649 */ - "88E8070\0" /* 1 refs @ 21657 */ - "88EC036\0" /* 1 refs @ 21665 */ - "88EC032\0" /* 1 refs @ 21673 */ - "88EC034\0" /* 1 refs @ 21681 */ - "88EC042\0" /* 1 refs @ 21689 */ - "88E8058\0" /* 1 refs @ 21697 */ - "88E8071\0" /* 1 refs @ 21705 */ - "88E8072\0" /* 1 refs @ 21713 */ - "88E8055-2\0" /* 1 refs @ 21721 */ - "88E8075\0" /* 1 refs @ 21731 */ - "88E8057\0" /* 1 refs @ 21739 */ - "88E8059\0" /* 1 refs @ 21747 */ - "88E8079\0" /* 1 refs @ 21755 */ - "GT-64120\0" /* 1 refs @ 21763 */ - "88SX5040\0" /* 1 refs @ 21772 */ - "88SX5041\0" /* 1 refs @ 21781 */ - "88SX5080\0" /* 1 refs @ 21790 */ - "88SX5081\0" /* 1 refs @ 21799 */ - "88F5082\0" /* 1 refs @ 21808 */ - "Orion1\0" /* 7 refs @ 21816 */ - "88F5180N\0" /* 1 refs @ 21823 */ - "88F5181\0" /* 1 refs @ 21832 */ - "88F5182\0" /* 1 refs @ 21840 */ - "88F5281\0" /* 1 refs @ 21848 */ - "88SX6040\0" /* 1 refs @ 21856 */ - "88SX6041\0" /* 1 refs @ 21865 */ - "88SX6042\0" /* 1 refs @ 21874 */ - "IIe\0" /* 3 refs @ 21883 */ - "88SX6080\0" /* 1 refs @ 21887 */ - "88SX6081\0" /* 1 refs @ 21896 */ - "88F6082\0" /* 1 refs @ 21905 */ - "88SE6101\0" /* 1 refs @ 21913 */ - "PATA133\0" /* 1 refs @ 21922 */ - "88SE6121\0" /* 1 refs @ 21930 */ - "88SE614X\0" /* 1 refs @ 21939 */ - "PCI-E\0" /* 29 refs @ 21948 */ - "88SE6145\0" /* 1 refs @ 21954 */ - "88F6180\0" /* 1 refs @ 21963 */ - "Kirkwood\0" /* 4 refs @ 21971 */ - "88F6183\0" /* 1 refs @ 21980 */ - "88F6192\0" /* 1 refs @ 21988 */ - "88F6281\0" /* 1 refs @ 21996 */ - "88F6282\0" /* 1 refs @ 22004 */ - "GT-64130\0" /* 1 refs @ 22012 */ - "GT-64260\0" /* 1 refs @ 22021 */ - "MV6436x\0" /* 1 refs @ 22030 */ - "MV6446x\0" /* 1 refs @ 22038 */ - "MV6707\0" /* 1 refs @ 22046 */ - "MV6710\0" /* 1 refs @ 22053 */ - "MV6W11\0" /* 1 refs @ 22060 */ - "88F6810\0" /* 1 refs @ 22067 */ - "38x\0" /* 3 refs @ 22075 */ - "88F6820\0" /* 1 refs @ 22079 */ - "88F6828\0" /* 1 refs @ 22087 */ - "88SX7042\0" /* 1 refs @ 22095 */ - "MV78100\0" /* 1 refs @ 22104 */ - "Discovery\0" /* 2 refs @ 22112 */ - "Innovation\0" /* 2 refs @ 22122 */ - "MV78130\0" /* 1 refs @ 22133 */ - "XP\0" /* 5 refs @ 22141 */ - "MV78160\0" /* 1 refs @ 22144 */ - "MV78200\0" /* 1 refs @ 22152 */ - "MV78230\0" /* 1 refs @ 22160 */ - "MV78260\0" /* 1 refs @ 22168 */ - "MV78460\0" /* 1 refs @ 22176 */ - "88W8660\0" /* 1 refs @ 22184 */ - "88SE9120\0" /* 1 refs @ 22192 */ - "88SE912[38]\0" /* 1 refs @ 22201 */ - "or\0" /* 59 refs @ 22213 */ - "88SE9125\0" /* 1 refs @ 22216 */ - "88SE9128\0" /* 1 refs @ 22225 */ - "88SE9130\0" /* 1 refs @ 22234 */ - "HyperDuo\0" /* 1 refs @ 22243 */ - "88SE9172\0" /* 1 refs @ 22252 */ - "88SE9170\0" /* 2 refs @ 22261 */ - "88SE9182\0" /* 1 refs @ 22270 */ - "88SE9183\0" /* 1 refs @ 22279 */ - "88SE91XX\0" /* 1 refs @ 22288 */ - "88SE912X\0" /* 1 refs @ 22297 */ - "88SE9215\0" /* 1 refs @ 22306 */ - "88SE9220\0" /* 1 refs @ 22315 */ - "88SE9230\0" /* 1 refs @ 22324 */ - "88SE9235\0" /* 1 refs @ 22333 */ - "88SE9445\0" /* 1 refs @ 22342 */ - "88SE9480\0" /* 1 refs @ 22351 */ - "88SE9485\0" /* 1 refs @ 22360 */ - "MIS\0" /* 1 refs @ 22369 */ - "RT3090\0" /* 2 refs @ 22373 */ - "GL24110P\0" /* 2 refs @ 22380 */ - "MAXIRADIO\0" /* 1 refs @ 22389 */ - "PN672TX\0" /* 1 refs @ 22399 */ - "PM/PPC\0" /* 1 refs @ 22407 */ - "A4977A\0" /* 1 refs @ 22414 */ - "Visualize\0" /* 5 refs @ 22421 */ - "EG\0" /* 1 refs @ 22431 */ - "FX6\0" /* 1 refs @ 22434 */ - "FX4\0" /* 1 refs @ 22438 */ - "FX2\0" /* 1 refs @ 22442 */ - "TL\0" /* 1 refs @ 22446 */ - "XL2\0" /* 1 refs @ 22449 */ - "TS\0" /* 1 refs @ 22453 */ - "J2585A\0" /* 1 refs @ 22456 */ - "J2585B\0" /* 1 refs @ 22463 */ - "Diva\0" /* 1 refs @ 22470 */ - "Multiport\0" /* 1 refs @ 22475 */ - "Elroy\0" /* 1 refs @ 22485 */ - "Ropes-PCI\0" /* 3 refs @ 22491 */ - "FXe\0" /* 1 refs @ 22501 */ - "TopTools\0" /* 1 refs @ 22505 */ - "NetRaid-4M\0" /* 1 refs @ 22514 */ - "NetServer\0" /* 1 refs @ 22525 */ - "SmartIRQ\0" /* 1 refs @ 22535 */ - "82557B\0" /* 1 refs @ 22544 */ - "NIC\0" /* 8 refs @ 22551 */ - "Pluto\0" /* 1 refs @ 22555 */ - "MIO\0" /* 1 refs @ 22561 */ - "zx1\0" /* 1 refs @ 22565 */ - "IOC\0" /* 1 refs @ 22569 */ - "QuickSilver\0" /* 1 refs @ 22573 */ - "P430i\0" /* 1 refs @ 22585 */ - "P830i\0" /* 1 refs @ 22591 */ - "P430\0" /* 1 refs @ 22597 */ - "P431\0" /* 1 refs @ 22602 */ - "P830\0" /* 1 refs @ 22607 */ - "P731m\0" /* 1 refs @ 22612 */ - "P230i\0" /* 1 refs @ 22618 */ - "P530\0" /* 2 refs @ 22624 */ - "P531\0" /* 1 refs @ 22629 */ - "P244br\0" /* 1 refs @ 22634 */ - "P741m\0" /* 1 refs @ 22641 */ - "H240ar\0" /* 1 refs @ 22647 */ - "H440ar\0" /* 1 refs @ 22654 */ - "P840ar\0" /* 1 refs @ 22661 */ - "P440\0" /* 1 refs @ 22668 */ - "P441\0" /* 1 refs @ 22673 */ - "P841\0" /* 1 refs @ 22678 */ - "H244br\0" /* 1 refs @ 22683 */ - "H240\0" /* 1 refs @ 22690 */ - "H241\0" /* 1 refs @ 22695 */ - "P246br\0" /* 1 refs @ 22700 */ - "P840\0" /* 1 refs @ 22707 */ - "P542d\0" /* 1 refs @ 22712 */ - "P240nr\0" /* 1 refs @ 22718 */ - "H240nr\0" /* 1 refs @ 22725 */ - "V100\0" /* 10 refs @ 22732 */ - "E200i\0" /* 4 refs @ 22737 */ - "E200\0" /* 1 refs @ 22743 */ - "P600\0" /* 2 refs @ 22748 */ - "P400\0" /* 1 refs @ 22753 */ - "P400i\0" /* 1 refs @ 22758 */ - "P700m\0" /* 1 refs @ 22764 */ - "P212\0" /* 1 refs @ 22770 */ - "P410\0" /* 1 refs @ 22775 */ - "P410i\0" /* 1 refs @ 22780 */ - "P411\0" /* 1 refs @ 22786 */ - "P822\0" /* 2 refs @ 22791 */ - "P712m\0" /* 1 refs @ 22796 */ - "iLO3\0" /* 3 refs @ 22802 */ - "IPMI\0" /* 1 refs @ 22807 */ - "Slave\0" /* 1 refs @ 22812 */ - "P222\0" /* 1 refs @ 22818 */ - "P420\0" /* 1 refs @ 22823 */ - "P421\0" /* 1 refs @ 22828 */ - "P420i\0" /* 1 refs @ 22833 */ - "P220i\0" /* 1 refs @ 22839 */ - "P721i\0" /* 1 refs @ 22845 */ - "(AMD)\0" /* 1 refs @ 22851 */ - "Ultrastar\0" /* 2 refs @ 22857 */ - "SN100\0" /* 1 refs @ 22867 */ - "SN200\0" /* 1 refs @ 22873 */ - "7751\0" /* 2 refs @ 22879 */ - "6500\0" /* 1 refs @ 22884 */ - "7811\0" /* 1 refs @ 22889 */ - "7951\0" /* 1 refs @ 22894 */ - "7814/7851/7854\0" /* 1 refs @ 22899 */ - "8065\0" /* 1 refs @ 22914 */ - "8165\0" /* 1 refs @ 22919 */ - "8154\0" /* 1 refs @ 22924 */ - "7956\0" /* 1 refs @ 22929 */ - "7954/7955\0" /* 1 refs @ 22934 */ - "HB1\0" /* 1 refs @ 22944 */ - "HB4\0" /* 2 refs @ 22948 */ - "MSVCC01/02/03/04\0" /* 1 refs @ 22952 */ - "Cards\0" /* 1 refs @ 22969 */ - "SH7751\0" /* 1 refs @ 22975 */ - "SH7751R\0" /* 1 refs @ 22982 */ - "Hi1710\0" /* 1 refs @ 22990 */ - "BMC\0" /* 1 refs @ 22997 */ - "MCA\0" /* 2 refs @ 23001 */ - "-\0" /* 3 refs @ 23005 */ - "Alta\0" /* 2 refs @ 23007 */ - "Lite\0" /* 5 refs @ 23012 */ - "MP\0" /* 1 refs @ 23017 */ - "Fire\0" /* 1 refs @ 23020 */ - "Coral\0" /* 1 refs @ 23025 */ - "ISA\0" /* 5 refs @ 23031 */ - "PnP\0" /* 1 refs @ 23035 */ - "PowerWave\0" /* 1 refs @ 23039 */ - "Idaho\0" /* 1 refs @ 23049 */ - "Auto\0" /* 1 refs @ 23055 */ - "LANStreamer\0" /* 1 refs @ 23060 */ - "GXT-150P\0" /* 1 refs @ 23072 */ - "2D\0" /* 1 refs @ 23081 */ - "Carrera\0" /* 1 refs @ 23084 */ - "82G2675\0" /* 1 refs @ 23092 */ - "SCSI-2\0" /* 1 refs @ 23100 */ - "82351\0" /* 1 refs @ 23107 */ - "Montana/Nevada\0" /* 1 refs @ 23113 */ - "Python\0" /* 1 refs @ 23128 */ - "(copperhead)\0" /* 1 refs @ 23135 */ - "Miami/PCI\0" /* 1 refs @ 23148 */ - "82660\0" /* 1 refs @ 23158 */ - "PowerPC\0" /* 3 refs @ 23164 */ - "GXT-250P\0" /* 1 refs @ 23172 */ - "16/4\0" /* 8 refs @ 23181 */ - "MPIC\0" /* 1 refs @ 23186 */ - "Turboways\0" /* 1 refs @ 23191 */ - "25\0" /* 4 refs @ 23201 */ - "GXT-500P/GXT550P\0" /* 1 refs @ 23204 */ - "i82557B\0" /* 1 refs @ 23221 */ - "GXT-800P\0" /* 1 refs @ 23229 */ - "EADS\0" /* 1 refs @ 23238 */ - "GXT-3000P\0" /* 2 refs @ 23243 */ - "Adapter(2)\0" /* 1 refs @ 23253 */ - "GXT-2000P\0" /* 1 refs @ 23264 */ - "Olympic\0" /* 1 refs @ 23274 */ - "CPC710\0" /* 2 refs @ 23282 */ - "(PCI64)\0" /* 1 refs @ 23289 */ - "(PCI32)\0" /* 1 refs @ 23297 */ - "ThinkPad\0" /* 1 refs @ 23305 */ - "600X/A20/T20/T22\0" /* 1 refs @ 23314 */ - "PPC\0" /* 2 refs @ 23331 */ - "405GP\0" /* 1 refs @ 23335 */ - "GXT-4000P\0" /* 1 refs @ 23341 */ - "GXT-6000P\0" /* 1 refs @ 23351 */ - "GXT-300P\0" /* 1 refs @ 23361 */ - "133\0" /* 1 refs @ 23370 */ - "(morpheus)\0" /* 1 refs @ 23374 */ - "440GP\0" /* 1 refs @ 23385 */ - "GXT-6500P\0" /* 1 refs @ 23391 */ - "GXT-4500P\0" /* 1 refs @ 23401 */ - "GXT-135P\0" /* 1 refs @ 23411 */ - "4810\0" /* 2 refs @ 23420 */ - "BSP\0" /* 1 refs @ 23425 */ - "SCC\0" /* 4 refs @ 23429 */ - "8k\0" /* 1 refs @ 23433 */ - "MPIC-II\0" /* 1 refs @ 23436 */ - "Envy24\0" /* 1 refs @ 23444 */ - "Envy24PT/HT\0" /* 1 refs @ 23451 */ - "Multi-Channel\0" /* 1 refs @ 23463 */ - "iTVC15\0" /* 1 refs @ 23477 */ - "MPEG2\0" /* 1 refs @ 23484 */ - "Codec\0" /* 1 refs @ 23490 */ - "77201/77211\0" /* 1 refs @ 23496 */ - "(\"NICStAR\")\0" /* 1 refs @ 23508 */ - "RC32334\0" /* 1 refs @ 23520 */ - "RC32332\0" /* 1 refs @ 23528 */ - "PCI-WDT50x\0" /* 1 refs @ 23536 */ - "Watchdog\0" /* 6 refs @ 23547 */ - "INIC-920\0" /* 1 refs @ 23556 */ - "INIC-850\0" /* 1 refs @ 23565 */ - "INIC-1060\0" /* 1 refs @ 23574 */ - "INIC-1622\0" /* 1 refs @ 23584 */ - "INIC-940\0" /* 1 refs @ 23594 */ - "INIC-935\0" /* 1 refs @ 23603 */ - "INIC-950\0" /* 1 refs @ 23612 */ - "IGA\0" /* 2 refs @ 23621 */ - "1680\0" /* 1 refs @ 23625 */ - "1682\0" /* 1 refs @ 23630 */ - "CyberPro\0" /* 2 refs @ 23635 */ - "2010\0" /* 1 refs @ 23644 */ - "8849\0" /* 1 refs @ 23649 */ - "TwinTurbo\0" /* 1 refs @ 23654 */ - "128M\0" /* 1 refs @ 23664 */ - "Iron\0" /* 6 refs @ 23669 */ - "Lake\0" /* 457 refs @ 23674 */ - "Core\0" /* 181 refs @ 23679 */ - "Centrino\0" /* 28 refs @ 23684 */ - "Advanced-N\0" /* 10 refs @ 23693 */ - "6205\0" /* 2 refs @ 23704 */ - "WiFi\0" /* 30 refs @ 23709 */ - "Wireless-N\0" /* 16 refs @ 23714 */ - "1030\0" /* 3 refs @ 23725 */ - "6230\0" /* 2 refs @ 23730 */ - "Sandy\0" /* 13 refs @ 23735 */ - "(desktop)\0" /* 16 refs @ 23741 */ - "GI1\0" /* 1 refs @ 23751 */ - "(mobile)\0" /* 83 refs @ 23755 */ - "GT1\0" /* 2 refs @ 23764 */ - "(server)\0" /* 3 refs @ 23768 */ - "GT2\0" /* 2 refs @ 23777 */ - "GT2+\0" /* 2 refs @ 23781 */ - "Ivy\0" /* 13 refs @ 23786 */ - "Comet\0" /* 54 refs @ 23790 */ - "U\0" /* 5 refs @ 23796 */ - "(Premium)\0" /* 1 refs @ 23798 */ - "eSPI\0" /* 52 refs @ 23808 */ - "P2SB\0" /* 21 refs @ 23813 */ - "PMC\0" /* 23 refs @ 23818 */ - "(FLASH)\0" /* 12 refs @ 23822 */ - "Trace\0" /* 26 refs @ 23830 */ - "11\0" /* 12 refs @ 23836 */ - "13\0" /* 8 refs @ 23839 */ - "14\0" /* 8 refs @ 23842 */ - "15\0" /* 8 refs @ 23845 */ - "eMMC\0" /* 11 refs @ 23848 */ - "premium\0" /* 11 refs @ 23853 */ - "MEI\0" /* 46 refs @ 23861 */ - "IDE-R\0" /* 18 refs @ 23865 */ - "KT\0" /* 43 refs @ 23871 */ - "Gen\0" /* 19 refs @ 23874 */ - "2x1\0" /* 6 refs @ 23878 */ - "1x1\0" /* 9 refs @ 23882 */ - "xDCI\0" /* 10 refs @ 23886 */ - "Shared\0" /* 15 refs @ 23891 */ - "SRAM\0" /* 15 refs @ 23898 */ - "CNVi\0" /* 12 refs @ 23903 */ - "SDXC\0" /* 5 refs @ 23908 */ - "Thermal\0" /* 45 refs @ 23913 */ - "Sensor\0" /* 13 refs @ 23921 */ - "80312\0" /* 1 refs @ 23928 */ - "80321\0" /* 1 refs @ 23934 */ - "6700PXH\0" /* 3 refs @ 23940 */ - "IOxAPIC\0" /* 4 refs @ 23948 */ - "Express-to-PCI\0" /* 6 refs @ 23956 */ - "#0\0" /* 14 refs @ 23971 */ - "#1\0" /* 20 refs @ 23974 */ - "6702PXH\0" /* 1 refs @ 23977 */ - "Express-to-PCIX\0" /* 1 refs @ 23985 */ - "IOP332\0" /* 2 refs @ 24001 */ - "Lindsay\0" /* 1 refs @ 24008 */ - "IOP333\0" /* 2 refs @ 24016 */ - "Haswell\0" /* 7 refs @ 24023 */ - "DH89xxCC\0" /* 19 refs @ 24031 */ - "Endpoint\0" /* 3 refs @ 24040 */ - "QuickAssist\0" /* 4 refs @ 24049 */ - "DH89xxCL\0" /* 19 refs @ 24061 */ - "DH89XXCC\0" /* 5 refs @ 24070 */ - "SGMII\0" /* 5 refs @ 24079 */ - "SerDes\0" /* 1 refs @ 24085 */ - "backplane\0" /* 5 refs @ 24092 */ - "DH89XXCL\0" /* 1 refs @ 24102 */ - "82375EB/SB\0" /* 1 refs @ 24111 */ - "82424ZX\0" /* 1 refs @ 24122 */ - "82378ZB\0" /* 1 refs @ 24130 */ - "82426EX\0" /* 1 refs @ 24138 */ - "82434LX/NX\0" /* 1 refs @ 24146 */ - "PCI,\0" /* 1 refs @ 24157 */ - "(PCMC)\0" /* 1 refs @ 24162 */ - "GDT\0" /* 2 refs @ 24169 */ - "H470\0" /* 1 refs @ 24173 */ - "Z490\0" /* 1 refs @ 24178 */ - "Q470\0" /* 1 refs @ 24183 */ - "QM480\0" /* 1 refs @ 24188 */ - "HM470\0" /* 1 refs @ 24194 */ - "WM490\0" /* 1 refs @ 24200 */ - "W480\0" /* 1 refs @ 24206 */ - "GSPI\0" /* 40 refs @ 24211 */ - "21\0" /* 6 refs @ 24216 */ - "23\0" /* 5 refs @ 24219 */ - "24\0" /* 6 refs @ 24222 */ - "17\0" /* 5 refs @ 24225 */ - "18\0" /* 5 refs @ 24228 */ - "19\0" /* 5 refs @ 24231 */ - "cAVS\0" /* 12 refs @ 24234 */ - "1.8\0" /* 2 refs @ 24239 */ - "desktop\0" /* 4 refs @ 24243 */ - "mobile\0" /* 6 refs @ 24251 */ - "Optane\0" /* 1 refs @ 24258 */ - "HECI\0" /* 65 refs @ 24265 */ - "6150\0" /* 4 refs @ 24270 */ - "2230\0" /* 2 refs @ 24275 */ - "6235\0" /* 2 refs @ 24280 */ - "2200\0" /* 3 refs @ 24285 */ - "135\0" /* 2 refs @ 24290 */ - "105\0" /* 2 refs @ 24294 */ - "130\0" /* 2 refs @ 24298 */ - "Quark\0" /* 11 refs @ 24302 */ - "X1000\0" /* 11 refs @ 24308 */ - "SDIO/eMMC\0" /* 1 refs @ 24314 */ - "Band\0" /* 15 refs @ 24324 */ - "AC\0" /* 16 refs @ 24329 */ - "7260\0" /* 2 refs @ 24332 */ - "3160\0" /* 2 refs @ 24337 */ - "HS-UART\0" /* 1 refs @ 24342 */ - "MAC\0" /* 2 refs @ 24350 */ - "750\0" /* 9 refs @ 24354 */ - "DC\0" /* 4 refs @ 24358 */ - "P3[567]00\0" /* 1 refs @ 24361 */ - "7265\0" /* 2 refs @ 24371 */ - "Legacy\0" /* 4 refs @ 24376 */ - "i960\0" /* 5 refs @ 24383 */ - "RM\0" /* 2 refs @ 24388 */ - "RN\0" /* 1 refs @ 24391 */ - "Snow\0" /* 61 refs @ 24394 */ - "IEH\0" /* 2 refs @ 24399 */ - "Mesh2IIO\0" /* 4 refs @ 24403 */ - "MMAP/VT-d\0" /* 1 refs @ 24412 */ - "RAS\0" /* 16 refs @ 24422 */ - "PMU/PMON\0" /* 1 refs @ 24426 */ - "DFx\0" /* 1 refs @ 24435 */ - "PECI\0" /* 2 refs @ 24439 */ - "OOB-MSM\0" /* 2 refs @ 24444 */ - "PMU\0" /* 1 refs @ 24452 */ - "4G\0" /* 33 refs @ 24456 */ - "Bridge,\0" /* 29 refs @ 24459 */ - "(GT1)\0" /* 9 refs @ 24467 */ - "Mini\0" /* 2 refs @ 24473 */ - "audio\0" /* 2 refs @ 24478 */ - "(GT2)\0" /* 10 refs @ 24484 */ - "(GT3)\0" /* 5 refs @ 24490 */ - "Iris\0" /* 16 refs @ 24496 */ - "P3520\0" /* 1 refs @ 24501 */ - "P4500\0" /* 1 refs @ 24507 */ - "P4600\0" /* 1 refs @ 24513 */ - "DMA\0" /* 57 refs @ 24519 */ - "x16\0" /* 8 refs @ 24523 */ - "x8\0" /* 30 refs @ 24527 */ - "Xeon\0" /* 245 refs @ 24530 */ - "E3-1200\0" /* 1 refs @ 24535 */ - "v3\0" /* 70 refs @ 24543 */ - "x4\0" /* 39 refs @ 24546 */ - "Atom\0" /* 26 refs @ 24549 */ - "S1200\0" /* 15 refs @ 24554 */ - "management\0" /* 1 refs @ 24560 */ - "Debug\0" /* 19 refs @ 24571 */ - "mass-storage)\0" /* 1 refs @ 24577 */ - "(enclosure\0" /* 1 refs @ 24591 */ - "maintain)\0" /* 1 refs @ 24602 */ - "High-Speed\0" /* 1 refs @ 24612 */ - "S1220\0" /* 1 refs @ 24623 */ - "S1240\0" /* 1 refs @ 24629 */ - "S1260\0" /* 1 refs @ 24635 */ - "I219-LM\0" /* 23 refs @ 24641 */ - "(11)\0" /* 2 refs @ 24649 */ - "Connection\0" /* 84 refs @ 24654 */ - "I219-V\0" /* 22 refs @ 24665 */ - "(10)\0" /* 2 refs @ 24672 */ - "I225-IT\0" /* 1 refs @ 24677 */ - "(12)\0" /* 2 refs @ 24685 */ - "(23)\0" /* 2 refs @ 24690 */ - "(22)\0" /* 2 refs @ 24695 */ - "E5\0" /* 274 refs @ 24700 */ - "v2\0" /* 93 refs @ 24703 */ - "DMI2\0" /* 3 refs @ 24706 */ - "(DMI2\0" /* 2 refs @ 24711 */ - "Mode)\0" /* 5 refs @ 24717 */ - "x16,\0" /* 16 refs @ 24723 */ - "R2PCIe\0" /* 2 refs @ 24728 */ - "UBOX\0" /* 7 refs @ 24735 */ - "I/OAT\0" /* 9 refs @ 24740 */ - "Hot-Plug\0" /* 1 refs @ 24746 */ - "IIO\0" /* 17 refs @ 24755 */ - "APIC\0" /* 9 refs @ 24759 */ - "Home\0" /* 10 refs @ 24764 */ - "Agent\0" /* 29 refs @ 24769 */ - "Performance\0" /* 5 refs @ 24775 */ - "Monitor\0" /* 6 refs @ 24787 */ - "QPI\0" /* 50 refs @ 24795 */ - "IMC\0" /* 130 refs @ 24799 */ - "Reut\0" /* 8 refs @ 24803 */ - "TA\0" /* 1 refs @ 24808 */ - "TAD\0" /* 4 refs @ 24811 */ - "Error\0" /* 14 refs @ 24815 */ - "DDRIO\0" /* 35 refs @ 24821 */ - "0,1,2,3\0" /* 2 refs @ 24827 */ - "Multicast\0" /* 10 refs @ 24835 */ - "0,1\0" /* 2 refs @ 24845 */ - "PCU\0" /* 39 refs @ 24849 */ - "SAD\0" /* 3 refs @ 24853 */ - "Broadcast\0" /* 16 refs @ 24857 */ - "Unicast\0" /* 40 refs @ 24867 */ - "Bay\0" /* 37 refs @ 24875 */ - "Trail\0" /* 37 refs @ 24879 */ - "Transaction\0" /* 42 refs @ 24885 */ - "Router\0" /* 42 refs @ 24897 */ - "(DMA)\0" /* 3 refs @ 24904 */ - "(PWM)\0" /* 2 refs @ 24910 */ - "(HSUART)\0" /* 2 refs @ 24916 */ - "(SPI)\0" /* 1 refs @ 24925 */ - "Storage\0" /* 6 refs @ 24931 */ - "Cluster(eMMC)\0" /* 1 refs @ 24939 */ - "Cluster(SDIO)\0" /* 1 refs @ 24953 */ - "Cluster(SD)\0" /* 1 refs @ 24967 */ - "Trusted\0" /* 1 refs @ 24979 */ - "Execution\0" /* 1 refs @ 24987 */ - "Engine\0" /* 7 refs @ 24997 */ - "Camera\0" /* 3 refs @ 25004 */ - "Signal\0" /* 1 refs @ 25011 */ - "(I2C)\0" /* 7 refs @ 25018 */ - "Cluster(eMMC\0" /* 1 refs @ 25024 */ - "4.5)\0" /* 1 refs @ 25037 */ - "i82542\0" /* 1 refs @ 25042 */ - "i82453GC\0" /* 1 refs @ 25049 */ - "1000baseX\0" /* 9 refs @ 25058 */ - "i82543GC\0" /* 1 refs @ 25068 */ - "i82544EI\0" /* 2 refs @ 25077 */ - "i82544GC\0" /* 2 refs @ 25086 */ - "(LOM)\0" /* 5 refs @ 25095 */ - "i82540EM\0" /* 2 refs @ 25101 */ - "i82545EM\0" /* 2 refs @ 25110 */ - "i82546EB\0" /* 3 refs @ 25119 */ - "i82541EI\0" /* 2 refs @ 25128 */ - "i82541ER\0" /* 2 refs @ 25137 */ - "i82540EP\0" /* 3 refs @ 25146 */ - "i82547EI\0" /* 2 refs @ 25155 */ - "V710\0" /* 1 refs @ 25164 */ - "5000BaseT\0" /* 1 refs @ 25169 */ - "i82545GM\0" /* 3 refs @ 25179 */ - "(SERDES)\0" /* 15 refs @ 25188 */ - "PRO/100\0" /* 31 refs @ 25197 */ - "InBusiness\0" /* 1 refs @ 25205 */ - "VE\0" /* 12 refs @ 25216 */ - "VM\0" /* 17 refs @ 25219 */ - "82562EH\0" /* 3 refs @ 25222 */ - "82562ET/EZ\0" /* 3 refs @ 25230 */ - "PHY\0" /* 6 refs @ 25241 */ - "(CNR)\0" /* 2 refs @ 25245 */ - "82562EM/EX\0" /* 2 refs @ 25251 */ - "(MOB)\0" /* 2 refs @ 25262 */ - "PRO/Wireless\0" /* 7 refs @ 25268 */ - "3B\0" /* 1 refs @ 25281 */ - "PRO/10GbE\0" /* 2 refs @ 25284 */ - "LR\0" /* 2 refs @ 25294 */ - "i82801H\0" /* 7 refs @ 25297 */ - "(M_AMT)\0" /* 1 refs @ 25305 */ - "(AMT)\0" /* 3 refs @ 25313 */ - "(IFE)\0" /* 1 refs @ 25319 */ - "X710-TM4\0" /* 3 refs @ 25325 */ - "SFP+\0" /* 7 refs @ 25334 */ - "Backplane\0" /* 11 refs @ 25339 */ - "82801EB/ER\0" /* 10 refs @ 25349 */ - "i82571EB\0" /* 7 refs @ 25360 */ - "82801FB\0" /* 4 refs @ 25369 */ - "82801GB\0" /* 1 refs @ 25377 */ - "i82547GI\0" /* 1 refs @ 25385 */ - "i82541GI\0" /* 2 refs @ 25394 */ - "i82546GB\0" /* 5 refs @ 25403 */ - "i82541PI\0" /* 1 refs @ 25412 */ - "i82572EI\0" /* 4 refs @ 25421 */ - "PRO/1000MT\0" /* 1 refs @ 25430 */ - "(82546GB)\0" /* 1 refs @ 25441 */ - "i82573E\0" /* 2 refs @ 25451 */ - "82562G\0" /* 1 refs @ 25459 */ - "i80003\0" /* 5 refs @ 25466 */ - "i82573L\0" /* 1 refs @ 25473 */ - "82597EX\0" /* 1 refs @ 25481 */ - "CX4\0" /* 3 refs @ 25489 */ - "Fiber\0" /* 2 refs @ 25493 */ - "i82575EB\0" /* 2 refs @ 25499 */ - "dual-1000baseT\0" /* 1 refs @ 25508 */ - "dual-1000baseX\0" /* 1 refs @ 25523 */ - "(KSP3)\0" /* 1 refs @ 25538 */ - "82598\0" /* 9 refs @ 25545 */ - "10G\0" /* 18 refs @ 25551 */ - "i82571GB\0" /* 1 refs @ 25555 */ - "82801I\0" /* 34 refs @ 25564 */ - "(G)\0" /* 2 refs @ 25571 */ - "(GT)\0" /* 2 refs @ 25575 */ - "IFE\0" /* 2 refs @ 25580 */ - "82576\0" /* 10 refs @ 25584 */ - "1000BaseT\0" /* 6 refs @ 25590 */ - "i82801I\0" /* 1 refs @ 25600 */ - "(MV)\0" /* 1 refs @ 25608 */ - "i82567LM-2\0" /* 1 refs @ 25613 */ - "i82567LF-2\0" /* 1 refs @ 25624 */ - "i82567V-2\0" /* 1 refs @ 25635 */ - "i82574L\0" /* 1 refs @ 25645 */ - "i82571PT\0" /* 1 refs @ 25653 */ - "quad-1000baseT\0" /* 2 refs @ 25662 */ - "i82575GB\0" /* 2 refs @ 25677 */ - "dual\0" /* 1 refs @ 25686 */ - "giabit\0" /* 2 refs @ 25691 */ - "qual\0" /* 1 refs @ 25698 */ - "82598EB\0" /* 3 refs @ 25703 */ - "i82567LM-3\0" /* 1 refs @ 25711 */ - "i82567LF-3\0" /* 1 refs @ 25722 */ - "SR\0" /* 2 refs @ 25733 */ - "Quad-1000baseT\0" /* 1 refs @ 25736 */ - "(PM)\0" /* 1 refs @ 25751 */ - "i82567LM-4\0" /* 1 refs @ 25756 */ - "1000BaseX\0" /* 2 refs @ 25767 */ - "gigabit\0" /* 4 refs @ 25777 */ - "quad-1000BaseT\0" /* 2 refs @ 25785 */ - "PCH\0" /* 103 refs @ 25800 */ - "(82577LM)\0" /* 1 refs @ 25804 */ - "(82577LC)\0" /* 1 refs @ 25814 */ - "82599\0" /* 18 refs @ 25824 */ - "(82578DM)\0" /* 1 refs @ 25830 */ - "(82578DC)\0" /* 1 refs @ 25840 */ - "DA\0" /* 1 refs @ 25850 */ - "XF\0" /* 1 refs @ 25853 */ - "82574L\0" /* 1 refs @ 25856 */ - "(KX/KX4)\0" /* 1 refs @ 25863 */ - "GbE\0" /* 18 refs @ 25872 */ - "(combined\0" /* 1 refs @ 25876 */ - "backplane;\0" /* 1 refs @ 25886 */ - "KR/KX4/KX)\0" /* 1 refs @ 25897 */ - "(CX4)\0" /* 1 refs @ 25908 */ - "(SFI/SFP+)\0" /* 1 refs @ 25914 */ - "(XAUI/BX4)\0" /* 1 refs @ 25925 */ - "82552\0" /* 1 refs @ 25936 */ - "82815\0" /* 10 refs @ 25942 */ - "82806AA\0" /* 1 refs @ 25948 */ - "PCI64\0" /* 1 refs @ 25956 */ - "Programmable\0" /* 2 refs @ 25962 */ - "ADI\0" /* 1 refs @ 25975 */ - "i80200\0" /* 1 refs @ 25979 */ - "Big\0" /* 1 refs @ 25986 */ - "Endian\0" /* 1 refs @ 25990 */ - "IXP1200\0" /* 1 refs @ 25997 */ - "82559ER\0" /* 1 refs @ 26005 */ - "82092AA\0" /* 1 refs @ 26013 */ - "SAA7116\0" /* 1 refs @ 26021 */ - "82452KX/GX\0" /* 1 refs @ 26029 */ - "Orion\0" /* 1 refs @ 26040 */ - "Extended\0" /* 2 refs @ 26046 */ - "82596\0" /* 1 refs @ 26055 */ - "EE\0" /* 2 refs @ 26061 */ - "8255x\0" /* 1 refs @ 26064 */ - "82437FX\0" /* 1 refs @ 26070 */ - "(TSC)\0" /* 1 refs @ 26078 */ - "82371FB\0" /* 2 refs @ 26084 */ - "(PIIX)\0" /* 2 refs @ 26092 */ - "82371MX\0" /* 1 refs @ 26099 */ - "(MPIIX)\0" /* 1 refs @ 26107 */ - "Xcelerator\0" /* 1 refs @ 26115 */ - "82437MX\0" /* 1 refs @ 26126 */ - "(MTSC)\0" /* 1 refs @ 26134 */ - "82441FX\0" /* 1 refs @ 26141 */ - "(PMC)\0" /* 1 refs @ 26149 */ - "82380AB\0" /* 1 refs @ 26155 */ - "(MISA)\0" /* 1 refs @ 26163 */ - "82380FB\0" /* 1 refs @ 26170 */ - "(MPCI2)\0" /* 1 refs @ 26178 */ - "82439HX\0" /* 1 refs @ 26186 */ - "(TXC)\0" /* 1 refs @ 26194 */ - "I226-LM\0" /* 1 refs @ 26200 */ - "I226-V\0" /* 1 refs @ 26208 */ - "I226-IT\0" /* 1 refs @ 26215 */ - "I221-V\0" /* 1 refs @ 26223 */ - "I226\0" /* 1 refs @ 26230 */ - "(blankNVM)\0" /* 2 refs @ 26235 */ - "C3000\0" /* 81 refs @ 26246 */ - "X553\0" /* 15 refs @ 26252 */ - "1G\0" /* 3 refs @ 26257 */ - "82870P2\0" /* 3 refs @ 26260 */ - "P64H2\0" /* 3 refs @ 26268 */ - "Hot\0" /* 3 refs @ 26274 */ - "Plug\0" /* 3 refs @ 26278 */ - "i82567V-3\0" /* 1 refs @ 26283 */ - "82579LM\0" /* 1 refs @ 26293 */ - "82579V\0" /* 1 refs @ 26301 */ - "BX\0" /* 1 refs @ 26308 */ - "AT2\0" /* 1 refs @ 26311 */ - "i82583V\0" /* 1 refs @ 26315 */ - "quad-gigabit\0" /* 1 refs @ 26323 */ - "82580\0" /* 8 refs @ 26336 */ - "(SGMII)\0" /* 3 refs @ 26342 */ - "KX4\0" /* 2 refs @ 26350 */ - "Mezzanine\0" /* 1 refs @ 26354 */ - "X540\0" /* 4 refs @ 26364 */ - "dual-1000BaseT\0" /* 2 refs @ 26369 */ - "KR\0" /* 2 refs @ 26384 */ - "I350\0" /* 7 refs @ 26387 */ - "82567V\0" /* 1 refs @ 26392 */ - "quad-1000BaseX\0" /* 1 refs @ 26399 */ - "X540-AT2\0" /* 1 refs @ 26414 */ - "10Gbase-T\0" /* 1 refs @ 26423 */ - "FCoE\0" /* 2 refs @ 26433 */ - "I210-T1\0" /* 1 refs @ 26438 */ - "I210\0" /* 8 refs @ 26446 */ - "(COPPER\0" /* 2 refs @ 26451 */ - "OEM)\0" /* 1 refs @ 26459 */ - "IT)\0" /* 1 refs @ 26464 */ - "(FIBER)\0" /* 1 refs @ 26468 */ - "I211\0" /* 1 refs @ 26476 */ - "(COPPER)\0" /* 2 refs @ 26481 */ - "I217-LM\0" /* 1 refs @ 26490 */ - "I217-V\0" /* 1 refs @ 26498 */ - "XL710\0" /* 11 refs @ 26505 */ - "(SFP+)\0" /* 1 refs @ 26511 */ - "X520\0" /* 1 refs @ 26518 */ - "QSFP+\0" /* 5 refs @ 26523 */ - "I218-V\0" /* 3 refs @ 26529 */ - "I218-LM\0" /* 3 refs @ 26536 */ - "Bypass\0" /* 2 refs @ 26544 */ - "(SFI)\0" /* 2 refs @ 26551 */ - "KX\0" /* 1 refs @ 26557 */ - "40GbE\0" /* 4 refs @ 26560 */ - "(KX)\0" /* 2 refs @ 26566 */ - "X710\0" /* 1 refs @ 26571 */ - "10GBASE-T\0" /* 5 refs @ 26576 */ - "20GbE\0" /* 2 refs @ 26586 */ - "X710-T4\0" /* 1 refs @ 26592 */ - "10GbaseT\0" /* 2 refs @ 26600 */ - "XXV710\0" /* 2 refs @ 26609 */ - "25GbE\0" /* 2 refs @ 26616 */ - "SFP28\0" /* 1 refs @ 26622 */ - "X552\0" /* 7 refs @ 26628 */ - "(Hyper-V)\0" /* 2 refs @ 26633 */ - "X557-AT2\0" /* 1 refs @ 26643 */ - "1000Base-T\0" /* 1 refs @ 26652 */ - "XFI\0" /* 1 refs @ 26663 */ - "(2)\0" /* 2 refs @ 26667 */ - "(3)\0" /* 1 refs @ 26671 */ - "(7)\0" /* 2 refs @ 26675 */ - "(6)\0" /* 2 refs @ 26679 */ - "(KR/KX\0" /* 1 refs @ 26683 */ - "SKU)\0" /* 8 refs @ 26690 */ - "(KX\0" /* 1 refs @ 26695 */ - "2.5G)\0" /* 3 refs @ 26699 */ - "1GbE\0" /* 4 refs @ 26705 */ - "(10G\0" /* 2 refs @ 26710 */ - "(non-10G\0" /* 2 refs @ 26715 */ - "(X557)\0" /* 1 refs @ 26724 */ - "QSFP\0" /* 3 refs @ 26731 */ - "(KR)\0" /* 1 refs @ 26736 */ - "(5)\0" /* 2 refs @ 26741 */ - "(4)\0" /* 2 refs @ 26745 */ - "(8)\0" /* 2 refs @ 26749 */ - "(9)\0" /* 2 refs @ 26753 */ - "I225\0" /* 3 refs @ 26757 */ - "LM\0" /* 3 refs @ 26762 */ - "V\0" /* 2 refs @ 26765 */ - "I220-V\0" /* 1 refs @ 26767 */ - "(15)\0" /* 2 refs @ 26774 */ - "I225-I\0" /* 1 refs @ 26779 */ - "(14)\0" /* 2 refs @ 26786 */ - "(13)\0" /* 2 refs @ 26791 */ - "5G\0" /* 37 refs @ 26796 */ - "5500\0" /* 25 refs @ 26799 */ - "6000\0" /* 10 refs @ 26804 */ - "6100\0" /* 3 refs @ 26809 */ - "E882-C\0" /* 4 refs @ 26814 */ - "E882-C/X557-AT\0" /* 1 refs @ 26821 */ - "E882-X\0" /* 1 refs @ 26836 */ - "(for\0" /* 6 refs @ 26843 */ - "BMSM)\0" /* 1 refs @ 26848 */ - "E882-L\0" /* 3 refs @ 26854 */ - "E882-L/X557-AT\0" /* 1 refs @ 26861 */ - "QAT\0" /* 13 refs @ 26876 */ - "Cluster\0" /* 16 refs @ 26880 */ - "2,\0" /* 6 refs @ 26888 */ - "RP\0" /* 104 refs @ 26891 */ - "0,\0" /* 8 refs @ 26894 */ - "VRP\0" /* 2 refs @ 26897 */ - "NIS\0" /* 1 refs @ 26901 */ - "ME\0" /* 20 refs @ 26905 */ - "HSUART\0" /* 1 refs @ 26908 */ - "LPC/eSPI\0" /* 5 refs @ 26915 */ - "iRC\0" /* 1 refs @ 26924 */ - "PMC/SRAM\0" /* 1 refs @ 26928 */ - "1.7\0" /* 1 refs @ 26937 */ - "6G\0" /* 13 refs @ 26941 */ - "(H,\0" /* 7 refs @ 26944 */ - "Core)\0" /* 5 refs @ 26948 */ - "510\0" /* 3 refs @ 26954 */ - "(U)\0" /* 6 refs @ 26958 */ - "(Y)\0" /* 2 refs @ 26962 */ - "(S,\0" /* 12 refs @ 26966 */ - "Gaussian\0" /* 2 refs @ 26970 */ - "Mixture\0" /* 2 refs @ 26979 */ - "Model\0" /* 3 refs @ 26987 */ - "530\0" /* 5 refs @ 26993 */ - "(H/S,\0" /* 1 refs @ 26997 */ - "Unit\0" /* 17 refs @ 27003 */ - "515\0" /* 1 refs @ 27008 */ - "(GT3e)\0" /* 2 refs @ 27012 */ - "62xx\0" /* 2 refs @ 27019 */ - "(GT4)\0" /* 4 refs @ 27024 */ - "ROB-in\0" /* 1 refs @ 27030 */ - "i960RP\0" /* 1 refs @ 27037 */ - "Microprocessor\0" /* 1 refs @ 27044 */ - "GLREG\0" /* 1 refs @ 27059 */ - "2.0/3.0\0" /* 1 refs @ 27065 */ - "Combo\0" /* 1 refs @ 27073 */ - "HS\0" /* 1 refs @ 27079 */ - "IE\0" /* 14 refs @ 27082 */ - "(17)\0" /* 2 refs @ 27085 */ - "(16)\0" /* 2 refs @ 27090 */ - "82840\0" /* 3 refs @ 27095 */ - "82845\0" /* 2 refs @ 27101 */ - "DMI-PCI\0" /* 1 refs @ 27107 */ - "Z68\0" /* 1 refs @ 27115 */ - "P67\0" /* 1 refs @ 27119 */ - "UM67\0" /* 1 refs @ 27123 */ - "HM65\0" /* 1 refs @ 27128 */ - "H67\0" /* 1 refs @ 27133 */ - "HM67\0" /* 1 refs @ 27137 */ - "Q65\0" /* 1 refs @ 27142 */ - "QS67\0" /* 1 refs @ 27146 */ - "Q67\0" /* 1 refs @ 27151 */ - "QM67\0" /* 1 refs @ 27155 */ - "B65\0" /* 1 refs @ 27160 */ - "C202\0" /* 1 refs @ 27164 */ - "C204\0" /* 1 refs @ 27169 */ - "C206\0" /* 1 refs @ 27174 */ - "H61\0" /* 1 refs @ 27179 */ - "C600/X79\0" /* 15 refs @ 27183 */ - "Premium\0" /* 6 refs @ 27192 */ - "C600\0" /* 26 refs @ 27200 */ - "(SATA)\0" /* 4 refs @ 27205 */ - "C606/C608\0" /* 1 refs @ 27212 */ - "C608\0" /* 1 refs @ 27222 */ - "Z77\0" /* 1 refs @ 27227 */ - "Z75\0" /* 1 refs @ 27231 */ - "Q77\0" /* 1 refs @ 27235 */ - "Q75\0" /* 1 refs @ 27239 */ - "B75\0" /* 1 refs @ 27243 */ - "H77\0" /* 1 refs @ 27247 */ - "C216\0" /* 1 refs @ 27251 */ - "QM77\0" /* 1 refs @ 27256 */ - "QS77\0" /* 1 refs @ 27261 */ - "HM77\0" /* 1 refs @ 27266 */ - "UM77\0" /* 1 refs @ 27271 */ - "HM76\0" /* 1 refs @ 27276 */ - "HM75\0" /* 1 refs @ 27281 */ - "HM70\0" /* 1 refs @ 27286 */ - "NM70\0" /* 1 refs @ 27291 */ - "C2000\0" /* 37 refs @ 27296 */ - "IQIA\0" /* 2 refs @ 27302 */ - "Physical\0" /* 8 refs @ 27307 */ - "SATA2\0" /* 1 refs @ 27316 */ - "SATA3\0" /* 1 refs @ 27322 */ - "Ethernet(1000BASE-KX)\0" /* 1 refs @ 27328 */ - "Ethernet(SGMII)\0" /* 1 refs @ 27350 */ - "Ethernet(Dummy\0" /* 1 refs @ 27366 */ - "function)\0" /* 1 refs @ 27381 */ - "Ethernet(2.5Gbe)\0" /* 1 refs @ 27391 */ - "Scalable\0" /* 55 refs @ 27408 */ - "Ubox\0" /* 6 refs @ 27417 */ - "M2PCI\0" /* 1 refs @ 27422 */ - "CBDMA\0" /* 1 refs @ 27428 */ - "MM/Vt-d\0" /* 1 refs @ 27434 */ - "VT-d\0" /* 1 refs @ 27442 */ - "LMS\0" /* 2 refs @ 27447 */ - "LMDP\0" /* 2 refs @ 27451 */ - "DECS\0" /* 1 refs @ 27456 */ - "M3KTI\0" /* 3 refs @ 27461 */ - "CHA\0" /* 6 refs @ 27467 */ - "UPI\0" /* 1 refs @ 27471 */ - "M2PCIe\0" /* 1 refs @ 27475 */ - "Braswell\0" /* 28 refs @ 27482 */ - "Soc\0" /* 1 refs @ 27491 */ - "SIO\0" /* 23 refs @ 27495 */ - "Z8000\0" /* 7 refs @ 27499 */ - "LPIO1\0" /* 5 refs @ 27505 */ - "PWM1\0" /* 1 refs @ 27511 */ - "PWM2\0" /* 1 refs @ 27516 */ - "SPI1\0" /* 1 refs @ 27521 */ - "SPI2\0" /* 1 refs @ 27526 */ - "MMC\0" /* 1 refs @ 27531 */ - "SDIO\0" /* 6 refs @ 27535 */ - "TXE\0" /* 5 refs @ 27540 */ - "SPI3\0" /* 1 refs @ 27544 */ - "(OTG)\0" /* 6 refs @ 27549 */ - "ISP\0" /* 1 refs @ 27555 */ - "IOSF2OCP\0" /* 1 refs @ 27559 */ - "Subsystem\0" /* 4 refs @ 27568 */ - "82801AA\0" /* 7 refs @ 27578 */ - "AC-97\0" /* 17 refs @ 27586 */ - "Hub-PCI\0" /* 5 refs @ 27592 */ - "82801AB\0" /* 7 refs @ 27600 */ - "82801BA\0" /* 9 refs @ 27608 */ - "82801BAM\0" /* 3 refs @ 27616 */ - "82801E\0" /* 4 refs @ 27625 */ - "82801CA\0" /* 9 refs @ 27632 */ - "82801CAM\0" /* 1 refs @ 27640 */ - "82801DB\0" /* 10 refs @ 27649 */ - "UHCI\0" /* 46 refs @ 27657 */ - "82801DBM\0" /* 1 refs @ 27662 */ - "(UltraATA/100)\0" /* 1 refs @ 27671 */ - "82801EB\0" /* 3 refs @ 27686 */ - "82801ER\0" /* 1 refs @ 27694 */ - "8260\0" /* 2 refs @ 27702 */ - "4165\0" /* 2 refs @ 27707 */ - "3168\0" /* 1 refs @ 27712 */ - "8265\0" /* 1 refs @ 27717 */ - "82820\0" /* 2 refs @ 27722 */ - "MCH\0" /* 16 refs @ 27728 */ - "(Camino)\0" /* 1 refs @ 27732 */ - "9260\0" /* 1 refs @ 27741 */ - "82850\0" /* 1 refs @ 27746 */ - "82860\0" /* 5 refs @ 27752 */ - "82850/82860\0" /* 1 refs @ 27758 */ - "E7500\0" /* 8 refs @ 27770 */ - "HI_B\0" /* 4 refs @ 27776 */ - "vppb\0" /* 6 refs @ 27781 */ - "HI_C\0" /* 2 refs @ 27786 */ - "HI_D\0" /* 2 refs @ 27791 */ - "E7501\0" /* 1 refs @ 27796 */ - "E7505\0" /* 5 refs @ 27802 */ - "Host-AGP\0" /* 5 refs @ 27808 */ - "Reporting\0" /* 5 refs @ 27817 */ - "82845G/GL\0" /* 3 refs @ 27827 */ - "Host-Hub\0" /* 2 refs @ 27837 */ - "I/F\0" /* 2 refs @ 27846 */ - "82865\0" /* 2 refs @ 27850 */ - "82865G\0" /* 1 refs @ 27856 */ - "82875P\0" /* 3 refs @ 27863 */ - "PCI-CSA\0" /* 1 refs @ 27870 */ - "82915P/G/GL\0" /* 2 refs @ 27878 */ - "82915G/GL\0" /* 2 refs @ 27890 */ - "82925X\0" /* 2 refs @ 27900 */ - "E7221\0" /* 2 refs @ 27907 */ - "82915PM/GM/GMS,82910GML\0" /* 1 refs @ 27913 */ - "82915PM/GM\0" /* 1 refs @ 27937 */ - "82915GM/GMS,82910GML\0" /* 1 refs @ 27948 */ - "6300ESB\0" /* 13 refs @ 27969 */ - "5000X\0" /* 2 refs @ 27977 */ - "5000Z\0" /* 1 refs @ 27983 */ - "ESI\0" /* 5 refs @ 27989 */ - "5000V\0" /* 1 refs @ 27993 */ - "5000P\0" /* 1 refs @ 27999 */ - "FSB\0" /* 1 refs @ 28005 */ - "Registers\0" /* 65 refs @ 28009 */ - "FBD\0" /* 2 refs @ 28019 */ - "2-3\0" /* 7 refs @ 28023 */ - "4-5\0" /* 1 refs @ 28027 */ - "6-7\0" /* 1 refs @ 28031 */ - "4-7\0" /* 1 refs @ 28035 */ - "82801FBM\0" /* 2 refs @ 28039 */ - "ICH6M\0" /* 1 refs @ 28048 */ - "82801FR\0" /* 1 refs @ 28054 */ - "82801FB/FR\0" /* 13 refs @ 28062 */ - "#2\0" /* 11 refs @ 28073 */ - "High\0" /* 25 refs @ 28076 */ - "Definition\0" /* 25 refs @ 28081 */ - "63xxESB\0" /* 21 refs @ 28092 */ - "#3\0" /* 8 refs @ 28100 */ - "#4\0" /* 7 refs @ 28103 */ - "DLB\0" /* 1 refs @ 28106 */ - "1.0\0" /* 1 refs @ 28110 */ - "82945G/P\0" /* 3 refs @ 28114 */ - "82955X\0" /* 2 refs @ 28123 */ - "E7230\0" /* 2 refs @ 28130 */ - "82975X\0" /* 3 refs @ 28136 */ - "IGD\0" /* 2 refs @ 28143 */ - "82915GM/GMS\0" /* 1 refs @ 28147 */ - "82945GM/PM/GMS\0" /* 3 refs @ 28159 */ - "82945GME\0" /* 2 refs @ 28174 */ - "82801GH\0" /* 1 refs @ 28183 */ - "82801GB/GR\0" /* 21 refs @ 28191 */ - "82801GBM\0" /* 2 refs @ 28202 */ - "NM10\0" /* 1 refs @ 28211 */ - "82801GHM\0" /* 2 refs @ 28216 */ - "82801GBM/GHM\0" /* 1 refs @ 28225 */ - "#5\0" /* 4 refs @ 28238 */ - "#6\0" /* 3 refs @ 28241 */ - "82801H\0" /* 22 refs @ 28244 */ - "82801HEM\0" /* 2 refs @ 28251 */ - "82801HH\0" /* 1 refs @ 28260 */ - "82801HO\0" /* 1 refs @ 28268 */ - "82801HBM\0" /* 3 refs @ 28276 */ - "ports\0" /* 10 refs @ 28285 */ - "82801H/C6[12]x/X99/Z170/[ZQH]270\0" /* 1 refs @ 28291 */ - "C62x\0" /* 1 refs @ 28324 */ - "sSATA\0" /* 10 refs @ 28329 */ - "C6[12]x/X99/[ZQH]270\0" /* 1 refs @ 28335 */ - "C6[12]x/X99\0" /* 1 refs @ 28356 */ - "VMD\0" /* 1 refs @ 28368 */ - "82801IH\0" /* 1 refs @ 28372 */ - "82801IO\0" /* 1 refs @ 28380 */ - "82801IR\0" /* 1 refs @ 28388 */ - "82801IEM\0" /* 1 refs @ 28396 */ - "82801IB\0" /* 1 refs @ 28405 */ - "82801IM\0" /* 1 refs @ 28413 */ - "(C)\0" /* 1 refs @ 28421 */ - "82946GZ\0" /* 3 refs @ 28425 */ - "82G35\0" /* 6 refs @ 28433 */ - "82965\0" /* 1 refs @ 28439 */ - "82965Q\0" /* 5 refs @ 28445 */ - "82Q965\0" /* 3 refs @ 28452 */ - "82965G\0" /* 4 refs @ 28459 */ - "82P965/G965\0" /* 1 refs @ 28466 */ - "82Q35\0" /* 9 refs @ 28478 */ - "82G33/P35\0" /* 1 refs @ 28484 */ - "82G33\0" /* 3 refs @ 28494 */ - "82G33/G31/P35/P31\0" /* 1 refs @ 28500 */ - "82Q33\0" /* 1 refs @ 28518 */ - "82X38\0" /* 5 refs @ 28524 */ - "Host-Primary\0" /* 1 refs @ 28530 */ - "Host-Secondary\0" /* 1 refs @ 28543 */ - "3200/3210\0" /* 2 refs @ 28558 */ - "82965PM\0" /* 7 refs @ 28568 */ - "80862A01\0" /* 1 refs @ 28576 */ - "IDER\0" /* 13 refs @ 28585 */ - "82965PM/GM\0" /* 1 refs @ 28590 */ - "82965GME\0" /* 7 refs @ 28601 */ - "82GM45\0" /* 8 refs @ 28610 */ - "QuickPath\0" /* 15 refs @ 28617 */ - "Mirror\0" /* 4 refs @ 28627 */ - "Test\0" /* 3 refs @ 28634 */ - "Rank\0" /* 8 refs @ 28639 */ - "Non-Core\0" /* 5 refs @ 28644 */ - "Register\0" /* 6 refs @ 28653 */ - "i7-800\0" /* 15 refs @ 28662 */ - "i5-700\0" /* 15 refs @ 28669 */ - "i5-600,\0" /* 6 refs @ 28676 */ - "i3-500\0" /* 6 refs @ 28684 */ - "Pentium\0" /* 6 refs @ 28691 */ - "82IGD_E\0" /* 3 refs @ 28699 */ - "82Q45\0" /* 10 refs @ 28707 */ - "82G45\0" /* 2 refs @ 28713 */ - "82G41\0" /* 2 refs @ 28719 */ - "82B43\0" /* 2 refs @ 28725 */ - "Mode\0" /* 1 refs @ 28731 */ - "v3/Core\0" /* 49 refs @ 28736 */ - "i7-6xxxK\0" /* 9 refs @ 28744 */ - "Scratchpad\0" /* 5 refs @ 28753 */ - "Semaphores\0" /* 3 refs @ 28764 */ - "QDT\0" /* 8 refs @ 28775 */ - "Map,\0" /* 2 refs @ 28779 */ - "VTd,\0" /* 1 refs @ 28784 */ - "SMM\0" /* 1 refs @ 28789 */ - "RAS,\0" /* 2 refs @ 28793 */ - "CS,\0" /* 1 refs @ 28798 */ - "Errors\0" /* 2 refs @ 28802 */ - "Monitoring\0" /* 3 refs @ 28809 */ - "E7\0" /* 52 refs @ 28820 */ - "v4\0" /* 8 refs @ 28823 */ - "v3/Xeon\0" /* 44 refs @ 28826 */ - "i7\0" /* 45 refs @ 28834 */ - "Address,\0" /* 4 refs @ 28837 */ - "Ch\0" /* 24 refs @ 28846 */ - "0-1\0" /* 12 refs @ 28849 */ - "Decode\0" /* 6 refs @ 28853 */ - "0-3\0" /* 6 refs @ 28860 */ - "2/3\0" /* 1 refs @ 28864 */ - "Ras\0" /* 1 refs @ 28868 */ - "VCU\0" /* 2 refs @ 28872 */ - "0/1\0" /* 5 refs @ 28876 */ - "Buffered\0" /* 4 refs @ 28880 */ - "I225-K\0" /* 1 refs @ 28889 */ - "I225-K2\0" /* 1 refs @ 28896 */ - "I226-K\0" /* 1 refs @ 28904 */ - "3165\0" /* 2 refs @ 28911 */ - "UHD\0" /* 39 refs @ 28916 */ - "605\0" /* 2 refs @ 28920 */ - "Gemini\0" /* 35 refs @ 28924 */ - "DPTF\0" /* 5 refs @ 28931 */ - "GNA\0" /* 2 refs @ 28936 */ - "SideBand\0" /* 2 refs @ 28940 */ - "(xHCI)\0" /* 8 refs @ 28949 */ - "(xDCI)\0" /* 6 refs @ 28956 */ - "x2\0" /* 2 refs @ 28963 */ - "31244\0" /* 1 refs @ 28966 */ - "82855PM\0" /* 3 refs @ 28972 */ - "(Max\0" /* 4 refs @ 28980 */ - "x16)\0" /* 1 refs @ 28985 */ - "x4)\0" /* 2 refs @ 28990 */ - "x8)\0" /* 1 refs @ 28994 */ - "5500/X58\0" /* 2 refs @ 28998 */ - "DMI\0" /* 3 refs @ 29007 */ - "X58\0" /* 1 refs @ 29011 */ - "5520\0" /* 2 refs @ 29015 */ - "5520/5500/X58\0" /* 21 refs @ 29020 */ - "5520/X58\0" /* 1 refs @ 29034 */ - "Scratchpads\0" /* 1 refs @ 29043 */ - "Misc\0" /* 1 refs @ 29055 */ - "Throttling\0" /* 1 refs @ 29060 */ - "SPD\0" /* 1 refs @ 29071 */ - "Mesh\0" /* 1 refs @ 29075 */ - "Credit\0" /* 1 refs @ 29080 */ - "Mapping\0" /* 1 refs @ 29087 */ - "Rules\0" /* 2 refs @ 29095 */ - "RACU\0" /* 1 refs @ 29101 */ - "NCDECS\0" /* 1 refs @ 29106 */ - "Handling\0" /* 1 refs @ 29113 */ - "(CPU\0" /* 1 refs @ 29122 */ - "MMIO\0" /* 1 refs @ 29127 */ - "NCEVENTS\0" /* 1 refs @ 29132 */ - "495\0" /* 49 refs @ 29141 */ - "Y\0" /* 1 refs @ 29145 */ - "ISH\0" /* 5 refs @ 29147 */ - "Upstream\0" /* 2 refs @ 29151 */ - "Downstream\0" /* 4 refs @ 29160 */ - "82830MP\0" /* 4 refs @ 29171 */ - "82855GM\0" /* 5 refs @ 29179 */ - "GMCH\0" /* 3 refs @ 29187 */ - "Process\0" /* 1 refs @ 29192 */ - "E7525\0" /* 5 refs @ 29200 */ - "E7520\0" /* 5 refs @ 29206 */ - "A1\0" /* 2 refs @ 29212 */ - "X722\0" /* 10 refs @ 29215 */ - "A0\0" /* 3 refs @ 29220 */ - "C620\0" /* 99 refs @ 29223 */ - "Uplink\0" /* 2 refs @ 29228 */ - "(NPX16)\0" /* 1 refs @ 29235 */ - "(NPX8)\0" /* 1 refs @ 29243 */ - "LAN)\0" /* 1 refs @ 29250 */ - "Termal\0" /* 1 refs @ 29255 */ - "Sensor)\0" /* 1 refs @ 29262 */ - "LOM\0" /* 1 refs @ 29270 */ - "1GbaseT\0" /* 1 refs @ 29274 */ - "I\0" /* 1 refs @ 29282 */ - "82801JD\0" /* 23 refs @ 29284 */ - "82801JDO\0" /* 1 refs @ 29292 */ - "82801JIR\0" /* 1 refs @ 29301 */ - "82801JIB\0" /* 1 refs @ 29310 */ - "82801JI\0" /* 22 refs @ 29319 */ - "P55\0" /* 1 refs @ 29327 */ - "PM55\0" /* 1 refs @ 29331 */ - "H55\0" /* 1 refs @ 29336 */ - "QM57\0" /* 1 refs @ 29340 */ - "H57\0" /* 1 refs @ 29345 */ - "HM55\0" /* 1 refs @ 29349 */ - "Q57\0" /* 1 refs @ 29354 */ - "HM57\0" /* 1 refs @ 29358 */ - "QS57\0" /* 2 refs @ 29363 */ - "3420\0" /* 1 refs @ 29368 */ - "ECHI\0" /* 1 refs @ 29373 */ - "PT\0" /* 1 refs @ 29378 */ - "Primary(NTB/NTB)\0" /* 1 refs @ 29381 */ - "Primary(NTB/RP)\0" /* 1 refs @ 29398 */ - "QuickData\0" /* 14 refs @ 29414 */ - "5/6)\0" /* 2 refs @ 29424 */ - "IOO\0" /* 1 refs @ 29429 */ - "IRP\0" /* 1 refs @ 29433 */ - "Perfmon\0" /* 1 refs @ 29437 */ - "Channlel\0" /* 5 refs @ 29445 */ - "Scratch\0" /* 5 refs @ 29454 */ - "Desktop)\0" /* 2 refs @ 29462 */ - "(H)\0" /* 14 refs @ 29471 */ - "WS)\0" /* 3 refs @ 29475 */ - "8G\0" /* 9 refs @ 29479 */ - "(S)\0" /* 5 refs @ 29482 */ - "Halo)\0" /* 2 refs @ 29486 */ - "Server)\0" /* 3 refs @ 29492 */ - "610\0" /* 10 refs @ 29500 */ - "630\0" /* 11 refs @ 29504 */ - "P630\0" /* 7 refs @ 29508 */ - "620\0" /* 6 refs @ 29513 */ - "655\0" /* 3 refs @ 29517 */ - "645\0" /* 3 refs @ 29521 */ - "5400\0" /* 15 refs @ 29525 */ - "5400A\0" /* 1 refs @ 29530 */ - "5400B\0" /* 1 refs @ 29536 */ - "SNB\0" /* 1 refs @ 29542 */ - "FSB/Boot/Interrupt\0" /* 1 refs @ 29546 */ - "Coherency\0" /* 1 refs @ 29565 */ - "E600\0" /* 8 refs @ 29575 */ - "2200BG\0" /* 1 refs @ 29580 */ - "2225BG\0" /* 1 refs @ 29587 */ - "3945ABG\0" /* 2 refs @ 29594 */ - "2915ABG\0" /* 2 refs @ 29602 */ - "4965\0" /* 4 refs @ 29610 */ - "Ultimate-N\0" /* 2 refs @ 29615 */ - "6300\0" /* 2 refs @ 29626 */ - "6200\0" /* 3 refs @ 29631 */ - "5350\0" /* 2 refs @ 29636 */ - "5150\0" /* 2 refs @ 29641 */ - "Q570\0" /* 1 refs @ 29646 */ - "Z590\0" /* 1 refs @ 29651 */ - "H570\0" /* 1 refs @ 29656 */ - "B560\0" /* 1 refs @ 29661 */ - "H510\0" /* 1 refs @ 29666 */ - "W580\0" /* 1 refs @ 29671 */ - "PCH-H\0" /* 123 refs @ 29676 */ - "THC\0" /* 6 refs @ 29682 */ - "(AHCI,\0" /* 3 refs @ 29686 */ - "desktop)\0" /* 5 refs @ 29693 */ - "mobile)\0" /* 4 refs @ 29702 */ - "(RAID,\0" /* 6 refs @ 29710 */ - "2x2\0" /* 3 refs @ 29717 */ - "Elkhart\0" /* 120 refs @ 29721 */ - "(2C,\0" /* 1 refs @ 29729 */ - "(SKU\0" /* 25 refs @ 29734 */ - "8)\0" /* 1 refs @ 29739 */ - "12)\0" /* 1 refs @ 29742 */ - "3A)\0" /* 1 refs @ 29746 */ - "(4C,\0" /* 2 refs @ 29750 */ - "pre-QS)\0" /* 1 refs @ 29755 */ - "6)\0" /* 1 refs @ 29763 */ - "(Compute\0" /* 4 refs @ 29766 */ - "Die)\0" /* 4 refs @ 29775 */ - "7)\0" /* 1 refs @ 29780 */ - "9)\0" /* 1 refs @ 29783 */ - "10)\0" /* 1 refs @ 29786 */ - "11)\0" /* 1 refs @ 29790 */ - "1A)\0" /* 1 refs @ 29794 */ - "(8EU\0" /* 2 refs @ 29798 */ - "Super)\0" /* 4 refs @ 29803 */ - "(16EU\0" /* 1 refs @ 29810 */ - "(16EU)\0" /* 6 refs @ 29816 */ - "(32EU\0" /* 1 refs @ 29823 */ - "(32EU)\0" /* 8 refs @ 29829 */ - "Alder\0" /* 106 refs @ 29836 */ - "(U15,2+8)\0" /* 1 refs @ 29842 */ - "(U9,2+8)\0" /* 1 refs @ 29852 */ - "(U15,2+4)\0" /* 1 refs @ 29861 */ - "(U9,2+4)\0" /* 1 refs @ 29871 */ - "G5\0" /* 4 refs @ 29880 */ - "(x16)\0" /* 4 refs @ 29883 */ - "USB-C\0" /* 6 refs @ 29889 */ - "Refresh\0" /* 6 refs @ 29895 */ - "(S,2+0)\0" /* 1 refs @ 29903 */ - "Lake-N\0" /* 53 refs @ 29911 */ - "(0+8)\0" /* 1 refs @ 29918 */ - "(U15,1+4)\0" /* 1 refs @ 29924 */ - "(U9,1+4)\0" /* 1 refs @ 29934 */ - "(0+4,\0" /* 2 refs @ 29943 */ - "N200)\0" /* 1 refs @ 29949 */ - "N100)\0" /* 1 refs @ 29955 */ - "Tuning\0" /* 3 refs @ 29961 */ - "Thunderbolt\0" /* 20 refs @ 29968 */ - "(H,4+8)\0" /* 2 refs @ 29980 */ - "(HX,4+8)\0" /* 1 refs @ 29988 */ - "(H,4+4)\0" /* 2 refs @ 29997 */ - "(HX,4+4)\0" /* 1 refs @ 30005 */ - "(x8)\0" /* 4 refs @ 30014 */ - "(S,4+0)\0" /* 1 refs @ 30019 */ - "(HX,8+8)\0" /* 2 refs @ 30027 */ - "(HX,6+8)\0" /* 2 refs @ 30036 */ - "G4\0" /* 3 refs @ 30045 */ - "(x4)\0" /* 7 refs @ 30048 */ - "Raptor\0" /* 46 refs @ 30053 */ - "(S,6+8)\0" /* 2 refs @ 30060 */ - "(H,6+8)\0" /* 2 refs @ 30068 */ - "(HX,6+4)\0" /* 2 refs @ 30076 */ - "(S,6+4)\0" /* 2 refs @ 30085 */ - "(H,6+4)\0" /* 1 refs @ 30093 */ - "Gauss\0" /* 5 refs @ 30101 */ - "Newton\0" /* 5 refs @ 30107 */ - "Algorithm\0" /* 5 refs @ 30114 */ - "(S,6+0)\0" /* 1 refs @ 30124 */ - "(S,8+8)\0" /* 2 refs @ 30132 */ - "(S,8+4)\0" /* 1 refs @ 30140 */ - "Crash\0" /* 3 refs @ 30148 */ - "Log\0" /* 3 refs @ 30154 */ - "Telemetry\0" /* 3 refs @ 30158 */ - "Volume\0" /* 3 refs @ 30168 */ - "(24EU)\0" /* 5 refs @ 30175 */ - "(48EU)\0" /* 1 refs @ 30182 */ - "(FLASH\0" /* 1 refs @ 30189 */ - "TPM)\0" /* 1 refs @ 30196 */ - "(PCH)\0" /* 3 refs @ 30201 */ - "VC)\0" /* 7 refs @ 30207 */ - "1,\0" /* 1 refs @ 30211 */ - "3,\0" /* 1 refs @ 30214 */ - "Safety\0" /* 1 refs @ 30217 */ - "Island\0" /* 1 refs @ 30224 */ - "HPET\0" /* 1 refs @ 30231 */ - "CSE\0" /* 6 refs @ 30236 */ - "PTT\0" /* 1 refs @ 30240 */ - "UMA\0" /* 1 refs @ 30244 */ - "PSE\0" /* 39 refs @ 30248 */ - "QEP\0" /* 4 refs @ 30252 */ - "(RGMII\0" /* 2 refs @ 30256 */ - "1G)\0" /* 4 refs @ 30263 */ - "(SGMII\0" /* 4 refs @ 30267 */ - "LH2OSE\0" /* 1 refs @ 30274 */ - "PWM\0" /* 1 refs @ 30281 */ - "CAN\0" /* 4 refs @ 30285 */ - "Rocket\0" /* 12 refs @ 30289 */ - "(8Core)\0" /* 2 refs @ 30296 */ - "730\0" /* 3 refs @ 30304 */ - "(Xeon\0" /* 2 refs @ 30308 */ - "W)\0" /* 1 refs @ 30314 */ - "E)\0" /* 1 refs @ 30317 */ - "Jasper\0" /* 55 refs @ 30320 */ - "LPSS\0" /* 6 refs @ 30327 */ - "(Optane,\0" /* 1 refs @ 30332 */ - "EU\0" /* 3 refs @ 30341 */ - "EP80579\0" /* 24 refs @ 30344 */ - "EDMA\0" /* 1 refs @ 30352 */ - "ASU\0" /* 1 refs @ 30357 */ - "CANbus\0" /* 3 refs @ 30361 */ - "1588\0" /* 1 refs @ 30368 */ - "LEB\0" /* 1 refs @ 30373 */ - "GCU\0" /* 1 refs @ 30377 */ - "PCH-LP\0" /* 49 refs @ 30381 */ - "700\0" /* 61 refs @ 30388 */ - "PCH-P\0" /* 1 refs @ 30392 */ - "Wi-Fi\0" /* 1 refs @ 30398 */ - "AX211\0" /* 1 refs @ 30404 */ - "UFS\0" /* 2 refs @ 30410 */ - "80310\0" /* 1 refs @ 30414 */ - "ATU\0" /* 1 refs @ 30420 */ - "Touch\0" /* 2 refs @ 30424 */ - "I225-LMvP\0" /* 1 refs @ 30430 */ - "I226-LMvP\0" /* 1 refs @ 30440 */ - "(18)\0" /* 2 refs @ 30450 */ - "(19)\0" /* 2 refs @ 30455 */ - "(20)\0" /* 2 refs @ 30460 */ - "(21)\0" /* 2 refs @ 30465 */ - "Arc\0" /* 20 refs @ 30470 */ - "A770M\0" /* 1 refs @ 30474 */ - "A730M\0" /* 1 refs @ 30480 */ - "A550M\0" /* 1 refs @ 30486 */ - "A370M\0" /* 1 refs @ 30492 */ - "A350M\0" /* 1 refs @ 30498 */ - "A570M\0" /* 1 refs @ 30504 */ - "A530M\0" /* 1 refs @ 30510 */ - "A770\0" /* 1 refs @ 30516 */ - "A750\0" /* 1 refs @ 30521 */ - "A580\0" /* 1 refs @ 30526 */ - "A380\0" /* 1 refs @ 30531 */ - "A310\0" /* 1 refs @ 30536 */ - "A30M\0" /* 1 refs @ 30541 */ - "A40/A50\0" /* 1 refs @ 30546 */ - "A60M\0" /* 1 refs @ 30554 */ - "A60\0" /* 1 refs @ 30559 */ - "A810E\0" /* 1 refs @ 30563 */ - "A310E\0" /* 1 refs @ 30569 */ - "A370E\0" /* 1 refs @ 30575 */ - "A350E\0" /* 1 refs @ 30581 */ - "7G\0" /* 12 refs @ 30587 */ - "Mobile,\0" /* 2 refs @ 30590 */ - "Dual)\0" /* 2 refs @ 30598 */ - "Quad)\0" /* 2 refs @ 30604 */ - "7G,8G\0" /* 1 refs @ 30610 */ - "Workstation)\0" /* 1 refs @ 30616 */ - "(GT2,\0" /* 5 refs @ 30629 */ - "Mobile)\0" /* 1 refs @ 30635 */ - "615\0" /* 2 refs @ 30643 */ - "U)\0" /* 1 refs @ 30647 */ - "(GT3e,\0" /* 2 refs @ 30650 */ - "15W)\0" /* 1 refs @ 30657 */ - "650\0" /* 3 refs @ 30662 */ - "28W)\0" /* 1 refs @ 30666 */ - "Apollo\0" /* 44 refs @ 30671 */ - "(18EU)\0" /* 1 refs @ 30678 */ - "(12EU)\0" /* 1 refs @ 30685 */ - "Uint\0" /* 1 refs @ 30692 */ - "HECI1\0" /* 1 refs @ 30697 */ - "HECI2\0" /* 1 refs @ 30703 */ - "HECI3\0" /* 1 refs @ 30709 */ - "B0\0" /* 1 refs @ 30715 */ - "A2\0" /* 2 refs @ 30718 */ - "A3\0" /* 1 refs @ 30721 */ - "i7-6xxxK/Xeon-D\0" /* 32 refs @ 30724 */ - "(DMI2)\0" /* 1 refs @ 30740 */ - "Xeon-D\0" /* 64 refs @ 30747 */ - "(x8\0" /* 3 refs @ 30754 */ - "max)\0" /* 8 refs @ 30758 */ - "(x16,\0" /* 4 refs @ 30763 */ - "NTB-NTB\0" /* 1 refs @ 30769 */ - "NTB-RP\0" /* 1 refs @ 30777 */ - "NTB-secondary\0" /* 1 refs @ 30784 */ - "VTD_Misc,\0" /* 1 refs @ 30798 */ - "Status,\0" /* 1 refs @ 30808 */ - "Pmon\0" /* 1 refs @ 30816 */ - "(Target\0" /* 6 refs @ 30821 */ - "Thermal,\0" /* 2 refs @ 30829 */ - "RAS)\0" /* 2 refs @ 30838 */ - "Decoder)\0" /* 4 refs @ 30843 */ - "DDR\0" /* 11 refs @ 30852 */ - "Ch0/1\0" /* 1 refs @ 30856 */ - "(Thermal)\0" /* 2 refs @ 30862 */ - "(Error)\0" /* 2 refs @ 30872 */ - "Caching\0" /* 12 refs @ 30880 */ - "(Cbo\0" /* 11 refs @ 30888 */ - "Unicast)\0" /* 8 refs @ 30893 */ - "Broadcast)\0" /* 3 refs @ 30902 */ - "82371SB\0" /* 3 refs @ 30913 */ - "(PIIX3)\0" /* 3 refs @ 30921 */ - "82437VX\0" /* 1 refs @ 30929 */ - "(TVX)\0" /* 1 refs @ 30937 */ - "82439TX\0" /* 1 refs @ 30943 */ - "(MTXC)\0" /* 1 refs @ 30951 */ - "82371AB\0" /* 4 refs @ 30958 */ - "(PIIX4)\0" /* 4 refs @ 30966 */ - "82810\0" /* 2 refs @ 30974 */ - "82810-DC100\0" /* 2 refs @ 30980 */ - "82810E\0" /* 2 refs @ 30992 */ - "82443LX\0" /* 2 refs @ 30999 */ - "82443BX\0" /* 3 refs @ 31007 */ - "Bridge/Controller\0" /* 6 refs @ 31015 */ - "disabled)\0" /* 2 refs @ 31033 */ - "82443MX\0" /* 6 refs @ 31043 */ - "82443GX\0" /* 3 refs @ 31051 */ - "XMM\0" /* 1 refs @ 31059 */ - "7360\0" /* 1 refs @ 31063 */ - "LTE\0" /* 1 refs @ 31068 */ - "i740\0" /* 1 refs @ 31072 */ - "Z790\0" /* 1 refs @ 31077 */ - "H770\0" /* 1 refs @ 31082 */ - "B760\0" /* 1 refs @ 31087 */ - "C266\0" /* 1 refs @ 31092 */ - "C262\0" /* 1 refs @ 31097 */ - "26\0" /* 2 refs @ 31102 */ - "27\0" /* 2 refs @ 31105 */ - "28\0" /* 2 refs @ 31108 */ - "Q670\0" /* 1 refs @ 31111 */ - "Z690\0" /* 1 refs @ 31116 */ - "H670\0" /* 1 refs @ 31121 */ - "B660\0" /* 1 refs @ 31126 */ - "H610\0" /* 1 refs @ 31131 */ - "W680\0" /* 1 refs @ 31136 */ - "HM670\0" /* 1 refs @ 31141 */ - "WM690\0" /* 1 refs @ 31147 */ - "SCH\0" /* 1 refs @ 31153 */ - "Graphic\0" /* 1 refs @ 31157 */ - "Display\0" /* 1 refs @ 31165 */ - "E6xx\0" /* 1 refs @ 31173 */ - "82454KX/GX\0" /* 1 refs @ 31178 */ - "(PB)\0" /* 1 refs @ 31189 */ - "82451KX/GX\0" /* 1 refs @ 31194 */ - "(MC)\0" /* 1 refs @ 31205 */ - "82451NX\0" /* 2 refs @ 31210 */ - "(MIOC)\0" /* 1 refs @ 31218 */ - "Expander\0" /* 1 refs @ 31225 */ - "(PXB)\0" /* 1 refs @ 31234 */ - "EG20T\0" /* 26 refs @ 31240 */ - "Ether\0" /* 1 refs @ 31246 */ - "DMAC\0" /* 2 refs @ 31252 */ - "IEEE1588\0" /* 1 refs @ 31257 */ - "Response\0" /* 3 refs @ 31266 */ - "(RAID1)\0" /* 3 refs @ 31275 */ - "Full\0" /* 3 refs @ 31283 */ - "Featured\0" /* 3 refs @ 31288 */ - "ES\0" /* 3 refs @ 31297 */ - "Desktop\0" /* 1 refs @ 31300 */ - "Z87\0" /* 1 refs @ 31308 */ - "Z85\0" /* 1 refs @ 31312 */ - "HM86\0" /* 1 refs @ 31316 */ - "H87\0" /* 1 refs @ 31321 */ - "HM87\0" /* 1 refs @ 31325 */ - "Q85\0" /* 1 refs @ 31330 */ - "Q87\0" /* 1 refs @ 31334 */ - "QM87\0" /* 1 refs @ 31338 */ - "B85\0" /* 1 refs @ 31343 */ - "C222\0" /* 1 refs @ 31347 */ - "C224\0" /* 1 refs @ 31352 */ - "C226\0" /* 1 refs @ 31357 */ - "H81\0" /* 1 refs @ 31362 */ - "Z97\0" /* 1 refs @ 31366 */ - "H97\0" /* 1 refs @ 31370 */ - "C61x/X99\0" /* 39 refs @ 31374 */ - "X99\0" /* 2 refs @ 31383 */ - "SPSR\0" /* 1 refs @ 31387 */ - "MS\0" /* 3 refs @ 31392 */ - "SMbus\0" /* 3 refs @ 31395 */ - "Tiger\0" /* 34 refs @ 31401 */ - "RC\0" /* 4 refs @ 31407 */ - "010\0" /* 1 refs @ 31410 */ - "(UP4\0" /* 2 refs @ 31414 */ - "2Core)\0" /* 2 refs @ 31419 */ - "(UP3\0" /* 3 refs @ 31426 */ - "011\0" /* 1 refs @ 31431 */ - "012\0" /* 1 refs @ 31435 */ - "(UPx)\0" /* 9 refs @ 31439 */ - "Host-PCIe\0" /* 1 refs @ 31445 */ - "060\0" /* 1 refs @ 31455 */ - "4Core)\0" /* 3 refs @ 31459 */ - "H35\0" /* 1 refs @ 31466 */ - "refresh\0" /* 1 refs @ 31470 */ - "(H\0" /* 2 refs @ 31478 */ - "6Core)\0" /* 1 refs @ 31481 */ - "NPK\0" /* 1 refs @ 31488 */ - "8Core)\0" /* 1 refs @ 31492 */ - "96/80\0" /* 2 refs @ 31499 */ - "EU)\0" /* 2 refs @ 31505 */ - "(GT1,\0" /* 2 refs @ 31509 */ - "32EU)\0" /* 1 refs @ 31515 */ - "16EU)\0" /* 1 refs @ 31521 */ - "48EU)\0" /* 3 refs @ 31527 */ - "RRT\0" /* 1 refs @ 31533 */ - "Only\0" /* 1 refs @ 31537 */ - "RAID)\0" /* 1 refs @ 31542 */ - "(PCH-U)\0" /* 2 refs @ 31548 */ - "(PCH-Y)\0" /* 1 refs @ 31556 */ - "Premiun-Y\0" /* 1 refs @ 31564 */ - "Premium-U\0" /* 1 refs @ 31574 */ - "Mainstream/Base\0" /* 1 refs @ 31584 */ - "(flash)\0" /* 1 refs @ 31600 */ - "9560\0" /* 1 refs @ 31608 */ - "Pineview\0" /* 6 refs @ 31613 */ - "UP3\0" /* 1 refs @ 31622 */ - "UP4\0" /* 1 refs @ 31626 */ - "AX201\0" /* 1 refs @ 31630 */ - "Z170\0" /* 3 refs @ 31636 */ - "HM170,\0" /* 2 refs @ 31641 */ - "QM170\0" /* 3 refs @ 31648 */ - "3rd\0" /* 6 refs @ 31654 */ - "Party\0" /* 6 refs @ 31658 */ - "H110\0" /* 1 refs @ 31664 */ - "H170\0" /* 1 refs @ 31669 */ - "Q170\0" /* 1 refs @ 31674 */ - "Q150\0" /* 1 refs @ 31679 */ - "B150\0" /* 1 refs @ 31684 */ - "C236\0" /* 1 refs @ 31689 */ - "C232\0" /* 1 refs @ 31694 */ - "HM170\0" /* 1 refs @ 31699 */ - "CM236\0" /* 1 refs @ 31705 */ - "HM175\0" /* 1 refs @ 31711 */ - "QM175\0" /* 1 refs @ 31717 */ - "CM238\0" /* 1 refs @ 31723 */ - "D-2100\0" /* 5 refs @ 31729 */ - "Phantom\0" /* 1 refs @ 31736 */ - "(ACPI)\0" /* 1 refs @ 31744 */ - "HCI\0" /* 4 refs @ 31751 */ - "C621\0" /* 2 refs @ 31755 */ - "C622\0" /* 1 refs @ 31760 */ - "C624\0" /* 2 refs @ 31765 */ - "C625\0" /* 1 refs @ 31770 */ - "C626\0" /* 1 refs @ 31775 */ - "C627\0" /* 3 refs @ 31780 */ - "C628\0" /* 2 refs @ 31785 */ - "C629\0" /* 1 refs @ 31790 */ - "C621A\0" /* 2 refs @ 31795 */ - "C627A\0" /* 2 refs @ 31801 */ - "C629A\0" /* 2 refs @ 31807 */ - "MROM\0" /* 4 refs @ 31813 */ - "(Acceleration\0" /* 1 refs @ 31818 */ - "Optane)\0" /* 1 refs @ 31832 */ - "H270\0" /* 1 refs @ 31840 */ - "Z270\0" /* 1 refs @ 31845 */ - "Q270\0" /* 1 refs @ 31850 */ - "Q250\0" /* 1 refs @ 31855 */ - "B250\0" /* 1 refs @ 31860 */ - "Z370\0" /* 1 refs @ 31865 */ - "H310C\0" /* 1 refs @ 31870 */ - "X299\0" /* 1 refs @ 31876 */ - "C422\0" /* 1 refs @ 31881 */ - "H310\0" /* 1 refs @ 31886 */ - "H370\0" /* 1 refs @ 31891 */ - "Z390\0" /* 1 refs @ 31896 */ - "Q370\0" /* 1 refs @ 31901 */ - "B360\0" /* 1 refs @ 31906 */ - "C246\0" /* 1 refs @ 31911 */ - "C242\0" /* 1 refs @ 31916 */ - "QM370\0" /* 1 refs @ 31921 */ - "HM370\0" /* 1 refs @ 31927 */ - "CM246\0" /* 1 refs @ 31933 */ - "(Optane)\0" /* 2 refs @ 31939 */ - "PCH-V\0" /* 54 refs @ 31948 */ - "B460\0" /* 1 refs @ 31954 */ - "H410\0" /* 1 refs @ 31959 */ - "(S,8+16)\0" /* 1 refs @ 31964 */ - "(HX,8+16)\0" /* 1 refs @ 31973 */ - "(U,2+8)\0" /* 1 refs @ 31983 */ - "(PX,6+8)\0" /* 1 refs @ 31991 */ - "(PX,4+8)\0" /* 1 refs @ 32000 */ - "(E,8+0)\0" /* 1 refs @ 32009 */ - "(E,6+0)\0" /* 1 refs @ 32017 */ - "(E,4+0)\0" /* 1 refs @ 32025 */ - "(U,2+4)\0" /* 1 refs @ 32033 */ - "(U,1+4)\0" /* 1 refs @ 32041 */ - "(HX,8+12)\0" /* 1 refs @ 32049 */ - "(S,8+12)\0" /* 1 refs @ 32059 */ - "(96\0" /* 4 refs @ 32068 */ - "80EU)\0" /* 4 refs @ 32072 */ - "(64\0" /* 2 refs @ 32078 */ - "(64EU)\0" /* 1 refs @ 32082 */ - "S21152BB\0" /* 1 refs @ 32089 */ - "S21152BA,S21154AE/BE\0" /* 1 refs @ 32098 */ - "21555\0" /* 1 refs @ 32119 */ - "Non-Transparent\0" /* 1 refs @ 32125 */ - "(x16\0" /* 1 refs @ 32141 */ - "Routing\0" /* 1 refs @ 32146 */ - "Protocol\0" /* 1 refs @ 32154 */ - "Semaphore\0" /* 1 refs @ 32163 */ - "HANKSVILLE\0" /* 1 refs @ 32173 */ - "760p/7600p/E-6100p\0" /* 1 refs @ 32184 */ - "660p\0" /* 1 refs @ 32203 */ - "Powerstorm\0" /* 2 refs @ 32208 */ - "4D60T\0" /* 1 refs @ 32219 */ - "4D50T\0" /* 1 refs @ 32225 */ - "PRISM2.5\0" /* 1 refs @ 32231 */ - "PRISM\0" /* 2 refs @ 32240 */ - "Indigo\0" /* 1 refs @ 32246 */ - "Duette\0" /* 1 refs @ 32253 */ - "AEON\0" /* 1 refs @ 32260 */ - "CBIDE2/CI-iCN\0" /* 1 refs @ 32265 */ - "NinjaATA-32Bi\0" /* 3 refs @ 32279 */ - "CBSCII\0" /* 1 refs @ 32293 */ - "NinjaSCSI-32Bi\0" /* 3 refs @ 32300 */ - "RSA-PCI\0" /* 1 refs @ 32315 */ - "GV-BCTV5DL/PCI\0" /* 1 refs @ 32323 */ - "tuner\0" /* 1 refs @ 32338 */ - "IT8152\0" /* 1 refs @ 32344 */ - "IT8211\0" /* 1 refs @ 32351 */ - "IT8212\0" /* 1 refs @ 32358 */ - "IT8213\0" /* 1 refs @ 32365 */ - "AGX016\0" /* 1 refs @ 32372 */ - "ITT3204\0" /* 1 refs @ 32379 */ - "JMC250\0" /* 1 refs @ 32387 */ - "JMC260\0" /* 1 refs @ 32394 */ - "JMB360\0" /* 1 refs @ 32401 */ - "JMB361\0" /* 1 refs @ 32408 */ - "SATA/PATA\0" /* 4 refs @ 32415 */ - "JMB362\0" /* 1 refs @ 32425 */ - "JMB363\0" /* 1 refs @ 32432 */ - "JMB365\0" /* 1 refs @ 32439 */ - "JMB366\0" /* 1 refs @ 32446 */ - "JMB368\0" /* 1 refs @ 32453 */ - "PATA\0" /* 1 refs @ 32460 */ - "JMB38X\0" /* 5 refs @ 32465 */ - "SD/MMC\0" /* 4 refs @ 32472 */ - "Stick\0" /* 4 refs @ 32479 */ - "JMB388\0" /* 4 refs @ 32485 */ - "JNIC-1460\0" /* 1 refs @ 32492 */ - "Fibre-Channel\0" /* 5 refs @ 32502 */ - "JNIC-1560\0" /* 1 refs @ 32516 */ - "FCI-1063\0" /* 1 refs @ 32526 */ - "FCX2-6562\0" /* 1 refs @ 32535 */ - "FCX-6562\0" /* 1 refs @ 32545 */ - "Experimental\0" /* 1 refs @ 32554 */ - "Clock\0" /* 1 refs @ 32567 */ - "Version\0" /* 1 refs @ 32573 */ - "HSSI\0" /* 1 refs @ 32581 */ - "DS3\0" /* 1 refs @ 32586 */ - "SSI\0" /* 1 refs @ 32590 */ - "DS1\0" /* 1 refs @ 32594 */ - "805\0" /* 1 refs @ 32598 */ - "LXT-1001\0" /* 1 refs @ 32602 */ - "DVB\0" /* 2 refs @ 32611 */ - "Transmitter\0" /* 1 refs @ 32615 */ - "Receiver\0" /* 1 refs @ 32627 */ - "EG1032\0" /* 1 refs @ 32636 */ - "Instant\0" /* 2 refs @ 32643 */ - "EG1064\0" /* 1 refs @ 32651 */ - "PCMPC200\0" /* 1 refs @ 32658 */ - "IPN\0" /* 1 refs @ 32667 */ - "2220\0" /* 1 refs @ 32671 */ - "(rev\0" /* 1 refs @ 32676 */ - "01)\0" /* 1 refs @ 32681 */ - "82C168/82C169\0" /* 1 refs @ 32685 */ - "(PNIC)\0" /* 1 refs @ 32699 */ - "82C115\0" /* 1 refs @ 32706 */ - "(PNIC\0" /* 1 refs @ 32713 */ - "II)\0" /* 2 refs @ 32719 */ - "K56flex\0" /* 2 refs @ 32723 */ - "DSVD\0" /* 1 refs @ 32731 */ - "LTMODEM\0" /* 26 refs @ 32736 */ - "Venus\0" /* 1 refs @ 32744 */ - "ORCA\0" /* 2 refs @ 32750 */ - "32-bit\0" /* 1 refs @ 32755 */ - "ASIC\0" /* 2 refs @ 32762 */ - "FW322/323\0" /* 1 refs @ 32767 */ - "FW643\0" /* 1 refs @ 32777 */ - "1394b\0" /* 1 refs @ 32783 */ - "ET1310\0" /* 1 refs @ 32789 */ - "ET1301\0" /* 1 refs @ 32796 */ - "MX98713\0" /* 1 refs @ 32803 */ - "(PMAC)\0" /* 2 refs @ 32811 */ - "MX987x5\0" /* 1 refs @ 32818 */ - "Ringnode\0" /* 1 refs @ 32826 */ - "Mk2\0" /* 1 refs @ 32835 */ - "Collage\0" /* 2 refs @ 32839 */ - "155\0" /* 2 refs @ 32847 */ - "PCI-SLRS\0" /* 2 refs @ 32851 */ - "MGA\0" /* 15 refs @ 32860 */ - "PX2085\0" /* 1 refs @ 32864 */ - "(\"Atlas\")\0" /* 1 refs @ 32871 */ - "Millennium\0" /* 3 refs @ 32881 */ - "2064W\0" /* 1 refs @ 32892 */ - "(\"Storm\")\0" /* 1 refs @ 32898 */ - "Mystique\0" /* 1 refs @ 32908 */ - "1064SG\0" /* 1 refs @ 32917 */ - "2164W\0" /* 1 refs @ 32924 */ - "2164WA-B\0" /* 1 refs @ 32930 */ - "G200\0" /* 2 refs @ 32939 */ - "G200e\0" /* 1 refs @ 32944 */ - "(ServerEngines)\0" /* 1 refs @ 32950 */ - "G400\0" /* 1 refs @ 32966 */ - "G200eW\0" /* 1 refs @ 32971 */ - "G200eH\0" /* 1 refs @ 32978 */ - "Impression\0" /* 1 refs @ 32985 */ - "G100\0" /* 2 refs @ 32996 */ - "G550\0" /* 1 refs @ 33001 */ - "MQ200\0" /* 1 refs @ 33006 */ - "ConnectX-4\0" /* 4 refs @ 33012 */ - "Lx\0" /* 5 refs @ 33023 */ - "ConnectX-5\0" /* 4 refs @ 33026 */ - "Ex\0" /* 4 refs @ 33037 */ - "ConnectX-6\0" /* 4 refs @ 33040 */ - "Dx\0" /* 1 refs @ 33051 */ - "InfiniHost\0" /* 6 refs @ 33054 */ - "(Tavor)\0" /* 2 refs @ 33065 */ - "(old\0" /* 1 refs @ 33073 */ - "Sinai)\0" /* 1 refs @ 33078 */ - "(Sinai)\0" /* 1 refs @ 33085 */ - "(Arbel\0" /* 1 refs @ 33093 */ - "Tavor\0" /* 1 refs @ 33100 */ - "compatility)\0" /* 1 refs @ 33106 */ - "(Arbel)\0" /* 1 refs @ 33119 */ - "ConnectX\0" /* 7 refs @ 33127 */ - "SDR\0" /* 1 refs @ 33136 */ - "(Hermon)\0" /* 7 refs @ 33140 */ - "QDR\0" /* 2 refs @ 33149 */ - "2.5GT/s\0" /* 2 refs @ 33153 */ - "EN\0" /* 2 refs @ 33161 */ - "10GigE\0" /* 2 refs @ 33164 */ - "5GT/s\0" /* 3 refs @ 33171 */ - "MM-5415CN\0" /* 1 refs @ 33177 */ - "MM-5425CN\0" /* 1 refs @ 33187 */ - "MN-120\0" /* 1 refs @ 33197 */ - "Switched\0" /* 1 refs @ 33204 */ - "SM2263\0" /* 1 refs @ 33213 */ - "Weasel\0" /* 3 refs @ 33220 */ - "Tornado\0" /* 1 refs @ 33227 */ - "MPC105\0" /* 1 refs @ 33235 */ - "\"Eagle\"\0" /* 1 refs @ 33242 */ - "MPC106\0" /* 1 refs @ 33250 */ - "\"Grackle\"\0" /* 1 refs @ 33257 */ - "MPC8240\0" /* 1 refs @ 33267 */ - "\"Kahlua\"\0" /* 1 refs @ 33275 */ - "MPC107\0" /* 1 refs @ 33284 */ - "\"Chaparral\"\0" /* 1 refs @ 33291 */ - "MPC8245\0" /* 1 refs @ 33303 */ - "\"Kahlua\0" /* 1 refs @ 33311 */ - "II\"\0" /* 1 refs @ 33319 */ - "MPC8555E\0" /* 1 refs @ 33323 */ - "MPC8541\0" /* 1 refs @ 33332 */ - "Raven\0" /* 1 refs @ 33340 */ - "Multi-Processor\0" /* 1 refs @ 33346 */ - "Falcon\0" /* 1 refs @ 33362 */ - "ECC\0" /* 1 refs @ 33369 */ - "Set\0" /* 1 refs @ 33373 */ - "Hawk\0" /* 1 refs @ 33377 */ - "MPC5200B\0" /* 1 refs @ 33382 */ - "CP102U\0" /* 1 refs @ 33391 */ - "C104H\0" /* 1 refs @ 33398 */ - "CP104UL\0" /* 1 refs @ 33404 */ - "CP104V2\0" /* 1 refs @ 33412 */ - "CP104EL\0" /* 1 refs @ 33420 */ - "CP114\0" /* 1 refs @ 33428 */ - "C168H\0" /* 1 refs @ 33434 */ - "C168U\0" /* 1 refs @ 33440 */ - "C168EL\0" /* 2 refs @ 33446 */ - "MV1000\0" /* 1 refs @ 33453 */ - "DAC960\0" /* 4 refs @ 33460 */ - "(v2\0" /* 1 refs @ 33467 */ - "(v3\0" /* 1 refs @ 33471 */ - "(v4\0" /* 1 refs @ 33475 */ - "(v5\0" /* 1 refs @ 33479 */ - "eXtremeRAID\0" /* 4 refs @ 33483 */ - "AcceleRAID\0" /* 3 refs @ 33495 */ - "352\0" /* 1 refs @ 33506 */ - "170\0" /* 1 refs @ 33510 */ - "160\0" /* 1 refs @ 33514 */ - "1100\0" /* 2 refs @ 33518 */ - "2000/3000\0" /* 1 refs @ 33523 */ - "MTD803\0" /* 1 refs @ 33533 */ - "3-in-1\0" /* 1 refs @ 33540 */ - "TP-Link\0" /* 1 refs @ 33547 */ - "TG-3468\0" /* 1 refs @ 33555 */ - "NCP130\0" /* 2 refs @ 33563 */ - "NSP2K\0" /* 1 refs @ 33570 */ - "Policy\0" /* 1 refs @ 33576 */ - "XLP\0" /* 27 refs @ 33583 */ - "Inter-Chip\0" /* 1 refs @ 33587 */ - "interconnect\0" /* 1 refs @ 33598 */ - "PCI-Express\0" /* 7 refs @ 33611 */ - "RootComplex/Endpoint\0" /* 1 refs @ 33623 */ - "Interlaken\0" /* 1 refs @ 33644 */ - "LA\0" /* 1 refs @ 33655 */ - "interface\0" /* 2 refs @ 33658 */ - "Acceleration\0" /* 1 refs @ 33668 */ - "engine\0" /* 4 refs @ 33681 */ - "Ordering\0" /* 1 refs @ 33688 */ - "Messaging\0" /* 2 refs @ 33697 */ - "Transfer\0" /* 1 refs @ 33707 */ - "accelerator\0" /* 3 refs @ 33716 */ - "RSA/ECC\0" /* 1 refs @ 33728 */ - "Compress/Decompression\0" /* 1 refs @ 33736 */ - "JTAG\0" /* 1 refs @ 33759 */ - "NOR\0" /* 1 refs @ 33764 */ - "flash\0" /* 2 refs @ 33768 */ - "NAND\0" /* 1 refs @ 33774 */ - "eMMC/SD/SDIO\0" /* 1 refs @ 33779 */ - "Regular\0" /* 1 refs @ 33792 */ - "Expression\0" /* 1 refs @ 33800 */ - "SRIO\0" /* 1 refs @ 33811 */ - "Rapid\0" /* 1 refs @ 33816 */ - "IO)\0" /* 1 refs @ 33822 */ - "Universe\0" /* 1 refs @ 33826 */ - "VME\0" /* 1 refs @ 33835 */ - "QSpan\0" /* 1 refs @ 33839 */ - "Tsi381\0" /* 1 refs @ 33845 */ - "PEB383\0" /* 1 refs @ 33852 */ - "PowerSpan\0" /* 2 refs @ 33859 */ - "MXI-3\0" /* 1 refs @ 33869 */ - "Extender\0" /* 1 refs @ 33875 */ - "DP83810\0" /* 1 refs @ 33884 */ - "PC87415\0" /* 1 refs @ 33892 */ - "87560\0" /* 1 refs @ 33900 */ - "DP83815\0" /* 1 refs @ 33906 */ - "DP83820\0" /* 1 refs @ 33914 */ - "CS5535\0" /* 6 refs @ 33922 */ - "Saturn\0" /* 1 refs @ 33929 */ - "SC1100\0" /* 5 refs @ 33936 */ - "XpressAUDIO\0" /* 1 refs @ 33943 */ - "SMI/ACPI\0" /* 1 refs @ 33955 */ - "X-Bus\0" /* 1 refs @ 33964 */ - "NS87410\0" /* 1 refs @ 33970 */ - "SAA7130HL\0" /* 1 refs @ 33978 */ - "SAA7133HL\0" /* 1 refs @ 33988 */ - "A/V\0" /* 3 refs @ 33998 */ - "SAA7134HL\0" /* 1 refs @ 34002 */ - "SAA7135HL\0" /* 1 refs @ 34012 */ - "SAA7146AH\0" /* 1 refs @ 34022 */ - "PS5000\0" /* 1 refs @ 34032 */ - "PS5016\0" /* 1 refs @ 34039 */ - "PS5021\0" /* 1 refs @ 34046 */ - "PS5026\0" /* 1 refs @ 34053 */ - "53c810\0" /* 1 refs @ 34060 */ - "53c820\0" /* 1 refs @ 34067 */ - "53c825\0" /* 1 refs @ 34074 */ - "53c815\0" /* 1 refs @ 34081 */ - "53c810AP\0" /* 1 refs @ 34088 */ - "53c860\0" /* 1 refs @ 34097 */ - "53c1510D\0" /* 1 refs @ 34104 */ - "53c896\0" /* 1 refs @ 34113 */ - "53c895\0" /* 1 refs @ 34120 */ - "53c885\0" /* 1 refs @ 34127 */ - "53c875/876\0" /* 1 refs @ 34134 */ - "53c1510\0" /* 1 refs @ 34145 */ - "53c895A\0" /* 1 refs @ 34153 */ - "53c875A\0" /* 1 refs @ 34161 */ - "SAS3516\0" /* 3 refs @ 34169 */ - "SAS3416\0" /* 2 refs @ 34177 */ - "SAS3508\0" /* 3 refs @ 34185 */ - "SAS3408\0" /* 2 refs @ 34193 */ - "SAS3504\0" /* 2 refs @ 34201 */ - "SAS3404\0" /* 2 refs @ 34209 */ - "53c1010\0" /* 2 refs @ 34217 */ - "(66MHz)\0" /* 1 refs @ 34225 */ - "53c1020/53c1030\0" /* 1 refs @ 34233 */ - "53c1030ZC\0" /* 1 refs @ 34249 */ - "53c1035\0" /* 1 refs @ 34259 */ - "53c1035ZC\0" /* 1 refs @ 34267 */ - "SAS1064\0" /* 1 refs @ 34277 */ - "SAS3216/3224\0" /* 2 refs @ 34285 */ - "SAS1068\0" /* 2 refs @ 34298 */ - "SAS1064E\0" /* 2 refs @ 34306 */ - "SAS1068E\0" /* 2 refs @ 34315 */ - "SAS1066E\0" /* 1 refs @ 34324 */ - "SAS2208\0" /* 7 refs @ 34333 */ - "SAS1064A\0" /* 1 refs @ 34341 */ - "SAS3108\0" /* 5 refs @ 34350 */ - "SAS1066\0" /* 1 refs @ 34358 */ - "SAS3008\0" /* 2 refs @ 34366 */ - "SAS1078\0" /* 2 refs @ 34374 */ - "SAS2116\0" /* 2 refs @ 34382 */ - "SAS2308\0" /* 3 refs @ 34390 */ - "SAS2004\0" /* 1 refs @ 34398 */ - "SAS2008\0" /* 2 refs @ 34406 */ - "SAS2108\0" /* 5 refs @ 34414 */ - "CRYPTO\0" /* 1 refs @ 34422 */ - "GEN2\0" /* 2 refs @ 34429 */ - "SAS1078DE\0" /* 1 refs @ 34434 */ - "53c875J\0" /* 1 refs @ 34444 */ - "SAS3004\0" /* 1 refs @ 34452 */ - "SAS3324\0" /* 11 refs @ 34460 */ - "SAS3316\0" /* 1 refs @ 34468 */ - "Megaraid\0" /* 3 refs @ 34476 */ - "320-X\0" /* 1 refs @ 34485 */ - "320-E\0" /* 1 refs @ 34491 */ - "(300-6X/300-8X)\0" /* 1 refs @ 34497 */ - "Verde\0" /* 1 refs @ 34513 */ - "ZCR\0" /* 1 refs @ 34519 */ - "FC909\0" /* 1 refs @ 34523 */ - "FC909A\0" /* 1 refs @ 34529 */ - "FC929\0" /* 2 refs @ 34536 */ - "FC919\0" /* 2 refs @ 34542 */ - "FC929X\0" /* 1 refs @ 34548 */ - "FC919X\0" /* 1 refs @ 34555 */ - "FC949X\0" /* 1 refs @ 34562 */ - "FC939X\0" /* 1 refs @ 34569 */ - "FC949E\0" /* 1 refs @ 34576 */ - "G-NIC\0" /* 2 refs @ 34583 */ - "53c1030R\0" /* 1 refs @ 34589 */ - "Unsupported\0" /* 4 refs @ 34598 */ - "SAS39xx\0" /* 4 refs @ 34610 */ - "SAS38xx\0" /* 4 refs @ 34618 */ - "4/SC\0" /* 1 refs @ 34626 */ - "Tools\0" /* 1 refs @ 34631 */ - "VRC4173\0" /* 3 refs @ 34637 */ - "PC-Card\0" /* 1 refs @ 34645 */ - "PowerVR\0" /* 1 refs @ 34653 */ - "PCX2\0" /* 1 refs @ 34661 */ - "uPD72872\0" /* 1 refs @ 34666 */ - "PK-UG-X001\0" /* 1 refs @ 34675 */ - "PK-UG-X008\0" /* 1 refs @ 34686 */ - "uPD72870\0" /* 1 refs @ 34697 */ - "uPD72871\0" /* 1 refs @ 34706 */ - "uPD720400\0" /* 1 refs @ 34715 */ - "PCI/PCI-X\0" /* 3 refs @ 34725 */ - "Versa\0" /* 2 refs @ 34735 */ - "VA26D\0" /* 1 refs @ 34741 */ - "MagicGraph\0" /* 4 refs @ 34747 */ - "NM2070\0" /* 1 refs @ 34758 */ - "128V\0" /* 1 refs @ 34765 */ - "128ZV\0" /* 1 refs @ 34770 */ - "128XD\0" /* 1 refs @ 34776 */ - "MagicMedia\0" /* 5 refs @ 34782 */ - "256AV\0" /* 2 refs @ 34793 */ - "256ZX\0" /* 2 refs @ 34799 */ - "256XL+\0" /* 1 refs @ 34805 */ - "NET2280\0" /* 1 refs @ 34812 */ - "NET2282\0" /* 1 refs @ 34820 */ - "MA301\0" /* 1 refs @ 34828 */ - "GA620\0" /* 2 refs @ 34834 */ - "1284\0" /* 7 refs @ 34840 */ - "Printer\0" /* 7 refs @ 34845 */ - "9855\0" /* 1 refs @ 34853 */ - "9865\0" /* 1 refs @ 34858 */ - "MCS9990\0" /* 1 refs @ 34863 */ - "NXB-10GXxR\0" /* 1 refs @ 34871 */ - "NXB-10GCX4\0" /* 1 refs @ 34882 */ - "NXB-4GCU\0" /* 1 refs @ 34893 */ - "IMEZ\0" /* 2 refs @ 34902 */ - "HMEZ\0" /* 2 refs @ 34907 */ - "Mgmt\0" /* 2 refs @ 34912 */ - "NX3031\0" /* 1 refs @ 34917 */ - "NX82C501\0" /* 1 refs @ 34924 */ - "NDR4600\0" /* 1 refs @ 34933 */ - "Baystack\0" /* 1 refs @ 34941 */ - "(Accton\0" /* 1 refs @ 34950 */ - "EN5038)\0" /* 1 refs @ 34958 */ - "Imagine-128\0" /* 2 refs @ 34966 */ - "RIVA\0" /* 4 refs @ 34978 */ - "TNT\0" /* 1 refs @ 34983 */ - "TNT2\0" /* 4 refs @ 34987 */ - "Vanta\0" /* 1 refs @ 34992 */ - "64\0" /* 1 refs @ 34998 */ - "MCP04\0" /* 7 refs @ 35001 */ - "GeForce\0" /* 264 refs @ 35007 */ - "nForce4\0" /* 14 refs @ 35015 */ - "ATA133\0" /* 13 refs @ 35023 */ - "nForce2\0" /* 27 refs @ 35030 */ - "MCP-T\0" /* 4 refs @ 35038 */ - "Aladdin\0" /* 1 refs @ 35044 */ - "nForce3\0" /* 23 refs @ 35052 */ - "Quadro\0" /* 65 refs @ 35060 */ - "FX\0" /* 24 refs @ 35067 */ - "Quadro4\0" /* 11 refs @ 35070 */ - "NVS\0" /* 9 refs @ 35078 */ - "1300\0" /* 1 refs @ 35082 */ - "PCX\0" /* 1 refs @ 35087 */ - "4300\0" /* 1 refs @ 35091 */ - "256\0" /* 1 refs @ 35096 */ - "GeForce2\0" /* 7 refs @ 35100 */ - "MX\0" /* 11 refs @ 35109 */ - "100/200\0" /* 1 refs @ 35112 */ - "Go\0" /* 6 refs @ 35120 */ - "Quadro2\0" /* 2 refs @ 35123 */ - "MXR/EX\0" /* 1 refs @ 35131 */ - "6600\0" /* 5 refs @ 35138 */ - "6610\0" /* 1 refs @ 35143 */ - "540\0" /* 2 refs @ 35148 */ - "GTS\0" /* 6 refs @ 35152 */ - "(DDR)\0" /* 1 refs @ 35156 */ - "6200TC\0" /* 1 refs @ 35162 */ - "6200LE\0" /* 1 refs @ 35169 */ - "GeForce4\0" /* 16 refs @ 35176 */ - "460\0" /* 3 refs @ 35185 */ - "440\0" /* 6 refs @ 35189 */ - "420\0" /* 3 refs @ 35193 */ - "SE\0" /* 7 refs @ 35197 */ - "500XGL\0" /* 1 refs @ 35200 */ - "200/400NVS\0" /* 1 refs @ 35207 */ - "(AGP8X)\0" /* 4 refs @ 35218 */ - "XGL\0" /* 4 refs @ 35226 */ - "380\0" /* 1 refs @ 35230 */ - "nForce\0" /* 170 refs @ 35234 */ - "220/420\0" /* 2 refs @ 35241 */ - "MCP\0" /* 1 refs @ 35249 */ - "Xbox\0" /* 3 refs @ 35253 */ - "ATA100\0" /* 1 refs @ 35258 */ - "GeForce3\0" /* 3 refs @ 35265 */ - "Ti\0" /* 34 refs @ 35274 */ - "DCC\0" /* 1 refs @ 35277 */ - "4400\0" /* 1 refs @ 35281 */ - "900XGL\0" /* 1 refs @ 35286 */ - "750XGL\0" /* 1 refs @ 35293 */ - "700XGL\0" /* 1 refs @ 35300 */ - "nForce430\0" /* 14 refs @ 35307 */ - "C51\0" /* 18 refs @ 35317 */ - "4800\0" /* 2 refs @ 35321 */ - "8x\0" /* 1 refs @ 35326 */ - "980\0" /* 4 refs @ 35329 */ - "780\0" /* 1 refs @ 35333 */ - "1500\0" /* 1 refs @ 35337 */ - "Frame\0" /* 1 refs @ 35342 */ - "Buffer\0" /* 1 refs @ 35348 */ - "(0x02f0)\0" /* 1 refs @ 35355 */ - "(0x02f1)\0" /* 1 refs @ 35364 */ - "(0x02f2)\0" /* 1 refs @ 35373 */ - "(0x02f3)\0" /* 1 refs @ 35382 */ - "(0x02f4)\0" /* 1 refs @ 35391 */ - "(0x02f5)\0" /* 1 refs @ 35400 */ - "(0x02f6)\0" /* 1 refs @ 35409 */ - "(0x02f7)\0" /* 1 refs @ 35418 */ - "(0x02fb)\0" /* 1 refs @ 35427 */ - "(0x02fc)\0" /* 1 refs @ 35436 */ - "(0x02fd)\0" /* 1 refs @ 35445 */ - "(0x02ff)\0" /* 1 refs @ 35454 */ - "5800\0" /* 2 refs @ 35463 */ - "5200\0" /* 2 refs @ 35468 */ - "5200SE\0" /* 1 refs @ 35473 */ - "Go5200\0" /* 1 refs @ 35480 */ - "5900\0" /* 2 refs @ 35487 */ - "5900XT\0" /* 1 refs @ 35492 */ - "5950\0" /* 1 refs @ 35499 */ - "MCP55\0" /* 22 refs @ 35504 */ - "16x\0" /* 2 refs @ 35510 */ - "430\0" /* 1 refs @ 35514 */ - "405\0" /* 1 refs @ 35518 */ - "7025\0" /* 1 refs @ 35522 */ - "630a\0" /* 1 refs @ 35527 */ - "MCP61\0" /* 20 refs @ 35532 */ - "8600\0" /* 2 refs @ 35538 */ - "8400M\0" /* 1 refs @ 35543 */ - "GS\0" /* 3 refs @ 35549 */ - "140M\0" /* 1 refs @ 35552 */ - "MCP65\0" /* 31 refs @ 35557 */ - "PCI-LPC\0" /* 8 refs @ 35563 */ - "MCP67\0" /* 20 refs @ 35571 */ - "MCP73\0" /* 20 refs @ 35577 */ - "8800\0" /* 1 refs @ 35583 */ - "GF100GL\0" /* 1 refs @ 35588 */ - "(Tesla\0" /* 1 refs @ 35596 */ - "M2050)\0" /* 1 refs @ 35603 */ - "9300\0" /* 1 refs @ 35610 */ - "GE\0" /* 2 refs @ 35615 */ - "9300M\0" /* 1 refs @ 35618 */ - "150m\0" /* 1 refs @ 35624 */ - "160m\0" /* 1 refs @ 35629 */ - "295\0" /* 1 refs @ 35634 */ - "MCP78S\0" /* 1 refs @ 35638 */ - "MCP77\0" /* 21 refs @ 35645 */ - "9400M\0" /* 1 refs @ 35651 */ - "210\0" /* 2 refs @ 35657 */ - "MCP79\0" /* 17 refs @ 35661 */ - "GF100\0" /* 1 refs @ 35667 */ - "GF108\0" /* 1 refs @ 35673 */ - "GF116\0" /* 1 refs @ 35679 */ - "640M\0" /* 1 refs @ 35685 */ - "520M\0" /* 2 refs @ 35690 */ - "520MX\0" /* 1 refs @ 35695 */ - "410M\0" /* 2 refs @ 35701 */ - "4200M\0" /* 2 refs @ 35706 */ - "610M\0" /* 3 refs @ 35712 */ - "GTX\0" /* 86 refs @ 35717 */ - "680\0" /* 1 refs @ 35721 */ - "770\0" /* 1 refs @ 35725 */ - "560\0" /* 4 refs @ 35729 */ - "555\0" /* 1 refs @ 35733 */ - "570M\0" /* 1 refs @ 35737 */ - "580M\0" /* 1 refs @ 35742 */ - "675M\0" /* 1 refs @ 35747 */ - "670M\0" /* 1 refs @ 35752 */ - "545\0" /* 2 refs @ 35757 */ - "450\0" /* 2 refs @ 35761 */ - "Rev.\0" /* 5 refs @ 35765 */ - "550M\0" /* 1 refs @ 35770 */ - "555M/635M\0" /* 3 refs @ 35775 */ - "560M\0" /* 1 refs @ 35785 */ - "635\0" /* 2 refs @ 35790 */ - "710\0" /* 3 refs @ 35794 */ - "Rev.2\0" /* 2 refs @ 35798 */ - "720\0" /* 2 refs @ 35804 */ - "GK208B\0" /* 2 refs @ 35808 */ - "730M\0" /* 2 refs @ 35815 */ - "735M\0" /* 1 refs @ 35820 */ - "740M\0" /* 2 refs @ 35825 */ - "710M\0" /* 1 refs @ 35830 */ - "825M\0" /* 1 refs @ 35835 */ - "720M\0" /* 1 refs @ 35840 */ - "920M\0" /* 1 refs @ 35845 */ - "910M\0" /* 1 refs @ 35850 */ - "K610M\0" /* 1 refs @ 35855 */ - "K510M\0" /* 1 refs @ 35861 */ - "830M\0" /* 1 refs @ 35867 */ - "840M\0" /* 2 refs @ 35872 */ - "845M\0" /* 3 refs @ 35877 */ - "930M\0" /* 2 refs @ 35882 */ - "940M\0" /* 2 refs @ 35887 */ - "945M\0" /* 2 refs @ 35892 */ - "945A\0" /* 1 refs @ 35897 */ - "940MX\0" /* 2 refs @ 35902 */ - "930MX\0" /* 1 refs @ 35908 */ - "920MX\0" /* 1 refs @ 35914 */ - "K620M\0" /* 1 refs @ 35920 */ - "M500M\0" /* 1 refs @ 35926 */ - "M520\0" /* 1 refs @ 35932 */ - "940A\0" /* 1 refs @ 35937 */ - "745\0" /* 3 refs @ 35942 */ - "850M\0" /* 1 refs @ 35946 */ - "860M\0" /* 1 refs @ 35951 */ - "950M\0" /* 1 refs @ 35956 */ - "960M\0" /* 1 refs @ 35961 */ - "M2000M\0" /* 1 refs @ 35966 */ - "M1000M\0" /* 1 refs @ 35973 */ - "M600M\0" /* 1 refs @ 35980 */ - "K2200M\0" /* 1 refs @ 35986 */ - "M620\0" /* 1 refs @ 35993 */ - "M1200\0" /* 1 refs @ 35998 */ - "810\0" /* 1 refs @ 36004 */ - "K2200\0" /* 1 refs @ 36008 */ - "K620\0" /* 1 refs @ 36014 */ - "K1200\0" /* 1 refs @ 36019 */ - "Tesla\0" /* 23 refs @ 36025 */ - "M10\0" /* 1 refs @ 36031 */ - "970\0" /* 1 refs @ 36035 */ - "980M\0" /* 1 refs @ 36039 */ - "970M\0" /* 1 refs @ 36044 */ - "965M\0" /* 5 refs @ 36049 */ - "M5000\0" /* 2 refs @ 36054 */ - "M60\0" /* 1 refs @ 36060 */ - "M5000M\0" /* 1 refs @ 36064 */ - "M4000M\0" /* 1 refs @ 36071 */ - "M3000\0" /* 1 refs @ 36078 */ - "M5500\0" /* 1 refs @ 36084 */ - "960\0" /* 2 refs @ 36090 */ - "950\0" /* 2 refs @ 36094 */ - "M2000\0" /* 1 refs @ 36098 */ - "M4\0" /* 1 refs @ 36104 */ - "M2200\0" /* 1 refs @ 36107 */ - "GP100\0" /* 1 refs @ 36113 */ - "P100\0" /* 3 refs @ 36119 */ - "12GB\0" /* 1 refs @ 36124 */ - "16GB\0" /* 7 refs @ 36129 */ - "SXM2\0" /* 4 refs @ 36134 */ - "TITAN\0" /* 3 refs @ 36139 */ - "X\0" /* 1 refs @ 36145 */ - "1080\0" /* 4 refs @ 36147 */ - "P6000\0" /* 1 refs @ 36152 */ - "P40\0" /* 1 refs @ 36158 */ - "1070\0" /* 3 refs @ 36162 */ - "1060\0" /* 7 refs @ 36167 */ - "3GB\0" /* 2 refs @ 36172 */ - "P5000\0" /* 2 refs @ 36176 */ - "P4\0" /* 1 refs @ 36182 */ - "P6\0" /* 1 refs @ 36185 */ - "P4000\0" /* 1 refs @ 36188 */ - "P3000\0" /* 1 refs @ 36194 */ - "6GB\0" /* 1 refs @ 36200 */ - "1050\0" /* 4 refs @ 36204 */ - "MX150\0" /* 2 refs @ 36209 */ - "MX230\0" /* 1 refs @ 36215 */ - "MX250\0" /* 2 refs @ 36221 */ - "MX330\0" /* 2 refs @ 36227 */ - "P500\0" /* 1 refs @ 36233 */ - "P520\0" /* 1 refs @ 36238 */ - "GV100\0" /* 2 refs @ 36243 */ - "DGXS\0" /* 2 refs @ 36249 */ - "FHHL\0" /* 1 refs @ 36254 */ - "32GB\0" /* 5 refs @ 36259 */ - "SXM3\0" /* 1 refs @ 36264 */ - "PG500-216\0" /* 1 refs @ 36269 */ - "PG503-216\0" /* 1 refs @ 36279 */ - "V100S\0" /* 1 refs @ 36289 */ - "RTX\0" /* 75 refs @ 36295 */ - "2080\0" /* 10 refs @ 36299 */ - "8000\0" /* 4 refs @ 36304 */ - "GRID\0" /* 3 refs @ 36309 */ - "T10-4/T10-8/T10-16\0" /* 1 refs @ 36314 */ - "6000/8000\0" /* 1 refs @ 36333 */ - "SUPER\0" /* 14 refs @ 36343 */ - "2070\0" /* 11 refs @ 36349 */ - "2060\0" /* 10 refs @ 36354 */ - "Max-Q\0" /* 20 refs @ 36359 */ - "T4\0" /* 1 refs @ 36365 */ - "1660\0" /* 7 refs @ 36368 */ - "1650\0" /* 12 refs @ 36373 */ - "CMP\0" /* 4 refs @ 36378 */ - "40HX\0" /* 1 refs @ 36382 */ - "MX450\0" /* 3 refs @ 36387 */ - "T1000\0" /* 3 refs @ 36393 */ - "T600\0" /* 2 refs @ 36399 */ - "T400\0" /* 1 refs @ 36404 */ - "T2000\0" /* 1 refs @ 36409 */ - "T500\0" /* 1 refs @ 36415 */ - "A100\0" /* 5 refs @ 36420 */ - "SXM4\0" /* 2 refs @ 36425 */ - "40GB\0" /* 3 refs @ 36430 */ - "80GB\0" /* 2 refs @ 36435 */ - "PG506-232\0" /* 1 refs @ 36440 */ - "A30\0" /* 1 refs @ 36450 */ - "A100A\0" /* 1 refs @ 36454 */ - "A100B\0" /* 1 refs @ 36460 */ - "30HX\0" /* 1 refs @ 36466 */ - "3090\0" /* 1 refs @ 36471 */ - "3080\0" /* 5 refs @ 36476 */ - "20GB\0" /* 1 refs @ 36481 */ - "90HX\0" /* 1 refs @ 36486 */ - "Hash\0" /* 4 refs @ 36491 */ - "A6000\0" /* 1 refs @ 36496 */ - "A40\0" /* 1 refs @ 36502 */ - "A10\0" /* 1 refs @ 36506 */ - "A10G\0" /* 1 refs @ 36510 */ - "GA104\0" /* 1 refs @ 36515 */ - "Tegra\0" /* 1 refs @ 36521 */ - "3070\0" /* 6 refs @ 36527 */ - "3060\0" /* 7 refs @ 36532 */ - "70HX\0" /* 1 refs @ 36537 */ - "8GB/16GB\0" /* 1 refs @ 36542 */ - "A4000\0" /* 2 refs @ 36551 */ - "A5000\0" /* 1 refs @ 36557 */ - "A3000\0" /* 1 refs @ 36563 */ - "3050\0" /* 9 refs @ 36569 */ - "A4\0" /* 1 refs @ 36574 */ - "A2000\0" /* 1 refs @ 36577 */ - "Riva\0" /* 2 refs @ 36583 */ - "ZX\0" /* 1 refs @ 36588 */ - "OTI107\0" /* 1 refs @ 36591 */ - "OC-3136/3137\0" /* 1 refs @ 36598 */ - "Token-Ring\0" /* 2 refs @ 36611 */ - "OC-3139f\0" /* 1 refs @ 36622 */ - "Fastload\0" /* 1 refs @ 36631 */ - "OC-3139/3140\0" /* 1 refs @ 36640 */ - "RapidFire\0" /* 5 refs @ 36653 */ - "OC-3250\0" /* 1 refs @ 36663 */ - "GoCard\0" /* 1 refs @ 36671 */ - "OC-3530\0" /* 1 refs @ 36678 */ - "OC-3141\0" /* 1 refs @ 36686 */ - "OC-3540\0" /* 1 refs @ 36694 */ - "HSTR\0" /* 1 refs @ 36702 */ - "100/16/4\0" /* 1 refs @ 36707 */ - "OC-3150\0" /* 1 refs @ 36716 */ - "OC-2805\0" /* 1 refs @ 36724 */ - "OC-2325\0" /* 1 refs @ 36732 */ - "OC-2183/2185\0" /* 1 refs @ 36740 */ - "OC-2326\0" /* 1 refs @ 36753 */ - "10/100-TX\0" /* 1 refs @ 36761 */ - "OC-2327/2350\0" /* 1 refs @ 36771 */ - "OC-6151/6152\0" /* 1 refs @ 36784 */ - "82C557\0" /* 1 refs @ 36797 */ - "82C558\0" /* 1 refs @ 36804 */ - "82C568\0" /* 1 refs @ 36811 */ - "82C621\0" /* 1 refs @ 36818 */ - "82C700\0" /* 1 refs @ 36825 */ - "82C701\0" /* 1 refs @ 36832 */ - "82C822\0" /* 1 refs @ 36839 */ - "82C861\0" /* 1 refs @ 36846 */ - "82D568\0" /* 1 refs @ 36853 */ - "011H\0" /* 1 refs @ 36860 */ - "OX16PCI954\0" /* 2 refs @ 36865 */ - "OX16PCI954K\0" /* 1 refs @ 36876 */ - "OXuPCI952\0" /* 1 refs @ 36888 */ - "Exsys\0" /* 2 refs @ 36898 */ - "EX-41092\0" /* 1 refs @ 36904 */ - "OXCB950\0" /* 1 refs @ 36913 */ - "OXmPCI954\0" /* 2 refs @ 36921 */ - "Disabled\0" /* 1 refs @ 36931 */ - "EX-41098\0" /* 1 refs @ 36940 */ - "OX16PCI952\0" /* 2 refs @ 36949 */ - "OX16PCI958\0" /* 1 refs @ 36960 */ - "OXPCIe952\0" /* 9 refs @ 36971 */ - "OXPCIe954\0" /* 1 refs @ 36981 */ - "HD-2000\0" /* 1 refs @ 36991 */ - "HDTV\0" /* 2 refs @ 36999 */ - "HD-5500\0" /* 1 refs @ 37004 */ - "RZ1000\0" /* 1 refs @ 37012 */ - "PCAN\0" /* 1 refs @ 37019 */ - "PI7C21P100\0" /* 1 refs @ 37024 */ - "PCIX-PCIX\0" /* 1 refs @ 37035 */ - "PI7C9X20303UL\0" /* 1 refs @ 37045 */ - "3port\0" /* 7 refs @ 37059 */ - "3lane\0" /* 3 refs @ 37065 */ - "switch\0" /* 21 refs @ 37071 */ - "PI7C9X20505GP\0" /* 1 refs @ 37078 */ - "5port\0" /* 2 refs @ 37092 */ - "5lane\0" /* 1 refs @ 37098 */ - "PI7C9X20508GP\0" /* 1 refs @ 37104 */ - "8lane\0" /* 5 refs @ 37118 */ - "PI7C9X2G303EL\0" /* 1 refs @ 37124 */ - "Gen2\0" /* 11 refs @ 37138 */ - "PI7C9X2G304EL\0" /* 1 refs @ 37143 */ - "4lane\0" /* 6 refs @ 37157 */ - "PI7C9X2G308GP\0" /* 1 refs @ 37163 */ - "PI7C9X2G312GP\0" /* 1 refs @ 37177 */ - "12lane\0" /* 3 refs @ 37191 */ - "PI7C9X2G404SL\0" /* 1 refs @ 37198 */ - "4port\0" /* 4 refs @ 37212 */ - "PI7C9X2G608GP\0" /* 1 refs @ 37218 */ - "6port\0" /* 2 refs @ 37232 */ - "PI7C9X2G612GP\0" /* 1 refs @ 37238 */ - "PI7C9X2G912GP\0" /* 1 refs @ 37252 */ - "9port\0" /* 1 refs @ 37266 */ - "PI7C9X2G808PR\0" /* 1 refs @ 37272 */ - "8port\0" /* 3 refs @ 37286 */ - "PI7C9X2G304EV\0" /* 1 refs @ 37292 */ - "PI7C9X2G404EV\0" /* 1 refs @ 37306 */ - "PI7C9X3G808GP\0" /* 1 refs @ 37320 */ - "Gen3\0" /* 4 refs @ 37334 */ - "PI7C9X3G816GP\0" /* 1 refs @ 37339 */ - "16lane\0" /* 1 refs @ 37353 */ - "PI7C9X3G1224GP\0" /* 1 refs @ 37360 */ - "12port\0" /* 1 refs @ 37375 */ - "24lane\0" /* 1 refs @ 37382 */ - "PI7C9X3G1632GP\0" /* 1 refs @ 37389 */ - "16port\0" /* 1 refs @ 37404 */ - "32lane\0" /* 1 refs @ 37411 */ - "PI7C8140A\0" /* 1 refs @ 37418 */ - "PI7C8148\0" /* 1 refs @ 37428 */ - "Asynchronous\0" /* 2 refs @ 37437 */ - "PI7C8152\0" /* 1 refs @ 37450 */ - "PI7C8154\0" /* 1 refs @ 37459 */ - "PI7C9X20303SL\0" /* 2 refs @ 37468 */ - "PI7C9X110\0" /* 1 refs @ 37482 */ - "PI7C9X111SL\0" /* 1 refs @ 37492 */ - "Reverse\0" /* 2 refs @ 37504 */ - "PI7C9X130\0" /* 1 refs @ 37512 */ - "PCIe-PCIX\0" /* 1 refs @ 37522 */ - "P1000\0" /* 1 refs @ 37532 */ - "FNW-3603-TX\0" /* 1 refs @ 37538 */ - "FNW-3800-TX\0" /* 1 refs @ 37550 */ - "VScom\0" /* 3 refs @ 37562 */ - "PCI-800\0" /* 1 refs @ 37568 */ - "PCI-400\0" /* 1 refs @ 37576 */ - "PCI-200\0" /* 1 refs @ 37584 */ - "9656\0" /* 2 refs @ 37592 */ - "FPBGA\0" /* 1 refs @ 37597 */ - "PEX\0" /* 4 refs @ 37603 */ - "8111\0" /* 1 refs @ 37607 */ - "8112\0" /* 1 refs @ 37612 */ - "8114\0" /* 1 refs @ 37617 */ - "PCIe-to-PCI/PCI-X\0" /* 1 refs @ 37622 */ - "8605\0" /* 1 refs @ 37640 */ - "9030\0" /* 1 refs @ 37645 */ - "Accelrator\0" /* 2 refs @ 37650 */ - "9050\0" /* 1 refs @ 37661 */ - "9054\0" /* 1 refs @ 37666 */ - "9060ES\0" /* 1 refs @ 37671 */ - "PowerTop\0" /* 1 refs @ 37678 */ - "PowerPro\0" /* 1 refs @ 37687 */ - "PDC20265\0" /* 1 refs @ 37696 */ - "Ultra/100\0" /* 4 refs @ 37705 */ - "PDC20263\0" /* 1 refs @ 37715 */ - "Ultra/66\0" /* 2 refs @ 37724 */ - "PDC20275\0" /* 1 refs @ 37733 */ - "Ultra/133\0" /* 10 refs @ 37742 */ - "PDC20318\0" /* 1 refs @ 37752 */ - "PDC20319\0" /* 1 refs @ 37761 */ - "PDC20371\0" /* 1 refs @ 37770 */ - "PDC20379\0" /* 1 refs @ 37779 */ - "PDC20378\0" /* 1 refs @ 37788 */ - "PDC20375\0" /* 1 refs @ 37797 */ - "PDC20376\0" /* 1 refs @ 37806 */ - "PDC20377\0" /* 1 refs @ 37815 */ - "PDC40719\0" /* 1 refs @ 37824 */ - "PDC40519\0" /* 1 refs @ 37833 */ - "PDC20771\0" /* 1 refs @ 37842 */ - "PDC20571\0" /* 1 refs @ 37851 */ - "PDC20579\0" /* 1 refs @ 37860 */ - "PDC40779\0" /* 1 refs @ 37869 */ - "PDC40718\0" /* 1 refs @ 37878 */ - "PDC40518\0" /* 1 refs @ 37887 */ - "PDC20775\0" /* 1 refs @ 37896 */ - "PDC20575\0" /* 1 refs @ 37905 */ - "PDC20267\0" /* 1 refs @ 37914 */ - "PDC20246\0" /* 1 refs @ 37923 */ - "Ultra/33\0" /* 1 refs @ 37932 */ - "PDC20262\0" /* 1 refs @ 37941 */ - "PDC20268\0" /* 1 refs @ 37950 */ - "PDC20269\0" /* 1 refs @ 37959 */ - "PDC20276\0" /* 1 refs @ 37968 */ - "DC5030\0" /* 1 refs @ 37977 */ - "PDC20270\0" /* 1 refs @ 37984 */ - "PDC20271\0" /* 1 refs @ 37993 */ - "PDC20617\0" /* 1 refs @ 38002 */ - "PDC20620\0" /* 1 refs @ 38011 */ - "PDC20621\0" /* 1 refs @ 38020 */ - "PDC20618\0" /* 1 refs @ 38029 */ - "PDC20619\0" /* 1 refs @ 38038 */ - "PDC20277\0" /* 1 refs @ 38047 */ - "CH352\0" /* 2 refs @ 38056 */ - "2S\0" /* 2 refs @ 38062 */ - "CH353\0" /* 3 refs @ 38065 */ - "4S\0" /* 11 refs @ 38071 */ - "CH356\0" /* 3 refs @ 38074 */ - "8S\0" /* 3 refs @ 38080 */ - "6S\0" /* 1 refs @ 38083 */ - "2S,\0" /* 3 refs @ 38086 */ - "1P\0" /* 7 refs @ 38090 */ - "(fixed\0" /* 1 refs @ 38093 */ - "address)\0" /* 1 refs @ 38100 */ - "1S,\0" /* 1 refs @ 38109 */ - "CH357\0" /* 1 refs @ 38113 */ - "CH358\0" /* 2 refs @ 38119 */ - "4S,\0" /* 3 refs @ 38125 */ - "CH359\0" /* 1 refs @ 38129 */ - "16S\0" /* 1 refs @ 38135 */ - "CH355\0" /* 1 refs @ 38139 */ - "CH382\0" /* 2 refs @ 38145 */ - "CH384\0" /* 4 refs @ 38151 */ - "28S\0" /* 1 refs @ 38157 */ - "QLA200\0" /* 1 refs @ 38161 */ - "ISP10160\0" /* 1 refs @ 38168 */ - "ISP1020\0" /* 1 refs @ 38177 */ - "ISP1022\0" /* 1 refs @ 38185 */ - "ISP1080\0" /* 1 refs @ 38193 */ - "ISP12160\0" /* 1 refs @ 38201 */ - "ISP1240\0" /* 1 refs @ 38210 */ - "ISP1280\0" /* 1 refs @ 38218 */ - "ISP2100\0" /* 1 refs @ 38226 */ - "ISP2200\0" /* 1 refs @ 38234 */ - "ISP2300\0" /* 1 refs @ 38242 */ - "ISP2312\0" /* 1 refs @ 38250 */ - "ISP2322\0" /* 1 refs @ 38258 */ - "ISP2422\0" /* 1 refs @ 38266 */ - "ISP2432\0" /* 1 refs @ 38274 */ - "ISP2512\0" /* 1 refs @ 38282 */ - "ISP2522\0" /* 1 refs @ 38290 */ - "ISP2532\0" /* 1 refs @ 38298 */ - "ISP4010\0" /* 2 refs @ 38306 */ - "TOE\0" /* 3 refs @ 38314 */ - "ISP4022\0" /* 2 refs @ 38318 */ - "ISP4032\0" /* 2 refs @ 38326 */ - "HBA\0" /* 3 refs @ 38334 */ - "ISP5422\0" /* 1 refs @ 38338 */ - "ISP5432\0" /* 1 refs @ 38346 */ - "ISP6312\0" /* 1 refs @ 38354 */ - "ISP6322\0" /* 1 refs @ 38362 */ - "ISP8432\0" /* 1 refs @ 38370 */ - "PWDOG1\0" /* 1 refs @ 38378 */ - "8580\0" /* 1 refs @ 38385 */ - "Virtio\0" /* 128 refs @ 38390 */ - "Balloon\0" /* 2 refs @ 38397 */ - "Console\0" /* 2 refs @ 38405 */ - "RNG\0" /* 2 refs @ 38413 */ - "Entropy\0" /* 2 refs @ 38417 */ - "9p\0" /* 2 refs @ 38425 */ - "Filesystem\0" /* 2 refs @ 38428 */ - "memory\0" /* 1 refs @ 38439 */ - "Remote\0" /* 1 refs @ 38446 */ - "CryptoSwift\0" /* 1 refs @ 38453 */ - "PKI\0" /* 1 refs @ 38465 */ - "RT2460A\0" /* 1 refs @ 38469 */ - "RT2560\0" /* 1 refs @ 38477 */ - "802.11b/g\0" /* 4 refs @ 38484 */ - "RT2561S\0" /* 1 refs @ 38494 */ - "RT2561\0" /* 1 refs @ 38502 */ - "RT2661\0" /* 1 refs @ 38509 */ - "RT2760\0" /* 1 refs @ 38516 */ - "RT2790\0" /* 1 refs @ 38523 */ - "RT3060\0" /* 1 refs @ 38530 */ - "RT3062\0" /* 1 refs @ 38537 */ - "RT3091\0" /* 1 refs @ 38544 */ - "RT3092\0" /* 1 refs @ 38551 */ - "RT3562\0" /* 1 refs @ 38558 */ - "RT3592\0" /* 1 refs @ 38565 */ - "RT3593\0" /* 1 refs @ 38572 */ - "RT5360\0" /* 1 refs @ 38579 */ - "RT5362\0" /* 1 refs @ 38586 */ - "RT5390\0" /* 5 refs @ 38593 */ - "REX\0" /* 1 refs @ 38600 */ - "PCI-31/33\0" /* 1 refs @ 38604 */ - "RP1\0" /* 1 refs @ 38614 */ - "R1010\0" /* 1 refs @ 38618 */ - "R1011\0" /* 1 refs @ 38624 */ - "R1012\0" /* 1 refs @ 38630 */ - "R1031\0" /* 1 refs @ 38636 */ - "R1060\0" /* 1 refs @ 38642 */ - "R1061\0" /* 1 refs @ 38648 */ - "R1070\0" /* 1 refs @ 38654 */ - "R1331\0" /* 1 refs @ 38660 */ - "R1710\0" /* 1 refs @ 38666 */ - "R1930\0" /* 1 refs @ 38672 */ - "Hybrid\0" /* 1 refs @ 38678 */ - "R2010\0" /* 1 refs @ 38685 */ - "R2012\0" /* 1 refs @ 38691 */ - "R2015\0" /* 1 refs @ 38697 */ - "R6011\0" /* 1 refs @ 38703 */ - "R6013\0" /* 1 refs @ 38709 */ - "R6021\0" /* 1 refs @ 38715 */ - "R6022\0" /* 1 refs @ 38721 */ - "R6023\0" /* 1 refs @ 38727 */ - "R6025\0" /* 1 refs @ 38733 */ - "R6026\0" /* 1 refs @ 38739 */ - "R6031\0" /* 1 refs @ 38745 */ - "R6035\0" /* 1 refs @ 38751 */ - "R6036\0" /* 1 refs @ 38757 */ - "R6040\0" /* 1 refs @ 38763 */ - "R6060\0" /* 1 refs @ 38769 */ - "R6061\0" /* 1 refs @ 38775 */ - "E2600\0" /* 1 refs @ 38781 */ - "E3000\0" /* 1 refs @ 38787 */ - "RTS5208\0" /* 1 refs @ 38793 */ - "RTS5209\0" /* 1 refs @ 38801 */ - "RTS5227\0" /* 1 refs @ 38809 */ - "RTS5229\0" /* 1 refs @ 38817 */ - "RTS522A\0" /* 1 refs @ 38825 */ - "RTS5249\0" /* 1 refs @ 38833 */ - "RTS525A\0" /* 1 refs @ 38841 */ - "RTL8402\0" /* 1 refs @ 38849 */ - "RTL8411B\0" /* 1 refs @ 38857 */ - "RTL8411\0" /* 1 refs @ 38866 */ - "8029\0" /* 1 refs @ 38874 */ - "8139D\0" /* 1 refs @ 38879 */ - "8100\0" /* 1 refs @ 38885 */ - "8125\0" /* 1 refs @ 38890 */ - "10/100/1G/2.5G\0" /* 1 refs @ 38895 */ - "8126\0" /* 1 refs @ 38910 */ - "10/100/1G/2.5G/5G\0" /* 1 refs @ 38915 */ - "8129\0" /* 1 refs @ 38933 */ - "8100E/8101E/8102E\0" /* 1 refs @ 38938 */ - "8138\0" /* 1 refs @ 38956 */ - "8169SC/8110SC\0" /* 1 refs @ 38961 */ - "8168/8111\0" /* 1 refs @ 38975 */ - "8169/8110\0" /* 1 refs @ 38985 */ - "RTL8188CE\0" /* 1 refs @ 38995 */ - "802.11n\0" /* 4 refs @ 39005 */ - "RTL8192CE\0" /* 1 refs @ 39013 */ - "RTL8188EE\0" /* 1 refs @ 39023 */ - "8185\0" /* 1 refs @ 39033 */ - "802.11a/b/g\0" /* 1 refs @ 39038 */ - "RTL8192EE\0" /* 1 refs @ 39050 */ - "RTL8821CE\0" /* 1 refs @ 39060 */ - "Qemu\0" /* 1 refs @ 39070 */ - "QXL\0" /* 1 refs @ 39075 */ - "SH7780\0" /* 1 refs @ 39079 */ - "SH7785\0" /* 1 refs @ 39086 */ - "SH7757\0" /* 3 refs @ 39093 */ - "End-Point\0" /* 1 refs @ 39100 */ - "[PBI]\0" /* 1 refs @ 39110 */ - "[PPB]\0" /* 1 refs @ 39116 */ - "[PS]\0" /* 1 refs @ 39122 */ - "uPD720201\0" /* 1 refs @ 39127 */ - "uPD720202\0" /* 1 refs @ 39137 */ - "5C465\0" /* 1 refs @ 39147 */ - "5C466\0" /* 1 refs @ 39153 */ - "5C475\0" /* 1 refs @ 39159 */ - "5C476\0" /* 1 refs @ 39165 */ - "5C477\0" /* 1 refs @ 39171 */ - "5C478\0" /* 1 refs @ 39177 */ - "5C551\0" /* 1 refs @ 39183 */ - "Bridge/Firewire\0" /* 2 refs @ 39189 */ - "5C552\0" /* 1 refs @ 39205 */ - "R5C576\0" /* 1 refs @ 39211 */ - "5C592\0" /* 1 refs @ 39218 */ - "Bridge/MS/SD/Firewire\0" /* 2 refs @ 39224 */ - "5C593\0" /* 1 refs @ 39246 */ - "5C821\0" /* 1 refs @ 39252 */ - "Bridge/MS/SD/MMC/SC\0" /* 2 refs @ 39258 */ - "5C822\0" /* 1 refs @ 39278 */ - "5C832\0" /* 1 refs @ 39284 */ - "PCI-SD/MMC/MMC+/MS/xD/Firewire\0" /* 1 refs @ 39290 */ - "5C843\0" /* 1 refs @ 39321 */ - "Bridge/SD/MMC/MMC+/MS/xD/Firewire\0" /* 2 refs @ 39327 */ - "5C847\0" /* 1 refs @ 39361 */ - "xD-Picture\0" /* 1 refs @ 39367 */ - "5C853\0" /* 1 refs @ 39378 */ - "Bridge/SD/MMC/MMC+/MS/xD/SC/Firewire\0" /* 1 refs @ 39384 */ - "5U230\0" /* 1 refs @ 39421 */ - "FireWire/SD/MMC/xD/MS\0" /* 1 refs @ 39427 */ - "5U822\0" /* 1 refs @ 39449 */ - "5U823\0" /* 1 refs @ 39455 */ - "5U832\0" /* 1 refs @ 39461 */ - "5C852\0" /* 1 refs @ 39467 */ - "N2\0" /* 1 refs @ 39473 */ - "FDDI\0" /* 1 refs @ 39476 */ - "RK3399\0" /* 1 refs @ 39481 */ - "Xframe\0" /* 1 refs @ 39488 */ - "Xframe2\0" /* 1 refs @ 39495 */ - "Xframe3\0" /* 1 refs @ 39503 */ - "ViRGE\0" /* 1 refs @ 39511 */ - "Trio32\0" /* 1 refs @ 39517 */ - "Trio32/64\0" /* 1 refs @ 39524 */ - "Aurora64V+\0" /* 1 refs @ 39534 */ - "Trio64UV+\0" /* 1 refs @ 39545 */ - "ViRGE/VX\0" /* 1 refs @ 39555 */ - "868\0" /* 1 refs @ 39564 */ - "86C928\0" /* 1 refs @ 39568 */ - "86C864-0\0" /* 1 refs @ 39575 */ - "(\"Vision864\")\0" /* 4 refs @ 39584 */ - "86C864-1\0" /* 1 refs @ 39598 */ - "86C864-2\0" /* 1 refs @ 39607 */ - "86C864-3\0" /* 1 refs @ 39616 */ - "86C964-0\0" /* 1 refs @ 39625 */ - "(\"Vision964\")\0" /* 4 refs @ 39634 */ - "86C964-1\0" /* 1 refs @ 39648 */ - "86C964-2\0" /* 1 refs @ 39657 */ - "86C964-3\0" /* 1 refs @ 39666 */ - "86C968-0\0" /* 1 refs @ 39675 */ - "(\"Vision968\")\0" /* 4 refs @ 39684 */ - "86C968-1\0" /* 1 refs @ 39698 */ - "86C968-2\0" /* 1 refs @ 39707 */ - "86C968-3\0" /* 1 refs @ 39716 */ - "Trio64V2/DX\0" /* 1 refs @ 39725 */ - "Plato/PX\0" /* 1 refs @ 39737 */ - "86C365\0" /* 1 refs @ 39746 */ - "Trio3D\0" /* 1 refs @ 39753 */ - "ViRGE/DX\0" /* 1 refs @ 39760 */ - "ViRGE/GX2\0" /* 1 refs @ 39769 */ - "Trio3D/2X\0" /* 1 refs @ 39779 */ - "Savage3D\0" /* 1 refs @ 39789 */ - "Savage3D+MV\0" /* 1 refs @ 39798 */ - "Savage4\0" /* 1 refs @ 39810 */ - "ProSavage\0" /* 1 refs @ 39818 */ - "KM133\0" /* 1 refs @ 39828 */ - "ViRGE/MX\0" /* 1 refs @ 39834 */ - "ViRGE/MXP\0" /* 1 refs @ 39843 */ - "Savage/MX+MV\0" /* 1 refs @ 39853 */ - "Savage/MX\0" /* 1 refs @ 39866 */ - "Savage/IX+MV\0" /* 1 refs @ 39876 */ - "Savage/IX\0" /* 1 refs @ 39889 */ - "Savage/IXC\0" /* 1 refs @ 39899 */ - "Chrome\0" /* 2 refs @ 39910 */ - "GT/540\0" /* 1 refs @ 39917 */ - "GTX/5400E\0" /* 1 refs @ 39924 */ - "Savage2000\0" /* 1 refs @ 39934 */ - "SonicVibes\0" /* 1 refs @ 39945 */ - "SafeXcel\0" /* 1 refs @ 39956 */ - "XP941\0" /* 1 refs @ 39965 */ - "M.2\0" /* 8 refs @ 39971 */ - "SM951\0" /* 2 refs @ 39975 */ - "SM961\0" /* 1 refs @ 39981 */ - "SM981\0" /* 1 refs @ 39987 */ - "SM980\0" /* 1 refs @ 39993 */ - "PM9A1\0" /* 1 refs @ 39999 */ - "SM990\0" /* 1 refs @ 40005 */ - "171X\0" /* 1 refs @ 40011 */ - "172X\0" /* 1 refs @ 40016 */ - "172Xa/172Xb\0" /* 1 refs @ 40021 */ - "PM173X\0" /* 1 refs @ 40033 */ - "PM173Xa\0" /* 1 refs @ 40040 */ - "PM174X\0" /* 1 refs @ 40048 */ - "KS8920\0" /* 1 refs @ 40055 */ - "QE1000\0" /* 1 refs @ 40062 */ - "FE1000\0" /* 1 refs @ 40069 */ - "WD\0" /* 2 refs @ 40076 */ - "Black\0" /* 1 refs @ 40079 */ - "Blue\0" /* 1 refs @ 40085 */ - "SN550\0" /* 1 refs @ 40090 */ - "Broadband\0" /* 1 refs @ 40096 */ - "BladeEngine2\0" /* 2 refs @ 40106 */ - "BladeEngine3\0" /* 2 refs @ 40119 */ - "iRMC\0" /* 1 refs @ 40132 */ - "CNB20-LE\0" /* 2 refs @ 40137 */ - "PCI/AGP\0" /* 6 refs @ 40146 */ - "CNB30-LE\0" /* 1 refs @ 40154 */ - "CNB20-HE\0" /* 3 refs @ 40163 */ - "CIOB-X\0" /* 1 refs @ 40172 */ - "CMIC-HE\0" /* 1 refs @ 40179 */ - "CNB30-HE\0" /* 1 refs @ 40187 */ - "CMIC-LE\0" /* 1 refs @ 40196 */ - "CMIC-SL\0" /* 1 refs @ 40204 */ - "HT1000\0" /* 6 refs @ 40212 */ - "CIOB-X2\0" /* 1 refs @ 40219 */ - "BCM5714/BCM5715\0" /* 1 refs @ 40227 */ - "Integral\0" /* 1 refs @ 40243 */ - "CIOB-E\0" /* 1 refs @ 40252 */ - "HT2100\0" /* 4 refs @ 40259 */ - "OSB4\0" /* 2 refs @ 40266 */ - "CSB5\0" /* 3 refs @ 40271 */ - "CSB6\0" /* 5 refs @ 40276 */ - "HT1000SB\0" /* 1 refs @ 40281 */ - "IDE/RAID\0" /* 2 refs @ 40290 */ - "HT-1000\0" /* 3 refs @ 40299 */ - "OSB4/CSB5\0" /* 1 refs @ 40307 */ - "ISA/LPC\0" /* 2 refs @ 40317 */ - "XIOAPIC\0" /* 1 refs @ 40325 */ - "Frodo4\0" /* 1 refs @ 40333 */ - "Frodo8\0" /* 1 refs @ 40340 */ - "HT1100SB\0" /* 1 refs @ 40347 */ - "HT-1100\0" /* 2 refs @ 40356 */ - "IOC3\0" /* 1 refs @ 40364 */ - "PsiTech\0" /* 1 refs @ 40369 */ - "RAD1\0" /* 1 refs @ 40377 */ - "Tigon\0" /* 1 refs @ 40382 */ - "STG\0" /* 3 refs @ 40388 */ - "2000X\0" /* 2 refs @ 40392 */ - "1764X\0" /* 1 refs @ 40398 */ - "BCM1250\0" /* 2 refs @ 40404 */ - "LDT\0" /* 1 refs @ 40412 */ - "REALmagic\0" /* 1 refs @ 40416 */ - "Hollywood-Plus\0" /* 1 refs @ 40426 */ - "MPEG-2\0" /* 1 refs @ 40441 */ - "Cyber10x\0" /* 17 refs @ 40448 */ - "16550\0" /* 13 refs @ 40457 */ - "16650\0" /* 12 refs @ 40463 */ - "16850\0" /* 12 refs @ 40469 */ - "2S1P\0" /* 6 refs @ 40475 */ - "Cyber20x\0" /* 20 refs @ 40480 */ - "2P1S\0" /* 3 refs @ 40489 */ - "86C201\0" /* 1 refs @ 40494 */ - "86C202\0" /* 1 refs @ 40501 */ - "86C205\0" /* 1 refs @ 40508 */ - "85C503\0" /* 1 refs @ 40515 */ - "5597/5598\0" /* 5 refs @ 40522 */ - "Mngmt\0" /* 1 refs @ 40532 */ - "180\0" /* 1 refs @ 40538 */ - "181\0" /* 1 refs @ 40542 */ - "182\0" /* 1 refs @ 40546 */ - "183\0" /* 1 refs @ 40550 */ - "190\0" /* 1 refs @ 40554 */ - "191\0" /* 1 refs @ 40558 */ - "300/305\0" /* 1 refs @ 40562 */ - "315\0" /* 1 refs @ 40570 */ - "85C501\0" /* 1 refs @ 40574 */ - "85C496\0" /* 1 refs @ 40581 */ - "85C601\0" /* 1 refs @ 40588 */ - "633\0" /* 1 refs @ 40595 */ - "646\0" /* 1 refs @ 40599 */ - "648\0" /* 1 refs @ 40603 */ - "651\0" /* 1 refs @ 40607 */ - "652\0" /* 1 refs @ 40611 */ - "658\0" /* 1 refs @ 40615 */ - "661\0" /* 1 refs @ 40619 */ - "671\0" /* 1 refs @ 40623 */ - "733\0" /* 1 refs @ 40627 */ - "735\0" /* 1 refs @ 40631 */ - "740\0" /* 2 refs @ 40635 */ - "741\0" /* 1 refs @ 40639 */ - "746\0" /* 1 refs @ 40643 */ - "748\0" /* 1 refs @ 40647 */ - "751\0" /* 1 refs @ 40651 */ - "752\0" /* 1 refs @ 40655 */ - "755\0" /* 1 refs @ 40659 */ - "756\0" /* 1 refs @ 40663 */ - "760\0" /* 1 refs @ 40667 */ - "761\0" /* 1 refs @ 40671 */ - "900\0" /* 1 refs @ 40675 */ - "961\0" /* 1 refs @ 40679 */ - "962\0" /* 1 refs @ 40683 */ - "963\0" /* 1 refs @ 40687 */ - "964\0" /* 1 refs @ 40691 */ - "965\0" /* 1 refs @ 40695 */ - "966\0" /* 1 refs @ 40699 */ - "968\0" /* 1 refs @ 40703 */ - "GUI\0" /* 1 refs @ 40707 */ - "Accelerator+3D\0" /* 1 refs @ 40711 */ - "6326\0" /* 1 refs @ 40726 */ - "6330\0" /* 1 refs @ 40731 */ - "7002\0" /* 1 refs @ 40736 */ - "7012\0" /* 1 refs @ 40741 */ - "7013\0" /* 1 refs @ 40746 */ - "7016\0" /* 1 refs @ 40751 */ - "7018\0" /* 1 refs @ 40756 */ - "7019\0" /* 1 refs @ 40761 */ - "7502\0" /* 1 refs @ 40766 */ - "Voyager\0" /* 1 refs @ 40771 */ - "LynxEM\0" /* 1 refs @ 40779 */ - "LynxEM+\0" /* 1 refs @ 40786 */ - "Lynx3DM\0" /* 1 refs @ 40794 */ - "LynxE\0" /* 2 refs @ 40802 */ - "Lynx3D\0" /* 1 refs @ 40808 */ - "Lynx\0" /* 1 refs @ 40815 */ - "83C170\0" /* 1 refs @ 40820 */ - "(\"EPIC/100\")\0" /* 2 refs @ 40827 */ - "83C175\0" /* 1 refs @ 40840 */ - "FDC37C665\0" /* 1 refs @ 40847 */ - "FDC37C922\0" /* 1 refs @ 40857 */ - "PAX.ware\0" /* 1 refs @ 40867 */ - "Gb\0" /* 1 refs @ 40876 */ - "Classifier\0" /* 2 refs @ 40879 */ - "SNP8023:\0" /* 2 refs @ 40890 */ - "971\0" /* 1 refs @ 40899 */ - "CXD1947A\0" /* 1 refs @ 40903 */ - "CXD3222\0" /* 1 refs @ 40912 */ - "PCIO\0" /* 3 refs @ 40920 */ - "Ebus2\0" /* 2 refs @ 40925 */ - "Happy\0" /* 1 refs @ 40931 */ - "Meal\0" /* 1 refs @ 40937 */ - "(US\0" /* 1 refs @ 40942 */ - "III)\0" /* 4 refs @ 40946 */ - "ERI\0" /* 1 refs @ 40951 */ - "GEM\0" /* 1 refs @ 40955 */ - "Simba\0" /* 1 refs @ 40959 */ - "BCM5821\0" /* 1 refs @ 40965 */ - "psycho\0" /* 1 refs @ 40973 */ - "microSPARC\0" /* 1 refs @ 40980 */ - "IIep\0" /* 1 refs @ 40991 */ - "UltraSPARC\0" /* 2 refs @ 40996 */ - "IIi\0" /* 1 refs @ 41007 */ - "Cassini\0" /* 1 refs @ 41011 */ - "Neptune\0" /* 1 refs @ 41019 */ - "IP100A\0" /* 1 refs @ 41027 */ - "ST201\0" /* 1 refs @ 41034 */ - "ST1023\0" /* 1 refs @ 41040 */ - "ST2021\0" /* 1 refs @ 41047 */ - "Matrix\0" /* 1 refs @ 41054 */ - "adapter\0" /* 1 refs @ 41061 */ - "SER5xxx\0" /* 1 refs @ 41069 */ - "multiport\0" /* 3 refs @ 41077 */ - "PCI2S550\0" /* 1 refs @ 41087 */ - "SUN1888\0" /* 1 refs @ 41096 */ - "parallel\0" /* 1 refs @ 41104 */ - "NE-34\0" /* 1 refs @ 41113 */ - "4S2P\0" /* 1 refs @ 41119 */ - "82C101\0" /* 2 refs @ 41124 */ - "82C103\0" /* 1 refs @ 41131 */ - "82C105\0" /* 1 refs @ 41138 */ - "83C553\0" /* 1 refs @ 41145 */ - "SB16C1054\0" /* 1 refs @ 41152 */ - "UARTs\0" /* 3 refs @ 41162 */ - "SB16C1058\0" /* 1 refs @ 41168 */ - "SB16C1050\0" /* 1 refs @ 41178 */ - "FDDI-xP\0" /* 1 refs @ 41188 */ - "SK-9821\0" /* 1 refs @ 41196 */ - "SK-9DX1\0" /* 1 refs @ 41204 */ - "SK-9Mxx\0" /* 1 refs @ 41212 */ - "SK-9D21\0" /* 1 refs @ 41220 */ - "1000BASE-T\0" /* 1 refs @ 41228 */ - "SK-9D41\0" /* 1 refs @ 41239 */ - "1000BASE-X\0" /* 1 refs @ 41247 */ - "SK-9Sxx\0" /* 1 refs @ 41258 */ - "SK-9E21D/SK-9E22\0" /* 1 refs @ 41266 */ - "1000base-T\0" /* 1 refs @ 41283 */ - "TC9021\0" /* 2 refs @ 41294 */ - "(alt\0" /* 1 refs @ 41301 */ - "ServerNet\0" /* 1 refs @ 41306 */ - "DC-290(M)\0" /* 1 refs @ 41316 */ - "DC-315/DC-395\0" /* 1 refs @ 41326 */ - "DC-690C\0" /* 1 refs @ 41340 */ - "TLAN\0" /* 1 refs @ 41348 */ - "TVP4020\0" /* 1 refs @ 41353 */ - "TSB12LV21\0" /* 1 refs @ 41361 */ - "TSB12LV22\0" /* 1 refs @ 41371 */ - "PCI4450\0" /* 2 refs @ 41381 */ - "PCI4410\0" /* 2 refs @ 41389 */ - "TSB12LV23\0" /* 1 refs @ 41397 */ - "TSB12LV26\0" /* 1 refs @ 41407 */ - "TSB43AA22\0" /* 1 refs @ 41417 */ - "TSB43AA22/A\0" /* 1 refs @ 41427 */ - "TSB43AA23\0" /* 1 refs @ 41439 */ - "TSB82AA2\0" /* 1 refs @ 41449 */ - "TSB43AA21\0" /* 1 refs @ 41458 */ - "PCI4451\0" /* 2 refs @ 41468 */ - "PCI4510\0" /* 2 refs @ 41476 */ - "PCI4520\0" /* 2 refs @ 41484 */ - "PCI7[4-6]10\0" /* 1 refs @ 41492 */ - "PCI7x21/7x11\0" /* 5 refs @ 41504 */ - "Cardbus\0" /* 4 refs @ 41517 */ - "FlashMedia\0" /* 2 refs @ 41525 */ - "SM\0" /* 1 refs @ 41536 */ - "PCI6515A\0" /* 2 refs @ 41539 */ - "(Smart\0" /* 2 refs @ 41548 */ - "PCIXX12\0" /* 5 refs @ 41555 */ - "ACX100A\0" /* 1 refs @ 41563 */ - "ACX100B\0" /* 1 refs @ 41571 */ - "ACX111\0" /* 1 refs @ 41579 */ - "PCI1130\0" /* 1 refs @ 41586 */ - "PCI1031\0" /* 1 refs @ 41594 */ - "PCI1131\0" /* 1 refs @ 41602 */ - "PCI1250\0" /* 1 refs @ 41610 */ - "PCI1220\0" /* 1 refs @ 41618 */ - "PCI1221\0" /* 1 refs @ 41626 */ - "PCI1210\0" /* 1 refs @ 41634 */ - "PCI1450\0" /* 1 refs @ 41642 */ - "PCI1225\0" /* 1 refs @ 41650 */ - "PCI1251\0" /* 1 refs @ 41658 */ - "PCI1211\0" /* 1 refs @ 41666 */ - "PCI1251B\0" /* 1 refs @ 41674 */ - "PCI2030\0" /* 1 refs @ 41683 */ - "PCI2050\0" /* 1 refs @ 41691 */ - "PCI7510\0" /* 1 refs @ 41699 */ - "PCI7610\0" /* 2 refs @ 41707 */ - "PCI7410\0" /* 1 refs @ 41715 */ - "PCI7[46]10\0" /* 2 refs @ 41723 */ - "(SD/MMC\0" /* 1 refs @ 41734 */ - "(Memory\0" /* 1 refs @ 41742 */ - "PCI1410\0" /* 1 refs @ 41750 */ - "PCI1420\0" /* 1 refs @ 41758 */ - "PCI1451\0" /* 1 refs @ 41766 */ - "PCI1421\0" /* 1 refs @ 41774 */ - "PCI1620\0" /* 1 refs @ 41782 */ - "PCI1520\0" /* 1 refs @ 41790 */ - "PCI1510\0" /* 1 refs @ 41798 */ - "PCI1530\0" /* 1 refs @ 41806 */ - "PCI1515\0" /* 1 refs @ 41814 */ - "PCI2040\0" /* 1 refs @ 41822 */ - "PCI-DSP\0" /* 1 refs @ 41830 */ - "PCI7420\0" /* 1 refs @ 41838 */ - "PCI-Cardbus\0" /* 1 refs @ 41846 */ - "PCI-010L\0" /* 1 refs @ 41858 */ - "PCI-100L\0" /* 1 refs @ 41867 */ - "PCI-110L\0" /* 1 refs @ 41876 */ - "PCI-200L\0" /* 1 refs @ 41885 */ - "PCI-210L\0" /* 1 refs @ 41894 */ - "PCI-200Li\0" /* 1 refs @ 41903 */ - "PCI-400L\0" /* 1 refs @ 41913 */ - "PCI-800L\0" /* 1 refs @ 41922 */ - "PCI-011H\0" /* 1 refs @ 41931 */ - "PCI-x10H\0" /* 1 refs @ 41940 */ - "PCI-100H\0" /* 1 refs @ 41949 */ - "PCI-800H\0" /* 1 refs @ 41958 */ - "PCI-800H_1\0" /* 1 refs @ 41967 */ - "PCI-200H\0" /* 1 refs @ 41978 */ - "PCI-010HV2\0" /* 1 refs @ 41987 */ - "PCI-200HV2\0" /* 1 refs @ 41998 */ - "R4x00\0" /* 1 refs @ 42009 */ - "TC35856F\0" /* 1 refs @ 42015 */ - "(\"Meteor\")\0" /* 1 refs @ 42024 */ - "Portege\0" /* 1 refs @ 42035 */ - "Piccolo\0" /* 4 refs @ 42043 */ - "XG4\0" /* 1 refs @ 42051 */ - "XG5\0" /* 1 refs @ 42055 */ - "ToPIC95\0" /* 1 refs @ 42059 */ - "ToPIC95B\0" /* 1 refs @ 42067 */ - "ToPIC97\0" /* 1 refs @ 42076 */ - "ToPIC100\0" /* 1 refs @ 42084 */ - "SanRemo?\0" /* 1 refs @ 42093 */ - "Triangle\0" /* 1 refs @ 42102 */ - "Infrared\0" /* 2 refs @ 42111 */ - "Type\0" /* 2 refs @ 42120 */ - "O\0" /* 1 refs @ 42125 */ - "Type-A\0" /* 1 refs @ 42127 */ - "DO\0" /* 1 refs @ 42134 */ - "TM8000\0" /* 1 refs @ 42137 */ - "LongRun\0" /* 1 refs @ 42144 */ - "SDRAM\0" /* 1 refs @ 42152 */ - "BIOS\0" /* 1 refs @ 42158 */ - "4DWAVE\0" /* 2 refs @ 42163 */ - "DX\0" /* 1 refs @ 42170 */ - "NX\0" /* 1 refs @ 42173 */ - "CyberBlade\0" /* 2 refs @ 42176 */ - "TGUI\0" /* 8 refs @ 42187 */ - "9320\0" /* 1 refs @ 42192 */ - "9360\0" /* 1 refs @ 42197 */ - "CYBER\0" /* 3 refs @ 42202 */ - "9397\0" /* 1 refs @ 42208 */ - "9397DVD\0" /* 1 refs @ 42213 */ - "9420\0" /* 1 refs @ 42221 */ - "9440\0" /* 1 refs @ 42226 */ - "9525\0" /* 1 refs @ 42231 */ - "9660\0" /* 1 refs @ 42236 */ - "9680\0" /* 1 refs @ 42241 */ - "9682\0" /* 1 refs @ 42246 */ - "HPT343/345\0" /* 1 refs @ 42251 */ - "HPT366/370/372\0" /* 1 refs @ 42262 */ - "HPT372A\0" /* 1 refs @ 42277 */ - "HPT302\0" /* 1 refs @ 42285 */ - "HPT371\0" /* 1 refs @ 42292 */ - "HPT374\0" /* 1 refs @ 42299 */ - "HPT372N\0" /* 1 refs @ 42306 */ - "RocketRAID\0" /* 2 refs @ 42314 */ - "2310\0" /* 1 refs @ 42325 */ - "card\0" /* 2 refs @ 42330 */ - "2720\0" /* 1 refs @ 42335 */ - "Pyramid3D\0" /* 1 refs @ 42340 */ - "TR25202\0" /* 1 refs @ 42350 */ - "ET4000w32p\0" /* 4 refs @ 42358 */ - "ET6000\0" /* 1 refs @ 42369 */ - "UM82C881\0" /* 1 refs @ 42376 */ - "486\0" /* 2 refs @ 42385 */ - "UM82C886\0" /* 1 refs @ 42389 */ - "UM8673F\0" /* 1 refs @ 42398 */ - "UM8881\0" /* 1 refs @ 42406 */ - "UM82C891\0" /* 1 refs @ 42413 */ - "UM886A\0" /* 1 refs @ 42422 */ - "UM8886BF\0" /* 1 refs @ 42429 */ - "UM8710\0" /* 1 refs @ 42438 */ - "UM8886\0" /* 1 refs @ 42445 */ - "UM8881F\0" /* 1 refs @ 42452 */ - "PCI-Host\0" /* 1 refs @ 42460 */ - "UM8886F\0" /* 1 refs @ 42469 */ - "UM8886A\0" /* 1 refs @ 42477 */ - "UM8891A\0" /* 1 refs @ 42485 */ - "UM9017F\0" /* 1 refs @ 42493 */ - "UM8886N\0" /* 1 refs @ 42501 */ - "UM8891N\0" /* 1 refs @ 42509 */ - "US201\0" /* 1 refs @ 42517 */ - "Voice\0" /* 1 refs @ 42523 */ - "(WinModem)\0" /* 1 refs @ 42529 */ - "3CP5609\0" /* 1 refs @ 42540 */ - "USR997902\0" /* 1 refs @ 42548 */ - "V292PBCPSC\0" /* 1 refs @ 42558 */ - "Am29K\0" /* 1 refs @ 42569 */ - "Local\0" /* 1 refs @ 42575 */ - "V292PBC\0" /* 1 refs @ 42581 */ - "AMD290x0\0" /* 1 refs @ 42589 */ - "V960PBC\0" /* 1 refs @ 42598 */ - "V96DPC\0" /* 1 refs @ 42606 */ - "(Dual)\0" /* 1 refs @ 42613 */ - "VT6305\0" /* 1 refs @ 42620 */ - "K8M800\0" /* 1 refs @ 42627 */ - "K8T890\0" /* 7 refs @ 42634 */ - "KT880\0" /* 6 refs @ 42641 */ - "K8HTB\0" /* 3 refs @ 42647 */ - "VT8363\0" /* 2 refs @ 42653 */ - "(Apollo\0" /* 24 refs @ 42660 */ - "KT133)\0" /* 2 refs @ 42668 */ - "VT3351\0" /* 7 refs @ 42675 */ - "VX800/VX820\0" /* 13 refs @ 42682 */ - "CN896/P4M900\0" /* 10 refs @ 42694 */ - "VT8371\0" /* 2 refs @ 42707 */ - "KX133)\0" /* 2 refs @ 42714 */ - "VX900\0" /* 16 refs @ 42721 */ - "VT8501\0" /* 2 refs @ 42727 */ - "MVP4)\0" /* 2 refs @ 42734 */ - "VT82C505\0" /* 1 refs @ 42740 */ - "(Pluto)\0" /* 1 refs @ 42749 */ - "VT82C561\0" /* 1 refs @ 42757 */ - "VT82C586A\0" /* 1 refs @ 42766 */ - "VT82C576\0" /* 1 refs @ 42776 */ - "3V\0" /* 1 refs @ 42785 */ - "CX700\0" /* 2 refs @ 42788 */ - "VT82C580\0" /* 1 refs @ 42794 */ - "VP)\0" /* 1 refs @ 42803 */ - "VT82C586\0" /* 3 refs @ 42807 */ - "VT8237A\0" /* 4 refs @ 42816 */ - "VT82C595\0" /* 2 refs @ 42824 */ - "VP2)\0" /* 2 refs @ 42833 */ - "VT82C596A\0" /* 1 refs @ 42838 */ - "VT82C597\0" /* 2 refs @ 42848 */ - "VP3)\0" /* 2 refs @ 42857 */ - "VT82C598\0" /* 2 refs @ 42862 */ - "MVP3)\0" /* 2 refs @ 42871 */ - "VT8605\0" /* 2 refs @ 42877 */ - "ProMedia\0" /* 2 refs @ 42884 */ - "133)\0" /* 2 refs @ 42893 */ - "VT82C686A\0" /* 4 refs @ 42898 */ - "VT82C691\0" /* 1 refs @ 42908 */ - "Pro)\0" /* 1 refs @ 42917 */ - "VT82C693\0" /* 1 refs @ 42922 */ - "Plus)\0" /* 1 refs @ 42931 */ - "VT86C926\0" /* 1 refs @ 42937 */ - "Amazon\0" /* 1 refs @ 42946 */ - "PCI-Ethernet\0" /* 1 refs @ 42953 */ - "VT82C570M\0" /* 2 refs @ 42966 */ - "(Apollo)\0" /* 2 refs @ 42976 */ - "HC3\0" /* 1 refs @ 42985 */ - "VT6105M_BOM\0" /* 1 refs @ 42989 */ - "(Rhine\0" /* 4 refs @ 43001 */ - "VT8251\0" /* 6 refs @ 43008 */ - "Port1\0" /* 1 refs @ 43015 */ - "Port2\0" /* 1 refs @ 43021 */ - "VLINK\0" /* 1 refs @ 43027 */ - "VT83C572\0" /* 1 refs @ 43033 */ - "VT3043\0" /* 1 refs @ 43042 */ - "(Rhine)\0" /* 1 refs @ 43049 */ - "VT6306\0" /* 1 refs @ 43057 */ - "VT6105M\0" /* 1 refs @ 43064 */ - "VT8233/VT8235\0" /* 1 refs @ 43072 */ - "VT6102\0" /* 1 refs @ 43086 */ - "MC-97\0" /* 1 refs @ 43093 */ - "VT8233\0" /* 1 refs @ 43099 */ - "VT8366\0" /* 2 refs @ 43106 */ - "KT266)\0" /* 2 refs @ 43113 */ - "CPU-PCI\0" /* 3 refs @ 43120 */ - "VT8653\0" /* 1 refs @ 43128 */ - "266T)\0" /* 1 refs @ 43135 */ - "VT8237\0" /* 4 refs @ 43141 */ - "VT6105\0" /* 1 refs @ 43148 */ - "VT612X\0" /* 1 refs @ 43155 */ - "(Velocity)\0" /* 1 refs @ 43162 */ - "VT8623\0" /* 2 refs @ 43173 */ - "CLE266)\0" /* 2 refs @ 43180 */ - "VT8233A\0" /* 1 refs @ 43188 */ - "VT6410\0" /* 1 refs @ 43196 */ - "VT8235\0" /* 1 refs @ 43203 */ - "KT400)\0" /* 1 refs @ 43210 */ - "VT8377\0" /* 2 refs @ 43217 */ - "KT400\0" /* 1 refs @ 43224 */ - "VT8378\0" /* 2 refs @ 43230 */ - "KM400\0" /* 2 refs @ 43237 */ - "VT6421\0" /* 1 refs @ 43243 */ - "VT8237A/VT8251\0" /* 1 refs @ 43250 */ - "VT8237A/VT82C586A\0" /* 1 refs @ 43265 */ - "VT3314\0" /* 1 refs @ 43283 */ - "CN900\0" /* 1 refs @ 43290 */ - "UniChrome\0" /* 2 refs @ 43296 */ - "VT8237R\0" /* 1 refs @ 43306 */ - "Chrome9\0" /* 1 refs @ 43314 */ - "HC\0" /* 1 refs @ 43322 */ - "VT8237S\0" /* 3 refs @ 43325 */ - "VL80x\0" /* 1 refs @ 43333 */ - "VL805\0" /* 1 refs @ 43339 */ - "CX700M2/VX700\0" /* 1 refs @ 43345 */ - "VT86C100A\0" /* 1 refs @ 43359 */ - "(Rhine-II)\0" /* 1 refs @ 43369 */ - "[Chrome9\0" /* 1 refs @ 43380 */ - "HD]\0" /* 1 refs @ 43389 */ - "North-South\0" /* 2 refs @ 43393 */ - "VT8231\0" /* 2 refs @ 43405 */ - "VX855\0" /* 1 refs @ 43412 */ - "CPU-AGP\0" /* 7 refs @ 43418 */ - "VX8xx/VX900\0" /* 2 refs @ 43426 */ - "South-North\0" /* 1 refs @ 43438 */ - "VT8633\0" /* 1 refs @ 43450 */ - "266)\0" /* 1 refs @ 43457 */ - "VT8377CE\0" /* 1 refs @ 43462 */ - "G0\0" /* 1 refs @ 43471 */ - "Layer\0" /* 1 refs @ 43474 */ - "Electrical\0" /* 1 refs @ 43480 */ - "Sub-block\0" /* 1 refs @ 43491 */ - "Guest\0" /* 1 refs @ 43501 */ - "Service\0" /* 1 refs @ 43507 */ - "GDT6000/6020/6050\0" /* 1 refs @ 43515 */ - "GDT6000B/6010\0" /* 1 refs @ 43533 */ - "GDT6110/6510\0" /* 1 refs @ 43547 */ - "GDT6120/6520\0" /* 1 refs @ 43560 */ - "GDT6530\0" /* 1 refs @ 43573 */ - "GDT6550\0" /* 1 refs @ 43581 */ - "GDT6117/6517\0" /* 1 refs @ 43589 */ - "GDT6127/6527\0" /* 1 refs @ 43602 */ - "GDT6537\0" /* 1 refs @ 43615 */ - "GDT6557/6557-ECC\0" /* 1 refs @ 43623 */ - "GDT6115/6515\0" /* 1 refs @ 43640 */ - "GDT6125/6525\0" /* 1 refs @ 43653 */ - "GDT6535\0" /* 1 refs @ 43666 */ - "GDT6555/6555-ECC\0" /* 1 refs @ 43674 */ - "GDT6[15]17RP\0" /* 1 refs @ 43691 */ - "GDT6[15]27RP\0" /* 1 refs @ 43704 */ - "GDT6537RP\0" /* 1 refs @ 43717 */ - "GDT6557RP\0" /* 1 refs @ 43727 */ - "GDT6[15]11RP\0" /* 1 refs @ 43737 */ - "GDT6[15]21RP\0" /* 1 refs @ 43750 */ - "GDT6[15]17RD\0" /* 1 refs @ 43763 */ - "GDT6[5]127RD\0" /* 1 refs @ 43776 */ - "GDT6537RD\0" /* 1 refs @ 43789 */ - "GDT6557RD\0" /* 1 refs @ 43799 */ - "GDT6[15]11RD\0" /* 1 refs @ 43809 */ - "GDT6[15]21RD\0" /* 1 refs @ 43822 */ - "GDT6[156]18RD\0" /* 1 refs @ 43835 */ - "GDT6[156]28RD\0" /* 1 refs @ 43849 */ - "GDT6[56]38RD\0" /* 1 refs @ 43863 */ - "GDT6[56]58RD\0" /* 1 refs @ 43876 */ - "GDT6[15]17RP2\0" /* 1 refs @ 43889 */ - "GDT6[15]27RP2\0" /* 1 refs @ 43903 */ - "GDT6537RP2\0" /* 1 refs @ 43917 */ - "GDT6[15]11RP2\0" /* 1 refs @ 43928 */ - "GDT6[15]21RP2\0" /* 1 refs @ 43942 */ - "GDT6513RS\0" /* 1 refs @ 43956 */ - "GDT6523RS\0" /* 1 refs @ 43966 */ - "GDT6518RS\0" /* 1 refs @ 43976 */ - "GDT6x28RS\0" /* 1 refs @ 43986 */ - "GDT6x38RS\0" /* 1 refs @ 43996 */ - "GDT6x58RS\0" /* 1 refs @ 44006 */ - "GDT6x33RS\0" /* 1 refs @ 44016 */ - "GDT6x43RS\0" /* 1 refs @ 44026 */ - "GDT6x53RS\0" /* 1 refs @ 44036 */ - "GDT6x63RS\0" /* 1 refs @ 44046 */ - "GDT7x13RN\0" /* 1 refs @ 44056 */ - "GDT7x23RN\0" /* 1 refs @ 44066 */ - "GDT7[156]18RN\0" /* 1 refs @ 44076 */ - "GDT7[156]28RN\0" /* 1 refs @ 44090 */ - "GDT7[56]38RN\0" /* 1 refs @ 44104 */ - "GDT7[56]58RN\0" /* 1 refs @ 44117 */ - "GDT7[56]43RN\0" /* 1 refs @ 44130 */ - "GDT7x53RN\0" /* 1 refs @ 44143 */ - "GDT7x63RN\0" /* 1 refs @ 44153 */ - "GDT4x13RZ\0" /* 1 refs @ 44163 */ - "GDT4x23RZ\0" /* 1 refs @ 44173 */ - "GDT8x13RZ\0" /* 1 refs @ 44183 */ - "GDT8x23RZ\0" /* 1 refs @ 44193 */ - "GDT8x33RZ\0" /* 1 refs @ 44203 */ - "GDT8x43RZ\0" /* 1 refs @ 44213 */ - "GDT8x53RZ\0" /* 1 refs @ 44223 */ - "GDT8x63RZ\0" /* 1 refs @ 44233 */ - "GDT6[56]19RD\0" /* 1 refs @ 44243 */ - "GDT6[56]29RD\0" /* 1 refs @ 44256 */ - "GDT7[56]19RN\0" /* 1 refs @ 44269 */ - "GDT7[56]29RN\0" /* 1 refs @ 44282 */ - "ICP\0" /* 1 refs @ 44295 */ - "82C592\0" /* 1 refs @ 44299 */ - "82C593\0" /* 1 refs @ 44306 */ - "82C594\0" /* 1 refs @ 44313 */ - "Wildcat\0" /* 2 refs @ 44320 */ - "82C596/597\0" /* 1 refs @ 44328 */ - "82C541\0" /* 1 refs @ 44339 */ - "82C543\0" /* 1 refs @ 44346 */ - "82C532\0" /* 1 refs @ 44353 */ - "82C534\0" /* 1 refs @ 44360 */ - "82C535\0" /* 1 refs @ 44367 */ - "82C147\0" /* 1 refs @ 44374 */ - "82C975\0" /* 1 refs @ 44381 */ - "82C925\0" /* 1 refs @ 44388 */ - "SVGA\0" /* 2 refs @ 44395 */ - "Machine\0" /* 1 refs @ 44400 */ - "Communication\0" /* 1 refs @ 44408 */ - "82545EM\0" /* 1 refs @ 44422 */ - "82546EB\0" /* 1 refs @ 44430 */ - "PVSCSI\0" /* 1 refs @ 44438 */ - "VMI\0" /* 1 refs @ 44445 */ - "option\0" /* 1 refs @ 44449 */ - "ROM\0" /* 1 refs @ 44456 */ - "P9000\0" /* 1 refs @ 44460 */ - "P9100\0" /* 1 refs @ 44466 */ - "WD33C193A\0" /* 1 refs @ 44472 */ - "WD33C196A\0" /* 1 refs @ 44482 */ - "WD33C197A\0" /* 1 refs @ 44492 */ - "WD7193\0" /* 1 refs @ 44502 */ - "WD7197\0" /* 1 refs @ 44509 */ - "WD33C296A\0" /* 1 refs @ 44516 */ - "WD34C296\0" /* 1 refs @ 44526 */ - "90C\0" /* 1 refs @ 44535 */ - "W83769F\0" /* 1 refs @ 44539 */ - "W83C553F\0" /* 2 refs @ 44547 */ - "W83628F\0" /* 1 refs @ 44556 */ - "W89C840F\0" /* 1 refs @ 44564 */ - "W89C940F\0" /* 2 refs @ 44573 */ - "W6692\0" /* 1 refs @ 44582 */ - "NinjaSCSI-32UDE\0" /* 5 refs @ 44588 */ - "(KME)\0" /* 3 refs @ 44604 */ - "(IODATA)\0" /* 1 refs @ 44610 */ - "(LOGITEC)\0" /* 1 refs @ 44619 */ - "(LOGITEC2)\0" /* 1 refs @ 44629 */ - "(BUFFALO)\0" /* 2 refs @ 44640 */ - "CF32A\0" /* 2 refs @ 44650 */ - "CompactFlash\0" /* 1 refs @ 44656 */ - "CF\0" /* 1 refs @ 44669 */ - "NPATA-32\0" /* 1 refs @ 44672 */ - "Xen\0" /* 1 refs @ 44681 */ - "Volari\0" /* 5 refs @ 44685 */ - "Z7/Z9/Z9s\0" /* 1 refs @ 44692 */ - "Z9m\0" /* 1 refs @ 44702 */ - "Z11/Z11M\0" /* 1 refs @ 44706 */ - "V3XT/V5/V8\0" /* 1 refs @ 44715 */ - "XP10\0" /* 1 refs @ 44726 */ - "X3201-3\0" /* 2 refs @ 44731 */ - "(21143)\0" /* 1 refs @ 44739 */ - "WinGlobal\0" /* 1 refs @ 44747 */ - "724\0" /* 1 refs @ 44757 */ - "740C\0" /* 1 refs @ 44761 */ - "(DS-1)\0" /* 2 refs @ 44766 */ - "724F\0" /* 1 refs @ 44773 */ - "744\0" /* 1 refs @ 44778 */ - "(DS-1S)\0" /* 1 refs @ 44782 */ - "754\0" /* 1 refs @ 44790 */ - "(DS-1E)\0" /* 1 refs @ 44794 */ - "1221\0" /* 1 refs @ 44802 */ - "PCI-ST32\0" /* 1 refs @ 44807 */ - "ZX-100\0" /* 10 refs @ 44816 */ - "ZX-100/ZX-200\0" /* 6 refs @ 44823 */ - "ZX-D\0" /* 2 refs @ 44837 */ - "KX-5000|6000(G)|7000\0" /* 13 refs @ 44842 */ - "KH-40000\0" /* 15 refs @ 44863 */ - "KX-5000|6000(G)\0" /* 2 refs @ 44872 */ - "ZX-200\0" /* 4 refs @ 44888 */ - "P2C\0" /* 1 refs @ 44895 */ - "ZX-D/ZX-E/KH-40000/KX-7000\0" /* 1 refs @ 44899 */ - "ZX-E\0" /* 2 refs @ 44926 */ - "C-320\0" /* 1 refs @ 44931 */ - "C-860\0" /* 1 refs @ 44937 */ - "KX-6000\0" /* 1 refs @ 44943 */ - "C-960\0" /* 1 refs @ 44951 */ - "KX-7000\0" /* 1 refs @ 44957 */ - "C-1190\0" /* 1 refs @ 44965 */ - "StorX\0" /* 1 refs @ 44972 */ - "KX-6000(G)|7000\0" /* 1 refs @ 44978 */ - "ZR36057\0" /* 1 refs @ 44994 */ - "ZR36120\0" /* 1 refs @ 45002 */ + "Etron\0" /* 1 refs @ 5290 */ + "Technology,\0" /* 1 refs @ 5296 */ + "Fresco\0" /* 1 refs @ 5308 */ + "Nanjing\0" /* 2 refs @ 5315 */ + "QinHeng\0" /* 2 refs @ 5323 */ + "(PCIe)\0" /* 3 refs @ 5331 */ + "HGST,\0" /* 1 refs @ 5338 */ + "Beijing\0" /* 1 refs @ 5344 */ + "Memblaze\0" /* 1 refs @ 5352 */ + "Co.\0" /* 1 refs @ 5361 */ + "Ltd.\0" /* 1 refs @ 5365 */ + "Amazon.com,\0" /* 1 refs @ 5370 */ + "Zhaoxin\0" /* 1 refs @ 5382 */ + "Aquantia\0" /* 1 refs @ 5390 */ + "Rockchip\0" /* 1 refs @ 5399 */ + "Raspberry\0" /* 1 refs @ 5408 */ + "Pi\0" /* 1 refs @ 5418 */ + "(Trading)\0" /* 1 refs @ 5421 */ + "Ampere\0" /* 1 refs @ 5431 */ + "HiNT\0" /* 1 refs @ 5438 */ + "3D\0" /* 19 refs @ 5443 */ + "Addtron\0" /* 1 refs @ 5446 */ + "NetXen\0" /* 1 refs @ 5454 */ + "(iCompression)\0" /* 1 refs @ 5461 */ + "Source\0" /* 1 refs @ 5476 */ + "NetVin\0" /* 1 refs @ 5483 */ + "Buslogic\0" /* 1 refs @ 5490 */ + "MediaQ\0" /* 1 refs @ 5499 */ + "Guillemot\0" /* 1 refs @ 5506 */ + "Turtle\0" /* 1 refs @ 5516 */ + "Beach\0" /* 1 refs @ 5523 */ + "S3\0" /* 2 refs @ 5529 */ + "XenSource,\0" /* 1 refs @ 5532 */ + "c't\0" /* 1 refs @ 5543 */ + "Magazin\0" /* 1 refs @ 5547 */ + "Decision\0" /* 1 refs @ 5555 */ + "Kurusugawa\0" /* 1 refs @ 5564 */ + "pcHDTV\0" /* 1 refs @ 5575 */ + "QUANCOM\0" /* 1 refs @ 5582 */ + "GmbH\0" /* 1 refs @ 5590 */ + "Intel\0" /* 3 refs @ 5595 */ + "VirtualBox\0" /* 1 refs @ 5601 */ + "ProLAN\0" /* 1 refs @ 5612 */ + "Computone\0" /* 1 refs @ 5619 */ + "KTI\0" /* 2 refs @ 5629 */ + "Adaptec\0" /* 2 refs @ 5633 */ + "Atronics\0" /* 1 refs @ 5641 */ + "Netmos\0" /* 1 refs @ 5650 */ + "Parallels\0" /* 1 refs @ 5657 */ + "Micron/Crucial\0" /* 1 refs @ 5667 */ + "Chrysalis-ITS\0" /* 1 refs @ 5682 */ + "Middle\0" /* 1 refs @ 5696 */ + "INVALID\0" /* 1 refs @ 5703 */ + "VENDOR\0" /* 1 refs @ 5711 */ + "ID\0" /* 1 refs @ 5718 */ + "3c985\0" /* 1 refs @ 5721 */ + "Gigabit\0" /* 150 refs @ 5727 */ + "Ethernet\0" /* 574 refs @ 5735 */ + "3c996\0" /* 1 refs @ 5744 */ + "10/100/1000\0" /* 49 refs @ 5750 */ + "3c556\0" /* 2 refs @ 5762 */ + "V.90\0" /* 1 refs @ 5768 */ + "Mini-PCI\0" /* 15 refs @ 5773 */ + "Modem\0" /* 33 refs @ 5782 */ + "3c940\0" /* 1 refs @ 5788 */ + "3c339\0" /* 1 refs @ 5794 */ + "TokenLink\0" /* 2 refs @ 5800 */ + "Velocity\0" /* 2 refs @ 5810 */ + "3c359\0" /* 1 refs @ 5819 */ + "XL\0" /* 8 refs @ 5825 */ + "3c450-TX\0" /* 1 refs @ 5828 */ + "10/100\0" /* 116 refs @ 5837 */ + "3c555\0" /* 1 refs @ 5844 */ + "3c575-TX\0" /* 1 refs @ 5850 */ + "3CCFE575BT\0" /* 1 refs @ 5859 */ + "3CCFE575CT\0" /* 1 refs @ 5870 */ + "3c590\0" /* 1 refs @ 5881 */ + "3c595-TX\0" /* 1 refs @ 5887 */ + "3c595-T4\0" /* 1 refs @ 5896 */ + "3c595-MII\0" /* 1 refs @ 5905 */ + "3CRWE154G72\0" /* 1 refs @ 5915 */ + "Adapter\0" /* 104 refs @ 5927 */ + "3c556B\0" /* 1 refs @ 5935 */ + "3CCFEM656\0" /* 2 refs @ 5942 */ + "56k\0" /* 5 refs @ 5952 */ + "3CCFEM656B\0" /* 2 refs @ 5956 */ + "3CXFEM656C\0" /* 2 refs @ 5967 */ + "3cSOHO100-TX\0" /* 1 refs @ 5978 */ + "3crwe777a\0" /* 1 refs @ 5991 */ + "AirConnect\0" /* 1 refs @ 6001 */ + "3c804\0" /* 1 refs @ 6012 */ + "FDDILink\0" /* 1 refs @ 6018 */ + "SAS\0" /* 18 refs @ 6027 */ + "Token\0" /* 8 refs @ 6031 */ + "Ring\0" /* 18 refs @ 6037 */ + "3c900-TPO\0" /* 1 refs @ 6042 */ + "3c900-COMBO\0" /* 1 refs @ 6052 */ + "3c900B-TPO\0" /* 1 refs @ 6064 */ + "3c900B-COMBO\0" /* 1 refs @ 6075 */ + "3c900B-TPC\0" /* 1 refs @ 6088 */ + "3c905-TX\0" /* 1 refs @ 6099 */ + "3c905-T4\0" /* 1 refs @ 6108 */ + "3c905B-TX\0" /* 1 refs @ 6117 */ + "3c905B-T4\0" /* 1 refs @ 6127 */ + "3c905B-COMBO\0" /* 1 refs @ 6137 */ + "3c905B-FX\0" /* 1 refs @ 6150 */ + "100\0" /* 100 refs @ 6160 */ + "3c905C-TX\0" /* 1 refs @ 6164 */ + "w/\0" /* 48 refs @ 6174 */ + "mngmt\0" /* 2 refs @ 6177 */ + "3c905CX-TX\0" /* 1 refs @ 6183 */ + "3c920B-EMB-WNM\0" /* 1 refs @ 6194 */ + "3c910\0" /* 1 refs @ 6209 */ + "OfficeConnect\0" /* 1 refs @ 6215 */ + "10/100B\0" /* 1 refs @ 6229 */ + "3c980\0" /* 1 refs @ 6237 */ + "Server\0" /* 5 refs @ 6243 */ + "3c980C-TXM\0" /* 1 refs @ 6250 */ + "3c990-TX\0" /* 1 refs @ 6261 */ + "3XP\0" /* 8 refs @ 6270 */ + "3CR990-TX-95\0" /* 1 refs @ 6274 */ + "3CR990-TX-97\0" /* 1 refs @ 6287 */ + "3c990B\0" /* 1 refs @ 6300 */ + "3CR990-FX\0" /* 1 refs @ 6307 */ + "3CR990-SVR-95\0" /* 1 refs @ 6317 */ + "3CR990-SVR-97\0" /* 1 refs @ 6331 */ + "3c990BSVR\0" /* 1 refs @ 6345 */ + "Voodoo\0" /* 2 refs @ 6355 */ + "Voodoo2\0" /* 1 refs @ 6362 */ + "Banshee\0" /* 1 refs @ 6370 */ + "Voodoo3\0" /* 1 refs @ 6378 */ + "4/5\0" /* 2 refs @ 6386 */ + "GLINT\0" /* 9 refs @ 6390 */ + "300SX\0" /* 1 refs @ 6396 */ + "500TX\0" /* 1 refs @ 6402 */ + "DELTA\0" /* 1 refs @ 6408 */ + "Permedia\0" /* 5 refs @ 6414 */ + "500MX\0" /* 1 refs @ 6423 */ + "2\0" /* 162 refs @ 6429 */ + "GAMMA\0" /* 1 refs @ 6431 */ + "2V\0" /* 1 refs @ 6437 */ + "3\0" /* 100 refs @ 6440 */ + "WILDCAT\0" /* 1 refs @ 6442 */ + "5110\0" /* 1 refs @ 6450 */ + "Escalade\0" /* 2 refs @ 6455 */ + "ATA\0" /* 51 refs @ 6464 */ + "RAID\0" /* 65 refs @ 6468 */ + "Controller\0" /* 1096 refs @ 6473 */ + "7000/8000\0" /* 1 refs @ 6484 */ + "Series\0" /* 904 refs @ 6494 */ + "9000\0" /* 6 refs @ 6501 */ + "9550\0" /* 1 refs @ 6506 */ + "9650\0" /* 1 refs @ 6511 */ + "9690\0" /* 1 refs @ 6516 */ + "9750\0" /* 1 refs @ 6521 */ + "FE2500\0" /* 1 refs @ 6526 */ + "PCM200\0" /* 2 refs @ 6533 */ + "FE2000VX\0" /* 1 refs @ 6540 */ + "(OEM)\0" /* 1 refs @ 6549 */ + "FE2500MX\0" /* 1 refs @ 6555 */ + "ACCM\0" /* 1 refs @ 6564 */ + "2188\0" /* 1 refs @ 6569 */ + "VL-PCI\0" /* 3 refs @ 6574 */ + "Bridge\0" /* 723 refs @ 6581 */ + "2051\0" /* 2 refs @ 6588 */ + "Single\0" /* 11 refs @ 6593 */ + "Solution\0" /* 2 refs @ 6600 */ + "(host\0" /* 1 refs @ 6609 */ + "Bridge)\0" /* 2 refs @ 6615 */ + "(ISA\0" /* 1 refs @ 6623 */ + "ATP850U/UF\0" /* 1 refs @ 6628 */ + "UDMA\0" /* 6 refs @ 6639 */ + "IDE\0" /* 104 refs @ 6644 */ + "ATP860\0" /* 1 refs @ 6648 */ + "ATP860-A\0" /* 1 refs @ 6655 */ + "ATP865\0" /* 1 refs @ 6664 */ + "ATP865-A\0" /* 1 refs @ 6671 */ + "AEC6710\0" /* 1 refs @ 6680 */ + "SCSI\0" /* 28 refs @ 6688 */ + "AEC6712UW\0" /* 1 refs @ 6693 */ + "AEC6712U\0" /* 1 refs @ 6703 */ + "AEC6712S\0" /* 1 refs @ 6712 */ + "AEC6710D\0" /* 1 refs @ 6721 */ + "AEC6715UW\0" /* 1 refs @ 6730 */ + "MPX\0" /* 2 refs @ 6740 */ + "5030/5038\0" /* 1 refs @ 6744 */ + "EN2242\0" /* 1 refs @ 6754 */ + "M1435\0" /* 1 refs @ 6761 */ + "PCI-16[12]0\0" /* 1 refs @ 6767 */ + "serial\0" /* 13 refs @ 6779 */ + "PCI-1604\0" /* 1 refs @ 6786 */ + "PCI-1610\0" /* 1 refs @ 6795 */ + "4\0" /* 75 refs @ 6804 */ + "port\0" /* 19 refs @ 6806 */ + "PCI-1612\0" /* 1 refs @ 6811 */ + "PCI-1620\0" /* 2 refs @ 6820 */ + "8\0" /* 56 refs @ 6829 */ + "(1-4)\0" /* 1 refs @ 6831 */ + "(5-8)\0" /* 1 refs @ 6837 */ + "M1445\0" /* 1 refs @ 6843 */ + "M1449\0" /* 1 refs @ 6849 */ + "PCI-ISA\0" /* 52 refs @ 6855 */ + "M1451\0" /* 1 refs @ 6863 */ + "Host-PCI\0" /* 43 refs @ 6869 */ + "M1461\0" /* 1 refs @ 6878 */ + "M1531\0" /* 1 refs @ 6884 */ + "M1533\0" /* 1 refs @ 6890 */ + "M1541\0" /* 1 refs @ 6896 */ + "M1543\0" /* 1 refs @ 6902 */ + "M1563\0" /* 1 refs @ 6908 */ + "M1647\0" /* 1 refs @ 6914 */ + "M1689\0" /* 1 refs @ 6920 */ + "M3309\0" /* 1 refs @ 6926 */ + "MPEG\0" /* 3 refs @ 6932 */ + "Decoder\0" /* 30 refs @ 6937 */ + "M4803\0" /* 1 refs @ 6945 */ + "M5229\0" /* 1 refs @ 6951 */ + "M5237\0" /* 1 refs @ 6957 */ + "USB\0" /* 268 refs @ 6963 */ + "1.1\0" /* 1 refs @ 6967 */ + "Host\0" /* 419 refs @ 6971 */ + "M5239\0" /* 1 refs @ 6976 */ + "2.0\0" /* 11 refs @ 6982 */ + "M5243\0" /* 1 refs @ 6986 */ + "PCI-AGP\0" /* 2 refs @ 6992 */ + "M5247\0" /* 1 refs @ 7000 */ + "M5249\0" /* 1 refs @ 7006 */ + "Hypertransport\0" /* 1 refs @ 7012 */ + "to\0" /* 36 refs @ 7027 */ + "M5257\0" /* 1 refs @ 7030 */ + "M5261\0" /* 1 refs @ 7036 */ + "M5288\0" /* 1 refs @ 7042 */ + "SATA/Raid\0" /* 1 refs @ 7048 */ + "M5451\0" /* 1 refs @ 7058 */ + "AC-Link\0" /* 3 refs @ 7064 */ + "Audio\0" /* 170 refs @ 7072 */ + "M5453\0" /* 1 refs @ 7078 */ + "M5455\0" /* 1 refs @ 7084 */ + "M7101\0" /* 1 refs @ 7090 */ + "Management\0" /* 33 refs @ 7096 */ + "AIC-1160\0" /* 1 refs @ 7107 */ + "AIC-7850\0" /* 1 refs @ 7116 */ + "AIC-7855\0" /* 1 refs @ 7125 */ + "AIC-5900\0" /* 1 refs @ 7134 */ + "ATM\0" /* 13 refs @ 7143 */ + "AIC-5905\0" /* 1 refs @ 7147 */ + "APA-1480\0" /* 1 refs @ 7156 */ + "Ultra\0" /* 28 refs @ 7165 */ + "AIC-7860\0" /* 1 refs @ 7171 */ + "AHA-2940A\0" /* 1 refs @ 7180 */ + "AIC-6915\0" /* 1 refs @ 7190 */ + "AIC-7870\0" /* 1 refs @ 7199 */ + "AHA-2940\0" /* 3 refs @ 7208 */ + "AHA-3940\0" /* 2 refs @ 7217 */ + "AHA-3985\0" /* 1 refs @ 7226 */ + "AHA-2944\0" /* 2 refs @ 7235 */ + "AIC-7895\0" /* 1 refs @ 7244 */ + "AIC-7880\0" /* 1 refs @ 7253 */ + "AHA-389X\0" /* 1 refs @ 7262 */ + "Pro\0" /* 85 refs @ 7271 */ + "AHA-2940U2\0" /* 1 refs @ 7275 */ + "U2\0" /* 6 refs @ 7286 */ + "AHA-2930U2\0" /* 1 refs @ 7289 */ + "AIC-7890/1\0" /* 1 refs @ 7300 */ + "AHA-3950U2B\0" /* 1 refs @ 7311 */ + "AHA-3950U2D\0" /* 1 refs @ 7323 */ + "AIC-7896/7\0" /* 1 refs @ 7335 */ + "AIC-7892A\0" /* 1 refs @ 7346 */ + "U160\0" /* 8 refs @ 7356 */ + "AIC-7892B\0" /* 1 refs @ 7361 */ + "AIC-7892D\0" /* 1 refs @ 7371 */ + "AIC-7892P\0" /* 1 refs @ 7381 */ + "AIC-7899A\0" /* 1 refs @ 7391 */ + "AIC-7899B\0" /* 1 refs @ 7401 */ + "AIC-7899D\0" /* 1 refs @ 7411 */ + "AIC-7899F\0" /* 1 refs @ 7421 */ + "AIC-7899P\0" /* 1 refs @ 7431 */ + "1420SA\0" /* 1 refs @ 7441 */ + "1430SA\0" /* 1 refs @ 7448 */ + "ServeRAID\0" /* 4 refs @ 7455 */ + "6/7\0" /* 1 refs @ 7465 */ + "(marco)\0" /* 1 refs @ 7469 */ + "AAC-2622\0" /* 1 refs @ 7477 */ + "ASR-2200S\0" /* 2 refs @ 7486 */ + "ASR-2120S\0" /* 1 refs @ 7496 */ + "ASR-2410SA\0" /* 1 refs @ 7506 */ + "AAR-2810SA\0" /* 1 refs @ 7517 */ + "5445\0" /* 1 refs @ 7528 */ + "5805\0" /* 2 refs @ 7533 */ + "5085\0" /* 1 refs @ 7538 */ + "3405\0" /* 1 refs @ 7543 */ + "3805\0" /* 1 refs @ 7548 */ + "2405\0" /* 1 refs @ 7553 */ + "2445\0" /* 1 refs @ 7558 */ + "2805\0" /* 1 refs @ 7563 */ + "AAC-364\0" /* 1 refs @ 7568 */ + "ASR-5400S\0" /* 1 refs @ 7576 */ + "PERC\0" /* 23 refs @ 7586 */ + "2/QC\0" /* 1 refs @ 7591 */ + "3/QC\0" /* 1 refs @ 7596 */ + "HP\0" /* 1 refs @ 7601 */ + "M110\0" /* 1 refs @ 7604 */ + "G2\0" /* 1 refs @ 7609 */ + "ASR-2610SA\0" /* 1 refs @ 7612 */ + "Rhine\0" /* 2 refs @ 7623 */ + "II\0" /* 35 refs @ 7629 */ + "8139\0" /* 3 refs @ 7632 */ + "AL981\0" /* 1 refs @ 7637 */ + "(Comet)\0" /* 1 refs @ 7643 */ + "AN983\0" /* 1 refs @ 7651 */ + "(Centaur-P)\0" /* 1 refs @ 7657 */ + "AN985\0" /* 1 refs @ 7669 */ + "(Centaur-C)\0" /* 1 refs @ 7675 */ + "Infineon\0" /* 1 refs @ 7687 */ + "ADM5120\0" /* 1 refs @ 7696 */ + "ADM8211\0" /* 1 refs @ 7704 */ + "11Mbps\0" /* 1 refs @ 7712 */ + "802.11b\0" /* 10 refs @ 7719 */ + "WLAN\0" /* 6 refs @ 7727 */ + "ADM9511\0" /* 1 refs @ 7732 */ + "(Centaur-II)\0" /* 2 refs @ 7740 */ + "ADM9513\0" /* 1 refs @ 7753 */ + "ABP-930/40UA\0" /* 1 refs @ 7761 */ + "ABP-940UW\0" /* 1 refs @ 7774 */ + "ASB-3940U2W\0" /* 1 refs @ 7784 */ + "ASB-3940U3W\0" /* 1 refs @ 7796 */ + "Tachyon\0" /* 4 refs @ 7808 */ + "DX2\0" /* 1 refs @ 7816 */ + "FC\0" /* 4 refs @ 7820 */ + "PC4500/PC4800\0" /* 1 refs @ 7823 */ + "PCI350\0" /* 1 refs @ 7837 */ + "PC4500\0" /* 1 refs @ 7844 */ + "PC4800\0" /* 1 refs @ 7851 */ + "MPI350\0" /* 1 refs @ 7858 */ + "SES1001T\0" /* 1 refs @ 7865 */ + "iSCSI\0" /* 7 refs @ 7874 */ + "Accelerator\0" /* 19 refs @ 7880 */ + "AT24\0" /* 1 refs @ 7892 */ + "AT25\0" /* 1 refs @ 7897 */ + "ACEnic\0" /* 4 refs @ 7902 */ + "1000baseSX\0" /* 11 refs @ 7909 */ + "1000baseT\0" /* 48 refs @ 7920 */ + "BCM5700\0" /* 2 refs @ 7930 */ + "BCM5701\0" /* 3 refs @ 7938 */ + "EP4CGX15BF14C8N\0" /* 1 refs @ 7946 */ + "AC1000\0" /* 1 refs @ 7962 */ + "AC1001\0" /* 1 refs @ 7969 */ + "AC9100\0" /* 1 refs @ 7976 */ + "AC1003\0" /* 1 refs @ 7983 */ + "NVMe\0" /* 31 refs @ 7990 */ + "SSD\0" /* 35 refs @ 7995 */ + "16650-compatible\0" /* 1 refs @ 7999 */ + "UART\0" /* 106 refs @ 8016 */ + "Elastic\0" /* 1 refs @ 8021 */ + "K8\0" /* 4 refs @ 8029 */ + "AMD64\0" /* 14 refs @ 8032 */ + "HyperTransport\0" /* 9 refs @ 8038 */ + "Configuration\0" /* 48 refs @ 8053 */ + "Address\0" /* 48 refs @ 8067 */ + "Map\0" /* 10 refs @ 8075 */ + "DRAM\0" /* 54 refs @ 8079 */ + "Miscellaneous\0" /* 9 refs @ 8084 */ + "Family10h\0" /* 5 refs @ 8098 */ + "Link\0" /* 52 refs @ 8108 */ + "1Ah/0xh\0" /* 22 refs @ 8113 */ + "Fabric\0" /* 80 refs @ 8121 */ + "Family11h\0" /* 5 refs @ 8128 */ + "Family15h\0" /* 32 refs @ 8138 */ + "Processor\0" /* 59 refs @ 8148 */ + "Function\0" /* 45 refs @ 8158 */ + "0\0" /* 162 refs @ 8167 */ + "1\0" /* 192 refs @ 8169 */ + "5\0" /* 49 refs @ 8171 */ + "Root\0" /* 330 refs @ 8173 */ + "Complex\0" /* 17 refs @ 8178 */ + "Port\0" /* 465 refs @ 8186 */ + "IOMMU\0" /* 13 refs @ 8191 */ + "Family16h\0" /* 19 refs @ 8197 */ + "GPP\0" /* 31 refs @ 8207 */ + "17h/7xh\0" /* 12 refs @ 8211 */ + "17h/6xh\0" /* 20 refs @ 8219 */ + "Family17h\0" /* 21 refs @ 8227 */ + "PCIe\0" /* 754 refs @ 8237 */ + "17h/Axh\0" /* 19 refs @ 8242 */ + "Dummy\0" /* 11 refs @ 8250 */ + "Crypto\0" /* 6 refs @ 8256 */ + "HD\0" /* 377 refs @ 8263 */ + "xHCI\0" /* 61 refs @ 8266 */ + "Family17h/7xh\0" /* 5 refs @ 8271 */ + "Reserved\0" /* 7 refs @ 8285 */ + "SPP\0" /* 1 refs @ 8294 */ + "3.0\0" /* 10 refs @ 8298 */ + "19h/7xh\0" /* 3 refs @ 8302 */ + "19h/1xh\0" /* 26 refs @ 8310 */ + "RCEC\0" /* 3 refs @ 8318 */ + "Internal\0" /* 11 refs @ 8323 */ + "Primary\0" /* 4 refs @ 8332 */ + "Non\0" /* 6 refs @ 8340 */ + "Transparent\0" /* 6 refs @ 8344 */ + "Secondary\0" /* 33 refs @ 8356 */ + "vNTB\0" /* 1 refs @ 8366 */ + "Swith\0" /* 2 refs @ 8371 */ + "NBIF\0" /* 1 refs @ 8377 */ + "DS\0" /* 1 refs @ 8382 */ + "in\0" /* 3 refs @ 8385 */ + "PSP\0" /* 2 refs @ 8388 */ + "ACP\0" /* 1 refs @ 8392 */ + "19h/6xh\0" /* 18 refs @ 8396 */ + "6\0" /* 58 refs @ 8404 */ + "7\0" /* 54 refs @ 8406 */ + "3.1\0" /* 11 refs @ 8408 */ + "Secure\0" /* 6 refs @ 8412 */ + "BIOmetric\0" /* 2 refs @ 8419 */ + "GPU\0" /* 16 refs @ 8429 */ + "Family14h\0" /* 6 refs @ 8433 */ + "North\0" /* 14 refs @ 8443 */ + "C-state\0" /* 4 refs @ 8449 */ + "Cryptographic\0" /* 2 refs @ 8457 */ + "Coprocessor\0" /* 3 refs @ 8471 */ + "3.2\0" /* 21 refs @ 8483 */ + "SW.US\0" /* 1 refs @ 8487 */ + "SW.DS\0" /* 1 refs @ 8493 */ + "ASP\0" /* 1 refs @ 8499 */ + "15h/6xh\0" /* 13 refs @ 8503 */ + "15h/7xh\0" /* 6 refs @ 8511 */ + "Family17h/1xh\0" /* 17 refs @ 8519 */ + "Platform\0" /* 2 refs @ 8533 */ + "Security\0" /* 16 refs @ 8542 */ + "17h/1xh\0" /* 1 refs @ 8551 */ + "I2S\0" /* 4 refs @ 8559 */ + "17h/9xh\0" /* 14 refs @ 8563 */ + "10GbE\0" /* 22 refs @ 8571 */ + "Bluetooth\0" /* 2 refs @ 8577 */ + "PCIE\0" /* 3 refs @ 8587 */ + "19h/5xh\0" /* 8 refs @ 8592 */ + "Family12h/14h\0" /* 8 refs @ 8600 */ + "Family12h\0" /* 8 refs @ 8614 */ + "GPP0\0" /* 1 refs @ 8624 */ + "Misc.\0" /* 1 refs @ 8629 */ + "Seattle\0" /* 3 refs @ 8635 */ + "PCnet-PCI\0" /* 1 refs @ 8643 */ + "PCnet-Home\0" /* 1 refs @ 8653 */ + "HomePNA\0" /* 4 refs @ 8664 */ + "Alchemy\0" /* 1 refs @ 8672 */ + "AM\0" /* 1 refs @ 8680 */ + "1771\0" /* 1 refs @ 8683 */ + "MBW\0" /* 1 refs @ 8688 */ + "PCscsi-PCI\0" /* 1 refs @ 8692 */ + "Geode\0" /* 3 refs @ 8703 */ + "LX\0" /* 6 refs @ 8709 */ + "VGA\0" /* 17 refs @ 8712 */ + "AES\0" /* 1 refs @ 8716 */ + "Block\0" /* 1 refs @ 8720 */ + "CS5536\0" /* 9 refs @ 8726 */ + "GeodeLink\0" /* 1 refs @ 8733 */ + "South\0" /* 10 refs @ 8743 */ + "Flash\0" /* 3 refs @ 8749 */ + "OHCI\0" /* 19 refs @ 8755 */ + "EHCI\0" /* 46 refs @ 8760 */ + "UDC\0" /* 1 refs @ 8765 */ + "UOC\0" /* 1 refs @ 8769 */ + "Elan\0" /* 1 refs @ 8773 */ + "SC520\0" /* 1 refs @ 8778 */ + "Hudson\0" /* 20 refs @ 8784 */ + "300\0" /* 114 refs @ 8791 */ + "X370\0" /* 2 refs @ 8795 */ + "SATA\0" /* 282 refs @ 8800 */ + "X399\0" /* 2 refs @ 8805 */ + "A320\0" /* 3 refs @ 8810 */ + "FCH\0" /* 14 refs @ 8815 */ + "AHCI\0" /* 98 refs @ 8819 */ + "(RAID\0" /* 9 refs @ 8824 */ + "mode)\0" /* 18 refs @ 8830 */ + "400\0" /* 125 refs @ 8836 */ + "500\0" /* 122 refs @ 8840 */ + "A520\0" /* 1 refs @ 8844 */ + "600\0" /* 115 refs @ 8849 */ + "Switch\0" /* 15 refs @ 8853 */ + "Upstream\0" /* 4 refs @ 8860 */ + "Downstream\0" /* 6 refs @ 8869 */ + "AMD751\0" /* 2 refs @ 8880 */ + "PCI-PCI\0" /* 81 refs @ 8887 */ + "IGR4\0" /* 2 refs @ 8895 */ + "AGP\0" /* 76 refs @ 8900 */ + "AMD762\0" /* 2 refs @ 8904 */ + "AMD761\0" /* 2 refs @ 8911 */ + "AMD755\0" /* 4 refs @ 8918 */ + "ACPI\0" /* 4 refs @ 8925 */ + "AMD756\0" /* 4 refs @ 8930 */ + "AMD766\0" /* 4 refs @ 8937 */ + "AMD768\0" /* 7 refs @ 8944 */ + "PCI-ISA/LPC\0" /* 1 refs @ 8951 */ + "EIDE\0" /* 3 refs @ 8963 */ + "AC97\0" /* 8 refs @ 8968 */ + "AMD8131\0" /* 2 refs @ 8973 */ + "PCI-X\0" /* 12 refs @ 8981 */ + "Tunnel\0" /* 1 refs @ 8987 */ + "IO\0" /* 18 refs @ 8994 */ + "Apic\0" /* 1 refs @ 8997 */ + "AMD8151\0" /* 2 refs @ 9002 */ + "AMD8123\0" /* 1 refs @ 9010 */ + "AMD8132\0" /* 1 refs @ 9018 */ + "IOAPIC\0" /* 4 refs @ 9026 */ + "AMD8111\0" /* 12 refs @ 9033 */ + "I/O\0" /* 59 refs @ 9041 */ + "Hub\0" /* 51 refs @ 9045 */ + "7461\0" /* 1 refs @ 9049 */ + "LPC\0" /* 206 refs @ 9054 */ + "SMBus\0" /* 88 refs @ 9058 */ + "MC97\0" /* 1 refs @ 9064 */ + "756b\0" /* 1 refs @ 9069 */ + "(IDE)\0" /* 3 refs @ 9074 */ + "(AHCI)\0" /* 29 refs @ 9080 */ + "(RAID)\0" /* 39 refs @ 9087 */ + "(RAID5)\0" /* 1 refs @ 9094 */ + "(AMD\0" /* 1 refs @ 9102 */ + "AHCI)\0" /* 1 refs @ 9107 */ + "SD\0" /* 12 refs @ 9113 */ + "X370/X399\0" /* 1 refs @ 9116 */ + "RS780\0" /* 8 refs @ 9126 */ + "RS785/RS880\0" /* 1 refs @ 9132 */ + "RS780/RS880\0" /* 5 refs @ 9144 */ + "(int\0" /* 2 refs @ 9156 */ + "gfx)\0" /* 2 refs @ 9161 */ + "(ext\0" /* 2 refs @ 9166 */ + "gfx\0" /* 2 refs @ 9171 */ + "0)\0" /* 5 refs @ 9175 */ + "PCI-PCIE\0" /* 9 refs @ 9178 */ + "(port\0" /* 6 refs @ 9187 */ + "1)\0" /* 6 refs @ 9193 */ + "2)\0" /* 7 refs @ 9196 */ + "3)\0" /* 4 refs @ 9199 */ + "4)\0" /* 6 refs @ 9202 */ + "5)\0" /* 2 refs @ 9205 */ + "(NB-SB\0" /* 3 refs @ 9208 */ + "link)\0" /* 1 refs @ 9215 */ + "MegaRAID\0" /* 27 refs @ 9221 */ + "eMAG\0" /* 8 refs @ 9230 */ + "AD1889\0" /* 1 refs @ 9235 */ + "SoundMAX\0" /* 1 refs @ 9242 */ + "ADSP-2141\0" /* 1 refs @ 9251 */ + "Bandit\0" /* 2 refs @ 9261 */ + "Grand\0" /* 1 refs @ 9268 */ + "Central\0" /* 4 refs @ 9274 */ + "Control\0" /* 57 refs @ 9282 */ + "PlanB\0" /* 1 refs @ 9290 */ + "OHare\0" /* 1 refs @ 9296 */ + "Heathrow\0" /* 1 refs @ 9302 */ + "Paddington\0" /* 1 refs @ 9311 */ + "UniNorth\0" /* 12 refs @ 9322 */ + "Firewire\0" /* 9 refs @ 9331 */ + "KeyLargo\0" /* 2 refs @ 9340 */ + "GMAC\0" /* 6 refs @ 9349 */ + "Pangea\0" /* 6 refs @ 9354 */ + "ATA/100\0" /* 1 refs @ 9361 */ + "Kauai\0" /* 1 refs @ 9369 */ + "Intrepid\0" /* 8 refs @ 9375 */ + "K2\0" /* 5 refs @ 9384 */ + "MAC-IO\0" /* 1 refs @ 9387 */ + "UATA\0" /* 1 refs @ 9394 */ + "U3\0" /* 6 refs @ 9399 */ + "Shasta\0" /* 8 refs @ 9402 */ + "FireWire\0" /* 3 refs @ 9409 */ + "AQC100\0" /* 1 refs @ 9418 */ + "10\0" /* 57 refs @ 9425 */ + "AQC113DEV\0" /* 1 refs @ 9428 */ + "AQC113\0" /* 1 refs @ 9438 */ + "AQC107\0" /* 1 refs @ 9445 */ + "AQC108\0" /* 1 refs @ 9452 */ + "AQC109\0" /* 1 refs @ 9459 */ + "2.5\0" /* 6 refs @ 9466 */ + "AQC111\0" /* 1 refs @ 9470 */ + "AQC116C\0" /* 1 refs @ 9477 */ + "AQC112\0" /* 1 refs @ 9485 */ + "AQC115C\0" /* 1 refs @ 9492 */ + "AQC113C\0" /* 1 refs @ 9500 */ + "AQC113CA\0" /* 1 refs @ 9508 */ + "AQC100S\0" /* 1 refs @ 9517 */ + "AQC107S\0" /* 1 refs @ 9525 */ + "AQC108S\0" /* 1 refs @ 9533 */ + "AQC109S\0" /* 1 refs @ 9541 */ + "AQC111S\0" /* 1 refs @ 9549 */ + "AQC112S\0" /* 1 refs @ 9557 */ + "AQC114CS\0" /* 1 refs @ 9565 */ + "AQC113CS\0" /* 1 refs @ 9574 */ + "D100\0" /* 1 refs @ 9583 */ + "D107\0" /* 1 refs @ 9588 */ + "D108\0" /* 1 refs @ 9593 */ + "D109\0" /* 1 refs @ 9598 */ + "1000PV\0" /* 1 refs @ 9603 */ + "2000PV\0" /* 1 refs @ 9610 */ + "2000MT\0" /* 1 refs @ 9617 */ + "ARC-1110\0" /* 1 refs @ 9624 */ + "ARC-1120\0" /* 1 refs @ 9633 */ + "ARC-1130\0" /* 1 refs @ 9642 */ + "ARC-1160\0" /* 1 refs @ 9651 */ + "ARC-1170\0" /* 1 refs @ 9660 */ + "ARC-1200\0" /* 2 refs @ 9669 */ + "rev\0" /* 6 refs @ 9678 */ + "ARC-1202\0" /* 1 refs @ 9682 */ + "ARC-1203\0" /* 1 refs @ 9691 */ + "ARC-1210\0" /* 1 refs @ 9700 */ + "ARC-1214\0" /* 1 refs @ 9709 */ + "ARC-1220\0" /* 1 refs @ 9718 */ + "ARC-1224\0" /* 1 refs @ 9727 */ + "ARC-1230\0" /* 1 refs @ 9736 */ + "ARC-1260\0" /* 1 refs @ 9745 */ + "ARC-1270\0" /* 1 refs @ 9754 */ + "ARC-1280\0" /* 1 refs @ 9763 */ + "ARC-1380\0" /* 1 refs @ 9772 */ + "ARC-1381\0" /* 1 refs @ 9781 */ + "ARC-1680\0" /* 1 refs @ 9790 */ + "ARC-1681\0" /* 1 refs @ 9799 */ + "ARC-1880\0" /* 1 refs @ 9808 */ + "ARC-1884\0" /* 1 refs @ 9817 */ + "ARC-1886\0" /* 1 refs @ 9826 */ + "AX88140A\0" /* 1 refs @ 9835 */ + "AX99100\0" /* 1 refs @ 9844 */ + "Multi\0" /* 4 refs @ 9852 */ + "ASM1061\0" /* 4 refs @ 9858 */ + "III\0" /* 13 refs @ 9866 */ + "ASM1062\0" /* 1 refs @ 9870 */ + "+\0" /* 6 refs @ 9878 */ + "JMB575\0" /* 1 refs @ 9880 */ + "Multiplier\0" /* 1 refs @ 9887 */ + "ASM106x\0" /* 1 refs @ 9898 */ + "ASM1042\0" /* 1 refs @ 9906 */ + "ASM1083/1085\0" /* 1 refs @ 9914 */ + "PCIe-PCI\0" /* 6 refs @ 9927 */ + "ASM1042A\0" /* 1 refs @ 9936 */ + "ASM1182E\0" /* 1 refs @ 9945 */ + "ASM1184E\0" /* 1 refs @ 9954 */ + "ASM1142\0" /* 1 refs @ 9963 */ + "ASM1143\0" /* 1 refs @ 9971 */ + "ASM2142\0" /* 1 refs @ 9979 */ + "ISDN\0" /* 8 refs @ 9987 */ + "L1E\0" /* 1 refs @ 9992 */ + "L1\0" /* 1 refs @ 9996 */ + "AR8132\0" /* 1 refs @ 9999 */ + "L2C\0" /* 4 refs @ 10006 */ + "AR8131\0" /* 1 refs @ 10010 */ + "L1C\0" /* 1 refs @ 10017 */ + "AR8151\0" /* 2 refs @ 10021 */ + "v1.0\0" /* 1 refs @ 10028 */ + "L1D\0" /* 2 refs @ 10033 */ + "v2.0\0" /* 4 refs @ 10037 */ + "AR8162\0" /* 1 refs @ 10042 */ + "AR8161\0" /* 1 refs @ 10049 */ + "AR8172\0" /* 1 refs @ 10056 */ + "AR8171\0" /* 1 refs @ 10063 */ + "L2\0" /* 1 refs @ 10070 */ + "Mbit\0" /* 2 refs @ 10073 */ + "AR8152\0" /* 2 refs @ 10078 */ + "v1.1\0" /* 1 refs @ 10085 */ + "Killer\0" /* 5 refs @ 10090 */ + "E2200\0" /* 1 refs @ 10097 */ + "E2400\0" /* 2 refs @ 10103 */ + "E2500\0" /* 1 refs @ 10109 */ + "Kaveri\0" /* 2 refs @ 10115 */ + "HDMI\0" /* 10 refs @ 10122 */ + "Radeon\0" /* 529 refs @ 10127 */ + "R7\0" /* 20 refs @ 10134 */ + "(Kaveri)\0" /* 1 refs @ 10137 */ + "Wrestler\0" /* 1 refs @ 10146 */ + "Navi\0" /* 3 refs @ 10155 */ + "Raven\0" /* 2 refs @ 10160 */ + "Vega\0" /* 14 refs @ 10166 */ + "(Mobile)\0" /* 1 refs @ 10171 */ + "BeaverCreek\0" /* 1 refs @ 10180 */ + "Mobility\0" /* 84 refs @ 10192 */ + "X600\0" /* 3 refs @ 10201 */ + "(M24)\0" /* 1 refs @ 10206 */ + "3150\0" /* 1 refs @ 10212 */ + "FireGL\0" /* 43 refs @ 10217 */ + "M24\0" /* 1 refs @ 10224 */ + "GL\0" /* 6 refs @ 10228 */ + "3154\0" /* 1 refs @ 10231 */ + "(RV380)\0" /* 2 refs @ 10236 */ + "3E50\0" /* 1 refs @ 10244 */ + "V3200\0" /* 1 refs @ 10249 */ + "3E54\0" /* 1 refs @ 10255 */ + "IGP320\0" /* 1 refs @ 10260 */ + "(A3)\0" /* 1 refs @ 10267 */ + "4136\0" /* 1 refs @ 10272 */ + "IGP330/340/350\0" /* 1 refs @ 10277 */ + "(A4)\0" /* 2 refs @ 10292 */ + "4137\0" /* 1 refs @ 10297 */ + "9500\0" /* 3 refs @ 10302 */ + "AD\0" /* 1 refs @ 10307 */ + "AE\0" /* 1 refs @ 10310 */ + "9600TX\0" /* 2 refs @ 10313 */ + "AF\0" /* 3 refs @ 10320 */ + "Z1\0" /* 1 refs @ 10323 */ + "9800SE\0" /* 1 refs @ 10326 */ + "AH\0" /* 1 refs @ 10333 */ + "9800\0" /* 6 refs @ 10336 */ + "AI\0" /* 1 refs @ 10341 */ + "AJ\0" /* 1 refs @ 10344 */ + "X2\0" /* 11 refs @ 10347 */ + "AK\0" /* 1 refs @ 10350 */ + "9600\0" /* 8 refs @ 10353 */ + "AP\0" /* 1 refs @ 10358 */ + "9600SE\0" /* 1 refs @ 10361 */ + "AQ\0" /* 1 refs @ 10368 */ + "9600XT\0" /* 1 refs @ 10371 */ + "AR\0" /* 1 refs @ 10378 */ + "AS\0" /* 1 refs @ 10381 */ + "T2\0" /* 2 refs @ 10384 */ + "AT\0" /* 2 refs @ 10387 */ + "RV360\0" /* 1 refs @ 10390 */ + "AV\0" /* 1 refs @ 10396 */ + "Mach32\0" /* 1 refs @ 10399 */ + "LE\0" /* 8 refs @ 10406 */ + "XT\0" /* 21 refs @ 10409 */ + "7000\0" /* 2 refs @ 10412 */ + "IGP\0" /* 17 refs @ 10417 */ + "(A4+)\0" /* 1 refs @ 10421 */ + "8500\0" /* 5 refs @ 10427 */ + "AIW\0" /* 2 refs @ 10432 */ + "BB\0" /* 1 refs @ 10436 */ + "BC\0" /* 1 refs @ 10439 */ + "IGP320M\0" /* 1 refs @ 10442 */ + "(U1)\0" /* 1 refs @ 10450 */ + "4336\0" /* 1 refs @ 10455 */ + "IGP330M/340M/350M\0" /* 1 refs @ 10460 */ + "(U2)\0" /* 1 refs @ 10478 */ + "4337\0" /* 1 refs @ 10483 */ + "IXP\0" /* 7 refs @ 10488 */ + "AC'97\0" /* 14 refs @ 10492 */ + "SB200\0" /* 8 refs @ 10498 */ + "USB2\0" /* 9 refs @ 10504 */ + "Mach64\0" /* 6 refs @ 10509 */ + "CT\0" /* 1 refs @ 10516 */ + "CX\0" /* 1 refs @ 10519 */ + "SB300\0" /* 2 refs @ 10522 */ + "IXP300\0" /* 1 refs @ 10528 */ + "SB400\0" /* 10 refs @ 10535 */ + "SB600\0" /* 12 refs @ 10541 */ + "SBx00\0" /* 3 refs @ 10547 */ + "Azalia\0" /* 1 refs @ 10553 */ + "OHCI0\0" /* 1 refs @ 10560 */ + "OHCI1\0" /* 1 refs @ 10566 */ + "OHCI2\0" /* 1 refs @ 10572 */ + "OHCI3\0" /* 1 refs @ 10578 */ + "OHCI4\0" /* 1 refs @ 10584 */ + "SB700-SB900\0" /* 14 refs @ 10590 */ + "(IDE\0" /* 7 refs @ 10602 */ + "(AHCI\0" /* 4 refs @ 10607 */ + "RAID5\0" /* 1 refs @ 10613 */ + "(Storage\0" /* 1 refs @ 10619 */ + "bridge\0" /* 16 refs @ 10628 */ + "(PCIe\0" /* 13 refs @ 10635 */ + "SB900\0" /* 2 refs @ 10641 */ + "Rage\0" /* 66 refs @ 10647 */ + "(AGP)\0" /* 6 refs @ 10652 */ + "(AGP\0" /* 5 refs @ 10658 */ + "1x)\0" /* 1 refs @ 10663 */ + "Turbo\0" /* 1 refs @ 10667 */ + "XC\0" /* 3 refs @ 10673 */ + "(PCI66)\0" /* 2 refs @ 10676 */ + "(limited\0" /* 1 refs @ 10684 */ + "3D)\0" /* 1 refs @ 10693 */ + "I/II\0" /* 1 refs @ 10697 */ + "II+\0" /* 1 refs @ 10702 */ + "IIC\0" /* 4 refs @ 10706 */ + "GX\0" /* 2 refs @ 10710 */ + "9000/PRO\0" /* 1 refs @ 10713 */ + "If\0" /* 1 refs @ 10722 */ + "Ig\0" /* 1 refs @ 10725 */ + "X800\0" /* 6 refs @ 10728 */ + "(R420)\0" /* 7 refs @ 10733 */ + "JH\0" /* 1 refs @ 10740 */ + "X800PRO\0" /* 2 refs @ 10743 */ + "JI\0" /* 1 refs @ 10751 */ + "X800SE\0" /* 2 refs @ 10754 */ + "JJ\0" /* 1 refs @ 10761 */ + "JK\0" /* 1 refs @ 10764 */ + "JL\0" /* 1 refs @ 10767 */ + "X3\0" /* 1 refs @ 10770 */ + "JM\0" /* 1 refs @ 10773 */ + "(M18)\0" /* 1 refs @ 10776 */ + "JN\0" /* 1 refs @ 10782 */ + "X800XT\0" /* 2 refs @ 10785 */ + "JP\0" /* 1 refs @ 10792 */ + "LT\0" /* 6 refs @ 10795 */ + "133MHz)\0" /* 1 refs @ 10798 */ + "66MHz)\0" /* 1 refs @ 10806 */ + "M3\0" /* 2 refs @ 10813 */ + "L\0" /* 2 refs @ 10816 */ + "M1\0" /* 1 refs @ 10818 */ + "(PCI)\0" /* 2 refs @ 10821 */ + "M7\0" /* 2 refs @ 10827 */ + "LW\0" /* 1 refs @ 10830 */ + "7800\0" /* 1 refs @ 10833 */ + "M6\0" /* 3 refs @ 10838 */ + "LY\0" /* 1 refs @ 10841 */ + "LZ\0" /* 1 refs @ 10844 */ + "(M9)\0" /* 3 refs @ 10847 */ + "Ld\0" /* 1 refs @ 10852 */ + "Lf\0" /* 1 refs @ 10855 */ + "Lg\0" /* 1 refs @ 10858 */ + "128\0" /* 40 refs @ 10861 */ + "4x\0" /* 19 refs @ 10865 */ + "2x\0" /* 13 refs @ 10868 */ + "9700\0" /* 2 refs @ 10871 */ + "ND\0" /* 1 refs @ 10876 */ + "9700/9500Pro\0" /* 1 refs @ 10879 */ + "NE\0" /* 1 refs @ 10892 */ + "NF\0" /* 1 refs @ 10895 */ + "X1\0" /* 1 refs @ 10898 */ + "NG\0" /* 1 refs @ 10901 */ + "9800PRO\0" /* 1 refs @ 10904 */ + "NH\0" /* 1 refs @ 10912 */ + "NI\0" /* 1 refs @ 10915 */ + "9800XT\0" /* 1 refs @ 10918 */ + "NJ\0" /* 1 refs @ 10925 */ + "NK\0" /* 1 refs @ 10928 */ + "9600/9700\0" /* 1 refs @ 10931 */ + "(M10/11)\0" /* 1 refs @ 10941 */ + "NP\0" /* 1 refs @ 10950 */ + "(M10)\0" /* 3 refs @ 10953 */ + "NQ\0" /* 1 refs @ 10959 */ + "(M11)\0" /* 2 refs @ 10962 */ + "NR\0" /* 1 refs @ 10968 */ + "NS\0" /* 9 refs @ 10971 */ + "NT\0" /* 1 refs @ 10974 */ + "T2e\0" /* 1 refs @ 10977 */ + "NV\0" /* 1 refs @ 10981 */ + "9700/9500\0" /* 2 refs @ 10984 */ + "(TMDS)\0" /* 12 refs @ 10994 */ + "Fury\0" /* 1 refs @ 11001 */ + "MAXX\0" /* 1 refs @ 11006 */ + "QD\0" /* 1 refs @ 11011 */ + "QE\0" /* 1 refs @ 11014 */ + "QF\0" /* 1 refs @ 11017 */ + "QG\0" /* 1 refs @ 11020 */ + "8700/8800\0" /* 1 refs @ 11023 */ + "QH\0" /* 1 refs @ 11033 */ + "QL\0" /* 1 refs @ 11036 */ + "9100\0" /* 6 refs @ 11039 */ + "QM\0" /* 1 refs @ 11044 */ + "7500\0" /* 2 refs @ 11047 */ + "QW\0" /* 1 refs @ 11052 */ + "QX\0" /* 1 refs @ 11055 */ + "7000/VE\0" /* 2 refs @ 11058 */ + "QY\0" /* 1 refs @ 11066 */ + "QZ\0" /* 1 refs @ 11069 */ + "ES1000\0" /* 1 refs @ 11072 */ + "VR\0" /* 2 refs @ 11079 */ + "TF\0" /* 1 refs @ 11082 */ + "M300\0" /* 1 refs @ 11085 */ + "(M22)\0" /* 1 refs @ 11090 */ + "5460\0" /* 1 refs @ 11096 */ + "M22\0" /* 1 refs @ 11101 */ + "5464\0" /* 1 refs @ 11105 */ + "(R423)\0" /* 8 refs @ 11110 */ + "UH\0" /* 1 refs @ 11117 */ + "UI\0" /* 1 refs @ 11120 */ + "X800LE\0" /* 1 refs @ 11123 */ + "UJ\0" /* 1 refs @ 11130 */ + "UK\0" /* 1 refs @ 11133 */ + "GTO\0" /* 5 refs @ 11136 */ + "(R430)\0" /* 2 refs @ 11140 */ + "554F\0" /* 1 refs @ 11147 */ + "V7200\0" /* 3 refs @ 11152 */ + "UQ\0" /* 1 refs @ 11158 */ + "V5100\0" /* 1 refs @ 11161 */ + "UR\0" /* 1 refs @ 11167 */ + "V7100\0" /* 1 refs @ 11170 */ + "UT\0" /* 1 refs @ 11176 */ + "VT\0" /* 1 refs @ 11179 */ + "VTB\0" /* 1 refs @ 11182 */ + "VT4\0" /* 1 refs @ 11186 */ + "RS300\0" /* 2 refs @ 11190 */ + "(U3)\0" /* 1 refs @ 11196 */ + "9200\0" /* 7 refs @ 11201 */ + "RS480\0" /* 6 refs @ 11206 */ + "RD580\0" /* 1 refs @ 11212 */ + "CrossFire\0" /* 1 refs @ 11218 */ + "Xpress\0" /* 9 refs @ 11228 */ + "3200\0" /* 5 refs @ 11235 */ + "200G\0" /* 1 refs @ 11240 */ + "RD790\0" /* 12 refs @ 11245 */ + "(Dual\0" /* 1 refs @ 11251 */ + "Slot)\0" /* 1 refs @ 11257 */ + "RX780/RX790\0" /* 1 refs @ 11263 */ + "Chipset\0" /* 43 refs @ 11275 */ + "9200PRO\0" /* 1 refs @ 11283 */ + "5960\0" /* 1 refs @ 11291 */ + "5961\0" /* 1 refs @ 11296 */ + "5962\0" /* 1 refs @ 11301 */ + "5963\0" /* 1 refs @ 11306 */ + "9200SE\0" /* 2 refs @ 11311 */ + "5964\0" /* 1 refs @ 11318 */ + "(RS482M)\0" /* 1 refs @ 11323 */ + "GFX0\0" /* 4 refs @ 11332 */ + "A\0" /* 19 refs @ 11337 */ + "C\0" /* 7 refs @ 11339 */ + "E\0" /* 14 refs @ 11341 */ + "F\0" /* 2 refs @ 11343 */ + "GFX1\0" /* 4 refs @ 11345 */ + "Link)\0" /* 2 refs @ 11350 */ + "RD890\0" /* 17 refs @ 11356 */ + "Dual\0" /* 58 refs @ 11362 */ + "Slot\0" /* 3 refs @ 11367 */ + "2x16\0" /* 1 refs @ 11372 */ + "GFX\0" /* 5 refs @ 11377 */ + "2x8\0" /* 1 refs @ 11381 */ + "G\0" /* 1 refs @ 11385 */ + "H\0" /* 2 refs @ 11387 */ + "200\0" /* 62 refs @ 11389 */ + "X300\0" /* 2 refs @ 11393 */ + "(RV370)\0" /* 3 refs @ 11398 */ + "5B60\0" /* 1 refs @ 11406 */ + "Sapphire\0" /* 1 refs @ 11411 */ + "X550\0" /* 5 refs @ 11420 */ + "Silent\0" /* 1 refs @ 11425 */ + "V3100\0" /* 1 refs @ 11432 */ + "5B64\0" /* 1 refs @ 11438 */ + "D1100\0" /* 1 refs @ 11443 */ + "5B65\0" /* 1 refs @ 11449 */ + "RV370\0" /* 1 refs @ 11454 */ + "(M9+)\0" /* 2 refs @ 11460 */ + "X850\0" /* 2 refs @ 11466 */ + "5D57\0" /* 1 refs @ 11471 */ + "X700\0" /* 2 refs @ 11476 */ + "8670A/8670M/8750M\0" /* 1 refs @ 11481 */ + "8730M\0" /* 1 refs @ 11499 */ + "M265/M365X/M465\0" /* 1 refs @ 11505 */ + "M260X\0" /* 1 refs @ 11521 */ + "8790M\0" /* 1 refs @ 11527 */ + "8530M\0" /* 1 refs @ 11533 */ + "R5\0" /* 13 refs @ 11539 */ + "M240\0" /* 2 refs @ 11542 */ + "FirePro\0" /* 45 refs @ 11547 */ + "W2100\0" /* 1 refs @ 11555 */ + "8670\0" /* 1 refs @ 11561 */ + "250/350\0" /* 1 refs @ 11566 */ + "8570\0" /* 1 refs @ 11574 */ + "240/340\0" /* 2 refs @ 11579 */ + "520\0" /* 6 refs @ 11587 */ + "OEM\0" /* 16 refs @ 11591 */ + "M6100\0" /* 1 refs @ 11595 */ + "8930M\0" /* 1 refs @ 11601 */ + "R9\0" /* 26 refs @ 11607 */ + "M280X\0" /* 1 refs @ 11610 */ + "M270X/M280X\0" /* 1 refs @ 11616 */ + "W5100\0" /* 1 refs @ 11628 */ + "260X/360\0" /* 1 refs @ 11634 */ + "7790/8770\0" /* 1 refs @ 11643 */ + "360\0" /* 4 refs @ 11653 */ + "260/360\0" /* 1 refs @ 11657 */ + "8670A/8670M/8690M\0" /* 1 refs @ 11665 */ + "M330\0" /* 1 refs @ 11683 */ + "M430\0" /* 1 refs @ 11688 */ + "Mobile\0" /* 99 refs @ 11693 */ + "8570A/8570M\0" /* 1 refs @ 11700 */ + "M230\0" /* 3 refs @ 11712 */ + "M260DX\0" /* 1 refs @ 11717 */ + "8550M\0" /* 1 refs @ 11724 */ + "Instinct\0" /* 3 refs @ 11730 */ + "20\0" /* 10 refs @ 11739 */ + "VII\0" /* 2 refs @ 11742 */ + "V7900\0" /* 1 refs @ 11746 */ + "V5900\0" /* 1 refs @ 11752 */ + "6970\0" /* 1 refs @ 11758 */ + "6950\0" /* 1 refs @ 11763 */ + "6990\0" /* 2 refs @ 11768 */ + "6930\0" /* 1 refs @ 11773 */ + "6970M/6990M\0" /* 1 refs @ 11778 */ + "6900M\0" /* 1 refs @ 11790 */ + "6870\0" /* 1 refs @ 11796 */ + "6850\0" /* 1 refs @ 11801 */ + "6790\0" /* 1 refs @ 11806 */ + "6730M/6770M/7690M\0" /* 1 refs @ 11811 */ + "6630M/6650M/6750M/7670M/7690M\0" /* 1 refs @ 11829 */ + "6610M/7610M\0" /* 1 refs @ 11859 */ + "E6760\0" /* 1 refs @ 11871 */ + "V4900\0" /* 1 refs @ 11877 */ + "V3900\0" /* 1 refs @ 11883 */ + "6650A/7650A\0" /* 1 refs @ 11889 */ + "7650A/7670A\0" /* 1 refs @ 11901 */ + "6670/7670\0" /* 1 refs @ 11913 */ + "6570/7570/8550\0" /* 1 refs @ 11923 */ + "7600\0" /* 2 refs @ 11938 */ + "7570\0" /* 1 refs @ 11943 */ + "5570/6510/7510/8510\0" /* 1 refs @ 11948 */ + "6400M/7400M\0" /* 1 refs @ 11968 */ + "6430M\0" /* 1 refs @ 11980 */ + "B6460\0" /* 1 refs @ 11986 */ + "6400M\0" /* 2 refs @ 11992 */ + "6450A/7450A\0" /* 1 refs @ 11998 */ + "8490\0" /* 1 refs @ 12010 */ + "235X\0" /* 1 refs @ 12015 */ + "7450A\0" /* 1 refs @ 12020 */ + "7470/8470\0" /* 1 refs @ 12026 */ + "235/310\0" /* 1 refs @ 12036 */ + "6450/7450/8450\0" /* 1 refs @ 12044 */ + "230\0" /* 1 refs @ 12059 */ + "7450\0" /* 1 refs @ 12063 */ + "W9000\0" /* 1 refs @ 12068 */ + "7970/8970\0" /* 1 refs @ 12074 */ + "280X\0" /* 1 refs @ 12084 */ + "7900\0" /* 1 refs @ 12089 */ + "7950/8950\0" /* 1 refs @ 12094 */ + "280\0" /* 3 refs @ 12104 */ + "7990/8990\0" /* 1 refs @ 12108 */ + "7870\0" /* 2 refs @ 12118 */ + "W9100\0" /* 1 refs @ 12123 */ + "W8100\0" /* 1 refs @ 12129 */ + "290X/390X\0" /* 1 refs @ 12135 */ + "290/390\0" /* 1 refs @ 12145 */ + "295X2\0" /* 1 refs @ 12153 */ + "WX\0" /* 12 refs @ 12159 */ + "7100\0" /* 2 refs @ 12162 */ + "V7300X\0" /* 2 refs @ 12167 */ + "V7350x2\0" /* 2 refs @ 12174 */ + "5100\0" /* 4 refs @ 12182 */ + "Polaris10\0" /* 3 refs @ 12187 */ + "RX\0" /* 18 refs @ 12197 */ + "470/480/570/570X/580/580X/590\0" /* 1 refs @ 12200 */ + "4170\0" /* 1 refs @ 12230 */ + "4100\0" /* 2 refs @ 12235 */ + "4130/4150\0" /* 1 refs @ 12240 */ + "Polaris11\0" /* 1 refs @ 12250 */ + "V5300X\0" /* 1 refs @ 12260 */ + "460/560D\0" /* 1 refs @ 12267 */ + "450/455/460/555/555X/560/560X\0" /* 1 refs @ 12276 */ + "550\0" /* 5 refs @ 12306 */ + "640SP\0" /* 3 refs @ 12310 */ + "560/560X\0" /* 3 refs @ 12316 */ + "7970M\0" /* 1 refs @ 12325 */ + "8970M\0" /* 1 refs @ 12331 */ + "W7000\0" /* 1 refs @ 12337 */ + "W5000\0" /* 1 refs @ 12343 */ + "370\0" /* 5 refs @ 12349 */ + "270X/370X\0" /* 1 refs @ 12353 */ + "270/370\0" /* 1 refs @ 12363 */ + "GHz\0" /* 1 refs @ 12371 */ + "Edition\0" /* 4 refs @ 12375 */ + "7850\0" /* 1 refs @ 12383 */ + "265\0" /* 1 refs @ 12388 */ + "270\0" /* 1 refs @ 12392 */ + "1024SP\0" /* 1 refs @ 12396 */ + "8890M\0" /* 1 refs @ 12403 */ + "M275X/M375X\0" /* 1 refs @ 12409 */ + "8870M\0" /* 1 refs @ 12421 */ + "M270X/M370X\0" /* 1 refs @ 12427 */ + "E8860\0" /* 1 refs @ 12439 */ + "8850M\0" /* 1 refs @ 12445 */ + "M265X\0" /* 1 refs @ 12451 */ + "7870M\0" /* 1 refs @ 12457 */ + "7700M\0" /* 2 refs @ 12463 */ + "7850M/8850M\0" /* 1 refs @ 12469 */ + "W600\0" /* 1 refs @ 12481 */ + "8830M\0" /* 1 refs @ 12486 */ + "250\0" /* 13 refs @ 12492 */ + "M465X\0" /* 1 refs @ 12496 */ + "W4100\0" /* 1 refs @ 12502 */ + "M4000\0" /* 2 refs @ 12508 */ + "7730M\0" /* 1 refs @ 12514 */ + "7800M\0" /* 1 refs @ 12520 */ + "255\0" /* 1 refs @ 12526 */ + "7730/8730\0" /* 1 refs @ 12530 */ + "7700\0" /* 2 refs @ 12540 */ + "7770/8760\0" /* 1 refs @ 12545 */ + "250X\0" /* 1 refs @ 12555 */ + "7750/8740\0" /* 1 refs @ 12560 */ + "250E\0" /* 1 refs @ 12570 */ + "7500M/7600M\0" /* 1 refs @ 12575 */ + "7550M/7570M/7650M\0" /* 1 refs @ 12587 */ + "7000M\0" /* 1 refs @ 12605 */ + "7670M\0" /* 1 refs @ 12611 */ + "7400\0" /* 1 refs @ 12617 */ + "MI25\0" /* 2 refs @ 12622 */ + "PRO\0" /* 16 refs @ 12627 */ + "SSG\0" /* 1 refs @ 12631 */ + "Frontier\0" /* 1 refs @ 12635 */ + "V340\0" /* 1 refs @ 12644 */ + "56\0" /* 1 refs @ 12649 */ + "8100/8200\0" /* 1 refs @ 12652 */ + "MxGPU\0" /* 1 refs @ 12662 */ + "56/64\0" /* 2 refs @ 12668 */ + "6550M\0" /* 1 refs @ 12674 */ + "V8800\0" /* 1 refs @ 12680 */ + "V7800\0" /* 1 refs @ 12686 */ + "V9800\0" /* 1 refs @ 12692 */ + "FireStream\0" /* 5 refs @ 12698 */ + "9370\0" /* 1 refs @ 12709 */ + "9350\0" /* 2 refs @ 12714 */ + "5870\0" /* 2 refs @ 12719 */ + "5850\0" /* 2 refs @ 12724 */ + "6800\0" /* 5 refs @ 12729 */ + "5970\0" /* 2 refs @ 12734 */ + "5830\0" /* 1 refs @ 12739 */ + "6850M/6870M\0" /* 1 refs @ 12744 */ + "V5800\0" /* 2 refs @ 12756 */ + "5670\0" /* 1 refs @ 12762 */ + "6770\0" /* 1 refs @ 12767 */ + "5750\0" /* 1 refs @ 12772 */ + "6750\0" /* 1 refs @ 12777 */ + "5730\0" /* 1 refs @ 12782 */ + "6570M\0" /* 1 refs @ 12787 */ + "5650/5750\0" /* 1 refs @ 12793 */ + "6530M/6550M\0" /* 1 refs @ 12803 */ + "5570/6550A\0" /* 1 refs @ 12815 */ + "V4800\0" /* 1 refs @ 12826 */ + "V3800\0" /* 1 refs @ 12832 */ + "5670/5690/5730\0" /* 1 refs @ 12838 */ + "5570/5570/5630/6510/6610/7570\0" /* 1 refs @ 12853 */ + "5550/5570/5630/6390/6490/7570\0" /* 1 refs @ 12883 */ + "5430/5450/5470\0" /* 1 refs @ 12913 */ + "5430\0" /* 1 refs @ 12928 */ + "6370M/7370M\0" /* 1 refs @ 12933 */ + "6330M\0" /* 1 refs @ 12945 */ + "(FireGL)\0" /* 1 refs @ 12951 */ + "2460\0" /* 1 refs @ 12960 */ + "2270\0" /* 1 refs @ 12965 */ + "7300\0" /* 2 refs @ 12970 */ + "5000/6000/7350/8350\0" /* 1 refs @ 12975 */ + "7350/8350\0" /* 1 refs @ 12995 */ + "220\0" /* 2 refs @ 13005 */ + "M260/M265\0" /* 1 refs @ 13009 */ + "M340/M360\0" /* 1 refs @ 13019 */ + "M440/M445\0" /* 1 refs @ 13029 */ + "530/535\0" /* 1 refs @ 13039 */ + "620/625\0" /* 1 refs @ 13047 */ + "M255\0" /* 1 refs @ 13055 */ + "M315\0" /* 1 refs @ 13060 */ + "M395/\0" /* 1 refs @ 13065 */ + "M395X\0" /* 1 refs @ 13071 */ + "Mac\0" /* 1 refs @ 13077 */ + "M295X\0" /* 2 refs @ 13081 */ + "M390X\0" /* 1 refs @ 13087 */ + "S7150\0" /* 1 refs @ 13093 */ + "W7100\0" /* 1 refs @ 13099 */ + "S7150V\0" /* 1 refs @ 13105 */ + "380X\0" /* 1 refs @ 13112 */ + "285/380\0" /* 2 refs @ 13117 */ + "M\0" /* 4 refs @ 13125 */ + "GH\0" /* 1 refs @ 13127 */ + "3100\0" /* 3 refs @ 13130 */ + "540X/550X/630\0" /* 1 refs @ 13135 */ + "640\0" /* 7 refs @ 13149 */ + "E9171\0" /* 1 refs @ 13153 */ + "MCM\0" /* 1 refs @ 13159 */ + "2100\0" /* 3 refs @ 13163 */ + "540/540X/550/550X\0" /* 1 refs @ 13168 */ + "540X/550/550X\0" /* 1 refs @ 13186 */ + "580\0" /* 2 refs @ 13200 */ + "2048SP\0" /* 1 refs @ 13204 */ + "X1800\0" /* 8 refs @ 13211 */ + "V7300\0" /* 2 refs @ 13217 */ + "V7350\0" /* 3 refs @ 13223 */ + "X1300/X1550/X1600\0" /* 1 refs @ 13229 */ + "X1300/X1550\0" /* 9 refs @ 13247 */ + "X1400\0" /* 1 refs @ 13259 */ + "X1550\0" /* 6 refs @ 13265 */ + "64-bit\0" /* 4 refs @ 13271 */ + "X1300\0" /* 4 refs @ 13278 */ + "V3300\0" /* 2 refs @ 13284 */ + "V3350\0" /* 2 refs @ 13290 */ + "(RV515)\0" /* 1 refs @ 13296 */ + "X1600/X1650\0" /* 3 refs @ 13304 */ + "X1450\0" /* 2 refs @ 13316 */ + "X2300\0" /* 2 refs @ 13322 */ + "X1350\0" /* 3 refs @ 13328 */ + "FireMV\0" /* 1 refs @ 13334 */ + "2250\0" /* 1 refs @ 13341 */ + "X1600\0" /* 5 refs @ 13346 */ + "XT/X1650\0" /* 1 refs @ 13352 */ + "X1650\0" /* 9 refs @ 13361 */ + "V5200\0" /* 1 refs @ 13367 */ + "XT/X1600\0" /* 1 refs @ 13373 */ + "V3400\0" /* 2 refs @ 13382 */ + "V5250\0" /* 1 refs @ 13388 */ + "X1700\0" /* 2 refs @ 13394 */ + "X1700/X2500\0" /* 1 refs @ 13400 */ + "X1950\0" /* 7 refs @ 13412 */ + "XTX\0" /* 1 refs @ 13418 */ + "X1900\0" /* 4 refs @ 13422 */ + "GT\0" /* 69 refs @ 13428 */ + "Stream\0" /* 1 refs @ 13431 */ + "FURY\0" /* 2 refs @ 13438 */ + "NANO\0" /* 1 refs @ 13443 */ + "W5700X\0" /* 1 refs @ 13448 */ + "W5700\0" /* 1 refs @ 13455 */ + "5600\0" /* 27 refs @ 13461 */ + "OEM/5600\0" /* 1 refs @ 13466 */ + "5700/5700\0" /* 1 refs @ 13475 */ + "5500/5500M\0" /* 1 refs @ 13485 */ + "5500M\0" /* 1 refs @ 13496 */ + "W5500\0" /* 1 refs @ 13502 */ + "W5500M\0" /* 1 refs @ 13508 */ + "W5300M\0" /* 1 refs @ 13515 */ + "RS350\0" /* 1 refs @ 13522 */ + "PRO/XT\0" /* 2 refs @ 13528 */ + "RS690\0" /* 7 refs @ 13535 */ + "RS740\0" /* 1 refs @ 13541 */ + "X1200\0" /* 1 refs @ 13547 */ + "1200/1250/1270\0" /* 2 refs @ 13553 */ + "1250\0" /* 3 refs @ 13568 */ + "2900\0" /* 5 refs @ 13573 */ + "V8650\0" /* 1 refs @ 13578 */ + "V8600\0" /* 1 refs @ 13584 */ + "V7600\0" /* 1 refs @ 13590 */ + "4870\0" /* 3 refs @ 13596 */ + "4850\0" /* 5 refs @ 13601 */ + "V8750\0" /* 1 refs @ 13606 */ + "V7760\0" /* 1 refs @ 13612 */ + "4830\0" /* 2 refs @ 13618 */ + "4710\0" /* 1 refs @ 13623 */ + "9270\0" /* 1 refs @ 13628 */ + "9250\0" /* 1 refs @ 13633 */ + "V8700\0" /* 1 refs @ 13638 */ + "4890\0" /* 1 refs @ 13644 */ + "4860\0" /* 2 refs @ 13649 */ + "M7750\0" /* 1 refs @ 13654 */ + "4650/5165\0" /* 1 refs @ 13660 */ + "4670\0" /* 2 refs @ 13670 */ + "V5725\0" /* 1 refs @ 13675 */ + "E4690\0" /* 1 refs @ 13681 */ + "4600\0" /* 3 refs @ 13687 */ + "4650\0" /* 1 refs @ 13692 */ + "V7750\0" /* 1 refs @ 13697 */ + "V5700\0" /* 2 refs @ 13703 */ + "V3750\0" /* 1 refs @ 13709 */ + "M7740\0" /* 1 refs @ 13715 */ + "4770\0" /* 1 refs @ 13721 */ + "4750\0" /* 1 refs @ 13726 */ + "2400\0" /* 7 refs @ 13731 */ + "2350\0" /* 1 refs @ 13736 */ + "3850\0" /* 5 refs @ 13741 */ + "3870\0" /* 4 refs @ 13746 */ + "3690/3850\0" /* 1 refs @ 13751 */ + "3830\0" /* 1 refs @ 13761 */ + "V7700\0" /* 1 refs @ 13766 */ + "9170\0" /* 1 refs @ 13772 */ + "4550\0" /* 1 refs @ 13777 */ + "4350/4550\0" /* 2 refs @ 13782 */ + "4330/4350/4550\0" /* 1 refs @ 13792 */ + "4530/4570/545v\0" /* 1 refs @ 13807 */ + "RG220\0" /* 1 refs @ 13822 */ + "4330\0" /* 1 refs @ 13828 */ + "2600\0" /* 10 refs @ 13833 */ + "XT/2700\0" /* 1 refs @ 13838 */ + "GDDR3\0" /* 1 refs @ 13846 */ + "V5600\0" /* 1 refs @ 13852 */ + "V3600\0" /* 1 refs @ 13858 */ + "3650\0" /* 5 refs @ 13864 */ + "3670\0" /* 1 refs @ 13869 */ + "3470\0" /* 1 refs @ 13874 */ + "3410/3430\0" /* 1 refs @ 13879 */ + "3400\0" /* 40 refs @ 13889 */ + "(M82)\0" /* 1 refs @ 13894 */ + "4250\0" /* 2 refs @ 13900 */ + "(RV610)\0" /* 1 refs @ 13905 */ + "3450\0" /* 3 refs @ 13913 */ + "V3700\0" /* 1 refs @ 13918 */ + "2450\0" /* 1 refs @ 13924 */ + "2260\0" /* 1 refs @ 13929 */ + "3300\0" /* 1 refs @ 13934 */ + "3000\0" /* 7 refs @ 13939 */ + "6550D\0" /* 1 refs @ 13944 */ + "6620G\0" /* 1 refs @ 13950 */ + "6370D\0" /* 1 refs @ 13956 */ + "6380G\0" /* 1 refs @ 13962 */ + "6410D\0" /* 2 refs @ 13968 */ + "6520G\0" /* 1 refs @ 13974 */ + "6480G\0" /* 2 refs @ 13980 */ + "6530D\0" /* 1 refs @ 13986 */ + "4200\0" /* 6 refs @ 13992 */ + "4290\0" /* 1 refs @ 13997 */ + "6310\0" /* 2 refs @ 14002 */ + "6250\0" /* 3 refs @ 14007 */ + "6320\0" /* 1 refs @ 14012 */ + "6290\0" /* 1 refs @ 14017 */ + "7340\0" /* 1 refs @ 14022 */ + "7310\0" /* 1 refs @ 14027 */ + "7290\0" /* 1 refs @ 14032 */ + "8400\0" /* 2 refs @ 14037 */ + "R3\0" /* 3 refs @ 14042 */ + "8400E\0" /* 1 refs @ 14045 */ + "8330\0" /* 1 refs @ 14051 */ + "8330E\0" /* 1 refs @ 14056 */ + "8210\0" /* 1 refs @ 14062 */ + "8310E\0" /* 1 refs @ 14067 */ + "8280\0" /* 1 refs @ 14073 */ + "8280E\0" /* 1 refs @ 14078 */ + "8240\0" /* 1 refs @ 14084 */ + "8180\0" /* 2 refs @ 14089 */ + "8250/8280G\0" /* 1 refs @ 14094 */ + "Kabini\0" /* 1 refs @ 14105 */ + "HDMI/DP\0" /* 2 refs @ 14112 */ + "R2\0" /* 6 refs @ 14120 */ + "R4/R5\0" /* 1 refs @ 14123 */ + "R2/R3/R4\0" /* 1 refs @ 14129 */ + "R6\0" /* 1 refs @ 14138 */ + "R1E/R2E\0" /* 1 refs @ 14141 */ + "APU\0" /* 2 refs @ 14149 */ + "XX-2200M\0" /* 1 refs @ 14153 */ + "with\0" /* 6 refs @ 14162 */ + "R5/R6/R7\0" /* 1 refs @ 14167 */ + "R2/R3/R4/R5\0" /* 1 refs @ 14176 */ + "7660G\0" /* 2 refs @ 14188 */ + "7660D\0" /* 1 refs @ 14194 */ + "Trinity\0" /* 1 refs @ 14200 */ + "7640G\0" /* 2 refs @ 14208 */ + "7560D\0" /* 1 refs @ 14214 */ + "A300\0" /* 1 refs @ 14220 */ + "7620G\0" /* 2 refs @ 14225 */ + "7600G\0" /* 2 refs @ 14231 */ + "7500G\0" /* 3 refs @ 14237 */ + "8650G\0" /* 1 refs @ 14243 */ + "8670D\0" /* 1 refs @ 14249 */ + "8550G\0" /* 1 refs @ 14255 */ + "8570D\0" /* 1 refs @ 14261 */ + "8610G\0" /* 1 refs @ 14267 */ + "Playstation\0" /* 1 refs @ 14273 */ + "Liverpool\0" /* 1 refs @ 14285 */ + "7520G\0" /* 2 refs @ 14295 */ + "7540D\0" /* 1 refs @ 14301 */ + "7420G\0" /* 2 refs @ 14307 */ + "7480D\0" /* 1 refs @ 14313 */ + "7400G\0" /* 2 refs @ 14319 */ + "8450G\0" /* 1 refs @ 14325 */ + "8470D\0" /* 1 refs @ 14331 */ + "8350G\0" /* 1 refs @ 14337 */ + "8370D\0" /* 1 refs @ 14343 */ + "8510G\0" /* 1 refs @ 14349 */ + "8410G\0" /* 1 refs @ 14355 */ + "8310G\0" /* 1 refs @ 14361 */ + "8650D\0" /* 1 refs @ 14367 */ + "8550D\0" /* 1 refs @ 14373 */ + "3650/3730/3750\0" /* 2 refs @ 14379 */ + "2350PRO/2400PRO/2400XT/3410\0" /* 1 refs @ 14394 */ + "3690/3800\0" /* 1 refs @ 14422 */ + "34xx\0" /* 1 refs @ 14432 */ + "4350\0" /* 1 refs @ 14437 */ + "5830/5850/5870/6850/6870\0" /* 1 refs @ 14442 */ + "5700\0" /* 2 refs @ 14467 */ + "5000\0" /* 20 refs @ 14472 */ + "5400/6300/7300\0" /* 1 refs @ 14477 */ + "6930/6950/6970/6990\0" /* 1 refs @ 14492 */ + "6790/6850/6870/7720\0" /* 1 refs @ 14512 */ + "6500/6600/6700M\0" /* 1 refs @ 14532 */ + "6450/7450/8450/8490,\0" /* 1 refs @ 14548 */ + "230/235/235X\0" /* 1 refs @ 14569 */ + "7870XT/7950/7970\0" /* 1 refs @ 14582 */ + "Tiran\0" /* 1 refs @ 14599 */ + "360,\0" /* 1 refs @ 14605 */ + "290/290X,\0" /* 1 refs @ 14610 */ + "390/390X\0" /* 1 refs @ 14620 */ + "460/550/640SP,\0" /* 1 refs @ 14629 */ + "Nano,\0" /* 1 refs @ 14644 */ + "470/480/570/580/590\0" /* 1 refs @ 14650 */ + "550/640SP/560/560X\0" /* 1 refs @ 14670 */ + "22\0" /* 6 refs @ 14689 */ + "Lexa\0" /* 1 refs @ 14692 */ + "12\0" /* 12 refs @ 14697 */ + "Theater\0" /* 16 refs @ 14700 */ + "506\0" /* 7 refs @ 14708 */ + "World-Wide\0" /* 4 refs @ 14712 */ + "TV\0" /* 3 refs @ 14723 */ + "Wonder\0" /* 1 refs @ 14726 */ + "External\0" /* 7 refs @ 14733 */ + "506A\0" /* 8 refs @ 14742 */ + "Demodulator\0" /* 2 refs @ 14747 */ + "T507\0" /* 1 refs @ 14759 */ + "(DVB-T)\0" /* 1 refs @ 14764 */ + "tuner/capture\0" /* 1 refs @ 14772 */ + "device\0" /* 2 refs @ 14786 */ + "VxP524\0" /* 1 refs @ 14793 */ + "AU8820\0" /* 1 refs @ 14800 */ + "AU8830\0" /* 1 refs @ 14807 */ + "S5933\0" /* 1 refs @ 14814 */ + "Matchmaker\0" /* 1 refs @ 14820 */ + "S5920\0" /* 1 refs @ 14831 */ + "Target\0" /* 20 refs @ 14837 */ + "Myrinet\0" /* 2 refs @ 14844 */ + "LANai\0" /* 1 refs @ 14852 */ + "FZJ/ZEL\0" /* 3 refs @ 14858 */ + "CAMAC\0" /* 2 refs @ 14866 */ + "VICBUS\0" /* 1 refs @ 14872 */ + "Synchronisation\0" /* 1 refs @ 14879 */ + "Module\0" /* 9 refs @ 14895 */ + "ADDI-DATA\0" /* 1 refs @ 14902 */ + "APCI-7800\0" /* 1 refs @ 14912 */ + "8-port\0" /* 5 refs @ 14922 */ + "Serial\0" /* 123 refs @ 14929 */ + "AST1150\0" /* 1 refs @ 14936 */ + "PCIe-to-PCI\0" /* 3 refs @ 14944 */ + "AST1180\0" /* 1 refs @ 14956 */ + "Family\0" /* 27 refs @ 14964 */ + "AR5201\0" /* 3 refs @ 14971 */ + "AR5211\0" /* 5 refs @ 14978 */ + "AR5212\0" /* 9 refs @ 14985 */ + "AR2413\0" /* 1 refs @ 14992 */ + "AR5413\0" /* 1 refs @ 14999 */ + "AR5424\0" /* 1 refs @ 15006 */ + "AR5416\0" /* 1 refs @ 15013 */ + "AR5418\0" /* 1 refs @ 15020 */ + "AR9160\0" /* 1 refs @ 15027 */ + "AR9280\0" /* 1 refs @ 15034 */ + "AR9281\0" /* 1 refs @ 15041 */ + "AR9285\0" /* 1 refs @ 15048 */ + "AR2427\0" /* 1 refs @ 15055 */ + "AR9227\0" /* 1 refs @ 15062 */ + "AR9287\0" /* 1 refs @ 15069 */ + "AR9300\0" /* 1 refs @ 15076 */ + "AR9485\0" /* 1 refs @ 15083 */ + "AR9462\0" /* 1 refs @ 15090 */ + "AR9565\0" /* 1 refs @ 15097 */ + "QCA986x/988x\0" /* 1 refs @ 15104 */ + "Reference\0" /* 4 refs @ 15117 */ + "Card\0" /* 29 refs @ 15127 */ + "(Early\0" /* 1 refs @ 15132 */ + "AP11)\0" /* 1 refs @ 15139 */ + "(no\0" /* 3 refs @ 15145 */ + "eeprom)\0" /* 3 refs @ 15149 */ + "(emulation\0" /* 1 refs @ 15157 */ + "board)\0" /* 3 refs @ 15168 */ + "(11b\0" /* 1 refs @ 15175 */ + "emulation\0" /* 2 refs @ 15180 */ + "(original\0" /* 1 refs @ 15190 */ + "IDE-2015PL\0" /* 1 refs @ 15200 */ + "AVL2301\0" /* 1 refs @ 15211 */ + "AVG2302\0" /* 1 refs @ 15219 */ + "ALG2301\0" /* 1 refs @ 15227 */ + "ALG2302\0" /* 1 refs @ 15235 */ + "ALS4000\0" /* 1 refs @ 15243 */ + "Low\0" /* 5 refs @ 15251 */ + "Profile\0" /* 3 refs @ 15255 */ + "Cinemaster\0" /* 1 refs @ 15263 */ + "DVD\0" /* 1 refs @ 15274 */ + "Basic\0" /* 1 refs @ 15278 */ + "Rate\0" /* 6 refs @ 15284 */ + "B1\0" /* 4 refs @ 15289 */ + "Fritz!\0" /* 1 refs @ 15292 */ + "Fritz!PCI\0" /* 1 refs @ 15299 */ + "T1\0" /* 1 refs @ 15309 */ + "RT2890\0" /* 2 refs @ 15312 */ + "XLR\0" /* 1 refs @ 15319 */ + "XLS\0" /* 1 refs @ 15323 */ + "PCIe-PCIe\0" /* 1 refs @ 15327 */ + "single-channel\0" /* 2 refs @ 15337 */ + "RS-485\0" /* 8 refs @ 15352 */ + "dual-channel\0" /* 3 refs @ 15359 */ + "quad-channel\0" /* 4 refs @ 15372 */ + "octal-channel\0" /* 4 refs @ 15385 */ + "Isolated\0" /* 4 refs @ 15399 */ + "PBlaze4\0" /* 1 refs @ 15408 */ + "F5D6001\0" /* 1 refs @ 15416 */ + "F5D6020v3\0" /* 1 refs @ 15424 */ + "F5D7010\0" /* 1 refs @ 15434 */ + "EC8/32\0" /* 1 refs @ 15442 */ + "EC8/64\0" /* 1 refs @ 15449 */ + "EasyIO\0" /* 1 refs @ 15456 */ + "PCI-VME\0" /* 3 refs @ 15463 */ + "Mod.\0" /* 3 refs @ 15471 */ + "617\0" /* 2 refs @ 15476 */ + "618\0" /* 1 refs @ 15480 */ + "2706\0" /* 1 refs @ 15484 */ + "5501\0" /* 1 refs @ 15489 */ + "5601\0" /* 1 refs @ 15494 */ + "UC-268\0" /* 1 refs @ 15499 */ + "UC-257\0" /* 3 refs @ 15506 */ + "UC-279\0" /* 1 refs @ 15513 */ + "UC-313\0" /* 3 refs @ 15520 */ + "UC-310\0" /* 1 refs @ 15527 */ + "UC-302\0" /* 3 refs @ 15534 */ + "UC-431\0" /* 1 refs @ 15541 */ + "UC-420\0" /* 1 refs @ 15548 */ + "UC-475\0" /* 2 refs @ 15555 */ + "UC-607\0" /* 3 refs @ 15562 */ + "UC-324\0" /* 1 refs @ 15569 */ + "UC-357\0" /* 3 refs @ 15576 */ + "UC-246\0" /* 2 refs @ 15583 */ + "UP-189\0" /* 3 refs @ 15590 */ + "UC-346\0" /* 2 refs @ 15597 */ + "UP-200\0" /* 3 refs @ 15604 */ + "UC-101\0" /* 1 refs @ 15611 */ + "UC-203\0" /* 2 refs @ 15618 */ + "UP-869\0" /* 3 refs @ 15625 */ + "UP-880\0" /* 3 refs @ 15632 */ + "UC-368\0" /* 1 refs @ 15639 */ + "UC-253\0" /* 1 refs @ 15646 */ + "UC-260\0" /* 1 refs @ 15653 */ + "UC-836\0" /* 1 refs @ 15660 */ + "Intashield\0" /* 7 refs @ 15667 */ + "IS-100\0" /* 1 refs @ 15678 */ + "IS-200\0" /* 1 refs @ 15685 */ + "IS-300\0" /* 1 refs @ 15692 */ + "IS-400\0" /* 1 refs @ 15699 */ + "PX-279\0" /* 1 refs @ 15706 */ + "UC-414\0" /* 1 refs @ 15713 */ + "PX-420\0" /* 2 refs @ 15720 */ + "PX-431\0" /* 2 refs @ 15727 */ + "PX-820\0" /* 2 refs @ 15734 */ + "PX-831\0" /* 2 refs @ 15741 */ + "PX-246\0" /* 2 refs @ 15748 */ + "PX-101\0" /* 2 refs @ 15755 */ + "PX-257\0" /* 2 refs @ 15762 */ + "PX-846\0" /* 2 refs @ 15769 */ + "PX-857\0" /* 2 refs @ 15776 */ + "PX-260\0" /* 1 refs @ 15783 */ + "PX-320\0" /* 1 refs @ 15790 */ + "PX-313\0" /* 1 refs @ 15797 */ + "PX-310\0" /* 1 refs @ 15804 */ + "PX-346\0" /* 1 refs @ 15811 */ + "PX-368\0" /* 1 refs @ 15818 */ + "PX-475\0" /* 1 refs @ 15825 */ + "PX-803\0" /* 1 refs @ 15832 */ + "IX-100\0" /* 1 refs @ 15839 */ + "IX-200\0" /* 1 refs @ 15846 */ + "IX-400\0" /* 1 refs @ 15853 */ + "BCM5752\0" /* 1 refs @ 15860 */ + "NetXtreme\0" /* 32 refs @ 15868 */ + "BCM5752M\0" /* 1 refs @ 15878 */ + "BCM5709\0" /* 2 refs @ 15887 */ + "BCM5716\0" /* 2 refs @ 15895 */ + "BCM57811\0" /* 3 refs @ 15903 */ + "10Gb\0" /* 22 refs @ 15912 */ + "MF\0" /* 6 refs @ 15917 */ + "Ehternet\0" /* 1 refs @ 15920 */ + "VF\0" /* 16 refs @ 15929 */ + "BCM57787\0" /* 1 refs @ 15932 */ + "BCM57764\0" /* 1 refs @ 15941 */ + "BCM5725\0" /* 1 refs @ 15950 */ + "BCM5702\0" /* 2 refs @ 15958 */ + "BCM5703\0" /* 2 refs @ 15966 */ + "BCM5704C\0" /* 1 refs @ 15974 */ + "BCM5704S\0" /* 2 refs @ 15983 */ + "BCM5706\0" /* 2 refs @ 15992 */ + "BCM5708\0" /* 2 refs @ 16000 */ + "BCM5702FE\0" /* 1 refs @ 16008 */ + "BCM57710\0" /* 1 refs @ 16018 */ + "BCM57711\0" /* 1 refs @ 16027 */ + "BCM57711E\0" /* 1 refs @ 16036 */ + "BCM5705\0" /* 1 refs @ 16046 */ + "BCM5705K\0" /* 1 refs @ 16054 */ + "BCM5717\0" /* 2 refs @ 16063 */ + "BCM5718\0" /* 1 refs @ 16071 */ + "BCM5719\0" /* 1 refs @ 16079 */ + "BCM5721\0" /* 1 refs @ 16087 */ + "BCM5722\0" /* 1 refs @ 16095 */ + "BCM5723\0" /* 1 refs @ 16103 */ + "BCM5724\0" /* 1 refs @ 16111 */ + "BCM5705M\0" /* 2 refs @ 16119 */ + "BCM5720\0" /* 1 refs @ 16128 */ + "BCM57712\0" /* 3 refs @ 16136 */ + "BCM5714\0" /* 1 refs @ 16145 */ + "BCM5714S\0" /* 1 refs @ 16153 */ + "BCM5780\0" /* 1 refs @ 16162 */ + "BCM5780S\0" /* 1 refs @ 16170 */ + "BCM5705F\0" /* 1 refs @ 16179 */ + "BCM5754M\0" /* 1 refs @ 16188 */ + "BCM5755M\0" /* 1 refs @ 16197 */ + "BCM5756\0" /* 1 refs @ 16206 */ + "BCM5750\0" /* 1 refs @ 16214 */ + "BCM5751\0" /* 1 refs @ 16222 */ + "BCM5715\0" /* 1 refs @ 16230 */ + "BCM5715S\0" /* 1 refs @ 16238 */ + "BCM5754\0" /* 1 refs @ 16247 */ + "BCM5755\0" /* 1 refs @ 16255 */ + "BCM5750M\0" /* 1 refs @ 16263 */ + "BCM5751M\0" /* 1 refs @ 16272 */ + "BCM5751F\0" /* 1 refs @ 16281 */ + "BCM5787F\0" /* 1 refs @ 16290 */ + "BCM5761E\0" /* 1 refs @ 16299 */ + "BCM5761\0" /* 1 refs @ 16308 */ + "BCM57762\0" /* 1 refs @ 16316 */ + "BCM57767\0" /* 1 refs @ 16325 */ + "BCM5764\0" /* 1 refs @ 16334 */ + "BCM57766\0" /* 1 refs @ 16342 */ + "BCM5762\0" /* 1 refs @ 16351 */ + "BCM5761S\0" /* 1 refs @ 16359 */ + "BCM5761SE\0" /* 1 refs @ 16368 */ + "BCM57800\0" /* 3 refs @ 16378 */ + "BCM57840\0" /* 6 refs @ 16387 */ + "BCM57810\0" /* 3 refs @ 16396 */ + "BCM57760\0" /* 1 refs @ 16405 */ + "BCM57788\0" /* 1 refs @ 16414 */ + "NetLink\0" /* 7 refs @ 16423 */ + "BCM57780\0" /* 1 refs @ 16431 */ + "BCM5787M\0" /* 1 refs @ 16440 */ + "BCM57790\0" /* 1 refs @ 16449 */ + "BCM5782\0" /* 1 refs @ 16458 */ + "BCM5784M\0" /* 1 refs @ 16466 */ + "BCM5785G\0" /* 1 refs @ 16475 */ + "BCM5786\0" /* 1 refs @ 16484 */ + "BCM5787\0" /* 1 refs @ 16492 */ + "BCM5788\0" /* 1 refs @ 16500 */ + "BCM5789\0" /* 1 refs @ 16508 */ + "BCM5785F\0" /* 1 refs @ 16516 */ + "4x10Gb\0" /* 1 refs @ 16525 */ + "2x20Gb\0" /* 1 refs @ 16532 */ + "BCM5702X\0" /* 1 refs @ 16539 */ + "BCM5703X\0" /* 1 refs @ 16548 */ + "20Gb\0" /* 1 refs @ 16557 */ + "BCM57761\0" /* 1 refs @ 16562 */ + "BCM57781\0" /* 1 refs @ 16571 */ + "BCM57791\0" /* 1 refs @ 16580 */ + "BCM57786\0" /* 1 refs @ 16589 */ + "BCM57765\0" /* 1 refs @ 16598 */ + "BCM57785\0" /* 1 refs @ 16607 */ + "BCM57795\0" /* 1 refs @ 16616 */ + "BCM57782\0" /* 1 refs @ 16625 */ + "BCM577x5\0" /* 3 refs @ 16634 */ + "SDMMC\0" /* 1 refs @ 16643 */ + "Memstick\0" /* 1 refs @ 16649 */ + "xD\0" /* 4 refs @ 16658 */ + "BCM57301\0" /* 1 refs @ 16661 */ + "NetXtreme-C\0" /* 5 refs @ 16670 */ + "BCM57302\0" /* 1 refs @ 16682 */ + "25Gb\0" /* 4 refs @ 16691 */ + "BCM57304\0" /* 1 refs @ 16696 */ + "50Gb\0" /* 1 refs @ 16705 */ + "BCM57311\0" /* 1 refs @ 16710 */ + "BCM57312\0" /* 1 refs @ 16719 */ + "BCM57402\0" /* 1 refs @ 16728 */ + "NetXtreme-E\0" /* 11 refs @ 16737 */ + "BCM57404\0" /* 1 refs @ 16749 */ + "BCM57406\0" /* 1 refs @ 16758 */ + "10GBase-T\0" /* 1 refs @ 16767 */ + "BCM57407\0" /* 2 refs @ 16777 */ + "BCM57412\0" /* 1 refs @ 16786 */ + "BCM57414\0" /* 1 refs @ 16795 */ + "BCM57416\0" /* 2 refs @ 16804 */ + "BCM57417\0" /* 2 refs @ 16813 */ + "BCM5781\0" /* 1 refs @ 16822 */ + "BCM57314\0" /* 1 refs @ 16830 */ + "10Gb/25Gb\0" /* 1 refs @ 16839 */ + "SFP\0" /* 7 refs @ 16849 */ + "BCM5727\0" /* 1 refs @ 16853 */ + "BCM5753\0" /* 1 refs @ 16861 */ + "BCM5753M\0" /* 1 refs @ 16869 */ + "BCM5753F\0" /* 1 refs @ 16878 */ + "BCM5903M\0" /* 1 refs @ 16887 */ + "BCM4401-B1\0" /* 1 refs @ 16896 */ + "BCM5901\0" /* 1 refs @ 16907 */ + "BCM5901A\0" /* 1 refs @ 16915 */ + "BCM5906\0" /* 1 refs @ 16924 */ + "BCM5906M\0" /* 1 refs @ 16932 */ + "BCM2711\0" /* 1 refs @ 16941 */ + "BCM4303\0" /* 1 refs @ 16949 */ + "BCM4307\0" /* 1 refs @ 16957 */ + "BCM4311\0" /* 1 refs @ 16965 */ + "2.4GHz\0" /* 4 refs @ 16973 */ + "BCM4312\0" /* 1 refs @ 16980 */ + "Dualband\0" /* 3 refs @ 16988 */ + "BCM4313\0" /* 1 refs @ 16997 */ + "5GHz\0" /* 1 refs @ 17005 */ + "BCM4315\0" /* 1 refs @ 17010 */ + "BCM4318\0" /* 1 refs @ 17018 */ + "AirForce\0" /* 1 refs @ 17026 */ + "54g\0" /* 1 refs @ 17035 */ + "BCM4319\0" /* 1 refs @ 17039 */ + "BCM4306\0" /* 2 refs @ 17047 */ + "BCM4322\0" /* 1 refs @ 17055 */ + "BCM4309\0" /* 1 refs @ 17063 */ + "BCM43XG\0" /* 1 refs @ 17071 */ + "BCM4328\0" /* 1 refs @ 17079 */ + "802.11a/b/g/n\0" /* 2 refs @ 17087 */ + "BCM4329\0" /* 1 refs @ 17101 */ + "802.11b/g/n\0" /* 5 refs @ 17109 */ + "BCM432A\0" /* 1 refs @ 17121 */ + "802.11\0" /* 7 refs @ 17129 */ + "BCM432B\0" /* 1 refs @ 17136 */ + "BCM432C\0" /* 1 refs @ 17144 */ + "BCM432D\0" /* 1 refs @ 17152 */ + "BCM43224\0" /* 1 refs @ 17160 */ + "BCM43225\0" /* 1 refs @ 17169 */ + "BCM43227\0" /* 1 refs @ 17178 */ + "BCM43228\0" /* 1 refs @ 17187 */ + "BCM4350\0" /* 1 refs @ 17196 */ + "802.11ac\0" /* 3 refs @ 17204 */ + "BCM43602\0" /* 1 refs @ 17213 */ + "SoC\0" /* 27 refs @ 17222 */ + "BCM4401\0" /* 1 refs @ 17226 */ + "BCM4401-B0\0" /* 1 refs @ 17234 */ + "BCM4371\0" /* 1 refs @ 17245 */ + "BCM4378\0" /* 1 refs @ 17253 */ + "BCM4387\0" /* 1 refs @ 17261 */ + "BCM4727\0" /* 1 refs @ 17269 */ + "5801\0" /* 1 refs @ 17277 */ + "5802\0" /* 1 refs @ 17282 */ + "5820\0" /* 1 refs @ 17287 */ + "5821\0" /* 1 refs @ 17292 */ + "5822\0" /* 1 refs @ 17297 */ + "5823\0" /* 1 refs @ 17302 */ + "5825\0" /* 1 refs @ 17307 */ + "5860\0" /* 1 refs @ 17312 */ + "5861\0" /* 1 refs @ 17317 */ + "5862\0" /* 1 refs @ 17322 */ + "Bt848\0" /* 1 refs @ 17327 */ + "Capture\0" /* 11 refs @ 17333 */ + "Bt849\0" /* 1 refs @ 17341 */ + "Bt878\0" /* 2 refs @ 17347 */ + "Bt879\0" /* 2 refs @ 17353 */ + "Bt880\0" /* 2 refs @ 17359 */ + "(Audio\0" /* 3 refs @ 17365 */ + "Section)\0" /* 3 refs @ 17372 */ + "Bt8474\0" /* 1 refs @ 17381 */ + "Multichannel\0" /* 2 refs @ 17388 */ + "HDLC\0" /* 1 refs @ 17401 */ + "MultiMaster\0" /* 2 refs @ 17406 */ + "NC\0" /* 1 refs @ 17418 */ + "FlashPoint\0" /* 1 refs @ 17421 */ + "GPPCI\0" /* 1 refs @ 17432 */ + "Nitrox\0" /* 1 refs @ 17438 */ + "Master\0" /* 1 refs @ 17445 */ + "RML\0" /* 1 refs @ 17452 */ + "RSL\0" /* 1 refs @ 17456 */ + "devices\0" /* 1 refs @ 17460 */ + "SMMU\0" /* 1 refs @ 17468 */ + "Generic\0" /* 8 refs @ 17473 */ + "Interrupt\0" /* 8 refs @ 17481 */ + "GPIO\0" /* 8 refs @ 17491 */ + "MPI\0" /* 1 refs @ 17496 */ + "SPI\0" /* 52 refs @ 17500 */ + "MIO-PTP\0" /* 1 refs @ 17504 */ + "MIX\0" /* 1 refs @ 17512 */ + "Reset\0" /* 3 refs @ 17516 */ + "eMMC/SD\0" /* 1 refs @ 17522 */ + "MIO-BOOT\0" /* 1 refs @ 17530 */ + "TWSI\0" /* 1 refs @ 17539 */ + "I2C\0" /* 136 refs @ 17544 */ + "CCPI\0" /* 1 refs @ 17548 */ + "(Multi-node\0" /* 1 refs @ 17553 */ + "connect)\0" /* 1 refs @ 17565 */ + "Voltage\0" /* 1 refs @ 17574 */ + "Regulator\0" /* 1 refs @ 17582 */ + "Key\0" /* 1 refs @ 17592 */ + "GTI\0" /* 1 refs @ 17596 */ + "(Global\0" /* 1 refs @ 17600 */ + "Timers)\0" /* 1 refs @ 17608 */ + "Random\0" /* 2 refs @ 17616 */ + "Generator\0" /* 2 refs @ 17623 */ + "DFA\0" /* 1 refs @ 17633 */ + "Zip\0" /* 1 refs @ 17637 */ + "Traffic\0" /* 5 refs @ 17641 */ + "PEM\0" /* 1 refs @ 17649 */ + "(PCI\0" /* 1 refs @ 17653 */ + "Interface)\0" /* 6 refs @ 17658 */ + "(Level-2\0" /* 1 refs @ 17669 */ + "Controller)\0" /* 5 refs @ 17678 */ + "OCLA\0" /* 1 refs @ 17690 */ + "(On-Chip\0" /* 1 refs @ 17695 */ + "Analyzer)\0" /* 1 refs @ 17704 */ + "OSM\0" /* 1 refs @ 17714 */ + "GSER\0" /* 1 refs @ 17718 */ + "(General\0" /* 1 refs @ 17723 */ + "Serializer/Deserializer)\0" /* 1 refs @ 17732 */ + "Common\0" /* 1 refs @ 17757 */ + "IOBN\0" /* 1 refs @ 17764 */ + "NCSI\0" /* 1 refs @ 17769 */ + "(Network\0" /* 1 refs @ 17774 */ + "Sideband\0" /* 1 refs @ 17783 */ + "SGPIO\0" /* 1 refs @ 17792 */ + "(Serial\0" /* 2 refs @ 17798 */ + "controller\0" /* 17 refs @ 17806 */ + "disk\0" /* 1 refs @ 17817 */ + "lights)\0" /* 1 refs @ 17822 */ + "SMI\0" /* 1 refs @ 17830 */ + "MDIO\0" /* 1 refs @ 17834 */ + "DAP\0" /* 1 refs @ 17839 */ + "(Debug\0" /* 1 refs @ 17843 */ + "Access\0" /* 3 refs @ 17850 */ + "Port)\0" /* 1 refs @ 17857 */ + "PCIERC\0" /* 1 refs @ 17863 */ + "Complex)\0" /* 2 refs @ 17870 */ + "cache\0" /* 1 refs @ 17879 */ + "tag\0" /* 1 refs @ 17885 */ + "data\0" /* 1 refs @ 17889 */ + "L2C-CBC\0" /* 1 refs @ 17894 */ + "L2C-MCI\0" /* 1 refs @ 17902 */ + "MIO-FUS\0" /* 1 refs @ 17910 */ + "(Fuse\0" /* 2 refs @ 17918 */ + "FUSF\0" /* 1 refs @ 17924 */ + "virtual\0" /* 4 refs @ 17929 */ + "function\0" /* 6 refs @ 17937 */ + "Parallel\0" /* 14 refs @ 17946 */ + "Bus\0" /* 16 refs @ 17955 */ + "RAD\0" /* 1 refs @ 17959 */ + "acceleration\0" /* 1 refs @ 17963 */ + "engine)\0" /* 1 refs @ 17976 */ + "ZIP\0" /* 1 refs @ 17984 */ + "CPT\0" /* 1 refs @ 17988 */ + "PE9000\0" /* 1 refs @ 17992 */ + "T302e\0" /* 1 refs @ 17999 */ + "T310e\0" /* 1 refs @ 18005 */ + "T320x\0" /* 1 refs @ 18011 */ + "T302x\0" /* 1 refs @ 18017 */ + "T320e\0" /* 1 refs @ 18023 */ + "T310x\0" /* 1 refs @ 18029 */ + "T3B10\0" /* 1 refs @ 18035 */ + "T3B20\0" /* 1 refs @ 18041 */ + "T3B02\0" /* 1 refs @ 18047 */ + "T3B04\0" /* 1 refs @ 18053 */ + "T3C10\0" /* 1 refs @ 18059 */ + "S320E-CR\0" /* 1 refs @ 18065 */ + "N320E-G2\0" /* 1 refs @ 18074 */ + "T440-dbg\0" /* 1 refs @ 18083 */ + "T420-CR\0" /* 1 refs @ 18092 */ + "T422-CR\0" /* 1 refs @ 18100 */ + "T440-CR\0" /* 1 refs @ 18108 */ + "T420-BCH\0" /* 1 refs @ 18116 */ + "T440-BCH\0" /* 1 refs @ 18125 */ + "T440-CH\0" /* 1 refs @ 18134 */ + "T420-SO\0" /* 1 refs @ 18142 */ + "T420-CX\0" /* 1 refs @ 18150 */ + "T420-BT\0" /* 1 refs @ 18158 */ + "T404-BT\0" /* 1 refs @ 18166 */ + "T440-LP-CR\0" /* 1 refs @ 18174 */ + "T580-dbg\0" /* 1 refs @ 18185 */ + "T520-CR\0" /* 1 refs @ 18194 */ + "T522-CR\0" /* 1 refs @ 18202 */ + "T540-CR\0" /* 1 refs @ 18210 */ + "T520-SO\0" /* 1 refs @ 18218 */ + "T520-BT\0" /* 1 refs @ 18226 */ + "T504-BT\0" /* 1 refs @ 18234 */ + "T580-CR\0" /* 1 refs @ 18242 */ + "T540-LP-CR\0" /* 1 refs @ 18250 */ + "T580-LP-CR\0" /* 1 refs @ 18261 */ + "T520-LL-CR\0" /* 1 refs @ 18272 */ + "T560-CR\0" /* 1 refs @ 18283 */ + "T580-LP-SO-CR\0" /* 1 refs @ 18291 */ + "T502-BT\0" /* 1 refs @ 18305 */ + "T6-DBG-25\0" /* 1 refs @ 18313 */ + "T6225-CR\0" /* 1 refs @ 18323 */ + "T6225-SO-CR\0" /* 1 refs @ 18332 */ + "T6425-CR\0" /* 1 refs @ 18344 */ + "T6425-SO-CR\0" /* 1 refs @ 18353 */ + "T6225-OCP-SO\0" /* 1 refs @ 18365 */ + "T62100-OCP-SO\0" /* 1 refs @ 18378 */ + "T62100-LP-CR\0" /* 1 refs @ 18392 */ + "T62100-SO-CR\0" /* 1 refs @ 18405 */ + "T6210-BT\0" /* 1 refs @ 18418 */ + "T62100-CR\0" /* 1 refs @ 18427 */ + "T6-DBG-100\0" /* 1 refs @ 18437 */ + "T6225-LL-CR\0" /* 1 refs @ 18448 */ + "T61100-OCP-SO\0" /* 1 refs @ 18460 */ + "T6201-BT\0" /* 1 refs @ 18474 */ + "T6225\0" /* 1 refs @ 18483 */ + "80\0" /* 1 refs @ 18489 */ + "T62100\0" /* 2 refs @ 18492 */ + "81\0" /* 1 refs @ 18499 */ + "84\0" /* 1 refs @ 18502 */ + "Terminator\0" /* 3 refs @ 18505 */ + "FPGA\0" /* 5 refs @ 18516 */ + "64310\0" /* 1 refs @ 18521 */ + "69000\0" /* 1 refs @ 18527 */ + "65545\0" /* 1 refs @ 18533 */ + "65548\0" /* 1 refs @ 18539 */ + "65550\0" /* 1 refs @ 18545 */ + "65554\0" /* 1 refs @ 18551 */ + "69030\0" /* 1 refs @ 18557 */ + "LunaVPN\0" /* 1 refs @ 18563 */ + "CL-GD7548\0" /* 1 refs @ 18571 */ + "CL-GD5430\0" /* 1 refs @ 18581 */ + "CL-GD5434-4\0" /* 1 refs @ 18591 */ + "CL-GD5434-8\0" /* 1 refs @ 18603 */ + "CL-GD5436\0" /* 1 refs @ 18615 */ + "CL-GD5446\0" /* 1 refs @ 18625 */ + "CL-GD5480\0" /* 1 refs @ 18635 */ + "CL-PD6729\0" /* 1 refs @ 18645 */ + "CL-PD6832\0" /* 1 refs @ 18655 */ + "PCI-CardBus\0" /* 65 refs @ 18665 */ + "CL-PD6833\0" /* 1 refs @ 18677 */ + "CL-GD7542\0" /* 1 refs @ 18687 */ + "CL-GD7543\0" /* 1 refs @ 18697 */ + "CL-GD7541\0" /* 1 refs @ 18707 */ + "CL-CD4400\0" /* 1 refs @ 18717 */ + "CS4610\0" /* 1 refs @ 18727 */ + "SoundFusion\0" /* 1 refs @ 18734 */ + "CS4280\0" /* 1 refs @ 18746 */ + "CrystalClear\0" /* 2 refs @ 18753 */ + "CS4615\0" /* 1 refs @ 18766 */ + "CS4281\0" /* 1 refs @ 18773 */ + "AAR-1210SA\0" /* 1 refs @ 18780 */ + "AAR-1220SA\0" /* 1 refs @ 18791 */ + "PCI0640\0" /* 1 refs @ 18802 */ + "PCI0642\0" /* 1 refs @ 18810 */ + "PCI0643\0" /* 1 refs @ 18818 */ + "PCI0646\0" /* 1 refs @ 18826 */ + "PCI0647\0" /* 1 refs @ 18834 */ + "PCI0648\0" /* 1 refs @ 18842 */ + "PCI0649\0" /* 1 refs @ 18850 */ + "PCI0650A\0" /* 1 refs @ 18858 */ + "USB0670\0" /* 1 refs @ 18867 */ + "USB0673\0" /* 1 refs @ 18875 */ + "SiI0680\0" /* 1 refs @ 18883 */ + "SiI3112\0" /* 1 refs @ 18891 */ + "SATALink\0" /* 6 refs @ 18899 */ + "SiI3114\0" /* 1 refs @ 18908 */ + "SiI3124\0" /* 1 refs @ 18916 */ + "SiI3132\0" /* 1 refs @ 18924 */ + "SiI3512\0" /* 1 refs @ 18932 */ + "SiI3531\0" /* 1 refs @ 18940 */ + "CMI8338A\0" /* 1 refs @ 18948 */ + "CMI8338B\0" /* 1 refs @ 18957 */ + "CMI8738/C3DX\0" /* 1 refs @ 18966 */ + "CMI8738B\0" /* 1 refs @ 18979 */ + "HSP56\0" /* 1 refs @ 18988 */ + "Audiomodem\0" /* 1 refs @ 18994 */ + "Riser\0" /* 1 refs @ 19005 */ + "EX110TX\0" /* 1 refs @ 19011 */ + "HFC-S\0" /* 1 refs @ 19019 */ + "38W2\0" /* 1 refs @ 19025 */ + "Notebook\0" /* 3 refs @ 19030 */ + "PCI-EISA\0" /* 2 refs @ 19039 */ + "Smart\0" /* 85 refs @ 19048 */ + "Array\0" /* 76 refs @ 19054 */ + "64xx\0" /* 1 refs @ 19060 */ + "Triflex\0" /* 3 refs @ 19065 */ + "QVision\0" /* 3 refs @ 19073 */ + "1280/p\0" /* 1 refs @ 19081 */ + "5300\0" /* 5 refs @ 19088 */ + "5i\0" /* 1 refs @ 19093 */ + "532\0" /* 1 refs @ 19096 */ + "5312\0" /* 1 refs @ 19100 */ + "6i\0" /* 1 refs @ 19105 */ + "641\0" /* 1 refs @ 19108 */ + "642\0" /* 1 refs @ 19112 */ + "6400\0" /* 2 refs @ 19116 */ + "EM\0" /* 1 refs @ 19121 */ + "6422\0" /* 1 refs @ 19124 */ + "SMART2P\0" /* 1 refs @ 19129 */ + "Netelligent\0" /* 6 refs @ 19137 */ + "TX\0" /* 4 refs @ 19149 */ + "T\0" /* 1 refs @ 19152 */ + "NetFlex\0" /* 3 refs @ 19154 */ + "3/P\0" /* 3 refs @ 19162 */ + "ProLiant\0" /* 1 refs @ 19166 */ + "Deskpro\0" /* 1 refs @ 19175 */ + "4000\0" /* 3 refs @ 19183 */ + "5233MMX\0" /* 1 refs @ 19188 */ + "T/2\0" /* 1 refs @ 19196 */ + "UTP/Coax\0" /* 1 refs @ 19200 */ + "rev.\0" /* 2 refs @ 19209 */ + "Presario\0" /* 1 refs @ 19214 */ + "56xx\0" /* 1 refs @ 19223 */ + "Armada\0" /* 12 refs @ 19228 */ + "M700\0" /* 1 refs @ 19235 */ + "5i/532\0" /* 1 refs @ 19240 */ + "iLO\0" /* 2 refs @ 19247 */ + "BNC\0" /* 1 refs @ 19251 */ + "RL100-ATX\0" /* 1 refs @ 19255 */ + "RL100-TX\0" /* 1 refs @ 19265 */ + "RocketPort\0" /* 23 refs @ 19274 */ + "32\0" /* 2 refs @ 19285 */ + "16\0" /* 12 refs @ 19288 */ + "Quad\0" /* 17 refs @ 19291 */ + "Cable\0" /* 2 refs @ 19296 */ + "Octa\0" /* 3 refs @ 19302 */ + "RJ11s\0" /* 2 refs @ 19307 */ + "DB78\0" /* 2 refs @ 19313 */ + "Plus\0" /* 12 refs @ 19318 */ + "RocketModem\0" /* 2 refs @ 19323 */ + "RS232\0" /* 1 refs @ 19335 */ + "RS422\0" /* 1 refs @ 19341 */ + "550/8\0" /* 6 refs @ 19347 */ + "RJ11\0" /* 2 refs @ 19353 */ + "part\0" /* 8 refs @ 19358 */ + "550/4\0" /* 1 refs @ 19363 */ + "550/Quad\0" /* 1 refs @ 19369 */ + "550/16\0" /* 2 refs @ 19378 */ + "HW\0" /* 1 refs @ 19385 */ + "56K\0" /* 2 refs @ 19388 */ + "Fax\0" /* 1 refs @ 19392 */ + "LANfinity\0" /* 1 refs @ 19396 */ + "MiniPCI\0" /* 1 refs @ 19406 */ + "SoftK56\0" /* 1 refs @ 19414 */ + "CX23880/1/2/3\0" /* 4 refs @ 19422 */ + "Video/Audio\0" /* 1 refs @ 19436 */ + "IR\0" /* 1 refs @ 19448 */ + "CX23885\0" /* 1 refs @ 19451 */ + "82C599\0" /* 1 refs @ 19459 */ + "PCI-VLB\0" /* 1 refs @ 19466 */ + "82C693\0" /* 1 refs @ 19474 */ + "FEther\0" /* 2 refs @ 19481 */ + "CB-TXD\0" /* 2 refs @ 19488 */ + "CG-LAPCIGT\0" /* 1 refs @ 19495 */ + "\"C-Bus\0" /* 1 refs @ 19506 */ + "II\"-PCI\0" /* 1 refs @ 19513 */ + "SBLive!\0" /* 2 refs @ 19521 */ + "EMU\0" /* 3 refs @ 19529 */ + "10000\0" /* 3 refs @ 19533 */ + "SoundBlaster\0" /* 3 refs @ 19539 */ + "AWE64D\0" /* 1 refs @ 19552 */ + "SB\0" /* 3 refs @ 19559 */ + "Audigy\0" /* 4 refs @ 19562 */ + "X-Fi\0" /* 1 refs @ 19569 */ + "LS\0" /* 2 refs @ 19574 */ + "Gameport\0" /* 4 refs @ 19577 */ + "Joystick\0" /* 4 refs @ 19586 */ + "Ectiva\0" /* 1 refs @ 19595 */ + "1938\0" /* 1 refs @ 19602 */ + "Cyclom-Y\0" /* 2 refs @ 19607 */ + "below\0" /* 4 refs @ 19616 */ + "1M\0" /* 8 refs @ 19622 */ + "above\0" /* 4 refs @ 19625 */ + "Cyclom-4Y\0" /* 2 refs @ 19631 */ + "Cyclom-8Y\0" /* 2 refs @ 19641 */ + "Cyclom-Z\0" /* 2 refs @ 19651 */ + "IQ80310\0" /* 1 refs @ 19660 */ + "(PCI-700)\0" /* 1 refs @ 19668 */ + "MediaGX\0" /* 1 refs @ 19678 */ + "Built-in\0" /* 1 refs @ 19686 */ + "Cx5520\0" /* 1 refs @ 19695 */ + "Companion\0" /* 10 refs @ 19702 */ + "Cx5530\0" /* 5 refs @ 19712 */ + "Multi-Function\0" /* 1 refs @ 19719 */ + "(SMI\0" /* 1 refs @ 19734 */ + "Status\0" /* 3 refs @ 19739 */ + "Timer)\0" /* 1 refs @ 19746 */ + "(XpressAUDIO)\0" /* 1 refs @ 19753 */ + "(Video\0" /* 1 refs @ 19767 */ + "BC635PCI-U\0" /* 1 refs @ 19774 */ + "TC\0" /* 1 refs @ 19785 */ + "FREQ.\0" /* 1 refs @ 19788 */ + "DM9102\0" /* 1 refs @ 19794 */ + "PCCOM\0" /* 3 refs @ 19801 */ + "4-port\0" /* 2 refs @ 19807 */ + "2-port\0" /* 3 refs @ 19814 */ + "DC21050\0" /* 1 refs @ 19821 */ + "DC21040\0" /* 1 refs @ 19829 */ + "(\"Tulip\")\0" /* 1 refs @ 19837 */ + "DC21030\0" /* 1 refs @ 19847 */ + "(\"TGA\")\0" /* 1 refs @ 19855 */ + "Zephyr\0" /* 1 refs @ 19863 */ + "NV-RAM\0" /* 1 refs @ 19870 */ + "KZPSA\0" /* 1 refs @ 19877 */ + "DC21140\0" /* 1 refs @ 19883 */ + "(\"FasterNet\")\0" /* 1 refs @ 19891 */ + "TGA2\0" /* 1 refs @ 19905 */ + "DEFPA\0" /* 1 refs @ 19910 */ + "DC21041\0" /* 1 refs @ 19916 */ + "(\"Tulip\0" /* 1 refs @ 19924 */ + "Plus\")\0" /* 1 refs @ 19932 */ + "DGLPB\0" /* 1 refs @ 19939 */ + "(\"OPPO\")\0" /* 1 refs @ 19945 */ + "DC21142/21143\0" /* 1 refs @ 19954 */ + "Farallon\0" /* 1 refs @ 19968 */ + "PN9000SX\0" /* 1 refs @ 19977 */ + "DC21052\0" /* 1 refs @ 19986 */ + "DC21150\0" /* 1 refs @ 19994 */ + "DC21152\0" /* 1 refs @ 20002 */ + "DC21153\0" /* 1 refs @ 20010 */ + "DC21154\0" /* 1 refs @ 20018 */ + "DC21554\0" /* 1 refs @ 20026 */ + "SWXCR\0" /* 1 refs @ 20034 */ + "2/Si\0" /* 1 refs @ 20040 */ + "3/Di\0" /* 9 refs @ 20045 */ + "3/Si\0" /* 3 refs @ 20050 */ + "4/Di\0" /* 2 refs @ 20055 */ + "DRAC\0" /* 3 refs @ 20060 */ + "Virtual\0" /* 47 refs @ 20065 */ + "4e/Si\0" /* 1 refs @ 20073 */ + "SMIC\0" /* 1 refs @ 20079 */ + "CERC\0" /* 1 refs @ 20084 */ + "1.5/6ch\0" /* 1 refs @ 20089 */ + "5/e\0" /* 1 refs @ 20097 */ + "5/i\0" /* 1 refs @ 20101 */ + "Viper/PCI\0" /* 1 refs @ 20105 */ + "AccelePort\0" /* 1 refs @ 20115 */ + "8r\0" /* 1 refs @ 20126 */ + "920\0" /* 1 refs @ 20129 */ + "Neo\0" /* 3 refs @ 20133 */ + "DL-1002\0" /* 1 refs @ 20137 */ + "DFE-530TXPLUS\0" /* 1 refs @ 20145 */ + "DFE-690TXD\0" /* 1 refs @ 20159 */ + "DWL-610\0" /* 1 refs @ 20170 */ + "DL-4000\0" /* 1 refs @ 20178 */ + "DGE-550SX\0" /* 1 refs @ 20186 */ + "DFE-520TX\0" /* 1 refs @ 20196 */ + "DGE-528T\0" /* 1 refs @ 20206 */ + "DGE-530T\0" /* 2 refs @ 20215 */ + "C1\0" /* 2 refs @ 20224 */ + "DGE-560T\0" /* 1 refs @ 20227 */ + "DGE-560T_2\0" /* 1 refs @ 20236 */ + "DGE-560SX\0" /* 1 refs @ 20247 */ + "DGE-550T\0" /* 1 refs @ 20257 */ + "SmartCache/SmartRAID\0" /* 1 refs @ 20266 */ + "(EATA)\0" /* 1 refs @ 20287 */ + "SmartRAID\0" /* 2 refs @ 20294 */ + "(I2O)\0" /* 2 refs @ 20304 */ + "Zero\0" /* 1 refs @ 20310 */ + "Channel\0" /* 68 refs @ 20315 */ + "PCI-SCI\0" /* 3 refs @ 20323 */ + "(32-bit,\0" /* 1 refs @ 20331 */ + "33\0" /* 2 refs @ 20340 */ + "MHz)\0" /* 3 refs @ 20343 */ + "(64-bit,\0" /* 2 refs @ 20348 */ + "66\0" /* 1 refs @ 20357 */ + "DMX-3191D\0" /* 1 refs @ 20360 */ + "IS64PH\0" /* 1 refs @ 20370 */ + "RT2860\0" /* 8 refs @ 20377 */ + "RT3591\0" /* 2 refs @ 20384 */ + "QuickStep\0" /* 1 refs @ 20391 */ + "1000\0" /* 5 refs @ 20401 */ + "Gloria\0" /* 1 refs @ 20406 */ + "1624\0" /* 1 refs @ 20413 */ + "LP6000\0" /* 1 refs @ 20418 */ + "FibreChannel\0" /* 9 refs @ 20425 */ + "LP952\0" /* 1 refs @ 20438 */ + "LP982\0" /* 1 refs @ 20444 */ + "LP101\0" /* 1 refs @ 20450 */ + "LP7000\0" /* 1 refs @ 20456 */ + "LP8000\0" /* 1 refs @ 20463 */ + "LP9000\0" /* 1 refs @ 20470 */ + "LP9802\0" /* 1 refs @ 20477 */ + "LP10000\0" /* 1 refs @ 20484 */ + "MCR510\0" /* 1 refs @ 20492 */ + "Reader\0" /* 12 refs @ 20499 */ + "CB712/714/810\0" /* 1 refs @ 20506 */ + "CB1211\0" /* 1 refs @ 20520 */ + "CardBus\0" /* 6 refs @ 20527 */ + "CB1225\0" /* 1 refs @ 20535 */ + "CB1410\0" /* 1 refs @ 20542 */ + "CB710\0" /* 1 refs @ 20549 */ + "CB1420\0" /* 1 refs @ 20555 */ + "CB720\0" /* 1 refs @ 20562 */ + "AudioPCI\0" /* 2 refs @ 20568 */ + "97\0" /* 1 refs @ 20577 */ + "CT5880\0" /* 1 refs @ 20580 */ + "SST-64P\0" /* 1 refs @ 20587 */ + "SST-128P\0" /* 1 refs @ 20595 */ + "SST-16P\0" /* 3 refs @ 20604 */ + "SST-4P\0" /* 1 refs @ 20612 */ + "SST-8P\0" /* 1 refs @ 20619 */ + "RoadRunner\0" /* 2 refs @ 20626 */ + "HIPPI\0" /* 1 refs @ 20637 */ + "Gig-E\0" /* 1 refs @ 20643 */ + "Maestro\0" /* 7 refs @ 20649 */ + "Solo-1\0" /* 1 refs @ 20657 */ + "AudioDrive\0" /* 1 refs @ 20664 */ + "2E\0" /* 1 refs @ 20675 */ + "Allegro-1\0" /* 1 refs @ 20678 */ + "EJ168\0" /* 1 refs @ 20688 */ + "EJ188/EJ198\0" /* 1 refs @ 20694 */ + "WL11000P\0" /* 1 refs @ 20706 */ + "WaveLAN/IEEE\0" /* 1 refs @ 20715 */ + "IEEE\0" /* 40 refs @ 20728 */ + "1394\0" /* 36 refs @ 20733 */ + "OZ6729\0" /* 1 refs @ 20738 */ + "PCI-PCMCIA\0" /* 4 refs @ 20745 */ + "OZ6730\0" /* 1 refs @ 20756 */ + "OZ6832/OZ6833\0" /* 1 refs @ 20763 */ + "OZ6836/OZ6860\0" /* 1 refs @ 20777 */ + "OZ6812/OZ6872\0" /* 1 refs @ 20791 */ + "OZ6922\0" /* 1 refs @ 20805 */ + "OZ6933\0" /* 1 refs @ 20812 */ + "OZ6912/OZ6972\0" /* 1 refs @ 20819 */ + "OZ7120\0" /* 1 refs @ 20833 */ + "MMC/SD\0" /* 1 refs @ 20840 */ + "OZ7130\0" /* 1 refs @ 20847 */ + "MS/xD/SM\0" /* 1 refs @ 20854 */ + "OZ711E0\0" /* 1 refs @ 20863 */ + "Freedom\0" /* 1 refs @ 20871 */ + "PCI-GBus\0" /* 1 refs @ 20879 */ + "Universal\0" /* 5 refs @ 20888 */ + "PCA-200\0" /* 1 refs @ 20898 */ + "PCA-200e\0" /* 1 refs @ 20906 */ + "801\0" /* 1 refs @ 20915 */ + "FL1000\0" /* 1 refs @ 20919 */ + "USB3\0" /* 2 refs @ 20926 */ + "FL1009\0" /* 1 refs @ 20931 */ + "TMC-18C30\0" /* 1 refs @ 20938 */ + "(36C70)\0" /* 1 refs @ 20948 */ + "PW008GE5\0" /* 1 refs @ 20956 */ + "PW008GE4\0" /* 1 refs @ 20965 */ + "PRIMEPOWER250/450\0" /* 1 refs @ 20974 */ + "STR1100\0" /* 1 refs @ 20992 */ + "HOTlink\0" /* 2 refs @ 21000 */ + "Counter\0" /* 1 refs @ 21008 */ + "Timer\0" /* 6 refs @ 21016 */ + "PROFIBUS\0" /* 1 refs @ 21022 */ + "old\0" /* 1 refs @ 21031 */ + "155P-MF1\0" /* 2 refs @ 21035 */ + "(FPGA)\0" /* 1 refs @ 21044 */ + "(ASIC)\0" /* 1 refs @ 21051 */ + "SpeedStream\0" /* 2 refs @ 21058 */ + "ENI-25p\0" /* 1 refs @ 21070 */ + "MPC8548E\0" /* 2 refs @ 21078 */ + "MPC8548\0" /* 2 refs @ 21087 */ + "MPC8543E\0" /* 1 refs @ 21095 */ + "MPC8543\0" /* 1 refs @ 21104 */ + "MPC8547E\0" /* 1 refs @ 21112 */ + "MPC8545E\0" /* 1 refs @ 21121 */ + "MPC8545\0" /* 1 refs @ 21130 */ + "MPC8544E\0" /* 1 refs @ 21138 */ + "MPC8544\0" /* 1 refs @ 21147 */ + "MPC8572E\0" /* 1 refs @ 21155 */ + "MPC8572\0" /* 1 refs @ 21164 */ + "MPC8536E\0" /* 1 refs @ 21172 */ + "MPC8536\0" /* 1 refs @ 21181 */ + "P2020E\0" /* 1 refs @ 21189 */ + "P2020\0" /* 1 refs @ 21196 */ + "P2010E\0" /* 1 refs @ 21202 */ + "P2010\0" /* 1 refs @ 21209 */ + "MPC8349E\0" /* 1 refs @ 21215 */ + "MPC8349\0" /* 1 refs @ 21224 */ + "MPC8347E\0" /* 2 refs @ 21232 */ + "TBGA\0" /* 2 refs @ 21241 */ + "MPC8347\0" /* 2 refs @ 21246 */ + "PBGA\0" /* 2 refs @ 21254 */ + "MPC8343E\0" /* 1 refs @ 21259 */ + "MPC8343\0" /* 1 refs @ 21268 */ + "P1021E\0" /* 2 refs @ 21276 */ + "P1020\0" /* 1 refs @ 21283 */ + "P1021\0" /* 1 refs @ 21289 */ + "P1024E\0" /* 1 refs @ 21295 */ + "P1024\0" /* 1 refs @ 21302 */ + "P1025E\0" /* 1 refs @ 21308 */ + "P1025\0" /* 1 refs @ 21315 */ + "P1011E\0" /* 1 refs @ 21321 */ + "P1011\0" /* 1 refs @ 21328 */ + "P1022E\0" /* 1 refs @ 21334 */ + "P1022\0" /* 1 refs @ 21341 */ + "P1013E\0" /* 1 refs @ 21347 */ + "P1013\0" /* 1 refs @ 21354 */ + "P4080E\0" /* 1 refs @ 21360 */ + "P4080\0" /* 1 refs @ 21367 */ + "P4040E\0" /* 1 refs @ 21373 */ + "P4040\0" /* 1 refs @ 21380 */ + "P2040E\0" /* 1 refs @ 21386 */ + "P2040\0" /* 1 refs @ 21393 */ + "P3041E\0" /* 1 refs @ 21399 */ + "P3041\0" /* 1 refs @ 21406 */ + "P5020E\0" /* 1 refs @ 21412 */ + "P5020\0" /* 1 refs @ 21419 */ + "P5010E\0" /* 1 refs @ 21425 */ + "P5010\0" /* 1 refs @ 21432 */ + "GT-64010A\0" /* 1 refs @ 21438 */ + "88AP510\0" /* 1 refs @ 21448 */ + "88F1181\0" /* 1 refs @ 21456 */ + "88F1281\0" /* 1 refs @ 21464 */ + "Orion2\0" /* 2 refs @ 21472 */ + "Libertas\0" /* 5 refs @ 21479 */ + "88W8300\0" /* 2 refs @ 21488 */ + "88W8310\0" /* 1 refs @ 21496 */ + "88W8335\0" /* 2 refs @ 21504 */ + "88SB2211\0" /* 1 refs @ 21512 */ + "x1\0" /* 1 refs @ 21521 */ + "GT-64115\0" /* 1 refs @ 21524 */ + "GT-64011\0" /* 1 refs @ 21533 */ + "SK-NET\0" /* 5 refs @ 21542 */ + "Yukon-II\0" /* 8 refs @ 21549 */ + "88E8021CU\0" /* 1 refs @ 21558 */ + "88E8022CU\0" /* 1 refs @ 21568 */ + "88E8061CU\0" /* 1 refs @ 21578 */ + "88E8062CU\0" /* 1 refs @ 21588 */ + "88E8021X\0" /* 1 refs @ 21598 */ + "88E8022X\0" /* 1 refs @ 21607 */ + "88E8061X\0" /* 1 refs @ 21616 */ + "88E8062X\0" /* 1 refs @ 21625 */ + "Yukon\0" /* 27 refs @ 21634 */ + "88E8035\0" /* 1 refs @ 21640 */ + "88E8036\0" /* 1 refs @ 21648 */ + "88E8038\0" /* 1 refs @ 21656 */ + "88E8039\0" /* 1 refs @ 21664 */ + "88E8040\0" /* 1 refs @ 21672 */ + "88E8040T\0" /* 1 refs @ 21680 */ + "88EC033\0" /* 1 refs @ 21689 */ + "88E8042\0" /* 1 refs @ 21697 */ + "88E8048\0" /* 1 refs @ 21705 */ + "88E8052\0" /* 1 refs @ 21713 */ + "88E8050\0" /* 1 refs @ 21721 */ + "88E8053\0" /* 1 refs @ 21729 */ + "88E8055\0" /* 1 refs @ 21737 */ + "88E8056\0" /* 1 refs @ 21745 */ + "88E8070\0" /* 1 refs @ 21753 */ + "88EC036\0" /* 1 refs @ 21761 */ + "88EC032\0" /* 1 refs @ 21769 */ + "88EC034\0" /* 1 refs @ 21777 */ + "88EC042\0" /* 1 refs @ 21785 */ + "88E8058\0" /* 1 refs @ 21793 */ + "88E8071\0" /* 1 refs @ 21801 */ + "88E8072\0" /* 1 refs @ 21809 */ + "88E8055-2\0" /* 1 refs @ 21817 */ + "88E8075\0" /* 1 refs @ 21827 */ + "88E8057\0" /* 1 refs @ 21835 */ + "88E8059\0" /* 1 refs @ 21843 */ + "88E8079\0" /* 1 refs @ 21851 */ + "GT-64120\0" /* 1 refs @ 21859 */ + "88SX5040\0" /* 1 refs @ 21868 */ + "88SX5041\0" /* 1 refs @ 21877 */ + "88SX5080\0" /* 1 refs @ 21886 */ + "88SX5081\0" /* 1 refs @ 21895 */ + "88F5082\0" /* 1 refs @ 21904 */ + "Orion1\0" /* 7 refs @ 21912 */ + "88F5180N\0" /* 1 refs @ 21919 */ + "88F5181\0" /* 1 refs @ 21928 */ + "88F5182\0" /* 1 refs @ 21936 */ + "88F5281\0" /* 1 refs @ 21944 */ + "88SX6040\0" /* 1 refs @ 21952 */ + "88SX6041\0" /* 1 refs @ 21961 */ + "88SX6042\0" /* 1 refs @ 21970 */ + "IIe\0" /* 3 refs @ 21979 */ + "88SX6080\0" /* 1 refs @ 21983 */ + "88SX6081\0" /* 1 refs @ 21992 */ + "88F6082\0" /* 1 refs @ 22001 */ + "88SE6101\0" /* 1 refs @ 22009 */ + "PATA133\0" /* 1 refs @ 22018 */ + "88SE6121\0" /* 1 refs @ 22026 */ + "88SE614X\0" /* 1 refs @ 22035 */ + "PCI-E\0" /* 29 refs @ 22044 */ + "88SE6145\0" /* 1 refs @ 22050 */ + "88F6180\0" /* 1 refs @ 22059 */ + "Kirkwood\0" /* 4 refs @ 22067 */ + "88F6183\0" /* 1 refs @ 22076 */ + "88F6192\0" /* 1 refs @ 22084 */ + "88F6281\0" /* 1 refs @ 22092 */ + "88F6282\0" /* 1 refs @ 22100 */ + "GT-64130\0" /* 1 refs @ 22108 */ + "GT-64260\0" /* 1 refs @ 22117 */ + "MV6436x\0" /* 1 refs @ 22126 */ + "MV6446x\0" /* 1 refs @ 22134 */ + "MV6707\0" /* 1 refs @ 22142 */ + "MV6710\0" /* 1 refs @ 22149 */ + "MV6W11\0" /* 1 refs @ 22156 */ + "88F6810\0" /* 1 refs @ 22163 */ + "38x\0" /* 3 refs @ 22171 */ + "88F6820\0" /* 1 refs @ 22175 */ + "88F6828\0" /* 1 refs @ 22183 */ + "88SX7042\0" /* 1 refs @ 22191 */ + "MV78100\0" /* 1 refs @ 22200 */ + "Discovery\0" /* 2 refs @ 22208 */ + "Innovation\0" /* 2 refs @ 22218 */ + "MV78130\0" /* 1 refs @ 22229 */ + "XP\0" /* 5 refs @ 22237 */ + "MV78160\0" /* 1 refs @ 22240 */ + "MV78200\0" /* 1 refs @ 22248 */ + "MV78230\0" /* 1 refs @ 22256 */ + "MV78260\0" /* 1 refs @ 22264 */ + "MV78460\0" /* 1 refs @ 22272 */ + "88W8660\0" /* 1 refs @ 22280 */ + "88SE9120\0" /* 1 refs @ 22288 */ + "88SE912[38]\0" /* 1 refs @ 22297 */ + "or\0" /* 59 refs @ 22309 */ + "88SE9125\0" /* 1 refs @ 22312 */ + "88SE9128\0" /* 1 refs @ 22321 */ + "88SE9130\0" /* 1 refs @ 22330 */ + "HyperDuo\0" /* 1 refs @ 22339 */ + "88SE9172\0" /* 1 refs @ 22348 */ + "88SE9170\0" /* 2 refs @ 22357 */ + "88SE9182\0" /* 1 refs @ 22366 */ + "88SE9183\0" /* 1 refs @ 22375 */ + "88SE91XX\0" /* 1 refs @ 22384 */ + "88SE912X\0" /* 1 refs @ 22393 */ + "88SE9215\0" /* 1 refs @ 22402 */ + "88SE9220\0" /* 1 refs @ 22411 */ + "88SE9230\0" /* 1 refs @ 22420 */ + "88SE9235\0" /* 1 refs @ 22429 */ + "88SE9445\0" /* 1 refs @ 22438 */ + "88SE9480\0" /* 1 refs @ 22447 */ + "88SE9485\0" /* 1 refs @ 22456 */ + "MSI\0" /* 1 refs @ 22465 */ + "RT3090\0" /* 2 refs @ 22469 */ + "GL24110P\0" /* 2 refs @ 22476 */ + "MAXIRADIO\0" /* 1 refs @ 22485 */ + "PN672TX\0" /* 1 refs @ 22495 */ + "PM/PPC\0" /* 1 refs @ 22503 */ + "A4977A\0" /* 1 refs @ 22510 */ + "Visualize\0" /* 5 refs @ 22517 */ + "EG\0" /* 1 refs @ 22527 */ + "FX6\0" /* 1 refs @ 22530 */ + "FX4\0" /* 1 refs @ 22534 */ + "FX2\0" /* 1 refs @ 22538 */ + "TL\0" /* 1 refs @ 22542 */ + "XL2\0" /* 1 refs @ 22545 */ + "TS\0" /* 1 refs @ 22549 */ + "J2585A\0" /* 1 refs @ 22552 */ + "J2585B\0" /* 1 refs @ 22559 */ + "Diva\0" /* 1 refs @ 22566 */ + "Multiport\0" /* 1 refs @ 22571 */ + "Elroy\0" /* 1 refs @ 22581 */ + "Ropes-PCI\0" /* 3 refs @ 22587 */ + "FXe\0" /* 1 refs @ 22597 */ + "TopTools\0" /* 1 refs @ 22601 */ + "NetRaid-4M\0" /* 1 refs @ 22610 */ + "NetServer\0" /* 1 refs @ 22621 */ + "SmartIRQ\0" /* 1 refs @ 22631 */ + "82557B\0" /* 1 refs @ 22640 */ + "NIC\0" /* 8 refs @ 22647 */ + "Pluto\0" /* 1 refs @ 22651 */ + "MIO\0" /* 1 refs @ 22657 */ + "zx1\0" /* 1 refs @ 22661 */ + "IOC\0" /* 1 refs @ 22665 */ + "QuickSilver\0" /* 1 refs @ 22669 */ + "P430i\0" /* 1 refs @ 22681 */ + "P830i\0" /* 1 refs @ 22687 */ + "P430\0" /* 1 refs @ 22693 */ + "P431\0" /* 1 refs @ 22698 */ + "P830\0" /* 1 refs @ 22703 */ + "P731m\0" /* 1 refs @ 22708 */ + "P230i\0" /* 1 refs @ 22714 */ + "P530\0" /* 2 refs @ 22720 */ + "P531\0" /* 1 refs @ 22725 */ + "P244br\0" /* 1 refs @ 22730 */ + "P741m\0" /* 1 refs @ 22737 */ + "H240ar\0" /* 1 refs @ 22743 */ + "H440ar\0" /* 1 refs @ 22750 */ + "P840ar\0" /* 1 refs @ 22757 */ + "P440\0" /* 1 refs @ 22764 */ + "P441\0" /* 1 refs @ 22769 */ + "P841\0" /* 1 refs @ 22774 */ + "H244br\0" /* 1 refs @ 22779 */ + "H240\0" /* 1 refs @ 22786 */ + "H241\0" /* 1 refs @ 22791 */ + "P246br\0" /* 1 refs @ 22796 */ + "P840\0" /* 1 refs @ 22803 */ + "P542d\0" /* 1 refs @ 22808 */ + "P240nr\0" /* 1 refs @ 22814 */ + "H240nr\0" /* 1 refs @ 22821 */ + "V100\0" /* 10 refs @ 22828 */ + "E200i\0" /* 4 refs @ 22833 */ + "E200\0" /* 1 refs @ 22839 */ + "P600\0" /* 2 refs @ 22844 */ + "P400\0" /* 1 refs @ 22849 */ + "P400i\0" /* 1 refs @ 22854 */ + "P700m\0" /* 1 refs @ 22860 */ + "P212\0" /* 1 refs @ 22866 */ + "P410\0" /* 1 refs @ 22871 */ + "P410i\0" /* 1 refs @ 22876 */ + "P411\0" /* 1 refs @ 22882 */ + "P822\0" /* 2 refs @ 22887 */ + "P712m\0" /* 1 refs @ 22892 */ + "iLO3\0" /* 3 refs @ 22898 */ + "IPMI\0" /* 1 refs @ 22903 */ + "Slave\0" /* 1 refs @ 22908 */ + "P222\0" /* 1 refs @ 22914 */ + "P420\0" /* 1 refs @ 22919 */ + "P421\0" /* 1 refs @ 22924 */ + "P420i\0" /* 1 refs @ 22929 */ + "P220i\0" /* 1 refs @ 22935 */ + "P721i\0" /* 1 refs @ 22941 */ + "(AMD)\0" /* 1 refs @ 22947 */ + "Ultrastar\0" /* 2 refs @ 22953 */ + "SN100\0" /* 1 refs @ 22963 */ + "SN200\0" /* 1 refs @ 22969 */ + "7751\0" /* 2 refs @ 22975 */ + "6500\0" /* 1 refs @ 22980 */ + "7811\0" /* 1 refs @ 22985 */ + "7951\0" /* 1 refs @ 22990 */ + "7814/7851/7854\0" /* 1 refs @ 22995 */ + "8065\0" /* 1 refs @ 23010 */ + "8165\0" /* 1 refs @ 23015 */ + "8154\0" /* 1 refs @ 23020 */ + "7956\0" /* 1 refs @ 23025 */ + "7954/7955\0" /* 1 refs @ 23030 */ + "HB1\0" /* 1 refs @ 23040 */ + "HB4\0" /* 2 refs @ 23044 */ + "MSVCC01/02/03/04\0" /* 1 refs @ 23048 */ + "Cards\0" /* 1 refs @ 23065 */ + "SH7751\0" /* 1 refs @ 23071 */ + "SH7751R\0" /* 1 refs @ 23078 */ + "Hi1710\0" /* 1 refs @ 23086 */ + "BMC\0" /* 1 refs @ 23093 */ + "MCA\0" /* 2 refs @ 23097 */ + "-\0" /* 3 refs @ 23101 */ + "Alta\0" /* 2 refs @ 23103 */ + "Lite\0" /* 5 refs @ 23108 */ + "MP\0" /* 1 refs @ 23113 */ + "Fire\0" /* 1 refs @ 23116 */ + "Coral\0" /* 1 refs @ 23121 */ + "ISA\0" /* 5 refs @ 23127 */ + "PnP\0" /* 1 refs @ 23131 */ + "PowerWave\0" /* 1 refs @ 23135 */ + "Idaho\0" /* 1 refs @ 23145 */ + "Auto\0" /* 1 refs @ 23151 */ + "LANStreamer\0" /* 1 refs @ 23156 */ + "GXT-150P\0" /* 1 refs @ 23168 */ + "2D\0" /* 1 refs @ 23177 */ + "Carrera\0" /* 1 refs @ 23180 */ + "82G2675\0" /* 1 refs @ 23188 */ + "SCSI-2\0" /* 1 refs @ 23196 */ + "82351\0" /* 1 refs @ 23203 */ + "Montana/Nevada\0" /* 1 refs @ 23209 */ + "Python\0" /* 1 refs @ 23224 */ + "(copperhead)\0" /* 1 refs @ 23231 */ + "Miami/PCI\0" /* 1 refs @ 23244 */ + "82660\0" /* 1 refs @ 23254 */ + "PowerPC\0" /* 3 refs @ 23260 */ + "GXT-250P\0" /* 1 refs @ 23268 */ + "16/4\0" /* 8 refs @ 23277 */ + "MPIC\0" /* 1 refs @ 23282 */ + "Turboways\0" /* 1 refs @ 23287 */ + "25\0" /* 4 refs @ 23297 */ + "GXT-500P/GXT550P\0" /* 1 refs @ 23300 */ + "i82557B\0" /* 1 refs @ 23317 */ + "GXT-800P\0" /* 1 refs @ 23325 */ + "EADS\0" /* 1 refs @ 23334 */ + "GXT-3000P\0" /* 2 refs @ 23339 */ + "Adapter(2)\0" /* 1 refs @ 23349 */ + "GXT-2000P\0" /* 1 refs @ 23360 */ + "Olympic\0" /* 1 refs @ 23370 */ + "CPC710\0" /* 2 refs @ 23378 */ + "(PCI64)\0" /* 1 refs @ 23385 */ + "(PCI32)\0" /* 1 refs @ 23393 */ + "ThinkPad\0" /* 1 refs @ 23401 */ + "600X/A20/T20/T22\0" /* 1 refs @ 23410 */ + "PPC\0" /* 2 refs @ 23427 */ + "405GP\0" /* 1 refs @ 23431 */ + "GXT-4000P\0" /* 1 refs @ 23437 */ + "GXT-6000P\0" /* 1 refs @ 23447 */ + "GXT-300P\0" /* 1 refs @ 23457 */ + "133\0" /* 1 refs @ 23466 */ + "(morpheus)\0" /* 1 refs @ 23470 */ + "440GP\0" /* 1 refs @ 23481 */ + "GXT-6500P\0" /* 1 refs @ 23487 */ + "GXT-4500P\0" /* 1 refs @ 23497 */ + "GXT-135P\0" /* 1 refs @ 23507 */ + "4810\0" /* 2 refs @ 23516 */ + "BSP\0" /* 1 refs @ 23521 */ + "SCC\0" /* 4 refs @ 23525 */ + "8k\0" /* 1 refs @ 23529 */ + "MPIC-II\0" /* 1 refs @ 23532 */ + "Envy24\0" /* 1 refs @ 23540 */ + "Envy24PT/HT\0" /* 1 refs @ 23547 */ + "Multi-Channel\0" /* 1 refs @ 23559 */ + "iTVC15\0" /* 1 refs @ 23573 */ + "MPEG2\0" /* 1 refs @ 23580 */ + "Codec\0" /* 1 refs @ 23586 */ + "77201/77211\0" /* 1 refs @ 23592 */ + "(\"NICStAR\")\0" /* 1 refs @ 23604 */ + "RC32334\0" /* 1 refs @ 23616 */ + "RC32332\0" /* 1 refs @ 23624 */ + "PCI-WDT50x\0" /* 1 refs @ 23632 */ + "Watchdog\0" /* 6 refs @ 23643 */ + "INIC-920\0" /* 1 refs @ 23652 */ + "INIC-850\0" /* 1 refs @ 23661 */ + "INIC-1060\0" /* 1 refs @ 23670 */ + "INIC-1622\0" /* 1 refs @ 23680 */ + "INIC-940\0" /* 1 refs @ 23690 */ + "INIC-935\0" /* 1 refs @ 23699 */ + "INIC-950\0" /* 1 refs @ 23708 */ + "IGA\0" /* 2 refs @ 23717 */ + "1680\0" /* 1 refs @ 23721 */ + "1682\0" /* 1 refs @ 23726 */ + "CyberPro\0" /* 2 refs @ 23731 */ + "2010\0" /* 1 refs @ 23740 */ + "8849\0" /* 1 refs @ 23745 */ + "TwinTurbo\0" /* 1 refs @ 23750 */ + "128M\0" /* 1 refs @ 23760 */ + "Iron\0" /* 6 refs @ 23765 */ + "Lake\0" /* 470 refs @ 23770 */ + "Core\0" /* 181 refs @ 23775 */ + "Centrino\0" /* 28 refs @ 23780 */ + "Advanced-N\0" /* 10 refs @ 23789 */ + "6205\0" /* 2 refs @ 23800 */ + "WiFi\0" /* 30 refs @ 23805 */ + "Wireless-N\0" /* 16 refs @ 23810 */ + "1030\0" /* 3 refs @ 23821 */ + "6230\0" /* 2 refs @ 23826 */ + "Sandy\0" /* 13 refs @ 23831 */ + "(desktop)\0" /* 16 refs @ 23837 */ + "GI1\0" /* 1 refs @ 23847 */ + "(mobile)\0" /* 83 refs @ 23851 */ + "GT1\0" /* 2 refs @ 23860 */ + "(server)\0" /* 3 refs @ 23864 */ + "GT2\0" /* 2 refs @ 23873 */ + "GT2+\0" /* 2 refs @ 23877 */ + "Ivy\0" /* 13 refs @ 23882 */ + "Comet\0" /* 54 refs @ 23886 */ + "U\0" /* 5 refs @ 23892 */ + "(Premium)\0" /* 1 refs @ 23894 */ + "eSPI\0" /* 52 refs @ 23904 */ + "P2SB\0" /* 21 refs @ 23909 */ + "PMC\0" /* 23 refs @ 23914 */ + "(FLASH)\0" /* 12 refs @ 23918 */ + "Trace\0" /* 26 refs @ 23926 */ + "11\0" /* 12 refs @ 23932 */ + "13\0" /* 8 refs @ 23935 */ + "14\0" /* 8 refs @ 23938 */ + "15\0" /* 8 refs @ 23941 */ + "eMMC\0" /* 11 refs @ 23944 */ + "premium\0" /* 11 refs @ 23949 */ + "MEI\0" /* 46 refs @ 23957 */ + "IDE-R\0" /* 18 refs @ 23961 */ + "KT\0" /* 43 refs @ 23967 */ + "Gen\0" /* 20 refs @ 23970 */ + "2x1\0" /* 7 refs @ 23974 */ + "1x1\0" /* 9 refs @ 23978 */ + "xDCI\0" /* 10 refs @ 23982 */ + "Shared\0" /* 15 refs @ 23987 */ + "SRAM\0" /* 15 refs @ 23994 */ + "CNVi\0" /* 12 refs @ 23999 */ + "SDXC\0" /* 5 refs @ 24004 */ + "Thermal\0" /* 45 refs @ 24009 */ + "Sensor\0" /* 13 refs @ 24017 */ + "80312\0" /* 1 refs @ 24024 */ + "80321\0" /* 1 refs @ 24030 */ + "6700PXH\0" /* 3 refs @ 24036 */ + "IOxAPIC\0" /* 4 refs @ 24044 */ + "Express-to-PCI\0" /* 6 refs @ 24052 */ + "#0\0" /* 14 refs @ 24067 */ + "#1\0" /* 20 refs @ 24070 */ + "6702PXH\0" /* 1 refs @ 24073 */ + "Express-to-PCIX\0" /* 1 refs @ 24081 */ + "IOP332\0" /* 2 refs @ 24097 */ + "Lindsay\0" /* 1 refs @ 24104 */ + "IOP333\0" /* 2 refs @ 24112 */ + "Haswell\0" /* 7 refs @ 24119 */ + "DH89xxCC\0" /* 19 refs @ 24127 */ + "Endpoint\0" /* 3 refs @ 24136 */ + "QuickAssist\0" /* 4 refs @ 24145 */ + "DH89xxCL\0" /* 19 refs @ 24157 */ + "DH89XXCC\0" /* 5 refs @ 24166 */ + "SGMII\0" /* 5 refs @ 24175 */ + "SerDes\0" /* 1 refs @ 24181 */ + "backplane\0" /* 5 refs @ 24188 */ + "DH89XXCL\0" /* 1 refs @ 24198 */ + "82375EB/SB\0" /* 1 refs @ 24207 */ + "82424ZX\0" /* 1 refs @ 24218 */ + "82378ZB\0" /* 1 refs @ 24226 */ + "82426EX\0" /* 1 refs @ 24234 */ + "82434LX/NX\0" /* 1 refs @ 24242 */ + "PCI,\0" /* 1 refs @ 24253 */ + "(PCMC)\0" /* 1 refs @ 24258 */ + "GDT\0" /* 2 refs @ 24265 */ + "H470\0" /* 1 refs @ 24269 */ + "Z490\0" /* 1 refs @ 24274 */ + "Q470\0" /* 1 refs @ 24279 */ + "QM480\0" /* 1 refs @ 24284 */ + "HM470\0" /* 1 refs @ 24290 */ + "WM490\0" /* 1 refs @ 24296 */ + "W480\0" /* 1 refs @ 24302 */ + "GSPI\0" /* 40 refs @ 24307 */ + "21\0" /* 6 refs @ 24312 */ + "23\0" /* 5 refs @ 24315 */ + "24\0" /* 6 refs @ 24318 */ + "17\0" /* 5 refs @ 24321 */ + "18\0" /* 5 refs @ 24324 */ + "19\0" /* 5 refs @ 24327 */ + "cAVS\0" /* 12 refs @ 24330 */ + "1.8\0" /* 2 refs @ 24335 */ + "desktop\0" /* 4 refs @ 24339 */ + "mobile\0" /* 6 refs @ 24347 */ + "Optane\0" /* 1 refs @ 24354 */ + "HECI\0" /* 65 refs @ 24361 */ + "6150\0" /* 4 refs @ 24366 */ + "2230\0" /* 2 refs @ 24371 */ + "6235\0" /* 2 refs @ 24376 */ + "2200\0" /* 3 refs @ 24381 */ + "135\0" /* 2 refs @ 24386 */ + "105\0" /* 2 refs @ 24390 */ + "130\0" /* 2 refs @ 24394 */ + "Quark\0" /* 11 refs @ 24398 */ + "X1000\0" /* 11 refs @ 24404 */ + "SDIO/eMMC\0" /* 1 refs @ 24410 */ + "Band\0" /* 15 refs @ 24420 */ + "AC\0" /* 16 refs @ 24425 */ + "7260\0" /* 2 refs @ 24428 */ + "3160\0" /* 2 refs @ 24433 */ + "HS-UART\0" /* 1 refs @ 24438 */ + "MAC\0" /* 2 refs @ 24446 */ + "750\0" /* 9 refs @ 24450 */ + "DC\0" /* 4 refs @ 24454 */ + "P3[567]00\0" /* 1 refs @ 24457 */ + "7265\0" /* 2 refs @ 24467 */ + "Legacy\0" /* 4 refs @ 24472 */ + "i960\0" /* 5 refs @ 24479 */ + "RM\0" /* 2 refs @ 24484 */ + "RN\0" /* 1 refs @ 24487 */ + "Snow\0" /* 61 refs @ 24490 */ + "IEH\0" /* 2 refs @ 24495 */ + "Mesh2IIO\0" /* 4 refs @ 24499 */ + "MMAP/VT-d\0" /* 1 refs @ 24508 */ + "RAS\0" /* 16 refs @ 24518 */ + "PMU/PMON\0" /* 1 refs @ 24522 */ + "DFx\0" /* 1 refs @ 24531 */ + "PECI\0" /* 2 refs @ 24535 */ + "OOB-MSM\0" /* 2 refs @ 24540 */ + "PMU\0" /* 1 refs @ 24548 */ + "4G\0" /* 33 refs @ 24552 */ + "Bridge,\0" /* 29 refs @ 24555 */ + "(GT1)\0" /* 9 refs @ 24563 */ + "Mini\0" /* 2 refs @ 24569 */ + "audio\0" /* 2 refs @ 24574 */ + "(GT2)\0" /* 10 refs @ 24580 */ + "(GT3)\0" /* 5 refs @ 24586 */ + "Iris\0" /* 16 refs @ 24592 */ + "P3520\0" /* 1 refs @ 24597 */ + "P4500\0" /* 1 refs @ 24603 */ + "P4600\0" /* 1 refs @ 24609 */ + "DMA\0" /* 57 refs @ 24615 */ + "x16\0" /* 8 refs @ 24619 */ + "x8\0" /* 30 refs @ 24623 */ + "Xeon\0" /* 245 refs @ 24626 */ + "E3-1200\0" /* 1 refs @ 24631 */ + "v3\0" /* 70 refs @ 24639 */ + "x4\0" /* 39 refs @ 24642 */ + "Atom\0" /* 26 refs @ 24645 */ + "S1200\0" /* 15 refs @ 24650 */ + "management\0" /* 1 refs @ 24656 */ + "Debug\0" /* 19 refs @ 24667 */ + "mass-storage)\0" /* 1 refs @ 24673 */ + "(enclosure\0" /* 1 refs @ 24687 */ + "maintain)\0" /* 1 refs @ 24698 */ + "High-Speed\0" /* 1 refs @ 24708 */ + "S1220\0" /* 1 refs @ 24719 */ + "S1240\0" /* 1 refs @ 24725 */ + "S1260\0" /* 1 refs @ 24731 */ + "I219-LM\0" /* 23 refs @ 24737 */ + "(11)\0" /* 2 refs @ 24745 */ + "Connection\0" /* 84 refs @ 24750 */ + "I219-V\0" /* 22 refs @ 24761 */ + "(10)\0" /* 2 refs @ 24768 */ + "I225-IT\0" /* 1 refs @ 24773 */ + "(12)\0" /* 2 refs @ 24781 */ + "(23)\0" /* 2 refs @ 24786 */ + "(22)\0" /* 2 refs @ 24791 */ + "E5\0" /* 274 refs @ 24796 */ + "v2\0" /* 93 refs @ 24799 */ + "DMI2\0" /* 3 refs @ 24802 */ + "(DMI2\0" /* 2 refs @ 24807 */ + "Mode)\0" /* 5 refs @ 24813 */ + "x16,\0" /* 16 refs @ 24819 */ + "R2PCIe\0" /* 2 refs @ 24824 */ + "UBOX\0" /* 7 refs @ 24831 */ + "I/OAT\0" /* 9 refs @ 24836 */ + "Hot-Plug\0" /* 1 refs @ 24842 */ + "IIO\0" /* 17 refs @ 24851 */ + "APIC\0" /* 13 refs @ 24855 */ + "Home\0" /* 10 refs @ 24860 */ + "Agent\0" /* 29 refs @ 24865 */ + "Performance\0" /* 5 refs @ 24871 */ + "Monitor\0" /* 6 refs @ 24883 */ + "QPI\0" /* 50 refs @ 24891 */ + "IMC\0" /* 130 refs @ 24895 */ + "Reut\0" /* 8 refs @ 24899 */ + "TA\0" /* 1 refs @ 24904 */ + "TAD\0" /* 4 refs @ 24907 */ + "Error\0" /* 17 refs @ 24911 */ + "DDRIO\0" /* 35 refs @ 24917 */ + "0,1,2,3\0" /* 2 refs @ 24923 */ + "Multicast\0" /* 10 refs @ 24931 */ + "0,1\0" /* 2 refs @ 24941 */ + "PCU\0" /* 39 refs @ 24945 */ + "SAD\0" /* 3 refs @ 24949 */ + "Broadcast\0" /* 16 refs @ 24953 */ + "Unicast\0" /* 40 refs @ 24963 */ + "Bay\0" /* 37 refs @ 24971 */ + "Trail\0" /* 37 refs @ 24975 */ + "Transaction\0" /* 42 refs @ 24981 */ + "Router\0" /* 42 refs @ 24993 */ + "(DMA)\0" /* 3 refs @ 25000 */ + "(PWM)\0" /* 2 refs @ 25006 */ + "(HSUART)\0" /* 2 refs @ 25012 */ + "(SPI)\0" /* 1 refs @ 25021 */ + "Storage\0" /* 6 refs @ 25027 */ + "Cluster(eMMC)\0" /* 1 refs @ 25035 */ + "Cluster(SDIO)\0" /* 1 refs @ 25049 */ + "Cluster(SD)\0" /* 1 refs @ 25063 */ + "Trusted\0" /* 1 refs @ 25075 */ + "Execution\0" /* 1 refs @ 25083 */ + "Engine\0" /* 7 refs @ 25093 */ + "Camera\0" /* 3 refs @ 25100 */ + "Signal\0" /* 1 refs @ 25107 */ + "(I2C)\0" /* 7 refs @ 25114 */ + "Cluster(eMMC\0" /* 1 refs @ 25120 */ + "4.5)\0" /* 1 refs @ 25133 */ + "i82542\0" /* 1 refs @ 25138 */ + "i82453GC\0" /* 1 refs @ 25145 */ + "1000baseX\0" /* 9 refs @ 25154 */ + "i82543GC\0" /* 1 refs @ 25164 */ + "i82544EI\0" /* 2 refs @ 25173 */ + "i82544GC\0" /* 2 refs @ 25182 */ + "(LOM)\0" /* 5 refs @ 25191 */ + "i82540EM\0" /* 2 refs @ 25197 */ + "i82545EM\0" /* 2 refs @ 25206 */ + "i82546EB\0" /* 3 refs @ 25215 */ + "i82541EI\0" /* 2 refs @ 25224 */ + "i82541ER\0" /* 2 refs @ 25233 */ + "i82540EP\0" /* 3 refs @ 25242 */ + "i82547EI\0" /* 2 refs @ 25251 */ + "V710\0" /* 1 refs @ 25260 */ + "5000BaseT\0" /* 1 refs @ 25265 */ + "i82545GM\0" /* 3 refs @ 25275 */ + "(SERDES)\0" /* 15 refs @ 25284 */ + "PRO/100\0" /* 31 refs @ 25293 */ + "InBusiness\0" /* 1 refs @ 25301 */ + "VE\0" /* 12 refs @ 25312 */ + "VM\0" /* 17 refs @ 25315 */ + "82562EH\0" /* 3 refs @ 25318 */ + "82562ET/EZ\0" /* 3 refs @ 25326 */ + "PHY\0" /* 6 refs @ 25337 */ + "(CNR)\0" /* 2 refs @ 25341 */ + "82562EM/EX\0" /* 2 refs @ 25347 */ + "(MOB)\0" /* 2 refs @ 25358 */ + "PRO/Wireless\0" /* 7 refs @ 25364 */ + "3B\0" /* 1 refs @ 25377 */ + "PRO/10GbE\0" /* 2 refs @ 25380 */ + "LR\0" /* 2 refs @ 25390 */ + "i82801H\0" /* 7 refs @ 25393 */ + "(M_AMT)\0" /* 1 refs @ 25401 */ + "(AMT)\0" /* 3 refs @ 25409 */ + "(IFE)\0" /* 1 refs @ 25415 */ + "X710-TM4\0" /* 3 refs @ 25421 */ + "SFP+\0" /* 7 refs @ 25430 */ + "Backplane\0" /* 11 refs @ 25435 */ + "82801EB/ER\0" /* 10 refs @ 25445 */ + "i82571EB\0" /* 7 refs @ 25456 */ + "82801FB\0" /* 4 refs @ 25465 */ + "82801GB\0" /* 1 refs @ 25473 */ + "i82547GI\0" /* 1 refs @ 25481 */ + "i82541GI\0" /* 2 refs @ 25490 */ + "i82546GB\0" /* 5 refs @ 25499 */ + "i82541PI\0" /* 1 refs @ 25508 */ + "i82572EI\0" /* 4 refs @ 25517 */ + "PRO/1000MT\0" /* 1 refs @ 25526 */ + "(82546GB)\0" /* 1 refs @ 25537 */ + "i82573E\0" /* 2 refs @ 25547 */ + "82562G\0" /* 1 refs @ 25555 */ + "i80003\0" /* 5 refs @ 25562 */ + "i82573L\0" /* 1 refs @ 25569 */ + "82597EX\0" /* 1 refs @ 25577 */ + "CX4\0" /* 3 refs @ 25585 */ + "Fiber\0" /* 2 refs @ 25589 */ + "i82575EB\0" /* 2 refs @ 25595 */ + "dual-1000baseT\0" /* 1 refs @ 25604 */ + "dual-1000baseX\0" /* 1 refs @ 25619 */ + "(KSP3)\0" /* 1 refs @ 25634 */ + "82598\0" /* 9 refs @ 25641 */ + "10G\0" /* 18 refs @ 25647 */ + "i82571GB\0" /* 1 refs @ 25651 */ + "82801I\0" /* 34 refs @ 25660 */ + "(G)\0" /* 2 refs @ 25667 */ + "(GT)\0" /* 2 refs @ 25671 */ + "IFE\0" /* 2 refs @ 25676 */ + "82576\0" /* 10 refs @ 25680 */ + "1000BaseT\0" /* 6 refs @ 25686 */ + "i82801I\0" /* 1 refs @ 25696 */ + "(MV)\0" /* 1 refs @ 25704 */ + "i82567LM-2\0" /* 1 refs @ 25709 */ + "i82567LF-2\0" /* 1 refs @ 25720 */ + "i82567V-2\0" /* 1 refs @ 25731 */ + "i82574L\0" /* 1 refs @ 25741 */ + "i82571PT\0" /* 1 refs @ 25749 */ + "quad-1000baseT\0" /* 2 refs @ 25758 */ + "i82575GB\0" /* 2 refs @ 25773 */ + "dual\0" /* 1 refs @ 25782 */ + "giabit\0" /* 2 refs @ 25787 */ + "qual\0" /* 1 refs @ 25794 */ + "82598EB\0" /* 3 refs @ 25799 */ + "i82567LM-3\0" /* 1 refs @ 25807 */ + "i82567LF-3\0" /* 1 refs @ 25818 */ + "SR\0" /* 2 refs @ 25829 */ + "Quad-1000baseT\0" /* 1 refs @ 25832 */ + "(PM)\0" /* 1 refs @ 25847 */ + "i82567LM-4\0" /* 1 refs @ 25852 */ + "1000BaseX\0" /* 2 refs @ 25863 */ + "gigabit\0" /* 4 refs @ 25873 */ + "quad-1000BaseT\0" /* 2 refs @ 25881 */ + "PCH\0" /* 104 refs @ 25896 */ + "(82577LM)\0" /* 1 refs @ 25900 */ + "(82577LC)\0" /* 1 refs @ 25910 */ + "82599\0" /* 18 refs @ 25920 */ + "(82578DM)\0" /* 1 refs @ 25926 */ + "(82578DC)\0" /* 1 refs @ 25936 */ + "DA\0" /* 1 refs @ 25946 */ + "XF\0" /* 1 refs @ 25949 */ + "82574L\0" /* 1 refs @ 25952 */ + "(KX/KX4)\0" /* 1 refs @ 25959 */ + "GbE\0" /* 18 refs @ 25968 */ + "(combined\0" /* 1 refs @ 25972 */ + "backplane;\0" /* 1 refs @ 25982 */ + "KR/KX4/KX)\0" /* 1 refs @ 25993 */ + "(CX4)\0" /* 1 refs @ 26004 */ + "(SFI/SFP+)\0" /* 1 refs @ 26010 */ + "(XAUI/BX4)\0" /* 1 refs @ 26021 */ + "82552\0" /* 1 refs @ 26032 */ + "82815\0" /* 10 refs @ 26038 */ + "82806AA\0" /* 1 refs @ 26044 */ + "PCI64\0" /* 1 refs @ 26052 */ + "Programmable\0" /* 2 refs @ 26058 */ + "ADI\0" /* 1 refs @ 26071 */ + "i80200\0" /* 1 refs @ 26075 */ + "Big\0" /* 1 refs @ 26082 */ + "Endian\0" /* 1 refs @ 26086 */ + "IXP1200\0" /* 1 refs @ 26093 */ + "82559ER\0" /* 1 refs @ 26101 */ + "82092AA\0" /* 1 refs @ 26109 */ + "SAA7116\0" /* 1 refs @ 26117 */ + "82452KX/GX\0" /* 1 refs @ 26125 */ + "Orion\0" /* 1 refs @ 26136 */ + "Extended\0" /* 2 refs @ 26142 */ + "82596\0" /* 1 refs @ 26151 */ + "EE\0" /* 2 refs @ 26157 */ + "8255x\0" /* 1 refs @ 26160 */ + "82437FX\0" /* 1 refs @ 26166 */ + "(TSC)\0" /* 1 refs @ 26174 */ + "82371FB\0" /* 2 refs @ 26180 */ + "(PIIX)\0" /* 2 refs @ 26188 */ + "82371MX\0" /* 1 refs @ 26195 */ + "(MPIIX)\0" /* 1 refs @ 26203 */ + "Xcelerator\0" /* 1 refs @ 26211 */ + "82437MX\0" /* 1 refs @ 26222 */ + "(MTSC)\0" /* 1 refs @ 26230 */ + "82441FX\0" /* 1 refs @ 26237 */ + "(PMC)\0" /* 1 refs @ 26245 */ + "82380AB\0" /* 1 refs @ 26251 */ + "(MISA)\0" /* 1 refs @ 26259 */ + "82380FB\0" /* 1 refs @ 26266 */ + "(MPCI2)\0" /* 1 refs @ 26274 */ + "82439HX\0" /* 1 refs @ 26282 */ + "(TXC)\0" /* 1 refs @ 26290 */ + "I226-LM\0" /* 1 refs @ 26296 */ + "I226-V\0" /* 1 refs @ 26304 */ + "I226-IT\0" /* 1 refs @ 26311 */ + "I221-V\0" /* 1 refs @ 26319 */ + "I226\0" /* 1 refs @ 26326 */ + "(blankNVM)\0" /* 2 refs @ 26331 */ + "C3000\0" /* 81 refs @ 26342 */ + "X553\0" /* 15 refs @ 26348 */ + "1G\0" /* 3 refs @ 26353 */ + "82870P2\0" /* 3 refs @ 26356 */ + "P64H2\0" /* 3 refs @ 26364 */ + "Hot\0" /* 3 refs @ 26370 */ + "Plug\0" /* 3 refs @ 26374 */ + "i82567V-3\0" /* 1 refs @ 26379 */ + "82579LM\0" /* 1 refs @ 26389 */ + "82579V\0" /* 1 refs @ 26397 */ + "BX\0" /* 1 refs @ 26404 */ + "AT2\0" /* 1 refs @ 26407 */ + "i82583V\0" /* 1 refs @ 26411 */ + "quad-gigabit\0" /* 1 refs @ 26419 */ + "82580\0" /* 8 refs @ 26432 */ + "(SGMII)\0" /* 3 refs @ 26438 */ + "KX4\0" /* 2 refs @ 26446 */ + "Mezzanine\0" /* 1 refs @ 26450 */ + "X540\0" /* 4 refs @ 26460 */ + "dual-1000BaseT\0" /* 2 refs @ 26465 */ + "KR\0" /* 2 refs @ 26480 */ + "I350\0" /* 7 refs @ 26483 */ + "82567V\0" /* 1 refs @ 26488 */ + "quad-1000BaseX\0" /* 1 refs @ 26495 */ + "X540-AT2\0" /* 1 refs @ 26510 */ + "10Gbase-T\0" /* 1 refs @ 26519 */ + "FCoE\0" /* 2 refs @ 26529 */ + "I210-T1\0" /* 1 refs @ 26534 */ + "I210\0" /* 8 refs @ 26542 */ + "(COPPER\0" /* 2 refs @ 26547 */ + "OEM)\0" /* 1 refs @ 26555 */ + "IT)\0" /* 1 refs @ 26560 */ + "(FIBER)\0" /* 1 refs @ 26564 */ + "I211\0" /* 1 refs @ 26572 */ + "(COPPER)\0" /* 2 refs @ 26577 */ + "I217-LM\0" /* 1 refs @ 26586 */ + "I217-V\0" /* 1 refs @ 26594 */ + "XL710\0" /* 11 refs @ 26601 */ + "(SFP+)\0" /* 1 refs @ 26607 */ + "X520\0" /* 1 refs @ 26614 */ + "QSFP+\0" /* 5 refs @ 26619 */ + "I218-V\0" /* 3 refs @ 26625 */ + "I218-LM\0" /* 3 refs @ 26632 */ + "Bypass\0" /* 2 refs @ 26640 */ + "(SFI)\0" /* 2 refs @ 26647 */ + "KX\0" /* 1 refs @ 26653 */ + "40GbE\0" /* 4 refs @ 26656 */ + "(KX)\0" /* 2 refs @ 26662 */ + "X710\0" /* 1 refs @ 26667 */ + "10GBASE-T\0" /* 5 refs @ 26672 */ + "20GbE\0" /* 2 refs @ 26682 */ + "X710-T4\0" /* 1 refs @ 26688 */ + "10GbaseT\0" /* 2 refs @ 26696 */ + "XXV710\0" /* 2 refs @ 26705 */ + "25GbE\0" /* 2 refs @ 26712 */ + "SFP28\0" /* 1 refs @ 26718 */ + "X552\0" /* 7 refs @ 26724 */ + "(Hyper-V)\0" /* 2 refs @ 26729 */ + "X557-AT2\0" /* 1 refs @ 26739 */ + "1000Base-T\0" /* 1 refs @ 26748 */ + "XFI\0" /* 1 refs @ 26759 */ + "(2)\0" /* 2 refs @ 26763 */ + "(3)\0" /* 1 refs @ 26767 */ + "(7)\0" /* 2 refs @ 26771 */ + "(6)\0" /* 2 refs @ 26775 */ + "(KR/KX\0" /* 1 refs @ 26779 */ + "SKU)\0" /* 8 refs @ 26786 */ + "(KX\0" /* 1 refs @ 26791 */ + "2.5G)\0" /* 3 refs @ 26795 */ + "1GbE\0" /* 4 refs @ 26801 */ + "(10G\0" /* 2 refs @ 26806 */ + "(non-10G\0" /* 2 refs @ 26811 */ + "(X557)\0" /* 1 refs @ 26820 */ + "QSFP\0" /* 3 refs @ 26827 */ + "(KR)\0" /* 1 refs @ 26832 */ + "(5)\0" /* 2 refs @ 26837 */ + "(4)\0" /* 2 refs @ 26841 */ + "(8)\0" /* 2 refs @ 26845 */ + "(9)\0" /* 2 refs @ 26849 */ + "I225\0" /* 3 refs @ 26853 */ + "LM\0" /* 3 refs @ 26858 */ + "V\0" /* 2 refs @ 26861 */ + "I220-V\0" /* 1 refs @ 26863 */ + "(15)\0" /* 2 refs @ 26870 */ + "I225-I\0" /* 1 refs @ 26875 */ + "(14)\0" /* 2 refs @ 26882 */ + "(13)\0" /* 2 refs @ 26887 */ + "5G\0" /* 37 refs @ 26892 */ + "5500\0" /* 25 refs @ 26895 */ + "6000\0" /* 10 refs @ 26900 */ + "6100\0" /* 3 refs @ 26905 */ + "E882-C\0" /* 4 refs @ 26910 */ + "E882-C/X557-AT\0" /* 1 refs @ 26917 */ + "E882-X\0" /* 1 refs @ 26932 */ + "(for\0" /* 6 refs @ 26939 */ + "BMSM)\0" /* 1 refs @ 26944 */ + "E882-L\0" /* 3 refs @ 26950 */ + "E882-L/X557-AT\0" /* 1 refs @ 26957 */ + "QAT\0" /* 13 refs @ 26972 */ + "Cluster\0" /* 16 refs @ 26976 */ + "2,\0" /* 6 refs @ 26984 */ + "RP\0" /* 104 refs @ 26987 */ + "0,\0" /* 8 refs @ 26990 */ + "VRP\0" /* 2 refs @ 26993 */ + "NIS\0" /* 1 refs @ 26997 */ + "ME\0" /* 20 refs @ 27001 */ + "HSUART\0" /* 1 refs @ 27004 */ + "LPC/eSPI\0" /* 5 refs @ 27011 */ + "iRC\0" /* 1 refs @ 27020 */ + "PMC/SRAM\0" /* 1 refs @ 27024 */ + "1.7\0" /* 1 refs @ 27033 */ + "6G\0" /* 13 refs @ 27037 */ + "(H,\0" /* 7 refs @ 27040 */ + "Core)\0" /* 5 refs @ 27044 */ + "510\0" /* 4 refs @ 27050 */ + "(U)\0" /* 6 refs @ 27054 */ + "(Y)\0" /* 2 refs @ 27058 */ + "(S,\0" /* 12 refs @ 27062 */ + "Gaussian\0" /* 2 refs @ 27066 */ + "Mixture\0" /* 2 refs @ 27075 */ + "Model\0" /* 3 refs @ 27083 */ + "530\0" /* 5 refs @ 27089 */ + "(H/S,\0" /* 1 refs @ 27093 */ + "Unit\0" /* 17 refs @ 27099 */ + "515\0" /* 1 refs @ 27104 */ + "(GT3e)\0" /* 2 refs @ 27108 */ + "62xx\0" /* 2 refs @ 27115 */ + "(GT4)\0" /* 4 refs @ 27120 */ + "ROB-in\0" /* 1 refs @ 27126 */ + "i960RP\0" /* 1 refs @ 27133 */ + "Microprocessor\0" /* 1 refs @ 27140 */ + "GLREG\0" /* 1 refs @ 27155 */ + "2.0/3.0\0" /* 1 refs @ 27161 */ + "Combo\0" /* 1 refs @ 27169 */ + "HS\0" /* 1 refs @ 27175 */ + "IE\0" /* 14 refs @ 27178 */ + "(17)\0" /* 2 refs @ 27181 */ + "(16)\0" /* 2 refs @ 27186 */ + "82840\0" /* 3 refs @ 27191 */ + "82845\0" /* 2 refs @ 27197 */ + "DMI-PCI\0" /* 1 refs @ 27203 */ + "Z68\0" /* 1 refs @ 27211 */ + "P67\0" /* 1 refs @ 27215 */ + "UM67\0" /* 1 refs @ 27219 */ + "HM65\0" /* 1 refs @ 27224 */ + "H67\0" /* 1 refs @ 27229 */ + "HM67\0" /* 1 refs @ 27233 */ + "Q65\0" /* 1 refs @ 27238 */ + "QS67\0" /* 1 refs @ 27242 */ + "Q67\0" /* 1 refs @ 27247 */ + "QM67\0" /* 1 refs @ 27251 */ + "B65\0" /* 1 refs @ 27256 */ + "C202\0" /* 1 refs @ 27260 */ + "C204\0" /* 1 refs @ 27265 */ + "C206\0" /* 1 refs @ 27270 */ + "H61\0" /* 1 refs @ 27275 */ + "C600/X79\0" /* 15 refs @ 27279 */ + "Premium\0" /* 6 refs @ 27288 */ + "C600\0" /* 26 refs @ 27296 */ + "(SATA)\0" /* 4 refs @ 27301 */ + "C606/C608\0" /* 1 refs @ 27308 */ + "C608\0" /* 1 refs @ 27318 */ + "Z77\0" /* 1 refs @ 27323 */ + "Z75\0" /* 1 refs @ 27327 */ + "Q77\0" /* 1 refs @ 27331 */ + "Q75\0" /* 1 refs @ 27335 */ + "B75\0" /* 1 refs @ 27339 */ + "H77\0" /* 1 refs @ 27343 */ + "C216\0" /* 1 refs @ 27347 */ + "QM77\0" /* 1 refs @ 27352 */ + "QS77\0" /* 1 refs @ 27357 */ + "HM77\0" /* 1 refs @ 27362 */ + "UM77\0" /* 1 refs @ 27367 */ + "HM76\0" /* 1 refs @ 27372 */ + "HM75\0" /* 1 refs @ 27377 */ + "HM70\0" /* 1 refs @ 27382 */ + "NM70\0" /* 1 refs @ 27387 */ + "C2000\0" /* 37 refs @ 27392 */ + "IQIA\0" /* 2 refs @ 27398 */ + "Physical\0" /* 8 refs @ 27403 */ + "SATA2\0" /* 1 refs @ 27412 */ + "SATA3\0" /* 1 refs @ 27418 */ + "Ethernet(1000BASE-KX)\0" /* 1 refs @ 27424 */ + "Ethernet(SGMII)\0" /* 1 refs @ 27446 */ + "Ethernet(Dummy\0" /* 1 refs @ 27462 */ + "function)\0" /* 1 refs @ 27477 */ + "Ethernet(2.5Gbe)\0" /* 1 refs @ 27487 */ + "Scalable\0" /* 55 refs @ 27504 */ + "Ubox\0" /* 6 refs @ 27513 */ + "M2PCI\0" /* 1 refs @ 27518 */ + "CBDMA\0" /* 1 refs @ 27524 */ + "MM/Vt-d\0" /* 1 refs @ 27530 */ + "VT-d\0" /* 1 refs @ 27538 */ + "LMS\0" /* 2 refs @ 27543 */ + "LMDP\0" /* 2 refs @ 27547 */ + "DECS\0" /* 1 refs @ 27552 */ + "M3KTI\0" /* 3 refs @ 27557 */ + "CHA\0" /* 6 refs @ 27563 */ + "UPI\0" /* 1 refs @ 27567 */ + "M2PCIe\0" /* 1 refs @ 27571 */ + "Braswell\0" /* 28 refs @ 27578 */ + "Soc\0" /* 1 refs @ 27587 */ + "SIO\0" /* 23 refs @ 27591 */ + "Z8000\0" /* 7 refs @ 27595 */ + "LPIO1\0" /* 5 refs @ 27601 */ + "PWM1\0" /* 1 refs @ 27607 */ + "PWM2\0" /* 1 refs @ 27612 */ + "SPI1\0" /* 1 refs @ 27617 */ + "SPI2\0" /* 1 refs @ 27622 */ + "MMC\0" /* 1 refs @ 27627 */ + "SDIO\0" /* 7 refs @ 27631 */ + "TXE\0" /* 5 refs @ 27636 */ + "SPI3\0" /* 1 refs @ 27640 */ + "(OTG)\0" /* 6 refs @ 27645 */ + "ISP\0" /* 1 refs @ 27651 */ + "IOSF2OCP\0" /* 1 refs @ 27655 */ + "Subsystem\0" /* 4 refs @ 27664 */ + "82801AA\0" /* 7 refs @ 27674 */ + "AC-97\0" /* 17 refs @ 27682 */ + "Hub-PCI\0" /* 5 refs @ 27688 */ + "82801AB\0" /* 7 refs @ 27696 */ + "82801BA\0" /* 9 refs @ 27704 */ + "82801BAM\0" /* 3 refs @ 27712 */ + "82801E\0" /* 4 refs @ 27721 */ + "82801CA\0" /* 9 refs @ 27728 */ + "82801CAM\0" /* 1 refs @ 27736 */ + "82801DB\0" /* 10 refs @ 27745 */ + "UHCI\0" /* 46 refs @ 27753 */ + "82801DBM\0" /* 1 refs @ 27758 */ + "(UltraATA/100)\0" /* 1 refs @ 27767 */ + "82801EB\0" /* 3 refs @ 27782 */ + "82801ER\0" /* 1 refs @ 27790 */ + "8260\0" /* 2 refs @ 27798 */ + "4165\0" /* 2 refs @ 27803 */ + "3168\0" /* 1 refs @ 27808 */ + "8265\0" /* 1 refs @ 27813 */ + "82820\0" /* 2 refs @ 27818 */ + "MCH\0" /* 16 refs @ 27824 */ + "(Camino)\0" /* 1 refs @ 27828 */ + "9260\0" /* 1 refs @ 27837 */ + "82850\0" /* 1 refs @ 27842 */ + "82860\0" /* 5 refs @ 27848 */ + "82850/82860\0" /* 1 refs @ 27854 */ + "E7500\0" /* 8 refs @ 27866 */ + "HI_B\0" /* 4 refs @ 27872 */ + "vppb\0" /* 6 refs @ 27877 */ + "HI_C\0" /* 2 refs @ 27882 */ + "HI_D\0" /* 2 refs @ 27887 */ + "E7501\0" /* 1 refs @ 27892 */ + "E7505\0" /* 5 refs @ 27898 */ + "Host-AGP\0" /* 5 refs @ 27904 */ + "Reporting\0" /* 8 refs @ 27913 */ + "82845G/GL\0" /* 3 refs @ 27923 */ + "Host-Hub\0" /* 2 refs @ 27933 */ + "I/F\0" /* 2 refs @ 27942 */ + "82865\0" /* 2 refs @ 27946 */ + "82865G\0" /* 1 refs @ 27952 */ + "82875P\0" /* 3 refs @ 27959 */ + "PCI-CSA\0" /* 1 refs @ 27966 */ + "82915P/G/GL\0" /* 2 refs @ 27974 */ + "82915G/GL\0" /* 2 refs @ 27986 */ + "82925X\0" /* 2 refs @ 27996 */ + "E7221\0" /* 2 refs @ 28003 */ + "82915PM/GM/GMS,82910GML\0" /* 1 refs @ 28009 */ + "82915PM/GM\0" /* 1 refs @ 28033 */ + "82915GM/GMS,82910GML\0" /* 1 refs @ 28044 */ + "6300ESB\0" /* 13 refs @ 28065 */ + "5000X\0" /* 2 refs @ 28073 */ + "5000Z\0" /* 1 refs @ 28079 */ + "ESI\0" /* 5 refs @ 28085 */ + "5000V\0" /* 1 refs @ 28089 */ + "5000P\0" /* 1 refs @ 28095 */ + "FSB\0" /* 1 refs @ 28101 */ + "Registers\0" /* 67 refs @ 28105 */ + "FBD\0" /* 2 refs @ 28115 */ + "2-3\0" /* 7 refs @ 28119 */ + "4-5\0" /* 1 refs @ 28123 */ + "6-7\0" /* 1 refs @ 28127 */ + "4-7\0" /* 1 refs @ 28131 */ + "82801FBM\0" /* 2 refs @ 28135 */ + "ICH6M\0" /* 1 refs @ 28144 */ + "82801FR\0" /* 1 refs @ 28150 */ + "82801FB/FR\0" /* 13 refs @ 28158 */ + "#2\0" /* 11 refs @ 28169 */ + "High\0" /* 25 refs @ 28172 */ + "Definition\0" /* 25 refs @ 28177 */ + "63xxESB\0" /* 21 refs @ 28188 */ + "#3\0" /* 8 refs @ 28196 */ + "#4\0" /* 7 refs @ 28199 */ + "DLB\0" /* 1 refs @ 28202 */ + "1.0\0" /* 1 refs @ 28206 */ + "Wi-Fi\0" /* 2 refs @ 28210 */ + "82945G/P\0" /* 3 refs @ 28216 */ + "82955X\0" /* 2 refs @ 28225 */ + "E7230\0" /* 2 refs @ 28232 */ + "82975X\0" /* 3 refs @ 28238 */ + "IGD\0" /* 2 refs @ 28245 */ + "82915GM/GMS\0" /* 1 refs @ 28249 */ + "82945GM/PM/GMS\0" /* 3 refs @ 28261 */ + "82945GME\0" /* 2 refs @ 28276 */ + "82801GH\0" /* 1 refs @ 28285 */ + "82801GB/GR\0" /* 21 refs @ 28293 */ + "82801GBM\0" /* 2 refs @ 28304 */ + "NM10\0" /* 1 refs @ 28313 */ + "82801GHM\0" /* 2 refs @ 28318 */ + "82801GBM/GHM\0" /* 1 refs @ 28327 */ + "#5\0" /* 4 refs @ 28340 */ + "#6\0" /* 3 refs @ 28343 */ + "82801H\0" /* 22 refs @ 28346 */ + "82801HEM\0" /* 2 refs @ 28353 */ + "82801HH\0" /* 1 refs @ 28362 */ + "82801HO\0" /* 1 refs @ 28370 */ + "82801HBM\0" /* 3 refs @ 28378 */ + "ports\0" /* 10 refs @ 28387 */ + "82801H/C6[12]x/X99/Z170/[ZQH]270\0" /* 1 refs @ 28393 */ + "C62x\0" /* 1 refs @ 28426 */ + "sSATA\0" /* 10 refs @ 28431 */ + "C6[12]x/X99/[ZQH]270\0" /* 1 refs @ 28437 */ + "C6[12]x/X99\0" /* 1 refs @ 28458 */ + "VMD\0" /* 1 refs @ 28470 */ + "82801IH\0" /* 1 refs @ 28474 */ + "82801IO\0" /* 1 refs @ 28482 */ + "82801IR\0" /* 1 refs @ 28490 */ + "82801IEM\0" /* 1 refs @ 28498 */ + "82801IB\0" /* 1 refs @ 28507 */ + "82801IM\0" /* 1 refs @ 28515 */ + "(C)\0" /* 1 refs @ 28523 */ + "82946GZ\0" /* 3 refs @ 28527 */ + "82G35\0" /* 6 refs @ 28535 */ + "82965\0" /* 1 refs @ 28541 */ + "82965Q\0" /* 5 refs @ 28547 */ + "82Q965\0" /* 3 refs @ 28554 */ + "82965G\0" /* 4 refs @ 28561 */ + "82P965/G965\0" /* 1 refs @ 28568 */ + "82Q35\0" /* 9 refs @ 28580 */ + "82G33/P35\0" /* 1 refs @ 28586 */ + "82G33\0" /* 3 refs @ 28596 */ + "82G33/G31/P35/P31\0" /* 1 refs @ 28602 */ + "82Q33\0" /* 1 refs @ 28620 */ + "82X38\0" /* 5 refs @ 28626 */ + "Host-Primary\0" /* 1 refs @ 28632 */ + "Host-Secondary\0" /* 1 refs @ 28645 */ + "3200/3210\0" /* 2 refs @ 28660 */ + "82965PM\0" /* 7 refs @ 28670 */ + "80862A01\0" /* 1 refs @ 28678 */ + "IDER\0" /* 13 refs @ 28687 */ + "82965PM/GM\0" /* 1 refs @ 28692 */ + "82965GME\0" /* 7 refs @ 28703 */ + "82GM45\0" /* 8 refs @ 28712 */ + "QuickPath\0" /* 15 refs @ 28719 */ + "Mirror\0" /* 4 refs @ 28729 */ + "Test\0" /* 3 refs @ 28736 */ + "Rank\0" /* 8 refs @ 28741 */ + "Non-Core\0" /* 5 refs @ 28746 */ + "Register\0" /* 6 refs @ 28755 */ + "i7-800\0" /* 15 refs @ 28764 */ + "i5-700\0" /* 15 refs @ 28771 */ + "i5-600,\0" /* 6 refs @ 28778 */ + "i3-500\0" /* 6 refs @ 28786 */ + "Pentium\0" /* 6 refs @ 28793 */ + "82IGD_E\0" /* 3 refs @ 28801 */ + "82Q45\0" /* 10 refs @ 28809 */ + "82G45\0" /* 2 refs @ 28815 */ + "82G41\0" /* 2 refs @ 28821 */ + "82B43\0" /* 2 refs @ 28827 */ + "Mode\0" /* 1 refs @ 28833 */ + "v3/Core\0" /* 49 refs @ 28838 */ + "i7-6xxxK\0" /* 9 refs @ 28846 */ + "Scratchpad\0" /* 5 refs @ 28855 */ + "Semaphores\0" /* 3 refs @ 28866 */ + "QDT\0" /* 8 refs @ 28877 */ + "Map,\0" /* 2 refs @ 28881 */ + "VTd,\0" /* 1 refs @ 28886 */ + "SMM\0" /* 1 refs @ 28891 */ + "RAS,\0" /* 2 refs @ 28895 */ + "CS,\0" /* 1 refs @ 28900 */ + "Errors\0" /* 2 refs @ 28904 */ + "Monitoring\0" /* 3 refs @ 28911 */ + "E7\0" /* 52 refs @ 28922 */ + "v4\0" /* 8 refs @ 28925 */ + "v3/Xeon\0" /* 44 refs @ 28928 */ + "i7\0" /* 45 refs @ 28936 */ + "Address,\0" /* 4 refs @ 28939 */ + "Ch\0" /* 24 refs @ 28948 */ + "0-1\0" /* 12 refs @ 28951 */ + "Decode\0" /* 6 refs @ 28955 */ + "0-3\0" /* 6 refs @ 28962 */ + "2/3\0" /* 1 refs @ 28966 */ + "Ras\0" /* 1 refs @ 28970 */ + "VCU\0" /* 2 refs @ 28974 */ + "0/1\0" /* 5 refs @ 28978 */ + "Buffered\0" /* 4 refs @ 28982 */ + "I225-K\0" /* 1 refs @ 28991 */ + "I225-K2\0" /* 1 refs @ 28998 */ + "I226-K\0" /* 1 refs @ 29006 */ + "3165\0" /* 2 refs @ 29013 */ + "UHD\0" /* 39 refs @ 29018 */ + "605\0" /* 2 refs @ 29022 */ + "Gemini\0" /* 35 refs @ 29026 */ + "DPTF\0" /* 5 refs @ 29033 */ + "GNA\0" /* 2 refs @ 29038 */ + "SideBand\0" /* 2 refs @ 29042 */ + "(xHCI)\0" /* 8 refs @ 29051 */ + "(xDCI)\0" /* 6 refs @ 29058 */ + "x2\0" /* 2 refs @ 29065 */ + "31244\0" /* 1 refs @ 29068 */ + "82855PM\0" /* 3 refs @ 29074 */ + "(Max\0" /* 4 refs @ 29082 */ + "x16)\0" /* 1 refs @ 29087 */ + "x4)\0" /* 2 refs @ 29092 */ + "x8)\0" /* 1 refs @ 29096 */ + "5500/X58\0" /* 2 refs @ 29100 */ + "DMI\0" /* 3 refs @ 29109 */ + "X58\0" /* 1 refs @ 29113 */ + "5520\0" /* 2 refs @ 29117 */ + "5520/5500/X58\0" /* 21 refs @ 29122 */ + "5520/X58\0" /* 1 refs @ 29136 */ + "Scratchpads\0" /* 1 refs @ 29145 */ + "Misc\0" /* 1 refs @ 29157 */ + "Throttling\0" /* 1 refs @ 29162 */ + "SPD\0" /* 1 refs @ 29173 */ + "Mesh\0" /* 1 refs @ 29177 */ + "Credit\0" /* 1 refs @ 29182 */ + "Mapping\0" /* 1 refs @ 29189 */ + "Rules\0" /* 2 refs @ 29197 */ + "RACU\0" /* 1 refs @ 29203 */ + "NCDECS\0" /* 1 refs @ 29208 */ + "Handling\0" /* 1 refs @ 29215 */ + "(CPU\0" /* 1 refs @ 29224 */ + "MMIO\0" /* 1 refs @ 29229 */ + "NCEVENTS\0" /* 1 refs @ 29234 */ + "495\0" /* 49 refs @ 29243 */ + "Y\0" /* 1 refs @ 29247 */ + "ISH\0" /* 5 refs @ 29249 */ + "82830MP\0" /* 4 refs @ 29253 */ + "82855GM\0" /* 5 refs @ 29261 */ + "GMCH\0" /* 3 refs @ 29269 */ + "Process\0" /* 1 refs @ 29274 */ + "E7525\0" /* 5 refs @ 29282 */ + "E7520\0" /* 5 refs @ 29288 */ + "A1\0" /* 2 refs @ 29294 */ + "X722\0" /* 10 refs @ 29297 */ + "A0\0" /* 3 refs @ 29302 */ + "C620\0" /* 99 refs @ 29305 */ + "Uplink\0" /* 2 refs @ 29310 */ + "(NPX16)\0" /* 1 refs @ 29317 */ + "(NPX8)\0" /* 1 refs @ 29325 */ + "LAN)\0" /* 1 refs @ 29332 */ + "Termal\0" /* 1 refs @ 29337 */ + "Sensor)\0" /* 1 refs @ 29344 */ + "LOM\0" /* 1 refs @ 29352 */ + "1GbaseT\0" /* 1 refs @ 29356 */ + "I\0" /* 1 refs @ 29364 */ + "82801JD\0" /* 23 refs @ 29366 */ + "82801JDO\0" /* 1 refs @ 29374 */ + "82801JIR\0" /* 1 refs @ 29383 */ + "82801JIB\0" /* 1 refs @ 29392 */ + "82801JI\0" /* 22 refs @ 29401 */ + "P55\0" /* 1 refs @ 29409 */ + "PM55\0" /* 1 refs @ 29413 */ + "H55\0" /* 1 refs @ 29418 */ + "QM57\0" /* 1 refs @ 29422 */ + "H57\0" /* 1 refs @ 29427 */ + "HM55\0" /* 1 refs @ 29431 */ + "Q57\0" /* 1 refs @ 29436 */ + "HM57\0" /* 1 refs @ 29440 */ + "QS57\0" /* 2 refs @ 29445 */ + "3420\0" /* 1 refs @ 29450 */ + "ECHI\0" /* 1 refs @ 29455 */ + "PT\0" /* 1 refs @ 29460 */ + "Primary(NTB/NTB)\0" /* 1 refs @ 29463 */ + "Primary(NTB/RP)\0" /* 1 refs @ 29480 */ + "QuickData\0" /* 14 refs @ 29496 */ + "5/6)\0" /* 2 refs @ 29506 */ + "IOO\0" /* 1 refs @ 29511 */ + "IRP\0" /* 1 refs @ 29515 */ + "Perfmon\0" /* 1 refs @ 29519 */ + "Channlel\0" /* 5 refs @ 29527 */ + "Scratch\0" /* 7 refs @ 29536 */ + "Desktop)\0" /* 2 refs @ 29544 */ + "(H)\0" /* 14 refs @ 29553 */ + "WS)\0" /* 3 refs @ 29557 */ + "8G\0" /* 9 refs @ 29561 */ + "(S)\0" /* 5 refs @ 29564 */ + "Halo)\0" /* 2 refs @ 29568 */ + "Server)\0" /* 3 refs @ 29574 */ + "610\0" /* 10 refs @ 29582 */ + "630\0" /* 13 refs @ 29586 */ + "P630\0" /* 7 refs @ 29590 */ + "620\0" /* 7 refs @ 29595 */ + "655\0" /* 3 refs @ 29599 */ + "645\0" /* 3 refs @ 29603 */ + "5400\0" /* 15 refs @ 29607 */ + "5400A\0" /* 1 refs @ 29612 */ + "5400B\0" /* 1 refs @ 29618 */ + "SNB\0" /* 1 refs @ 29624 */ + "FSB/Boot/Interrupt\0" /* 1 refs @ 29628 */ + "Coherency\0" /* 1 refs @ 29647 */ + "E600\0" /* 8 refs @ 29657 */ + "2200BG\0" /* 1 refs @ 29662 */ + "2225BG\0" /* 1 refs @ 29669 */ + "3945ABG\0" /* 2 refs @ 29676 */ + "2915ABG\0" /* 2 refs @ 29684 */ + "4965\0" /* 4 refs @ 29692 */ + "Ultimate-N\0" /* 2 refs @ 29697 */ + "6300\0" /* 2 refs @ 29708 */ + "6200\0" /* 3 refs @ 29713 */ + "5350\0" /* 2 refs @ 29718 */ + "5150\0" /* 2 refs @ 29723 */ + "Q570\0" /* 1 refs @ 29728 */ + "Z590\0" /* 1 refs @ 29733 */ + "H570\0" /* 1 refs @ 29738 */ + "B560\0" /* 1 refs @ 29743 */ + "H510\0" /* 1 refs @ 29748 */ + "W580\0" /* 1 refs @ 29753 */ + "PCH-H\0" /* 123 refs @ 29758 */ + "THC\0" /* 6 refs @ 29764 */ + "(AHCI,\0" /* 3 refs @ 29768 */ + "desktop)\0" /* 5 refs @ 29775 */ + "mobile)\0" /* 4 refs @ 29784 */ + "(RAID,\0" /* 6 refs @ 29792 */ + "2x2\0" /* 3 refs @ 29799 */ + "Elkhart\0" /* 120 refs @ 29803 */ + "(2C,\0" /* 1 refs @ 29811 */ + "(SKU\0" /* 25 refs @ 29816 */ + "8)\0" /* 1 refs @ 29821 */ + "12)\0" /* 1 refs @ 29824 */ + "3A)\0" /* 1 refs @ 29828 */ + "(4C,\0" /* 2 refs @ 29832 */ + "pre-QS)\0" /* 1 refs @ 29837 */ + "6)\0" /* 1 refs @ 29845 */ + "(Compute\0" /* 4 refs @ 29848 */ + "Die)\0" /* 4 refs @ 29857 */ + "7)\0" /* 1 refs @ 29862 */ + "9)\0" /* 1 refs @ 29865 */ + "10)\0" /* 1 refs @ 29868 */ + "11)\0" /* 1 refs @ 29872 */ + "1A)\0" /* 1 refs @ 29876 */ + "(8EU\0" /* 2 refs @ 29880 */ + "Super)\0" /* 4 refs @ 29885 */ + "(16EU\0" /* 1 refs @ 29892 */ + "(16EU)\0" /* 6 refs @ 29898 */ + "(32EU\0" /* 1 refs @ 29905 */ + "(32EU)\0" /* 8 refs @ 29911 */ + "Alder\0" /* 106 refs @ 29918 */ + "(U15,2+8)\0" /* 1 refs @ 29924 */ + "(U9,2+8)\0" /* 1 refs @ 29934 */ + "(U15,2+4)\0" /* 1 refs @ 29943 */ + "(U9,2+4)\0" /* 1 refs @ 29953 */ + "G5\0" /* 4 refs @ 29962 */ + "(x16)\0" /* 4 refs @ 29965 */ + "USB-C\0" /* 6 refs @ 29971 */ + "Refresh\0" /* 6 refs @ 29977 */ + "(S,2+0)\0" /* 1 refs @ 29985 */ + "Lake-N\0" /* 53 refs @ 29993 */ + "(0+8)\0" /* 1 refs @ 30000 */ + "(U15,1+4)\0" /* 1 refs @ 30006 */ + "(U9,1+4)\0" /* 1 refs @ 30016 */ + "(0+4,\0" /* 2 refs @ 30025 */ + "N200)\0" /* 1 refs @ 30031 */ + "N100)\0" /* 1 refs @ 30037 */ + "Tuning\0" /* 3 refs @ 30043 */ + "Thunderbolt\0" /* 21 refs @ 30050 */ + "(H,4+8)\0" /* 2 refs @ 30062 */ + "(HX,4+8)\0" /* 1 refs @ 30070 */ + "(H,4+4)\0" /* 2 refs @ 30079 */ + "(HX,4+4)\0" /* 1 refs @ 30087 */ + "(x8)\0" /* 4 refs @ 30096 */ + "(S,4+0)\0" /* 1 refs @ 30101 */ + "(HX,8+8)\0" /* 2 refs @ 30109 */ + "(HX,6+8)\0" /* 2 refs @ 30118 */ + "G4\0" /* 3 refs @ 30127 */ + "(x4)\0" /* 7 refs @ 30130 */ + "Raptor\0" /* 46 refs @ 30135 */ + "(S,6+8)\0" /* 2 refs @ 30142 */ + "(H,6+8)\0" /* 2 refs @ 30150 */ + "(HX,6+4)\0" /* 2 refs @ 30158 */ + "(S,6+4)\0" /* 2 refs @ 30167 */ + "(H,6+4)\0" /* 1 refs @ 30175 */ + "Gauss\0" /* 5 refs @ 30183 */ + "Newton\0" /* 5 refs @ 30189 */ + "Algorithm\0" /* 5 refs @ 30196 */ + "(S,6+0)\0" /* 1 refs @ 30206 */ + "(S,8+8)\0" /* 2 refs @ 30214 */ + "(S,8+4)\0" /* 1 refs @ 30222 */ + "Crash\0" /* 3 refs @ 30230 */ + "Log\0" /* 3 refs @ 30236 */ + "Telemetry\0" /* 3 refs @ 30240 */ + "Volume\0" /* 4 refs @ 30250 */ + "(24EU)\0" /* 5 refs @ 30257 */ + "(48EU)\0" /* 1 refs @ 30264 */ + "(FLASH\0" /* 1 refs @ 30271 */ + "TPM)\0" /* 1 refs @ 30278 */ + "(PCH)\0" /* 3 refs @ 30283 */ + "VC)\0" /* 7 refs @ 30289 */ + "1,\0" /* 1 refs @ 30293 */ + "3,\0" /* 1 refs @ 30296 */ + "Safety\0" /* 1 refs @ 30299 */ + "Island\0" /* 1 refs @ 30306 */ + "HPET\0" /* 1 refs @ 30313 */ + "CSE\0" /* 6 refs @ 30318 */ + "PTT\0" /* 1 refs @ 30322 */ + "UMA\0" /* 1 refs @ 30326 */ + "PSE\0" /* 39 refs @ 30330 */ + "QEP\0" /* 4 refs @ 30334 */ + "(RGMII\0" /* 2 refs @ 30338 */ + "1G)\0" /* 4 refs @ 30345 */ + "(SGMII\0" /* 4 refs @ 30349 */ + "LH2OSE\0" /* 1 refs @ 30356 */ + "PWM\0" /* 1 refs @ 30363 */ + "CAN\0" /* 4 refs @ 30367 */ + "Rocket\0" /* 12 refs @ 30371 */ + "(8Core)\0" /* 2 refs @ 30378 */ + "730\0" /* 5 refs @ 30386 */ + "(Xeon\0" /* 2 refs @ 30390 */ + "W)\0" /* 1 refs @ 30396 */ + "E)\0" /* 1 refs @ 30399 */ + "Jasper\0" /* 55 refs @ 30402 */ + "LPSS\0" /* 6 refs @ 30409 */ + "(Optane,\0" /* 1 refs @ 30414 */ + "EU\0" /* 3 refs @ 30423 */ + "EP80579\0" /* 24 refs @ 30426 */ + "EDMA\0" /* 1 refs @ 30434 */ + "ASU\0" /* 1 refs @ 30439 */ + "CANbus\0" /* 3 refs @ 30443 */ + "1588\0" /* 1 refs @ 30450 */ + "LEB\0" /* 1 refs @ 30455 */ + "GCU\0" /* 1 refs @ 30459 */ + "PCH-LP\0" /* 49 refs @ 30463 */ + "700\0" /* 61 refs @ 30470 */ + "PCH-P\0" /* 1 refs @ 30474 */ + "AX211\0" /* 1 refs @ 30480 */ + "UFS\0" /* 2 refs @ 30486 */ + "80310\0" /* 1 refs @ 30490 */ + "ATU\0" /* 1 refs @ 30496 */ + "Touch\0" /* 2 refs @ 30500 */ + "I225-LMvP\0" /* 1 refs @ 30506 */ + "I226-LMvP\0" /* 1 refs @ 30516 */ + "(18)\0" /* 2 refs @ 30526 */ + "(19)\0" /* 2 refs @ 30531 */ + "(20)\0" /* 2 refs @ 30536 */ + "(21)\0" /* 2 refs @ 30541 */ + "Arc\0" /* 21 refs @ 30546 */ + "A770M\0" /* 1 refs @ 30550 */ + "A730M\0" /* 1 refs @ 30556 */ + "A550M\0" /* 1 refs @ 30562 */ + "A370M\0" /* 1 refs @ 30568 */ + "A350M\0" /* 1 refs @ 30574 */ + "A570M\0" /* 1 refs @ 30580 */ + "A530M\0" /* 1 refs @ 30586 */ + "A770\0" /* 1 refs @ 30592 */ + "A750\0" /* 1 refs @ 30597 */ + "A580\0" /* 1 refs @ 30602 */ + "A380\0" /* 1 refs @ 30607 */ + "A310\0" /* 1 refs @ 30612 */ + "A30M\0" /* 1 refs @ 30617 */ + "A40/A50\0" /* 1 refs @ 30622 */ + "A60M\0" /* 1 refs @ 30630 */ + "A60\0" /* 1 refs @ 30635 */ + "A810E\0" /* 1 refs @ 30639 */ + "A310E\0" /* 1 refs @ 30645 */ + "A370E\0" /* 1 refs @ 30651 */ + "A350E\0" /* 1 refs @ 30657 */ + "7G\0" /* 12 refs @ 30663 */ + "Mobile,\0" /* 2 refs @ 30666 */ + "Dual)\0" /* 2 refs @ 30674 */ + "Quad)\0" /* 2 refs @ 30680 */ + "7G,8G\0" /* 1 refs @ 30686 */ + "Workstation)\0" /* 1 refs @ 30692 */ + "(GT2,\0" /* 5 refs @ 30705 */ + "Mobile)\0" /* 1 refs @ 30711 */ + "615\0" /* 2 refs @ 30719 */ + "U)\0" /* 1 refs @ 30723 */ + "(GT3e,\0" /* 2 refs @ 30726 */ + "15W)\0" /* 1 refs @ 30733 */ + "650\0" /* 4 refs @ 30738 */ + "28W)\0" /* 1 refs @ 30742 */ + "Apollo\0" /* 44 refs @ 30747 */ + "(18EU)\0" /* 1 refs @ 30754 */ + "(12EU)\0" /* 1 refs @ 30761 */ + "Uint\0" /* 1 refs @ 30768 */ + "HECI1\0" /* 1 refs @ 30773 */ + "HECI2\0" /* 1 refs @ 30779 */ + "HECI3\0" /* 1 refs @ 30785 */ + "B0\0" /* 1 refs @ 30791 */ + "A2\0" /* 2 refs @ 30794 */ + "A3\0" /* 1 refs @ 30797 */ + "Lunar\0" /* 1 refs @ 30800 */ + "NPU\0" /* 4 refs @ 30806 */ + "i7-6xxxK/Xeon-D\0" /* 32 refs @ 30810 */ + "(DMI2)\0" /* 1 refs @ 30826 */ + "Xeon-D\0" /* 64 refs @ 30833 */ + "(x8\0" /* 3 refs @ 30840 */ + "max)\0" /* 8 refs @ 30844 */ + "(x16,\0" /* 4 refs @ 30849 */ + "NTB-NTB\0" /* 1 refs @ 30855 */ + "NTB-RP\0" /* 1 refs @ 30863 */ + "NTB-secondary\0" /* 1 refs @ 30870 */ + "VTD_Misc,\0" /* 1 refs @ 30884 */ + "Status,\0" /* 1 refs @ 30894 */ + "Pmon\0" /* 1 refs @ 30902 */ + "(Target\0" /* 6 refs @ 30907 */ + "Thermal,\0" /* 2 refs @ 30915 */ + "RAS)\0" /* 2 refs @ 30924 */ + "Decoder)\0" /* 4 refs @ 30929 */ + "DDR\0" /* 11 refs @ 30938 */ + "Ch0/1\0" /* 1 refs @ 30942 */ + "(Thermal)\0" /* 2 refs @ 30948 */ + "(Error)\0" /* 2 refs @ 30958 */ + "Caching\0" /* 12 refs @ 30966 */ + "(Cbo\0" /* 11 refs @ 30974 */ + "Unicast)\0" /* 8 refs @ 30979 */ + "Broadcast)\0" /* 3 refs @ 30988 */ + "82371SB\0" /* 3 refs @ 30999 */ + "(PIIX3)\0" /* 3 refs @ 31007 */ + "82437VX\0" /* 1 refs @ 31015 */ + "(TVX)\0" /* 1 refs @ 31023 */ + "82439TX\0" /* 1 refs @ 31029 */ + "(MTXC)\0" /* 1 refs @ 31037 */ + "82371AB\0" /* 4 refs @ 31044 */ + "(PIIX4)\0" /* 4 refs @ 31052 */ + "82810\0" /* 2 refs @ 31060 */ + "82810-DC100\0" /* 2 refs @ 31066 */ + "82810E\0" /* 2 refs @ 31078 */ + "82443LX\0" /* 2 refs @ 31085 */ + "82443BX\0" /* 3 refs @ 31093 */ + "Bridge/Controller\0" /* 6 refs @ 31101 */ + "disabled)\0" /* 2 refs @ 31119 */ + "82443MX\0" /* 6 refs @ 31129 */ + "82443GX\0" /* 3 refs @ 31137 */ + "XMM\0" /* 1 refs @ 31145 */ + "7360\0" /* 1 refs @ 31149 */ + "LTE\0" /* 1 refs @ 31154 */ + "i740\0" /* 1 refs @ 31158 */ + "Z790\0" /* 1 refs @ 31163 */ + "H770\0" /* 1 refs @ 31168 */ + "B760\0" /* 1 refs @ 31173 */ + "C266\0" /* 1 refs @ 31178 */ + "C262\0" /* 1 refs @ 31183 */ + "26\0" /* 2 refs @ 31188 */ + "27\0" /* 2 refs @ 31191 */ + "28\0" /* 2 refs @ 31194 */ + "Q670\0" /* 1 refs @ 31197 */ + "Z690\0" /* 1 refs @ 31202 */ + "H670\0" /* 1 refs @ 31207 */ + "B660\0" /* 1 refs @ 31212 */ + "H610\0" /* 1 refs @ 31217 */ + "W680\0" /* 1 refs @ 31222 */ + "HM670\0" /* 1 refs @ 31227 */ + "WM690\0" /* 1 refs @ 31233 */ + "Meteor\0" /* 10 refs @ 31239 */ + "LPC/ISA\0" /* 1 refs @ 31246 */ + "SMbus\0" /* 4 refs @ 31254 */ + "SCH\0" /* 1 refs @ 31260 */ + "Graphic\0" /* 1 refs @ 31264 */ + "Display\0" /* 1 refs @ 31272 */ + "E6xx\0" /* 1 refs @ 31280 */ + "82454KX/GX\0" /* 1 refs @ 31285 */ + "(PB)\0" /* 1 refs @ 31296 */ + "82451KX/GX\0" /* 1 refs @ 31301 */ + "(MC)\0" /* 1 refs @ 31312 */ + "82451NX\0" /* 2 refs @ 31317 */ + "(MIOC)\0" /* 1 refs @ 31325 */ + "Expander\0" /* 1 refs @ 31332 */ + "(PXB)\0" /* 1 refs @ 31341 */ + "EG20T\0" /* 26 refs @ 31347 */ + "Ether\0" /* 1 refs @ 31353 */ + "DMAC\0" /* 2 refs @ 31359 */ + "IEEE1588\0" /* 1 refs @ 31364 */ + "Response\0" /* 3 refs @ 31373 */ + "(RAID1)\0" /* 3 refs @ 31382 */ + "Full\0" /* 3 refs @ 31390 */ + "Featured\0" /* 3 refs @ 31395 */ + "ES\0" /* 3 refs @ 31404 */ + "Desktop\0" /* 1 refs @ 31407 */ + "Z87\0" /* 1 refs @ 31415 */ + "Z85\0" /* 1 refs @ 31419 */ + "HM86\0" /* 1 refs @ 31423 */ + "H87\0" /* 1 refs @ 31428 */ + "HM87\0" /* 1 refs @ 31432 */ + "Q85\0" /* 1 refs @ 31437 */ + "Q87\0" /* 1 refs @ 31441 */ + "QM87\0" /* 1 refs @ 31445 */ + "B85\0" /* 1 refs @ 31450 */ + "C222\0" /* 1 refs @ 31454 */ + "C224\0" /* 1 refs @ 31459 */ + "C226\0" /* 1 refs @ 31464 */ + "H81\0" /* 1 refs @ 31469 */ + "Z97\0" /* 1 refs @ 31473 */ + "H97\0" /* 1 refs @ 31477 */ + "C61x/X99\0" /* 39 refs @ 31481 */ + "X99\0" /* 2 refs @ 31490 */ + "SPSR\0" /* 1 refs @ 31494 */ + "MS\0" /* 3 refs @ 31499 */ + "Tiger\0" /* 34 refs @ 31502 */ + "RC\0" /* 4 refs @ 31508 */ + "010\0" /* 1 refs @ 31511 */ + "(UP4\0" /* 2 refs @ 31515 */ + "2Core)\0" /* 2 refs @ 31520 */ + "(UP3\0" /* 3 refs @ 31527 */ + "011\0" /* 1 refs @ 31532 */ + "012\0" /* 1 refs @ 31536 */ + "(UPx)\0" /* 9 refs @ 31540 */ + "Host-PCIe\0" /* 1 refs @ 31546 */ + "060\0" /* 1 refs @ 31556 */ + "4Core)\0" /* 3 refs @ 31560 */ + "H35\0" /* 1 refs @ 31567 */ + "refresh\0" /* 1 refs @ 31571 */ + "(H\0" /* 2 refs @ 31579 */ + "6Core)\0" /* 1 refs @ 31582 */ + "NPK\0" /* 1 refs @ 31589 */ + "8Core)\0" /* 1 refs @ 31593 */ + "96/80\0" /* 2 refs @ 31600 */ + "EU)\0" /* 2 refs @ 31606 */ + "(GT1,\0" /* 2 refs @ 31610 */ + "32EU)\0" /* 1 refs @ 31616 */ + "16EU)\0" /* 1 refs @ 31622 */ + "48EU)\0" /* 3 refs @ 31628 */ + "RRT\0" /* 1 refs @ 31634 */ + "Only\0" /* 1 refs @ 31638 */ + "RAID)\0" /* 1 refs @ 31643 */ + "(PCH-U)\0" /* 2 refs @ 31649 */ + "(PCH-Y)\0" /* 1 refs @ 31657 */ + "Premiun-Y\0" /* 1 refs @ 31665 */ + "Premium-U\0" /* 1 refs @ 31675 */ + "Mainstream/Base\0" /* 1 refs @ 31685 */ + "(flash)\0" /* 1 refs @ 31701 */ + "9560\0" /* 1 refs @ 31709 */ + "Pineview\0" /* 6 refs @ 31714 */ + "UP3\0" /* 1 refs @ 31723 */ + "UP4\0" /* 1 refs @ 31727 */ + "AX201\0" /* 1 refs @ 31731 */ + "Z170\0" /* 3 refs @ 31737 */ + "HM170,\0" /* 2 refs @ 31742 */ + "QM170\0" /* 3 refs @ 31749 */ + "3rd\0" /* 6 refs @ 31755 */ + "Party\0" /* 6 refs @ 31759 */ + "H110\0" /* 1 refs @ 31765 */ + "H170\0" /* 1 refs @ 31770 */ + "Q170\0" /* 1 refs @ 31775 */ + "Q150\0" /* 1 refs @ 31780 */ + "B150\0" /* 1 refs @ 31785 */ + "C236\0" /* 1 refs @ 31790 */ + "C232\0" /* 1 refs @ 31795 */ + "HM170\0" /* 1 refs @ 31800 */ + "CM236\0" /* 1 refs @ 31806 */ + "HM175\0" /* 1 refs @ 31812 */ + "QM175\0" /* 1 refs @ 31818 */ + "CM238\0" /* 1 refs @ 31824 */ + "D-2100\0" /* 5 refs @ 31830 */ + "Phantom\0" /* 1 refs @ 31837 */ + "(ACPI)\0" /* 1 refs @ 31845 */ + "HCI\0" /* 4 refs @ 31852 */ + "C621\0" /* 2 refs @ 31856 */ + "C622\0" /* 1 refs @ 31861 */ + "C624\0" /* 2 refs @ 31866 */ + "C625\0" /* 1 refs @ 31871 */ + "C626\0" /* 1 refs @ 31876 */ + "C627\0" /* 3 refs @ 31881 */ + "C628\0" /* 2 refs @ 31886 */ + "C629\0" /* 1 refs @ 31891 */ + "C621A\0" /* 2 refs @ 31896 */ + "C627A\0" /* 2 refs @ 31902 */ + "C629A\0" /* 2 refs @ 31908 */ + "MROM\0" /* 4 refs @ 31914 */ + "(Acceleration\0" /* 1 refs @ 31919 */ + "Optane)\0" /* 1 refs @ 31933 */ + "H270\0" /* 1 refs @ 31941 */ + "Z270\0" /* 1 refs @ 31946 */ + "Q270\0" /* 1 refs @ 31951 */ + "Q250\0" /* 1 refs @ 31956 */ + "B250\0" /* 1 refs @ 31961 */ + "Z370\0" /* 1 refs @ 31966 */ + "H310C\0" /* 1 refs @ 31971 */ + "X299\0" /* 1 refs @ 31977 */ + "C422\0" /* 1 refs @ 31982 */ + "H310\0" /* 1 refs @ 31987 */ + "H370\0" /* 1 refs @ 31992 */ + "Z390\0" /* 1 refs @ 31997 */ + "Q370\0" /* 1 refs @ 32002 */ + "B360\0" /* 1 refs @ 32007 */ + "C246\0" /* 1 refs @ 32012 */ + "C242\0" /* 1 refs @ 32017 */ + "QM370\0" /* 1 refs @ 32022 */ + "HM370\0" /* 1 refs @ 32028 */ + "CM246\0" /* 1 refs @ 32034 */ + "(Optane)\0" /* 2 refs @ 32040 */ + "PCH-V\0" /* 54 refs @ 32049 */ + "B460\0" /* 1 refs @ 32055 */ + "H410\0" /* 1 refs @ 32060 */ + "(S,8+16)\0" /* 1 refs @ 32065 */ + "(HX,8+16)\0" /* 1 refs @ 32074 */ + "(U,2+8)\0" /* 1 refs @ 32084 */ + "(PX,6+8)\0" /* 1 refs @ 32092 */ + "(PX,4+8)\0" /* 1 refs @ 32101 */ + "(E,8+0)\0" /* 1 refs @ 32110 */ + "(E,6+0)\0" /* 1 refs @ 32118 */ + "(E,4+0)\0" /* 1 refs @ 32126 */ + "(U,2+4)\0" /* 1 refs @ 32134 */ + "(U,1+4)\0" /* 1 refs @ 32142 */ + "(HX,8+12)\0" /* 1 refs @ 32150 */ + "(S,8+12)\0" /* 1 refs @ 32160 */ + "(96\0" /* 4 refs @ 32169 */ + "80EU)\0" /* 4 refs @ 32173 */ + "(64\0" /* 2 refs @ 32179 */ + "(64EU)\0" /* 1 refs @ 32183 */ + "Arrow\0" /* 1 refs @ 32190 */ + "Panther\0" /* 1 refs @ 32196 */ + "S21152BB\0" /* 1 refs @ 32204 */ + "S21152BA,S21154AE/BE\0" /* 1 refs @ 32213 */ + "21555\0" /* 1 refs @ 32234 */ + "Non-Transparent\0" /* 1 refs @ 32240 */ + "(x16\0" /* 1 refs @ 32256 */ + "Routing\0" /* 1 refs @ 32261 */ + "Protocol\0" /* 1 refs @ 32269 */ + "Semaphore\0" /* 1 refs @ 32278 */ + "HANKSVILLE\0" /* 1 refs @ 32288 */ + "760p/7600p/E-6100p\0" /* 1 refs @ 32299 */ + "660p\0" /* 1 refs @ 32318 */ + "Powerstorm\0" /* 2 refs @ 32323 */ + "4D60T\0" /* 1 refs @ 32334 */ + "4D50T\0" /* 1 refs @ 32340 */ + "PRISM2.5\0" /* 1 refs @ 32346 */ + "PRISM\0" /* 2 refs @ 32355 */ + "Indigo\0" /* 1 refs @ 32361 */ + "Duette\0" /* 1 refs @ 32368 */ + "AEON\0" /* 1 refs @ 32375 */ + "CBIDE2/CI-iCN\0" /* 1 refs @ 32380 */ + "NinjaATA-32Bi\0" /* 3 refs @ 32394 */ + "CBSCII\0" /* 1 refs @ 32408 */ + "NinjaSCSI-32Bi\0" /* 3 refs @ 32415 */ + "RSA-PCI\0" /* 1 refs @ 32430 */ + "GV-BCTV5DL/PCI\0" /* 1 refs @ 32438 */ + "tuner\0" /* 1 refs @ 32453 */ + "IT8152\0" /* 1 refs @ 32459 */ + "IT8211\0" /* 1 refs @ 32466 */ + "IT8212\0" /* 1 refs @ 32473 */ + "IT8213\0" /* 1 refs @ 32480 */ + "AGX016\0" /* 1 refs @ 32487 */ + "ITT3204\0" /* 1 refs @ 32494 */ + "JMC250\0" /* 1 refs @ 32502 */ + "JMC260\0" /* 1 refs @ 32509 */ + "JMB360\0" /* 1 refs @ 32516 */ + "JMB361\0" /* 1 refs @ 32523 */ + "SATA/PATA\0" /* 4 refs @ 32530 */ + "JMB362\0" /* 1 refs @ 32540 */ + "JMB363\0" /* 1 refs @ 32547 */ + "JMB365\0" /* 1 refs @ 32554 */ + "JMB366\0" /* 1 refs @ 32561 */ + "JMB368\0" /* 1 refs @ 32568 */ + "PATA\0" /* 1 refs @ 32575 */ + "JMB38X\0" /* 5 refs @ 32580 */ + "SD/MMC\0" /* 4 refs @ 32587 */ + "Stick\0" /* 4 refs @ 32594 */ + "JMB388\0" /* 4 refs @ 32600 */ + "JNIC-1460\0" /* 1 refs @ 32607 */ + "Fibre-Channel\0" /* 5 refs @ 32617 */ + "JNIC-1560\0" /* 1 refs @ 32631 */ + "FCI-1063\0" /* 1 refs @ 32641 */ + "FCX2-6562\0" /* 1 refs @ 32650 */ + "FCX-6562\0" /* 1 refs @ 32660 */ + "Experimental\0" /* 1 refs @ 32669 */ + "Clock\0" /* 1 refs @ 32682 */ + "Version\0" /* 1 refs @ 32688 */ + "HSSI\0" /* 1 refs @ 32696 */ + "DS3\0" /* 1 refs @ 32701 */ + "SSI\0" /* 1 refs @ 32705 */ + "DS1\0" /* 1 refs @ 32709 */ + "805\0" /* 1 refs @ 32713 */ + "LXT-1001\0" /* 1 refs @ 32717 */ + "DVB\0" /* 2 refs @ 32726 */ + "Transmitter\0" /* 1 refs @ 32730 */ + "Receiver\0" /* 1 refs @ 32742 */ + "EG1032\0" /* 1 refs @ 32751 */ + "Instant\0" /* 2 refs @ 32758 */ + "EG1064\0" /* 1 refs @ 32766 */ + "PCMPC200\0" /* 1 refs @ 32773 */ + "IPN\0" /* 1 refs @ 32782 */ + "2220\0" /* 1 refs @ 32786 */ + "(rev\0" /* 1 refs @ 32791 */ + "01)\0" /* 1 refs @ 32796 */ + "82C168/82C169\0" /* 1 refs @ 32800 */ + "(PNIC)\0" /* 1 refs @ 32814 */ + "82C115\0" /* 1 refs @ 32821 */ + "(PNIC\0" /* 1 refs @ 32828 */ + "II)\0" /* 2 refs @ 32834 */ + "K56flex\0" /* 2 refs @ 32838 */ + "DSVD\0" /* 1 refs @ 32846 */ + "LTMODEM\0" /* 26 refs @ 32851 */ + "Venus\0" /* 1 refs @ 32859 */ + "ORCA\0" /* 2 refs @ 32865 */ + "32-bit\0" /* 1 refs @ 32870 */ + "ASIC\0" /* 2 refs @ 32877 */ + "FW322/323\0" /* 1 refs @ 32882 */ + "FW643\0" /* 1 refs @ 32892 */ + "1394b\0" /* 1 refs @ 32898 */ + "ET1310\0" /* 1 refs @ 32904 */ + "ET1301\0" /* 1 refs @ 32911 */ + "MX98713\0" /* 1 refs @ 32918 */ + "(PMAC)\0" /* 2 refs @ 32926 */ + "MX987x5\0" /* 1 refs @ 32933 */ + "Ringnode\0" /* 1 refs @ 32941 */ + "Mk2\0" /* 1 refs @ 32950 */ + "Collage\0" /* 2 refs @ 32954 */ + "155\0" /* 2 refs @ 32962 */ + "PCI-SLRS\0" /* 2 refs @ 32966 */ + "MGA\0" /* 15 refs @ 32975 */ + "PX2085\0" /* 1 refs @ 32979 */ + "(\"Atlas\")\0" /* 1 refs @ 32986 */ + "Millennium\0" /* 3 refs @ 32996 */ + "2064W\0" /* 1 refs @ 33007 */ + "(\"Storm\")\0" /* 1 refs @ 33013 */ + "Mystique\0" /* 1 refs @ 33023 */ + "1064SG\0" /* 1 refs @ 33032 */ + "2164W\0" /* 1 refs @ 33039 */ + "2164WA-B\0" /* 1 refs @ 33045 */ + "G200\0" /* 2 refs @ 33054 */ + "G200e\0" /* 1 refs @ 33059 */ + "(ServerEngines)\0" /* 1 refs @ 33065 */ + "G400\0" /* 1 refs @ 33081 */ + "G200eW\0" /* 1 refs @ 33086 */ + "G200eH\0" /* 1 refs @ 33093 */ + "Impression\0" /* 1 refs @ 33100 */ + "G100\0" /* 2 refs @ 33111 */ + "G550\0" /* 1 refs @ 33116 */ + "MQ200\0" /* 1 refs @ 33121 */ + "ConnectX-4\0" /* 4 refs @ 33127 */ + "Lx\0" /* 5 refs @ 33138 */ + "ConnectX-5\0" /* 4 refs @ 33141 */ + "Ex\0" /* 4 refs @ 33152 */ + "ConnectX-6\0" /* 4 refs @ 33155 */ + "Dx\0" /* 1 refs @ 33166 */ + "InfiniHost\0" /* 6 refs @ 33169 */ + "(Tavor)\0" /* 2 refs @ 33180 */ + "(old\0" /* 1 refs @ 33188 */ + "Sinai)\0" /* 1 refs @ 33193 */ + "(Sinai)\0" /* 1 refs @ 33200 */ + "(Arbel\0" /* 1 refs @ 33208 */ + "Tavor\0" /* 1 refs @ 33215 */ + "compatility)\0" /* 1 refs @ 33221 */ + "(Arbel)\0" /* 1 refs @ 33234 */ + "ConnectX\0" /* 7 refs @ 33242 */ + "SDR\0" /* 1 refs @ 33251 */ + "(Hermon)\0" /* 7 refs @ 33255 */ + "QDR\0" /* 2 refs @ 33264 */ + "2.5GT/s\0" /* 2 refs @ 33268 */ + "EN\0" /* 2 refs @ 33276 */ + "10GigE\0" /* 2 refs @ 33279 */ + "5GT/s\0" /* 3 refs @ 33286 */ + "MM-5415CN\0" /* 1 refs @ 33292 */ + "MM-5425CN\0" /* 1 refs @ 33302 */ + "MN-120\0" /* 1 refs @ 33312 */ + "Switched\0" /* 1 refs @ 33319 */ + "P1\0" /* 2 refs @ 33328 */ + "P5\0" /* 2 refs @ 33331 */ + "P2\0" /* 1 refs @ 33334 */ + "P3\0" /* 2 refs @ 33337 */ + "T500\0" /* 2 refs @ 33340 */ + "T700\0" /* 1 refs @ 33345 */ + "Weasel\0" /* 3 refs @ 33350 */ + "Tornado\0" /* 1 refs @ 33357 */ + "MPC105\0" /* 1 refs @ 33365 */ + "\"Eagle\"\0" /* 1 refs @ 33372 */ + "MPC106\0" /* 1 refs @ 33380 */ + "\"Grackle\"\0" /* 1 refs @ 33387 */ + "MPC8240\0" /* 1 refs @ 33397 */ + "\"Kahlua\"\0" /* 1 refs @ 33405 */ + "MPC107\0" /* 1 refs @ 33414 */ + "\"Chaparral\"\0" /* 1 refs @ 33421 */ + "MPC8245\0" /* 1 refs @ 33433 */ + "\"Kahlua\0" /* 1 refs @ 33441 */ + "II\"\0" /* 1 refs @ 33449 */ + "MPC8555E\0" /* 1 refs @ 33453 */ + "MPC8541\0" /* 1 refs @ 33462 */ + "Multi-Processor\0" /* 1 refs @ 33470 */ + "Falcon\0" /* 1 refs @ 33486 */ + "ECC\0" /* 1 refs @ 33493 */ + "Set\0" /* 1 refs @ 33497 */ + "Hawk\0" /* 1 refs @ 33501 */ + "MPC5200B\0" /* 1 refs @ 33506 */ + "CP102U\0" /* 1 refs @ 33515 */ + "C104H\0" /* 1 refs @ 33522 */ + "CP104UL\0" /* 1 refs @ 33528 */ + "CP104V2\0" /* 1 refs @ 33536 */ + "CP104EL\0" /* 1 refs @ 33544 */ + "CP114\0" /* 1 refs @ 33552 */ + "C168H\0" /* 1 refs @ 33558 */ + "C168U\0" /* 1 refs @ 33564 */ + "C168EL\0" /* 2 refs @ 33570 */ + "MV1000\0" /* 1 refs @ 33577 */ + "DAC960\0" /* 4 refs @ 33584 */ + "(v2\0" /* 1 refs @ 33591 */ + "(v3\0" /* 1 refs @ 33595 */ + "(v4\0" /* 1 refs @ 33599 */ + "(v5\0" /* 1 refs @ 33603 */ + "eXtremeRAID\0" /* 4 refs @ 33607 */ + "AcceleRAID\0" /* 3 refs @ 33619 */ + "352\0" /* 1 refs @ 33630 */ + "170\0" /* 1 refs @ 33634 */ + "160\0" /* 1 refs @ 33638 */ + "1100\0" /* 2 refs @ 33642 */ + "2000/3000\0" /* 1 refs @ 33647 */ + "MTD803\0" /* 1 refs @ 33657 */ + "3-in-1\0" /* 1 refs @ 33664 */ + "TP-Link\0" /* 1 refs @ 33671 */ + "TG-3468\0" /* 1 refs @ 33679 */ + "NCP130\0" /* 2 refs @ 33687 */ + "NSP2K\0" /* 1 refs @ 33694 */ + "Policy\0" /* 1 refs @ 33700 */ + "XLP\0" /* 27 refs @ 33707 */ + "Inter-Chip\0" /* 1 refs @ 33711 */ + "interconnect\0" /* 1 refs @ 33722 */ + "PCI-Express\0" /* 7 refs @ 33735 */ + "RootComplex/Endpoint\0" /* 1 refs @ 33747 */ + "Interlaken\0" /* 1 refs @ 33768 */ + "LA\0" /* 1 refs @ 33779 */ + "interface\0" /* 2 refs @ 33782 */ + "Acceleration\0" /* 1 refs @ 33792 */ + "engine\0" /* 4 refs @ 33805 */ + "Ordering\0" /* 1 refs @ 33812 */ + "Messaging\0" /* 2 refs @ 33821 */ + "Transfer\0" /* 1 refs @ 33831 */ + "accelerator\0" /* 3 refs @ 33840 */ + "RSA/ECC\0" /* 1 refs @ 33852 */ + "Compress/Decompression\0" /* 1 refs @ 33860 */ + "JTAG\0" /* 1 refs @ 33883 */ + "NOR\0" /* 1 refs @ 33888 */ + "flash\0" /* 2 refs @ 33892 */ + "NAND\0" /* 1 refs @ 33898 */ + "eMMC/SD/SDIO\0" /* 1 refs @ 33903 */ + "Regular\0" /* 1 refs @ 33916 */ + "Expression\0" /* 1 refs @ 33924 */ + "SRIO\0" /* 1 refs @ 33935 */ + "Rapid\0" /* 1 refs @ 33940 */ + "IO)\0" /* 1 refs @ 33946 */ + "Universe\0" /* 1 refs @ 33950 */ + "VME\0" /* 1 refs @ 33959 */ + "QSpan\0" /* 1 refs @ 33963 */ + "Tsi381\0" /* 1 refs @ 33969 */ + "PEB383\0" /* 1 refs @ 33976 */ + "PowerSpan\0" /* 2 refs @ 33983 */ + "MXI-3\0" /* 1 refs @ 33993 */ + "Extender\0" /* 1 refs @ 33999 */ + "DP83810\0" /* 1 refs @ 34008 */ + "PC87415\0" /* 1 refs @ 34016 */ + "87560\0" /* 1 refs @ 34024 */ + "DP83815\0" /* 1 refs @ 34030 */ + "DP83820\0" /* 1 refs @ 34038 */ + "CS5535\0" /* 6 refs @ 34046 */ + "Saturn\0" /* 1 refs @ 34053 */ + "SC1100\0" /* 5 refs @ 34060 */ + "XpressAUDIO\0" /* 1 refs @ 34067 */ + "SMI/ACPI\0" /* 1 refs @ 34079 */ + "X-Bus\0" /* 1 refs @ 34088 */ + "NS87410\0" /* 1 refs @ 34094 */ + "SAA7130HL\0" /* 1 refs @ 34102 */ + "SAA7133HL\0" /* 1 refs @ 34112 */ + "A/V\0" /* 3 refs @ 34122 */ + "SAA7134HL\0" /* 1 refs @ 34126 */ + "SAA7135HL\0" /* 1 refs @ 34136 */ + "SAA7146AH\0" /* 1 refs @ 34146 */ + "PS5000\0" /* 1 refs @ 34156 */ + "PS5016\0" /* 1 refs @ 34163 */ + "PS5021\0" /* 1 refs @ 34170 */ + "PS5026\0" /* 1 refs @ 34177 */ + "53c810\0" /* 1 refs @ 34184 */ + "53c820\0" /* 1 refs @ 34191 */ + "53c825\0" /* 1 refs @ 34198 */ + "53c815\0" /* 1 refs @ 34205 */ + "53c810AP\0" /* 1 refs @ 34212 */ + "53c860\0" /* 1 refs @ 34221 */ + "53c1510D\0" /* 1 refs @ 34228 */ + "53c896\0" /* 1 refs @ 34237 */ + "53c895\0" /* 1 refs @ 34244 */ + "53c885\0" /* 1 refs @ 34251 */ + "53c875/876\0" /* 1 refs @ 34258 */ + "53c1510\0" /* 1 refs @ 34269 */ + "53c895A\0" /* 1 refs @ 34277 */ + "53c875A\0" /* 1 refs @ 34285 */ + "SAS3516\0" /* 3 refs @ 34293 */ + "SAS3416\0" /* 2 refs @ 34301 */ + "SAS3508\0" /* 3 refs @ 34309 */ + "SAS3408\0" /* 2 refs @ 34317 */ + "SAS3504\0" /* 2 refs @ 34325 */ + "SAS3404\0" /* 2 refs @ 34333 */ + "53c1010\0" /* 2 refs @ 34341 */ + "(66MHz)\0" /* 1 refs @ 34349 */ + "53c1020/53c1030\0" /* 1 refs @ 34357 */ + "53c1030ZC\0" /* 1 refs @ 34373 */ + "53c1035\0" /* 1 refs @ 34383 */ + "53c1035ZC\0" /* 1 refs @ 34391 */ + "SAS1064\0" /* 1 refs @ 34401 */ + "SAS3216/3224\0" /* 2 refs @ 34409 */ + "SAS1068\0" /* 2 refs @ 34422 */ + "SAS1064E\0" /* 2 refs @ 34430 */ + "SAS1068E\0" /* 2 refs @ 34439 */ + "SAS1066E\0" /* 1 refs @ 34448 */ + "SAS2208\0" /* 7 refs @ 34457 */ + "SAS1064A\0" /* 1 refs @ 34465 */ + "SAS3108\0" /* 5 refs @ 34474 */ + "SAS1066\0" /* 1 refs @ 34482 */ + "SAS3008\0" /* 2 refs @ 34490 */ + "SAS1078\0" /* 2 refs @ 34498 */ + "SAS2116\0" /* 2 refs @ 34506 */ + "SAS2308\0" /* 3 refs @ 34514 */ + "SAS2004\0" /* 1 refs @ 34522 */ + "SAS2008\0" /* 2 refs @ 34530 */ + "SAS2108\0" /* 5 refs @ 34538 */ + "CRYPTO\0" /* 1 refs @ 34546 */ + "GEN2\0" /* 2 refs @ 34553 */ + "SAS1078DE\0" /* 1 refs @ 34558 */ + "53c875J\0" /* 1 refs @ 34568 */ + "SAS3004\0" /* 1 refs @ 34576 */ + "SAS3324\0" /* 11 refs @ 34584 */ + "SAS3316\0" /* 1 refs @ 34592 */ + "Megaraid\0" /* 3 refs @ 34600 */ + "320-X\0" /* 1 refs @ 34609 */ + "320-E\0" /* 1 refs @ 34615 */ + "(300-6X/300-8X)\0" /* 1 refs @ 34621 */ + "Verde\0" /* 1 refs @ 34637 */ + "ZCR\0" /* 1 refs @ 34643 */ + "FC909\0" /* 1 refs @ 34647 */ + "FC909A\0" /* 1 refs @ 34653 */ + "FC929\0" /* 2 refs @ 34660 */ + "FC919\0" /* 2 refs @ 34666 */ + "FC929X\0" /* 1 refs @ 34672 */ + "FC919X\0" /* 1 refs @ 34679 */ + "FC949X\0" /* 1 refs @ 34686 */ + "FC939X\0" /* 1 refs @ 34693 */ + "FC949E\0" /* 1 refs @ 34700 */ + "G-NIC\0" /* 2 refs @ 34707 */ + "53c1030R\0" /* 1 refs @ 34713 */ + "Unsupported\0" /* 4 refs @ 34722 */ + "SAS39xx\0" /* 4 refs @ 34734 */ + "SAS38xx\0" /* 4 refs @ 34742 */ + "4/SC\0" /* 1 refs @ 34750 */ + "Tools\0" /* 1 refs @ 34755 */ + "VRC4173\0" /* 3 refs @ 34761 */ + "PC-Card\0" /* 1 refs @ 34769 */ + "PowerVR\0" /* 1 refs @ 34777 */ + "PCX2\0" /* 1 refs @ 34785 */ + "uPD72872\0" /* 1 refs @ 34790 */ + "PK-UG-X001\0" /* 1 refs @ 34799 */ + "PK-UG-X008\0" /* 1 refs @ 34810 */ + "uPD72870\0" /* 1 refs @ 34821 */ + "uPD72871\0" /* 1 refs @ 34830 */ + "uPD720400\0" /* 1 refs @ 34839 */ + "PCI/PCI-X\0" /* 3 refs @ 34849 */ + "Versa\0" /* 2 refs @ 34859 */ + "VA26D\0" /* 1 refs @ 34865 */ + "MagicGraph\0" /* 4 refs @ 34871 */ + "NM2070\0" /* 1 refs @ 34882 */ + "128V\0" /* 1 refs @ 34889 */ + "128ZV\0" /* 1 refs @ 34894 */ + "128XD\0" /* 1 refs @ 34900 */ + "MagicMedia\0" /* 5 refs @ 34906 */ + "256AV\0" /* 2 refs @ 34917 */ + "256ZX\0" /* 2 refs @ 34923 */ + "256XL+\0" /* 1 refs @ 34929 */ + "NET2280\0" /* 1 refs @ 34936 */ + "NET2282\0" /* 1 refs @ 34944 */ + "MA301\0" /* 1 refs @ 34952 */ + "GA620\0" /* 2 refs @ 34958 */ + "1284\0" /* 7 refs @ 34964 */ + "Printer\0" /* 7 refs @ 34969 */ + "9855\0" /* 1 refs @ 34977 */ + "9865\0" /* 1 refs @ 34982 */ + "MCS9990\0" /* 1 refs @ 34987 */ + "NXB-10GXxR\0" /* 1 refs @ 34995 */ + "NXB-10GCX4\0" /* 1 refs @ 35006 */ + "NXB-4GCU\0" /* 1 refs @ 35017 */ + "IMEZ\0" /* 2 refs @ 35026 */ + "HMEZ\0" /* 2 refs @ 35031 */ + "Mgmt\0" /* 2 refs @ 35036 */ + "NX3031\0" /* 1 refs @ 35041 */ + "NX82C501\0" /* 1 refs @ 35048 */ + "NDR4600\0" /* 1 refs @ 35057 */ + "Baystack\0" /* 1 refs @ 35065 */ + "(Accton\0" /* 1 refs @ 35074 */ + "EN5038)\0" /* 1 refs @ 35082 */ + "Imagine-128\0" /* 2 refs @ 35090 */ + "RIVA\0" /* 4 refs @ 35102 */ + "TNT\0" /* 1 refs @ 35107 */ + "TNT2\0" /* 4 refs @ 35111 */ + "Vanta\0" /* 1 refs @ 35116 */ + "64\0" /* 1 refs @ 35122 */ + "MCP04\0" /* 7 refs @ 35125 */ + "GeForce\0" /* 291 refs @ 35131 */ + "nForce4\0" /* 14 refs @ 35139 */ + "ATA133\0" /* 13 refs @ 35147 */ + "nForce2\0" /* 27 refs @ 35154 */ + "MCP-T\0" /* 4 refs @ 35162 */ + "Aladdin\0" /* 1 refs @ 35168 */ + "nForce3\0" /* 23 refs @ 35176 */ + "Quadro\0" /* 74 refs @ 35184 */ + "FX\0" /* 24 refs @ 35191 */ + "Quadro4\0" /* 11 refs @ 35194 */ + "NVS\0" /* 10 refs @ 35202 */ + "1300\0" /* 1 refs @ 35206 */ + "PCX\0" /* 1 refs @ 35211 */ + "4300\0" /* 1 refs @ 35215 */ + "256\0" /* 1 refs @ 35220 */ + "GeForce2\0" /* 7 refs @ 35224 */ + "MX\0" /* 11 refs @ 35233 */ + "100/200\0" /* 1 refs @ 35236 */ + "Go\0" /* 6 refs @ 35244 */ + "Quadro2\0" /* 2 refs @ 35247 */ + "MXR/EX\0" /* 1 refs @ 35255 */ + "6600\0" /* 5 refs @ 35262 */ + "6610\0" /* 1 refs @ 35267 */ + "540\0" /* 2 refs @ 35272 */ + "GTS\0" /* 6 refs @ 35276 */ + "(DDR)\0" /* 1 refs @ 35280 */ + "6200TC\0" /* 1 refs @ 35286 */ + "6200LE\0" /* 1 refs @ 35293 */ + "GeForce4\0" /* 16 refs @ 35300 */ + "460\0" /* 3 refs @ 35309 */ + "440\0" /* 6 refs @ 35313 */ + "420\0" /* 3 refs @ 35317 */ + "SE\0" /* 7 refs @ 35321 */ + "500XGL\0" /* 1 refs @ 35324 */ + "200/400NVS\0" /* 1 refs @ 35331 */ + "(AGP8X)\0" /* 4 refs @ 35342 */ + "XGL\0" /* 4 refs @ 35350 */ + "380\0" /* 1 refs @ 35354 */ + "nForce\0" /* 170 refs @ 35358 */ + "220/420\0" /* 2 refs @ 35365 */ + "MCP\0" /* 1 refs @ 35373 */ + "Xbox\0" /* 3 refs @ 35377 */ + "ATA100\0" /* 1 refs @ 35382 */ + "GeForce3\0" /* 3 refs @ 35389 */ + "Ti\0" /* 34 refs @ 35398 */ + "DCC\0" /* 1 refs @ 35401 */ + "6200A\0" /* 1 refs @ 35405 */ + "4400\0" /* 1 refs @ 35411 */ + "900XGL\0" /* 1 refs @ 35416 */ + "750XGL\0" /* 1 refs @ 35423 */ + "700XGL\0" /* 1 refs @ 35430 */ + "nForce430\0" /* 14 refs @ 35437 */ + "C51\0" /* 18 refs @ 35447 */ + "4800\0" /* 2 refs @ 35451 */ + "8x\0" /* 1 refs @ 35456 */ + "980\0" /* 4 refs @ 35459 */ + "780\0" /* 1 refs @ 35463 */ + "1500\0" /* 1 refs @ 35467 */ + "Frame\0" /* 1 refs @ 35472 */ + "Buffer\0" /* 1 refs @ 35478 */ + "(0x02f0)\0" /* 1 refs @ 35485 */ + "(0x02f1)\0" /* 1 refs @ 35494 */ + "(0x02f2)\0" /* 1 refs @ 35503 */ + "(0x02f3)\0" /* 1 refs @ 35512 */ + "(0x02f4)\0" /* 1 refs @ 35521 */ + "(0x02f5)\0" /* 1 refs @ 35530 */ + "(0x02f6)\0" /* 1 refs @ 35539 */ + "(0x02f7)\0" /* 1 refs @ 35548 */ + "(0x02fb)\0" /* 1 refs @ 35557 */ + "(0x02fc)\0" /* 1 refs @ 35566 */ + "(0x02fd)\0" /* 1 refs @ 35575 */ + "(0x02ff)\0" /* 1 refs @ 35584 */ + "5800\0" /* 2 refs @ 35593 */ + "5200\0" /* 2 refs @ 35598 */ + "5200SE\0" /* 1 refs @ 35603 */ + "Go5200\0" /* 1 refs @ 35610 */ + "5900\0" /* 2 refs @ 35617 */ + "5900XT\0" /* 1 refs @ 35622 */ + "5950\0" /* 1 refs @ 35629 */ + "MCP55\0" /* 22 refs @ 35634 */ + "16x\0" /* 2 refs @ 35640 */ + "430\0" /* 1 refs @ 35644 */ + "405\0" /* 1 refs @ 35648 */ + "7025\0" /* 1 refs @ 35652 */ + "630a\0" /* 1 refs @ 35657 */ + "MCP61\0" /* 20 refs @ 35662 */ + "8600\0" /* 2 refs @ 35668 */ + "8400M\0" /* 1 refs @ 35673 */ + "GS\0" /* 3 refs @ 35679 */ + "140M\0" /* 1 refs @ 35682 */ + "MCP65\0" /* 31 refs @ 35687 */ + "PCI-LPC\0" /* 7 refs @ 35693 */ + "MCP67\0" /* 20 refs @ 35701 */ + "MCP73\0" /* 20 refs @ 35707 */ + "8800\0" /* 1 refs @ 35713 */ + "GF100GL\0" /* 1 refs @ 35718 */ + "(Tesla\0" /* 1 refs @ 35726 */ + "M2050)\0" /* 1 refs @ 35733 */ + "9300\0" /* 1 refs @ 35740 */ + "GE\0" /* 2 refs @ 35745 */ + "9300M\0" /* 1 refs @ 35748 */ + "150m\0" /* 1 refs @ 35754 */ + "160m\0" /* 1 refs @ 35759 */ + "295\0" /* 1 refs @ 35764 */ + "MCP78S\0" /* 1 refs @ 35768 */ + "MCP77\0" /* 21 refs @ 35775 */ + "9400M\0" /* 1 refs @ 35781 */ + "210\0" /* 2 refs @ 35787 */ + "MCP79\0" /* 17 refs @ 35791 */ + "GF100\0" /* 1 refs @ 35797 */ + "GF108\0" /* 1 refs @ 35803 */ + "GF116\0" /* 1 refs @ 35809 */ + "GTX\0" /* 89 refs @ 35815 */ + "740\0" /* 3 refs @ 35819 */ + "755M\0" /* 2 refs @ 35823 */ + "640M\0" /* 4 refs @ 35828 */ + "650M\0" /* 2 refs @ 35833 */ + "660M\0" /* 2 refs @ 35838 */ + "645M\0" /* 1 refs @ 35843 */ + "740M\0" /* 3 refs @ 35848 */ + "730M\0" /* 3 refs @ 35853 */ + "745M\0" /* 2 refs @ 35858 */ + "750M\0" /* 2 refs @ 35863 */ + "710A\0" /* 1 refs @ 35868 */ + "GRID\0" /* 5 refs @ 35873 */ + "K340\0" /* 1 refs @ 35878 */ + "K1\0" /* 1 refs @ 35883 */ + "K420\0" /* 1 refs @ 35886 */ + "K1100M\0" /* 1 refs @ 35891 */ + "K500M\0" /* 1 refs @ 35898 */ + "K2000D\0" /* 1 refs @ 35904 */ + "K600\0" /* 1 refs @ 35911 */ + "K2000M\0" /* 1 refs @ 35916 */ + "K1000M\0" /* 1 refs @ 35923 */ + "K2000\0" /* 1 refs @ 35930 */ + "410\0" /* 1 refs @ 35936 */ + "520M\0" /* 2 refs @ 35940 */ + "520MX\0" /* 1 refs @ 35945 */ + "410M\0" /* 2 refs @ 35951 */ + "4200M\0" /* 2 refs @ 35956 */ + "610M\0" /* 3 refs @ 35962 */ + "680\0" /* 1 refs @ 35967 */ + "770\0" /* 1 refs @ 35971 */ + "560\0" /* 4 refs @ 35975 */ + "555\0" /* 1 refs @ 35979 */ + "570M\0" /* 1 refs @ 35983 */ + "580M\0" /* 1 refs @ 35988 */ + "675M\0" /* 1 refs @ 35993 */ + "670M\0" /* 1 refs @ 35998 */ + "545\0" /* 2 refs @ 36003 */ + "450\0" /* 2 refs @ 36007 */ + "Rev.\0" /* 5 refs @ 36011 */ + "550M\0" /* 1 refs @ 36016 */ + "555M/635M\0" /* 3 refs @ 36021 */ + "560M\0" /* 1 refs @ 36031 */ + "635\0" /* 2 refs @ 36036 */ + "710\0" /* 3 refs @ 36040 */ + "Rev.2\0" /* 2 refs @ 36044 */ + "720\0" /* 2 refs @ 36050 */ + "GK208B\0" /* 2 refs @ 36054 */ + "735M\0" /* 1 refs @ 36061 */ + "710M\0" /* 1 refs @ 36066 */ + "825M\0" /* 1 refs @ 36071 */ + "720M\0" /* 1 refs @ 36076 */ + "920M\0" /* 1 refs @ 36081 */ + "910M\0" /* 1 refs @ 36086 */ + "K610M\0" /* 1 refs @ 36091 */ + "K510M\0" /* 1 refs @ 36097 */ + "830M\0" /* 1 refs @ 36103 */ + "840M\0" /* 2 refs @ 36108 */ + "845M\0" /* 3 refs @ 36113 */ + "930M\0" /* 2 refs @ 36118 */ + "940M\0" /* 2 refs @ 36123 */ + "945M\0" /* 2 refs @ 36128 */ + "945A\0" /* 1 refs @ 36133 */ + "940MX\0" /* 2 refs @ 36138 */ + "930MX\0" /* 1 refs @ 36144 */ + "920MX\0" /* 1 refs @ 36150 */ + "K620M\0" /* 1 refs @ 36156 */ + "M500M\0" /* 1 refs @ 36162 */ + "M520\0" /* 1 refs @ 36168 */ + "940A\0" /* 1 refs @ 36173 */ + "745\0" /* 3 refs @ 36178 */ + "850M\0" /* 1 refs @ 36182 */ + "860M\0" /* 1 refs @ 36187 */ + "950M\0" /* 1 refs @ 36192 */ + "960M\0" /* 1 refs @ 36197 */ + "M2000M\0" /* 1 refs @ 36202 */ + "M1000M\0" /* 1 refs @ 36209 */ + "M600M\0" /* 1 refs @ 36216 */ + "K2200M\0" /* 1 refs @ 36222 */ + "M620\0" /* 1 refs @ 36229 */ + "M1200\0" /* 1 refs @ 36234 */ + "810\0" /* 1 refs @ 36240 */ + "K2200\0" /* 1 refs @ 36244 */ + "K620\0" /* 1 refs @ 36250 */ + "K1200\0" /* 1 refs @ 36255 */ + "Tesla\0" /* 23 refs @ 36261 */ + "M10\0" /* 1 refs @ 36267 */ + "970\0" /* 1 refs @ 36271 */ + "980M\0" /* 1 refs @ 36275 */ + "970M\0" /* 1 refs @ 36280 */ + "965M\0" /* 5 refs @ 36285 */ + "M5000\0" /* 2 refs @ 36290 */ + "M60\0" /* 1 refs @ 36296 */ + "M5000M\0" /* 1 refs @ 36300 */ + "M4000M\0" /* 1 refs @ 36307 */ + "M3000\0" /* 1 refs @ 36314 */ + "M5500\0" /* 1 refs @ 36320 */ + "960\0" /* 2 refs @ 36326 */ + "950\0" /* 2 refs @ 36330 */ + "M2000\0" /* 1 refs @ 36334 */ + "M4\0" /* 1 refs @ 36340 */ + "M2200\0" /* 1 refs @ 36343 */ + "GP100\0" /* 1 refs @ 36349 */ + "P100\0" /* 3 refs @ 36355 */ + "12GB\0" /* 1 refs @ 36360 */ + "16GB\0" /* 7 refs @ 36365 */ + "SXM2\0" /* 4 refs @ 36370 */ + "TITAN\0" /* 3 refs @ 36375 */ + "X\0" /* 1 refs @ 36381 */ + "1080\0" /* 4 refs @ 36383 */ + "P6000\0" /* 1 refs @ 36388 */ + "P40\0" /* 1 refs @ 36394 */ + "1070\0" /* 3 refs @ 36398 */ + "1060\0" /* 7 refs @ 36403 */ + "3GB\0" /* 2 refs @ 36408 */ + "P5000\0" /* 2 refs @ 36412 */ + "P4\0" /* 1 refs @ 36418 */ + "P6\0" /* 1 refs @ 36421 */ + "P4000\0" /* 1 refs @ 36424 */ + "P3000\0" /* 1 refs @ 36430 */ + "6GB\0" /* 1 refs @ 36436 */ + "1050\0" /* 4 refs @ 36440 */ + "MX150\0" /* 2 refs @ 36445 */ + "MX230\0" /* 1 refs @ 36451 */ + "MX250\0" /* 2 refs @ 36457 */ + "MX330\0" /* 2 refs @ 36463 */ + "P500\0" /* 1 refs @ 36469 */ + "P520\0" /* 1 refs @ 36474 */ + "GV100\0" /* 2 refs @ 36479 */ + "DGXS\0" /* 2 refs @ 36485 */ + "FHHL\0" /* 1 refs @ 36490 */ + "32GB\0" /* 5 refs @ 36495 */ + "SXM3\0" /* 1 refs @ 36500 */ + "PG500-216\0" /* 1 refs @ 36505 */ + "PG503-216\0" /* 1 refs @ 36515 */ + "V100S\0" /* 1 refs @ 36525 */ + "RTX\0" /* 75 refs @ 36531 */ + "2080\0" /* 10 refs @ 36535 */ + "8000\0" /* 4 refs @ 36540 */ + "T10-4/T10-8/T10-16\0" /* 1 refs @ 36545 */ + "6000/8000\0" /* 1 refs @ 36564 */ + "SUPER\0" /* 14 refs @ 36574 */ + "2070\0" /* 11 refs @ 36580 */ + "2060\0" /* 10 refs @ 36585 */ + "Max-Q\0" /* 20 refs @ 36590 */ + "T4\0" /* 1 refs @ 36596 */ + "1660\0" /* 7 refs @ 36599 */ + "1650\0" /* 12 refs @ 36604 */ + "CMP\0" /* 4 refs @ 36609 */ + "40HX\0" /* 1 refs @ 36613 */ + "MX450\0" /* 3 refs @ 36618 */ + "T1000\0" /* 3 refs @ 36624 */ + "T600\0" /* 2 refs @ 36630 */ + "T400\0" /* 1 refs @ 36635 */ + "T2000\0" /* 1 refs @ 36640 */ + "A100\0" /* 5 refs @ 36646 */ + "SXM4\0" /* 2 refs @ 36651 */ + "40GB\0" /* 3 refs @ 36656 */ + "80GB\0" /* 2 refs @ 36661 */ + "PG506-232\0" /* 1 refs @ 36666 */ + "A30\0" /* 1 refs @ 36676 */ + "A100A\0" /* 1 refs @ 36680 */ + "A100B\0" /* 1 refs @ 36686 */ + "30HX\0" /* 1 refs @ 36692 */ + "3090\0" /* 1 refs @ 36697 */ + "3080\0" /* 5 refs @ 36702 */ + "20GB\0" /* 1 refs @ 36707 */ + "90HX\0" /* 1 refs @ 36712 */ + "Hash\0" /* 4 refs @ 36717 */ + "A6000\0" /* 1 refs @ 36722 */ + "A40\0" /* 1 refs @ 36728 */ + "A10\0" /* 1 refs @ 36732 */ + "A10G\0" /* 1 refs @ 36736 */ + "GA104\0" /* 1 refs @ 36741 */ + "Tegra\0" /* 1 refs @ 36747 */ + "3070\0" /* 6 refs @ 36753 */ + "3060\0" /* 7 refs @ 36758 */ + "70HX\0" /* 1 refs @ 36763 */ + "8GB/16GB\0" /* 1 refs @ 36768 */ + "A4000\0" /* 2 refs @ 36777 */ + "A5000\0" /* 1 refs @ 36783 */ + "A3000\0" /* 1 refs @ 36789 */ + "3050\0" /* 9 refs @ 36795 */ + "A4\0" /* 1 refs @ 36800 */ + "A2000\0" /* 1 refs @ 36803 */ + "Riva\0" /* 2 refs @ 36809 */ + "ZX\0" /* 1 refs @ 36814 */ + "OTI107\0" /* 1 refs @ 36817 */ + "OC-3136/3137\0" /* 1 refs @ 36824 */ + "Token-Ring\0" /* 2 refs @ 36837 */ + "OC-3139f\0" /* 1 refs @ 36848 */ + "Fastload\0" /* 1 refs @ 36857 */ + "OC-3139/3140\0" /* 1 refs @ 36866 */ + "RapidFire\0" /* 5 refs @ 36879 */ + "OC-3250\0" /* 1 refs @ 36889 */ + "GoCard\0" /* 1 refs @ 36897 */ + "OC-3530\0" /* 1 refs @ 36904 */ + "OC-3141\0" /* 1 refs @ 36912 */ + "OC-3540\0" /* 1 refs @ 36920 */ + "HSTR\0" /* 1 refs @ 36928 */ + "100/16/4\0" /* 1 refs @ 36933 */ + "OC-3150\0" /* 1 refs @ 36942 */ + "OC-2805\0" /* 1 refs @ 36950 */ + "OC-2325\0" /* 1 refs @ 36958 */ + "OC-2183/2185\0" /* 1 refs @ 36966 */ + "OC-2326\0" /* 1 refs @ 36979 */ + "10/100-TX\0" /* 1 refs @ 36987 */ + "OC-2327/2350\0" /* 1 refs @ 36997 */ + "OC-6151/6152\0" /* 1 refs @ 37010 */ + "82C557\0" /* 1 refs @ 37023 */ + "82C558\0" /* 1 refs @ 37030 */ + "82C568\0" /* 1 refs @ 37037 */ + "82C621\0" /* 1 refs @ 37044 */ + "82C700\0" /* 1 refs @ 37051 */ + "82C701\0" /* 1 refs @ 37058 */ + "82C822\0" /* 1 refs @ 37065 */ + "82C861\0" /* 1 refs @ 37072 */ + "82D568\0" /* 1 refs @ 37079 */ + "011H\0" /* 1 refs @ 37086 */ + "OX16PCI954\0" /* 2 refs @ 37091 */ + "OX16PCI954K\0" /* 1 refs @ 37102 */ + "OXuPCI952\0" /* 1 refs @ 37114 */ + "Exsys\0" /* 2 refs @ 37124 */ + "EX-41092\0" /* 1 refs @ 37130 */ + "OXCB950\0" /* 1 refs @ 37139 */ + "OXmPCI954\0" /* 2 refs @ 37147 */ + "Disabled\0" /* 1 refs @ 37157 */ + "EX-41098\0" /* 1 refs @ 37166 */ + "OX16PCI952\0" /* 2 refs @ 37175 */ + "OX16PCI958\0" /* 1 refs @ 37186 */ + "OXPCIe952\0" /* 13 refs @ 37197 */ + "Native\0" /* 6 refs @ 37207 */ + "OXPCIe954\0" /* 2 refs @ 37214 */ + "OXPCIe958\0" /* 2 refs @ 37224 */ + "HD-2000\0" /* 1 refs @ 37234 */ + "HDTV\0" /* 2 refs @ 37242 */ + "HD-5500\0" /* 1 refs @ 37247 */ + "RZ1000\0" /* 1 refs @ 37255 */ + "PCAN\0" /* 1 refs @ 37262 */ + "PI7C21P100\0" /* 1 refs @ 37267 */ + "PCIX-PCIX\0" /* 1 refs @ 37278 */ + "PI7C9X20303UL\0" /* 1 refs @ 37288 */ + "3port\0" /* 7 refs @ 37302 */ + "3lane\0" /* 3 refs @ 37308 */ + "switch\0" /* 21 refs @ 37314 */ + "PI7C9X20505GP\0" /* 1 refs @ 37321 */ + "5port\0" /* 2 refs @ 37335 */ + "5lane\0" /* 1 refs @ 37341 */ + "PI7C9X20508GP\0" /* 1 refs @ 37347 */ + "8lane\0" /* 5 refs @ 37361 */ + "PI7C9X2G303EL\0" /* 1 refs @ 37367 */ + "Gen2\0" /* 11 refs @ 37381 */ + "PI7C9X2G304EL\0" /* 1 refs @ 37386 */ + "4lane\0" /* 6 refs @ 37400 */ + "PI7C9X2G308GP\0" /* 1 refs @ 37406 */ + "PI7C9X2G312GP\0" /* 1 refs @ 37420 */ + "12lane\0" /* 3 refs @ 37434 */ + "PI7C9X2G404SL\0" /* 1 refs @ 37441 */ + "4port\0" /* 4 refs @ 37455 */ + "PI7C9X2G608GP\0" /* 1 refs @ 37461 */ + "6port\0" /* 2 refs @ 37475 */ + "PI7C9X2G612GP\0" /* 1 refs @ 37481 */ + "PI7C9X2G912GP\0" /* 1 refs @ 37495 */ + "9port\0" /* 1 refs @ 37509 */ + "PI7C9X2G808PR\0" /* 1 refs @ 37515 */ + "8port\0" /* 3 refs @ 37529 */ + "PI7C9X2G304EV\0" /* 1 refs @ 37535 */ + "PI7C9X2G404EV\0" /* 1 refs @ 37549 */ + "PI7C9X3G808GP\0" /* 1 refs @ 37563 */ + "Gen3\0" /* 4 refs @ 37577 */ + "PI7C9X3G816GP\0" /* 1 refs @ 37582 */ + "16lane\0" /* 1 refs @ 37596 */ + "PI7C9X3G1224GP\0" /* 1 refs @ 37603 */ + "12port\0" /* 1 refs @ 37618 */ + "24lane\0" /* 1 refs @ 37625 */ + "PI7C9X3G1632GP\0" /* 1 refs @ 37632 */ + "16port\0" /* 1 refs @ 37647 */ + "32lane\0" /* 1 refs @ 37654 */ + "PI7C8140A\0" /* 1 refs @ 37661 */ + "PI7C8148\0" /* 1 refs @ 37671 */ + "Asynchronous\0" /* 2 refs @ 37680 */ + "PI7C8152\0" /* 1 refs @ 37693 */ + "PI7C8154\0" /* 1 refs @ 37702 */ + "PI7C9X20303SL\0" /* 2 refs @ 37711 */ + "PI7C9X110\0" /* 1 refs @ 37725 */ + "PI7C9X111SL\0" /* 1 refs @ 37735 */ + "Reverse\0" /* 2 refs @ 37747 */ + "PI7C9X130\0" /* 1 refs @ 37755 */ + "PCIe-PCIX\0" /* 1 refs @ 37765 */ + "P1000\0" /* 1 refs @ 37775 */ + "FNW-3603-TX\0" /* 1 refs @ 37781 */ + "FNW-3800-TX\0" /* 1 refs @ 37793 */ + "VScom\0" /* 3 refs @ 37805 */ + "PCI-800\0" /* 1 refs @ 37811 */ + "PCI-400\0" /* 1 refs @ 37819 */ + "PCI-200\0" /* 1 refs @ 37827 */ + "9656\0" /* 2 refs @ 37835 */ + "FPBGA\0" /* 1 refs @ 37840 */ + "PEX\0" /* 4 refs @ 37846 */ + "8111\0" /* 1 refs @ 37850 */ + "8112\0" /* 1 refs @ 37855 */ + "8114\0" /* 1 refs @ 37860 */ + "PCIe-to-PCI/PCI-X\0" /* 1 refs @ 37865 */ + "8605\0" /* 1 refs @ 37883 */ + "9030\0" /* 1 refs @ 37888 */ + "Accelrator\0" /* 2 refs @ 37893 */ + "9050\0" /* 1 refs @ 37904 */ + "9054\0" /* 1 refs @ 37909 */ + "9060ES\0" /* 1 refs @ 37914 */ + "PowerTop\0" /* 1 refs @ 37921 */ + "PowerPro\0" /* 1 refs @ 37930 */ + "PDC20265\0" /* 1 refs @ 37939 */ + "Ultra/100\0" /* 4 refs @ 37948 */ + "PDC20263\0" /* 1 refs @ 37958 */ + "Ultra/66\0" /* 2 refs @ 37967 */ + "PDC20275\0" /* 1 refs @ 37976 */ + "Ultra/133\0" /* 10 refs @ 37985 */ + "PDC20318\0" /* 1 refs @ 37995 */ + "PDC20319\0" /* 1 refs @ 38004 */ + "PDC20371\0" /* 1 refs @ 38013 */ + "PDC20379\0" /* 1 refs @ 38022 */ + "PDC20378\0" /* 1 refs @ 38031 */ + "PDC20375\0" /* 1 refs @ 38040 */ + "PDC20376\0" /* 1 refs @ 38049 */ + "PDC20377\0" /* 1 refs @ 38058 */ + "PDC40719\0" /* 1 refs @ 38067 */ + "PDC40519\0" /* 1 refs @ 38076 */ + "PDC20771\0" /* 1 refs @ 38085 */ + "PDC20571\0" /* 1 refs @ 38094 */ + "PDC20579\0" /* 1 refs @ 38103 */ + "PDC40779\0" /* 1 refs @ 38112 */ + "PDC40718\0" /* 1 refs @ 38121 */ + "PDC40518\0" /* 1 refs @ 38130 */ + "PDC20775\0" /* 1 refs @ 38139 */ + "PDC20575\0" /* 1 refs @ 38148 */ + "PDC20267\0" /* 1 refs @ 38157 */ + "PDC20246\0" /* 1 refs @ 38166 */ + "Ultra/33\0" /* 1 refs @ 38175 */ + "PDC20262\0" /* 1 refs @ 38184 */ + "PDC20268\0" /* 1 refs @ 38193 */ + "PDC20269\0" /* 1 refs @ 38202 */ + "PDC20276\0" /* 1 refs @ 38211 */ + "DC5030\0" /* 1 refs @ 38220 */ + "PDC20270\0" /* 1 refs @ 38227 */ + "PDC20271\0" /* 1 refs @ 38236 */ + "PDC20617\0" /* 1 refs @ 38245 */ + "PDC20620\0" /* 1 refs @ 38254 */ + "PDC20621\0" /* 1 refs @ 38263 */ + "PDC20618\0" /* 1 refs @ 38272 */ + "PDC20619\0" /* 1 refs @ 38281 */ + "PDC20277\0" /* 1 refs @ 38290 */ + "CH352\0" /* 2 refs @ 38299 */ + "2S\0" /* 2 refs @ 38305 */ + "CH353\0" /* 3 refs @ 38308 */ + "4S\0" /* 11 refs @ 38314 */ + "CH356\0" /* 3 refs @ 38317 */ + "8S\0" /* 3 refs @ 38323 */ + "6S\0" /* 1 refs @ 38326 */ + "2S,\0" /* 3 refs @ 38329 */ + "1P\0" /* 7 refs @ 38333 */ + "(fixed\0" /* 1 refs @ 38336 */ + "address)\0" /* 1 refs @ 38343 */ + "1S,\0" /* 1 refs @ 38352 */ + "CH357\0" /* 1 refs @ 38356 */ + "CH358\0" /* 2 refs @ 38362 */ + "4S,\0" /* 3 refs @ 38368 */ + "CH359\0" /* 1 refs @ 38372 */ + "16S\0" /* 1 refs @ 38378 */ + "CH355\0" /* 1 refs @ 38382 */ + "CH382\0" /* 2 refs @ 38388 */ + "CH384\0" /* 4 refs @ 38394 */ + "28S\0" /* 1 refs @ 38400 */ + "QLA200\0" /* 1 refs @ 38404 */ + "ISP10160\0" /* 1 refs @ 38411 */ + "ISP1020\0" /* 1 refs @ 38420 */ + "ISP1022\0" /* 1 refs @ 38428 */ + "ISP1080\0" /* 1 refs @ 38436 */ + "ISP12160\0" /* 1 refs @ 38444 */ + "ISP1240\0" /* 1 refs @ 38453 */ + "ISP1280\0" /* 1 refs @ 38461 */ + "ISP2100\0" /* 1 refs @ 38469 */ + "ISP2200\0" /* 1 refs @ 38477 */ + "ISP2300\0" /* 1 refs @ 38485 */ + "ISP2312\0" /* 1 refs @ 38493 */ + "ISP2322\0" /* 1 refs @ 38501 */ + "ISP2422\0" /* 1 refs @ 38509 */ + "ISP2432\0" /* 1 refs @ 38517 */ + "ISP2512\0" /* 1 refs @ 38525 */ + "ISP2522\0" /* 1 refs @ 38533 */ + "ISP2532\0" /* 1 refs @ 38541 */ + "ISP4010\0" /* 2 refs @ 38549 */ + "TOE\0" /* 3 refs @ 38557 */ + "ISP4022\0" /* 2 refs @ 38561 */ + "ISP4032\0" /* 2 refs @ 38569 */ + "HBA\0" /* 3 refs @ 38577 */ + "ISP5422\0" /* 1 refs @ 38581 */ + "ISP5432\0" /* 1 refs @ 38589 */ + "ISP6312\0" /* 1 refs @ 38597 */ + "ISP6322\0" /* 1 refs @ 38605 */ + "ISP8432\0" /* 1 refs @ 38613 */ + "PWDOG1\0" /* 1 refs @ 38621 */ + "8580\0" /* 1 refs @ 38628 */ + "Virtio\0" /* 128 refs @ 38633 */ + "Balloon\0" /* 2 refs @ 38640 */ + "Console\0" /* 2 refs @ 38648 */ + "RNG\0" /* 2 refs @ 38656 */ + "Entropy\0" /* 2 refs @ 38660 */ + "9p\0" /* 2 refs @ 38668 */ + "Filesystem\0" /* 2 refs @ 38671 */ + "memory\0" /* 1 refs @ 38682 */ + "Remote\0" /* 1 refs @ 38689 */ + "CryptoSwift\0" /* 1 refs @ 38696 */ + "PKI\0" /* 1 refs @ 38708 */ + "RT2460A\0" /* 1 refs @ 38712 */ + "RT2560\0" /* 1 refs @ 38720 */ + "802.11b/g\0" /* 4 refs @ 38727 */ + "RT2561S\0" /* 1 refs @ 38737 */ + "RT2561\0" /* 1 refs @ 38745 */ + "RT2661\0" /* 1 refs @ 38752 */ + "RT2760\0" /* 1 refs @ 38759 */ + "RT2790\0" /* 1 refs @ 38766 */ + "RT3060\0" /* 1 refs @ 38773 */ + "RT3062\0" /* 1 refs @ 38780 */ + "RT3091\0" /* 1 refs @ 38787 */ + "RT3092\0" /* 1 refs @ 38794 */ + "RT3562\0" /* 1 refs @ 38801 */ + "RT3592\0" /* 1 refs @ 38808 */ + "RT3593\0" /* 1 refs @ 38815 */ + "RT5360\0" /* 1 refs @ 38822 */ + "RT5362\0" /* 1 refs @ 38829 */ + "RT5390\0" /* 5 refs @ 38836 */ + "REX\0" /* 1 refs @ 38843 */ + "PCI-31/33\0" /* 1 refs @ 38847 */ + "RP1\0" /* 1 refs @ 38857 */ + "R1010\0" /* 1 refs @ 38861 */ + "R1011\0" /* 1 refs @ 38867 */ + "R1012\0" /* 1 refs @ 38873 */ + "R1031\0" /* 1 refs @ 38879 */ + "R1060\0" /* 1 refs @ 38885 */ + "R1061\0" /* 1 refs @ 38891 */ + "R1070\0" /* 1 refs @ 38897 */ + "R1331\0" /* 1 refs @ 38903 */ + "R1710\0" /* 1 refs @ 38909 */ + "R1930\0" /* 1 refs @ 38915 */ + "Hybrid\0" /* 1 refs @ 38921 */ + "R2010\0" /* 1 refs @ 38928 */ + "R2012\0" /* 1 refs @ 38934 */ + "R2015\0" /* 1 refs @ 38940 */ + "R6011\0" /* 1 refs @ 38946 */ + "R6013\0" /* 1 refs @ 38952 */ + "R6021\0" /* 1 refs @ 38958 */ + "R6022\0" /* 1 refs @ 38964 */ + "R6023\0" /* 1 refs @ 38970 */ + "R6025\0" /* 1 refs @ 38976 */ + "R6026\0" /* 1 refs @ 38982 */ + "R6031\0" /* 1 refs @ 38988 */ + "R6035\0" /* 1 refs @ 38994 */ + "R6036\0" /* 1 refs @ 39000 */ + "R6040\0" /* 1 refs @ 39006 */ + "R6060\0" /* 1 refs @ 39012 */ + "R6061\0" /* 1 refs @ 39018 */ + "E2600\0" /* 1 refs @ 39024 */ + "E3000\0" /* 1 refs @ 39030 */ + "RTS5208\0" /* 1 refs @ 39036 */ + "RTS5209\0" /* 1 refs @ 39044 */ + "RTS5227\0" /* 1 refs @ 39052 */ + "RTS5229\0" /* 1 refs @ 39060 */ + "RTS522A\0" /* 1 refs @ 39068 */ + "RTS5249\0" /* 1 refs @ 39076 */ + "RTS525A\0" /* 1 refs @ 39084 */ + "RTL8402\0" /* 1 refs @ 39092 */ + "RTL8411B\0" /* 1 refs @ 39100 */ + "RTL8411\0" /* 1 refs @ 39109 */ + "8029\0" /* 1 refs @ 39117 */ + "8139D\0" /* 1 refs @ 39122 */ + "8100\0" /* 1 refs @ 39128 */ + "8125\0" /* 1 refs @ 39133 */ + "10/100/1G/2.5G\0" /* 1 refs @ 39138 */ + "8126\0" /* 1 refs @ 39153 */ + "10/100/1G/2.5G/5G\0" /* 2 refs @ 39158 */ + "8127\0" /* 1 refs @ 39176 */ + "8129\0" /* 1 refs @ 39181 */ + "8100E/8101E/8102E\0" /* 1 refs @ 39186 */ + "8138\0" /* 1 refs @ 39204 */ + "8169SC/8110SC\0" /* 1 refs @ 39209 */ + "8168/8111\0" /* 1 refs @ 39223 */ + "8169/8110\0" /* 1 refs @ 39233 */ + "RTL8188CE\0" /* 1 refs @ 39243 */ + "802.11n\0" /* 4 refs @ 39253 */ + "RTL8192CE\0" /* 1 refs @ 39261 */ + "RTL8188EE\0" /* 1 refs @ 39271 */ + "8185\0" /* 1 refs @ 39281 */ + "802.11a/b/g\0" /* 1 refs @ 39286 */ + "RTL8192EE\0" /* 1 refs @ 39298 */ + "RTL8821CE\0" /* 1 refs @ 39308 */ + "Qemu\0" /* 1 refs @ 39318 */ + "QXL\0" /* 1 refs @ 39323 */ + "SH7780\0" /* 1 refs @ 39327 */ + "SH7785\0" /* 1 refs @ 39334 */ + "SH7757\0" /* 3 refs @ 39341 */ + "End-Point\0" /* 1 refs @ 39348 */ + "[PBI]\0" /* 1 refs @ 39358 */ + "[PPB]\0" /* 1 refs @ 39364 */ + "[PS]\0" /* 1 refs @ 39370 */ + "uPD720201\0" /* 1 refs @ 39375 */ + "uPD720202\0" /* 1 refs @ 39385 */ + "5C465\0" /* 1 refs @ 39395 */ + "5C466\0" /* 1 refs @ 39401 */ + "5C475\0" /* 1 refs @ 39407 */ + "5C476\0" /* 1 refs @ 39413 */ + "5C477\0" /* 1 refs @ 39419 */ + "5C478\0" /* 1 refs @ 39425 */ + "5C551\0" /* 1 refs @ 39431 */ + "Bridge/Firewire\0" /* 2 refs @ 39437 */ + "5C552\0" /* 1 refs @ 39453 */ + "R5C576\0" /* 1 refs @ 39459 */ + "5C592\0" /* 1 refs @ 39466 */ + "Bridge/MS/SD/Firewire\0" /* 2 refs @ 39472 */ + "5C593\0" /* 1 refs @ 39494 */ + "5C821\0" /* 1 refs @ 39500 */ + "Bridge/MS/SD/MMC/SC\0" /* 2 refs @ 39506 */ + "5C822\0" /* 1 refs @ 39526 */ + "5C832\0" /* 1 refs @ 39532 */ + "PCI-SD/MMC/MMC+/MS/xD/Firewire\0" /* 1 refs @ 39538 */ + "5C843\0" /* 1 refs @ 39569 */ + "Bridge/SD/MMC/MMC+/MS/xD/Firewire\0" /* 2 refs @ 39575 */ + "5C847\0" /* 1 refs @ 39609 */ + "xD-Picture\0" /* 1 refs @ 39615 */ + "5C853\0" /* 1 refs @ 39626 */ + "Bridge/SD/MMC/MMC+/MS/xD/SC/Firewire\0" /* 1 refs @ 39632 */ + "5U230\0" /* 1 refs @ 39669 */ + "FireWire/SD/MMC/xD/MS\0" /* 1 refs @ 39675 */ + "5U822\0" /* 1 refs @ 39697 */ + "5U823\0" /* 1 refs @ 39703 */ + "5U832\0" /* 1 refs @ 39709 */ + "5C852\0" /* 1 refs @ 39715 */ + "N2\0" /* 1 refs @ 39721 */ + "FDDI\0" /* 1 refs @ 39724 */ + "RK3399\0" /* 1 refs @ 39729 */ + "Xframe\0" /* 1 refs @ 39736 */ + "Xframe2\0" /* 1 refs @ 39743 */ + "Xframe3\0" /* 1 refs @ 39751 */ + "ViRGE\0" /* 1 refs @ 39759 */ + "Trio32\0" /* 1 refs @ 39765 */ + "Trio32/64\0" /* 1 refs @ 39772 */ + "Aurora64V+\0" /* 1 refs @ 39782 */ + "Trio64UV+\0" /* 1 refs @ 39793 */ + "ViRGE/VX\0" /* 1 refs @ 39803 */ + "868\0" /* 1 refs @ 39812 */ + "86C928\0" /* 1 refs @ 39816 */ + "86C864-0\0" /* 1 refs @ 39823 */ + "(\"Vision864\")\0" /* 4 refs @ 39832 */ + "86C864-1\0" /* 1 refs @ 39846 */ + "86C864-2\0" /* 1 refs @ 39855 */ + "86C864-3\0" /* 1 refs @ 39864 */ + "86C964-0\0" /* 1 refs @ 39873 */ + "(\"Vision964\")\0" /* 4 refs @ 39882 */ + "86C964-1\0" /* 1 refs @ 39896 */ + "86C964-2\0" /* 1 refs @ 39905 */ + "86C964-3\0" /* 1 refs @ 39914 */ + "86C968-0\0" /* 1 refs @ 39923 */ + "(\"Vision968\")\0" /* 4 refs @ 39932 */ + "86C968-1\0" /* 1 refs @ 39946 */ + "86C968-2\0" /* 1 refs @ 39955 */ + "86C968-3\0" /* 1 refs @ 39964 */ + "Trio64V2/DX\0" /* 1 refs @ 39973 */ + "Plato/PX\0" /* 1 refs @ 39985 */ + "86C365\0" /* 1 refs @ 39994 */ + "Trio3D\0" /* 1 refs @ 40001 */ + "ViRGE/DX\0" /* 1 refs @ 40008 */ + "ViRGE/GX2\0" /* 1 refs @ 40017 */ + "Trio3D/2X\0" /* 1 refs @ 40027 */ + "Savage3D\0" /* 1 refs @ 40037 */ + "Savage3D+MV\0" /* 1 refs @ 40046 */ + "Savage4\0" /* 1 refs @ 40058 */ + "ProSavage\0" /* 1 refs @ 40066 */ + "KM133\0" /* 1 refs @ 40076 */ + "ViRGE/MX\0" /* 1 refs @ 40082 */ + "ViRGE/MXP\0" /* 1 refs @ 40091 */ + "Savage/MX+MV\0" /* 1 refs @ 40101 */ + "Savage/MX\0" /* 1 refs @ 40114 */ + "Savage/IX+MV\0" /* 1 refs @ 40124 */ + "Savage/IX\0" /* 1 refs @ 40137 */ + "Savage/IXC\0" /* 1 refs @ 40147 */ + "Chrome\0" /* 3 refs @ 40158 */ + "GT/540\0" /* 1 refs @ 40165 */ + "GTX/5400E\0" /* 1 refs @ 40172 */ + "Savage2000\0" /* 1 refs @ 40182 */ + "SonicVibes\0" /* 1 refs @ 40193 */ + "SafeXcel\0" /* 1 refs @ 40204 */ + "XP941\0" /* 1 refs @ 40213 */ + "M.2\0" /* 8 refs @ 40219 */ + "SM951\0" /* 2 refs @ 40223 */ + "SM961\0" /* 1 refs @ 40229 */ + "SM981\0" /* 1 refs @ 40235 */ + "SM980\0" /* 1 refs @ 40241 */ + "PM9A1\0" /* 1 refs @ 40247 */ + "SM990\0" /* 1 refs @ 40253 */ + "171X\0" /* 1 refs @ 40259 */ + "172X\0" /* 1 refs @ 40264 */ + "172Xa/172Xb\0" /* 1 refs @ 40269 */ + "PM173X\0" /* 1 refs @ 40281 */ + "PM173Xa\0" /* 1 refs @ 40288 */ + "PM174X\0" /* 1 refs @ 40296 */ + "KS8920\0" /* 1 refs @ 40303 */ + "QE1000\0" /* 1 refs @ 40310 */ + "FE1000\0" /* 1 refs @ 40317 */ + "WD\0" /* 2 refs @ 40324 */ + "Black\0" /* 1 refs @ 40327 */ + "Blue\0" /* 1 refs @ 40333 */ + "SN550\0" /* 1 refs @ 40338 */ + "Broadband\0" /* 1 refs @ 40344 */ + "BladeEngine2\0" /* 2 refs @ 40354 */ + "BladeEngine3\0" /* 2 refs @ 40367 */ + "iRMC\0" /* 1 refs @ 40380 */ + "CNB20-LE\0" /* 2 refs @ 40385 */ + "PCI/AGP\0" /* 6 refs @ 40394 */ + "CNB30-LE\0" /* 1 refs @ 40402 */ + "CNB20-HE\0" /* 3 refs @ 40411 */ + "CIOB-X\0" /* 1 refs @ 40420 */ + "CMIC-HE\0" /* 1 refs @ 40427 */ + "CNB30-HE\0" /* 1 refs @ 40435 */ + "CMIC-LE\0" /* 1 refs @ 40444 */ + "CMIC-SL\0" /* 1 refs @ 40452 */ + "HT1000\0" /* 6 refs @ 40460 */ + "CIOB-X2\0" /* 1 refs @ 40467 */ + "BCM5714/BCM5715\0" /* 1 refs @ 40475 */ + "Integral\0" /* 1 refs @ 40491 */ + "CIOB-E\0" /* 1 refs @ 40500 */ + "HT2100\0" /* 4 refs @ 40507 */ + "OSB4\0" /* 2 refs @ 40514 */ + "CSB5\0" /* 3 refs @ 40519 */ + "CSB6\0" /* 5 refs @ 40524 */ + "HT1000SB\0" /* 1 refs @ 40529 */ + "IDE/RAID\0" /* 2 refs @ 40538 */ + "HT-1000\0" /* 3 refs @ 40547 */ + "OSB4/CSB5\0" /* 1 refs @ 40555 */ + "ISA/LPC\0" /* 2 refs @ 40565 */ + "XIOAPIC\0" /* 1 refs @ 40573 */ + "Frodo4\0" /* 1 refs @ 40581 */ + "Frodo8\0" /* 1 refs @ 40588 */ + "HT1100SB\0" /* 1 refs @ 40595 */ + "HT-1100\0" /* 2 refs @ 40604 */ + "IOC3\0" /* 1 refs @ 40612 */ + "PsiTech\0" /* 1 refs @ 40617 */ + "RAD1\0" /* 1 refs @ 40625 */ + "Tigon\0" /* 1 refs @ 40630 */ + "STG\0" /* 3 refs @ 40636 */ + "2000X\0" /* 2 refs @ 40640 */ + "1764X\0" /* 1 refs @ 40646 */ + "BCM1250\0" /* 2 refs @ 40652 */ + "LDT\0" /* 1 refs @ 40660 */ + "REALmagic\0" /* 1 refs @ 40664 */ + "Hollywood-Plus\0" /* 1 refs @ 40674 */ + "MPEG-2\0" /* 1 refs @ 40689 */ + "Cyber10x\0" /* 17 refs @ 40696 */ + "16550\0" /* 13 refs @ 40705 */ + "16650\0" /* 12 refs @ 40711 */ + "16850\0" /* 12 refs @ 40717 */ + "2S1P\0" /* 6 refs @ 40723 */ + "Cyber20x\0" /* 20 refs @ 40728 */ + "2P1S\0" /* 3 refs @ 40737 */ + "86C201\0" /* 1 refs @ 40742 */ + "86C202\0" /* 1 refs @ 40749 */ + "86C205\0" /* 1 refs @ 40756 */ + "85C503\0" /* 1 refs @ 40763 */ + "5597/5598\0" /* 5 refs @ 40770 */ + "Mngmt\0" /* 1 refs @ 40780 */ + "180\0" /* 1 refs @ 40786 */ + "181\0" /* 1 refs @ 40790 */ + "182\0" /* 1 refs @ 40794 */ + "183\0" /* 1 refs @ 40798 */ + "190\0" /* 1 refs @ 40802 */ + "191\0" /* 1 refs @ 40806 */ + "300/305\0" /* 1 refs @ 40810 */ + "315\0" /* 1 refs @ 40818 */ + "85C501\0" /* 1 refs @ 40822 */ + "85C496\0" /* 1 refs @ 40829 */ + "85C601\0" /* 1 refs @ 40836 */ + "633\0" /* 1 refs @ 40843 */ + "646\0" /* 1 refs @ 40847 */ + "648\0" /* 1 refs @ 40851 */ + "651\0" /* 1 refs @ 40855 */ + "652\0" /* 1 refs @ 40859 */ + "658\0" /* 1 refs @ 40863 */ + "661\0" /* 1 refs @ 40867 */ + "671\0" /* 1 refs @ 40871 */ + "733\0" /* 1 refs @ 40875 */ + "735\0" /* 1 refs @ 40879 */ + "741\0" /* 1 refs @ 40883 */ + "746\0" /* 1 refs @ 40887 */ + "748\0" /* 1 refs @ 40891 */ + "751\0" /* 1 refs @ 40895 */ + "752\0" /* 1 refs @ 40899 */ + "755\0" /* 1 refs @ 40903 */ + "756\0" /* 1 refs @ 40907 */ + "760\0" /* 1 refs @ 40911 */ + "761\0" /* 1 refs @ 40915 */ + "900\0" /* 1 refs @ 40919 */ + "961\0" /* 1 refs @ 40923 */ + "962\0" /* 1 refs @ 40927 */ + "963\0" /* 1 refs @ 40931 */ + "964\0" /* 1 refs @ 40935 */ + "965\0" /* 1 refs @ 40939 */ + "966\0" /* 1 refs @ 40943 */ + "968\0" /* 1 refs @ 40947 */ + "GUI\0" /* 1 refs @ 40951 */ + "Accelerator+3D\0" /* 1 refs @ 40955 */ + "6326\0" /* 1 refs @ 40970 */ + "6330\0" /* 1 refs @ 40975 */ + "7002\0" /* 1 refs @ 40980 */ + "7012\0" /* 1 refs @ 40985 */ + "7013\0" /* 1 refs @ 40990 */ + "7016\0" /* 1 refs @ 40995 */ + "7018\0" /* 1 refs @ 41000 */ + "7019\0" /* 1 refs @ 41005 */ + "7502\0" /* 1 refs @ 41010 */ + "Voyager\0" /* 1 refs @ 41015 */ + "LynxEM\0" /* 1 refs @ 41023 */ + "LynxEM+\0" /* 1 refs @ 41030 */ + "Lynx3DM\0" /* 1 refs @ 41038 */ + "LynxE\0" /* 2 refs @ 41046 */ + "Lynx3D\0" /* 1 refs @ 41052 */ + "Lynx\0" /* 1 refs @ 41059 */ + "83C170\0" /* 1 refs @ 41064 */ + "(\"EPIC/100\")\0" /* 2 refs @ 41071 */ + "83C175\0" /* 1 refs @ 41084 */ + "FDC37C665\0" /* 1 refs @ 41091 */ + "FDC37C922\0" /* 1 refs @ 41101 */ + "PAX.ware\0" /* 1 refs @ 41111 */ + "Gb\0" /* 1 refs @ 41120 */ + "Classifier\0" /* 2 refs @ 41123 */ + "SNP8023:\0" /* 2 refs @ 41134 */ + "971\0" /* 1 refs @ 41143 */ + "CXD1947A\0" /* 1 refs @ 41147 */ + "CXD3222\0" /* 1 refs @ 41156 */ + "PCIO\0" /* 3 refs @ 41164 */ + "Ebus2\0" /* 2 refs @ 41169 */ + "Happy\0" /* 1 refs @ 41175 */ + "Meal\0" /* 1 refs @ 41181 */ + "(US\0" /* 1 refs @ 41186 */ + "III)\0" /* 4 refs @ 41190 */ + "ERI\0" /* 1 refs @ 41195 */ + "GEM\0" /* 1 refs @ 41199 */ + "Simba\0" /* 1 refs @ 41203 */ + "BCM5821\0" /* 1 refs @ 41209 */ + "psycho\0" /* 1 refs @ 41217 */ + "microSPARC\0" /* 1 refs @ 41224 */ + "IIep\0" /* 1 refs @ 41235 */ + "UltraSPARC\0" /* 2 refs @ 41240 */ + "IIi\0" /* 1 refs @ 41251 */ + "Cassini\0" /* 1 refs @ 41255 */ + "Neptune\0" /* 1 refs @ 41263 */ + "IP100A\0" /* 1 refs @ 41271 */ + "ST201\0" /* 1 refs @ 41278 */ + "ST1023\0" /* 1 refs @ 41284 */ + "ST2021\0" /* 1 refs @ 41291 */ + "Matrix\0" /* 1 refs @ 41298 */ + "adapter\0" /* 1 refs @ 41305 */ + "SER5xxx\0" /* 1 refs @ 41313 */ + "multiport\0" /* 3 refs @ 41321 */ + "PCI2S550\0" /* 1 refs @ 41331 */ + "SUN1888\0" /* 1 refs @ 41340 */ + "parallel\0" /* 1 refs @ 41348 */ + "NE-34\0" /* 1 refs @ 41357 */ + "4S2P\0" /* 1 refs @ 41363 */ + "82C101\0" /* 2 refs @ 41368 */ + "82C103\0" /* 1 refs @ 41375 */ + "82C105\0" /* 1 refs @ 41382 */ + "83C553\0" /* 1 refs @ 41389 */ + "SB16C1054\0" /* 1 refs @ 41396 */ + "UARTs\0" /* 3 refs @ 41406 */ + "SB16C1058\0" /* 1 refs @ 41412 */ + "SB16C1050\0" /* 1 refs @ 41422 */ + "FDDI-xP\0" /* 1 refs @ 41432 */ + "SK-9821\0" /* 1 refs @ 41440 */ + "SK-9DX1\0" /* 1 refs @ 41448 */ + "SK-9Mxx\0" /* 1 refs @ 41456 */ + "SK-9D21\0" /* 1 refs @ 41464 */ + "1000BASE-T\0" /* 1 refs @ 41472 */ + "SK-9D41\0" /* 1 refs @ 41483 */ + "1000BASE-X\0" /* 1 refs @ 41491 */ + "SK-9Sxx\0" /* 1 refs @ 41502 */ + "SK-9E21D/SK-9E22\0" /* 1 refs @ 41510 */ + "1000base-T\0" /* 1 refs @ 41527 */ + "TC9021\0" /* 2 refs @ 41538 */ + "(alt\0" /* 1 refs @ 41545 */ + "ServerNet\0" /* 1 refs @ 41550 */ + "DC-290(M)\0" /* 1 refs @ 41560 */ + "DC-315/DC-395\0" /* 1 refs @ 41570 */ + "DC-690C\0" /* 1 refs @ 41584 */ + "TLAN\0" /* 1 refs @ 41592 */ + "TVP4020\0" /* 1 refs @ 41597 */ + "TSB12LV21\0" /* 1 refs @ 41605 */ + "TSB12LV22\0" /* 1 refs @ 41615 */ + "PCI4450\0" /* 2 refs @ 41625 */ + "PCI4410\0" /* 2 refs @ 41633 */ + "TSB12LV23\0" /* 1 refs @ 41641 */ + "TSB12LV26\0" /* 1 refs @ 41651 */ + "TSB43AA22\0" /* 1 refs @ 41661 */ + "TSB43AA22/A\0" /* 1 refs @ 41671 */ + "TSB43AA23\0" /* 1 refs @ 41683 */ + "TSB82AA2\0" /* 1 refs @ 41693 */ + "TSB43AA21\0" /* 1 refs @ 41702 */ + "PCI4451\0" /* 2 refs @ 41712 */ + "PCI4510\0" /* 2 refs @ 41720 */ + "PCI4520\0" /* 2 refs @ 41728 */ + "PCI7[4-6]10\0" /* 1 refs @ 41736 */ + "PCI7x21/7x11\0" /* 5 refs @ 41748 */ + "Cardbus\0" /* 4 refs @ 41761 */ + "FlashMedia\0" /* 2 refs @ 41769 */ + "SM\0" /* 1 refs @ 41780 */ + "PCI6515A\0" /* 2 refs @ 41783 */ + "(Smart\0" /* 2 refs @ 41792 */ + "PCIXX12\0" /* 5 refs @ 41799 */ + "ACX100A\0" /* 1 refs @ 41807 */ + "ACX100B\0" /* 1 refs @ 41815 */ + "ACX111\0" /* 1 refs @ 41823 */ + "PCI1130\0" /* 1 refs @ 41830 */ + "PCI1031\0" /* 1 refs @ 41838 */ + "PCI1131\0" /* 1 refs @ 41846 */ + "PCI1250\0" /* 1 refs @ 41854 */ + "PCI1220\0" /* 1 refs @ 41862 */ + "PCI1221\0" /* 1 refs @ 41870 */ + "PCI1210\0" /* 1 refs @ 41878 */ + "PCI1450\0" /* 1 refs @ 41886 */ + "PCI1225\0" /* 1 refs @ 41894 */ + "PCI1251\0" /* 1 refs @ 41902 */ + "PCI1211\0" /* 1 refs @ 41910 */ + "PCI1251B\0" /* 1 refs @ 41918 */ + "PCI2030\0" /* 1 refs @ 41927 */ + "PCI2050\0" /* 1 refs @ 41935 */ + "PCI7510\0" /* 1 refs @ 41943 */ + "PCI7610\0" /* 2 refs @ 41951 */ + "PCI7410\0" /* 1 refs @ 41959 */ + "PCI7[46]10\0" /* 2 refs @ 41967 */ + "(SD/MMC\0" /* 1 refs @ 41978 */ + "(Memory\0" /* 1 refs @ 41986 */ + "PCI1410\0" /* 1 refs @ 41994 */ + "PCI1420\0" /* 1 refs @ 42002 */ + "PCI1451\0" /* 1 refs @ 42010 */ + "PCI1421\0" /* 1 refs @ 42018 */ + "PCI1620\0" /* 1 refs @ 42026 */ + "PCI1520\0" /* 1 refs @ 42034 */ + "PCI1510\0" /* 1 refs @ 42042 */ + "PCI1530\0" /* 1 refs @ 42050 */ + "PCI1515\0" /* 1 refs @ 42058 */ + "PCI2040\0" /* 1 refs @ 42066 */ + "PCI-DSP\0" /* 1 refs @ 42074 */ + "PCI7420\0" /* 1 refs @ 42082 */ + "PCI-Cardbus\0" /* 1 refs @ 42090 */ + "PCI-010L\0" /* 1 refs @ 42102 */ + "PCI-100L\0" /* 1 refs @ 42111 */ + "PCI-110L\0" /* 1 refs @ 42120 */ + "PCI-200L\0" /* 1 refs @ 42129 */ + "PCI-210L\0" /* 1 refs @ 42138 */ + "PCI-200Li\0" /* 1 refs @ 42147 */ + "PCI-400L\0" /* 1 refs @ 42157 */ + "PCI-800L\0" /* 1 refs @ 42166 */ + "PCI-011H\0" /* 1 refs @ 42175 */ + "PCI-x10H\0" /* 1 refs @ 42184 */ + "PCI-100H\0" /* 1 refs @ 42193 */ + "PCI-800H\0" /* 1 refs @ 42202 */ + "PCI-800H_1\0" /* 1 refs @ 42211 */ + "PCI-200H\0" /* 1 refs @ 42222 */ + "PCI-010HV2\0" /* 1 refs @ 42231 */ + "PCI-200HV2\0" /* 1 refs @ 42242 */ + "R4x00\0" /* 1 refs @ 42253 */ + "TC35856F\0" /* 1 refs @ 42259 */ + "(\"Meteor\")\0" /* 1 refs @ 42268 */ + "Portege\0" /* 1 refs @ 42279 */ + "Piccolo\0" /* 4 refs @ 42287 */ + "XG4\0" /* 1 refs @ 42295 */ + "XG5\0" /* 1 refs @ 42299 */ + "ToPIC95\0" /* 1 refs @ 42303 */ + "ToPIC95B\0" /* 1 refs @ 42311 */ + "ToPIC97\0" /* 1 refs @ 42320 */ + "ToPIC100\0" /* 1 refs @ 42328 */ + "SanRemo?\0" /* 1 refs @ 42337 */ + "Triangle\0" /* 1 refs @ 42346 */ + "Infrared\0" /* 2 refs @ 42355 */ + "Type\0" /* 2 refs @ 42364 */ + "O\0" /* 1 refs @ 42369 */ + "Type-A\0" /* 1 refs @ 42371 */ + "DO\0" /* 1 refs @ 42378 */ + "TM8000\0" /* 1 refs @ 42381 */ + "LongRun\0" /* 1 refs @ 42388 */ + "SDRAM\0" /* 1 refs @ 42396 */ + "BIOS\0" /* 1 refs @ 42402 */ + "4DWAVE\0" /* 2 refs @ 42407 */ + "DX\0" /* 1 refs @ 42414 */ + "NX\0" /* 1 refs @ 42417 */ + "CyberBlade\0" /* 2 refs @ 42420 */ + "TGUI\0" /* 8 refs @ 42431 */ + "9320\0" /* 1 refs @ 42436 */ + "9360\0" /* 1 refs @ 42441 */ + "CYBER\0" /* 3 refs @ 42446 */ + "9397\0" /* 1 refs @ 42452 */ + "9397DVD\0" /* 1 refs @ 42457 */ + "9420\0" /* 1 refs @ 42465 */ + "9440\0" /* 1 refs @ 42470 */ + "9525\0" /* 1 refs @ 42475 */ + "9660\0" /* 1 refs @ 42480 */ + "9680\0" /* 1 refs @ 42485 */ + "9682\0" /* 1 refs @ 42490 */ + "HPT343/345\0" /* 1 refs @ 42495 */ + "HPT366/370/372\0" /* 1 refs @ 42506 */ + "HPT372A\0" /* 1 refs @ 42521 */ + "HPT302\0" /* 1 refs @ 42529 */ + "HPT371\0" /* 1 refs @ 42536 */ + "HPT374\0" /* 1 refs @ 42543 */ + "HPT372N\0" /* 1 refs @ 42550 */ + "RocketRAID\0" /* 2 refs @ 42558 */ + "2310\0" /* 1 refs @ 42569 */ + "card\0" /* 2 refs @ 42574 */ + "2720\0" /* 1 refs @ 42579 */ + "Pyramid3D\0" /* 1 refs @ 42584 */ + "TR25202\0" /* 1 refs @ 42594 */ + "ET4000w32p\0" /* 4 refs @ 42602 */ + "ET6000\0" /* 1 refs @ 42613 */ + "UM82C881\0" /* 1 refs @ 42620 */ + "486\0" /* 2 refs @ 42629 */ + "UM82C886\0" /* 1 refs @ 42633 */ + "UM8673F\0" /* 1 refs @ 42642 */ + "UM8881\0" /* 1 refs @ 42650 */ + "UM82C891\0" /* 1 refs @ 42657 */ + "UM886A\0" /* 1 refs @ 42666 */ + "UM8886BF\0" /* 1 refs @ 42673 */ + "UM8710\0" /* 1 refs @ 42682 */ + "UM8886\0" /* 1 refs @ 42689 */ + "UM8881F\0" /* 1 refs @ 42696 */ + "PCI-Host\0" /* 1 refs @ 42704 */ + "UM8886F\0" /* 1 refs @ 42713 */ + "UM8886A\0" /* 1 refs @ 42721 */ + "UM8891A\0" /* 1 refs @ 42729 */ + "UM9017F\0" /* 1 refs @ 42737 */ + "UM8886N\0" /* 1 refs @ 42745 */ + "UM8891N\0" /* 1 refs @ 42753 */ + "US201\0" /* 1 refs @ 42761 */ + "Voice\0" /* 1 refs @ 42767 */ + "(WinModem)\0" /* 1 refs @ 42773 */ + "3CP5609\0" /* 1 refs @ 42784 */ + "USR997902\0" /* 1 refs @ 42792 */ + "V292PBCPSC\0" /* 1 refs @ 42802 */ + "Am29K\0" /* 1 refs @ 42813 */ + "Local\0" /* 1 refs @ 42819 */ + "V292PBC\0" /* 1 refs @ 42825 */ + "AMD290x0\0" /* 1 refs @ 42833 */ + "V960PBC\0" /* 1 refs @ 42842 */ + "V96DPC\0" /* 1 refs @ 42850 */ + "(Dual)\0" /* 1 refs @ 42857 */ + "VT6305\0" /* 1 refs @ 42864 */ + "K8M800\0" /* 1 refs @ 42871 */ + "K8T890\0" /* 14 refs @ 42878 */ + "CN333/CN400/PM880\0" /* 6 refs @ 42885 */ + "KT880\0" /* 6 refs @ 42903 */ + "K8HTB\0" /* 3 refs @ 42909 */ + "VT8363\0" /* 2 refs @ 42915 */ + "(Apollo\0" /* 25 refs @ 42922 */ + "KT133)\0" /* 2 refs @ 42930 */ + "P4M890/PT890\0" /* 10 refs @ 42937 */ + "K8M890CE\0" /* 8 refs @ 42950 */ + "VT3351\0" /* 7 refs @ 42959 */ + "VX800/VX820\0" /* 13 refs @ 42966 */ + "CN896/P4M900\0" /* 10 refs @ 42978 */ + "VT8371\0" /* 2 refs @ 42991 */ + "KX133)\0" /* 2 refs @ 42998 */ + "VX855\0" /* 10 refs @ 43005 */ + "VX900\0" /* 15 refs @ 43011 */ + "VT6415/VT6330\0" /* 1 refs @ 43017 */ + "VT8501\0" /* 2 refs @ 43031 */ + "MVP4)\0" /* 2 refs @ 43038 */ + "VT82C505\0" /* 1 refs @ 43044 */ + "(Pluto)\0" /* 1 refs @ 43053 */ + "VT82C561\0" /* 1 refs @ 43061 */ + "VT82C586A\0" /* 1 refs @ 43070 */ + "VT82C576\0" /* 1 refs @ 43080 */ + "3V\0" /* 1 refs @ 43089 */ + "CX700(M2)/VX700/VX800\0" /* 1 refs @ 43092 */ + "SATA/IDE\0" /* 1 refs @ 43114 */ + "VT82C580\0" /* 1 refs @ 43123 */ + "VP)\0" /* 1 refs @ 43132 */ + "VT82C586\0" /* 3 refs @ 43136 */ + "VT8237A\0" /* 2 refs @ 43145 */ + "VT82C595\0" /* 2 refs @ 43153 */ + "VP2)\0" /* 2 refs @ 43162 */ + "VT82C596A\0" /* 1 refs @ 43167 */ + "VT82C597\0" /* 2 refs @ 43177 */ + "VP3)\0" /* 2 refs @ 43186 */ + "VT82C598\0" /* 2 refs @ 43191 */ + "MVP3)\0" /* 2 refs @ 43200 */ + "VT8601A\0" /* 2 refs @ 43206 */ + "PLE133)\0" /* 1 refs @ 43214 */ + "VT8605\0" /* 2 refs @ 43222 */ + "ProMedia\0" /* 2 refs @ 43229 */ + "133)\0" /* 3 refs @ 43238 */ + "VT82C686A\0" /* 4 refs @ 43243 */ + "VT82C691\0" /* 1 refs @ 43253 */ + "Pro)\0" /* 1 refs @ 43262 */ + "VT82C693\0" /* 1 refs @ 43267 */ + "Plus)\0" /* 1 refs @ 43276 */ + "VT86C926\0" /* 1 refs @ 43282 */ + "Amazon\0" /* 1 refs @ 43291 */ + "PCI-Ethernet\0" /* 1 refs @ 43298 */ + "VT82C570M\0" /* 2 refs @ 43311 */ + "(Apollo)\0" /* 2 refs @ 43321 */ + "HC3\0" /* 1 refs @ 43330 */ + "VT6105M_BOM\0" /* 1 refs @ 43334 */ + "(Rhine\0" /* 4 refs @ 43346 */ + "VT8251\0" /* 8 refs @ 43353 */ + "Port1\0" /* 1 refs @ 43360 */ + "Port2\0" /* 1 refs @ 43366 */ + "VT8237A/VT8237S/VT8251\0" /* 1 refs @ 43372 */ + "VLINK\0" /* 1 refs @ 43395 */ + "VT83C572\0" /* 1 refs @ 43401 */ + "VT3043\0" /* 1 refs @ 43410 */ + "(Rhine)\0" /* 1 refs @ 43417 */ + "VT6306\0" /* 1 refs @ 43425 */ + "VT82C596B\0" /* 1 refs @ 43432 */ + "VT6105M\0" /* 1 refs @ 43442 */ + "VT8233/VT8235\0" /* 1 refs @ 43450 */ + "VT6102\0" /* 1 refs @ 43464 */ + "MC-97\0" /* 1 refs @ 43471 */ + "VT8233\0" /* 1 refs @ 43477 */ + "VT8366\0" /* 2 refs @ 43484 */ + "KT266)\0" /* 2 refs @ 43491 */ + "CPU-PCI\0" /* 3 refs @ 43498 */ + "VT8653\0" /* 1 refs @ 43506 */ + "266T)\0" /* 1 refs @ 43513 */ + "VT8237\0" /* 4 refs @ 43519 */ + "VT6105\0" /* 1 refs @ 43526 */ + "K8M800/K8N800(A)\0" /* 1 refs @ 43533 */ + "UniChrome\0" /* 5 refs @ 43550 */ + "VT8233C\0" /* 1 refs @ 43560 */ + "CN400/PM8x0/PN8x0\0" /* 1 refs @ 43568 */ + "VT612X\0" /* 1 refs @ 43586 */ + "(Velocity)\0" /* 1 refs @ 43593 */ + "VT8623\0" /* 2 refs @ 43604 */ + "CLE266)\0" /* 2 refs @ 43611 */ + "VT8233A\0" /* 1 refs @ 43619 */ + "P4M266\0" /* 1 refs @ 43627 */ + "CX700/VX700\0" /* 1 refs @ 43634 */ + "Unichrome\0" /* 1 refs @ 43646 */ + "VT6410\0" /* 1 refs @ 43656 */ + "VT8235\0" /* 1 refs @ 43663 */ + "VT8377\0" /* 2 refs @ 43670 */ + "KT400\0" /* 1 refs @ 43677 */ + "VT8378\0" /* 1 refs @ 43683 */ + "KM400\0" /* 1 refs @ 43690 */ + "K8M890CE/K8N890CE\0" /* 1 refs @ 43696 */ + "VT6421\0" /* 1 refs @ 43714 */ + "VT8237A/VT8251\0" /* 1 refs @ 43721 */ + "VT8237A/VT82C586A\0" /* 1 refs @ 43736 */ + "P4M890\0" /* 1 refs @ 43754 */ + "CN700/P4M800\0" /* 1 refs @ 43761 */ + "(Pro/CE)/VN800\0" /* 1 refs @ 43774 */ + "CN896/VN896/P4M900\0" /* 1 refs @ 43789 */ + "Chrome9\0" /* 2 refs @ 43808 */ + "HC\0" /* 1 refs @ 43816 */ + "VT8237S\0" /* 3 refs @ 43819 */ + "VT8237A/S\0" /* 2 refs @ 43827 */ + "VT8261\0" /* 3 refs @ 43837 */ + "VT6315/VT6330\0" /* 1 refs @ 43844 */ + "VL80x\0" /* 1 refs @ 43858 */ + "VL805\0" /* 1 refs @ 43864 */ + "VX11\0" /* 2 refs @ 43870 */ + "[Chrome\0" /* 2 refs @ 43875 */ + "645/640]\0" /* 1 refs @ 43883 */ + "VX855/VX875\0" /* 2 refs @ 43892 */ + "HCM\0" /* 1 refs @ 43904 */ + "CX700(M2)/VX700/VX800/VX820\0" /* 1 refs @ 43908 */ + "VT86C100A\0" /* 1 refs @ 43936 */ + "(Rhine-II)\0" /* 1 refs @ 43946 */ + "VN1000\0" /* 1 refs @ 43957 */ + "IGP]\0" /* 1 refs @ 43964 */ + "[Chrome9\0" /* 1 refs @ 43969 */ + "HD]\0" /* 1 refs @ 43978 */ + "KM400/KN400/P4M800\0" /* 1 refs @ 43982 */ + "V-Link\0" /* 2 refs @ 44001 */ + "North-South\0" /* 3 refs @ 44008 */ + "VT8231\0" /* 2 refs @ 44020 */ + "CX700\0" /* 1 refs @ 44027 */ + "CPU-AGP\0" /* 7 refs @ 44033 */ + "PLE\0" /* 1 refs @ 44041 */ + "VX900/VX11\0" /* 3 refs @ 44045 */ + "VX800/VX900\0" /* 2 refs @ 44056 */ + "VX8xx/VX900\0" /* 2 refs @ 44068 */ + "South-North\0" /* 1 refs @ 44080 */ + "VT8633\0" /* 1 refs @ 44092 */ + "266)\0" /* 1 refs @ 44099 */ + "VT8377CE\0" /* 1 refs @ 44104 */ + "G0\0" /* 1 refs @ 44113 */ + "Layer\0" /* 1 refs @ 44116 */ + "Electrical\0" /* 1 refs @ 44122 */ + "Sub-block\0" /* 1 refs @ 44133 */ + "Guest\0" /* 1 refs @ 44143 */ + "Service\0" /* 1 refs @ 44149 */ + "GDT6000/6020/6050\0" /* 1 refs @ 44157 */ + "GDT6000B/6010\0" /* 1 refs @ 44175 */ + "GDT6110/6510\0" /* 1 refs @ 44189 */ + "GDT6120/6520\0" /* 1 refs @ 44202 */ + "GDT6530\0" /* 1 refs @ 44215 */ + "GDT6550\0" /* 1 refs @ 44223 */ + "GDT6117/6517\0" /* 1 refs @ 44231 */ + "GDT6127/6527\0" /* 1 refs @ 44244 */ + "GDT6537\0" /* 1 refs @ 44257 */ + "GDT6557/6557-ECC\0" /* 1 refs @ 44265 */ + "GDT6115/6515\0" /* 1 refs @ 44282 */ + "GDT6125/6525\0" /* 1 refs @ 44295 */ + "GDT6535\0" /* 1 refs @ 44308 */ + "GDT6555/6555-ECC\0" /* 1 refs @ 44316 */ + "GDT6[15]17RP\0" /* 1 refs @ 44333 */ + "GDT6[15]27RP\0" /* 1 refs @ 44346 */ + "GDT6537RP\0" /* 1 refs @ 44359 */ + "GDT6557RP\0" /* 1 refs @ 44369 */ + "GDT6[15]11RP\0" /* 1 refs @ 44379 */ + "GDT6[15]21RP\0" /* 1 refs @ 44392 */ + "GDT6[15]17RD\0" /* 1 refs @ 44405 */ + "GDT6[5]127RD\0" /* 1 refs @ 44418 */ + "GDT6537RD\0" /* 1 refs @ 44431 */ + "GDT6557RD\0" /* 1 refs @ 44441 */ + "GDT6[15]11RD\0" /* 1 refs @ 44451 */ + "GDT6[15]21RD\0" /* 1 refs @ 44464 */ + "GDT6[156]18RD\0" /* 1 refs @ 44477 */ + "GDT6[156]28RD\0" /* 1 refs @ 44491 */ + "GDT6[56]38RD\0" /* 1 refs @ 44505 */ + "GDT6[56]58RD\0" /* 1 refs @ 44518 */ + "GDT6[15]17RP2\0" /* 1 refs @ 44531 */ + "GDT6[15]27RP2\0" /* 1 refs @ 44545 */ + "GDT6537RP2\0" /* 1 refs @ 44559 */ + "GDT6[15]11RP2\0" /* 1 refs @ 44570 */ + "GDT6[15]21RP2\0" /* 1 refs @ 44584 */ + "GDT6513RS\0" /* 1 refs @ 44598 */ + "GDT6523RS\0" /* 1 refs @ 44608 */ + "GDT6518RS\0" /* 1 refs @ 44618 */ + "GDT6x28RS\0" /* 1 refs @ 44628 */ + "GDT6x38RS\0" /* 1 refs @ 44638 */ + "GDT6x58RS\0" /* 1 refs @ 44648 */ + "GDT6x33RS\0" /* 1 refs @ 44658 */ + "GDT6x43RS\0" /* 1 refs @ 44668 */ + "GDT6x53RS\0" /* 1 refs @ 44678 */ + "GDT6x63RS\0" /* 1 refs @ 44688 */ + "GDT7x13RN\0" /* 1 refs @ 44698 */ + "GDT7x23RN\0" /* 1 refs @ 44708 */ + "GDT7[156]18RN\0" /* 1 refs @ 44718 */ + "GDT7[156]28RN\0" /* 1 refs @ 44732 */ + "GDT7[56]38RN\0" /* 1 refs @ 44746 */ + "GDT7[56]58RN\0" /* 1 refs @ 44759 */ + "GDT7[56]43RN\0" /* 1 refs @ 44772 */ + "GDT7x53RN\0" /* 1 refs @ 44785 */ + "GDT7x63RN\0" /* 1 refs @ 44795 */ + "GDT4x13RZ\0" /* 1 refs @ 44805 */ + "GDT4x23RZ\0" /* 1 refs @ 44815 */ + "GDT8x13RZ\0" /* 1 refs @ 44825 */ + "GDT8x23RZ\0" /* 1 refs @ 44835 */ + "GDT8x33RZ\0" /* 1 refs @ 44845 */ + "GDT8x43RZ\0" /* 1 refs @ 44855 */ + "GDT8x53RZ\0" /* 1 refs @ 44865 */ + "GDT8x63RZ\0" /* 1 refs @ 44875 */ + "GDT6[56]19RD\0" /* 1 refs @ 44885 */ + "GDT6[56]29RD\0" /* 1 refs @ 44898 */ + "GDT7[56]19RN\0" /* 1 refs @ 44911 */ + "GDT7[56]29RN\0" /* 1 refs @ 44924 */ + "ICP\0" /* 1 refs @ 44937 */ + "82C592\0" /* 1 refs @ 44941 */ + "82C593\0" /* 1 refs @ 44948 */ + "82C594\0" /* 1 refs @ 44955 */ + "Wildcat\0" /* 2 refs @ 44962 */ + "82C596/597\0" /* 1 refs @ 44970 */ + "82C541\0" /* 1 refs @ 44981 */ + "82C543\0" /* 1 refs @ 44988 */ + "82C532\0" /* 1 refs @ 44995 */ + "82C534\0" /* 1 refs @ 45002 */ + "82C535\0" /* 1 refs @ 45009 */ + "82C147\0" /* 1 refs @ 45016 */ + "82C975\0" /* 1 refs @ 45023 */ + "82C925\0" /* 1 refs @ 45030 */ + "SVGA\0" /* 2 refs @ 45037 */ + "Machine\0" /* 1 refs @ 45042 */ + "Communication\0" /* 1 refs @ 45050 */ + "82545EM\0" /* 1 refs @ 45064 */ + "82546EB\0" /* 1 refs @ 45072 */ + "PVSCSI\0" /* 1 refs @ 45080 */ + "VMI\0" /* 1 refs @ 45087 */ + "option\0" /* 1 refs @ 45091 */ + "ROM\0" /* 1 refs @ 45098 */ + "P9000\0" /* 1 refs @ 45102 */ + "P9100\0" /* 1 refs @ 45108 */ + "WD33C193A\0" /* 1 refs @ 45114 */ + "WD33C196A\0" /* 1 refs @ 45124 */ + "WD33C197A\0" /* 1 refs @ 45134 */ + "WD7193\0" /* 1 refs @ 45144 */ + "WD7197\0" /* 1 refs @ 45151 */ + "WD33C296A\0" /* 1 refs @ 45158 */ + "WD34C296\0" /* 1 refs @ 45168 */ + "90C\0" /* 1 refs @ 45177 */ + "W83769F\0" /* 1 refs @ 45181 */ + "W83C553F\0" /* 2 refs @ 45189 */ + "W83628F\0" /* 1 refs @ 45198 */ + "W89C840F\0" /* 1 refs @ 45206 */ + "W89C940F\0" /* 2 refs @ 45215 */ + "W6692\0" /* 1 refs @ 45224 */ + "NinjaSCSI-32UDE\0" /* 5 refs @ 45230 */ + "(KME)\0" /* 3 refs @ 45246 */ + "(IODATA)\0" /* 1 refs @ 45252 */ + "(LOGITEC)\0" /* 1 refs @ 45261 */ + "(LOGITEC2)\0" /* 1 refs @ 45271 */ + "(BUFFALO)\0" /* 2 refs @ 45282 */ + "CF32A\0" /* 2 refs @ 45292 */ + "CompactFlash\0" /* 1 refs @ 45298 */ + "CF\0" /* 1 refs @ 45311 */ + "NPATA-32\0" /* 1 refs @ 45314 */ + "Xen\0" /* 1 refs @ 45323 */ + "Volari\0" /* 5 refs @ 45327 */ + "Z7/Z9/Z9s\0" /* 1 refs @ 45334 */ + "Z9m\0" /* 1 refs @ 45344 */ + "Z11/Z11M\0" /* 1 refs @ 45348 */ + "V3XT/V5/V8\0" /* 1 refs @ 45357 */ + "XP10\0" /* 1 refs @ 45368 */ + "X3201-3\0" /* 2 refs @ 45373 */ + "(21143)\0" /* 1 refs @ 45381 */ + "WinGlobal\0" /* 1 refs @ 45389 */ + "724\0" /* 1 refs @ 45399 */ + "740C\0" /* 1 refs @ 45403 */ + "(DS-1)\0" /* 2 refs @ 45408 */ + "724F\0" /* 1 refs @ 45415 */ + "744\0" /* 1 refs @ 45420 */ + "(DS-1S)\0" /* 1 refs @ 45424 */ + "754\0" /* 1 refs @ 45432 */ + "(DS-1E)\0" /* 1 refs @ 45436 */ + "1221\0" /* 1 refs @ 45444 */ + "PCI-ST32\0" /* 1 refs @ 45449 */ + "ZX-100\0" /* 10 refs @ 45458 */ + "ZX-100/ZX-200\0" /* 6 refs @ 45465 */ + "ZX-D\0" /* 2 refs @ 45479 */ + "KX-5000|6000(G)|7000\0" /* 13 refs @ 45484 */ + "KH-40000\0" /* 15 refs @ 45505 */ + "KX-5000|6000(G)\0" /* 2 refs @ 45514 */ + "ZX-200\0" /* 4 refs @ 45530 */ + "P2C\0" /* 1 refs @ 45537 */ + "ZX-D/ZX-E/KH-40000/KX-7000\0" /* 1 refs @ 45541 */ + "ZX-E\0" /* 2 refs @ 45568 */ + "C-320\0" /* 1 refs @ 45573 */ + "C-860\0" /* 1 refs @ 45579 */ + "KX-6000\0" /* 1 refs @ 45585 */ + "C-960\0" /* 1 refs @ 45593 */ + "KX-7000\0" /* 1 refs @ 45599 */ + "C-1190\0" /* 1 refs @ 45607 */ + "StorX\0" /* 1 refs @ 45614 */ + "KX-6000(G)|7000\0" /* 1 refs @ 45620 */ + "ZR36057\0" /* 1 refs @ 45636 */ + "ZR36120\0" /* 1 refs @ 45644 */ }; -const int pci_nwords = 6205; -\ No newline at end of file +const int pci_nwords = 6279; +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/dev/pci/pcireg.h b/lib/libc/include/generic-netbsd/dev/pci/pcireg.h @@ -1,4 +1,4 @@ -/* $NetBSD: pcireg.h,v 1.168.2.1 2024/06/22 11:01:18 martin Exp $ */ +/* $NetBSD: pcireg.h,v 1.172 2024/12/31 14:00:35 skrll Exp $ */ /* * Copyright (c) 1995, 1996, 1999, 2000 @@ -50,8 +50,8 @@ */ #define PCI_ID_REG 0x00 -typedef u_int16_t pci_vendor_id_t; -typedef u_int16_t pci_product_id_t; +typedef uint16_t pci_vendor_id_t; +typedef uint16_t pci_product_id_t; #define PCI_VENDOR_SHIFT 0 #define PCI_VENDOR_MASK 0xffffU @@ -129,10 +129,10 @@ typedef u_int16_t pci_product_id_t; */ #define PCI_CLASS_REG 0x08 -typedef u_int8_t pci_class_t; -typedef u_int8_t pci_subclass_t; -typedef u_int8_t pci_interface_t; -typedef u_int8_t pci_revision_t; +typedef uint8_t pci_class_t; +typedef uint8_t pci_subclass_t; +typedef uint8_t pci_interface_t; +typedef uint8_t pci_revision_t; #define PCI_CLASS_SHIFT 24 #define PCI_CLASS_MASK 0xffU @@ -1302,10 +1302,10 @@ struct pci_msix_table_entry { */ #define PCI_INTERRUPT_REG 0x3c -typedef u_int8_t pci_intr_latency_t; -typedef u_int8_t pci_intr_grant_t; -typedef u_int8_t pci_intr_pin_t; -typedef u_int8_t pci_intr_line_t; +typedef uint8_t pci_intr_latency_t; +typedef uint8_t pci_intr_grant_t; +typedef uint8_t pci_intr_pin_t; +typedef uint8_t pci_intr_line_t; #define PCI_MAX_LAT_SHIFT 24 #define PCI_MAX_LAT_MASK 0xff @@ -1963,8 +1963,8 @@ struct pci_rom { #define PCI_EA_PROP_MEM_NONPREF 0x00 /* Memory Space, Non-Prefetchable */ #define PCI_EA_PROP_MEM_PREF 0x01 /* Memory Space, Prefetchable */ #define PCI_EA_PROP_IO 0x02 /* I/O Space */ -#define PCI_EA_PROP_VF_MEM_NONPREF 0x03 /* Resorce for VF use. Mem. Non-Pref */ -#define PCI_EA_PROP_VF_MEM_PREF 0x04 /* Resorce for VF use. Mem. Prefetch */ +#define PCI_EA_PROP_VF_MEM_NONPREF 0x03 /* Resource for VF use. Mem. Non-Pref */ +#define PCI_EA_PROP_VF_MEM_PREF 0x04 /* Resource for VF use. Mem. Prefetch */ #define PCI_EA_PROP_BB_MEM_NONPREF 0x05 /* Behind Bridge: MEM. Non-Pref */ #define PCI_EA_PROP_BB_MEM_PREF 0x06 /* Behind Bridge: MEM. Prefetch */ #define PCI_EA_PROP_BB_IO 0x07 /* Behind Bridge: I/O Space */ @@ -2116,7 +2116,7 @@ struct pci_rom { #define PCI_DPCCTL_DLACTECOR __BIT(23) /* DL_Active ERR_COR Enable */ #define PCI_DPC_STATESID 0x08 /* Status and Error Source ID Register */ -#define PCI_DPCSTAT_TSTAT __BIT(0) /* DPC Trigger Staus */ +#define PCI_DPCSTAT_TSTAT __BIT(0) /* DPC Trigger Status */ #define PCI_DPCSTAT_TREASON __BITS(2, 1) /* DPC Trigger Reason */ #define PCI_DPCSTAT_ISTAT __BIT(3) /* DPC Interrupt Status */ #define PCI_DPCSTAT_RPBUSY __BIT(4) /* DPC RP Busy */ diff --git a/lib/libc/include/generic-netbsd/dev/pckbc/pckbdreg.h b/lib/libc/include/generic-netbsd/dev/pckbc/pckbdreg.h @@ -1,4 +1,4 @@ -/* $NetBSD: pckbdreg.h,v 1.3 2013/03/06 03:26:17 christos Exp $ */ +/* $NetBSD: pckbdreg.h,v 1.4 2023/07/16 19:09:07 christos Exp $ */ /* * Keyboard definitions @@ -11,6 +11,7 @@ #define KBC_DISABLE 0xF5 /* as per KBC_SETDEFAULT, but also disable key scanning */ #define KBC_ENABLE 0xF4 /* enable key scanning */ #define KBC_TYPEMATIC 0xF3 /* set typematic rate and delay */ +#define KBC_GETID 0xF2 /* get keyboard ID */ #define KBC_SETTABLE 0xF0 /* set scancode translation table */ #define KBC_MODEIND 0xED /* set mode indicators (i.e. LEDs) */ #define KBC_ECHO 0xEE /* request an echo from the keyboard */ diff --git a/lib/libc/include/generic-netbsd/dev/pcmcia/if_rayreg.h b/lib/libc/include/generic-netbsd/dev/pcmcia/if_rayreg.h @@ -1,4 +1,4 @@ -/* $NetBSD: if_rayreg.h,v 1.12 2022/05/22 11:27:35 andvar Exp $ */ +/* $NetBSD: if_rayreg.h,v 1.13 2025/02/17 22:37:26 andvar Exp $ */ /* * Copyright (c) 2000 Christian E. Hopps * All rights reserved. @@ -451,7 +451,7 @@ struct ray_cmd_update_mcast { }; /* RAY_CMD_UPDATE_APM */ -struct ray_cmd_udpate_apm { +struct ray_cmd_update_apm { u_int8_t c_status; /* ccs generic header */ u_int8_t c_cmd; /* " */ u_int8_t c_link; /* " */ diff --git a/lib/libc/include/generic-netbsd/dev/raidframe/raidframeio.h b/lib/libc/include/generic-netbsd/dev/raidframe/raidframeio.h @@ -1,4 +1,4 @@ -/* $NetBSD: raidframeio.h,v 1.11.6.1 2024/04/28 12:09:08 martin Exp $ */ +/* $NetBSD: raidframeio.h,v 1.12 2023/09/17 20:07:39 oster Exp $ */ /*- * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc. * All rights reserved. diff --git a/lib/libc/include/generic-netbsd/dev/scsipi/scsi_disk.h b/lib/libc/include/generic-netbsd/dev/scsipi/scsi_disk.h @@ -1,4 +1,4 @@ -/* $NetBSD: scsi_disk.h,v 1.34 2021/11/10 16:17:34 msaitoh Exp $ */ +/* $NetBSD: scsi_disk.h,v 1.38 2025/02/27 17:17:00 jakllsch Exp $ */ /* * SCSI-specific interface description @@ -136,9 +136,9 @@ struct scsi_defect_descriptor_psf { }; /* - * XXX for now this isn't in the ATAPI specs, but if there are on day + * XXX for now this isn't in the ATAPI specs, but if there are one day * ATAPI hard disks, it is likely that they implement this command (or a - * command like this ? + * command like this?). */ #define SCSI_REASSIGN_BLOCKS 0x07 struct scsi_reassign_blocks { @@ -298,7 +298,7 @@ union scsi_disk_pages { u_int8_t rpm[2]; /* media rotation speed */ u_int8_t reserved2; u_int8_t reserved3; - } rigid_geometry; + } rigid_geometry; struct page_flex_geometry { u_int8_t pg_code; /* page code (should be 5) */ u_int8_t pg_length; /* page length (should be 0x1e) */ @@ -333,7 +333,7 @@ union scsi_disk_pages { u_int8_t pg_length; /* page length (should be 0x0a) */ u_int8_t flags; /* cache parameter flags */ #define CACHING_RCD 0x01 /* read cache disable */ -#define CACHING_MF 0x02 /* multiplcation factor */ +#define CACHING_MF 0x02 /* multiplication factor */ #define CACHING_WCE 0x04 /* write cache enable (write-back) */ #define CACHING_SIZE 0x08 /* use CACHE SEGMENT SIZE */ #define CACHING_DISC 0x10 /* pftch across time discontinuities */ @@ -364,13 +364,13 @@ union scsi_disk_pages { u_int8_t pg_code; /* page code (should be 0x0a) */ u_int8_t pg_length; /* page length (should be 0x0a) */ u_int8_t ctl_flags1; /* First set of flags */ -#define CTL1_TST_PER_INTR 0x40 /* Task set per initiator */ +#define CTL1_TST_PER_INTR 0x40 /* Task set per initiator */ #define CTL1_TST_FIELD 0xe0 /* Full field */ #define CTL1_D_SENSE 0x04 /* Descriptor-format sense return */ #define CTL1_GLTSD 0x02 /* Glob. Log Targ. Save Disable */ #define CTL1_RLEC 0x01 /* Rpt Logging Exception Condition */ u_int8_t ctl_flags2; /* Second set of flags */ -#define CTL2_QAM_UNRESTRICT 0x10 /* Unrestricted reordering allowed */ +#define CTL2_QAM_UNRESTRICT 0x10 /* Unrestricted reordering allowed */ #define CTL2_QAM_FIELD 0xf0 /* Full Queue alogo. modifier field */ #define CTL2_QERR_ABRT 0x02 /* Queue error - abort all */ #define CTL2_QERR_ABRT_SELF 0x06 /* Queue error - abort intr's */ @@ -394,4 +394,39 @@ union scsi_disk_pages { } control_params; }; +struct scsi_vpd_logical_block_provisioning { + struct { +/*1*/ u_int8_t device; +/*2*/ u_int8_t pagecode; +/*3*/ u_int8_t length[2]; + }; +/*4*/ u_int8_t threshold_exponent; +/*5*/ u_int8_t flags; +#define VPD_LBP_LBPU 0x80 +#define VPD_LBP_LBPWS 0x40 +#define VPD_LBP_LBPWS10 0x20 +/*6*/ u_int8_t reserved6[2]; +} __packed; + +#define UNMAP_10 0x42 +struct scsi_unmap_10 { + u_int8_t opcode; + u_int8_t byte2; + u_int8_t reserved3[4]; + u_int8_t byte7; + u_int8_t length[2]; + u_int8_t control; +} __packed; + +struct scsi_unmap_10_data { + u_int8_t unmap_data_length[2]; + u_int8_t unmap_block_descriptor_data_length[2]; + u_int8_t reserved5[4]; + struct { + u_int8_t addr[8]; + u_int8_t len[4]; + u_int8_t reserved13[4]; + } unmap_block_descriptor[1]; +} __packed; + #endif /* _DEV_SCSIPI_SCSI_DISK_H_ */ \ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/dev/scsipi/scsi_spc.h b/lib/libc/include/generic-netbsd/dev/scsipi/scsi_spc.h @@ -1,4 +1,4 @@ -/* $NetBSD: scsi_spc.h,v 1.7 2022/01/27 18:37:02 jakllsch Exp $ */ +/* $NetBSD: scsi_spc.h,v 1.8 2024/02/09 22:08:36 andvar Exp $ */ /*- * Copyright (c) 2005 The NetBSD Foundation, Inc. @@ -443,7 +443,7 @@ struct scsi_repsuppopcode { #define RSOC_ALL 0x00 /* report all */ #define RSOC_ONE 0x01 /* report one */ #define RSOC_ONESACD 0x02 /* report one or CHECK CONDITION */ -#define RSOC_ONESA 0x03 /* report one mark presense in data */ +#define RSOC_ONESA 0x03 /* report one mark presence in data */ #define RSOC_RCTD 0x80 /* report timeouts */ u_int8_t reqopcode; diff --git a/lib/libc/include/generic-netbsd/dev/scsipi/scsipi_all.h b/lib/libc/include/generic-netbsd/dev/scsipi/scsipi_all.h @@ -1,4 +1,4 @@ -/* $NetBSD: scsipi_all.h,v 1.33 2007/12/25 18:33:42 perry Exp $ */ +/* $NetBSD: scsipi_all.h,v 1.35 2025/02/10 14:42:33 jakllsch Exp $ */ /* * SCSI and SCSI-like general interface description @@ -59,7 +59,9 @@ struct scsipi_inquiry { u_int8_t opcode; u_int8_t byte2; - u_int8_t unused[2]; +#define SINQ_EVPD 0x01 + u_int8_t pagecode; + u_int8_t length_hi; /* upper byte of length */ u_int8_t length; u_int8_t control; } __packed; @@ -165,4 +167,83 @@ struct scsipi_inquiry_data { #define SCSIPI_INQUIRY_LENGTH_SCSI3 74 } __packed; /* 74 Bytes */ +/* Vital product data when SINQ_EVPD is set */ + +struct scsipi_inquiry_evpd_header { +/* 1*/ u_int8_t device; +/* 2*/ u_int8_t pagecode; +/* 3*/ u_int8_t length[2]; +}; + +#define SINQ_VPD_PAGES 0x00 +#define SINQ_VPD_UNIT_SERIAL 0x80 +#define SINQ_VPD_DEVICE_ID 0x83 +#define SINQ_VPD_SOFTWARE_ID 0x84 +#define SINQ_VPD_MN_ADDRESS 0x85 +#define SINQ_VPD_INQUIRY 0x86 +#define SINQ_VPD_MP_POLICY 0x87 +#define SINQ_VPD_PORTS 0x88 +#define SINQ_VPD_POWER_COND 0x8a +#define SINQ_VPD_CONSTITUENTS 0x8b +#define SINQ_VPD_CFA_PROFILE 0x8c +#define SINQ_VPD_CONSUMPTION 0x8d +#define SINQ_VPD_BLOCK_LIMITS 0xb0 +#define SINQ_VPD_BLOCK_CHARS 0xb1 +#define SINQ_VPD_LOGICAL_PROV 0xb2 +#define SINQ_VPD_REFERRALS 0xb3 +#define SINQ_VPD_SUPPORTED 0xb4 +#define SINQ_VPD_BLOCK_CHARSX 0xb5 +#define SINQ_VPD_BLOCK_ZONED 0xb6 +#define SINQ_VPD_BLOCK_LIMITSX 0xb7 +#define SINQ_VPD_FIRMWARE_NUM 0xc0 +#define SINQ_VPD_JUMPERS 0xc2 +#define SINQ_VPD_BEHAVIOUR 0xc3 + +#define SINQ_VPD_DATE_CODE 0xc1 +struct scsipi_inquiry_evpd_date_code { +/* 1*/ u_int8_t etf_log_date[8]; /* MMDDYYYY */ +/* 9*/ u_int8_t compile_date[8]; /* MMDDYYYY */ +/*17*/ u_int8_t spindown_count[2]; +/*19*/ u_int8_t spindown_time[6]; /* HHMMSS */ +} __packed; + +#define SINQ_VPD_SERIAL 0x80 +struct scsipi_inquiry_evpd_serial { +/* 1*/ u_int8_t serial_number[251]; +} __packed; + +#define SINQ_VPD_DEVICE_ID 0x83 +struct scsipi_inquiry_evpd_device_id { +/* 1*/ u_int8_t pc; +#define SINQ_DEVICE_ID_PROTOCOL 0xf0 +#define SINQ_DEVICE_ID_PROTOCOL_FC 0x00 +#define SINQ_DEVICE_ID_PROTOCOL_SSA 0x20 +#define SINQ_DEVICE_ID_PROTOCOL_IEEE1394 0x30 +#define SINQ_DEVICE_ID_PROTOCOL_RDMA 0x40 +#define SINQ_DEVICE_ID_PROTOCOL_ISCSI 0x50 +#define SINQ_DEVICE_ID_PROTOCOL_SAS 0x60 +#define SINQ_DEVICE_ID_CODESET 0x0f +#define SINQ_DEVICE_ID_CODESET_BINARY 0x01 +#define SINQ_DEVICE_ID_CODESET_ASCII 0x02 +#define SINQ_DEVICE_ID_CODESET_UTF8 0x03 +/* 2*/ u_int8_t flags; +#define SINQ_DEVICE_ID_PIV 0x80 +#define SINQ_DEVICE_ID_ASSOCIATION 0x30 +#define SINQ_DEVICE_ID_ASSOCIATION_DEVICE 0x00 +#define SINQ_DEVICE_ID_ASSOCIATION_PORT 0x10 +#define SINQ_DEVICE_ID_ASSOCIATION_TARGET 0x20 +#define SINQ_DEVICE_ID_TYPE 0x0f +#define SINQ_DEVICE_ID_TYPE_UNASSIGNED 0x00 +#define SINQ_DEVICE_ID_TYPE_VENDOR 0x01 +#define SINQ_DEVICE_ID_TYPE_EUI64 0x02 +#define SINQ_DEVICE_ID_TYPE_FC 0x03 +#define SINQ_DEVICE_ID_TYPE_PORTNUMBER1 0x04 +#define SINQ_DEVICE_ID_TYPE_PORTNUMBER2 0x05 +#define SINQ_DEVICE_ID_TYPE_PORTNUMBER3 0x06 +#define SINQ_DEVICE_ID_TYPE_MD5 0x07 +/* 3*/ u_int8_t reserved; +/* 4*/ u_int8_t designator_length; +/* 5*/ u_int8_t designator[1]; +} __packed; + #endif /* _DEV_SCSIPI_SCSIPI_ALL_H_ */ \ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/dev/scsipi/scsipiconf.h b/lib/libc/include/generic-netbsd/dev/scsipi/scsipiconf.h @@ -1,4 +1,4 @@ -/* $NetBSD: scsipiconf.h,v 1.130 2019/03/28 10:44:29 kardel Exp $ */ +/* $NetBSD: scsipiconf.h,v 1.133 2024/10/29 15:50:07 nat Exp $ */ /*- * Copyright (c) 1998, 1999, 2000, 2004 The NetBSD Foundation, Inc. @@ -504,6 +504,8 @@ struct scsipi_periph { #define PQUIRK_NOREPSUPPOPC 0x01000000 /* does not grok REPORT SUPPORTED OPCODES to fetch device timeouts */ +#define PQUIRK_NOREADDISCINFO 0x02000000 /* device doesn't do + READ_DISCINFO properly */ /* * Error values an adapter driver may return */ diff --git a/lib/libc/include/generic-netbsd/dev/tc/sfbreg.h b/lib/libc/include/generic-netbsd/dev/tc/sfbreg.h @@ -1,4 +1,4 @@ -/* $NetBSD: sfbreg.h,v 1.3 2000/12/19 01:25:46 perseant Exp $ */ +/* $NetBSD: sfbreg.h,v 1.4 2025/02/03 22:30:15 andvar Exp $ */ /* * Copyright (c) 1996 Carnegie-Mellon University. @@ -29,7 +29,7 @@ /* * Smart ("CXTurbo") Frame Buffer definitions, from: - * ``DEC 3000 300/400/500/600/700/800/900 AXP Models System Prgrammer's Manual'' + * ``DEC 3000 300/400/500/600/700/800/900 AXP Models System Programmer's Manual'' * (DEC order number EK-D3SYS-PM), section 6. * * All definitions are in "dense" TURBOchannel space. @@ -91,7 +91,7 @@ #define SFB_ASIC_VIDCLK 0x007c /* VIDCLK count (R/W) */ /* - * Same as above but in 32-bit units, and named like the corrseponding + * Same as above but in 32-bit units, and named like the corresponding * TGA registers, for easy comparison. */ typedef u_int32_t sfb_reg_t; diff --git a/lib/libc/include/generic-netbsd/dev/tc/sticio.h b/lib/libc/include/generic-netbsd/dev/tc/sticio.h @@ -1,4 +1,4 @@ -/* $NetBSD: sticio.h,v 1.6 2020/09/12 16:44:41 kamil Exp $ */ +/* $NetBSD: sticio.h,v 1.7 2024/02/09 22:08:36 andvar Exp $ */ /*- * Copyright (c) 1999, 2000, 2001 The NetBSD Foundation, Inc. @@ -75,7 +75,7 @@ struct stic_xcomm { #ifdef _KERNEL /* * stic_xmap: a description of the area returned by mapping the board. - * sxm_xcomm and sxm_buf are physically contigious and of variable size as a + * sxm_xcomm and sxm_buf are physically contiguous and of variable size as a * whole; the combined size is learnt from stic_xinfo::sxi_buf_size. */ struct stic_xmap { diff --git a/lib/libc/include/generic-netbsd/dev/usb/umcpmio_hid_reports.h b/lib/libc/include/generic-netbsd/dev/usb/umcpmio_hid_reports.h @@ -0,0 +1,499 @@ +/* $NetBSD: umcpmio_hid_reports.h,v 1.2 2025/03/17 18:24:08 riastradh Exp $ */ + +/* + * Copyright (c) 2024 Brad Spencer <brad@anduin.eldar.org> + * + * Permission to use, copy, modify, and distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#ifndef _UMCPMIO_HID_REPORTS_H_ +#define _UMCPMIO_HID_REPORTS_H_ + +#include <sys/types.h> + +/* + * It is nice that all HID reports want a 64 byte request and return a + * 64 byte response. + */ + +#define MCP2221_REQ_BUFFER_SIZE 64 +#define MCP2221_RES_BUFFER_SIZE 64 + +#define MCP2221_CMD_STATUS 0x10 + +#define MCP2221_CMD_I2C_FETCH_READ_DATA 0x40 + +#define MCP2221_CMD_SET_GPIO_CFG 0x50 +#define MCP2221_CMD_GET_GPIO_CFG 0x51 + +#define MCP2221_CMD_SET_SRAM 0x60 +#define MCP2221_CMD_GET_SRAM 0x61 + +#define MCP2221_I2C_WRITE_DATA 0x90 +#define MCP2221_I2C_READ_DATA 0x91 +#define MCP2221_I2C_WRITE_DATA_RS 0x92 +#define MCP2221_I2C_READ_DATA_RS 0x93 +#define MCP2221_I2C_WRITE_DATA_NS 0x94 + +#define MCP2221_CMD_GET_FLASH 0xb0 +#define MCP2221_CMD_SET_FLASH 0xb1 +#define MCP2221_CMD_SEND_FLASH_PASSWORD 0xb2 + +#define MCP2221_CMD_COMPLETE_OK 0x00 +#define MCP2221_CMD_COMPLETE_NO_SUPPORT 0x02 +#define MCP2221_CMD_COMPLETE_EPERM 0x03 + +#define MCP2221_I2C_DO_CANCEL 0x10 +#define MCP2221_INTERNAL_CLOCK 12000000 +#define MCP2221_DEFAULT_I2C_SPEED 100000 +#define MCP2221_I2C_SET_SPEED 0x20 + +/* The request and response structures are, perhaps, over literal. */ + +struct mcp2221_status_req { + uint8_t cmd; /* MCP2221_CMD_STATUS */ + uint8_t dontcare1; + uint8_t cancel_transfer; + uint8_t set_i2c_speed; + uint8_t i2c_clock_divider; + uint8_t dontcare2[59]; +}; + +#define MCP2221_I2C_SPEED_SET 0x20 +#define MCP2221_I2C_SPEED_BUSY 0x21 +#define MCP2221_ENGINE_T1_MASK_NACK 0x40 + +struct mcp2221_status_res { + uint8_t cmd; + uint8_t completion; + uint8_t cancel_transfer; + uint8_t set_i2c_speed; + uint8_t i2c_clock_divider; + uint8_t dontcare2[3]; + uint8_t internal_i2c_state; + uint8_t lsb_i2c_req_len; + uint8_t msb_i2c_req_len; + uint8_t lsb_i2c_trans_len; + uint8_t msb_i2c_trans_len; + uint8_t internal_i2c_bcount; + uint8_t i2c_speed_divider; + uint8_t i2c_timeout_value; + uint8_t lsb_i2c_address; + uint8_t msb_i2c_address; + uint8_t dontcare3a[2]; + uint8_t internal_i2c_state20; + uint8_t dontcare3b; + uint8_t scl_line_value; + uint8_t sda_line_value; + uint8_t interrupt_edge_state; + uint8_t i2c_read_pending; + uint8_t dontcare4[20]; + uint8_t mcp2221_hardware_rev_major; + uint8_t mcp2221_hardware_rev_minor; + uint8_t mcp2221_firmware_rev_major; + uint8_t mcp2221_firmware_rev_minor; + uint8_t adc_channel0_lsb; + uint8_t adc_channel0_msb; + uint8_t adc_channel1_lsb; + uint8_t adc_channel1_msb; + uint8_t adc_channel2_lsb; + uint8_t adc_channel2_msb; + uint8_t dontcare5[8]; +}; + +#define MCP2221_GPIO_CFG_ALTER 0xff + +struct mcp2221_set_gpio_cfg_req { + uint8_t cmd; /* MCP2221_CMD_SET_GPIO_CFG */ + uint8_t dontcare1; + + uint8_t alter_gp0_value; + uint8_t new_gp0_value; + uint8_t alter_gp0_dir; + uint8_t new_gp0_dir; + + uint8_t alter_gp1_value; + uint8_t new_gp1_value; + uint8_t alter_gp1_dir; + uint8_t new_gp1_dir; + + uint8_t alter_gp2_value; + uint8_t new_gp2_value; + uint8_t alter_gp2_dir; + uint8_t new_gp2_dir; + + uint8_t alter_gp3_value; + uint8_t new_gp3_value; + uint8_t alter_gp3_dir; + uint8_t new_gp3_dir; + + uint8_t reserved[46]; +}; + +struct mcp2221_set_gpio_cfg_res { + uint8_t cmd; + uint8_t completion; + + uint8_t alter_gp0_value; + uint8_t new_gp0_value; + uint8_t alter_gp0_dir; + uint8_t new_gp0_dir; + + uint8_t alter_gp1_value; + uint8_t new_gp1_value; + uint8_t alter_gp1_dir; + uint8_t new_gp1_dir; + + uint8_t alter_gp2_value; + uint8_t new_gp2_value; + uint8_t alter_gp2_dir; + uint8_t new_gp2_dir; + + uint8_t alter_gp3_value; + uint8_t new_gp3_value; + uint8_t alter_gp3_dir; + uint8_t new_gp3_dir; + + uint8_t dontcare[46]; +}; + +struct mcp2221_get_gpio_cfg_req { + uint8_t cmd; /* MCP2221_CMD_GET_GPIO_CFG */ + uint8_t dontcare[63]; +}; + +#define MCP2221_GPIO_CFG_VALUE_NOT_GPIO 0xEE +#define MCP2221_GPIO_CFG_DIR_NOT_GPIO 0xEF +#define MCP2221_GPIO_CFG_DIR_INPUT 0x01 +#define MCP2221_GPIO_CFG_DIR_OUTPUT 0x00 + +struct mcp2221_get_gpio_cfg_res { + uint8_t cmd; + uint8_t completion; + + uint8_t gp0_pin_value; + uint8_t gp0_pin_dir; + + uint8_t gp1_pin_value; + uint8_t gp1_pin_dir; + + uint8_t gp2_pin_value; + uint8_t gp2_pin_dir; + + uint8_t gp3_pin_value; + uint8_t gp3_pin_dir; + + uint8_t dontcare[54]; +}; + +#define MCP2221_SRAM_GPIO_CHANGE_DCCD 0x80 + +#define MCP2221_SRAM_GPIO_CLOCK_DC_MASK 0x18 +#define MCP2221_SRAM_GPIO_CLOCK_DC_75 0x18 +#define MCP2221_SRAM_GPIO_CLOCK_DC_50 0x10 +#define MCP2221_SRAM_GPIO_CLOCK_DC_25 0x08 +#define MCP2221_SRAM_GPIO_CLOCK_DC_0 0x00 + +#define MCP2221_SRAM_GPIO_CLOCK_CD_MASK 0x07 +#define MCP2221_SRAM_GPIO_CLOCK_CD_375KHZ 0x07 +#define MCP2221_SRAM_GPIO_CLOCK_CD_750KHZ 0x06 +#define MCP2221_SRAM_GPIO_CLOCK_CD_1P5MHZ 0x05 +#define MCP2221_SRAM_GPIO_CLOCK_CD_3MHZ 0x04 +#define MCP2221_SRAM_GPIO_CLOCK_CD_6MHZ 0x03 +#define MCP2221_SRAM_GPIO_CLOCK_CD_12MHZ 0x02 +#define MCP2221_SRAM_GPIO_CLOCK_CD_24MHZ 0x01 + +#define MCP2221_SRAM_CHANGE_DAC_VREF 0x80 +#define MCP2221_SRAM_DAC_IS_VRM 0x20 +#define MCP2221_SRAM_DAC_VRM_MASK 0xC0 +#define MCP2221_SRAM_DAC_VRM_4096V 0xC0 +#define MCP2221_SRAM_DAC_VRM_2048V 0x80 +#define MCP2221_SRAM_DAC_VRM_1024V 0x40 +#define MCP2221_SRAM_DAC_VRM_OFF 0x00 +#define MCP2221_SRAM_CHANGE_DAC_VALUE 0x80 +#define MCP2221_SRAM_DAC_VALUE_MASK 0x1F + +#define MCP2221_SRAM_CHANGE_ADC_VREF 0x80 +#define MCP2221_SRAM_ADC_IS_VRM 0x04 +#define MCP2221_SRAM_ADC_VRM_MASK 0x18 +#define MCP2221_SRAM_ADC_VRM_4096V 0x18 +#define MCP2221_SRAM_ADC_VRM_2048V 0x10 +#define MCP2221_SRAM_ADC_VRM_1024V 0x08 +#define MCP2221_SRAM_ADC_VRM_OFF 0x00 + +#define MCP2221_SRAM_ALTER_IRQ 0x80 +#define MCP2221_SRAM_ALTER_POS_EDGE 0x10 +#define MCP2221_SRAM_ENABLE_POS_EDGE 0x08 +#define MCP2221_SRAM_ALTER_NEG_EDGE 0x04 +#define MCP2221_SRAM_ENABLE_NEG_EDGE 0x02 +#define MCP2221_SRAM_CLEAR_IRQ 0x01 + +#define MCP2221_SRAM_ALTER_GPIO 0xff +#define MCP2221_SRAM_GPIO_HIGH 0x0f +#define MCP2221_SRAM_GPIO_OUTPUT_HIGH 0x10 +#define MCP2221_SRAM_GPIO_TYPE_MASK 0x08 +#define MCP2221_SRAM_GPIO_INPUT 0x08 +#define MCP2221_SRAM_PIN_TYPE_MASK 0x07 +#define MCP2221_SRAM_PIN_IS_GPIO 0x00 +#define MCP2221_SRAM_PIN_IS_DED 0x01 +#define MCP2221_SRAM_PIN_IS_ALT0 0x02 +#define MCP2221_SRAM_PIN_IS_ALT1 0x03 +#define MCP2221_SRAM_PIN_IS_ALT2 0x04 + +struct mcp2221_set_sram_req { + uint8_t cmd; /* MCP2221_CMD_SET_SRAM */ + uint8_t dontcare1; + + uint8_t clock_output_divider; + uint8_t dac_voltage_reference; + uint8_t set_dac_output_value; + uint8_t adc_voltage_reference; + uint8_t irq_config; + + uint8_t alter_gpio_config; + uint8_t gp0_settings; + uint8_t gp1_settings; + uint8_t gp2_settings; + uint8_t gp3_settings; + + uint8_t reserved[52]; +}; + +struct mcp2221_set_sram_res { + uint8_t cmd; + uint8_t completion; + uint8_t dontcare[62]; +}; + +struct mcp2221_get_sram_req { + uint8_t cmd; /* MCP2221_CMD_GET_SRAM */ + uint8_t dontcare[63]; +}; + +struct mcp2221_get_sram_res { + uint8_t cmd; + uint8_t completion; + + uint8_t len_chip_setting; + uint8_t len_gpio_setting; + + uint8_t sn_initial_ps_cs; + uint8_t clock_divider; + uint8_t dac_reference_voltage; + uint8_t irq_adc_reference_voltage; + + uint8_t lsb_usb_vid; + uint8_t msb_usb_vid; + uint8_t lsb_usb_pid; + uint8_t msb_usb_pid; + + uint8_t usb_power_attributes; + uint8_t usb_requested_ma; + + uint8_t current_password_byte_1; + uint8_t current_password_byte_2; + uint8_t current_password_byte_3; + uint8_t current_password_byte_4; + uint8_t current_password_byte_5; + uint8_t current_password_byte_6; + uint8_t current_password_byte_7; + uint8_t current_password_byte_8; + + uint8_t gp0_settings; + uint8_t gp1_settings; + uint8_t gp2_settings; + uint8_t gp3_settings; + + uint8_t dontcare[38]; +}; + +#define MCP2221_I2C_ENGINE_BUSY 0x01 +#define MCP2221_ENGINE_STARTTIMEOUT 0x12 +#define MCP2221_ENGINE_REPSTARTTIMEOUT 0x17 +#define MCP2221_ENGINE_STOPTIMEOUT 0x62 +#define MCP2221_ENGINE_ADDRSEND 0x21 +#define MCP2221_ENGINE_ADDRTIMEOUT 0x23 +#define MCP2221_ENGINE_PARTIALDATA 0x41 +#define MCP2221_ENGINE_READMORE 0x43 +#define MCP2221_ENGINE_WRITETIMEOUT 0x44 +#define MCP2221_ENGINE_READTIMEOUT 0x52 +#define MCP2221_ENGINE_READPARTIAL 0x54 +#define MCP2221_ENGINE_READCOMPLETE 0x55 +#define MCP2221_ENGINE_ADDRNACK 0x25 +#define MCP2221_ENGINE_WRITINGNOSTOP 0x45 + +struct mcp2221_i2c_req { + uint8_t cmd; /* MCP2221_I2C_WRITE_DATA + * MCP2221_I2C_READ_DATA + * MCP2221_I2C_WRITE_DATA_RS + * MCP2221_I2C_READ_DATA_RS + * MCP2221_I2C_WRITE_DATA_NS + */ + uint8_t lsblen; + uint8_t msblen; + uint8_t slaveaddr; + uint8_t data[60]; +}; + +struct mcp2221_i2c_res { + uint8_t cmd; + uint8_t completion; + uint8_t internal_i2c_state; + uint8_t dontcare[61]; +}; + +#define MCP2221_FETCH_READ_PARTIALDATA 0x41 +#define MCP2221_FETCH_READERROR 0x7F + +struct mcp2221_i2c_fetch_req { + uint8_t cmd; /* MCP2221_CMD_I2C_FETCH_READ_DATA */ + uint8_t dontcare[63]; +}; + +struct mcp2221_i2c_fetch_res { + uint8_t cmd; + uint8_t completion; + uint8_t internal_i2c_state; + uint8_t fetchlen; + uint8_t data[60]; +}; + +#define MCP2221_FLASH_SUBCODE_CS 0x00 +#define MCP2221_FLASH_SUBCODE_GP 0x01 +#define MCP2221_FLASH_SUBCODE_USBMAN 0x02 +#define MCP2221_FLASH_SUBCODE_USBPROD 0x03 +#define MCP2221_FLASH_SUBCODE_USBSN 0x04 +#define MCP2221_FLASH_SUBCODE_CHIPSN 0x05 + +struct mcp2221_get_flash_req { + uint8_t cmd; /* MCP2221_CMD_GET_FLASH */ + uint8_t subcode; + uint8_t reserved[62]; +}; + +struct mcp2221_get_flash_res { + uint8_t cmd; + uint8_t completion; + uint8_t res_len; + union { + struct { + uint8_t dontcare; + uint8_t uartenum_led_protection; + uint8_t clock_divider; + uint8_t dac_reference_voltage; + uint8_t irq_adc_reference_voltage; + uint8_t lsb_usb_vid; + uint8_t msb_usb_vid; + uint8_t lsb_usb_pid; + uint8_t msb_usb_pid; + uint8_t usb_power_attributes; + uint8_t usb_requested_ma; + uint8_t dontcare2[50]; + } cs; + struct { + uint8_t dontcare; + uint8_t gp0_settings; + uint8_t gp1_settings; + uint8_t gp2_settings; + uint8_t gp3_settings; + uint8_t dontcare2[56]; + } gp; + struct { + uint8_t always0x03; + uint8_t unicode_man_descriptor[60]; + } usbman; + struct { + uint8_t always0x03; + uint8_t unicode_product_descriptor[60]; + } usbprod; + struct usbsn { + uint8_t always0x03; + uint8_t unicode_serial_number[60]; + } usbsn; + struct { + uint8_t dontcare; + uint8_t factory_serial_number[60]; + } chipsn; + } u; +}; + +#define MCP2221_FLASH_GPIO_HIGH 0x0f +#define MCP2221_FLASH_GPIO_VALUE_MASK 0x10 +#define MCP2221_FLASH_GPIO_TYPE_MASK 0x08 +#define MCP2221_FLASH_GPIO_INPUT 0x08 +#define MCP2221_FLASH_PIN_TYPE_MASK 0x07 +#define MCP2221_FLASH_PIN_IS_GPIO 0x00 +#define MCP2221_FLASH_PIN_IS_DED 0x01 +#define MCP2221_FLASH_PIN_IS_ALT0 0x02 +#define MCP2221_FLASH_PIN_IS_ALT1 0x03 +#define MCP2221_FLASH_PIN_IS_ALT2 0x04 + +struct mcp2221_put_flash_req { + uint8_t cmd; /* MCP2221_CMD_SET_FLASH */ + uint8_t subcode; + union { + struct { + uint8_t uartenum_led_protection; + uint8_t clock_divider; + uint8_t dac_reference_voltage; + uint8_t irq_adc_reference_voltage; + uint8_t lsb_usb_vid; + uint8_t msb_usb_vid; + uint8_t lsb_usb_pid; + uint8_t msb_usb_pid; + uint8_t usb_power_attributes; + uint8_t usb_requested_ma; + uint8_t password_byte_1; + uint8_t password_byte_2; + uint8_t password_byte_3; + uint8_t password_byte_4; + uint8_t password_byte_5; + uint8_t password_byte_6; + uint8_t password_byte_7; + uint8_t password_byte_8; + uint8_t dontcare[44]; + } cs; + struct { + uint8_t gp0_settings; + uint8_t gp1_settings; + uint8_t gp2_settings; + uint8_t gp3_settings; + uint8_t dontcare[58]; + } gp; + struct { + uint8_t len; + uint8_t always0x03; + uint8_t unicode_man_descriptor[60]; + } usbman; + struct { + uint8_t len; + uint8_t always0x03; + uint8_t unicode_product_descriptor[60]; + } usbprod; + struct { + uint8_t len; + uint8_t always0x03; + uint8_t unicode_serial_number[60]; + } usbsn; + } u; +}; + +struct mcp2221_put_flash_res { + uint8_t cmd; + uint8_t completion; + uint8_t dontcare[62]; +}; + +/* XXX - missing is the submit password call to unlock the chip */ + +#endif /* _UMCPMIO_HID_REPORTS_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/dev/usb/umcpmio_io.h b/lib/libc/include/generic-netbsd/dev/usb/umcpmio_io.h @@ -0,0 +1,45 @@ +/* $NetBSD: umcpmio_io.h,v 1.2 2025/03/17 18:24:08 riastradh Exp $ */ + +/* + * Copyright (c) 2024 Brad Spencer <brad@anduin.eldar.org> + * + * Permission to use, copy, modify, and distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#ifndef _UMCPMIO_IO_H_ +#define _UMCPMIO_IO_H_ + +#include <sys/types.h> + +#include <sys/ioccom.h> + +#include <dev/usb/umcpmio_hid_reports.h> + +struct umcpmio_ioctl_get_flash { + uint8_t subcode; + struct mcp2221_get_flash_res get_flash_res; +}; + +struct umcpmio_ioctl_put_flash { + uint8_t subcode; + struct mcp2221_put_flash_req put_flash_req; + struct mcp2221_put_flash_res put_flash_res; +}; + +#define UMCPMIO_GET_STATUS _IOR('m', 1, struct mcp2221_status_res) +#define UMCPMIO_GET_SRAM _IOR('m', 2, struct mcp2221_get_sram_res) +#define UMCPMIO_GET_GP_CFG _IOR('m', 3, struct mcp2221_get_gpio_cfg_res) +#define UMCPMIO_GET_FLASH _IOWR('m', 4, struct umcpmio_ioctl_get_flash) +#define UMCPMIO_PUT_FLASH _IOWR('m', 5, struct umcpmio_ioctl_put_flash) + +#endif /* _UMCPMIO_IO_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/dev/usb/usb.h b/lib/libc/include/generic-netbsd/dev/usb/usb.h @@ -1,4 +1,4 @@ -/* $NetBSD: usb.h,v 1.121.4.1 2024/02/03 11:47:07 martin Exp $ */ +/* $NetBSD: usb.h,v 1.124.4.1 2026/02/02 19:58:44 martin Exp $ */ /* * Copyright (c) 1998 The NetBSD Foundation, Inc. @@ -746,6 +746,38 @@ typedef struct { #define UIPROTO_BLUETOOTH 0x01 #define UIPROTO_RNDIS 0x03 +#define UICLASS_MISC 0xef +#define UISUBCLASS_MISC_SYNC 0x01 +#define UIPROTO_MISC_SYNC_ACTIVE 0x01 +#define UIPROTO_MISC_SYNC_PALM 0x02 +#define UISUBCLASS_MISC_INTERFACE 0x02 +#define UIPROTO_MISC_INTERFACE_ASSOC 0x01 +#define UIPROTO_MISC_INTERFACE_WAMP 0x02 +#define UISUBCLASS_MISC_CABLE 0x03 +#define UIPROTO_MISC_CABLE_ASSOC 0x01 +#define UISUBCLASS_MISC_RNDIS 0x04 +#define UIPROTO_MISC_RNDIS_ETHERNET 0x01 +#define UIPROTO_MISC_RNDIS_WIFI 0x02 +#define UIPROTO_MISC_RNDIS_WIMAX 0x03 +#define UIPROTO_MISC_RNDIS_WWAN 0x04 +#define UIPROTO_MISC_RNDIS_RAW_IPV4 0x05 +#define UIPROTO_MISC_RNDIS_RAW_IPV6 0x06 +#define UIPROTO_MISC_RNDIS_GPRS 0x07 +#define UISUBCLASS_MISC_VISION 0x05 +#define UIPROTO_MISC_VISION_CONTROL 0x01 +#define UIPROTO_MISC_VISION_EVENT 0x02 +#define UIPROTO_MISC_VISION_STREAMING 0x03 +#define UISUBCLASS_MISC_STEP 0x06 +#define UIPROTO_MISC_STEP 0x01 +#define UIPROTO_MISC_STEP_RAW 0x02 +#define UISUBCLASS_MISC_DVB 0x07 +#define UIPROTO_MISC_DVB_CMD 0x01 +#define UIPROTO_MISC_DVB_MEDIA 0x02 +#define UISUBCLASS_MISC_OCP_SECFIRMWARE 0x08 +#define UIPROTO_MISC_MISC_OCP_SECFIRMWARE_RECOVERY 0x01 +#define UISUBCLASS_MISC_OCP_OMBF 0x09 +#define UIPROTO_MISC_MISC_OCP_OMBF_ICP 0x01 + #define UICLASS_APPL_SPEC 0xfe #define UISUBCLASS_FIRMWARE_DOWNLOAD 1 #define UISUBCLASS_IRDA 2 @@ -913,7 +945,7 @@ struct usb_device_info { }; /* <=3.0 had this layout of the structure */ -struct usb_device_info_old { +struct usb_device_info30 { uint8_t udi_bus; uint8_t udi_addr; /* device address */ usb_event_cookie_t udi_cookie; @@ -973,14 +1005,14 @@ struct usb_event { }; /* old <=3.0 compat event */ -struct usb_event_old { +struct usb_event30 { int ue_type; struct timespec ue_time; union { struct { int ue_bus; } ue_ctrlr; - struct usb_device_info_old ue_device; + struct usb_device_info30 ue_device; struct { usb_event_cookie_t ue_cookie; char ue_devname[16]; @@ -988,13 +1020,19 @@ struct usb_event_old { } u; }; +#if 1 /* XXX: remove me, for the benefit of sanitizers */ +#define usb_device_info_old usb_device_info30 +#define usb_event_old usb_event30 +#define USB_DEVICEINFO_OLD USB_DEVICEINFO_30 +#define USB_GET_DEVICEINFO_OLD USB_GET_DEVICEINFO_30 +#endif /* USB controller */ #define USB_REQUEST _IOWR('U', 1, struct usb_ctl_request) #define USB_SETDEBUG _IOW ('U', 2, int) #define USB_DISCOVER _IO ('U', 3) #define USB_DEVICEINFO _IOWR('U', 4, struct usb_device_info) -#define USB_DEVICEINFO_OLD _IOWR('U', 4, struct usb_device_info_old) +#define USB_DEVICEINFO_30 _IOWR('U', 4, struct usb_device_info30) #define USB_DEVICESTATS _IOR ('U', 5, struct usb_device_stats) /* Generic HID device */ @@ -1018,7 +1056,7 @@ struct usb_event_old { #define USB_GET_STRING_DESC _IOWR('U', 110, struct usb_string_desc) #define USB_DO_REQUEST _IOWR('U', 111, struct usb_ctl_request) #define USB_GET_DEVICEINFO _IOR ('U', 112, struct usb_device_info) -#define USB_GET_DEVICEINFO_OLD _IOR ('U', 112, struct usb_device_info_old) +#define USB_GET_DEVICEINFO_30 _IOR ('U', 112, struct usb_device_info30) #define USB_SET_SHORT_XFER _IOW ('U', 113, int) #define USB_SET_TIMEOUT _IOW ('U', 114, int) #define USB_SET_BULK_RA _IOW ('U', 115, int) diff --git a/lib/libc/include/generic-netbsd/dev/vndvar.h b/lib/libc/include/generic-netbsd/dev/vndvar.h @@ -1,4 +1,4 @@ -/* $NetBSD: vndvar.h,v 1.38 2018/10/07 11:51:26 mlelstv Exp $ */ +/* $NetBSD: vndvar.h,v 1.39 2025/02/13 01:33:21 gutteridge Exp $ */ /*- * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc. @@ -169,7 +169,7 @@ struct vnd_user { /* * Before you can use a unit, it must be configured with VNDIOCSET. * The configuration persists across opens and closes of the device; - * an VNDIOCCLR must be used to reset a configuration. An attempt to + * a VNDIOCCLR must be used to reset a configuration. An attempt to * VNDIOCSET an already active unit will return EBUSY. */ #define VNDIOCSET _IOWR('F', 0, struct vnd_ioctl) /* enable disk */ diff --git a/lib/libc/include/generic-netbsd/dev/wscons/wsconsio.h b/lib/libc/include/generic-netbsd/dev/wscons/wsconsio.h @@ -1,4 +1,4 @@ -/* $NetBSD: wsconsio.h,v 1.126.4.1 2024/02/03 11:47:06 martin Exp $ */ +/* $NetBSD: wsconsio.h,v 1.130 2025/07/26 14:18:14 martin Exp $ */ /* * Copyright (c) 1996, 1997 Christopher G. Demetriou. All rights reserved. @@ -367,6 +367,8 @@ struct wsmouse_parameters { #define WSDISPLAY_TYPE_PLFB 65 /* ARM PrimeCell PL11x */ #define WSDISPLAY_TYPE_SSDFB 66 /* ssdfb(4) */ #define WSDISPLAY_TYPE_HOLLYWOOD 67 /* Nintendo Wii "Hollywood" SoC */ +#define WSDISPLAY_TYPE_VC6 68 /* Broadcom VideoCore 6 */ +#define WSDISPLAY_TYPE_VIOGPU 69 /* VirtIO GPU */ /* Basic display information. Not applicable to all display types. */ struct wsdisplay_fbinfo { @@ -729,4 +731,20 @@ struct wsdisplayio_fontinfo { #define WSDISPLAYIO_LISTFONTS _IOWR('W', 107, struct wsdisplayio_fontinfo) +struct wsdisplay_getfont { + char *gf_name; + uint32_t gf_size; + uint32_t gf_actual; +}; + +/* + * return currently active font + * + * gf_name points to a buffer of gf_size bytes, the result may be truncated + * and NUL-terminated. + * gf_actual is set to the size of full name. + */ + +#define WSDISPLAYIO_GFONT _IOWR('W', 108, struct wsdisplay_getfont) + #endif /* _DEV_WSCONS_WSCONSIO_H_ */ \ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/dev/wscons/wsksymdef.h b/lib/libc/include/generic-netbsd/dev/wscons/wsksymdef.h @@ -1,4 +1,4 @@ -/* $NetBSD: wsksymdef.h,v 1.77 2021/09/22 17:37:32 nia Exp $ */ +/* $NetBSD: wsksymdef.h,v 1.78 2023/12/11 13:38:13 mlelstv Exp $ */ /*- * Copyright (c) 1997 The NetBSD Foundation, Inc. @@ -687,7 +687,7 @@ action(KB_UA, 0, 0x1200, "ua", , "Ukrainian") /* Define all the KB_xx numeric values using above table */ #define KBF_ENUM(tag, tagf, value, cc, ccf, country) tag=value, -enum { KB_ENC_FUN(KBF_ENUM) KB_NEXT=0x1d00 }; +enum { KB_ENC_FUN(KBF_ENUM) KB_NEXT=0x2200 }; /* Define list of KB_xxx and country codes for array initialisation */ #define KBF_ENCTAB(tag, tagf, value, cc, ccf, country) { tag, cc }, diff --git a/lib/libc/include/generic-netbsd/dirent.h b/lib/libc/include/generic-netbsd/dirent.h @@ -1,4 +1,4 @@ -/* $NetBSD: dirent.h,v 1.37.2.1 2022/12/28 18:00:15 martin Exp $ */ +/* $NetBSD: dirent.h,v 1.38 2022/12/28 11:51:21 nia Exp $ */ /*- * Copyright (c) 1989, 1993 diff --git a/lib/libc/include/generic-netbsd/dlfcn.h b/lib/libc/include/generic-netbsd/dlfcn.h @@ -1,4 +1,4 @@ -/* $NetBSD: dlfcn.h,v 1.25 2017/07/11 15:21:35 joerg Exp $ */ +/* $NetBSD: dlfcn.h,v 1.26 2024/11/02 20:53:58 nia Exp $ */ /*- * Copyright (c) 1998 The NetBSD Foundation, Inc. @@ -59,8 +59,10 @@ void *_dlauxinfo(void) __pure; void *dlopen(const char *, int); int dlclose(void *); void *dlsym(void * __restrict, const char * __restrict); -#if defined(_NETBSD_SOURCE) +#if (_POSIX_C_SOURCE - 0 >= 202405L) || defined(_NETBSD_SOURCE) int dladdr(const void * __restrict, Dl_info * __restrict); +#endif +#if defined(_NETBSD_SOURCE) int dlctl(void *, int, void *); int dlinfo(void *, int, void *); void *dlvsym(void * __restrict, const char * __restrict, diff --git a/lib/libc/include/generic-netbsd/elf.h b/lib/libc/include/generic-netbsd/elf.h @@ -1,4 +1,4 @@ -/* $NetBSD: exec_elf.h,v 1.170 2022/06/08 10:12:42 rin Exp $ */ +/* $NetBSD: exec_elf.h,v 1.177 2025/05/27 14:03:08 christos Exp $ */ /*- * Copyright (c) 1994 The NetBSD Foundation, Inc. @@ -216,7 +216,7 @@ typedef struct { #define EM_68K 4 /* Motorola 68000 */ #define EM_88K 5 /* Motorola 88000 */ #define EM_486 6 /* Intel 80486 [old] */ -#define EM_IAMCU 6 /* Intel MCU. */ +#define EM_IAMCU EM_486 /* Intel MCU. */ #define EM_860 7 /* Intel 80860 */ #define EM_MIPS 8 /* MIPS I Architecture */ #define EM_S370 9 /* Amdahl UTS on System/370 */ @@ -292,6 +292,7 @@ typedef struct { #define EM_OR1K 92 /* OpenRISC 32-bit embedded processor */ #define EM_OPENRISC EM_OR1K #define EM_ARC_A5 93 /* ARC Cores Tangent-A5 */ +#define EM_ARC_COMPACT EM_ARC_A5 /* ARC International ARCompact processor (old spelling/synonym: EM_ARC_A5) */ #define EM_XTENSA 94 /* Tensilica Xtensa Architecture */ #define EM_VIDEOCORE 95 /* Alphamosaic VideoCore processor */ #define EM_TMM_GPP 96 /* Thompson Multimedia General Purpose Processor */ @@ -301,7 +302,7 @@ typedef struct { #define EM_ST200 100 /* STMicroelectronics ST200 microcontroller */ #define EM_IP2K 101 /* Ubicom IP2xxx microcontroller family */ #define EM_MAX 102 /* MAX processor */ -#define EM_CR 103 /* National Semiconductor CompactRISC micorprocessor */ +#define EM_CR 103 /* National Semiconductor CompactRISC microprocessor */ #define EM_F2MC16 104 /* Fujitsu F2MC16 */ #define EM_MSP430 105 /* Texas Instruments MSP430 */ #define EM_BLACKFIN 106 /* Analog Devices Blackfin DSP */ @@ -362,6 +363,7 @@ typedef struct { #define EM_AARCH64 183 /* AArch64 64-bit ARM microprocessor */ /* 184 - Reserved */ #define EM_AVR32 185 /* Atmel Corporation 32-bit microprocessor family*/ +#define EM_STM8 186 /* STMicroelectronics STM8 8-bit microcontroller */ #define EM_TILE64 187 /* Tilera TILE64 multicore architecture family */ #define EM_TILEPRO 188 /* Tilera TILEPro multicore architecture family */ #define EM_MICROBLAZE 189 /* Xilinx MicroBlaze 32-bit RISC soft processor core */ @@ -515,7 +517,8 @@ typedef struct { #define SHT_PREINIT_ARRAY 16 /* Pre-initialization function ptrs */ #define SHT_GROUP 17 /* Section group */ #define SHT_SYMTAB_SHNDX 18 /* Section indexes (see SHN_XINDEX) */ -#define SHT_NUM 19 +#define SHT_RELR 19 /* Relative relocation information */ +#define SHT_NUM 20 #define SHT_LOOS 0x60000000 /* Operating system specific range */ #define SHT_GNU_INCREMENTAL_INPUTS 0x6fff4700 /* GNU incremental build data */ @@ -540,9 +543,9 @@ typedef struct { #define SHT_LOPROC 0x70000000 /* Processor-specific range */ #define SHT_AMD64_UNWIND 0x70000001 /* unwind information */ #define SHT_ARM_EXIDX 0x70000001 /* exception index table */ -#define SHT_ARM_PREEMPTMAP 0x70000002 /* BPABI DLL dynamic linking +#define SHT_ARM_PREEMPTMAP 0x70000002 /* BPABI DLL dynamic linking * pre-emption map */ -#define SHT_ARM_ATTRIBUTES 0x70000003 /* Object file compatibility +#define SHT_ARM_ATTRIBUTES 0x70000003 /* Object file compatibility * attributes */ #define SHT_ARM_DEBUGOVERLAY 0x70000004 /* See DBGOVL for details */ #define SHT_ARM_OVERLAYSECTION 0x70000005 @@ -575,7 +578,7 @@ typedef struct { */ typedef struct { Elf32_Word st_name; /* Symbol name (.strtab index) */ - Elf32_Word st_value; /* value of symbol */ + Elf32_Addr st_value; /* value of symbol */ Elf32_Word st_size; /* size of symbol */ Elf_Byte st_info; /* type / binding attrs */ Elf_Byte st_other; /* unused */ @@ -679,6 +682,9 @@ typedef struct { #define ELF32_R_TYPE(info) ((info) & 0xff) #define ELF32_R_INFO(sym, type) (((sym) << 8) + (unsigned char)(type)) +/* Relative relocations (DT_RELR, SHT_RELR, .relr.dyn) */ +typedef Elf32_Word Elf32_Relr; + typedef struct { Elf64_Addr r_offset; /* where to do it */ Elf64_Xword r_info; /* index & type of relocation */ @@ -695,6 +701,9 @@ typedef struct { #define ELF64_R_TYPE(info) ((info) & 0xffffffff) #define ELF64_R_INFO(sym,type) (((sym) << 32) + (type)) +/* Relative relocations (DT_RELR, SHT_RELR, .relr.dyn) */ +typedef Elf64_Xword Elf64_Relr; + /* * Move entries */ @@ -792,10 +801,14 @@ typedef struct { #define DT_FINI_ARRAYSZ 28 /* Size, in bytes, of DT_FINI_ARRAY array*/ #define DT_RUNPATH 29 /* overrides DT_RPATH */ #define DT_FLAGS 30 /* Encodes ORIGIN, SYMBOLIC, TEXTREL, BIND_NOW, STATIC_TLS */ -#define DT_ENCODING 31 /* ??? */ +#define DT_ENCODING 32 /* In [32, DT_LOOS), only evens use d_ptr */ #define DT_PREINIT_ARRAY 32 /* Address of pre-init function array */ #define DT_PREINIT_ARRAYSZ 33 /* Size, in bytes, of DT_PREINIT_ARRAY array */ -#define DT_NUM 34 +#define DT_SYMTAB_SHNDX 34 /* Addr. of SHT_SYMTAB_SHNDX § of DT_SYMTAB */ +#define DT_RELRSZ 35 /* Size, in bytes, of DT_RELR table */ +#define DT_RELR 36 /* Address of Relr relocation table */ +#define DT_RELRENT 37 /* Size, in bytes, of one DT_RELR entry */ +#define DT_NUM 38 #define DT_LOOS 0x60000000 /* Operating system specific range */ #define DT_GNU_HASH 0x6ffffef5 /* GNU-style hash table */ @@ -972,7 +985,7 @@ typedef struct { * GNU-specific note type: Build ID generated by ld * name: GNU\0 * desc: - * word[0..4] SHA1 [default] + * word[0..4] SHA1 [default] * or * word[0..3] md5 or uuid * descsz: 16 or 20 @@ -999,7 +1012,7 @@ typedef struct { /* SuSE-specific note type: version * name: SuSE\0\0\0\0 * namesz: 8 - * desc: + * desc: * word[0] = VVTTMMmm * * V = version of following data @@ -1018,7 +1031,7 @@ typedef struct { /* Go-specific note type: buildid * name: Go\0\0 * namesz: 4 - * desc: + * desc: * words[10] * descsz: 40 */ @@ -1043,7 +1056,7 @@ typedef struct { /* NetBSD-specific note type: NetBSD ABI version. * name: NetBSD\0\0 * namesz: 8 - * desc: + * desc: * word[0]: MMmmrrpp00 * * M = major version @@ -1064,7 +1077,7 @@ typedef struct { * namesz: 8 * desc: * "netbsd\0" - * + * * descsz: 8 */ #define ELF_NOTE_TYPE_NETBSD_EMUL_TAG 2 @@ -1179,7 +1192,6 @@ struct netbsd_elfcore_procinfo { /* NetBSD-specific note name */ #define ELF_NOTE_MCMODEL_NAME ELF_NOTE_NETBSD_NAME - #if !defined(ELFSIZE) # if defined(_RUMPKERNEL) || !defined(_KERNEL) # define ELFSIZE ARCH_ELFSIZE @@ -1204,6 +1216,7 @@ struct netbsd_elfcore_procinfo { #define Elf_Sym Elf32_Sym #define Elf_Rel Elf32_Rel #define Elf_Rela Elf32_Rela +#define Elf_Relr Elf32_Relr #define Elf_Dyn Elf32_Dyn #define Elf_Word Elf32_Word #define Elf_Sword Elf32_Sword @@ -1230,6 +1243,7 @@ struct netbsd_elfcore_procinfo { #define Elf_Sym Elf64_Sym #define Elf_Rel Elf64_Rel #define Elf_Rela Elf64_Rela +#define Elf_Relr Elf64_Relr #define Elf_Dyn Elf64_Dyn #define Elf_Word Elf64_Word #define Elf_Sword Elf64_Sword @@ -1299,7 +1313,7 @@ typedef struct { #define SYMINFO_NUM 2 /* - * These constants are used for Elf32_Verdef struct's version number. + * These constants are used for Elf32_Verdef struct's version number. */ #define VER_DEF_NONE 0 #define VER_DEF_CURRENT 1 @@ -1310,7 +1324,7 @@ typedef struct { #define VER_DEF_IDX(x) VER_NDX(x) /* - * These constants are used for Elf32_Verdef struct's vd_flags. + * These constants are used for Elf32_Verdef struct's vd_flags. */ #define VER_FLG_BASE 0x1 #define VER_FLG_WEAK 0x2 @@ -1323,7 +1337,7 @@ typedef struct { #define VER_NDX_GIVEN 2 /* - * These constants are used for Elf32_Verneed struct's version number. + * These constants are used for Elf32_Verneed struct's version number. */ #define VER_NEED_NONE 0 #define VER_NEED_CURRENT 1 @@ -1460,7 +1474,6 @@ int coredump_elf32(struct lwp *, struct coredump_iostate *); void coredump_savenote_elf32(struct note_state *, unsigned int, const char *, void *, size_t); - #ifdef EXEC_ELF64 int exec_elf64_makecmds(struct lwp *, struct exec_package *); int elf64_populate_auxv(struct lwp *, struct exec_package *, char **); @@ -1475,7 +1488,6 @@ int coredump_elf64(struct lwp *, struct coredump_iostate *); void coredump_savenote_elf64(struct note_state *, unsigned int, const char *, void *, size_t); - #endif /* _KERNEL */ #endif /* !_SYS_EXEC_ELF_H_ */ \ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/elfdefinitions.h b/lib/libc/include/generic-netbsd/elfdefinitions.h @@ -1,4 +1,4 @@ -/* $NetBSD: elfdefinitions.h,v 1.7 2021/04/29 17:38:08 jkoshy Exp $ */ +/* $NetBSD: elfdefinitions.h,v 1.8 2024/03/03 17:37:29 christos Exp $ */ /*- * Copyright (c) 2010,2021 Joseph Koshy diff --git a/lib/libc/include/generic-netbsd/evbarm/intr.h b/lib/libc/include/generic-netbsd/evbarm/intr.h @@ -1,4 +1,4 @@ -/* $NetBSD: intr.h,v 1.28.20.1 2023/08/09 17:42:02 martin Exp $ */ +/* $NetBSD: intr.h,v 1.29 2023/07/11 10:42:07 riastradh Exp $ */ /* * Copyright (c) 2001, 2003 Wasabi Systems, Inc. diff --git a/lib/libc/include/generic-netbsd/evbmips/lwp_private.h b/lib/libc/include/generic-netbsd/evbmips/lwp_private.h @@ -0,0 +1,3 @@ +/* $NetBSD: lwp_private.h,v 1.1 2024/11/30 01:04:08 christos Exp $ */ + +#include <mips/lwp_private.h> +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/execinfo.h b/lib/libc/include/generic-netbsd/execinfo.h @@ -1,4 +1,4 @@ -/* $NetBSD: execinfo.h,v 1.3 2017/06/30 21:39:43 christos Exp $ */ +/* $NetBSD: execinfo.h,v 1.5 2025/01/23 12:08:12 christos Exp $ */ /*- * Copyright (c) 2012 The NetBSD Foundation, Inc. @@ -34,13 +34,15 @@ #include <sys/cdefs.h> #include <sys/featuretest.h> #include <sys/ansi.h> - + #ifdef _BSD_SIZE_T_ typedef _BSD_SIZE_T_ size_t; #undef _BSD_SIZE_T_ #endif __BEGIN_DECLS +int backtrace_sandbox_init(void); +void backtrace_sandbox_fini(void); size_t backtrace(void **, size_t); char **backtrace_symbols(void *const *, size_t); int backtrace_symbols_fd(void *const *, size_t, int); diff --git a/lib/libc/include/generic-netbsd/fcntl.h b/lib/libc/include/generic-netbsd/fcntl.h @@ -1,4 +1,4 @@ -/* $NetBSD: fcntl.h,v 1.54 2020/03/30 20:17:42 kamil Exp $ */ +/* $NetBSD: fcntl.h,v 1.57 2025/07/25 23:24:46 kre Exp $ */ /*- * Copyright (c) 1983, 1990, 1993 @@ -123,6 +123,10 @@ #define O_REGULAR 0x02000000 /* fail if not a regular file */ #define O_EXEC 0x04000000 /* open for executing only */ #endif +#if (_POSIX_C_SOURCE - 0) >= 202405L || (_XOPEN_SOURCE - 0 >= 800) || \ + defined(_NETBSD_SOURCE) +#define O_CLOFORK 0x08000000 /* set close on fork */ +#endif #ifdef _KERNEL /* convert from open() flags to/from fflags; convert O_RD/WR to FREAD/FWRITE */ @@ -133,7 +137,8 @@ #define O_MASK (O_ACCMODE|O_NONBLOCK|O_APPEND|O_SHLOCK|O_EXLOCK|\ O_ASYNC|O_SYNC|O_CREAT|O_TRUNC|O_EXCL|O_DSYNC|\ O_RSYNC|O_NOCTTY|O_ALT_IO|O_NOFOLLOW|O_DIRECT|\ - O_DIRECTORY|O_CLOEXEC|O_NOSIGPIPE|O_REGULAR|O_EXEC) + O_DIRECTORY|O_CLOEXEC|O_CLOFORK|O_NOSIGPIPE|\ + O_REGULAR|O_EXEC) #define FEXEC O_EXEC #define FMARK 0x00001000 /* mark during gc() */ @@ -200,10 +205,20 @@ #define F_GETNOSIGPIPE 13 /* get SIGPIPE disposition */ #define F_SETNOSIGPIPE 14 /* set SIGPIPE disposition */ #define F_GETPATH 15 /* get pathname associated with fd */ +#define F_ADD_SEALS 16 /* set seals */ +#define F_GET_SEALS 17 /* get seals */ +#endif +#if (_POSIX_C_SOURCE - 0) >= 202405L || (_XOPEN_SOURCE - 0 >= 800) || \ + defined(_NETBSD_SOURCE) +#define F_DUPFD_CLOFORK 18 /* close on fork duplicated fd */ +#endif +#if defined(_NETBSD_SOURCE) +#define F_DUPFD_CLOBOTH 19 /* close on exec/fork duplicated fd */ #endif /* file descriptor flags (F_GETFD, F_SETFD) */ #define FD_CLOEXEC 1 /* close-on-exec flag */ +#define FD_CLOFORK 2 /* close-on-fork flag */ /* record locking flags (F_GETLK, F_SETLK, F_SETLKW) */ #define F_RDLCK 1 /* shared or read lock */ @@ -215,6 +230,15 @@ #define F_POSIX 0x040 /* Use POSIX semantics for lock */ #endif +/* types of seals (F_ADD_SEALS, F_GET_SEALS) */ +#if defined(_NETBSD_SOURCE) +#define F_SEAL_SEAL 0x0001 /* prevent further seals from being set */ +#define F_SEAL_SHRINK 0x0002 /* prevent file from shrinking */ +#define F_SEAL_GROW 0x0004 /* prevent file from growing */ +#define F_SEAL_WRITE 0x0008 /* prevent writes */ +#define F_SEAL_FUTURE_WRITE 0x0010 /* prevent future writes while mapped */ +#endif + /* Constants for fcntl's passed to the underlying fs - like ioctl's. */ #if defined(_NETBSD_SOURCE) #define F_PARAM_MASK 0xfff diff --git a/lib/libc/include/generic-netbsd/float.h b/lib/libc/include/generic-netbsd/float.h @@ -1,3 +1,59 @@ -/* $NetBSD: float.h,v 1.1 2002/12/09 12:16:02 scw Exp $ */ +/* $NetBSD: float.h,v 1.2 2024/10/30 15:56:11 riastradh Exp $ */ -#include <powerpc/float.h> -\ No newline at end of file +/*- + * Copyright (c) 2014 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Matt Thomas of 3am Software Foundry. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _RISCV_FLOAT_H_ +#define _RISCV_FLOAT_H_ + +#include <sys/cdefs.h> +#include <sys/featuretest.h> + +#define LDBL_MANT_DIG __LDBL_MANT_DIG__ +#define LDBL_DIG __LDBL_DIG__ +#define LDBL_MIN_EXP __LDBL_MIN_EXP__ +#define LDBL_MIN_10_EXP __LDBL_MIN_10_EXP__ +#define LDBL_MAX_EXP __LDBL_MAX_EXP__ +#define LDBL_MAX_10_EXP __LDBL_MAX_10_EXP__ +#define LDBL_EPSILON __LDBL_EPSILON__ +#define LDBL_MIN __LDBL_MIN__ +#define LDBL_MAX __LDBL_MAX__ + +#include <sys/float_ieee754.h> + +#if (!defined(_ANSI_SOURCE) && !defined(_POSIX_C_SOURCE) \ + && !defined(_XOPEN_SOURCE)) \ + || (__STDC_VERSION__ - 0) >= 199901L \ + || (_POSIX_C_SOURCE - 0) >= 200112L \ + || ((_XOPEN_SOURCE - 0) >= 600) \ + || defined(_ISOC99_SOURCE) || defined(_NETBSD_SOURCE) +#define DECIMAL_DIG __DECIMAL_DIG__ +#endif + +#endif /* !_RISCV_FLOAT_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/fmtmsg.h b/lib/libc/include/generic-netbsd/fmtmsg.h @@ -1,4 +1,4 @@ -/* $NetBSD: fmtmsg.h,v 1.3 2008/04/28 20:22:54 martin Exp $ */ +/* $NetBSD: fmtmsg.h,v 1.4 2023/12/08 21:46:02 andvar Exp $ */ /*- * Copyright (c) 1999 The NetBSD Foundation, Inc. @@ -58,7 +58,7 @@ #define MM_INFO 4 /* Informative message */ /* `Null' values for message components. */ -#define MM_NULLMC 0L /* `Null' classsification component */ +#define MM_NULLMC 0L /* `Null' classification component */ #define MM_NULLLBL (char *)0 /* `Null' label component */ #define MM_NULLSEV 0 /* `Null' severity component */ #define MM_NULLTXT (char *)0 /* `Null' text component */ diff --git a/lib/libc/include/generic-netbsd/fs/hfs/libhfs.h b/lib/libc/include/generic-netbsd/fs/hfs/libhfs.h @@ -1,4 +1,4 @@ -/* $NetBSD: libhfs.h,v 1.8.30.1 2023/07/31 15:47:20 martin Exp $ */ +/* $NetBSD: libhfs.h,v 1.9 2023/03/01 16:21:14 riastradh Exp $ */ /*- * Copyright (c) 2005, 2007 The NetBSD Foundation, Inc. diff --git a/lib/libc/include/generic-netbsd/fs/nilfs/nilfs_fs.h b/lib/libc/include/generic-netbsd/fs/nilfs/nilfs_fs.h @@ -1,4 +1,4 @@ -/* $NetBSD: nilfs_fs.h,v 1.4 2022/02/16 22:00:56 andvar Exp $ */ +/* $NetBSD: nilfs_fs.h,v 1.5 2024/12/26 21:16:26 andvar Exp $ */ /* * Copyright (c) 2008, 2009 Reinoud Zandijk @@ -436,7 +436,7 @@ struct nilfs_segment_summary { #define NILFS_SS_GC 0x0010 /* segment written for cleaner operation */ #define NILFS_SS_FLAG_BITS "\20\1LOGBGN\2LOGEND\3SR\4SYNDT\5GC" -/* Segment summary constrains */ +/* Segment summary constraints */ #define NILFS_SEG_MIN_BLOCKS 16 /* minimum number of blocks in a full segment */ #define NILFS_PSEG_MIN_BLOCKS 2 /* minimum number of blocks in a diff --git a/lib/libc/include/generic-netbsd/gelf.h b/lib/libc/include/generic-netbsd/gelf.h @@ -1,4 +1,4 @@ -/* $NetBSD: gelf.h,v 1.3 2016/02/20 02:43:42 christos Exp $ */ +/* $NetBSD: gelf.h,v 1.4 2024/03/03 17:37:33 christos Exp $ */ /*- * Copyright (c) 2006,2008 Joseph Koshy @@ -25,7 +25,7 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * Id: gelf.h 3174 2015-03-27 17:13:41Z emaste + * Id: gelf.h 3174 2015-03-27 17:13:41Z emaste */ #ifndef _GELF_H_ diff --git a/lib/libc/include/generic-netbsd/i386/asm.h b/lib/libc/include/generic-netbsd/i386/asm.h @@ -1,4 +1,4 @@ -/* $NetBSD: asm.h,v 1.44 2020/04/25 15:26:17 bouyer Exp $ */ +/* $NetBSD: asm.h,v 1.47 2025/01/05 16:53:26 riastradh Exp $ */ /*- * Copyright (c) 1990 The Regents of the University of California. @@ -181,11 +181,19 @@ #define ASMSTR .asciz #ifdef __ELF__ -#define RCSID(x) .pushsection ".ident","MS",@progbits,1; \ - .asciz x; \ +#define _IDENTSTR(x) .pushsection ".ident","MS",@progbits,1; \ + x; \ .popsection #else -#define RCSID(x) .text; .asciz x +#define _IDENTSTR(x) .text; x +#endif +#ifdef _NETBSD_REVISIONID +#define RCSID(_s) \ + _IDENTSTR(.asciz _s); \ + _IDENTSTR(.ascii "$"; .ascii "NetBSD: "; .ascii __FILE__; .ascii " "; \ + .ascii _NETBSD_REVISIONID; .asciz " $") +#else +#define RCSID(_s) _IDENTSTR(.asciz _s) #endif #ifdef NO_KERNEL_RCSIDS diff --git a/lib/libc/include/generic-netbsd/i386/byte_swap.h b/lib/libc/include/generic-netbsd/i386/byte_swap.h @@ -1,4 +1,4 @@ -/* $NetBSD: byte_swap.h,v 1.17 2020/08/10 10:59:33 rin Exp $ */ +/* $NetBSD: byte_swap.h,v 1.17.28.1 2025/12/18 19:57:53 martin Exp $ */ /*- * Copyright (c) 1998 The NetBSD Foundation, Inc. @@ -32,7 +32,7 @@ #ifndef _I386_BYTE_SWAP_H_ #define _I386_BYTE_SWAP_H_ -#include <sys/types.h> +#include <sys/stdint.h> #ifdef __GNUC__ __BEGIN_DECLS diff --git a/lib/libc/include/generic-netbsd/i386/cpu.h b/lib/libc/include/generic-netbsd/i386/cpu.h @@ -1,4 +1,4 @@ -/* $NetBSD: cpu.h,v 1.183 2021/11/02 11:26:04 ryo Exp $ */ +/* $NetBSD: cpu.h,v 1.185 2023/09/04 20:58:52 mrg Exp $ */ /*- * Copyright (c) 1990 The Regents of the University of California. @@ -45,12 +45,20 @@ static struct cpu_info *x86_curcpu(void); static lwp_t *x86_curlwp(void); +/* + * XXXGCC12 has: + * ./machine/cpu.h:57:9: error: array subscript 0 is outside array bounds of 'struct cpu_info * const[0]' [-Werror=array-bounds] + * 56 | __asm("movq %%gs:%1, %0" : + */ +#pragma GCC push_options +#pragma GCC diagnostic ignored "-Warray-bounds" + __inline __always_inline static struct cpu_info * __unused x86_curcpu(void) { struct cpu_info *ci; - __asm volatile("movl %%fs:%1, %0" : + __asm("movl %%fs:%1, %0" : "=r" (ci) : "m" (*(struct cpu_info * const *)offsetof(struct cpu_info, ci_self))); @@ -62,13 +70,16 @@ x86_curlwp(void) { lwp_t *l; - __asm volatile("movl %%fs:%1, %0" : + __asm("movl %%fs:%1, %0" : "=r" (l) : "m" (*(struct cpu_info * const *)offsetof(struct cpu_info, ci_curlwp))); return l; } -#endif + +#pragma GCC pop_options + +#endif /* __GNUC__ && !_MODULE */ #ifdef XENPV #define CLKF_USERMODE(frame) (curcpu()->ci_xen_clockf_usermode) diff --git a/lib/libc/include/generic-netbsd/i386/elf_machdep.h b/lib/libc/include/generic-netbsd/i386/elf_machdep.h @@ -1,4 +1,4 @@ -/* $NetBSD: elf_machdep.h,v 1.13 2017/11/06 03:47:46 christos Exp $ */ +/* $NetBSD: elf_machdep.h,v 1.14 2025/02/11 12:27:58 jkoshy Exp $ */ #define ELF32_MACHDEP_ENDIANNESS ELFDATA2LSB #define ELF32_MACHDEP_ID_CASES \ @@ -24,6 +24,7 @@ #define R_386_COPY 5 #define R_386_GLOB_DAT 6 #define R_386_JMP_SLOT 7 +#define R_386_JUMP_SLOT 7 /* psABI spelling. */ #define R_386_RELATIVE 8 #define R_386_GOTOFF 9 #define R_386_GOTPC 10 diff --git a/lib/libc/include/generic-netbsd/i386/lwp_private.h b/lib/libc/include/generic-netbsd/i386/lwp_private.h @@ -0,0 +1,3 @@ +/* $NetBSD: lwp_private.h,v 1.1 2024/11/30 01:04:10 christos Exp $ */ + +#include <x86/lwp_private.h> +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/i386/mcontext.h b/lib/libc/include/generic-netbsd/i386/mcontext.h @@ -1,4 +1,4 @@ -/* $NetBSD: mcontext.h,v 1.15 2019/12/27 00:32:17 kamil Exp $ */ +/* $NetBSD: mcontext.h,v 1.19 2024/11/30 01:04:10 christos Exp $ */ /*- * Copyright (c) 1999 The NetBSD Foundation, Inc. @@ -36,10 +36,10 @@ /* * mcontext extensions to handle signal delivery. */ -#define _UC_SETSTACK 0x00010000 -#define _UC_CLRSTACK 0x00020000 -#define _UC_VM 0x00040000 -#define _UC_TLSBASE 0x00080000 +#define _UC_SETSTACK _UC_MD_BIT16 +#define _UC_CLRSTACK _UC_MD_BIT17 +#define _UC_VM _UC_MD_BIT18 +#define _UC_TLSBASE _UC_MD_BIT19 /* * Layout of mcontext_t according to the System V Application Binary Interface, @@ -96,7 +96,7 @@ typedef struct { __greg_t _mc_tlsbase; } mcontext_t; -#define _UC_FXSAVE 0x20 /* FP state is in FXSAVE format in XMM space */ +#define _UC_FXSAVE _UC_MD_BIT5 /* FP state is in FXSAVE format in XMM space */ #define _UC_MACHINE_PAD 4 /* Padding appended to ucontext_t */ @@ -113,22 +113,4 @@ typedef struct { #define __UCONTEXT_SIZE 776 -#if defined(_RTLD_SOURCE) || defined(_LIBC_SOURCE) || \ - defined(__LIBPTHREAD_SOURCE__) -#include <sys/tls.h> - -__BEGIN_DECLS -static __inline void * -__lwp_getprivate_fast(void) -{ - void *__tmp; - - __asm volatile("movl %%gs:0, %0" : "=r" (__tmp)); - - return __tmp; -} -__END_DECLS - -#endif - #endif /* !_I386_MCONTEXT_H_ */ \ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/i386/param.h b/lib/libc/include/generic-netbsd/i386/param.h @@ -1,4 +1,4 @@ -/* $NetBSD: param.h,v 1.88 2021/05/31 14:38:55 simonb Exp $ */ +/* $NetBSD: param.h,v 1.89 2025/04/20 22:33:13 riastradh Exp $ */ /*- * Copyright (c) 1990 The Regents of the University of California. @@ -65,6 +65,14 @@ #define ALIGNED_POINTER(p,t) 1 #define ALIGNED_POINTER_LOAD(q,p,t) memcpy((q), (p), sizeof(t)) +/* + * Stack alignment is 4-byte, following the traditional i386 SysV ABI + * published by SCO. Note: Parts of the Linux world have altered the + * ABI to guarantee 16-byte alignment, which is convenient for SSE2, + * but an incompatible ABI change which we do not follow. + */ +#define STACK_ALIGNBYTES (4 - 1) + #define PGSHIFT 12 /* LOG2(NBPG) */ #define NBPG (1 << PGSHIFT) /* bytes/page */ #define PGOFSET (NBPG-1) /* byte offset into page */ diff --git a/lib/libc/include/generic-netbsd/i386/pcb.h b/lib/libc/include/generic-netbsd/i386/pcb.h @@ -1,4 +1,4 @@ -/* $NetBSD: pcb.h,v 1.59 2019/10/12 06:31:03 maxv Exp $ */ +/* $NetBSD: pcb.h,v 1.61 2025/04/24 09:29:09 kre Exp $ */ /* * Copyright (c) 1998, 2009 The NetBSD Foundation, Inc. @@ -99,12 +99,16 @@ struct pcb { int not_used[15]; /* floating point state */ - union savefpu pcb_savefpu __aligned(64); + union savefpu pcb_savefpu[1] __aligned(64); +#define pcb_savefpusmall pcb_savefpu /* **** DO NOT ADD ANYTHING HERE **** */ }; #ifndef __lint__ +#include <sys/stddef.h> /* for offsetof() */ + /* This doesn't really matter, but there is a lot of implied padding */ +__CTASSERT(offsetof(struct pcb, pcb_savefpu) == 128); __CTASSERT(sizeof(struct pcb) - sizeof (union savefpu) == 128); #endif diff --git a/lib/libc/include/generic-netbsd/i386/ptrace.h b/lib/libc/include/generic-netbsd/i386/ptrace.h @@ -1,4 +1,4 @@ -/* $NetBSD: ptrace.h,v 1.26 2020/05/30 08:41:23 maxv Exp $ */ +/* $NetBSD: ptrace.h,v 1.27 2023/11/20 03:05:48 simonb Exp $ */ /* * Copyright (c) 2001 Wasabi Systems, Inc. @@ -162,7 +162,7 @@ #define PT32_GETXSTATE PT_GETXSTATE #define COREDUMP_MACHDEP_LWP_NOTES(l, ns, name) \ { \ - struct xstate xstate; \ + struct xstate xstate; /* XXX FIXME big stack object */ \ memset(&xstate, 0, sizeof(xstate)); \ if (!process_read_xstate(l, &xstate)) \ { \ diff --git a/lib/libc/include/generic-netbsd/i386/types.h b/lib/libc/include/generic-netbsd/i386/types.h @@ -1,4 +1,4 @@ -/* $NetBSD: types.h,v 1.93 2021/04/01 04:35:46 simonb Exp $ */ +/* $NetBSD: types.h,v 1.95 2025/05/08 05:31:16 imil Exp $ */ /*- * Copyright (c) 1990 The Regents of the University of California. @@ -134,5 +134,6 @@ typedef __register_t register_t; #define __HAVE_COMMON___TLS_GET_ADDR #define __HAVE_UCAS_FULL #define __HAVE_RAS +#define __HAVE_BOOT_DURATION #endif /* _I386_MACHTYPES_H_ */ \ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/i386/wchar_limits.h b/lib/libc/include/generic-netbsd/i386/wchar_limits.h @@ -44,4 +44,4 @@ #define WINT_MIN (-0x7fffffff-1) /* wint_t */ #define WINT_MAX 0x7fffffff /* wint_t */ -#endif /* !_I386_WCHAR_LIMITS_H_ */ -\ No newline at end of file +#endif /* !_I386_WCHAR_LIMITS_H_ */ diff --git a/lib/libc/include/generic-netbsd/isofs/cd9660/cd9660_extern.h b/lib/libc/include/generic-netbsd/isofs/cd9660/cd9660_extern.h @@ -1,4 +1,4 @@ -/* $NetBSD: cd9660_extern.h,v 1.27.30.1 2024/06/22 10:57:10 martin Exp $ */ +/* $NetBSD: cd9660_extern.h,v 1.29 2024/05/19 15:41:53 tsutsui Exp $ */ /*- * Copyright (c) 1994 @@ -62,6 +62,11 @@ struct iso_mnt { dev_t im_dev; struct vnode *im_devvp; + uid_t im_uid; + gid_t im_gid; + mode_t im_fmask; + mode_t im_dmask; + int logical_block_size; int im_bshift; int im_bmask; diff --git a/lib/libc/include/generic-netbsd/isofs/cd9660/cd9660_mount.h b/lib/libc/include/generic-netbsd/isofs/cd9660/cd9660_mount.h @@ -1,4 +1,4 @@ -/* $NetBSD: cd9660_mount.h,v 1.6 2005/12/03 17:34:43 christos Exp $ */ +/* $NetBSD: cd9660_mount.h,v 1.7 2024/02/02 20:27:26 christos Exp $ */ /* * Copyright (c) 1995 * The Regents of the University of California. All rights reserved. @@ -45,6 +45,10 @@ struct iso_args { const char *fspec; /* block special device to mount */ struct export_args30 _pad1; /* compat with old userland tools */ int flags; /* mounting flags, see below */ + uid_t uid; /* uid that owns ISO-9660 files */ + gid_t gid; /* gid that owns ISO-9660 files */ + mode_t fmask; /* file mask to be applied for files */ + mode_t dmask; /* file mask to be applied for directories */ }; #define ISOFSMNT_NORRIP 0x00000001 /* disable Rock Ridge Ext.*/ #define ISOFSMNT_GENS 0x00000002 /* enable generation numbers */ @@ -52,6 +56,8 @@ struct iso_args { #define ISOFSMNT_NOJOLIET 0x00000008 /* disable Joliet extensions */ #define ISOFSMNT_NOCASETRANS 0x00000010 /* do not make names lower case */ #define ISOFSMNT_RRCASEINS 0x00000020 /* case insensitive Rock Ridge */ +#define ISOFSMNT_UID 0x00000100 /* override uid */ +#define ISOFSMNT_GID 0x00000200 /* override gid */ #define ISOFSMNT_BITS "\177\20" \ "b\00norrip\0b\01gens\0b\02extatt\0b\03nojoliet\0" \ diff --git a/lib/libc/include/generic-netbsd/langinfo.h b/lib/libc/include/generic-netbsd/langinfo.h @@ -1,4 +1,4 @@ -/* $NetBSD: langinfo.h,v 1.10 2013/08/19 08:03:33 joerg Exp $ */ +/* $NetBSD: langinfo.h,v 1.11 2024/10/30 15:56:10 riastradh Exp $ */ /* * Written by J.T. Conklin <jtc@NetBSD.org> @@ -9,6 +9,7 @@ #define _LANGINFO_H_ #include <sys/cdefs.h> +#include <sys/featuretest.h> #include <nl_types.h> #define D_T_FMT ((nl_item)0) /* String for formatting date and diff --git a/lib/libc/include/generic-netbsd/lauxlib.h b/lib/libc/include/generic-netbsd/lauxlib.h @@ -1,4 +1,4 @@ -/* $NetBSD: lauxlib.h,v 1.8.10.1 2023/08/11 16:22:06 martin Exp $ */ +/* $NetBSD: lauxlib.h,v 1.9 2023/04/16 20:46:17 nikita Exp $ */ /* ** Id: lauxlib.h diff --git a/lib/libc/include/generic-netbsd/libelf.h b/lib/libc/include/generic-netbsd/libelf.h @@ -1,4 +1,4 @@ -/* $NetBSD: libelf.h,v 1.5 2016/02/20 02:43:42 christos Exp $ */ +/* $NetBSD: libelf.h,v 1.7 2024/04/01 18:33:22 riastradh Exp $ */ /*- * Copyright (c) 2006,2008-2010 Joseph Koshy @@ -25,7 +25,7 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * Id: libelf.h 3174 2015-03-27 17:13:41Z emaste + * Id: libelf.h 3984 2022-05-06 11:22:42Z jkoshy */ #ifndef _LIBELF_H_ @@ -33,22 +33,12 @@ #if HAVE_NBTOOL_CONFIG_H # include "nbtool_config.h" -#endif - - -#if HAVE_NBTOOL_CONFIG_H -# include <nbinclude/sys/exec_elf.h> -#elif defined(__NetBSD__) -# include <sys/types.h> -# include <sys/exec_elf.h> -#elif defined(__FreeBSD__) -# include <sys/types.h> -# include <sys/elf32.h> -# include <sys/elf64.h> #else -# error "Unsupported platform" +# include <sys/types.h> #endif +#include "elfdefinitions.h" + /* Library private data structures */ typedef struct _Elf Elf; typedef struct _Elf_Scn Elf_Scn; @@ -222,6 +212,7 @@ int elf_getshdrnum(Elf *_elf, size_t *_dst); int elf_getshnum(Elf *_elf, size_t *_dst); /* Deprecated */ int elf_getshdrstrndx(Elf *_elf, size_t *_dst); int elf_getshstrndx(Elf *_elf, size_t *_dst); /* Deprecated */ +unsigned int elf_getversion(Elf *_elf); unsigned long elf_hash(const void *_name); Elf_Kind elf_kind(Elf *_elf); Elf *elf_memory(char *_image, size_t _size); diff --git a/lib/libc/include/generic-netbsd/limits.h b/lib/libc/include/generic-netbsd/limits.h @@ -1,4 +1,4 @@ -/* $NetBSD: limits.h,v 1.43.2.2 2024/10/11 17:26:32 martin Exp $ */ +/* $NetBSD: limits.h,v 1.45 2024/09/09 12:01:01 riastradh Exp $ */ /* * Copyright (c) 1988, 1993 diff --git a/lib/libc/include/generic-netbsd/lua.h b/lib/libc/include/generic-netbsd/lua.h @@ -1,4 +1,4 @@ -/* $NetBSD: lua.h,v 1.11.10.1 2023/08/11 16:22:07 martin Exp $ */ +/* $NetBSD: lua.h,v 1.14 2023/06/08 21:12:08 nikita Exp $ */ /* ** Id: lua.h diff --git a/lib/libc/include/generic-netbsd/luaconf.h b/lib/libc/include/generic-netbsd/luaconf.h @@ -1,4 +1,4 @@ -/* $NetBSD: luaconf.h,v 1.23.10.1 2023/08/11 16:22:07 martin Exp $ */ +/* $NetBSD: luaconf.h,v 1.25 2023/06/08 21:12:08 nikita Exp $ */ /* ** Id: luaconf.h diff --git a/lib/libc/include/generic-netbsd/lualib.h b/lib/libc/include/generic-netbsd/lualib.h @@ -1,4 +1,4 @@ -/* $NetBSD: lualib.h,v 1.7.10.1 2023/08/11 16:22:07 martin Exp $ */ +/* $NetBSD: lualib.h,v 1.8 2023/04/16 20:46:17 nikita Exp $ */ /* ** Id: lualib.h diff --git a/lib/libc/include/generic-netbsd/lwp.h b/lib/libc/include/generic-netbsd/lwp.h @@ -1,4 +1,4 @@ -/* $NetBSD: lwp.h,v 1.13 2017/12/08 01:19:29 christos Exp $ */ +/* $NetBSD: lwp.h,v 1.15 2024/11/04 15:45:22 christos Exp $ */ /*- * Copyright (c) 2000 The NetBSD Foundation, Inc. diff --git a/lib/libc/include/generic-netbsd/machine/ansi.h b/lib/libc/include/generic-netbsd/machine/ansi.h @@ -1,3 +1,3 @@ -/* $NetBSD: ansi.h,v 1.1 2002/12/09 12:15:56 scw Exp $ */ +/* $NetBSD: ansi.h,v 1.1 2014/09/19 17:36:26 matt Exp $ */ -#include <powerpc/ansi.h> -\ No newline at end of file +#include <sys/common_ansi.h> +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/machine/aout_machdep.h b/lib/libc/include/generic-netbsd/machine/aout_machdep.h @@ -1,3 +1,40 @@ -/* $NetBSD: aout_machdep.h,v 1.1 2002/12/09 12:15:56 scw Exp $ */ +/* $NetBSD: aout_machdep.h,v 1.1 2014/09/19 17:36:26 matt Exp $ */ -#include <powerpc/aout_machdep.h> -\ No newline at end of file +/*- + * Copyright (c) 2014 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Matt Thomas of 3am Software Foundry. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _RISCV_AOUT_MACHDEP_H_ +#define _RISCV_AOUT_MACHDEP_H_ + +#define cpu_exec_aout_makecmds(p, epp) ENOEXEC + +/* Size of a page in an object file. */ +#define AOUT_LDPGSZ 4096 + +#endif /* !_RISCV_AOUT_MACHDEP_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/machine/arm32/pmap.h b/lib/libc/include/generic-netbsd/machine/arm32/pmap.h @@ -1,4 +1,4 @@ -/* $NetBSD: pmap.h,v 1.173.4.1 2023/10/14 06:52:17 martin Exp $ */ +/* $NetBSD: pmap.h,v 1.177 2023/10/12 11:33:37 skrll Exp $ */ /* * Copyright (c) 2002, 2003 Wasabi Systems, Inc. @@ -79,7 +79,10 @@ #endif #include <arm/cpufunc.h> #include <arm/locore.h> + #include <uvm/uvm_object.h> + +#include <uvm/pmap/pmap_devmap.h> #include <uvm/pmap/pmap_pvt.h> #endif @@ -91,12 +94,7 @@ #endif #define PMAP_TLB_FLUSH_ASID_ON_RESET arm_has_tlbiasid_p #define PMAP_TLB_NUM_PIDS 256 -#define cpu_set_tlb_info(ci, ti) ((void)((ci)->ci_tlb_info = (ti))) -#if PMAP_TLB_MAX > 1 -#define cpu_tlb_info(ci) ((ci)->ci_tlb_info) -#else -#define cpu_tlb_info(ci) (&pmap_tlb0_info) -#endif + #define pmap_md_tlb_asid_max() (PMAP_TLB_NUM_PIDS - 1) #include <uvm/pmap/tlb.h> #include <uvm/pmap/pmap_tlb.h> @@ -201,29 +199,10 @@ union pmap_cache_state { #define PMAP_CACHE_STATE_ALL 0xffffffffu #endif /* !ARM_MMU_EXTENDED */ -/* - * This structure is used by machine-dependent code to describe - * static mappings of devices, created at bootstrap time. - */ -struct pmap_devmap { - vaddr_t pd_va; /* virtual address */ - paddr_t pd_pa; /* physical address */ - psize_t pd_size; /* size of region */ - vm_prot_t pd_prot; /* protection code */ - int pd_cache; /* cache attributes */ -}; #define DEVMAP_ALIGN(a) ((a) & ~L1_S_OFFSET) #define DEVMAP_SIZE(s) roundup2((s), L1_S_SIZE) -#define DEVMAP_ENTRY(va, pa, sz) \ - { \ - .pd_va = DEVMAP_ALIGN(va), \ - .pd_pa = DEVMAP_ALIGN(pa), \ - .pd_size = DEVMAP_SIZE(sz), \ - .pd_prot = VM_PROT_READ|VM_PROT_WRITE, \ - .pd_cache = PTE_DEV \ - } -#define DEVMAP_ENTRY_END { 0 } +#define DEVMAP_FLAGS PMAP_DEV /* * The pmap structure itself @@ -419,17 +398,14 @@ void pmap_postinit(void); void vector_page_setprot(int); -const struct pmap_devmap *pmap_devmap_find_pa(paddr_t, psize_t); -const struct pmap_devmap *pmap_devmap_find_va(vaddr_t, vsize_t); - /* Bootstrapping routines. */ void pmap_map_section(vaddr_t, vaddr_t, paddr_t, int, int); void pmap_map_entry(vaddr_t, vaddr_t, paddr_t, int, int); vsize_t pmap_map_chunk(vaddr_t, vaddr_t, paddr_t, vsize_t, int, int); void pmap_unmap_chunk(vaddr_t, vaddr_t, vsize_t); void pmap_link_l2pt(vaddr_t, vaddr_t, pv_addr_t *); -void pmap_devmap_bootstrap(vaddr_t, const struct pmap_devmap *); -void pmap_devmap_register(const struct pmap_devmap *); + +vsize_t pmap_kenter_range(vaddr_t, paddr_t, vsize_t, vm_prot_t, u_int); /* * Special page zero routine for use by the idle loop (no cache cleans). diff --git a/lib/libc/include/generic-netbsd/machine/arm32/vmparam.h b/lib/libc/include/generic-netbsd/machine/arm32/vmparam.h @@ -1,4 +1,4 @@ -/* $NetBSD: vmparam.h,v 1.56 2020/10/08 12:49:06 he Exp $ */ +/* $NetBSD: vmparam.h,v 1.58 2024/09/07 06:17:37 andvar Exp $ */ /* * Copyright (c) 2001, 2002 Wasabi Systems, Inc. @@ -54,7 +54,7 @@ #define USRSTACK VM_MAXUSER_ADDRESS /* - * ARMv4 systems are normaly configured for 256MB KVA only, so restrict + * ARMv4 systems are normally configured for 256MB KVA only, so restrict * the size of the pager map to 4MB. */ #ifndef _ARM_ARCH_5 @@ -131,7 +131,7 @@ #define VM_KERNEL_KASAN_END (VM_KERNEL_KASAN_BASE + VM_KERNEL_KASAN_SIZE) #define VM_KERNEL_VM_END VM_KERNEL_KASAN_BASE #else -#define VM_KERNEL_VM_END VM_KERNEL_IO_ADDRESS +#define VM_KERNEL_VM_END VM_KERNEL_IO_BASE #endif #ifdef __HAVE_MM_MD_DIRECT_MAPPED_PHYS @@ -146,8 +146,8 @@ #define VM_KERNEL_ADDR_SIZE (VM_KERNEL_VM_END - KERNEL_BASE) #define VM_KERNEL_VM_SIZE (VM_KERNEL_VM_END - VM_KERNEL_VM_BASE) -#define VM_KERNEL_IO_ADDRESS 0xf0000000 -#define VM_KERNEL_IO_SIZE (VM_MAX_KERNEL_ADDRESS - VM_KERNEL_IO_ADDRESS) +#define VM_KERNEL_IO_BASE 0xf0000000 +#define VM_KERNEL_IO_SIZE (VM_MAX_KERNEL_ADDRESS - VM_KERNEL_IO_BASE) #endif #endif /* _ARM_ARM32_VMPARAM_H_ */ \ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/machine/asm.h b/lib/libc/include/generic-netbsd/machine/asm.h @@ -1,3 +1,272 @@ -/* $NetBSD: asm.h,v 1.1 2002/12/09 12:15:57 scw Exp $ */ +/* $NetBSD: asm.h,v 1.11.2.1 2026/04/02 15:59:59 martin Exp $ */ -#include <powerpc/asm.h> -\ No newline at end of file +/*- + * Copyright (c) 2014 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Matt Thomas of 3am Software Foundry. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _RISCV_ASM_H +#define _RISCV_ASM_H + +#define _C_LABEL(x) x + +#define __CONCAT(x,y) x ## y +#define __STRING(x) #x + +#define ___CONCAT(x,y) __CONCAT(x,y) + +/* + * Define -pg profile entry code. + */ +#define _KERN_MCOUNT \ + addi sp, sp, -CALLFRAME_SIZ; \ + REG_S ra, CALLFRAME_RA(sp); \ + REG_S a0, CALLFRAME_S1(sp); \ + mv a0, ra; \ + call PLT(_mcount); \ + REG_L ra, CALLFRAME_RA(sp); \ + REG_L a0, CALLFRAME_S1(sp); \ + addi sp, sp, CALLFRAME_SIZ + +#ifdef GPROF +#define _PROF_PROLOGUE _KERN_MCOUNT +#else +#define _PROF_PROLOGUE +#endif + +#ifdef __PIC__ +#define PLT(x) x##@plt +#else +#define PLT(x) x +#endif + +/* + * WEAK_ALIAS: create a weak alias. + */ +#define WEAK_ALIAS(alias,sym) \ + .weak alias; \ + alias = sym +/* + * STRONG_ALIAS: create a strong alias. + */ +#define STRONG_ALIAS(alias,sym) \ + .globl alias; \ + alias = sym + +/* + * WARN_REFERENCES: create a warning if the specified symbol is referenced. + */ +#define WARN_REFERENCES(sym,msg) \ + .pushsection __CONCAT(.gnu.warning.,sym); \ + .ascii msg; \ + .popsection + +#define _ENTRY(x) \ + .globl _C_LABEL(x); \ + .type _C_LABEL(x), @function; \ + _C_LABEL(x): + +#define ENTRY_NP(x) .text; .align 2; _ENTRY(x) +#define ENTRY(x) ENTRY_NP(x); _PROF_PROLOGUE +#define ALTENTRY(x) _ENTRY(x) +#define END(x) .size _C_LABEL(x), . - _C_LABEL(x) + +/* + * Macros to panic and printf from assembly language. + */ +#define PANIC(msg) \ + la a0, 9f; \ + call _C_LABEL(panic); \ + MSG(msg) + +#define PRINTF(msg) \ + la a0, 9f; \ + call _C_LABEL(printf); \ + MSG(msg) + +#define MSG(msg) \ + .pushsection .rodata.str1.8,"aMS",@progbits,1; \ +9: .asciiz msg; \ + .popsection + +#define ASMSTR(str) \ + .asciiz str; \ + .align 3 + +#ifdef _NETBSD_REVISIONID +#define __RCSID(x) .pushsection ".ident","MS",@progbits,1; \ + .asciz x; \ + .ascii "$"; .ascii "NetBSD: "; .ascii __FILE__; \ + .ascii " "; .ascii _NETBSD_REVISIONID; \ + .asciz " $"; \ + .popsection +#else +#define __RCSID(x) .pushsection ".ident","MS",@progbits,1; \ + .asciz x; \ + .popsection +#endif +#define RCSID(name) __RCSID(name) + +#if defined(_LP64) +#define SZREG 8 +#else +#define SZREG 4 +#endif + +#define ALSK 15 /* stack alignment */ +#define ALMASK -15 /* stack alignment */ +#define SZFPREG 8 +#define FP_L fld +#define FP_S fsd + +/* + * standard callframe { + * register_t cf_sp; frame pointer + * register_t cf_ra; return address + * }; + */ +#define CALLFRAME_SIZ (SZREG * 4) +#define CALLFRAME_S1 (CALLFRAME_SIZ - 4 * SZREG) +#define CALLFRAME_S0 (CALLFRAME_SIZ - 3 * SZREG) +#define CALLFRAME_SP (CALLFRAME_SIZ - 2 * SZREG) +#define CALLFRAME_RA (CALLFRAME_SIZ - 1 * SZREG) + +/* + * These macros hide the use of rv32 and rv64 instructions from the + * assembler to prevent the assembler from generating 64-bit style + * ABI calls. + */ +#define PTR_ADD add +#define PTR_ADDI addi +#define PTR_SUB sub +#define PTR_SUBI subi +#define PTR_LA la +#define PTR_SLLI slli +#define PTR_SLL sll +#define PTR_SRLI srli +#define PTR_SRL srl +#define PTR_SRAI srai +#define PTR_SRA sra +#if _LP64 +#define PTR_L ld +#define PTR_S sd +#define PTR_LR lr.d +#define PTR_SC sc.d +#define PTR_WORD .dword +#define PTR_SCALESHIFT 3 +#else +#define PTR_L lw +#define PTR_S sw +#define PTR_LR lr.w +#define PTR_SC sc.w +#define PTR_WORD .word +#define PTR_SCALESHIFT 2 +#endif + +#define INT_L lw +#define INT_LA la +#define INT_S sw +#define INT_LR lr.w +#define INT_SC sc.w +#define INT_WORD .word +#define INT_SCALESHIFT 2 +#ifdef _LP64 +#define INT_ADD addw +#define INT_ADDI addwi +#define INT_SUB subw +#define INT_SUBI subwi +#define INT_SLL sllwi +#define INT_SLLV sllw +#define INT_SRL srlwi +#define INT_SRLV srlw +#define INT_SRA srawi +#define INT_SRAV sraw +#else +#define INT_ADD add +#define INT_ADDI addi +#define INT_SUB sub +#define INT_SUBI subi +#define INT_SLLI slli +#define INT_SLL sll +#define INT_SRLI srli +#define INT_SRL srl +#define INT_SRAI srai +#define INT_SRA sra +#endif + +#define LONG_LA la +#define LONG_ADD add +#define LONG_ADDI addi +#define LONG_SUB sub +#define LONG_SUBI subi +#define LONG_SLLI slli +#define LONG_SLL sll +#define LONG_SRLI srli +#define LONG_SRL srl +#define LONG_SRAI srai +#define LONG_SRA sra +#ifdef _LP64 +#define LONG_L ld +#define LONG_S sd +#define LONG_LR lr.d +#define LONG_SC sc.d +#define LONG_WORD .quad +#define LONG_SCALESHIFT 3 +#else +#define LONG_L lw +#define LONG_S sw +#define LONG_LR lr.w +#define LONG_SC sc.w +#define LONG_WORD .word +#define LONG_SCALESHIFT 2 +#endif + +#define REG_LI li +#define REG_ADD add +#define REG_SLLI slli +#define REG_SLL sll +#define REG_SRLI srli +#define REG_SRL srl +#define REG_SRAI srai +#define REG_SRA sra +#if _LP64 +#define REG_L ld +#define REG_S sd +#define REG_LR lr.d +#define REG_SC sc.d +#define REG_SCALESHIFT 3 +#else +#define REG_L lw +#define REG_S sw +#define REG_LR lr.w +#define REG_SC sc.w +#define REG_SCALESHIFT 2 +#endif + +#define CPUVAR(off) _C_LABEL(cpu_info_store)+__CONCAT(CPU_INFO_,off) + +#endif /* _RISCV_ASM_H */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/machine/bswap.h b/lib/libc/include/generic-netbsd/machine/bswap.h @@ -1,8 +1,16 @@ -/* $NetBSD: bswap.h,v 1.2 1999/08/21 05:39:55 simonb Exp $ */ +/* $NetBSD: bswap.h,v 1.2.264.1 2025/11/28 10:58:02 martin Exp $ */ #ifndef _MACHINE_BSWAP_H_ #define _MACHINE_BSWAP_H_ +/* + * GCC doesn't generate inline calls to bswapX on sparc and instead + * generates function calls. + */ +#if !defined(__clang__) +#define __HAVE_SLOW_BSWAP_BUILTIN +#endif + #include <sys/bswap.h> #endif /* !_MACHINE_BSWAP_H_ */ \ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/machine/byte_swap.h b/lib/libc/include/generic-netbsd/machine/byte_swap.h @@ -1,11 +1,11 @@ -/* $NetBSD: byte_swap.h,v 1.16 2017/01/17 11:08:50 rin Exp $ */ +/* $NetBSD: byte_swap.h,v 1.5.30.1 2025/12/18 19:57:52 martin Exp $ */ /*- - * Copyright (c) 1997, 1999, 2002 The NetBSD Foundation, Inc. + * Copyright (c) 2014 The NetBSD Foundation, Inc. * All rights reserved. * * This code is derived from software contributed to The NetBSD Foundation - * by Charles M. Hannum, Neil A. Carson, and Jason R. Thorpe. + * by Matt Thomas of 3am Software Foundry. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -29,57 +29,57 @@ * POSSIBILITY OF SUCH DAMAGE. */ -#ifndef _ARM_BYTE_SWAP_H_ -#define _ARM_BYTE_SWAP_H_ +#ifndef _RISCV_BYTE_SWAP_H_ +#define _RISCV_BYTE_SWAP_H_ #ifdef _LOCORE -#if defined(_ARM_ARCH_6) || defined(_ARM_ARCH_7) - -#define BSWAP16(_src, _dst, _tmp) \ - rev16 _dst, _src -#define BSWAP32(_src, _dst, _tmp) \ - rev _dst, _src +#define BSWAP16(_src, _dst, _tmp) \ + andi _dst, _src, 0xff ;\ + slli _dst, _dst, 8 ;\ + srli _tmp, _src, 8 ;\ + and _tmp, _tmp, 0xff ;\ + ori _dst, _dst, _tmp + +#define BSWAP32(_src, _dst, _tmp) \ + li v1, 0xff00 ;\ + slli _dst, _src, 24 ;\ + srli _tmp, _src, 24 ;\ + ori _dst, _dst, _tmp ;\ + and _tmp, _src, v1 ;\ + slli _tmp, _src, 8 ;\ + ori _dst, _dst, _tmp ;\ + srli _tmp, _src, 8 ;\ + and _tmp, _tmp, v1 ;\ + ori _dst, _dst, _tmp #else -#define BSWAP16(_src, _dst, _tmp) \ - mov _tmp, _src, ror #8 ;\ - orr _tmp, _tmp, _tmp, lsr #16 ;\ - bic _dst, _tmp, _tmp, lsl #16 - -#define BSWAP32(_src, _dst, _tmp) \ - eor _tmp, _src, _src, ror #16 ;\ - bic _tmp, _tmp, #0x00FF0000 ;\ - mov _dst, _src, ror #8 ;\ - eor _dst, _dst, _tmp, lsr #8 - -#endif +#include <sys/stdint.h> +__BEGIN_DECLS +#define __BYTE_SWAP_U64_VARIABLE __byte_swap_u64_variable +static __inline uint64_t +__byte_swap_u64_variable(uint64_t v) +{ + const uint64_t m1 = 0x0000ffff0000ffffull; + const uint64_t m0 = 0x00ff00ff00ff00ffull; -#else + v = (v >> 32) | (v << 32); + v = ((v >> 16) & m1) | ((v & m1) << 16); + v = ((v >> 8) & m0) | ((v & m0) << 8); -#ifdef __GNUC__ -#include <sys/types.h> -__BEGIN_DECLS + return v; +} #define __BYTE_SWAP_U32_VARIABLE __byte_swap_u32_variable static __inline uint32_t __byte_swap_u32_variable(uint32_t v) { - uint32_t t1; - -#ifdef _ARM_ARCH_6 - if (!__builtin_constant_p(v)) { - __asm("rev\t%0, %1" : "=r" (v) : "0" (v)); - return v; - } -#endif + const uint32_t m = 0xff00ff; - t1 = v ^ ((v << 16) | (v >> 16)); - t1 &= 0xff00ffffU; - v = (v >> 8) | (v << 24); - v ^= (t1 >> 8); + v = (v >> 16) | (v << 16); + v = ((v >> 8) & m) | ((v & m) << 8); return v; } @@ -88,34 +88,12 @@ __byte_swap_u32_variable(uint32_t v) static __inline uint16_t __byte_swap_u16_variable(uint16_t v) { - -#ifdef _ARM_ARCH_6 - if (!__builtin_constant_p(v)) { - uint32_t v32 = v; - __asm("rev16\t%0, %1" : "=r" (v32) : "0" (v32)); - return (uint16_t)v32; - } -#elif !defined(__thumb__) && 0 /* gcc produces decent code for this */ - if (!__builtin_constant_p(v)) { - uint32_t v0 = v; - __asm volatile( - "mov %0, %1, ror #8\n" - "orr %0, %0, %0, lsr #16\n" - "bic %0, %0, %0, lsl #16" - : "=&r" (v0) - : "0" (v0)); - return (uint16_t)v0; - } -#endif - v &= 0xffff; - v = (uint16_t)((v >> 8) | (v << 8)); - - return v; + /*LINTED*/ + return (uint16_t)((v >> 8) | (v << 8)); } __END_DECLS -#endif #endif /* _LOCORE */ -#endif /* _ARM_BYTE_SWAP_H_ */ -\ No newline at end of file +#endif /* _RISCV_BYTE_SWAP_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/machine/cdefs.h b/lib/libc/include/generic-netbsd/machine/cdefs.h @@ -1,3 +1,8 @@ -/* $NetBSD: cdefs.h,v 1.1 2002/12/09 12:15:59 scw Exp $ */ +/* $NetBSD: cdefs.h,v 1.2 2023/05/07 12:41:48 skrll Exp $ */ -#include <powerpc/cdefs.h> -\ No newline at end of file +#ifndef _RISCV_CDEFS_H_ +#define _RISCV_CDEFS_H_ + +#define __ALIGNBYTES ((size_t)(__BIGGEST_ALIGNMENT__ - 1U)) + +#endif /* _RISCV_CDEFS_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/machine/cpu.h b/lib/libc/include/generic-netbsd/machine/cpu.h @@ -1,10 +1,11 @@ -/* $NetBSD: cpu.h,v 1.8 2021/08/03 09:25:43 rin Exp $ */ +/* $NetBSD: cpu.h,v 1.16 2024/08/04 08:16:25 skrll Exp $ */ -/* - * Copyright 2002 Wasabi Systems, Inc. +/*- + * Copyright (c) 2014 The NetBSD Foundation, Inc. * All rights reserved. * - * Written by Eduardo Horvath for Wasabi Systems, Inc. + * This code is derived from software contributed to The NetBSD Foundation + * by Matt Thomas of 3am Software Foundry. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -14,18 +15,11 @@ * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed for the NetBSD Project by - * Wasabi Systems, Inc. - * 4. The name of Wasabi Systems, Inc. may not be used to endorse - * or promote products derived from this software without specific prior - * written permission. * - * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS @@ -35,31 +29,214 @@ * POSSIBILITY OF SUCH DAMAGE. */ -#ifndef _EVBPPC_CPU_H_ -#define _EVBPPC_CPU_H_ +#ifndef _RISCV_CPU_H_ +#define _RISCV_CPU_H_ + +#if defined(_KERNEL) || defined(_KMEMUSER) + +struct clockframe { + vaddr_t cf_epc; + register_t cf_status; + int cf_intr_depth; +}; + +#define CLKF_USERMODE(cf) (((cf)->cf_status & SR_SPP) == 0) +#define CLKF_PC(cf) ((cf)->cf_epc) +#define CLKF_INTR(cf) ((cf)->cf_intr_depth > 1) + +#include <sys/cpu_data.h> +#include <sys/device_if.h> +#include <sys/evcnt.h> +#include <sys/intr.h> + +struct cpu_info { + struct cpu_data ci_data; + device_t ci_dev; + cpuid_t ci_cpuid; + struct lwp *ci_curlwp; + struct lwp *ci_onproc; /* current user LWP / kthread */ + struct lwp *ci_softlwps[SOFTINT_COUNT]; + struct trapframe *ci_ddb_regs; + + uint64_t ci_lastintr; + uint64_t ci_lastintr_scheduled; + struct evcnt ci_ev_timer; + struct evcnt ci_ev_timer_missed; + + u_long ci_cpu_freq; /* CPU frequency */ + int ci_mtx_oldspl; + int ci_mtx_count; + int ci_cpl; + volatile u_int ci_intr_depth; + + int ci_want_resched __aligned(COHERENCY_UNIT); + u_int ci_softints; + + tlb_asid_t ci_pmap_asid_cur; + + union pmap_segtab *ci_pmap_user_segtab; +#ifdef _LP64 + union pmap_segtab *ci_pmap_user_seg0tab; +#endif + + struct evcnt ci_ev_fpu_saves; + struct evcnt ci_ev_fpu_loads; + struct evcnt ci_ev_fpu_reenables; + + struct pmap_tlb_info *ci_tlb_info; -#if defined(_KERNEL) && !defined(_MODULE) -#ifdef _KERNEL_OPT -#include "opt_ppcarch.h" -#include "opt_multiprocessor.h" +#ifdef MULTIPROCESSOR + volatile u_long ci_flags; +#define CPUF_PRIMARY __BIT(0) /* CPU is primary CPU */ +#define CPUF_PRESENT __BIT(1) /* CPU is present */ +#define CPUF_RUNNING __BIT(2) /* CPU is running */ +#define CPUF_PAUSED __BIT(3) /* CPU is paused */ + + void *ci_intcsoftc; + volatile u_long ci_request_ipis; + /* bitmask of IPIs requested */ + u_long ci_active_ipis; /* bitmask of IPIs being serviced */ + + struct evcnt ci_evcnt_all_ipis; /* aggregated IPI counter */ + struct evcnt ci_evcnt_per_ipi[NIPIS]; /* individual IPI counters */ + struct evcnt ci_evcnt_synci_onproc_rqst; + struct evcnt ci_evcnt_synci_deferred_rqst; + struct evcnt ci_evcnt_synci_ipi_rqst; + + kcpuset_t *ci_shootdowncpus; + kcpuset_t *ci_multicastcpus; + kcpuset_t *ci_watchcpus; + kcpuset_t *ci_ddbcpus; #endif -#ifdef PPC_IBM4XX -extern int fake_mapiodev; +#if defined(GPROF) && defined(MULTIPROCESSOR) + struct gmonparam *ci_gmon; /* MI per-cpu GPROF */ #endif +}; + +#endif /* _KERNEL || _KMEMUSER */ + +#ifdef _KERNEL + +extern struct cpu_info cpu_info_store[]; +extern cpuid_t cpu_bphartid; +extern u_int cpu_hartindex[]; #ifdef MULTIPROCESSOR -#define CPU_MAXNUM 2 -#else -#define CPU_MAXNUM 1 + +void cpu_hatch(struct cpu_info *, unsigned long); + +void cpu_init_secondary_processor(u_int); +void cpu_boot_secondary_processors(void); +void cpu_mpstart(void); +bool cpu_hatched_p(u_int); + +void cpu_clr_mbox(u_int); +void cpu_set_hatched(u_int); + + +void cpu_halt(void); +void cpu_halt_others(void); +bool cpu_is_paused(cpuid_t); +void cpu_pause(void); +void cpu_pause_others(void); +void cpu_resume(cpuid_t); +void cpu_resume_others(void); +void cpu_debug_dump(void); + +extern kcpuset_t *cpus_running; +extern kcpuset_t *cpus_hatched; +extern kcpuset_t *cpus_paused; +extern kcpuset_t *cpus_resumed; +extern kcpuset_t *cpus_halted; + +/* + * definitions of cpu-dependent requirements + * referenced in generic code + */ + +/* + * Send an inter-processor interrupt to each other CPU (excludes curcpu()) + */ +void cpu_broadcast_ipi(int); + +/* + * Send an inter-processor interrupt to CPUs in kcpuset (excludes curcpu()) + */ +void cpu_multicast_ipi(const kcpuset_t *, int); + +/* + * Send an inter-processor interrupt to another CPU. + */ +int cpu_send_ipi(struct cpu_info *, int); + #endif -#endif /* _KERNEL && !_MODULE */ +struct lwp; +static inline struct cpu_info *lwp_getcpu(struct lwp *); -#include <powerpc/cpu.h> +register struct lwp *riscv_curlwp __asm("tp"); +#define curlwp riscv_curlwp +#define curcpu() lwp_getcpu(curlwp) +#define curpcb ((struct pcb *)lwp_getpcb(curlwp)) -#if defined(_KERNEL) -extern char module_machine_booke[]; +static inline cpuid_t +cpu_number(void) +{ +#ifdef MULTIPROCESSOR + return curcpu()->ci_cpuid; +#else + return 0; #endif +} + +void cpu_proc_fork(struct proc *, struct proc *); +void cpu_signotify(struct lwp *); +void cpu_need_proftick(struct lwp *l); +void cpu_boot_secondary_processors(void); + +#define CPU_INFO_ITERATOR cpuid_t +#ifdef MULTIPROCESSOR +#define CPU_IS_PRIMARY(ci) ((ci)->ci_flags & CPUF_PRIMARY) +#define CPU_INFO_FOREACH(cii, ci) \ + cii = 0, ci = &cpu_info_store[0]; \ + ci != NULL; \ + cii++, ncpu ? (ci = cpu_infos[cii]) \ + : (ci = NULL) +#else +#define CPU_IS_PRIMARY(ci) true +#define CPU_INFO_FOREACH(cii, ci) \ + (cii) = 0, (ci) = curcpu(); (cii) == 0; (cii)++ +#endif + +#define CPU_INFO_CURPMAP(ci) (curlwp->l_proc->p_vmspace->vm_map.pmap) + +static inline void +cpu_dosoftints(void) +{ + extern void dosoftints(void); + struct cpu_info * const ci = curcpu(); + if (ci->ci_intr_depth == 0 + && (ci->ci_data.cpu_softints >> ci->ci_cpl) > 0) + dosoftints(); +} + +static inline bool +cpu_intr_p(void) +{ + return curcpu()->ci_intr_depth > 0; +} + +#define LWP_PC(l) cpu_lwp_pc(l) + +vaddr_t cpu_lwp_pc(struct lwp *); + +static inline void +cpu_idle(void) +{ + asm volatile("wfi" ::: "memory"); +} + +#endif /* _KERNEL */ -#endif /* _EVBPPC_CPU_H_ */ -\ No newline at end of file +#endif /* _RISCV_CPU_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/machine/cputypes.h b/lib/libc/include/generic-netbsd/machine/cputypes.h @@ -1,4 +1,4 @@ -/* $NetBSD: cputypes.h,v 1.16.4.1 2024/10/03 16:11:36 martin Exp $ */ +/* $NetBSD: cputypes.h,v 1.20 2025/01/31 11:47:34 jmcneill Exp $ */ /* * Copyright (c) 1998, 2001 Ben Harris @@ -50,6 +50,7 @@ #define CPU_ID_BROADCOM 0x42000000 /* 'B' */ #define CPU_ID_CAVIUM 0x43000000 /* 'C' */ #define CPU_ID_DEC 0x44000000 /* 'D' */ +#define CPU_ID_FUJITSU 0x46000000 /* 'F' */ #define CPU_ID_INFINEON 0x49000000 /* 'I' */ #define CPU_ID_MOTOROLA 0x4d000000 /* 'M' */ #define CPU_ID_NVIDIA 0x4e000000 /* 'N' */ @@ -177,6 +178,11 @@ #define CPU_ID_NEOVERSEN1R3 0x413fd0c0 #define CPU_ID_NEOVERSEE1R1 0x411fd4a0 #define CPU_ID_CORTEXA77R0 0x410fd0d0 +#define CPU_ID_NEOVERSEV1R1 0x411fd400 +#define CPU_ID_CORTEXA710R2 0x412fd470 +#define CPU_ID_NEOVERSEN2R0 0x410fd490 +#define CPU_ID_CORTEXA520R0 0x410fd800 +#define CPU_ID_CORTEXA720R0 0x410fd810 #define CPU_ID_CORTEX_P(n) ((n & 0xff0fe000) == 0x410fc000) #define CPU_ID_CORTEX_A5_P(n) ((n & 0xff0ff0f0) == 0x410fc050) @@ -209,9 +215,14 @@ #define CPU_ID_THUNDERX83XXRX 0x43000a30 #define CPU_ID_THUNDERX2RX 0x43000af0 +#define CPU_ID_A64FX 0x460f0010 + #define CPU_ID_AMPERE1 0xc00fac30 #define CPU_ID_AMPERE1A 0xc00fac40 +#define CPU_ID_ORYON 0x510f0010 +#define CPU_ID_ORYON_P(n) ((n & 0xff0ffff0) == CPU_ID_ORYON) + /* * Chip-specific errata. These defines are intended to be * booleans used within if statements. When an appropriate diff --git a/lib/libc/include/generic-netbsd/machine/disklabel.h b/lib/libc/include/generic-netbsd/machine/disklabel.h @@ -1,9 +1,12 @@ -/* $NetBSD: disklabel.h,v 1.8 2013/05/16 19:06:44 christos Exp $ */ +/* $NetBSD: disklabel.h,v 1.2 2022/05/24 19:37:39 andvar Exp $ */ -/* - * Copyright (c) 1994 Christopher G. Demetriou +/*- + * Copyright (c) 2014 The NetBSD Foundation, Inc. * All rights reserved. * + * This code is derived from software contributed to The NetBSD Foundation + * by Matt Thomas of 3am Software Foundry. + * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: @@ -12,58 +15,54 @@ * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by Christopher G. Demetriou. - * 4. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. */ -#ifndef _MACHINE_DISKLABEL_H_ -#define _MACHINE_DISKLABEL_H_ +#ifndef _RISCV_DISKLABEL_H_ +#define _RISCV_DISKLABEL_H_ -#define MAXPARTITIONS 16 /* number of partitions */ -#define RAW_PART 2 /* raw partition: XX?c */ - -#ifdef EVBPPC_HAS_MBR -#define LABELUSESMBR 1 /* use MBR partitionning */ -#define LABELSECTOR 1 /* sector containing label */ -#define LABELOFFSET 0 /* offset of label in sector */ -/* Pull in MBR partition definitions. */ -#if HAVE_NBTOOL_CONFIG_H -#include <nbinclude/sys/bootblock.h> -#else -#include <sys/bootblock.h> -#endif /* HAVE_NBTOOL_CONFIG_H */ -#else -#define LABELUSESMBR 0 /* no MBR partitionning */ -#define LABELSECTOR 0 /* sector containing label */ -#define LABELOFFSET 64 /* offset of label in sector */ -#endif /* EVBPPC_HAS_MBR */ +#define LABELUSESMBR 1 /* use MBR partitionning */ +#define LABELSECTOR 1 /* sector containing label */ +#define LABELOFFSET 0 /* offset of label in sector */ +#define MAXPARTITIONS 16 /* number of partitions */ +#define RAW_PART 2 /* raw partition: XX?c */ #if HAVE_NBTOOL_CONFIG_H #include <nbinclude/sys/dkbad.h> +#include <nbinclude/sys/bootblock.h> #else #include <sys/dkbad.h> +#include <sys/bootblock.h> #endif /* HAVE_NBTOOL_CONFIG_H */ struct cpu_disklabel { -#ifdef EVBPPC_HAS_MBR struct mbr_partition mbrparts[MBR_PART_COUNT]; -#endif #define __HAVE_DISKLABEL_DKBAD - struct dkbad bad; /* bad-sector information */ + struct dkbad bad; }; -#endif /* _MACHINE_DISKLABEL_H_ */ -\ No newline at end of file +#ifdef _KERNEL +struct buf; +struct disklabel; + +/* for readdisklabel. rv != 0 -> matches, msg == NULL -> success */ +int mbr_label_read(dev_t, void (*)(struct buf *), struct disklabel *, + struct cpu_disklabel *, const char **, int *, int *); + +/* for writedisklabel. rv == 0 -> doesn't match, rv > 0 -> success */ +int mbr_label_locate(dev_t, void (*)(struct buf *), + struct disklabel *, struct cpu_disklabel *, int *, int *); +#endif /* _KERNEL */ + +#endif /* _RISCV_DISKLABEL_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/machine/elf_machdep.h b/lib/libc/include/generic-netbsd/machine/elf_machdep.h @@ -1,3 +1,144 @@ -/* $NetBSD: elf_machdep.h,v 1.1 2002/12/09 12:16:01 scw Exp $ */ +/* $NetBSD: elf_machdep.h,v 1.10 2024/08/04 08:16:25 skrll Exp $ */ -#include <powerpc/elf_machdep.h> -\ No newline at end of file +/*- + * Copyright (c) 2014 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Matt Thomas of 3am Software Foundry. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _RISCV_ELF_MACHDEP_H_ +#define _RISCV_ELF_MACHDEP_H_ + +#define ELF32_MACHDEP_ID EM_RISCV +#define ELF64_MACHDEP_ID EM_RISCV + +#define ELF32_MACHDEP_ENDIANNESS ELFDATA2LSB +#define ELF64_MACHDEP_ENDIANNESS ELFDATA2LSB + +#define ELF32_MACHDEP_ID_CASES \ + case EM_RISCV: \ + break; + +#define ELF64_MACHDEP_ID_CASES \ + case EM_RISCV: \ + break; + +#ifdef _LP64 +#define KERN_ELFSIZE 64 +#define ARCH_ELFSIZE 64 /* MD native binary size */ +#else +#define KERN_ELFSIZE 32 +#define ARCH_ELFSIZE 32 /* MD native binary size */ +#endif + +/* Processor specific flags for the ELF header e_flags field. */ + +/* Processor specific relocation types */ + +#define R_RISCV_NONE 0 +#define R_RISCV_32 1 // A +#define R_RISCV_64 2 +#define R_RISCV_RELATIVE 3 +#define R_RISCV_COPY 4 +#define R_RISCV_JMP_SLOT 5 +#define R_RISCV_TLS_DTPMOD32 6 +#define R_RISCV_TLS_DTPMOD64 7 +#define R_RISCV_TLS_DTPREL32 8 +#define R_RISCV_TLS_DTPREL64 9 +#define R_RISCV_TLS_TPREL32 10 +#define R_RISCV_TLS_TPREL64 11 + +/* The rest are not used by the dynamic linker */ +#define R_RISCV_BRANCH 16 // (A - P) & 0xffff +#define R_RISCV_JAL 17 // A & 0xff +#define R_RISCV_CALL 18 // (A - P) & 0xff +#define R_RISCV_CALL_PLT 19 +#define R_RISCV_GOT_HI20 20 +#define R_RISCV_TLS_GOT_HI20 21 +#define R_RISCV_TLS_GD_HI20 22 +#define R_RISCV_PCREL_HI20 23 +#define R_RISCV_PCREL_LO12_I 24 +#define R_RISCV_PCREL_LO12_S 25 +#define R_RISCV_HI20 26 // A & 0xffff +#define R_RISCV_LO12_I 27 // (A >> 16) & 0xffff +#define R_RISCV_LO12_S 28 // (S + A - P) >> 2 +#define R_RISCV_TPREL_HI20 29 +#define R_RISCV_TPREL_LO12_I 30 +#define R_RISCV_TPREL_LO12_S 31 +#define R_RISCV_TPREL_ADD 32 +#define R_RISCV_ADD8 33 +#define R_RISCV_ADD16 34 +#define R_RISCV_ADD32 35 +#define R_RISCV_ADD64 36 +#define R_RISCV_SUB8 37 +#define R_RISCV_SUB16 38 +#define R_RISCV_SUB32 39 +#define R_RISCV_SUB64 40 +#define R_RISCV_GNU_VTINHERIT 41 // A & 0xffff +#define R_RISCV_GNU_VTENTRY 42 +#define R_RISCV_ALIGN 43 +#define R_RISCV_RVC_BRANCH 44 +#define R_RISCV_RVC_JUMP 45 +#define R_RISCV_RVC_LUI 46 +#define R_RISCV_GPREL_I 47 +#define R_RISCV_GPREL_S 48 +#define R_RISCV_TPREL_I 49 +#define R_RISCV_TPREL_S 50 +#define R_RISCV_RELAX 51 +#define R_RISCV_SUB6 52 +#define R_RISCV_SET6 53 +#define R_RISCV_SET8 54 +#define R_RISCV_SET16 55 +#define R_RISCV_SET32 56 +#define R_RISCV_32_PCREL 57 + +/* These are aliases we can use R_TYPESZ */ +#define R_RISCV_ADDR32 R_RISCV_32 +#define R_RISCV_ADDR64 R_RISCV_64 + +#define R_TYPE(name) R_RISCV_ ## name +#if ELFSIZE == 32 +#define R_TYPESZ(name) R_RISCV_ ## name ## 32 +#else +#define R_TYPESZ(name) R_RISCV_ ## name ## 64 +#endif + +#ifdef _KERNEL +#ifdef ELFSIZE +#define ELF_MD_PROBE_FUNC ELFNAME2(cpu_netbsd,probe) +#endif + +struct exec_package; + +int cpu_netbsd_elf32_probe(struct lwp *, struct exec_package *, void *, char *, + vaddr_t *); + +int cpu_netbsd_elf64_probe(struct lwp *, struct exec_package *, void *, char *, + vaddr_t *); + +#endif /* _KERNEL */ + +#endif /* _RISCV_ELF_MACHDEP_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/machine/endian.h b/lib/libc/include/generic-netbsd/machine/endian.h @@ -1,3 +1,3 @@ -/* $NetBSD: endian.h,v 1.1 2002/12/09 12:16:02 scw Exp $ */ +/* $NetBSD: endian.h,v 1.1 2014/09/19 17:36:26 matt Exp $ */ #include <sys/endian.h> \ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/machine/fenv.h b/lib/libc/include/generic-netbsd/machine/fenv.h @@ -1,3 +1,36 @@ -/* $NetBSD: fenv.h,v 1.1 2015/12/20 16:23:39 christos Exp $ */ +/* $NetBSD: fenv.h,v 1.5 2024/05/12 20:04:12 riastradh Exp $ */ -#include <powerpc/fenv.h> -\ No newline at end of file +/* + * Based on ieeefp.h written by J.T. Conklin, Apr 28, 1995 + * Public domain. + */ + +#ifndef _RISCV_FENV_H_ +#define _RISCV_FENV_H_ + +typedef int fenv_t; /* FPSCR */ +typedef int fexcept_t; + +#define FE_INEXACT ((int)__BIT(0)) /* Result inexact */ +#define FE_UNDERFLOW ((int)__BIT(1)) /* Result underflowed */ +#define FE_OVERFLOW ((int)__BIT(2)) /* Result overflowed */ +#define FE_DIVBYZERO ((int)__BIT(3)) /* divide-by-zero */ +#define FE_INVALID ((int)__BIT(4)) /* Result invalid */ + +#define FE_ALL_EXCEPT \ + (FE_INEXACT | FE_UNDERFLOW | FE_OVERFLOW | FE_DIVBYZERO | FE_INVALID) + +#define FE_TONEAREST 0 /* round to nearest representable number */ +#define FE_TOWARDZERO 1 /* round to zero (truncate) */ +#define FE_DOWNWARD 2 /* round toward negative infinity */ +#define FE_UPWARD 3 /* round toward positive infinity */ + +__BEGIN_DECLS + +/* Default floating-point environment */ +extern const fenv_t __fe_dfl_env; +#define FE_DFL_ENV (&__fe_dfl_env) + +__END_DECLS + +#endif /* _RISCV_FENV_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/machine/float.h b/lib/libc/include/generic-netbsd/machine/float.h @@ -1,3 +1,59 @@ -/* $NetBSD: float.h,v 1.1 2002/12/09 12:16:02 scw Exp $ */ +/* $NetBSD: float.h,v 1.2 2024/10/30 15:56:11 riastradh Exp $ */ -#include <powerpc/float.h> -\ No newline at end of file +/*- + * Copyright (c) 2014 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Matt Thomas of 3am Software Foundry. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _RISCV_FLOAT_H_ +#define _RISCV_FLOAT_H_ + +#include <sys/cdefs.h> +#include <sys/featuretest.h> + +#define LDBL_MANT_DIG __LDBL_MANT_DIG__ +#define LDBL_DIG __LDBL_DIG__ +#define LDBL_MIN_EXP __LDBL_MIN_EXP__ +#define LDBL_MIN_10_EXP __LDBL_MIN_10_EXP__ +#define LDBL_MAX_EXP __LDBL_MAX_EXP__ +#define LDBL_MAX_10_EXP __LDBL_MAX_10_EXP__ +#define LDBL_EPSILON __LDBL_EPSILON__ +#define LDBL_MIN __LDBL_MIN__ +#define LDBL_MAX __LDBL_MAX__ + +#include <sys/float_ieee754.h> + +#if (!defined(_ANSI_SOURCE) && !defined(_POSIX_C_SOURCE) \ + && !defined(_XOPEN_SOURCE)) \ + || (__STDC_VERSION__ - 0) >= 199901L \ + || (_POSIX_C_SOURCE - 0) >= 200112L \ + || ((_XOPEN_SOURCE - 0) >= 600) \ + || defined(_ISOC99_SOURCE) || defined(_NETBSD_SOURCE) +#define DECIMAL_DIG __DECIMAL_DIG__ +#endif + +#endif /* !_RISCV_FLOAT_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/machine/frame.h b/lib/libc/include/generic-netbsd/machine/frame.h @@ -1,3 +1,130 @@ -/* $NetBSD: frame.h,v 1.3 2003/02/02 20:43:19 matt Exp $ */ +/* $NetBSD: frame.h,v 1.23 2022/04/02 11:16:07 skrll Exp $ */ -#include <powerpc/frame.h> -\ No newline at end of file +/* + * Copyright (c) 1994-1997 Mark Brinicombe. + * Copyright (c) 1994 Brini. + * All rights reserved. + * + * This code is derived from software written for Brini by Mark Brinicombe + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by Brini. + * 4. The name of the company nor the name of the author may be used to + * endorse or promote products derived from this software without specific + * prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ +/* + * arm/frame.h - Stack frames structures + */ + +#ifndef _ARM_FRAME_H_ +#define _ARM_FRAME_H_ + +#ifndef _LOCORE + +#include <sys/signal.h> +#include <sys/ucontext.h> + +/* + * Trap frame. Pushed onto the kernel stack on a trap (synchronous exception). + */ + +typedef struct trapframe { + register_t tf_spsr; + register_t tf_fill; /* fill here so r0 will be dword aligned */ + register_t tf_r0; + register_t tf_r1; + register_t tf_r2; + register_t tf_r3; + register_t tf_r4; + register_t tf_r5; + register_t tf_r6; + register_t tf_r7; + register_t tf_r8; + register_t tf_r9; + register_t tf_r10; + register_t tf_r11; + register_t tf_r12; + register_t tf_usr_sp; + register_t tf_usr_lr; + register_t tf_svc_sp; + register_t tf_svc_lr; + register_t tf_pc; +} trapframe_t; + +/* Register numbers */ +#define tf_ip tf_r12 +#define tf_r13 tf_usr_sp +#define tf_r14 tf_usr_lr +#define tf_r15 tf_pc + +#define TRAP_USERMODE(tf) (((tf)->tf_spsr & PSR_MODE) == PSR_USR32_MODE) + +#define FB_R4 0 +#define FB_R5 1 +#define FB_R6 2 +#define FB_R7 3 +#define FB_R8 4 +#define FB_R9 5 +#define FB_R10 6 +#define FB_R11 7 +#define FB_R12 8 +#define FB_R13 9 +#define FB_R14 10 +#define FB_MAX 11 +struct faultbuf { + register_t fb_reg[FB_MAX]; +}; + +/* + * Signal frame. Pushed onto user stack before calling sigcode. + */ +#ifdef COMPAT_16 +struct sigframe_sigcontext { + struct sigcontext sf_sc; +}; +#endif + +/* the pointers are use in the trampoline code to locate the ucontext */ +struct sigframe_siginfo { + siginfo_t sf_si; /* actual saved siginfo */ + ucontext_t sf_uc; /* actual saved ucontext */ +}; + +#if defined(_KERNEL) || defined(_KMEMUSER) +#ifdef _KERNEL +__BEGIN_DECLS +void sendsig_sigcontext(const ksiginfo_t *, const sigset_t *); +void *getframe(struct lwp *, int, int *); +__END_DECLS +#define lwp_settrapframe(l, tf) ((l)->l_md.md_tf = (tf)) +#endif +#define lwp_trapframe(l) ((l)->l_md.md_tf) +#endif /* _KERNEL || _KMEMUSER */ + +#endif /* _LOCORE */ + +#endif /* _ARM_FRAME_H_ */ + +/* End of frame.h */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/machine/ieee.h b/lib/libc/include/generic-netbsd/machine/ieee.h @@ -1,3 +1,4 @@ -/* $NetBSD: ieee.h,v 1.1 2002/12/09 12:16:04 scw Exp $ */ +/* $NetBSD: ieee.h,v 1.2 2019/04/13 15:57:31 maya Exp $ */ -#include <powerpc/ieee.h> -\ No newline at end of file +#include <riscv/math.h> /* for #define __HAVE_LONG_DOUBLE 128 */ +#include <sys/ieee754.h> +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/machine/ieeefp.h b/lib/libc/include/generic-netbsd/machine/ieeefp.h @@ -1,3 +1,44 @@ -/* $NetBSD: ieeefp.h,v 1.1 2002/12/09 12:16:04 scw Exp $ */ +/* $NetBSD: ieeefp.h,v 1.2 2020/03/14 16:12:16 skrll Exp $ */ -#include <powerpc/ieeefp.h> -\ No newline at end of file +/* + * Based on ieeefp.h written by J.T. Conklin, Apr 28, 1995 + * Public domain. + */ + +#ifndef _RISCV_IEEEFP_H_ +#define _RISCV_IEEEFP_H_ + +#include <sys/featuretest.h> + +#if defined(_NETBSD_SOURCE) || defined(_ISOC99_SOURCE) + +#include <riscv/fenv.h> + +#if !defined(_ISOC99_SOURCE) + +/* Exception type (used by fpsetmask() et al.) */ + +typedef int fp_except; + +/* Bit defines for fp_except */ + +#define FP_X_INV FE_INVALID /* invalid operation exception */ +#define FP_X_DZ FE_DIVBYZERO /* divide-by-zero exception */ +#define FP_X_OFL FE_OVERFLOW /* overflow exception */ +#define FP_X_UFL FE_UNDERFLOW /* underflow exception */ +#define FP_X_IMP FE_INEXACT /* imprecise (prec. loss; "inexact") */ + +/* Rounding modes */ + +typedef enum { + FP_RN=FE_TONEAREST, /* round to nearest representable number */ + FP_RP=FE_UPWARD, /* round toward positive infinity */ + FP_RM=FE_DOWNWARD, /* round toward negative infinity */ + FP_RZ=FE_TOWARDZERO /* round to zero (truncate) */ +} fp_rnd; + +#endif /* !_ISOC99_SOURCE */ + +#endif /* _NETBSD_SOURCE || _ISOC99_SOURCE */ + +#endif /* _RISCV_IEEEFP_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/machine/int_const.h b/lib/libc/include/generic-netbsd/machine/int_const.h @@ -1,3 +1,33 @@ -/* $NetBSD: int_const.h,v 1.1 2002/12/09 12:16:04 scw Exp $ */ +/* $NetBSD: int_const.h,v 1.3 2025/01/12 09:05:28 skrll Exp $ */ -#include <powerpc/int_const.h> -\ No newline at end of file +#ifndef __INTMAX_C_SUFFIX__ + +#define __INT8_C_SUFFIX__ +#define __INT16_C_SUFFIX__ +#define __INT32_C_SUFFIX__ +#ifdef _LP64 +#define __INT64_C_SUFFIX__ L +#else +#define __INT64_C_SUFFIX__ LL +#endif + +#define __UINT8_C_SUFFIX__ +#define __UINT16_C_SUFFIX__ +#define __UINT32_C_SUFFIX__ U +#ifdef _LP64 +#define __UINT64_C_SUFFIX__ UL +#else +#define __UINT64_C_SUFFIX__ ULL +#endif + +#ifdef _LP64 +#define __INTMAX_C_SUFFIX__ L +#define __UINTMAX_C_SUFFIX__ UL +#else +#define __INTMAX_C_SUFFIX__ LL +#define __UINTMAX_C_SUFFIX__ ULL +#endif + +#endif + +#include <sys/common_int_const.h> +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/machine/int_fmtio.h b/lib/libc/include/generic-netbsd/machine/int_fmtio.h @@ -1,3 +1,381 @@ -/* $NetBSD: int_fmtio.h,v 1.1 2002/12/09 12:16:04 scw Exp $ */ +/* $NetBSD: int_fmtio.h,v 1.4 2019/04/17 11:01:19 mrg Exp $ */ -#include <powerpc/int_fmtio.h> -\ No newline at end of file +/*- + * Copyright (c) 2001 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Klaus Klein. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _RISCV_INT_FMTIO_H_ +#define _RISCV_INT_FMTIO_H_ + +#ifdef __INTPTR_FMTd__ +#include <sys/common_int_fmtio.h> +#else +/* + * 7.8.1 Macros for format specifiers + */ + +/* fprintf macros for signed integers */ +#define PRId8 "hhd" /* int8_t */ +#define PRId16 "hd" /* int16_t */ +#define PRId32 "d" /* int32_t */ +#ifdef _LP64 +#define PRId64 "ld" /* int64_t */ +#else +#define PRId64 "lld" /* int64_t */ +#endif +#define PRIdLEAST8 "hhd" /* int_least8_t */ +#define PRIdLEAST16 "hd" /* int_least16_t */ +#define PRIdLEAST32 "d" /* int_least32_t */ +#ifdef _LP64 +#define PRIdLEAST64 "ld" /* int_least64_t */ +#define PRIdFAST8 "d" /* int_fast8_t */ +#define PRIdFAST16 "d" /* int_fast16_t */ +#else +#define PRIdLEAST64 "lld" /* int_least64_t */ +#define PRIdFAST8 "hhd" /* int_fast8_t */ +#define PRIdFAST16 "hd" /* int_fast16_t */ +#endif +#define PRIdFAST32 "d" /* int_fast32_t */ +#ifdef _LP64 +#define PRIdFAST64 "ld" /* int_fast64_t */ +#define PRIdMAX "ld" /* intmax_t */ +#else +#define PRIdFAST64 "lld" /* int_fast64_t */ +#define PRIdMAX "lld" /* intmax_t */ +#endif +#define PRIdPTR "ld" /* intptr_t */ + +#define PRIi8 "hhi" /* int8_t */ +#define PRIi16 "hi" /* int16_t */ +#define PRIi32 "i" /* int32_t */ +#ifdef _LP64 +#define PRIi64 "li" /* int64_t */ +#else +#define PRIi64 "lli" /* int64_t */ +#endif +#define PRIiLEAST8 "hhi" /* int_least8_t */ +#define PRIiLEAST16 "hi" /* int_least16_t */ +#define PRIiLEAST32 "i" /* int_least32_t */ +#ifdef _LP64 +#define PRIiLEAST64 "li" /* int_least64_t */ +#define PRIiFAST8 "i" /* int_fast8_t */ +#define PRIiFAST16 "i" /* int_fast16_t */ +#else +#define PRIiLEAST64 "lli" /* int_least64_t */ +#define PRIiFAST8 "hhi" /* int_fast8_t */ +#define PRIiFAST16 "hi" /* int_fast16_t */ +#endif +#define PRIiFAST32 "i" /* int_fast32_t */ +#ifdef _LP64 +#define PRIiFAST64 "li" /* int_fast64_t */ +#define PRIiMAX "li" /* intmax_t */ +#else +#define PRIiFAST64 "lli" /* int_fast64_t */ +#define PRIiMAX "lli" /* intmax_t */ +#endif +#define PRIiPTR "li" /* intptr_t */ + +/* fprintf macros for unsigned integers */ + +#define PRIo8 "hho" /* uint8_t */ +#define PRIo16 "ho" /* uint16_t */ +#define PRIo32 "o" /* uint32_t */ +#ifdef _LP64 +#define PRIo64 "lo" /* uint64_t */ +#else +#define PRIo64 "llo" /* uint64_t */ +#endif +#define PRIoLEAST8 "o" /* uint_least8_t */ +#define PRIoLEAST16 "hho" /* uint_least16_t */ +#define PRIoLEAST32 "ho" /* uint_least32_t */ +#ifdef _LP64 +#define PRIoLEAST64 "lo" /* uint_least64_t */ +#define PRIoFAST8 "o" /* uint_fast8_t */ +#define PRIoFAST16 "o" /* uint_fast16_t */ +#else +#define PRIoLEAST64 "llo" /* uint_least64_t */ +#define PRIoFAST8 "hho" /* uint_fast8_t */ +#define PRIoFAST16 "ho" /* uint_fast16_t */ +#endif +#define PRIoFAST32 "o" /* uint_fast32_t */ +#ifdef _LP64 +#define PRIoFAST64 "lo" /* uint_fast64_t */ +#define PRIoMAX "lo" /* uintmax_t */ +#else +#define PRIoFAST64 "llo" /* uint_fast64_t */ +#define PRIoMAX "llo" /* uintmax_t */ +#endif +#define PRIoPTR "lo" /* uintptr_t */ + +#define PRIu8 "hhu" /* uint8_t */ +#define PRIu16 "hu" /* uint16_t */ +#define PRIu32 "u" /* uint32_t */ +#ifdef _LP64 +#define PRIu64 "lu" /* uint64_t */ +#else +#define PRIu64 "llu" /* uint64_t */ +#endif +#define PRIuLEAST8 "hhu" /* uint_least8_t */ +#define PRIuLEAST16 "hu" /* uint_least16_t */ +#define PRIuLEAST32 "u" /* uint_least32_t */ +#ifdef _LP64 +#define PRIuLEAST64 "lu" /* uint_least64_t */ +#define PRIuFAST8 "u" /* uint_fast8_t */ +#define PRIuFAST16 "u" /* uint_fast16_t */ +#else +#define PRIuLEAST64 "llu" /* uint_least64_t */ +#define PRIuFAST8 "hhu" /* uint_fast8_t */ +#define PRIuFAST16 "hu" /* uint_fast16_t */ +#endif +#define PRIuFAST32 "u" /* uint_fast32_t */ +#ifdef _LP64 +#define PRIuFAST64 "lu" /* uint_fast64_t */ +#define PRIuMAX "lu" /* uintmax_t */ +#else +#define PRIuFAST64 "llu" /* uint_fast64_t */ +#define PRIuMAX "llu" /* uintmax_t */ +#endif +#define PRIuPTR "lu" /* uintptr_t */ + +#define PRIx8 "hhx" /* uint8_t */ +#define PRIx16 "hx" /* uint16_t */ +#define PRIx32 "x" /* uint32_t */ +#ifdef _LP64 +#define PRIx64 "lx" /* uint64_t */ +#else +#define PRIx64 "llx" /* uint64_t */ +#endif +#define PRIxLEAST8 "x" /* uint_least8_t */ +#define PRIxLEAST16 "x" /* uint_least16_t */ +#define PRIxLEAST32 "x" /* uint_least32_t */ +#ifdef _LP64 +#define PRIxLEAST64 "lx" /* uint_least64_t */ +#define PRIxFAST8 "x" /* uint_fast8_t */ +#define PRIxFAST16 "x" /* uint_fast16_t */ +#else +#define PRIxLEAST64 "llx" /* uint_least64_t */ +#define PRIxFAST8 "hhx" /* uint_fast8_t */ +#define PRIxFAST16 "hx" /* uint_fast16_t */ +#endif +#define PRIxFAST32 "x" /* uint_fast32_t */ +#ifdef _LP64 +#define PRIxFAST64 "lx" /* uint_fast64_t */ +#define PRIxMAX "lx" /* uintmax_t */ +#else +#define PRIxFAST64 "llx" /* uint_fast64_t */ +#define PRIxMAX "llx" /* uintmax_t */ +#endif +#define PRIxPTR "lx" /* uintptr_t */ + +#define PRIX8 "hhX" /* uint8_t */ +#define PRIX16 "hX" /* uint16_t */ +#define PRIX32 "X" /* uint32_t */ +#ifdef _LP64 +#define PRIX64 "lX" /* uint64_t */ +#else +#define PRIX64 "llX" /* uint64_t */ +#endif +#define PRIXLEAST8 "X" /* uint_least8_t */ +#define PRIXLEAST16 "X" /* uint_least16_t */ +#define PRIXLEAST32 "X" /* uint_least32_t */ +#ifdef _LP64 +#define PRIXLEAST64 "lX" /* uint_least64_t */ +#define PRIXFAST8 "X" /* uint_fast8_t */ +#define PRIXFAST16 "X" /* uint_fast16_t */ +#else +#define PRIXLEAST64 "llX" /* uint_least64_t */ +#define PRIXFAST8 "hhX" /* uint_fast8_t */ +#define PRIXFAST16 "hX" /* uint_fast16_t */ +#endif +#define PRIXFAST32 "X" /* uint_fast32_t */ +#ifdef _LP64 +#define PRIXFAST64 "lX" /* uint_fast64_t */ +#define PRIXMAX "lX" /* uintmax_t */ +#else +#define PRIXFAST64 "llX" /* uint_fast64_t */ +#define PRIXMAX "llX" /* uintmax_t */ +#endif +#define PRIXPTR "lX" /* uintptr_t */ + +/* fscanf macros for signed integers */ + +#define SCNd8 "hhd" /* int8_t */ +#define SCNd16 "hd" /* int16_t */ +#define SCNd32 "d" /* int32_t */ +#ifdef _LP64 +#define SCNd64 "ld" /* int64_t */ +#else +#define SCNd64 "lld" /* int64_t */ +#endif +#define SCNdLEAST8 "hhd" /* int_least8_t */ +#define SCNdLEAST16 "hd" /* int_least16_t */ +#define SCNdLEAST32 "d" /* int_least32_t */ +#ifdef _LP64 +#define SCNdLEAST64 "ld" /* int_least64_t */ +#define SCNdFAST8 "d" /* int_fast8_t */ +#define SCNdFAST16 "d" /* int_fast16_t */ +#else +#define SCNdLEAST64 "lld" /* int_least64_t */ +#define SCNdFAST8 "hhd" /* int_fast8_t */ +#define SCNdFAST16 "hd" /* int_fast16_t */ +#endif +#define SCNdFAST32 "d" /* int_fast32_t */ +#ifdef _LP64 +#define SCNdFAST64 "ld" /* int_fast64_t */ +#define SCNdMAX "ld" /* intmax_t */ +#else +#define SCNdFAST64 "lld" /* int_fast64_t */ +#define SCNdMAX "lld" /* intmax_t */ +#endif +#define SCNdPTR "ld" /* intptr_t */ + +#define SCNi8 "hhi" /* int8_t */ +#define SCNi16 "hi" /* int16_t */ +#define SCNi32 "i" /* int32_t */ +#ifdef _LP64 +#define SCNi64 "li" /* int64_t */ +#else +#define SCNi64 "lli" /* int64_t */ +#endif +#define SCNiLEAST8 "hhi" /* int_least8_t */ +#define SCNiLEAST16 "hi" /* int_least16_t */ +#define SCNiLEAST32 "i" /* int_least32_t */ +#ifdef _LP64 +#define SCNiLEAST64 "li" /* int_least64_t */ +#define SCNiFAST8 "i" /* int_fast8_t */ +#define SCNiFAST16 "i" /* int_fast16_t */ +#else +#define SCNiLEAST64 "lli" /* int_least64_t */ +#define SCNiFAST8 "hhi" /* int_fast8_t */ +#define SCNiFAST16 "hi" /* int_fast16_t */ +#endif +#define SCNiFAST32 "i" /* int_fast32_t */ +#ifdef _LP64 +#define SCNiFAST64 "li" /* int_fast64_t */ +#define SCNiMAX "li" /* intmax_t */ +#else +#define SCNiFAST64 "lli" /* int_fast64_t */ +#define SCNiMAX "lli" /* intmax_t */ +#endif +#define SCNiPTR "li" /* intptr_t */ + +/* fscanf macros for unsigned integers */ + +#define SCNo8 "hho" /* uint8_t */ +#define SCNo16 "ho" /* uint16_t */ +#define SCNo32 "o" /* uint32_t */ +#ifdef _LP64 +#define SCNo64 "lo" /* uint64_t */ +#else +#define SCNo64 "llo" /* uint64_t */ +#endif +#define SCNoLEAST8 "hho" /* uint_least8_t */ +#define SCNoLEAST16 "ho" /* uint_least16_t */ +#define SCNoLEAST32 "o" /* uint_least32_t */ +#ifdef _LP64 +#define SCNoLEAST64 "lo" /* uint_least64_t */ +#define SCNoFAST8 "o" /* uint_fast8_t */ +#define SCNoFAST16 "o" /* uint_fast16_t */ +#else +#define SCNoLEAST64 "llo" /* uint_least64_t */ +#define SCNoFAST8 "hho" /* uint_fast8_t */ +#define SCNoFAST16 "ho" /* uint_fast16_t */ +#endif +#define SCNoFAST32 "o" /* uint_fast32_t */ +#ifdef _LP64 +#define SCNoFAST64 "lo" /* uint_fast64_t */ +#define SCNoMAX "lo" /* uintmax_t */ +#else +#define SCNoFAST64 "llo" /* uint_fast64_t */ +#define SCNoMAX "llo" /* uintmax_t */ +#endif +#define SCNoPTR "lo" /* uintptr_t */ + +#define SCNu8 "hhu" /* uint8_t */ +#define SCNu16 "hu" /* uint16_t */ +#define SCNu32 "u" /* uint32_t */ +#ifdef _LP64 +#define SCNu64 "lu" /* uint64_t */ +#else +#define SCNu64 "llu" /* uint64_t */ +#endif +#define SCNuLEAST8 "hhu" /* uint_least8_t */ +#define SCNuLEAST16 "hu" /* uint_least16_t */ +#define SCNuLEAST32 "u" /* uint_least32_t */ +#ifdef _LP64 +#define SCNuLEAST64 "lu" /* uint_least64_t */ +#define SCNuFAST8 "u" /* uint_fast8_t */ +#define SCNuFAST16 "u" /* uint_fast16_t */ +#else +#define SCNuLEAST64 "llu" /* uint_least64_t */ +#define SCNuFAST8 "hhu" /* uint_fast8_t */ +#define SCNuFAST16 "hu" /* uint_fast16_t */ +#endif +#define SCNuFAST32 "u" /* uint_fast32_t */ +#ifdef _LP64 +#define SCNuFAST64 "lu" /* uint_fast64_t */ +#define SCNuMAX "lu" /* uintmax_t */ +#else +#define SCNuFAST64 "llu" /* uint_fast64_t */ +#define SCNuMAX "llu" /* uintmax_t */ +#endif +#define SCNuPTR "lu" /* uintptr_t */ + +#define SCNx8 "hhx" /* uint8_t */ +#define SCNx16 "hx" /* uint16_t */ +#define SCNx32 "x" /* uint32_t */ +#ifdef _LP64 +#define SCNx64 "lx" /* uint64_t */ +#else +#define SCNx64 "llx" /* uint64_t */ +#endif +#define SCNxLEAST8 "hhx" /* uint_least8_t */ +#define SCNxLEAST16 "hx" /* uint_least16_t */ +#define SCNxLEAST32 "x" /* uint_least32_t */ +#ifdef _LP64 +#define SCNxLEAST64 "lx" /* uint_least64_t */ +#define SCNxFAST8 "x" /* uint_fast8_t */ +#define SCNxFAST16 "x" /* uint_fast16_t */ +#else +#define SCNxLEAST64 "llx" /* uint_least64_t */ +#define SCNxFAST8 "hhx" /* uint_fast8_t */ +#define SCNxFAST16 "hx" /* uint_fast16_t */ +#endif +#define SCNxFAST32 "x" /* uint_fast32_t */ +#ifdef _LP64 +#define SCNxFAST64 "lx" /* uint_fast64_t */ +#define SCNxMAX "lx" /* uintmax_t */ +#else +#define SCNxFAST64 "llx" /* uint_fast64_t */ +#define SCNxMAX "llx" /* uintmax_t */ +#endif +#define SCNxPTR "lx" /* uintptr_t */ + +#endif /* !__INTPTR_FMTd__ */ + +#endif /* !_RISCV_INT_FMTIO_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/machine/int_limits.h b/lib/libc/include/generic-netbsd/machine/int_limits.h @@ -1,3 +1,3 @@ -/* $NetBSD: int_limits.h,v 1.1 2002/12/09 12:16:05 scw Exp $ */ +/* $NetBSD: int_limits.h,v 1.1 2014/09/19 17:36:26 matt Exp $ */ -#include <powerpc/int_limits.h> -\ No newline at end of file +#include <sys/common_int_limits.h> +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/machine/int_mwgwtypes.h b/lib/libc/include/generic-netbsd/machine/int_mwgwtypes.h @@ -1,3 +1,3 @@ -/* $NetBSD: int_mwgwtypes.h,v 1.1 2002/12/09 12:16:05 scw Exp $ */ +/* $NetBSD: int_mwgwtypes.h,v 1.1 2014/09/19 17:36:26 matt Exp $ */ -#include <powerpc/int_mwgwtypes.h> -\ No newline at end of file +#include <sys/common_int_mwgwtypes.h> +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/machine/int_types.h b/lib/libc/include/generic-netbsd/machine/int_types.h @@ -1,3 +1,3 @@ -/* $NetBSD: int_types.h,v 1.1 2002/12/09 12:16:06 scw Exp $ */ +/* $NetBSD: int_types.h,v 1.1 2014/09/19 17:36:26 matt Exp $ */ -#include <powerpc/int_types.h> -\ No newline at end of file +#include <sys/common_int_types.h> +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/machine/kcore.h b/lib/libc/include/generic-netbsd/machine/kcore.h @@ -1,3 +1,40 @@ -/* $NetBSD: kcore.h,v 1.1 2002/12/09 12:16:07 scw Exp $ */ +/* $NetBSD: kcore.h,v 1.1 2014/09/19 17:36:26 matt Exp $ */ -#include <powerpc/kcore.h> -\ No newline at end of file +/*- + * Copyright (c) 2014 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Matt Thomas of 3am Software Foundry. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _RISCV_KCORE_H_ +#define _RISCV_KCORE_H_ + +typedef struct cpu_kcore_hdr { + uint64_t kh_misc[8]; + phys_ram_seg_t kh_ramsegs[0]; +} cpu_kcore_hdr_t; + +#endif /* _RISCV_KCORE_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/machine/limits.h b/lib/libc/include/generic-netbsd/machine/limits.h @@ -1,3 +1,3 @@ -/* $NetBSD: limits.h,v 1.1 2002/12/09 12:16:07 scw Exp $ */ +/* $NetBSD: limits.h,v 1.1 2014/09/19 17:36:26 matt Exp $ */ -#include <powerpc/limits.h> -\ No newline at end of file +#include <sys/common_limits.h> +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/machine/lock.h b/lib/libc/include/generic-netbsd/machine/lock.h @@ -1,3 +1,3 @@ -/* $NetBSD: lock.h,v 1.1 2002/12/09 12:16:08 scw Exp $ */ +/* $NetBSD: lock.h,v 1.4 2015/06/26 14:27:35 matt Exp $ */ -#include <powerpc/lock.h> -\ No newline at end of file +#include <sys/common_lock.h> +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/machine/lwp_private.h b/lib/libc/include/generic-netbsd/machine/lwp_private.h @@ -0,0 +1,83 @@ +/* $NetBSD: lwp_private.h,v 1.1 2024/11/30 01:04:13 christos Exp $ */ + +/*- + * Copyright (c) 2014 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Matt Thomas of 3am Software Foundry. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ +#ifndef _RISCV_LWP_PRIVATE_H_ +#define _RISCV_LWP_PRIVATE_H_ + +#include <sys/cdefs.h> +#include <sys/tls.h> + +/* + * On RISCV, since displacements are signed 12-bit values, the TCB Pointer + * is biased by sizeof(tcb) so that first thread datum can be addressed by + * -sizeof(tcb). + */ + +#define TLS_TP_OFFSET 0x0 +#define TLS_TCB_ALIGN 16 +#define TLS_DTV_OFFSET 0x800 +__CTASSERT(TLS_TP_OFFSET + sizeof(struct tls_tcb) < 0x800); + +__BEGIN_DECLS + +static __inline void * +__lwp_getprivate_fast(void) +{ + void *__tp; + __asm("mv %0, tp" : "=r"(__tp)); + return __tp; +} + +static __inline void * +__lwp_gettcb_fast(void) +{ + void *__tcb; + + __asm __volatile( + "addi %[__tcb], tp, %[__offset]" + : [__tcb] "=r" (__tcb) + : [__offset] "n" (-(TLS_TP_OFFSET + sizeof(struct tls_tcb)))); + + return __tcb; +} + +static __inline void +__lwp_settcb(void *__tcb) +{ + __asm __volatile( + "addi tp, %[__tcb], %[__offset]" + : + : [__tcb] "r" (__tcb), + [__offset] "n" (TLS_TP_OFFSET + sizeof(struct tls_tcb))); +} + +__END_DECLS + +#endif /* !_RISCV_LWP_PRIVATE_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/machine/math.h b/lib/libc/include/generic-netbsd/machine/math.h @@ -1,3 +1,4 @@ -/* $NetBSD: math.h,v 1.1 2002/12/09 12:16:09 scw Exp $ */ +/* $NetBSD: math.h,v 1.3 2019/04/16 07:40:02 maya Exp $ */ -#include <powerpc/math.h> -\ No newline at end of file +#define __HAVE_NANF +#define __HAVE_LONG_DOUBLE 128 +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/machine/mcontext.h b/lib/libc/include/generic-netbsd/machine/mcontext.h @@ -1,3 +1,150 @@ -/* $NetBSD: mcontext.h,v 1.2 2003/01/17 22:48:43 thorpej Exp $ */ +/* $NetBSD: mcontext.h,v 1.12 2024/11/30 01:04:13 christos Exp $ */ -#include <powerpc/mcontext.h> -\ No newline at end of file +/*- + * Copyright (c) 2014 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Matt Thomas of 3am Software Foundry. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ +#ifndef _RISCV_MCONTEXT_H_ +#define _RISCV_MCONTEXT_H_ + +/* + */ + +#define _NGREG 32 /* GR1-31 */ +#define _NFREG 33 /* F0-31, FCSR */ + +/* + * This fragment is common to <riscv/mcontext.h> and <riscv/reg.h> + */ +#ifndef _BSD_FPREG_T_ +union __fpreg { + __uint64_t u_u64; + double u_d; +}; +#define _BSD_FPREG_T_ union __fpreg +#endif + +typedef long __greg_t; +typedef __greg_t __gregset_t[_NGREG]; +typedef __uint32_t __greg32_t; +typedef __greg32_t __gregset32_t[_NGREG]; +typedef _BSD_FPREG_T_ __fregset_t[_NFREG]; + +#define _REG_X1 0 +#define _REG_X2 1 +#define _REG_X3 2 +#define _REG_X4 3 +#define _REG_X5 4 +#define _REG_X6 5 +#define _REG_X7 6 +#define _REG_X8 7 +#define _REG_X9 8 +#define _REG_X10 9 +#define _REG_X11 10 +#define _REG_X12 11 +#define _REG_X13 12 +#define _REG_X14 13 +#define _REG_X15 14 +#define _REG_X16 15 +#define _REG_X17 16 +#define _REG_X18 17 +#define _REG_X19 18 +#define _REG_X20 19 +#define _REG_X21 20 +#define _REG_X22 21 +#define _REG_X23 22 +#define _REG_X24 23 +#define _REG_X25 24 +#define _REG_X26 25 +#define _REG_X27 26 +#define _REG_X28 27 +#define _REG_X29 28 +#define _REG_X30 29 +#define _REG_X31 30 +#define _REG_PC 31 + +#define _REG_RA _REG_X1 +#define _REG_SP _REG_X2 +#define _REG_GP _REG_X3 +#define _REG_TP _REG_X4 +#define _REG_T0 _REG_X5 +#define _REG_T1 _REG_X6 +#define _REG_T2 _REG_X7 +#define _REG_S0 _REG_X8 +#define _REG_S1 _REG_X9 +#define _REG_RV _REG_X10 +#define _REG_A0 _REG_X10 +#define _REG_A1 _REG_X11 +#define _REG_A2 _REG_X12 +#define _REG_A3 _REG_X13 +#define _REG_A4 _REG_X14 +#define _REG_A5 _REG_X15 +#define _REG_A6 _REG_X16 +#define _REG_A7 _REG_X17 +#define _REG_S2 _REG_X18 +#define _REG_S3 _REG_X19 +#define _REG_S4 _REG_X20 +#define _REG_S5 _REG_X21 +#define _REG_S6 _REG_X22 +#define _REG_S7 _REG_X23 +#define _REG_S8 _REG_X24 +#define _REG_S9 _REG_X25 +#define _REG_S10 _REG_X26 +#define _REG_S11 _REG_X27 +#define _REG_T3 _REG_X28 +#define _REG_T4 _REG_X29 +#define _REG_T5 _REG_X30 +#define _REG_T6 _REG_X31 + +#define _REG_F0 0 +#define _REG_FPCSR 32 + +typedef struct { + __gregset_t __gregs; /* General Purpose Register set */ + __fregset_t __fregs; /* Floating Point Register set */ + __greg_t __spare[7]; /* future proof */ +} mcontext_t; + +typedef struct { + __gregset32_t __gregs; /* General Purpose Register set */ + __fregset_t __fregs; /* Floating Point Register set */ + __greg32_t __spare[7]; /* future proof */ +} mcontext32_t; + +/* Machine-dependent uc_flags */ +#define _UC_SETSTACK 0x00010000 /* see <sys/ucontext.h> */ +#define _UC_CLRSTACK 0x00020000 /* see <sys/ucontext.h> */ +#define _UC_TLSBASE 0x00080000 /* see <sys/ucontext.h> */ + +#define _UC_MACHINE_SP(uc) ((uc)->uc_mcontext.__gregs[_REG_SP]) +#define _UC_MACHINE_FP(uc) ((uc)->uc_mcontext.__gregs[_REG_S0]) +#define _UC_MACHINE_PC(uc) ((uc)->uc_mcontext.__gregs[_REG_PC]) +#define _UC_MACHINE_INTRV(uc) ((uc)->uc_mcontext.__gregs[_REG_RV]) + +#define _UC_MACHINE_SET_PC(uc, pc) _UC_MACHINE_PC(uc) = (pc) + +#endif /* !_RISCV_MCONTEXT_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/machine/mutex.h b/lib/libc/include/generic-netbsd/machine/mutex.h @@ -1,3 +1,128 @@ -/* $NetBSD: mutex.h,v 1.2 2007/02/09 21:55:03 ad Exp $ */ +/* $NetBSD: mutex.h,v 1.7 2024/11/25 22:04:14 skrll Exp $ */ -#include <powerpc/mutex.h> -\ No newline at end of file +/*- + * Copyright (c) 2002, 2007 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Jason R. Thorpe and Andrew Doran. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _RISCV_MUTEX_H_ +#define _RISCV_MUTEX_H_ + +#include <sys/types.h> + +#ifndef __MUTEX_PRIVATE + +struct kmutex { + uintptr_t mtx_pad1; +}; + +#else /* __MUTEX_PRIVATE */ + +#include <sys/cdefs.h> + +#include <sys/param.h> + +#include <machine/intr.h> + +struct kmutex { + volatile uintptr_t mtx_owner; +}; + +#ifdef _KERNEL + +#ifdef _LP64 +#define MTX_ASMOP_SFX ".d" // doubleword atomic op +#else +#define MTX_ASMOP_SFX ".w" // word atomic op +#endif + +#define MTX_LOCK __BIT(8) // just one bit +#define MTX_IPL __BITS(7,4) // only need 4 bits + +#undef MUTEX_SPIN_IPL // override <sys/mutex.h> +#define MUTEX_SPIN_IPL(a) riscv_mutex_spin_ipl(a) +#define MUTEX_INITIALIZE_SPIN_IPL(a,b) riscv_mutex_initialize_spin_ipl(a,b) +#define MUTEX_SPINBIT_LOCK_INIT(a) riscv_mutex_spinbit_lock_init(a) +#define MUTEX_SPINBIT_LOCK_TRY(a) riscv_mutex_spinbit_lock_try(a) +#define MUTEX_SPINBIT_LOCKED_P(a) riscv_mutex_spinbit_locked_p(a) +#define MUTEX_SPINBIT_LOCK_UNLOCK(a) riscv_mutex_spinbit_lock_unlock(a) + +static inline ipl_cookie_t +riscv_mutex_spin_ipl(kmutex_t *__mtx) +{ + return (ipl_cookie_t){._spl = __SHIFTOUT(__mtx->mtx_owner, MTX_IPL)}; +} + +static inline void +riscv_mutex_initialize_spin_ipl(kmutex_t *__mtx, int ipl) +{ + __mtx->mtx_owner = (__mtx->mtx_owner & ~MTX_IPL) + | __SHIFTIN(ipl, MTX_IPL); +} + +static inline void +riscv_mutex_spinbit_lock_init(kmutex_t *__mtx) +{ + __mtx->mtx_owner &= ~MTX_LOCK; +} + +static inline bool +riscv_mutex_spinbit_locked_p(const kmutex_t *__mtx) +{ + return (__mtx->mtx_owner & MTX_LOCK) != 0; +} + +static inline bool +riscv_mutex_spinbit_lock_try(kmutex_t *__mtx) +{ + uintptr_t __old; + __asm __volatile( + "amoor" MTX_ASMOP_SFX ".aq\t%0, %1, (%2)" + : "=r"(__old) + : "r"(MTX_LOCK), "r"(__mtx)); + return (__old & MTX_LOCK) == 0; +} + +static inline void +riscv_mutex_spinbit_lock_unlock(kmutex_t *__mtx) +{ + __asm __volatile( + "amoand" MTX_ASMOP_SFX ".rl\tx0, %0, (%1)" + :: "r"(~MTX_LOCK), "r"(__mtx)); +} + +#endif /* _KERNEL */ + +#if 0 +#define __HAVE_MUTEX_STUBS 1 +#define __HAVE_SPIN_MUTEX_STUBS 1 +#endif +#define __HAVE_SIMPLE_MUTEXES 1 + +#endif /* __MUTEX_PRIVATE */ + +#endif /* _RISCV_MUTEX_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/machine/param.h b/lib/libc/include/generic-netbsd/machine/param.h @@ -1,10 +1,12 @@ -/* $NetBSD: param.h,v 1.3 2011/06/20 06:29:53 matt Exp $ */ +/* $NetBSD: param.h,v 1.8 2023/05/07 12:41:48 skrll Exp $ */ /*- - * Copyright (C) 1995, 1996 Wolfgang Solfrank. - * Copyright (C) 1995, 1996 TooLs GmbH. + * Copyright (c) 2014 The NetBSD Foundation, Inc. * All rights reserved. * + * This code is derived from software contributed to The NetBSD Foundation + * by Matt Thomas of 3am Software Foundry. + * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: @@ -13,31 +15,96 @@ * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by TooLs GmbH. - * 4. The name of TooLs GmbH may not be used to endorse or promote products - * derived from this software without specific prior written permission. * - * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. */ +#ifndef _RISCV_PARAM_H_ +#define _RISCV_PARAM_H_ + +#ifdef _KERNEL_OPT +#include "opt_param.h" +#endif + /* - * Machine dependent constants for PowerPC (32-bit only currently) + * Machine dependent constants for all OpenRISC processors */ -#if defined(_KERNEL) && !defined(_MODULE) -#define MACHINE "evbppc" +/* + * For KERNEL code: + * MACHINE must be defined by the individual port. This is so that + * uname returns the correct thing, etc. + * + * For non-KERNEL code: + * If ELF, MACHINE and MACHINE_ARCH are forced to "or1k/or1k". + */ + +#ifdef _LP64 +#define _MACHINE_ARCH riscv64 +#define MACHINE_ARCH "riscv64" +#define _MACHINE_ARCH32 riscv32 +#define MACHINE_ARCH32 "riscv32" +#else +#define _MACHINE_ARCH riscv32 +#define MACHINE_ARCH "riscv32" +#endif +#define _MACHINE riscv +#define MACHINE "riscv" + +#define MID_MACHINE MID_RISCV + +/* RISC-V specific macro to align a stack pointer (downwards). */ +#define STACK_ALIGNBYTES (16UL - 1) +#define ALIGNBYTES32 __BIGGEST_ALIGNMENT__ + +#define NKMEMPAGES_MIN_DEFAULT ((128UL * 1024 * 1024) >> PAGE_SHIFT) +#define NKMEMPAGES_MAX_UNLIMITED 1 + +#define PGSHIFT 12 +#define NBPG (1 << PGSHIFT) +#define PGOFSET (NBPG - 1) + +#define UPAGES 2 +#define USPACE (UPAGES << PGSHIFT) +#define USPACE_ALIGN NBPG + +/* + * Constants related to network buffer management. + * MCLBYTES must be no larger than NBPG (the software page size), and + * NBPG % MCLBYTES must be zero. + */ +#define MSIZE 512 /* size of an mbuf */ + +#ifndef MCLSHIFT +#define MCLSHIFT 11 /* convert bytes to m_buf clusters */ + /* 2K cluster can hold Ether frame */ +#endif /* MCLSHIFT */ + +#define MCLBYTES (1 << MCLSHIFT) /* size of a m_buf cluster */ + +#ifndef MSGBUFSIZE +#define MSGBUFSIZE 65536 /* default message buffer size */ +#endif + +#define MAXCPUS 32 + +#ifdef _KERNEL +void delay(unsigned long); +#define DELAY(x) delay(x) +#endif + +#define riscv_btop(x) ((unsigned long)(x) >> PGSHIFT) +#define riscv_ptob(x) ((unsigned long)(x) << PGSHIFT) -#endif /* _KERNEL && !_MODULE */ -#include <powerpc/param.h> -\ No newline at end of file +#endif /* _RISCV_PARAM_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/machine/pcb.h b/lib/libc/include/generic-netbsd/machine/pcb.h @@ -1,3 +1,55 @@ -/* $NetBSD: pcb.h,v 1.1 2002/12/09 12:16:10 scw Exp $ */ +/* $NetBSD: pcb.h,v 1.3 2024/08/04 08:16:25 skrll Exp $ */ -#include <powerpc/pcb.h> -\ No newline at end of file +/*- + * Copyright (c) 2014 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Matt Thomas of 3am Software Foundry. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _RISCV_PCB_H_ +#define _RISCV_PCB_H_ + +#include <riscv/reg.h> + +struct pcb_faultinfo { + void *pfi_faultptep; + vaddr_t pfi_faultaddr; + u_int pfi_repeats; + pid_t pfi_lastpid; + uint8_t pfi_cause; +}; + +struct pcb { + struct fpreg pcb_fpregs; + struct pcb_faultinfo pcb_faultinfo; +}; + +struct md_coredump { + struct reg reg; + struct fpreg fpreg; +}; + +#endif /* _RISCV_PCB_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/machine/pmap.h b/lib/libc/include/generic-netbsd/machine/pmap.h @@ -1,3 +1,263 @@ -/* $NetBSD: pmap.h,v 1.3 2003/02/03 17:09:55 matt Exp $ */ +/* $NetBSD: pmap.h,v 1.24.2.2 2026/04/02 18:13:22 martin Exp $ */ -#include <powerpc/pmap.h> -\ No newline at end of file +/* + * Copyright (c) 2014, 2019, 2021 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Matt Thomas (of 3am Software Foundry), Maxime Villard, and + * Nick Hudson. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _RISCV_PMAP_H_ +#define _RISCV_PMAP_H_ + +#ifdef _KERNEL_OPT +#include "opt_modular.h" +#endif + +#if !defined(_MODULE) + +#include <sys/cdefs.h> +#include <sys/types.h> +#include <sys/pool.h> +#include <sys/evcnt.h> + +#include <uvm/uvm_physseg.h> +#include <uvm/pmap/vmpagemd.h> + +#include <riscv/pte.h> +#include <riscv/sysreg.h> + +#define PMAP_SEGTABSIZE NPTEPG +#define PMAP_PDETABSIZE NPTEPG + +#ifdef _LP64 +#define PTPSHIFT 3 +/* This is SV57. */ +//#define XSEGSHIFT (SEGSHIFT + SEGLENGTH + SEGLENGTH + SEGLENGTH) + +/* This is SV48. */ +//#define XSEGSHIFT (SEGSHIFT + SEGLENGTH + SEGLENGTH) + +/* This is SV39. */ +#define XSEGSHIFT (SEGSHIFT + SEGLENGTH) +#define NBXSEG (1ULL << XSEGSHIFT) +#define XSEGOFSET (NBXSEG - 1) /* byte offset into xsegment */ +#define XSEGLENGTH (PGSHIFT - 3) +#define NXSEGPG (1 << XSEGLENGTH) +#else +#define PTPSHIFT 2 +#define XSEGSHIFT SEGSHIFT +#endif + +#define SEGLENGTH (PGSHIFT - PTPSHIFT) +#define SEGSHIFT (SEGLENGTH + PGSHIFT) +#define NBSEG (1 << SEGSHIFT) /* bytes/segment */ +#define SEGOFSET (NBSEG - 1) /* byte offset into segment */ + +#define KERNEL_PID 0 + +#define PMAP_HWPAGEWALKER 1 +#define PMAP_TLB_MAX 1 +#define PMAP_TLB_ALWAYS_ASIDS false +#ifdef _LP64 +#define PMAP_INVALID_PDETAB_ADDRESS ((pmap_pdetab_t *)(VM_MIN_KERNEL_ADDRESS - PAGE_SIZE)) +#define PMAP_INVALID_SEGTAB_ADDRESS ((pmap_segtab_t *)(VM_MIN_KERNEL_ADDRESS - PAGE_SIZE)) +#else +#define PMAP_INVALID_PDETAB_ADDRESS ((pmap_pdetab_t *)0xdeadbeef) +#define PMAP_INVALID_SEGTAB_ADDRESS ((pmap_segtab_t *)0xdeadbeef) +#endif +#define PMAP_TLB_NUM_PIDS (__SHIFTOUT_MASK(SATP_ASID) + 1) +#define PMAP_TLB_BITMAP_LENGTH PMAP_TLB_NUM_PIDS +#define PMAP_TLB_FLUSH_ASID_ON_RESET true + +#define pmap_phys_address(x) (x) + +#ifndef __BSD_PTENTRY_T__ +#define __BSD_PTENTRY_T__ +#ifdef _LP64 +#define PRIxPTE PRIx64 +#else +#define PRIxPTE PRIx32 +#endif +#endif /* __BSD_PTENTRY_T__ */ + +#define PMAP_NEED_PROCWR +static inline void +pmap_procwr(struct proc *p, vaddr_t va, vsize_t len) +{ + __asm __volatile("fence\trw,rw; fence.i" ::: "memory"); +} + +#include <uvm/pmap/tlb.h> +#include <uvm/pmap/pmap_devmap.h> +#include <uvm/pmap/pmap_tlb.h> +#include <uvm/pmap/pmap_synci.h> + +#define PMAP_GROWKERNEL +#define PMAP_STEAL_MEMORY + +#ifdef _KERNEL + +#define __HAVE_PMAP_MD +struct pmap_md { + paddr_t md_ppn; +}; + +static inline void +pmap_md_icache_sync_all(void) +{ +} + +static inline void +pmap_md_icache_sync_range_index(vaddr_t va, vsize_t size) +{ +} + +struct vm_page * + pmap_md_alloc_poolpage(int); +vaddr_t pmap_md_map_poolpage(paddr_t, vsize_t); +void pmap_md_unmap_poolpage(vaddr_t, vsize_t); + +bool pmap_md_direct_mapped_vaddr_p(vaddr_t); +paddr_t pmap_md_direct_mapped_vaddr_to_paddr(vaddr_t); +vaddr_t pmap_md_direct_map_paddr(paddr_t); +void pmap_md_init(void); +bool pmap_md_io_vaddr_p(vaddr_t); +bool pmap_md_ok_to_steal_p(const uvm_physseg_t, size_t); +void pmap_md_pdetab_init(struct pmap *); +void pmap_md_pdetab_fini(struct pmap *); +void pmap_md_tlb_info_attach(struct pmap_tlb_info *, struct cpu_info *); +void pmap_md_xtab_activate(struct pmap *, struct lwp *); +void pmap_md_xtab_deactivate(struct pmap *); + +void pmap_pte_xmae(void); +void pmap_bootstrap(vaddr_t, vaddr_t); + +vsize_t pmap_kenter_range(vaddr_t, paddr_t, vsize_t, vm_prot_t, u_int); + +#ifdef _LP64 +extern vaddr_t pmap_direct_base; +extern vaddr_t pmap_direct_end; +#define PMAP_DIRECT_MAP(pa) RISCV_PA_TO_KVA(pa) +#define PMAP_DIRECT_UNMAP(va) RISCV_KVA_TO_PA(va) + +/* + * Other hooks for the pool allocator. + */ +#define POOL_PHYSTOV(pa) RISCV_PA_TO_KVA((paddr_t)(pa)) +#define POOL_VTOPHYS(va) RISCV_KVA_TO_PA((vaddr_t)(va)) + +#endif /* _LP64 */ + +#define MEGAPAGE_TRUNC(x) ((x) & ~SEGOFSET) +#define MEGAPAGE_ROUND(x) MEGAPAGE_TRUNC((x) + SEGOFSET) + +#define PMAP_DEV __BIT(29) /* 0x2000_0000 */ + +#define DEVMAP_ALIGN(x) MEGAPAGE_TRUNC((x)) +#define DEVMAP_SIZE(x) MEGAPAGE_ROUND((x)) +#define DEVMAP_FLAGS PMAP_DEV + +#ifdef __PMAP_PRIVATE + +static inline bool +pmap_md_tlb_check_entry(void *ctx, vaddr_t va, tlb_asid_t asid, pt_entry_t pte) +{ + // TLB not walked and so not called. + return false; +} + +static inline void +pmap_md_page_syncicache(struct vm_page_md *mdpg, const kcpuset_t *onproc) +{ + __asm __volatile("fence\trw,rw; fence.i" ::: "memory"); +} + +/* + * Virtual Cache Alias helper routines. Not a problem for RISCV CPUs. + */ +static inline bool +pmap_md_vca_add(struct vm_page_md *mdpg, vaddr_t va, pt_entry_t *nptep) +{ + return false; +} + +static inline void +pmap_md_vca_remove(struct vm_page_md *mdpg, vaddr_t va) +{ +} + +static inline void +pmap_md_vca_clean(struct vm_page_md *mdpg, vaddr_t va, int op) +{ +} + +static inline size_t +pmap_md_tlb_asid_max(void) +{ + const register_t satp = csr_satp_read(); + const register_t test = satp | SATP_ASID; + + csr_satp_write(test); + + const register_t ret = __SHIFTOUT(csr_satp_read(), SATP_ASID); + csr_satp_write(satp); + + KASSERT(ret < PMAP_TLB_NUM_PIDS); + return ret; +} + +static inline pt_entry_t * +pmap_md_nptep(pt_entry_t *ptep) +{ + return ptep + 1; +} + +#endif /* __PMAP_PRIVATE */ +#endif /* _KERNEL */ + +#include <uvm/pmap/pmap.h> + +#endif /* !_MODULE */ + +#if defined(MODULAR) || defined(_MODULE) +/* + * Define a compatible vm_page_md so that struct vm_page is the same size + * whether we are using modules or not. + */ +#ifndef __HAVE_VM_PAGE_MD +#define __HAVE_VM_PAGE_MD + +struct vm_page_md { + uintptr_t mdpg_dummy[3]; +}; +__CTASSERT(sizeof(struct vm_page_md) == sizeof(uintptr_t)*3); + +#endif /* !__HAVE_VM_PAGE_MD */ + +#endif /* MODULAR || _MODULE */ + +#endif /* !_RISCV_PMAP_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/machine/proc.h b/lib/libc/include/generic-netbsd/machine/proc.h @@ -1,3 +1,76 @@ -/* $NetBSD: proc.h,v 1.1 2002/12/09 12:16:13 scw Exp $ */ +/* $NetBSD: proc.h,v 1.6 2024/08/04 08:16:25 skrll Exp $ */ -#include <powerpc/proc.h> -\ No newline at end of file +/*- + * Copyright (c) 2014 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Matt Thomas of 3am Software Foundry. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _RISCV_PROC_H_ +#define _RISCV_PROC_H_ + +#include <sys/param.h> +#include <riscv/vmparam.h> + +struct lwp; + +/* + * Machine-dependent part of the lwp structure for RISCV + */ +struct trapframe; + +struct mdlwp { + struct trapframe *md_utf; /* trapframe from userspace */ + struct trapframe *md_ktf; /* trapframe from userspace */ + struct faultbuf *md_onfault; /* registers to store on fault */ + unsigned long md_usp; /* for locore.S */ + unsigned long md_ss_addr; /* single step address for ptrace */ + int md_ss_instr; /* single step instruction for ptrace */ + volatile int md_astpending; /* AST pending on return to userland */ +#if 0 +#if USPACE > PAGE_SIZE + int md_upte[USPACE/4096]; /* ptes for mapping u page */ +#else + int md_dpte[USPACE/4096]; /* dummy ptes to keep the same */ +#endif +#endif +}; + +struct mdproc { + /* syscall entry for this process */ + void (*md_syscall)(struct trapframe *); +}; + +#ifdef _KERNEL +#define LWP0_CPU_INFO &cpu_info_store[0] /* staticly set in lwp0 */ +#if 0 +#define LWP0_MD_INITIALIZER { \ + .md_utf = (void *)0xdeadbeef, \ + } +#endif +#endif /* _KERNEL */ + +#endif /* _RISCV_PROC_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/machine/profile.h b/lib/libc/include/generic-netbsd/machine/profile.h @@ -1,3 +1,117 @@ -/* $NetBSD: profile.h,v 1.1 2002/12/09 12:16:13 scw Exp $ */ +/* $NetBSD: profile.h,v 1.1.60.1 2026/04/02 15:59:59 martin Exp $ */ -#include <powerpc/profile.h> -\ No newline at end of file +/*- + * Copyright (c) 2014 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Matt Thomas of 3am Software Foundry. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _RISCV_PROFILE_H_ +#define _RISCV_PROFILE_H_ + +#include <machine/sysreg.h> + +#define _MCOUNT_DECL void mcount + +#define MCOUNT_ASM_NAME "_mcount" +#define PLTSYM + +#ifdef _LP64 +#define MCOUNT MCOUNT_ARCH("8", "sd", "ld") +#else +#define MCOUNT MCOUNT_ARCH("4", "sw", "lw") +#endif + +#ifdef __PIC__ +#define _PLT "@plt" +#else +#define _PLT /* nothing */ +#endif + + +#define MCOUNT_ARCH(_SZREG, _REG_S, _REG_L) __asm( \ +" .text\n" \ +" .align 2\n" \ +" .type " MCOUNT_ASM_NAME ",@function\n" \ +" .global " MCOUNT_ASM_NAME "\n" \ +MCOUNT_ASM_NAME ":\n" \ + /* \ + * Preserve registers that could be trashed during mcount, i.e. \ + * caller saved registers. \ + */ \ +" addi sp, sp, -(16 * " _SZREG ")\n" \ +" " _REG_S " ra, ( 0 * " _SZREG ")(sp)\n" \ +" " _REG_S " t0, ( 1 * " _SZREG ")(sp)\n" \ +" " _REG_S " t1, ( 2 * " _SZREG ")(sp)\n" \ +" " _REG_S " t2, ( 3 * " _SZREG ")(sp)\n" \ +" " _REG_S " a0, ( 4 * " _SZREG ")(sp)\n" \ +" " _REG_S " a1, ( 5 * " _SZREG ")(sp)\n" \ +" " _REG_S " a2, ( 6 * " _SZREG ")(sp)\n" \ +" " _REG_S " a3, ( 7 * " _SZREG ")(sp)\n" \ +" " _REG_S " a4, ( 8 * " _SZREG ")(sp)\n" \ +" " _REG_S " a5, ( 9 * " _SZREG ")(sp)\n" \ +" " _REG_S " a6, (10 * " _SZREG ")(sp)\n" \ +" " _REG_S " a7, (11 * " _SZREG ")(sp)\n" \ +" " _REG_S " t3, (12 * " _SZREG ")(sp)\n" \ +" " _REG_S " t4, (13 * " _SZREG ")(sp)\n" \ +" " _REG_S " t5, (14 * " _SZREG ")(sp)\n" \ +" " _REG_S " t6, (15 * " _SZREG ")(sp)\n" \ +" mv a1, ra\n" \ +" call mcount " _PLT "\n" \ + /* restore caller saved registers */ \ +" " _REG_L " ra, ( 0 * " _SZREG ")(sp)\n" \ +" " _REG_L " t0, ( 1 * " _SZREG ")(sp)\n" \ +" " _REG_L " t1, ( 2 * " _SZREG ")(sp)\n" \ +" " _REG_L " t2, ( 3 * " _SZREG ")(sp)\n" \ +" " _REG_L " a0, ( 4 * " _SZREG ")(sp)\n" \ +" " _REG_L " a1, ( 5 * " _SZREG ")(sp)\n" \ +" " _REG_L " a2, ( 6 * " _SZREG ")(sp)\n" \ +" " _REG_L " a3, ( 7 * " _SZREG ")(sp)\n" \ +" " _REG_L " a4, ( 8 * " _SZREG ")(sp)\n" \ +" " _REG_L " a5, ( 9 * " _SZREG ")(sp)\n" \ +" " _REG_L " a6, (10 * " _SZREG ")(sp)\n" \ +" " _REG_L " a7, (11 * " _SZREG ")(sp)\n" \ +" " _REG_L " t3, (12 * " _SZREG ")(sp)\n" \ +" " _REG_L " t4, (13 * " _SZREG ")(sp)\n" \ +" " _REG_L " t5, (14 * " _SZREG ")(sp)\n" \ +" " _REG_L " t6, (15 * " _SZREG ")(sp)\n" \ +" addi sp, sp, (16 * " _SZREG ")\n" \ +" jr ra\n"); + + +#ifdef _KERNEL + +#define MCOUNT_ENTER \ + s = (csr_sstatus_read() & SR_SIE) != 0; \ + csr_sstatus_clear(SR_SIE); // DISABLE_INTERRUPTS + +#define MCOUNT_EXIT \ + if (s) \ + csr_sstatus_set(SR_SIE); // ENABLE_INTERRUPTS + +#endif + +#endif /* _RISCV_PROFILE_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/machine/psl.h b/lib/libc/include/generic-netbsd/machine/psl.h @@ -1,3 +1,3 @@ -/* $NetBSD: psl.h,v 1.4 2011/06/20 07:23:36 matt Exp $ */ +/* $NetBSD: psl.h,v 1.1 2002/03/07 14:44:01 simonb Exp $ */ -#include <powerpc/psl.h> -\ No newline at end of file +#include <mips/psl.h> +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/machine/pte.h b/lib/libc/include/generic-netbsd/machine/pte.h @@ -1,3 +1,347 @@ -/* $NetBSD: pte.h,v 1.1 2002/12/09 12:16:14 scw Exp $ */ +/* $NetBSD: pte.h,v 1.14.2.2 2025/10/26 12:28:36 martin Exp $ */ -#include <powerpc/pte.h> -\ No newline at end of file +/* + * Copyright (c) 2014, 2019, 2021 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Matt Thomas (of 3am Software Foundry), Maxime Villard, and + * Nick Hudson. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _RISCV_PTE_H_ +#define _RISCV_PTE_H_ + +#ifdef _LP64 /* Sv39 */ +#define PTE_PPN __BITS(53, 10) +#define PTE_PPN0 __BITS(18, 10) +#define PTE_PPN1 __BITS(27, 19) +#define PTE_PPN2 __BITS(53, 28) +typedef uint64_t pt_entry_t; +typedef uint64_t pd_entry_t; +#define atomic_cas_pte atomic_cas_64 +#else /* Sv32 */ +#define PTE_PPN __BITS(31, 10) +#define PTE_PPN0 __BITS(19, 10) +#define PTE_PPN1 __BITS(31, 20) +typedef uint32_t pt_entry_t; +typedef uint32_t pd_entry_t; +#define atomic_cas_pte atomic_cas_32 +#endif + +#define PTE_PPN_SHIFT 10 + +#define NPTEPG (NBPG / sizeof(pt_entry_t)) +#define NSEGPG NPTEPG +#define NPDEPG NPTEPG + + +/* HardWare PTE bits SV39 */ +#define PTE_N __BIT(63) // Svnapot +#define PTE_PBMT __BITS(62, 61) // Svpbmt +#define PTE_reserved0 __BITS(60, 54) // + +/* + * Svpbmt (Page Based Memory Types) extension: + * + * PMA --> adhere to physical memory attributes + * NC --> non-cacheable, idempotent, weakly-ordered + * IO --> non-cacheable, non-idempotent, strongly-ordered + */ +#define PTE_PBMT_PMA __SHIFTIN(0, PTE_PBMT) +#define PTE_PBMT_NC __SHIFTIN(1, PTE_PBMT) +#define PTE_PBMT_IO __SHIFTIN(2, PTE_PBMT) + +/* XTheadMae (Memory Attribute Extensions) */ +#define PTE_XMAE __BITS(63,59) +#define PTE_XMAE_SO __BIT(63) // Strong Order +#define PTE_XMAE_C __BIT(62) // Cacheable +#define PTE_XMAE_B __BIT(61) // Bufferable +#define PTE_XMAE_SH __BIT(60) // Shareable +#define PTE_XMAE_T __BIT(59) // Trustable + +/* + * Map to the rough PBMT equivalent: + * + * PMA (i.e. no specific attribute) --> C B SH + * NC --> B SH + * IO --> SO SH + */ +#define PTE_XMAE_PMA ( PTE_XMAE_C | PTE_XMAE_B | PTE_XMAE_SH) +#define PTE_XMAE_NC ( PTE_XMAE_B | PTE_XMAE_SH) +#define PTE_XMAE_IO (PTE_XMAE_SO | PTE_XMAE_SH) + +/* Software PTE bits. */ +#define PTE_RSW __BITS(9, 8) +#define PTE_WIRED __BIT(9) + +/* Hardware PTE bits. */ +// These are hardware defined bits +#define PTE_D __BIT(7) // Dirty +#define PTE_A __BIT(6) // Accessed +#define PTE_G __BIT(5) // Global +#define PTE_U __BIT(4) // User +#define PTE_X __BIT(3) // eXecute +#define PTE_W __BIT(2) // Write +#define PTE_R __BIT(1) // Read +#define PTE_V __BIT(0) // Valid + +#define PTE_HARDWIRED (PTE_A | PTE_D) +#define PTE_USER (PTE_V | PTE_U) +#define PTE_KERN (PTE_V | PTE_G) +#define PTE_RW (PTE_R | PTE_W) +#define PTE_RX (PTE_R | PTE_X) +#define PTE_RWX (PTE_R | PTE_W | PTE_X) + +#define PTE_ISLEAF_P(pte) (((pte) & PTE_RWX) != 0) + +#define PA_TO_PTE(pa) (((pa) >> PGSHIFT) << PTE_PPN_SHIFT) +#define PTE_TO_PA(pte) (__SHIFTOUT((pte), PTE_PPN) << PGSHIFT) + +#if defined(_KERNEL) + +static inline bool +pte_valid_p(pt_entry_t pte) +{ + return (pte & PTE_V) != 0; +} + +static inline bool +pte_wired_p(pt_entry_t pte) +{ + return (pte & PTE_WIRED) != 0; +} + +static inline bool +pte_modified_p(pt_entry_t pte) +{ + return (pte & PTE_D) != 0; +} + +static inline bool +pte_cached_p(pt_entry_t pte) +{ + /* TODO: This seems wrong... */ + return true; +} + +static inline bool +pte_deferred_exec_p(pt_entry_t pte) +{ + return false; +} + +static inline pt_entry_t +pte_wire_entry(pt_entry_t pte) +{ + return pte | PTE_HARDWIRED | PTE_WIRED; +} + +static inline pt_entry_t +pte_unwire_entry(pt_entry_t pte) +{ + return pte & ~(PTE_HARDWIRED | PTE_WIRED); +} + +static inline paddr_t +pte_to_paddr(pt_entry_t pte) +{ + return PTE_TO_PA(pte); +} + +static inline pt_entry_t +pte_nv_entry(bool kernel_p) +{ + return 0; +} + +static inline pt_entry_t +pte_prot_nowrite(pt_entry_t pte) +{ + return pte & ~PTE_W; +} + +static inline pt_entry_t +pte_prot_downgrade(pt_entry_t pte, vm_prot_t newprot) +{ + if ((newprot & VM_PROT_READ) == 0) + pte &= ~PTE_R; + if ((newprot & VM_PROT_WRITE) == 0) + pte &= ~PTE_W; + if ((newprot & VM_PROT_EXECUTE) == 0) + pte &= ~PTE_X; + return pte; +} + +static inline pt_entry_t +pte_prot_bits(struct vm_page_md *mdpg, vm_prot_t prot, bool kernel_p) +{ + KASSERT(prot & VM_PROT_READ); + pt_entry_t pte = PTE_R; + + if (prot & VM_PROT_EXECUTE) { + pte |= PTE_X; + } + if (prot & VM_PROT_WRITE) { + pte |= PTE_W; + } + + return pte; +} + +static inline pt_entry_t +pte_flag_bits(struct vm_page_md *mdpg, int flags, bool kernel_p) +{ + return 0; +} + +#ifdef _LP64 +pt_entry_t pte_enter_flags_to_pbmt(int); +#else +static inline pt_entry_t +pte_enter_flags_to_pbmt(int flags) +{ + return 0; +}; +#endif + +static inline pt_entry_t +pte_make_enter(paddr_t pa, struct vm_page_md *mdpg, vm_prot_t prot, + int flags, bool kernel_p) +{ + pt_entry_t pte = (pt_entry_t)PA_TO_PTE(pa); + + pte |= kernel_p ? PTE_KERN : PTE_USER; + pte |= pte_flag_bits(mdpg, flags, kernel_p); + pte |= pte_prot_bits(mdpg, prot, kernel_p); + pte |= pte_enter_flags_to_pbmt(flags); + + if (mdpg != NULL) { + + if ((prot & VM_PROT_WRITE) != 0 && + ((flags & VM_PROT_WRITE) != 0 || VM_PAGEMD_MODIFIED_P(mdpg))) { + /* + * This is a writable mapping, and the page's mod state + * indicates it has already been modified. No need for + * modified emulation. + */ + pte |= PTE_A | PTE_D; + } else if ((flags & VM_PROT_ALL) || VM_PAGEMD_REFERENCED_P(mdpg)) { + /* + * - The access type indicates that we don't need to do + * referenced emulation. + * OR + * - The physical page has already been referenced so no need + * to re-do referenced emulation here. + */ + pte |= PTE_A; + } + } else { + pte |= PTE_A | PTE_D; + } + + return pte; +} + +static inline pt_entry_t +pte_make_kenter_pa(paddr_t pa, struct vm_page_md *mdpg, vm_prot_t prot, + int flags) +{ + pt_entry_t pte = (pt_entry_t)PA_TO_PTE(pa); + + pte |= PTE_KERN | PTE_HARDWIRED | PTE_WIRED; + pte |= pte_flag_bits(NULL, flags, true); + pte |= pte_prot_bits(NULL, prot, true); + pte |= pte_enter_flags_to_pbmt(flags); + + return pte; +} + +static inline void +pte_set(pt_entry_t *ptep, pt_entry_t pte) +{ + *ptep = pte; +} + +static inline pd_entry_t +pte_invalid_pde(void) +{ + return 0; +} + +static inline pd_entry_t +pte_pde_pdetab(paddr_t pa, bool kernel_p) +{ + return PTE_V | PA_TO_PTE(pa); +} + +static inline pd_entry_t +pte_pde_ptpage(paddr_t pa, bool kernel_p) +{ + return PTE_V | PA_TO_PTE(pa); +} + +static inline bool +pte_pde_valid_p(pd_entry_t pde) +{ + return (pde & (PTE_X | PTE_W | PTE_R | PTE_V)) == PTE_V; +} + +static inline paddr_t +pte_pde_to_paddr(pd_entry_t pde) +{ + return pte_to_paddr((pt_entry_t)pde); +} + +static inline pd_entry_t +pte_pde_cas(pd_entry_t *pdep, pd_entry_t opde, pt_entry_t npde) +{ +#ifdef MULTIPROCESSOR +#ifdef _LP64 + return atomic_cas_64(pdep, opde, npde); +#else + return atomic_cas_32(pdep, opde, npde); +#endif +#else + *pdep = npde; + return 0; +#endif +} + +static inline void +pte_pde_set(pd_entry_t *pdep, pd_entry_t npde) +{ + + *pdep = npde; +} + +static inline pt_entry_t +pte_value(pt_entry_t pte) +{ + return pte; +} + +#endif /* _KERNEL */ + +#endif /* _RISCV_PTE_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/machine/ptrace.h b/lib/libc/include/generic-netbsd/machine/ptrace.h @@ -1,3 +1,63 @@ -/* $NetBSD: ptrace.h,v 1.1 2002/12/09 12:16:14 scw Exp $ */ +/* $NetBSD: ptrace.h,v 1.6 2024/05/03 07:11:14 skrll Exp $ */ -#include <powerpc/ptrace.h> -\ No newline at end of file +/*- + * Copyright (c) 2014 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Matt Thomas of 3am Software Foundry. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _RISCV_PTRACE_H_ +#define _RISCV_PTRACE_H_ + +/* + * RISCV-dependent ptrace definitions. + * Note that PT_STEP is _not_ supported. + */ +#define PT_GETREGS (PT_FIRSTMACH + 0) +#define PT_SETREGS (PT_FIRSTMACH + 1) +#define PT_GETFPREGS (PT_FIRSTMACH + 2) +#define PT_SETFPREGS (PT_FIRSTMACH + 3) + +#define PT_MACHDEP_STRINGS \ + "PT_GETREGS", \ + "PT_SETREGS", \ + "PT_GETFPREGS", \ + "PT_SETFPREGS" + +#include <machine/reg.h> +#define PTRACE_REG_PC(r) (r)->r_pc +#define PTRACE_REG_FP(r) (r)->r_reg[_X_S0] +#define PTRACE_REG_SET_PC(r, v) (r)->r_pc = (v) +#define PTRACE_REG_SP(r) (r)->r_reg[_X_SP] +#define PTRACE_REG_INTRV(r) (r)->r_reg[_X_A0] + +#define PTRACE_ILLEGAL_ASM __asm __volatile("c.unimp" ::: "memory") + +#define PTRACE_BREAKPOINT ((const uint8_t[]) { 0x02, 0x90 }) +#define PTRACE_BREAKPOINT_ASM __asm __volatile("c.ebreak" ::: "memory") +#define PTRACE_BREAKPOINT_SIZE 2 + +#endif /* _RISCV_PTRACE_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/machine/reg.h b/lib/libc/include/generic-netbsd/machine/reg.h @@ -1,3 +1,125 @@ -/* $NetBSD: reg.h,v 1.1 2002/12/09 12:16:14 scw Exp $ */ +/* $NetBSD: reg.h,v 1.10 2022/12/13 22:25:08 skrll Exp $ */ -#include <powerpc/reg.h> -\ No newline at end of file +/*- + * Copyright (c) 2014 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Matt Thomas of 3am Software Foundry. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _RISCV_REG_H_ +#define _RISCV_REG_H_ + +// x0 = 0 +// x1 = ra (return address) Caller +// x2 = sp (stack pointer) Callee +// x3 = gp (global pointer) +// x4 = tp (thread pointer) +// x5 - x7 = t0 - t2 (temporary) Caller +// x8 = s0/fp (saved register / frame pointer) Callee +// x9 = s1 (saved register) Callee +// x10 - x11 = a0 - a1 (arguments/return values) Caller +// x12 - x17 = a2 - a7 (arguments) Caller +// x18 - x27 = s2 - s11 (saved registers) Callee +// x28 - x31 = t3 - t6 (temporaries) Caller + +struct reg { // synced with register_t in <riscv/types.h> +#ifdef _LP64 + __uint64_t r_reg[31]; /* x0 is always 0 */ + __uint64_t r_pc; +#else + __uint32_t r_reg[31]; /* x0 is always 0 */ + __uint32_t r_pc; +#endif +}; + +#ifdef _LP64 +struct reg32 { // synced with register_t in <riscv/types.h> + __uint32_t r_reg[31]; /* x0 is always 0 */ + __uint32_t r_pc; +}; +#endif + +#define _XREG(n) ((n) - 1) +#define _X_RA _XREG(1) +#define _X_SP _XREG(2) +#define _X_GP _XREG(3) +#define _X_TP _XREG(4) +#define _X_T0 _XREG(5) +#define _X_T1 _XREG(6) +#define _X_T2 _XREG(7) +#define _X_S0 _XREG(8) +#define _X_S1 _XREG(9) +#define _X_A0 _XREG(10) +#define _X_A1 _XREG(11) +#define _X_A2 _XREG(12) +#define _X_A3 _XREG(13) +#define _X_A4 _XREG(14) +#define _X_A5 _XREG(15) +#define _X_A6 _XREG(16) +#define _X_A7 _XREG(17) +#define _X_S2 _XREG(18) +#define _X_S3 _XREG(19) +#define _X_S4 _XREG(20) +#define _X_S5 _XREG(21) +#define _X_S6 _XREG(22) +#define _X_S7 _XREG(23) +#define _X_S8 _XREG(24) +#define _X_S9 _XREG(25) +#define _X_S10 _XREG(26) +#define _X_S11 _XREG(27) +#define _X_T3 _XREG(28) +#define _X_T4 _XREG(29) +#define _X_T5 _XREG(30) +#define _X_T6 _XREG(31) + +// f0 - f7 = ft0 - ft7 (FP temporaries) Caller +// following layout is similar to integer registers above +// f8 - f9 = fs0 - fs1 (FP saved registers) Callee +// f10 - f11 = fa0 - fa1 (FP arguments/return values) Caller +// f12 - f17 = fa2 - fa7 (FP arguments) Caller +// f18 - f27 = fs2 - fa11 (FP saved registers) Callee +// f28 - f31 = ft8 - ft11 (FP temporaries) Caller + +/* + * This fragment is common to <riscv/mcontext.h> and <riscv/reg.h> + */ +#ifndef _BSD_FPREG_T_ +union __fpreg { + __uint64_t u_u64; + double u_d; +}; +#define _BSD_FPREG_T_ union __fpreg +#endif + +/* + * 32 double precision floating point, 1 CSR + */ +struct fpreg { + _BSD_FPREG_T_ r_fpreg[33]; +}; +#define r_fcsr r_fpreg[32].u_u64 + +#endif /* _RISCV_REG_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/machine/reloc.h b/lib/libc/include/generic-netbsd/machine/reloc.h @@ -1,3 +1,3 @@ -/* $NetBSD: reloc.h,v 1.1 2002/12/09 12:16:15 scw Exp $ */ +/* $NetBSD: reloc.h,v 1.1 2002/03/07 14:44:02 simonb Exp $ */ -#include <powerpc/reloc.h> -\ No newline at end of file +#include <mips/reloc.h> +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/machine/setjmp.h b/lib/libc/include/generic-netbsd/machine/setjmp.h @@ -1,3 +1,70 @@ -/* $NetBSD: setjmp.h,v 1.1 2002/12/09 12:16:16 scw Exp $ */ +/* $NetBSD: setjmp.h,v 1.2 2015/03/27 06:57:21 matt Exp $ */ -#include <powerpc/setjmp.h> -\ No newline at end of file +/*- + * Copyright (c) 2014 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Matt Thomas of 3am Software Foundry. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + + /* magic + 16 reg + 1 fcsr + 12 fp + 4 sigmask + 8 spare */ +#define _JBLEN (_JB_SIGMASK + 4 + 8) +#define _JB_MAGIC 0 +#define _JB_RA 1 +#define _JB_SP 2 +#define _JB_GP 3 +#define _JB_TP 4 +#define _JB_S0 5 +#define _JB_S1 6 +#define _JB_S2 7 +#define _JB_S3 8 +#define _JB_S4 9 +#define _JB_S5 10 +#define _JB_S6 11 +#define _JB_S7 12 +#define _JB_S8 13 +#define _JB_S9 14 +#define _JB_S10 15 +#define _JB_S11 16 +#define _JB_FCSR 17 + +#define _JB_FS0 18 +#define _JB_FS1 (_JB_FS0 + sizeof(double) / sizeof(_BSD_JBSLOT_T_)) +#define _JB_FS2 (_JB_FS1 + sizeof(double) / sizeof(_BSD_JBSLOT_T_)) +#define _JB_FS3 (_JB_FS2 + sizeof(double) / sizeof(_BSD_JBSLOT_T_)) +#define _JB_FS4 (_JB_FS3 + sizeof(double) / sizeof(_BSD_JBSLOT_T_)) +#define _JB_FS5 (_JB_FS4 + sizeof(double) / sizeof(_BSD_JBSLOT_T_)) +#define _JB_FS6 (_JB_FS5 + sizeof(double) / sizeof(_BSD_JBSLOT_T_)) +#define _JB_FS7 (_JB_FS6 + sizeof(double) / sizeof(_BSD_JBSLOT_T_)) +#define _JB_FS8 (_JB_FS7 + sizeof(double) / sizeof(_BSD_JBSLOT_T_)) +#define _JB_FS9 (_JB_FS8 + sizeof(double) / sizeof(_BSD_JBSLOT_T_)) +#define _JB_FS10 (_JB_FS9 + sizeof(double) / sizeof(_BSD_JBSLOT_T_)) +#define _JB_FS11 (_JB_FS10 + sizeof(double) / sizeof(_BSD_JBSLOT_T_)) + +#define _JB_SIGMASK (_JB_FS11 + sizeof(double) / sizeof(_BSD_JBSLOT_T_)) + +#ifndef _BSD_JBSLOT_T_ +#define _BSD_JBSLOT_T_ long long +#endif +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/machine/signal.h b/lib/libc/include/generic-netbsd/machine/signal.h @@ -1,3 +1,40 @@ -/* $NetBSD: signal.h,v 1.1 2002/12/09 12:16:17 scw Exp $ */ +/* $NetBSD: signal.h,v 1.1 2014/09/19 17:36:26 matt Exp $ */ -#include <powerpc/signal.h> -\ No newline at end of file +/*- + * Copyright (c) 2014 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Matt Thomas of 3am Software Foundry. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _RISCV_SIGNAL_H_ +#define _RISCV_SIGNAL_H_ + +#ifndef _LOCORE +// zig patch: Clang does not define __SIG_ATOMIC_TYPE__ +typedef int sig_atomic_t; +#endif + +#endif /* _RISCV_SIGNAL_H_ */ diff --git a/lib/libc/include/generic-netbsd/machine/sljit_machdep.h b/lib/libc/include/generic-netbsd/machine/sljit_machdep.h @@ -1,3 +1,3 @@ /* $NetBSD: sljit_machdep.h,v 1.1 2014/07/23 18:19:43 alnsn Exp $ */ -#include <powerpc/sljit_machdep.h> -\ No newline at end of file +#include <mips/sljit_machdep.h> +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/machine/sysarch.h b/lib/libc/include/generic-netbsd/machine/sysarch.h @@ -1,85 +1,3 @@ -/* $NetBSD: sysarch.h,v 1.15 2021/10/06 05:33:15 skrll Exp $ */ +/* $NetBSD: sysarch.h,v 1.1 2014/09/19 17:36:26 matt Exp $ */ -/* - * Copyright (c) 1996-1997 Mark Brinicombe. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by Mark Brinicombe. - * 4. The name of the company nor the name of the author may be used to - * endorse or promote products derived from this software without specific - * prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _ARM_SYSARCH_H_ -#define _ARM_SYSARCH_H_ - -#include <sys/cdefs.h> - -/* - * Pickup definition of size_t and uintptr_t - */ -#include <machine/ansi.h> -#include <sys/stdint.h> -#ifndef _KERNEL -#include <stdbool.h> -#endif - -#ifdef _BSD_SIZE_T_ -typedef _BSD_SIZE_T_ size_t; -#undef _BSD_SIZE_T_ -#endif - -/* - * Architecture specific syscalls (arm) - */ - -#define ARM_SYNC_ICACHE 0 -#define ARM_DRAIN_WRITEBUF 1 -#define ARM_VFP_FPSCR 2 -#define ARM_FPU_USED 3 - -struct arm_sync_icache_args { - uintptr_t addr; /* Virtual start address */ - size_t len; /* Region size */ -}; - -struct arm_vfp_fpscr_args { - uint32_t fpscr_clear; /* bits to clear */ - uint32_t fpscr_set; /* bits to set */ -}; - -struct arm_unaligned_faults_args { - bool enabled; /* unaligned faults are enabled */ -}; - -#ifndef _KERNEL -__BEGIN_DECLS -int arm_sync_icache(uintptr_t, size_t); -int arm_drain_writebuf(void); -int sysarch(int, void *); -__END_DECLS -#endif - -#endif /* !_ARM_SYSARCH_H_ */ -\ No newline at end of file +/* nothing */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/machine/sysreg.h b/lib/libc/include/generic-netbsd/machine/sysreg.h @@ -0,0 +1,354 @@ +/* $NetBSD: sysreg.h,v 1.33.4.1 2025/10/26 12:26:27 martin Exp $ */ + +/* + * Copyright (c) 2014 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Matt Thomas of 3am Software Foundry. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _RISCV_SYSREG_H_ +#define _RISCV_SYSREG_H_ + +#ifndef _KERNEL +#include <sys/param.h> +#endif + +#include <riscv/reg.h> + +/* CPU vendors (get CSR value from SBI). */ +#define CPU_VENDOR_SIFIVE 0x489 +#define CPU_SIFIVE_ARCH_7SERIES 0x8000000000000007 + +#define CPU_VENDOR_THEAD 0x5b7 + +#define FCSR_FMASK 0 // no exception bits +#define FCSR_FRM __BITS(7, 5) +#define FCSR_FRM_RNE 0b000 // Round Nearest, ties to Even +#define FCSR_FRM_RTZ 0b001 // Round Towards Zero +#define FCSR_FRM_RDN 0b010 // Round DowN (-infinity) +#define FCSR_FRM_RUP 0b011 // Round UP (+infinity) +#define FCSR_FRM_RMM 0b100 // Round to nearest, ties to Max Magnitude +#define FCSR_FRM_DYN 0b111 // Dynamic rounding +#define FCSR_FFLAGS __BITS(4, 0) // Sticky bits +#define FCSR_NV __BIT(4) // iNValid operation +#define FCSR_DZ __BIT(3) // Divide by Zero +#define FCSR_OF __BIT(2) // OverFlow +#define FCSR_UF __BIT(1) // UnderFlow +#define FCSR_NX __BIT(0) // iNeXact + +static inline uint32_t +fcsr_read(void) +{ + uint32_t __fcsr; + asm("frcsr %0" : "=r"(__fcsr) :: "memory"); + return __fcsr; +} + +static inline uint32_t +fcsr_write(uint32_t __new) +{ + uint32_t __old; + asm volatile("fscsr %0, %1" : "=r"(__old) : "r"(__new) : "memory"); + return __old; +} + +static inline uint32_t +fcsr_fflags_read(void) +{ + uint32_t __old; + asm("frflags %0" : "=r"(__old) :: "memory"); + return __old; +} + +static inline uint32_t +fcsr_fflags_write(uint32_t __new) +{ + uint32_t __old; + asm volatile("fsflags %0, %1" : "=r"(__old) : "r"(__new) : "memory"); + return __old; +} + +static inline uint32_t +fcsr_frm_read(void) +{ + uint32_t __old; + asm("frrm\t%0" : "=r"(__old) :: "memory"); + return __old; +} + +static inline uint32_t +fcsr_frm_write(uint32_t __new) +{ + uint32_t __old; + asm volatile("fsrm\t%0, %1" : "=r"(__old) : "r"(__new) : "memory"); + return __old; +} + +#define RISCVREG_READ_INLINE(regname) \ +static inline uintptr_t \ +csr_##regname##_read(void) \ +{ \ + uintptr_t __rv; \ + asm volatile("csrr %0, " #regname : "=r"(__rv) :: "memory"); \ + return __rv; \ +} + +#define RISCVREG_WRITE_INLINE(regname) \ +static inline void \ +csr_##regname##_write(uintptr_t __val) \ +{ \ + asm volatile("csrw " #regname ", %0" :: "r"(__val) : "memory"); \ +} + +#define RISCVREG_SET_INLINE(regname) \ +static inline void \ +csr_##regname##_set(uintptr_t __mask) \ +{ \ + if (__builtin_constant_p(__mask) && __mask < 0x20) { \ + asm volatile("csrsi " #regname ", %0" :: "i"(__mask) : \ + "memory"); \ + } else { \ + asm volatile("csrs " #regname ", %0" :: "r"(__mask) : \ + "memory"); \ + } \ +} + +#define RISCVREG_CLEAR_INLINE(regname) \ +static inline void \ +csr_##regname##_clear(uintptr_t __mask) \ +{ \ + if (__builtin_constant_p(__mask) && __mask < 0x20) { \ + asm volatile("csrci " #regname ", %0" :: "i"(__mask) : \ + "memory"); \ + } else { \ + asm volatile("csrc " #regname ", %0" :: "r"(__mask) : \ + "memory"); \ + } \ +} + +#define RISCVREG_READ_WRITE_INLINE(regname) \ +RISCVREG_READ_INLINE(regname) \ +RISCVREG_WRITE_INLINE(regname) +#define RISCVREG_SET_CLEAR_INLINE(regname) \ +RISCVREG_SET_INLINE(regname) \ +RISCVREG_CLEAR_INLINE(regname) +#define RISCVREG_READ_SET_CLEAR_INLINE(regname) \ +RISCVREG_READ_INLINE(regname) \ +RISCVREG_SET_CLEAR_INLINE(regname) +#define RISCVREG_READ_WRITE_SET_CLEAR_INLINE(regname) \ +RISCVREG_READ_WRITE_INLINE(regname) \ +RISCVREG_SET_CLEAR_INLINE(regname) + +/* Supervisor Status Register */ +RISCVREG_READ_SET_CLEAR_INLINE(sstatus) // supervisor status register +#ifdef _LP64 +#define SR_WPRI __BITS(62, 34) | __BITS(31, 20) | \ + __BIT(17) | __BITS(12, 11) | __BIT(7) | __BITS(4, 2) | \ + __BIT(0) +#define SR_SD __BIT(63) // any of FS or VS or XS dirty + /* Bits 62-34 are WPRI */ +#define SR_UXL __BITS(33, 32) // U-mode XLEN +#define SR_UXL_32 1 // XLEN == 32 +#define SR_UXL_64 2 // XLEN == 64 +#define SR_UXL_128 3 // XLEN == 128 + /* Bits 31-20 are WPRI*/ +#else +#define SR_WPRI __BITS(30, 20) | \ + __BIT(17) | __BITS(12, 11) | __BIT(7) | __BITS(4, 2) | \ + __BIT(0) +#define SR_SD __BIT(31) // any of FS or VS or XS dirty + /* Bits 30-20 are WPRI*/ +#endif /* _LP64 */ + +/* Both RV32 and RV64 have the bottom 20 bits shared */ +#define SR_MXR __BIT(19) // Make eXecutable Readable +#define SR_SUM __BIT(18) // permit Supervisor User Memory access + /* Bit 17 is WPRI */ +#define SR_XS __BITS(16, 15) // Vector extension state +#define SR_XS_OFF 0 // All off +#define SR_XS_SOME_ON 1 // None dirty or clean, some on +#define SR_XS_SOME_CLEAN 2 // None dirty, some clean +#define SR_XS_SOME_DIRTY 3 // Some dirty +#define SR_FS __BITS(14, 13) // Floating-point unit state +#define SR_FS_OFF 0 // Off +#define SR_FS_INITIAL 1 // Initial +#define SR_FS_CLEAN 2 // Clean +#define SR_FS_DIRTY 3 // Dirty + /* Bits 12-11 are WPRI */ +#define SR_VS __BITS(10, 9) // User-mode extension state +#define SR_VS_OFF SR_FS_OFF // Off +#define SR_VS_INITIAL SR_FS_INITIAL // Initial +#define SR_VS_CLEAN SR_FS_CLEAN // Clean +#define SR_VS_DIRTY SR_FS_DIRTY // Dirty +#define SR_SPP __BIT(8) // Priv level before supervisor mode + /* Bit 7 is WPRI */ +#define SR_UBE __BIT(6) // User-mode endianness +#define SR_SPIE __BIT(5) // S-Mode interrupts enabled before trap + /* Bits 4-2 are WPRI */ +#define SR_SIE __BIT(1) // Supervisor mode interrupt enable + /* Bit 0 is WPRI */ + +/* Supervisor interrupt registers */ +/* ... interrupt pending register (sip) */ +RISCVREG_READ_SET_CLEAR_INLINE(sip) // supervisor interrupt pending + /* Bit (XLEN-1) - 10 is WIRI */ +#define SIP_SEIP __BIT(9) // S-mode interrupt pending + /* Bit 8-6 is WIRI */ +#define SIP_STIP __BIT(5) // S-mode timer interrupt pending + /* Bit 4-2 is WIRI */ +#define SIP_SSIP __BIT(1) // S-mode software interrupt pending + /* Bit 0 is WIRI */ + +/* ... interrupt-enable register (sie) */ +RISCVREG_READ_SET_CLEAR_INLINE(sie) // supervisor interrupt enable + /* Bit (XLEN-1) - 10 is WIRI */ +#define SIE_SEIE __BIT(9) // S-mode interrupt enable + /* Bit 8-6 is WIRI */ +#define SIE_STIE __BIT(5) // S-mode timer interrupt enable + /* Bit 4-2 is WIRI */ +#define SIE_SSIE __BIT(1) // S-mode software interrupt enable + /* Bit 0 is WIRI */ + +// U-mode sstatus values +#ifdef _LP64 +#define SR_USER64 (SR_SPIE | __SHIFTIN(SR_UXL_64, SR_UXL)) +#define SR_USER32 (SR_SPIE | __SHIFTIN(SR_UXL_32, SR_UXL)) +#else +#define SR_USER (SR_SPIE) +#endif + +// Cause register +#define CAUSE_INTERRUPT_P(cause) ((cause) & __BIT(XLEN - 1)) +#define CAUSE_CODE(cause) ((cause) & __BITS(XLEN - 2, 0)) + +// Cause register - exceptions +#define CAUSE_FETCH_MISALIGNED 0 +#define CAUSE_FETCH_ACCESS 1 +#define CAUSE_ILLEGAL_INSTRUCTION 2 +#define CAUSE_BREAKPOINT 3 +#define CAUSE_LOAD_MISALIGNED 4 +#define CAUSE_LOAD_ACCESS 5 +#define CAUSE_STORE_MISALIGNED 6 +#define CAUSE_STORE_ACCESS 7 +#define CAUSE_USER_ECALL 8 +#define CAUSE_SYSCALL CAUSE_USER_ECALL /* convenience alias */ +#define CAUSE_SUPERVISOR_ECALL 9 +/* 10 is reserved */ +#define CAUSE_MACHINE_ECALL 11 +#define CAUSE_FETCH_PAGE_FAULT 12 +#define CAUSE_LOAD_PAGE_FAULT 13 +/* 14 is Reserved */ +#define CAUSE_STORE_PAGE_FAULT 15 +/* >= 16 is reserved/custom */ + +// Cause register - interrupts +#define IRQ_SUPERVISOR_SOFTWARE 1 +#define IRQ_VIRTUAL_SUPERVISOR_SOFTWARE 2 +#define IRQ_MACHINE_SOFTWARE 3 +#define IRQ_SUPERVISOR_TIMER 5 +#define IRQ_VIRTUAL_SUPERVISOR_TIMER 6 +#define IRQ_MACHINE_TIMER 7 +#define IRQ_SUPERVISOR_EXTERNAL 9 +#define IRQ_VIRTUAL_SUPERVISOR_EXTERNAL 10 +#define IRQ_MACHINE_EXTERNAL 11 +#define IRQ_SUPERVISOR_GUEST_EXTERNAL 12 +#define IRQ_NSOURCES 16 + +RISCVREG_READ_INLINE(time) +#ifdef _LP64 +RISCVREG_READ_INLINE(cycle) +#else /* !_LP64 */ +static inline uint64_t +csr_cycle_read(void) +{ + uint32_t __hi0, __hi1, __lo0; + do { + asm volatile( + "csrr\t%[__hi0], cycleh" + "\n\t" "csrr\t%[__lo0], cycle" + "\n\t" "csrr\t%[__hi1], cycleh" + : [__hi0] "=r"(__hi0), + [__lo0] "=r"(__lo0), + [__hi1] "=r"(__hi1)); + } while (__hi0 != __hi1); + return + __SHIFTIN(__hi0, __BITS(63, 32)) | + __SHIFTIN(__lo0, __BITS(31, 0)); +} +#endif /* !_LP64 */ + +#ifdef _LP64 +#define SATP_MODE __BITS(63, 60) // Translation mode +#define SATP_MODE_BARE 0 // No translation or protection + /* modes 1-7 reserved for standard use */ +#define SATP_MODE_SV39 8 // Page-based 39-bit virt addr +#define SATP_MODE_SV48 9 // Page-based 48-bit virt addr +#define SATP_MODE_SV57 10 // Page-based 57-bit virt addr +#define SATP_MODE_SV64 11 // Page-based 64-bit virt addr + /* modes 12-13 reserved for standard use */ + /* modes 14-15 designated for custom use */ +#define SATP_ASID __BITS(59, 44) // Address Space Identifier +#define SATP_PPN __BITS(43, 0) // Physical Page Number +#else +#define SATP_MODE __BIT(31) // Translation mode +#define SATP_MODE_BARE 0 // No translation or protection +#define SATP_MODE_SV32 1 // Page-based 32-bit virt addr +#define SATP_ASID __BITS(30, 22) // Address Space Identifier +#define SATP_PPN __BITS(21, 0) // Physical Page Number +#endif + +RISCVREG_READ_WRITE_INLINE(satp) + +/* Fake "ASID" CSR (a field of SATP register) functions */ +static inline uint32_t +csr_asid_read(void) +{ + uintptr_t satp = csr_satp_read(); + return __SHIFTOUT(satp, SATP_ASID); +} + +static inline void +csr_asid_write(uint32_t asid) +{ + uintptr_t satp = csr_satp_read(); + satp &= ~SATP_ASID; + satp |= __SHIFTIN(asid, SATP_ASID); + csr_satp_write(satp); +} + +/* Non-standard CSRs. */ +static inline uintptr_t +csr_thead_sxstatus_read(void) +{ + uintptr_t __rv; + asm volatile("csrr %0, 0x5c0" : "=r"(__rv) :: "memory"); + return __rv; +} + +#define TX_SXSTATUS_MAEE __BIT(21) +#define TH_SXSTATUS_THEADISAEE __BIT(22) + +#endif /* _RISCV_SYSREG_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/machine/trap.h b/lib/libc/include/generic-netbsd/machine/trap.h @@ -1,3 +1,3 @@ -/* $NetBSD: trap.h,v 1.1 2002/12/09 12:16:18 scw Exp $ */ +/* $NetBSD: trap.h,v 1.1 2002/03/07 14:44:02 simonb Exp $ */ -#include <powerpc/trap.h> -\ No newline at end of file +#include <mips/trap.h> +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/machine/types.h b/lib/libc/include/generic-netbsd/machine/types.h @@ -1,11 +1,123 @@ -/* $NetBSD: types.h,v 1.11 2017/01/26 15:55:09 christos Exp $ */ +/* $NetBSD: types.h,v 1.19 2024/11/23 18:13:04 skrll Exp $ */ -#ifndef _EVBPPC_TYPES_H_ -#define _EVBPPC_TYPES_H_ +/*- + * Copyright (c) 2014 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Matt Thomas of 3am Software Foundry. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ -#include <powerpc/types.h> +#ifndef _RISCV_TYPES_H_ +#define _RISCV_TYPES_H_ -#define __HAVE_NEW_STYLE_BUS_H +#include <sys/cdefs.h> +#include <sys/featuretest.h> +#include <riscv/int_types.h> + +#if defined(_KERNEL) || defined(_KMEMUSER) || defined(_KERNTYPES) || defined(_STANDALONE) + +/* XLEN is the native base integer ISA width */ +#define XLEN (sizeof(long) * NBBY) + +typedef __uint64_t paddr_t; +typedef __uint64_t psize_t; +#define PRIxPADDR PRIx64 +#define PRIxPSIZE PRIx64 +#define PRIuPSIZE PRIu64 + +typedef __UINTPTR_TYPE__ vaddr_t; +typedef __UINTPTR_TYPE__ vsize_t; +#define PRIxVADDR PRIxPTR +#define PRIxVSIZE PRIxPTR +#define PRIuVSIZE PRIuPTR + +#ifdef _LP64 // match <riscv/reg.h> +#define PRIxREGISTER PRIx64 +typedef __int64_t register_t; +typedef __uint64_t uregister_t; +#else +#define PRIxREGISTER PRIx32 +typedef __int32_t register_t; +typedef __uint32_t uregister_t; +#endif +typedef signed int register32_t; +typedef unsigned int uregister32_t; +#define PRIxREGISTER32 "x" + +typedef unsigned int tlb_asid_t; +#endif + +#if defined(_KERNEL) +typedef struct label_t { /* Used by setjmp & longjmp */ + register_t lb_reg[16]; /* */ + __uint32_t lb_sr; +} label_t; +#endif + +typedef unsigned int __cpu_simple_lock_nv_t; +#ifdef _LP64 +typedef __int64_t __register_t; +#else +typedef __int32_t __register_t; +#endif + +#define __SIMPLELOCK_LOCKED 1 +#define __SIMPLELOCK_UNLOCKED 0 + +#define __HAVE_COMMON___TLS_GET_ADDR #define __HAVE_COMPAT_NETBSD32 +#define __HAVE_CPU_COUNTER +#define __HAVE_CPU_DATA_FIRST +#define __HAVE_CPU_LWP_SETPRIVATE +#if 0 +#define __HAVE_FAST_SOFTINTS // Not yet +#endif +#define __HAVE_MM_MD_DIRECT_MAPPED_PHYS +#define __HAVE_MM_MD_KERNACC +#define __HAVE_NEW_STYLE_BUS_H +#define __HAVE_SYSCALL_INTERN +#define __HAVE_TLS_VARIANT_I +#define __HAVE_UCAS_FULL +/* XXX temporary */ +#define __HAVE_UNLOCKED_PMAP +#define __HAVE___LWP_GETPRIVATE_FAST +#define __HAVE___LWP_GETTCB_FAST +#define __HAVE___LWP_SETTCB + +#ifdef __LP64 +#define __HAVE_ATOMIC64_OPS +#define __HAVE_CPU_UAREA_ROUTINES +#endif + +//#if defined(_KERNEL) +//#define __HAVE_RAS +//#endif + +#if defined(_KERNEL) || defined(_KMEMUSER) +#define PCU_FPU 0 +#define PCU_UNIT_COUNT 1 +#endif -#endif -\ No newline at end of file +#endif /* _RISCV_TYPES_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/machine/vmparam.h b/lib/libc/include/generic-netbsd/machine/vmparam.h @@ -1,3 +1,236 @@ -/* $NetBSD: vmparam.h,v 1.5 2011/06/20 08:01:13 matt Exp $ */ +/* $NetBSD: vmparam.h,v 1.14 2023/05/07 12:41:48 skrll Exp $ */ -#include <powerpc/vmparam.h> -\ No newline at end of file +/*- + * Copyright (c) 2014, 2020 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Matt Thomas of 3am Software Foundry, and Nick Hudson. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _RISCV_VMPARAM_H_ +#define _RISCV_VMPARAM_H_ + +#include <riscv/param.h> + +#ifdef _KERNEL_OPT +#include "opt_multiprocessor.h" +#endif + +/* + * Machine dependent VM constants for RISCV. + */ + +/* + * We use a 4K page on both RV64 and RV32 systems. + * Override PAGE_* definitions to compile-time constants. + */ +#define PAGE_SHIFT PGSHIFT +#define PAGE_SIZE (1 << PAGE_SHIFT) +#define PAGE_MASK (PAGE_SIZE - 1) + +/* + * USRSTACK is the top (end) of the user stack. + * + * USRSTACK needs to start a page below the maxuser address so that a memory + * access with a maximum displacement (0x7ff) won't cross into the kernel's + * address space. We use PAGE_SIZE instead of 0x800 since these need to be + * page-aligned. + */ +#define USRSTACK (VM_MAXUSER_ADDRESS - PAGE_SIZE) /* Start of user stack */ +#define USRSTACK32 ((uint32_t)VM_MAXUSER_ADDRESS32 - PAGE_SIZE) + +/* + * Virtual memory related constants, all in bytes + */ +#ifndef MAXTSIZ +#define MAXTSIZ (128*1024*1024) /* max text size */ +#endif +#ifndef DFLDSIZ +#define DFLDSIZ (256*1024*1024) /* initial data size limit */ +#endif +#ifndef MAXDSIZ +#define MAXDSIZ (1536*1024*1024) /* max data size */ +#endif +#ifndef DFLSSIZ +#define DFLSSIZ (4*1024*1024) /* initial stack size limit */ +#endif +#ifndef MAXSSIZ +#define MAXSSIZ (120*1024*1024) /* max stack size */ +#endif + +/* + * Virtual memory related constants, all in bytes + */ +#ifndef DFLDSIZ32 +#define DFLDSIZ32 DFLDSIZ /* initial data size limit */ +#endif +#ifndef MAXDSIZ32 +#define MAXDSIZ32 MAXDSIZ /* max data size */ +#endif +#ifndef DFLSSIZ32 +#define DFLSSIZ32 DFLTSIZ /* initial stack size limit */ +#endif +#ifndef MAXSSIZ32 +#define MAXSSIZ32 MAXSSIZ /* max stack size */ +#endif + +/* + * PTEs for mapping user space into the kernel for phyio operations. + * The default PTE number is enough to cover 8 disks * MAXBSIZE. + */ +#ifndef USRIOSIZE +#define USRIOSIZE (MAXBSIZE/PAGE_SIZE * 8) +#endif + +/* + * User/kernel map constants. + */ +#define VM_MIN_ADDRESS ((vaddr_t)PAGE_SIZE) +#ifdef _LP64 /* Sv39 / Sv48 / Sv57 */ +/* + * SV39 gives 1 << (39 - 1) address space to kernel and same to userland. + * This is 256GiB each. Split the kernel space in two and use the top half + * for direct map. + * + * kernel virtual space layout: + * 0xffff_ffc0_0000_0000 - 64GiB KERNEL VM Space (inc. text/data/bss) + * (0xffff_ffc0_4000_0000 +1GiB) KERNEL VM start of KVA + * (0xffff_ffd0_0000_0000 64GiB) reserved + * 0xffff_ffe0_0000_0000 - 128GiB direct mapping + */ +#define VM_MAXUSER_ADDRESS ((vaddr_t)0x0000004000000000 - 16 * PAGE_SIZE) +#define VM_MIN_KERNEL_ADDRESS ((vaddr_t)0xffffffc000000000) +#define VM_MAX_KERNEL_ADDRESS ((vaddr_t)0xffffffd000000000) + +#else /* Sv32 */ +/* + * kernel virtual space layout: + * 0x8000_0000 - 64GiB KERNEL VM Space (inc. text/data/bss) + * (0x4000_0000 +1GiB) KERNEL VM start of KVA + * (0x0000_0000 64GiB) reserved + */ + +/* + * kernel virtual space layout without direct map (common case) + * + * 0x8000_0000 - 256MB kernel text/data/bss + * 0x9000_0000 - 1536MB Kernel VM Space + * 0xf000_0000 - 256MB IO + * + * kernel virtual space layout with KASAN + * + * 0x8000_0000 - 256MB kernel text/data/bss + * 0x9000_0000 - 768MB Kernel VM Space + * 0xc000_0000 - 128MB (KASAN SHADOW MAP) + * 0xc800_0000 - 640MB (spare) + * 0xf000_0000 - 256MB IO + * + * kernel virtual space layout with direct map (1GB limited) + * 0x8000_0000 - 1024MB kernel text/data/bss and direct map start + * 0xc000_0000 - 768MB Kernel VM Space + * 0xf000_0000 - 256MB IO + * + */ + + + +#define VM_MAXUSER_ADDRESS ((vaddr_t)-0x7fffffff-1)/* 0xffff_ffff_8000_0000 */ +#define VM_MIN_KERNEL_ADDRESS ((vaddr_t)-0x7fffffff-1)/* 0xffff_ffff_8000_0000 */ +#define VM_MAX_KERNEL_ADDRESS ((vaddr_t)-0x10000000) /* 0xffff_ffff_f000_0000 */ + +#endif +#define VM_KERNEL_BASE VM_MIN_KERNEL_ADDRESS +#define VM_KERNEL_SIZE 0x2000000 /* 32 MiB (8 / 16 megapages) */ +#define VM_KERNEL_DTB_BASE (VM_KERNEL_BASE + VM_KERNEL_SIZE) +#define VM_KERNEL_DTB_SIZE 0x1000000 /* 16 MiB (4 / 8 megapages) */ +#define VM_KERNEL_IO_BASE (VM_KERNEL_DTB_BASE + VM_KERNEL_DTB_SIZE) +#define VM_KERNEL_IO_SIZE 0x1000000 /* 16 MiB (4 / 8 megapages) */ + +#define VM_KERNEL_RESERVED (VM_KERNEL_SIZE + VM_KERNEL_DTB_SIZE + VM_KERNEL_IO_SIZE) + +#define VM_KERNEL_VM_BASE (VM_MIN_KERNEL_ADDRESS + VM_KERNEL_RESERVED) +#define VM_KERNEL_VM_SIZE (VM_MAX_KERNEL_ADDRESS - VM_KERNEL_VM_BASE) + +#define VM_MAX_ADDRESS VM_MAXUSER_ADDRESS +#define VM_MAXUSER_ADDRESS32 ((vaddr_t)(1UL << 31))/* 0x0000000080000000 */ + +#ifdef _LP64 +/* + * Since we have the address space, we map all of physical memory (RAM) + * using gigapages on SV39, terapages on SV48 and petapages on SV57. + */ +#define RISCV_DIRECTMAP_MASK ((vaddr_t) 0xffffffe000000000L) +#define RISCV_DIRECTMAP_SIZE (-RISCV_DIRECTMAP_MASK - PAGE_SIZE) /* 128GiB */ +#define RISCV_DIRECTMAP_START RISCV_DIRECTMAP_MASK +#define RISCV_DIRECTMAP_END (RISCV_DIRECTMAP_START + RISCV_DIRECTMAP_SIZE) +#define RISCV_DIRECTMAP_P(va) (((vaddr_t) (va) & RISCV_DIRECTMAP_MASK) == RISCV_DIRECTMAP_MASK) +#define RISCV_PA_TO_KVA(pa) ((vaddr_t) ((pa) | RISCV_DIRECTMAP_START)) +#define RISCV_KVA_TO_PA(va) ((paddr_t) ((va) & ~RISCV_DIRECTMAP_MASK)) +#endif + +/* + * The address to which unspecified mapping requests default + */ +#define __USE_TOPDOWN_VM + +#define VM_DEFAULT_ADDRESS_TOPDOWN(da, sz) \ + trunc_page(USRSTACK - MAXSSIZ - (sz) - user_stack_guard_size) +#define VM_DEFAULT_ADDRESS_BOTTOMUP(da, sz) \ + round_page((vaddr_t)(da) + (vsize_t)maxdmap) + +#define VM_DEFAULT_ADDRESS32_TOPDOWN(da, sz) \ + trunc_page(USRSTACK32 - MAXSSIZ32 - (sz) - user_stack_guard_size) +#define VM_DEFAULT_ADDRESS32_BOTTOMUP(da, sz) \ + round_page((vaddr_t)(da) + (vsize_t)MAXDSIZ32) + +/* virtual sizes (bytes) for various kernel submaps */ +#define VM_PHYS_SIZE (USRIOSIZE*PAGE_SIZE) + +/* + * max number of non-contig chunks of physical RAM you can have + */ +#define VM_PHYSSEG_MAX 64 + +/* + * when converting a physical address to a vm_page structure, we + * want to use a binary search on the chunks of physical memory + * to find our RAM + */ +#define VM_PHYSSEG_STRAT VM_PSTRAT_BSEARCH + +#ifndef VM_NFREELIST +#define VM_NFREELIST 2 /* 2 distinct memory segments */ +#define VM_FREELIST_DEFAULT 0 +#define VM_FREELIST_DIRECTMAP 1 +#endif + +#ifdef _KERNEL +#ifdef _LP64 +void * cpu_uarea_alloc(bool); +bool cpu_uarea_free(void *); +#endif +#endif + +#endif /* ! _RISCV_VMPARAM_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/machine/wchar_limits.h b/lib/libc/include/generic-netbsd/machine/wchar_limits.h @@ -1,3 +1,3 @@ -/* $NetBSD: wchar_limits.h,v 1.2 2005/12/11 12:17:12 christos Exp $ */ +/* $NetBSD: wchar_limits.h,v 1.1 2014/09/19 17:36:26 matt Exp $ */ -#include <powerpc/wchar_limits.h> -\ No newline at end of file +#include <sys/common_wchar_limits.h> +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/math.h b/lib/libc/include/generic-netbsd/math.h @@ -1,4 +1,4 @@ -/* $NetBSD: math.h,v 1.67.2.1 2024/10/11 19:01:11 martin Exp $ */ +/* $NetBSD: math.h,v 1.72 2024/09/09 15:06:29 riastradh Exp $ */ /* * ==================================================== @@ -514,6 +514,7 @@ long double fminl(long double, long double); #endif /* !_ANSI_SOURCE && ... */ #if defined(_NETBSD_SOURCE) + #ifndef __cplusplus int matherr(struct exception *); #endif @@ -528,6 +529,22 @@ double significand(double); */ double drem(double, double); +void sincos(double, double *, double *); +void sincosf(float, float *, float *); +void sincosl(long double, long double *, long double *); + +double cospi(double); +float cospif(float); +long double cospil(long double); + +double sinpi(double); +float sinpif(float); +long double sinpil(long double); + +double tanpi(double); +float tanpif(float); +long double tanpil(long double); + #endif /* _NETBSD_SOURCE */ #if defined(_NETBSD_SOURCE) || defined(_REENTRANT) @@ -537,9 +554,9 @@ double drem(double, double); */ double gamma_r(double, int *); double lgamma_r(double, int *); +long double lgammal_r(long double, int *); #endif /* _NETBSD_SOURCE || _REENTRANT */ - #if defined(_NETBSD_SOURCE) /* float versions of ANSI/POSIX functions */ @@ -566,10 +583,6 @@ float significandf(float); * float versions of BSD math library entry points */ float dremf(float, float); - -void sincos(double, double *, double *); -void sincosf(float, float *, float *); -void sincosl(long double, long double *, long double *); #endif /* _NETBSD_SOURCE */ #if defined(_NETBSD_SOURCE) || defined(_REENTRANT) diff --git a/lib/libc/include/generic-netbsd/md2.h b/lib/libc/include/generic-netbsd/md2.h @@ -1,4 +1,4 @@ -/* $NetBSD: md2.h,v 1.7 2016/07/01 16:42:46 christos Exp $ */ +/* $NetBSD: md2.h,v 1.9 2024/01/19 18:40:35 christos Exp $ */ #ifndef _MD2_H_ #define _MD2_H_ @@ -21,10 +21,13 @@ __BEGIN_DECLS void MD2Init(MD2_CTX *); void MD2Update(MD2_CTX *, const unsigned char *, unsigned int); void MD2Final(unsigned char[16], MD2_CTX *); -char *MD2End(MD2_CTX *, char *); +char *MD2End(MD2_CTX *, char[MD2_DIGEST_STRING_LENGTH]); char *MD2File(const char *, char *); char *MD2FileChunk(const char *, char *, off_t, off_t); -char *MD2Data(const unsigned char *, size_t, char *); +char *MD2Data(const unsigned char *, size_t, char[MD2_DIGEST_STRING_LENGTH]); +#ifdef _LIBC_INTERNAL +void MD2Transform(MD2_CTX *); +#endif __END_DECLS #endif /* _MD2_H_ */ \ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/mips/asm.h b/lib/libc/include/generic-netbsd/mips/asm.h @@ -1,4 +1,4 @@ -/* $NetBSD: asm.h,v 1.71.4.1 2023/07/31 13:36:30 martin Exp $ */ +/* $NetBSD: asm.h,v 1.77 2025/01/06 10:46:43 martin Exp $ */ /* * Copyright (c) 1992, 1993 @@ -59,6 +59,7 @@ #if defined(_KERNEL_OPT) #include "opt_gprof.h" +#include "opt_multiprocessor.h" #endif #ifdef __ASSEMBLER__ @@ -70,6 +71,9 @@ #define __SHIFTIN(__x, __mask) ((__x) * __LOWEST_SET_BIT(__mask)) #endif /* __ASSEMBLER__ */ +#ifndef GPROF +#define _MIPS_ASM_MCOUNT(x) +#else /* * Define -pg profile entry code. * Must always be noreorder, must never use a macro instruction. @@ -80,7 +84,7 @@ * stack and the final addiu to t9 must always equal the size of this * _MIPS_ASM_MCOUNT. */ -#define _MIPS_ASM_MCOUNT \ +#define _MIPS_ASM_MCOUNT(x) \ .set push; \ .set noreorder; \ .set noat; \ @@ -103,7 +107,8 @@ * call _mcount(). For the no abicalls case, skip the reloc dance. */ #ifdef __mips_abicalls -#define _MIPS_ASM_MCOUNT \ +#if defined(__mips_n32) /* n32 */ +#define _MIPS_ASM_MCOUNT(x) \ .set push; \ .set noreorder; \ .set noat; \ @@ -117,8 +122,28 @@ lw t9,8(sp); \ addiu sp,16; \ .set pop; +#else /* n64 */ +#define _MIPS_ASM_MCOUNT(x) \ + .set push; \ + .set noreorder; \ + .set noat; \ + dsubu sp,16; \ + sd gp,0(sp); \ + sd t9,8(sp); \ + move AT,ra; \ + lui gp,%hi(%neg(%gp_rel(x))); \ + daddiu gp,%lo(%neg(%gp_rel(x))); \ + daddu gp,gp,t9; \ + ld t9,%call16(_mcount)(gp); \ + jalr t9; \ + nop; \ + ld gp,0(sp); \ + ld t9,8(sp); \ + daddiu sp,16; \ + .set pop; +#endif #else /* !__mips_abicalls */ -#define _MIPS_ASM_MCOUNT \ +#define _MIPS_ASM_MCOUNT(x) \ .set push; \ .set noreorder; \ .set noat; \ @@ -128,12 +153,7 @@ .set pop; #endif /* !__mips_abicalls */ #endif /* n32/n64 */ - -#ifdef GPROF -#define MCOUNT _MIPS_ASM_MCOUNT -#else -#define MCOUNT -#endif +#endif /* GPROF */ #ifdef USE_AENT #define AENT(x) \ @@ -186,7 +206,7 @@ _C_LABEL(x): ; \ */ #define STATIC_LEAF(x) \ STATIC_LEAF_NOPROFILE(x); \ - MCOUNT + _MIPS_ASM_MCOUNT(x) /* * LEAF @@ -197,7 +217,7 @@ _C_LABEL(x): ; \ */ #define LEAF(x) \ LEAF_NOPROFILE(x); \ - MCOUNT + _MIPS_ASM_MCOUNT(x) /* * STATIC_XLEAF @@ -240,7 +260,7 @@ _C_LABEL(x): ; \ */ #define NESTED(x, fsize, retpc) \ NESTED_NOPROFILE(x, fsize, retpc); \ - MCOUNT + _MIPS_ASM_MCOUNT(x) /* * STATIC_NESTED @@ -248,7 +268,7 @@ _C_LABEL(x): ; \ */ #define STATIC_NESTED(x, fsize, retpc) \ STATIC_NESTED_NOPROFILE(x, fsize, retpc); \ - MCOUNT + _MIPS_ASM_MCOUNT(x) /* * XNESTED @@ -326,9 +346,18 @@ _C_LABEL(x): .asciz str; \ .align 3 +#ifdef _NETBSD_REVISIONID +#define RCSID(x) .pushsection ".ident","MS",@progbits,1; \ + .asciz x; \ + .ascii "$"; .ascii "NetBSD: "; .ascii __FILE__; \ + .ascii " "; .ascii _NETBSD_REVISIONID; \ + .asciz " $"; \ + .popsection +#else #define RCSID(x) .pushsection ".ident","MS",@progbits,1; \ .asciz x; \ .popsection +#endif /* * XXX retain dialects XXX @@ -573,7 +602,7 @@ _C_LABEL(x): #endif /* compiler define */ -#if defined(__OCTEON__) +#if defined(MULTIPROCESSOR) && defined(__OCTEON__) /* * See common/lib/libc/arch/mips/atomic/membar_ops.S for notes on * Octeon memory ordering guarantees and barriers. @@ -582,7 +611,30 @@ _C_LABEL(x): * we need to apply a plunger to it _after_ releasing a lock or else * other CPUs may spin for hundreds of thousands of cycles before they * see the lock is released. So we also have the quirky SYNC_PLUNGER - * barrier as syncw. + * barrier as syncw. See the note in the SYNCW instruction description + * on p. 2168 of Cavium OCTEON III CN78XX Hardware Reference Manual, + * CN78XX-HM-0.99E, September 2014: + * + * Core A (writer) + * + * SW R1, DATA# change shared DATA value + * LI R1, 1 + * SYNCW# (or SYNCWS) Perform DATA store before performing FLAG store + * SW R2, FLAG# say that the shared DATA value is valid + * SYNCW# (or SYNCWS) Force the FLAG store soon (CN78XX-specific) + * + * ... + * + * The second SYNCW instruction executed by core A is not + * necessary for correctness, but has very important performance + * effects on the CN78XX. Without it, the store to FLAG may + * linger in core A's write buffer before it becomes visible to + * any other cores. (If core A is not performing many stores, + * this may add hundreds of thousands of cycles to the flag + * release time since the CN78XX core nominally retains stores to + * attempt to merge them before sending the store on the CMI.) + * Applications should include this second SYNCW instruction after + * flag or lock release. */ #define LLSCSYNC /* nothing */ #define BDSYNC sync @@ -591,7 +643,7 @@ _C_LABEL(x): #define SYNC_REL sync 4 #define BDSYNC_PLUNGER sync 4 #define SYNC_PLUNGER sync 4 -#elif __mips >= 3 || !defined(__mips_o32) +#elif defined(MULTIPROCESSOR) && (__mips >= 3 || !defined(__mips_o32)) #define LLSCSYNC /* nothing */ #define BDSYNC sync #define BDSYNC_ACQ sync diff --git a/lib/libc/include/generic-netbsd/mips/bswap.h b/lib/libc/include/generic-netbsd/mips/bswap.h @@ -1,4 +1,4 @@ -/* $NetBSD: bswap.h,v 1.5 2020/07/26 08:08:41 simonb Exp $ */ +/* $NetBSD: bswap.h,v 1.5.28.1 2025/12/05 13:03:52 martin Exp $ */ /*- * Copyright (c) 2013 The NetBSD Foundation, Inc. @@ -29,6 +29,8 @@ #define _MIPS_BSWAP_H_ #define __BSWAP_RENAME +#define __HAVE_SLOW_BSWAP_BUILTIN + #include <sys/bswap.h> #endif /* !_MIPS_BSWAP_H_ */ \ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/mips/cpu.h b/lib/libc/include/generic-netbsd/mips/cpu.h @@ -1,4 +1,4 @@ -/* $NetBSD: cpu.h,v 1.133 2021/08/14 17:51:19 ryo Exp $ */ +/* $NetBSD: cpu.h,v 1.135 2023/07/23 07:20:45 skrll Exp $ */ /*- * Copyright (c) 1992, 1993 @@ -150,11 +150,11 @@ struct cpu_info { struct evcnt ci_evcnt_synci_deferred_rqst; struct evcnt ci_evcnt_synci_ipi_rqst; -#define CPUF_PRIMARY 0x01 /* CPU is primary CPU */ -#define CPUF_PRESENT 0x02 /* CPU is present */ -#define CPUF_RUNNING 0x04 /* CPU is running */ -#define CPUF_PAUSED 0x08 /* CPU is paused */ -#define CPUF_USERPMAP 0x20 /* CPU has a user pmap activated */ +#define CPUF_PRIMARY __BIT(0) /* CPU is primary CPU */ +#define CPUF_PRESENT __BIT(1) /* CPU is present */ +#define CPUF_RUNNING __BIT(2) /* CPU is running */ +#define CPUF_PAUSED __BIT(3) /* CPU is paused */ +#define CPUF_USERPMAP __BIT(5) /* CPU has a user pmap activated */ kcpuset_t *ci_shootdowncpus; kcpuset_t *ci_multicastcpus; kcpuset_t *ci_watchcpus; @@ -242,7 +242,7 @@ struct clockframe { }; /* - * A port must provde CLKF_USERMODE() for use in machine-independent code. + * A port must provide CLKF_USERMODE() for use in machine-independent code. * These differ on r4000 and r3000 systems; provide them in the * port-dependent file that includes this one, using the macros below. */ diff --git a/lib/libc/include/generic-netbsd/mips/elf_machdep.h b/lib/libc/include/generic-netbsd/mips/elf_machdep.h @@ -1,4 +1,4 @@ -/* $NetBSD: elf_machdep.h,v 1.20 2017/11/06 19:17:43 christos Exp $ */ +/* $NetBSD: elf_machdep.h,v 1.21 2025/04/16 01:56:52 riastradh Exp $ */ /*- * Copyright (c) 2013 The NetBSD Foundation, Inc. @@ -152,6 +152,7 @@ #define DT_MIPS_RLD_MAP 0x70000016 /* address of loader map */ #define DT_MIPS_PLTGOT 0x70000032 #define DT_MIPS_RWPLT 0x70000034 +#define DT_MIPS_RLD_MAP_REL 0x70000035 /* * ELF Flags diff --git a/lib/libc/include/generic-netbsd/mips/fenv.h b/lib/libc/include/generic-netbsd/mips/fenv.h @@ -1,4 +1,4 @@ -/* $NetBSD: fenv.h,v 1.6 2020/07/26 08:08:41 simonb Exp $ */ +/* $NetBSD: fenv.h,v 1.7 2024/10/30 15:56:11 riastradh Exp $ */ /*- * Copyright (c) 2004-2005 David Schultz <das@FreeBSD.ORG> @@ -31,6 +31,7 @@ #ifndef _MIPS_FENV_H_ #define _MIPS_FENV_H_ +#include <sys/featuretest.h> #include <sys/stdint.h> /* Exception flags */ diff --git a/lib/libc/include/generic-netbsd/mips/float.h b/lib/libc/include/generic-netbsd/mips/float.h @@ -1,4 +1,4 @@ -/* $NetBSD: float.h,v 1.18 2020/07/26 08:08:41 simonb Exp $ */ +/* $NetBSD: float.h,v 1.20 2024/10/30 15:56:11 riastradh Exp $ */ /*- * Copyright (c) 2013 The NetBSD Foundation, Inc. @@ -29,6 +29,7 @@ #define _MIPS_FLOAT_H_ #include <sys/cdefs.h> +#include <sys/featuretest.h> #if defined(__mips_n32) || defined(__mips_n64) @@ -55,7 +56,7 @@ #if __STDC_VERSION__ >= 199901L #define LDBL_EPSILON 0x1p-112L #define LDBL_MIN 0x1p-16382L -#define LDBL_MAX 0x1.ffffffffffffffffffffffffffffp+16383L, +#define LDBL_MAX 0x1.ffffffffffffffffffffffffffffp+16383L #else #define LDBL_EPSILON 1.9259299443872358530559779425849273E-34L #define LDBL_MIN 3.3621031431120935062626778173217526E-4932L diff --git a/lib/libc/include/generic-netbsd/mips/frame.h b/lib/libc/include/generic-netbsd/mips/frame.h @@ -1,4 +1,4 @@ -/* $NetBSD: frame.h,v 1.12 2021/03/29 01:46:26 simonb Exp $ */ +/* $NetBSD: frame.h,v 1.13 2025/04/25 00:26:58 riastradh Exp $ */ /* * Copyright (c) 2001 The NetBSD Foundation, Inc. @@ -40,8 +40,9 @@ #endif #include <sys/signal.h> +#include <sys/stddef.h> -void *getframe(struct lwp *, int, int *); +void *getframe(struct lwp *, int, int *, size_t, size_t); #define lwp_trapframe(l) ((l)->l_md.md_utf) #if defined(COMPAT_16) || defined(COMPAT_ULTRIX) diff --git a/lib/libc/include/generic-netbsd/mips/limits.h b/lib/libc/include/generic-netbsd/mips/limits.h @@ -1,4 +1,4 @@ -/* $NetBSD: limits.h,v 1.28 2020/07/26 08:08:41 simonb Exp $ */ +/* $NetBSD: limits.h,v 1.29 2024/03/16 21:50:47 christos Exp $ */ /* * Copyright (c) 1988, 1993 @@ -94,18 +94,9 @@ #define SIZE_T_MAX UINT_MAX /* max value for a size_t */ #endif -#ifdef _LP64 -/* Quads and longs are the same on LP64. */ -#define UQUAD_MAX (ULONG_MAX) -#define QUAD_MAX (LONG_MAX) -#define QUAD_MIN (LONG_MIN) -#else -/* GCC requires that quad constants be written as expressions. */ -#define UQUAD_MAX ((u_quad_t)0-1) /* max value for a uquad_t */ - /* max value for a quad_t */ -#define QUAD_MAX ((quad_t)(UQUAD_MAX >> 1)) -#define QUAD_MIN (-QUAD_MAX-1) /* min value for a quad_t */ -#endif +#define UQUAD_MAX 0xffffffffffffffffULL /* max unsigned quad */ +#define QUAD_MAX 0x7fffffffffffffffLL /* max signed quad */ +#define QUAD_MIN (-0x7fffffffffffffffLL-1) /* min signed quad */ #endif /* _NETBSD_SOURCE */ #endif /* _POSIX_C_SOURCE || _XOPEN_SOURCE || _NETBSD_SOURCE */ diff --git a/lib/libc/include/generic-netbsd/mips/lwp_private.h b/lib/libc/include/generic-netbsd/mips/lwp_private.h @@ -0,0 +1,87 @@ +/* $NetBSD: lwp_private.h,v 1.1 2024/11/30 01:04:11 christos Exp $ */ + +/*- + * Copyright (c) 1999, 2002 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Klaus Klein, and by Jason R. Thorpe of Wasabi Systems, Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _MIPS_LWP_PRIVATE_H_ +#define _MIPS_LWP_PRIVATE_H_ + +#include <lwp.h> +#include <sys/cdefs.h> +#include <sys/tls.h> + +#define TLS_TP_OFFSET 0x7000 +#define TLS_DTV_OFFSET 0x8000 + +__CTASSERT(TLS_TP_OFFSET + sizeof(struct tls_tcb) < 0x8000); +__CTASSERT(TLS_TP_OFFSET % sizeof(struct tls_tcb) == 0); + +__BEGIN_DECLS + +static __inline struct tls_tcb * +__lwp_gettcb_fast(void) +{ + struct tls_tcb *__tcb; + + /* + * Only emit a rdhwr $3, $29 so the kernel can quickly emulate it. + */ + __asm __volatile( +#if 1 + // For some reason the syscall is much faster than + // emulating rdhwr $3,$29 on a CN50xx + "addiu $2,$0,316; syscall; nop; move %[__tcb],$2" +#else + ".set push" + ";.set mips32r2" + ";.p2align 4" + ";ssnop" + ";rdhwr $3,$29" + ";ssnop" + ";move %0,$3" + ";.set pop" +#endif + : [__tcb]"=r"(__tcb) + : + : "v0", "v1", "a3"); + return __tcb - (TLS_TP_OFFSET / sizeof(*__tcb) + 1); +} + +void _lwp_setprivate(void *); + +static inline void +__lwp_settcb(struct tls_tcb *__tcb) +{ + __tcb += TLS_TP_OFFSET / sizeof(*__tcb) + 1; + _lwp_setprivate(__tcb); +} + +__END_DECLS + +#endif /* _MIPS_LWP_PRIVATE_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/mips/mcontext.h b/lib/libc/include/generic-netbsd/mips/mcontext.h @@ -1,4 +1,4 @@ -/* $NetBSD: mcontext.h,v 1.24 2020/10/03 09:56:00 martin Exp $ */ +/* $NetBSD: mcontext.h,v 1.28 2025/04/09 06:00:38 rin Exp $ */ /*- * Copyright (c) 1999, 2002 The NetBSD Foundation, Inc. @@ -174,7 +174,7 @@ typedef struct { #define __UCONTEXT_SIZE_O32 (40 + 296 + 56) /* 392 */ #define __UCONTEXT_SIZE_N32 (40 + 568 + 56) /* 664 */ -#define __UCONTEXT_SIZE_N64 (56 + 576 + 112) /* 774 */ +#define __UCONTEXT_SIZE_N64 (56 + 576 + 112) /* 744 */ #ifdef __mips_o32 #define __UCONTEXT_SIZE __UCONTEXT_SIZE_O32 @@ -187,55 +187,4 @@ typedef struct { #error O64 is not supported #endif -#if defined(_LIBC_SOURCE) || defined(_RTLD_SOURCE) || defined(__LIBPTHREAD_SOURCE__) -#define TLS_TP_OFFSET 0x7000 -#define TLS_DTV_OFFSET 0x8000 - -#include <sys/tls.h> - -__CTASSERT(TLS_TP_OFFSET + sizeof(struct tls_tcb) < 0x8000); -__CTASSERT(TLS_TP_OFFSET % sizeof(struct tls_tcb) == 0); - -__BEGIN_DECLS - -static __inline struct tls_tcb * -__lwp_gettcb_fast(void) -{ - struct tls_tcb *__tcb; - - /* - * Only emit a rdhwr $3, $29 so the kernel can quickly emulate it. - */ - __asm __volatile( -#if 1 - // For some reason the syscall is much faster than - // emulating rdhwr $3,$29 on a CN50xx - "addiu $2,$0,316; syscall; nop; move %[__tcb],$2" -#else - ".set push" - ";.set mips32r2" - ";.p2align 4" - ";ssnop" - ";rdhwr $3,$29" - ";ssnop" - ";move %0,$3" - ";.set pop" -#endif - : [__tcb]"=r"(__tcb) - : - : "v0", "v1", "a3"); - return __tcb - (TLS_TP_OFFSET / sizeof(*__tcb) + 1); -} - -void _lwp_setprivate(void *); - -static inline void -__lwp_settcb(struct tls_tcb *__tcb) -{ - __tcb += TLS_TP_OFFSET / sizeof(*__tcb) + 1; - _lwp_setprivate(__tcb); -} -__END_DECLS -#endif - #endif /* _MIPS_MCONTEXT_H_ */ \ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/mips/mips3_pte.h b/lib/libc/include/generic-netbsd/mips/mips3_pte.h @@ -1,4 +1,4 @@ -/* $NetBSD: mips3_pte.h,v 1.31 2020/08/17 03:19:35 mrg Exp $ */ +/* $NetBSD: mips3_pte.h,v 1.32 2023/09/09 18:49:21 andvar Exp $ */ /* * Copyright (c) 1988 University of Utah. @@ -77,7 +77,7 @@ unsigned int pg_g:1, /* HW: ignore asid bit */ #define MIPS3_PG_ODDPG (MIPS3_PG_SVPN ^ MIPS3_PG_HVPN) #elif PGSHIFT == 13 #ifdef MIPS3_4100 -#define 8KB page size is not supported on the MIPS3_4100 +#error 8KB page size is not supported on the MIPS3_4100 #endif #define MIPS3_PG_SVPN (~0UL << 13) /* Software page no mask */ #define MIPS3_PG_HVPN (~0UL << 13) /* Hardware page no mask */ diff --git a/lib/libc/include/generic-netbsd/mips/mips_param.h b/lib/libc/include/generic-netbsd/mips/mips_param.h @@ -1,4 +1,4 @@ -/* $NetBSD: mips_param.h,v 1.52 2021/10/04 21:02:40 andvar Exp $ */ +/* $NetBSD: mips_param.h,v 1.56 2025/05/03 02:00:57 riastradh Exp $ */ /*- * Copyright (c) 2013 The NetBSD Foundation, Inc. @@ -26,7 +26,11 @@ * POSSIBILITY OF SUCH DAMAGE. */ +#ifndef _MIPS_MIPS_PARAM_H_ +#define _MIPS_MIPS_PARAM_H_ + #ifdef _KERNEL_OPT +#include "opt_cputype.h" #include "opt_param.h" #endif @@ -76,6 +80,14 @@ #define MACHINE "mips" #endif +#if defined(__mips_n64) || defined(__mips_n32) +#define STACK_ALIGNBYTES (16 - 1) +#else +#define STACK_ALIGNBYTES (8 - 1) +#endif + +#define STACK_ALIGNBYTES_O32 (8 - 1) + #define ALIGNBYTES32 (sizeof(double) - 1) #define ALIGN32(p) (((uintptr_t)(p) + ALIGNBYTES32) &~ALIGNBYTES32) @@ -189,4 +201,6 @@ #define MCLBYTES (1 << MCLSHIFT) /* size of a m_buf cluster */ -#endif -\ No newline at end of file +#endif + +#endif /* _MIPS_MIPS_PARAM_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/mips/mutex.h b/lib/libc/include/generic-netbsd/mips/mutex.h @@ -1,4 +1,4 @@ -/* $NetBSD: mutex.h,v 1.9.4.1 2023/08/09 17:42:04 martin Exp $ */ +/* $NetBSD: mutex.h,v 1.11 2023/07/12 12:50:12 riastradh Exp $ */ /*- * Copyright (c) 2002, 2007 The NetBSD Foundation, Inc. diff --git a/lib/libc/include/generic-netbsd/mips/types.h b/lib/libc/include/generic-netbsd/mips/types.h @@ -1,4 +1,4 @@ -/* $NetBSD: types.h,v 1.77.4.1 2023/04/03 18:30:41 martin Exp $ */ +/* $NetBSD: types.h,v 1.78 2023/03/28 10:54:13 nakayama Exp $ */ /*- * Copyright (c) 1992, 1993 diff --git a/lib/libc/include/generic-netbsd/mips/vmparam.h b/lib/libc/include/generic-netbsd/mips/vmparam.h @@ -1,4 +1,4 @@ -/* $NetBSD: vmparam.h,v 1.66.10.1 2023/05/15 10:37:24 martin Exp $ */ +/* $NetBSD: vmparam.h,v 1.67 2023/05/14 18:44:27 he Exp $ */ /* * Copyright (c) 1988 University of Utah. diff --git a/lib/libc/include/generic-netbsd/miscfs/kernfs/kernfs.h b/lib/libc/include/generic-netbsd/miscfs/kernfs/kernfs.h @@ -1,4 +1,4 @@ -/* $NetBSD: kernfs.h,v 1.44 2020/04/07 08:14:42 jdolecek Exp $ */ +/* $NetBSD: kernfs.h,v 1.45 2025/06/27 21:36:25 andvar Exp $ */ /* * Copyright (c) 1992, 1993 @@ -47,7 +47,7 @@ typedef enum { KFSkern, /* the filesystem itself (.) */ KFSroot, /* the filesystem root (..) */ - KFSnull, /* none aplicable */ + KFSnull, /* none applicable */ KFStime, /* time */ KFSboottime, /* boottime */ KFSint, /* integer */ diff --git a/lib/libc/include/generic-netbsd/miscfs/procfs/procfs.h b/lib/libc/include/generic-netbsd/miscfs/procfs/procfs.h @@ -1,4 +1,4 @@ -/* $NetBSD: procfs.h,v 1.82.4.1 2024/04/18 18:22:10 martin Exp $ */ +/* $NetBSD: procfs.h,v 1.87 2024/07/01 01:35:53 christos Exp $ */ /* * Copyright (c) 1993 @@ -97,11 +97,18 @@ typedef enum { PFSfpregs, /* the process's FP register set */ PFSloadavg, /* load average (if -o linux) */ PFSlimit, /* resource limits */ + PFSlimits, /* resource limits, Linux style (if -o linux) */ PFSmap, /* memory map */ PFSmaps, /* memory map, Linux style (if -o linux) */ PFSmem, /* the process's memory image */ PFSmeminfo, /* system memory info (if -o linux) */ PFSmounts, /* mounted filesystems (if -o linux) */ + PFSmqueue, /* sys/fs/mqueue subdirectory (if -o linux) */ + PFSmq_msg_def, /* sys/fs/mqueue/msg_default (if -o linux) */ + PFSmq_msg_max, /* sys/fs/mqueue/msg_max (if -o linux) */ + PFSmq_siz_def, /* sys/fs/mqueue/msgsize_default (if -o linux) */ + PFSmq_siz_max, /* sys/fs/mqueue/msgsize_max (if -o linux) */ + PFSmq_qmax, /* sys/fs/mqueue/queues_max (if -o linux) */ PFSnote, /* process notifier */ PFSnotepg, /* process group notifier */ PFSproc, /* a process-specific sub-directory */ @@ -111,7 +118,13 @@ typedef enum { PFSstat, /* process status (if -o linux) */ PFSstatm, /* process memory info (if -o linux) */ PFSstatus, /* process status */ - PFStask, /* task subdirector (if -o linux) */ + PFSsys, /* sys subdirectory (if -o linux) */ + PFSsysfs, /* sys/fs subdirectory (if -o linux) */ + PFSsysvipc, /* sysvipc subdirectory (if -o linux) */ + PFSsysvipc_msg, /* sysvipc msg info (if -o linux) */ + PFSsysvipc_sem, /* sysvipc sem info (if -o linux) */ + PFSsysvipc_shm, /* sysvipc shm info (if -o linux) */ + PFStask, /* task subdirectory (if -o linux) */ PFSuptime, /* elapsed time since (if -o linux) */ PFSversion, /* kernel version (if -o linux) */ #ifdef __HAVE_PROCFS_MACHDEP @@ -269,6 +282,24 @@ int procfs_doauxv(struct lwp *, struct proc *, struct pfsnode *, struct uio *); int procfs_dolimit(struct lwp *, struct proc *, struct pfsnode *, struct uio *); +int procfs_dolimits(struct lwp *, struct proc *, struct pfsnode *, + struct uio *); +int procfs_domq_msg_def(struct lwp *, struct proc *, struct pfsnode *, + struct uio *); +int procfs_domq_msg_max(struct lwp *, struct proc *, struct pfsnode *, + struct uio *); +int procfs_domq_siz_def(struct lwp *, struct proc *, struct pfsnode *, + struct uio *); +int procfs_domq_siz_max(struct lwp *, struct proc *, struct pfsnode *, + struct uio *); +int procfs_domq_qmax(struct lwp *, struct proc *, struct pfsnode *, + struct uio *); +int procfs_dosysvipc_msg(struct lwp *, struct proc *, struct pfsnode *, + struct uio *); +int procfs_dosysvipc_sem(struct lwp *, struct proc *, struct pfsnode *, + struct uio *); +int procfs_dosysvipc_shm(struct lwp *, struct proc *, struct pfsnode *, + struct uio *); void procfs_hashrem(struct pfsnode *); int procfs_getfp(struct pfsnode *, struct proc *, struct file **); diff --git a/lib/libc/include/generic-netbsd/miscfs/specfs/specdev.h b/lib/libc/include/generic-netbsd/miscfs/specfs/specdev.h @@ -1,4 +1,4 @@ -/* $NetBSD: specdev.h,v 1.53 2022/10/26 23:40:08 riastradh Exp $ */ +/* $NetBSD: specdev.h,v 1.54 2023/04/22 14:30:16 hannken Exp $ */ /*- * Copyright (c) 2008 The NetBSD Foundation, Inc. @@ -77,7 +77,6 @@ typedef struct specdev { vnode_t *sd_bdevvp; u_int sd_opencnt; /* # of opens; close when ->0 */ u_int sd_refcnt; /* # of specnodes referencing this */ - dev_t sd_rdev; volatile u_int sd_iocnt; /* # bdev/cdev_* operations active */ bool sd_opened; /* true if successfully opened */ bool sd_closing; /* true when bdev/cdev_close ongoing */ diff --git a/lib/libc/include/generic-netbsd/monetary.h b/lib/libc/include/generic-netbsd/monetary.h @@ -1,4 +1,4 @@ -/* $NetBSD: monetary.h,v 1.4 2019/12/08 02:15:02 kre Exp $ */ +/* $NetBSD: monetary.h,v 1.5 2024/10/30 15:56:10 riastradh Exp $ */ /*- * Copyright (c) 2001 Alexey Zelkin <phantom@FreeBSD.org> @@ -32,6 +32,7 @@ #define _MONETARY_H_ #include <sys/cdefs.h> +#include <sys/featuretest.h> #include <machine/ansi.h> #ifdef _BSD_SIZE_T_ diff --git a/lib/libc/include/generic-netbsd/net/agr/if_agrioctl.h b/lib/libc/include/generic-netbsd/net/agr/if_agrioctl.h @@ -1,4 +1,4 @@ -/* $NetBSD: if_agrioctl.h,v 1.2 2005/12/10 23:21:39 elad Exp $ */ +/* $NetBSD: if_agrioctl.h,v 1.3 2024/03/08 19:45:59 rillig Exp $ */ /*- * Copyright (c)2005 YAMAMOTO Takashi, @@ -64,7 +64,7 @@ struct agrportinfo { #define AGRPORTINFO_BITS \ "\177\020" \ "b\0COLLECTING\0" \ - "b\0DISTRIBUTING\0" + "b\1DISTRIBUTING\0" struct agrportlist { int apl_nports; diff --git a/lib/libc/include/generic-netbsd/net/bpf.h b/lib/libc/include/generic-netbsd/net/bpf.h @@ -1,4 +1,4 @@ -/* $NetBSD: bpf.h,v 1.78.4.1 2023/09/13 09:50:50 martin Exp $ */ +/* $NetBSD: bpf.h,v 1.82 2023/08/23 13:21:17 rin Exp $ */ /* * Copyright (c) 1990, 1991, 1993 @@ -88,9 +88,9 @@ struct bpf_stat { }; /* - * Struct returned by BIOCGSTATSOLD. + * Struct returned by BIOCGSTATS_30. */ -struct bpf_stat_old { +struct bpf_stat30 { u_int bs_recv; /* number of packets received */ u_int bs_drop; /* number of packets dropped */ }; @@ -135,7 +135,7 @@ struct bpf_version { #define BIOCGORTIMEOUT _IOR('B', 110, struct timeval50) #endif #define BIOCGSTATS _IOR('B', 111, struct bpf_stat) -#define BIOCGSTATSOLD _IOR('B', 111, struct bpf_stat_old) +#define BIOCGSTATS_30 _IOR('B', 111, struct bpf_stat30) #define BIOCIMMEDIATE _IOW('B', 112, u_int) #define BIOCVERSION _IOR('B', 113, struct bpf_version) #define BIOCSTCPF _IOW('B', 114, struct bpf_program) @@ -607,7 +607,14 @@ u_int bpf_filter_with_aux_data(const struct bpf_insn *, const u_char *, u_int, u #define BPF_TRACK_EVENT_ATTACH 1 #define BPF_TRACK_EVENT_DETACH 2 +void bpf_dump(const struct bpf_program *, int); +char *bpf_image(const struct bpf_insn *, int); __END_DECLS +#if 1 /* XXX: remove me, for the benefit of sanitizers */ +#define BIOCGSTATSOLD BIOCGSTATS_30 +#define bpf_stat_old bpf_stat30 +#endif + #endif /* !_NET_BPF_H_ */ \ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/net/bpfdesc.h b/lib/libc/include/generic-netbsd/net/bpfdesc.h @@ -1,4 +1,4 @@ -/* $NetBSD: bpfdesc.h,v 1.48.10.1 2024/09/13 14:13:05 martin Exp $ */ +/* $NetBSD: bpfdesc.h,v 1.50 2024/08/19 07:47:16 ozaki-r Exp $ */ /* * Copyright (c) 1990, 1991, 1993 diff --git a/lib/libc/include/generic-netbsd/net/dlt.h b/lib/libc/include/generic-netbsd/net/dlt.h @@ -1,4 +1,4 @@ -/* $NetBSD: dlt.h,v 1.23 2022/05/28 21:14:57 andvar Exp $ */ +/* $NetBSD: dlt.h,v 1.25 2024/09/02 15:34:08 christos Exp $ */ /*- * Copyright (c) 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997 @@ -38,6 +38,7 @@ #ifndef _NET_DLT_H_ #define _NET_DLT_H_ + /* * Link-layer header type codes. * @@ -59,7 +60,12 @@ /* * These are the types that are the same on all platforms, and that * have been defined by <net/bpf.h> for ages. + * + * DLT_LOW_MATCHING_MIN is the lowest such value; DLT_LOW_MATCHING_MAX + * is the highest such value. */ +#define DLT_LOW_MATCHING_MIN 0 + #define DLT_NULL 0 /* BSD loopback encapsulation */ #define DLT_EN10MB 1 /* Ethernet (10Mb) */ #define DLT_EN3MB 2 /* Experimental Ethernet (3Mb) */ @@ -72,6 +78,25 @@ #define DLT_PPP 9 /* Point-to-point Protocol */ #define DLT_FDDI 10 /* FDDI */ + /* + * In case the code that includes this file (directly or indirectly) + * has also included OS files that happen to define DLT_LOW_MATCHING_MAX, + * with a different value (perhaps because that OS hasn't picked up + * the latest version of our DLT definitions), we undefine the + * previous value of DLT_LOW_MATCHING_MAX. + * + * (They shouldn't, because only those 10 values were assigned in + * the Good Old Days, before DLT_ code assignment became a bit of + * a free-for-all. Perhaps 11 is DLT_ATM_RFC1483 everywhere 11 + * is used at all, but 12 is DLT_RAW on some platforms but not + * OpenBSD, and the fun continues for several other values.) + */ +#ifdef DLT_LOW_MATCHING_MAX +#undef DLT_LOW_MATCHING_MAX +#endif + +#define DLT_LOW_MATCHING_MAX DLT_FDDI /* highest value in this "matching" range */ + /* * These are types that are different on some platforms, and that * have been defined by <net/bpf.h> for ages. We use #ifdefs to @@ -79,7 +104,9 @@ * libpcap <net/bpf.h> * * XXX - DLT_ATM_RFC1483 is 13 in BSD/OS, and DLT_RAW is 14 in BSD/OS, - * but I don't know what the right #define is for BSD/OS. + * but I don't know what the right #define is for BSD/OS. The last + * release was in October 2003; if anybody cares about making this + * work on BSD/OS, give us a pull request for a change to make it work. */ #define DLT_ATM_RFC1483 11 /* LLC-encapsulated ATM */ @@ -99,8 +126,6 @@ #ifndef DLT_SLIP_BSDOS #define DLT_SLIP_BSDOS 13 /* BSD/OS Serial Line IP */ #define DLT_PPP_BSDOS 14 /* BSD/OS Point-to-point Protocol */ -#define DLT_HIPPI 15 /* HIPPI */ -#define DLT_HDLC 16 /* HDLC framing */ #endif #else #define DLT_SLIP_BSDOS 15 /* BSD/OS Serial Line IP */ @@ -108,6 +133,67 @@ #endif /* + * NetBSD uses 15 for HIPPI. + * + * From a quick look at sys/net/if_hippi.h and sys/net/if_hippisubr.c + * in an older version of NetBSD , the header appears to be: + * + * a 1-byte ULP field (ULP-id)? + * + * a 1-byte flags field; + * + * a 2-byte "offsets" field; + * + * a 4-byte "D2 length" field (D2_Size?); + * + * a 4-byte "destination switch" field (or a 1-byte field + * containing the Forwarding Class, Double_Wide, and Message_Type + * sub fields, followed by a 3-byte Destination_Switch_Address + * field?, HIPPI-LE 3.4-style?); + * + * a 4-byte "source switch" field (or a 1-byte field containing the + * Destination_Address_type and Source_Address_Type fields, followed + * by a 3-byte Source_Switch_Address field, HIPPI-LE 3.4-style?); + * + * a 2-byte reserved field; + * + * a 6-byte destination address field; + * + * a 2-byte "local admin" field; + * + * a 6-byte source address field; + * + * followed by an 802.2 LLC header. + * + * This looks somewhat like something derived from the HIPPI-FP 4.4 + * Header_Area, followed an HIPPI-FP 4.4 D1_Area containing a D1 data set + * with the header in HIPPI-LE 3.4 (ANSI X3.218-1993), followed by an + * HIPPI-FP 4.4 D2_Area (with no Offset) containing the 802.2 LLC header + * and payload? Or does the "offsets" field contain the D2_Offset, + * with that many bytes of offset before the payload? + * + * See http://wotug.org/parallel/standards/hippi/ for an archive of + * HIPPI specifications. + * + * RFC 2067 imposes some additional restrictions. It says that the + * Offset is always zero + * + * HIPPI is long-gone, and the source files found in an older version + * of NetBSD don't appear to be in the main CVS branch, so we may never + * see a capture with this link-layer type. + */ +#if defined(__NetBSD__) +#define DLT_HIPPI 15 /* HIPPI */ +#endif + +/* + * NetBSD uses 16 for DLT_HDLC; see below. + * BSD/OS uses it for PPP; see above. + * As far as I know, no other OS uses it for anything; don't use it + * for anything else. + */ + +/* * 17 was used for DLT_PFLOG in OpenBSD; it no longer is. * * It was DLT_LANE8023 in SuSE 6.3, so we defined LINKTYPE_PFLOG @@ -120,9 +206,6 @@ * * Don't use 17 for anything else. */ -#if defined(__OpenBSD__) || defined(__NetBSD__) -#define DLT_OLD_PFLOG 17 -#endif /* * 18 is used for DLT_PFSYNC in OpenBSD, NetBSD, DragonFly BSD and @@ -131,18 +214,16 @@ * anything and doesn't appear to have ever used it for anything.) * * We define it as 18 on those platforms; it is, unfortunately, used - * for DLT_CIP in Suse 6.3, so we don't define it as DLT_PFSYNC - * in general. As the packet format for it, like that for - * DLT_PFLOG, is not only OS-dependent but OS-version-dependent, - * we don't support printing it in tcpdump except on OSes that - * have the relevant header files, so it's not that useful on - * other platforms. + * for DLT_CIP in SUSE 6.3, so we don't define it as 18 on all + * platforms. We define it as 121 on FreeBSD and as the same + * value that we assigned to LINKTYPE_PFSYNC on all remaining + * platforms. */ #if defined(__OpenBSD__) || defined(__NetBSD__) || defined(__DragonFly__) || defined(__APPLE__) #define DLT_PFSYNC 18 #endif -#define DLT_ATM_CLIP 19 /* Linux Classical-IP over ATM */ +#define DLT_ATM_CLIP 19 /* Linux Classical IP over ATM */ /* * Apparently Redback uses this for its SmartEdge 400/800. I hope @@ -181,10 +262,10 @@ * and the LINKTYPE_ value that appears in capture files, are the * same. * - * DLT_MATCHING_MIN is the lowest such value; DLT_MATCHING_MAX is + * DLT_HIGH_MATCHING_MIN is the lowest such value; DLT_HIGH_MATCHING_MAX is * the highest such value. */ -#define DLT_MATCHING_MIN 104 +#define DLT_HIGH_MATCHING_MIN 104 /* * This value was defined by libpcap 0.5; platforms that have defined @@ -225,7 +306,8 @@ * that the AF_ type in the link-layer header is in network byte order. * * DLT_LOOP is 12 in OpenBSD, but that's DLT_RAW in other OSes, so - * we don't use 12 for it in OSes other than OpenBSD. + * we don't use 12 for it in OSes other than OpenBSD; instead, we + * use the same value as LINKTYPE_LOOP. */ #ifdef __OpenBSD__ #define DLT_LOOP 12 @@ -236,7 +318,7 @@ /* * Encapsulated packets for IPsec; DLT_ENC is 13 in OpenBSD, but that's * DLT_SLIP_BSDOS in NetBSD, so we don't use 13 for it in OSes other - * than OpenBSD. + * than OpenBSD; instead, we use the same value as LINKTYPE_ENC. */ #ifdef __OpenBSD__ #define DLT_ENC 13 @@ -245,13 +327,23 @@ #endif /* - * Values between 110 and 112 are reserved for use in capture file headers + * Values 110 and 111 are reserved for use in capture file headers * as link-layer types corresponding to DLT_ types that might differ * between platforms; don't use those values for new DLT_ types * other than the corresponding DLT_ types. */ /* + * NetBSD uses 16 for (Cisco) "HDLC framing". For other platforms, + * we define it to have the same value as LINKTYPE_NETBSD_HDLC. + */ +#if defined(__NetBSD__) +#define DLT_HDLC 16 /* Cisco HDLC */ +#else +#define DLT_HDLC 112 +#endif + +/* * Linux cooked sockets. */ #define DLT_LINUX_SLL 113 @@ -471,7 +563,7 @@ #define DLT_DOCSIS 143 /* - * Linux-IrDA packets. Protocol defined at http://www.irda.org. + * Linux-IrDA packets. Protocol defined at https://www.irda.org. * Those packets include IrLAP headers and above (IrLMP...), but * don't include Phy framing (SOF/EOF/CRC & byte stuffing), because Phy * framing can be handled by the hardware and depend on the bitrate. @@ -479,7 +571,7 @@ * interface (irdaX), but not on a raw serial port. * Note the capture is done in "Linux-cooked" mode, so each packet include * a fake packet header (struct sll_header). This is because IrDA packet - * decoding is dependant on the direction of the packet (incoming or + * decoding is dependent on the direction of the packet (incoming or * outgoing). * When/if other platform implement IrDA capture, we may revisit the * issue and define a real DLT_IRDA... @@ -613,7 +705,7 @@ /* * Link types requested by Gregor Maier <gregor@endace.com> of Endace * Measurement Systems. They add an ERF header (see - * http://www.endace.com/support/EndaceRecordFormat.pdf) in front of + * https://www.endace.com/support/EndaceRecordFormat.pdf) in front of * the link-layer header. */ #define DLT_ERF_ETH 175 /* Ethernet */ @@ -657,7 +749,7 @@ * DLT_ requested by Gianluca Varenni <gianluca.varenni@cacetech.com>. * Every frame contains a 32bit A429 label. * More documentation on Arinc 429 can be found at - * http://www.condoreng.com/support/downloads/tutorials/ARINCTutorial.pdf + * https://web.archive.org/web/20040616233302/https://www.condoreng.com/support/downloads/tutorials/ARINCTutorial.pdf */ #define DLT_A429 184 @@ -756,7 +848,7 @@ /* * Various link-layer types, with a pseudo-header, for SITA - * (http://www.sita.aero/); requested by Fulko Hew (fulko.hew@gmail.com). + * (https://www.sita.aero/); requested by Fulko Hew (fulko.hew@gmail.com). */ #define DLT_SITA 196 @@ -823,8 +915,11 @@ * PPP, with a one-byte direction pseudo-header prepended - zero means * "received by this host", non-zero (any non-zero value) means "sent by * this host" - as per Will Barker <w.barker@zen.co.uk>. + * + * Don't confuse this with DLT_PPP_WITH_DIRECTION, which is an old + * name for what is now called DLT_PPP_PPPD. */ -#define DLT_PPP_WITH_DIR 204 /* Don't confuse with DLT_PPP_WITH_DIRECTION */ +#define DLT_PPP_WITH_DIR 204 /* * Cisco HDLC, with a one-byte direction pseudo-header prepended - zero @@ -868,7 +963,7 @@ /* * Media Oriented Systems Transport (MOST) bus for multimedia - * transport - http://www.mostcooperation.com/ - as requested + * transport - https://www.mostcooperation.com/ - as requested * by Hannes Kaelber <hannes.kaelber@x2e.de>. */ #define DLT_MOST 211 @@ -950,9 +1045,9 @@ #define DLT_AOS 222 /* - * Wireless HART (Highway Addressable Remote Transducer) + * WirelessHART (Highway Addressable Remote Transducer) * From the HART Communication Foundation - * IES/PAS 62591 + * IEC/PAS 62591 * * Requested by Sam Roberts <vieuxtech@gmail.com>. */ @@ -1054,16 +1149,16 @@ /* * Raw D-Bus: * - * http://www.freedesktop.org/wiki/Software/dbus + * https://www.freedesktop.org/wiki/Software/dbus * * messages: * - * http://dbus.freedesktop.org/doc/dbus-specification.html#message-protocol-messages + * https://dbus.freedesktop.org/doc/dbus-specification.html#message-protocol-messages * * starting with the endianness flag, followed by the message type, etc., * but without the authentication handshake before the message sequence: * - * http://dbus.freedesktop.org/doc/dbus-specification.html#auth-protocol + * https://dbus.freedesktop.org/doc/dbus-specification.html#auth-protocol * * Requested by Martin Vidner <martin@vidner.net>. */ @@ -1081,7 +1176,7 @@ * DVB-CI (DVB Common Interface for communication between a PC Card * module and a DVB receiver). See * - * http://www.kaiser.cx/pcap-dvbci.html + * https://www.kaiser.cx/pcap-dvbci.html * * for the specification. * @@ -1217,15 +1312,17 @@ #define DLT_BLUETOOTH_LE_LL 251 /* - * DLT type for upper-protocol layer PDU saves from wireshark. + * DLT type for upper-protocol layer PDU saves from Wireshark. + * + * the actual contents are determined by two TAGs, one or more of + * which is stored with each packet: * - * the actual contents are determined by two TAGs stored with each - * packet: - * EXP_PDU_TAG_LINKTYPE the link type (LINKTYPE_ value) of the - * original packet. + * EXP_PDU_TAG_DISSECTOR_NAME the name of the Wireshark dissector + * that can make sense of the data stored. * - * EXP_PDU_TAG_PROTO_NAME the name of the wireshark dissector - * that can make sense of the data stored. + * EXP_PDU_TAG_HEUR_DISSECTOR_NAME the name of the Wireshark heuristic + * dissector that can make sense of the + * data stored. */ #define DLT_WIRESHARK_UPPER_PDU 252 @@ -1370,9 +1467,9 @@ /* * per: Stefanha at gmail.com for - * http://lists.sandelman.ca/pipermail/tcpdump-workers/2017-May/000772.html + * https://lists.sandelman.ca/pipermail/tcpdump-workers/2017-May/000772.html * and: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/include/uapi/linux/vsockmon.h - * for: http://qemu-project.org/Features/VirtioVsock + * for: https://qemu-project.org/Features/VirtioVsock */ #define DLT_VSOCK 271 @@ -1384,7 +1481,7 @@ /* * Excentis DOCSIS 3.1 RF sniffer (XRA-31) * per: bruno.verstuyft at excentis.com - * http://www.xra31.com/xra-header + * https://www.xra31.com/xra-header */ #define DLT_DOCSIS31_XRA31 273 @@ -1407,16 +1504,93 @@ #define DLT_LINUX_SLL2 276 /* + * Sercos Monitor, per Manuel Jacob <manuel.jacob at steinbeis-stg.de> + */ +#define DLT_SERCOS_MONITOR 277 + +/* + * OpenVizsla http://openvizsla.org is open source USB analyzer hardware. + * It consists of FPGA with attached USB phy and FTDI chip for streaming + * the data to the host PC. + * + * Current OpenVizsla data encapsulation format is described here: + * https://github.com/matwey/libopenvizsla/wiki/OpenVizsla-protocol-description + * + */ +#define DLT_OPENVIZSLA 278 + +/* + * The Elektrobit High Speed Capture and Replay (EBHSCR) protocol is produced + * by a PCIe Card for interfacing high speed automotive interfaces. + * + * The specification for this frame format can be found at: + * https://www.elektrobit.com/ebhscr + * + * for Guenter.Ebermann at elektrobit.com + * + */ +#define DLT_EBHSCR 279 + +/* + * The https://fd.io vpp graph dispatch tracer produces pcap trace files + * in the format documented here: + * https://fdio-vpp.readthedocs.io/en/latest/gettingstarted/developers/vnet.html#graph-dispatcher-pcap-tracing + */ +#define DLT_VPP_DISPATCH 280 + +/* + * Broadcom Ethernet switches (ROBO switch) 4 bytes proprietary tagging format. + */ +#define DLT_DSA_TAG_BRCM 281 +#define DLT_DSA_TAG_BRCM_PREPEND 282 + +/* + * IEEE 802.15.4 with pseudo-header and optional meta-data TLVs, PHY payload + * exactly as it appears in the spec (no padding, no nothing), and FCS if + * specified by FCS Type TLV; requested by James Ko <jck@exegin.com>. + * Specification at https://github.com/jkcko/ieee802.15.4-tap + */ +#define DLT_IEEE802_15_4_TAP 283 + +/* + * Marvell (Ethertype) Distributed Switch Architecture proprietary tagging format. + */ +#define DLT_DSA_TAG_DSA 284 +#define DLT_DSA_TAG_EDSA 285 + +/* + * Payload of lawful intercept packets using the ELEE protocol; + * https://socket.hr/draft-dfranusic-opsawg-elee-00.xml + * https://xml2rfc.tools.ietf.org/cgi-bin/xml2rfc.cgi?url=https://socket.hr/draft-dfranusic-opsawg-elee-00.xml&modeAsFormat=html/ascii + */ +#define DLT_ELEE 286 + +/* + * Serial frames transmitted between a host and a Z-Wave chip. + */ +#define DLT_Z_WAVE_SERIAL 287 + +/* + * USB 2.0, 1.1, and 1.0 packets as transmitted over the cable. + */ +#define DLT_USB_2_0 288 + +/* + * ATSC Link-Layer Protocol (A/330) packets. + */ +#define DLT_ATSC_ALP 289 + +/* * In case the code that includes this file (directly or indirectly) - * has also included OS files that happen to define DLT_MATCHING_MAX, + * has also included OS files that happen to define DLT_HIGH_MATCHING_MAX, * with a different value (perhaps because that OS hasn't picked up * the latest version of our DLT definitions), we undefine the - * previous value of DLT_MATCHING_MAX. + * previous value of DLT_HIGH_MATCHING_MAX. */ -#ifdef DLT_MATCHING_MAX -#undef DLT_MATCHING_MAX +#ifdef DLT_HIGH_MATCHING_MAX +#undef DLT_HIGH_MATCHING_MAX #endif -#define DLT_MATCHING_MAX 276 /* highest value in the "matching" range */ +#define DLT_HIGH_MATCHING_MAX 289 /* highest value in the "matching" range */ /* * DLT and savefile link type values are split into a class and @@ -1437,4 +1611,4 @@ #define DLT_NETBSD_RAWAF_AF(x) ((x) & 0x0000ffff) #define DLT_IS_NETBSD_RAWAF(x) (DLT_CLASS(x) == DLT_CLASS_NETBSD_RAWAF) -#endif /* !_NET_DLT_H_ */ -\ No newline at end of file +#endif /* _NET_DLT_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/net/if.h b/lib/libc/include/generic-netbsd/net/if.h @@ -1,4 +1,4 @@ -/* $NetBSD: if.h,v 1.304 2022/11/25 08:39:32 knakahara Exp $ */ +/* $NetBSD: if.h,v 1.308.2.1 2026/05/07 18:17:32 martin Exp $ */ /*- * Copyright (c) 1999, 2000, 2001 The NetBSD Foundation, Inc. @@ -420,7 +420,12 @@ typedef struct ifnet { *if_percpuq; /* :: we should remove it in the future */ struct work if_link_work; /* q: linkage on link state work queue */ uint16_t if_link_queue; /* q: masked link state change queue */ - /* q: is link state work scheduled? */ +#define LINK_QUEUE_LOCKED (1 << 0) +#define LINK_QUEUE_SCHEDULED (1 << 1) +#define LINK_QUEUE_DOWN (1 << 2) +#define LINK_QUEUE_UNKNOWN (1 << 3) +#define LINK_QUEUE_UP (1 << 4) + /* if_link_scheduled is unused */ bool if_link_scheduled; struct pslist_entry if_pslist_entry;/* i: */ @@ -451,7 +456,7 @@ typedef struct ifnet { /* 0x0020 was IFF_NOTRAILERS */ #else /* - * sys/compat/svr4 is remvoed on 19 Dec 2018. + * sys/compat/svr4 is removed on 19 Dec 2018. * And then, IFF_NOTRAILERS itself is removed by if.h:r1.268 on 5 Feb 2019. */ #define IFF_UNNUMBERED 0x0020 /* explicit unnumbered */ @@ -459,7 +464,15 @@ typedef struct ifnet { #define IFF_RUNNING 0x0040 /* resources allocated */ #define IFF_NOARP 0x0080 /* no address resolution protocol */ #define IFF_PROMISC 0x0100 /* receive all packets */ -#define IFF_ALLMULTI 0x0200 /* receive all multicast packets */ +#define IFF_ALLMULTI 0x0200 /* OBSOLETE -- DO NOT USE */ +/* + * IFF_ALLMULTI obsoleted on 2019-05-15 -- existing non-MP-safe drivers + * can use it for themselves under IFNET_LOCK, but they should be + * converted to use ETHER_F_ALLMULTI under ETHER_LOCK instead. For + * compatibility with existing drivers, if_ethersubr and if_arcsubr + * will set IFF_ALLMULTI according to other flags, but you should not + * rely on this. + */ #define IFF_OACTIVE 0x0400 /* transmission in progress */ #define IFF_SIMPLEX 0x0800 /* can't hear own transmissions */ #define IFF_LINK0 0x1000 /* per link layer defined bit */ @@ -1216,7 +1229,6 @@ void ifafree(struct ifaddr *); struct ifaddr *ifa_ifwithaddr(const struct sockaddr *); struct ifaddr *ifa_ifwithaddr_psref(const struct sockaddr *, struct psref *); -struct ifaddr *ifa_ifwithaf(int); struct ifaddr *ifa_ifwithdstaddr(const struct sockaddr *); struct ifaddr *ifa_ifwithdstaddr_psref(const struct sockaddr *, struct psref *); @@ -1230,6 +1242,9 @@ struct ifaddr *ifaof_ifpforaddr_psref(const struct sockaddr *, struct ifnet *, void link_rtrequest(int, struct rtentry *, const struct rt_addrinfo *); void p2p_rtrequest(int, struct rtentry *, const struct rt_addrinfo *); +struct ifaddr *if_first_addr(const struct ifnet *ifp, const int af); +struct ifaddr *if_first_addr_psref(const struct ifnet *ifp, const int af, struct psref *psref); + void if_clone_attach(struct if_clone *); void if_clone_detach(struct if_clone *); diff --git a/lib/libc/include/generic-netbsd/net/if_bridgevar.h b/lib/libc/include/generic-netbsd/net/if_bridgevar.h @@ -1,4 +1,4 @@ -/* $NetBSD: if_bridgevar.h,v 1.37.4.1 2024/09/05 09:27:12 martin Exp $ */ +/* $NetBSD: if_bridgevar.h,v 1.40 2025/04/22 05:47:51 ozaki-r Exp $ */ /* * Copyright 2001 Wasabi Systems, Inc. @@ -332,6 +332,7 @@ struct bridge_softc { uint32_t sc_filter_flags; /* ipf and flags */ int sc_csum_flags_tx; int sc_capenable; + bool sc_stopping; }; extern const uint8_t bstp_etheraddr[]; @@ -353,8 +354,6 @@ void bridge_calc_csum_flags(struct bridge_softc *); #define BRIDGE_UNLOCK(_sc) mutex_exit(BRIDGE_LOCK_OBJ(_sc)) #define BRIDGE_LOCKED(_sc) mutex_owned(BRIDGE_LOCK_OBJ(_sc)) -#define BRIDGE_PSZ_RENTER(__s) do { __s = pserialize_read_enter(); } while (0) -#define BRIDGE_PSZ_REXIT(__s) do { pserialize_read_exit(__s); } while (0) #define BRIDGE_PSZ_PERFORM(_sc) pserialize_perform((_sc)->sc_iflist_psref.bip_psz) #define BRIDGE_IFLIST_READER_FOREACH(_bif, _sc) \ diff --git a/lib/libc/include/generic-netbsd/net/if_ether.h b/lib/libc/include/generic-netbsd/net/if_ether.h @@ -1,4 +1,4 @@ -/* $NetBSD: if_ether.h,v 1.89 2022/06/20 08:14:48 yamaguchi Exp $ */ +/* $NetBSD: if_ether.h,v 1.91 2024/02/05 21:46:06 andvar Exp $ */ /* * Copyright (c) 1982, 1986, 1993 @@ -110,7 +110,7 @@ struct ether_header { (((etype) == ETHERTYPE_PPPOE) ? ETHER_PPPOE_ENCAP_LEN : 0)) /* - * Ethernet CRC32 polynomials (big- and little-endian verions). + * Ethernet CRC32 polynomials (big- and little-endian versions). */ #define ETHER_CRC_POLY_LE 0xedb88320 #define ETHER_CRC_POLY_BE 0x04c11db6 @@ -255,7 +255,8 @@ void ether_set_vlan_cb(struct ethercom *, ether_vlancb_t); int ether_ioctl(struct ifnet *, u_long, void *); int ether_addmulti(const struct sockaddr *, struct ethercom *); int ether_delmulti(const struct sockaddr *, struct ethercom *); -int ether_multiaddr(const struct sockaddr *, uint8_t[], uint8_t[]); +int ether_multiaddr(const struct sockaddr *, uint8_t[ETHER_ADDR_LEN], + uint8_t[ETHER_ADDR_LEN]); void ether_input(struct ifnet *, struct mbuf *); /* diff --git a/lib/libc/include/generic-netbsd/net/if_lagg.h b/lib/libc/include/generic-netbsd/net/if_lagg.h @@ -1,4 +1,4 @@ -/* $NetBSD: if_lagg.h,v 1.3 2021/11/08 06:29:16 yamaguchi Exp $ */ +/* $NetBSD: if_lagg.h,v 1.4 2024/04/04 07:55:32 yamaguchi Exp $ */ /* * Copyright (c) 2005, 2006 Reyk Floeter <reyk@openbsd.org> @@ -184,7 +184,7 @@ struct lagg_req { lagg_proto lrq_proto; size_t lrq_nports; struct laggreqproto lrq_reqproto; - struct laggreqport lrq_reqports[1]; + struct laggreqport lrq_reqports[]; }; #define SIOCGLAGG SIOCGIFGENERIC diff --git a/lib/libc/include/generic-netbsd/net/if_media.h b/lib/libc/include/generic-netbsd/net/if_media.h @@ -1,4 +1,4 @@ -/* $NetBSD: if_media.h,v 1.71 2020/03/15 23:04:51 thorpej Exp $ */ +/* $NetBSD: if_media.h,v 1.72 2024/04/18 10:32:03 andvar Exp $ */ /*- * Copyright (c) 1998, 2000, 2001, 2020 The NetBSD Foundation, Inc. @@ -981,7 +981,7 @@ void ifmedia_init(struct ifmedia *, int, ifm_change_cb_t, ifm_stat_cb_t); void ifmedia_init_with_lock(struct ifmedia *, int, ifm_change_cb_t, ifm_stat_cb_t, kmutex_t *); -/* Release resourecs associated with an ifmedia. */ +/* Release resources associated with an ifmedia. */ void ifmedia_fini(struct ifmedia *); diff --git a/lib/libc/include/generic-netbsd/net/if_ppp.h b/lib/libc/include/generic-netbsd/net/if_ppp.h @@ -1,4 +1,4 @@ -/* $NetBSD: if_ppp.h,v 1.27 2015/09/06 06:01:01 dholland Exp $ */ +/* $NetBSD: if_ppp.h,v 1.28 2025/01/08 18:05:39 christos Exp $ */ /* Id: if_ppp.h,v 1.16 1997/04/30 05:46:04 paulus Exp */ /* @@ -139,7 +139,6 @@ struct ppp_rawin { #define PPPIOCGNPMODE _IOWR('t', 76, struct npioctl) /* get NP mode */ #define PPPIOCSNPMODE _IOW('t', 75, struct npioctl) /* set NP mode */ #define PPPIOCGIDLE _IOR('t', 74, struct ppp_idle) /* get idle time */ -#ifdef PPP_FILTER /* * XXX These are deprecated; they can no longer be used, because they * XXX don't play well with multiple encaps. The defs are here so that @@ -156,7 +155,6 @@ struct ppp_rawin { #define PPPIOCSOPASS _IOW('t', 68, struct bpf_program) /* set out pass flt */ #define PPPIOCSIACTIVE _IOW('t', 67, struct bpf_program) /* set in act flt */ #define PPPIOCSOACTIVE _IOW('t', 66, struct bpf_program) /* set out act flt */ -#endif /* PPP_FILTER */ /* PPPIOC[GS]MTU are alternatives to SIOC[GS]IFMTU, used under Ultrix */ #define PPPIOCGMTU _IOR('t', 73, int) /* get interface MTU */ diff --git a/lib/libc/include/generic-netbsd/net/if_stats.h b/lib/libc/include/generic-netbsd/net/if_stats.h @@ -1,4 +1,4 @@ -/* $NetBSD: if_stats.h,v 1.3 2021/06/29 21:19:58 riastradh Exp $ */ +/* $NetBSD: if_stats.h,v 1.6 2024/07/01 13:13:37 riastradh Exp $ */ /*- * Copyright (c) 2020 The NetBSD Foundation, Inc. @@ -55,42 +55,52 @@ typedef enum { #ifdef _KERNEL +#include <sys/sdt.h> + +SDT_PROBE_DECLARE(sdt, net, interface, stat); + #define IF_STAT_GETREF(ifp) _NET_STAT_GETREF((ifp)->if_stats) #define IF_STAT_PUTREF(ifp) _NET_STAT_PUTREF((ifp)->if_stats) static inline void if_statinc(ifnet_t *ifp, if_stat_t x) { + SDT_PROBE3(sdt, net, interface, stat, ifp, x, +1); _NET_STATINC((ifp)->if_stats, x); } static inline void -if_statinc_ref(net_stat_ref_t nsr, if_stat_t x) +if_statinc_ref(ifnet_t *ifp, net_stat_ref_t nsr, if_stat_t x) { + SDT_PROBE3(sdt, net, interface, stat, ifp, x, +1); _NET_STATINC_REF(nsr, x); } static inline void if_statdec(ifnet_t *ifp, if_stat_t x) { + SDT_PROBE3(sdt, net, interface, stat, ifp, x, -1); _NET_STATDEC((ifp)->if_stats, x); } static inline void -if_statdec_ref(net_stat_ref_t nsr, if_stat_t x) +if_statdec_ref(ifnet_t *ifp, net_stat_ref_t nsr, if_stat_t x) { + SDT_PROBE3(sdt, net, interface, stat, ifp, x, -1); _NET_STATDEC_REF(nsr, x); } static inline void if_statadd(ifnet_t *ifp, if_stat_t x, uint64_t v) { + SDT_PROBE3(sdt, net, interface, stat, ifp, x, v); _NET_STATADD((ifp)->if_stats, x, v); } static inline void -if_statadd_ref(net_stat_ref_t nsr, if_stat_t x, uint64_t v) +if_statadd_ref(ifnet_t *ifp, net_stat_ref_t nsr, if_stat_t x, uint64_t v) { + SDT_PROBE3(sdt, net, interface, stat, ifp, x, v); _NET_STATADD_REF(nsr, x, v); } @@ -98,6 +108,8 @@ static inline void if_statadd2(ifnet_t *ifp, if_stat_t x1, uint64_t v1, if_stat_t x2, uint64_t v2) { net_stat_ref_t _nsr_ = IF_STAT_GETREF(ifp); + SDT_PROBE3(sdt, net, interface, stat, ifp, x1, v1); + SDT_PROBE3(sdt, net, interface, stat, ifp, x2, v2); _NET_STATADD_REF(_nsr_, x1, v1); _NET_STATADD_REF(_nsr_, x2, v2); IF_STAT_PUTREF(ifp); @@ -106,12 +118,14 @@ if_statadd2(ifnet_t *ifp, if_stat_t x1, uint64_t v1, if_stat_t x2, uint64_t v2) static inline void if_statsub(ifnet_t *ifp, if_stat_t x, uint64_t v) { + SDT_PROBE3(sdt, net, interface, stat, ifp, x, -v); _NET_STATSUB((ifp)->if_stats, x, v); } static inline void -if_statsub_ref(net_stat_ref_t nsr, if_stat_t x, uint64_t v) +if_statsub_ref(ifnet_t *ifp, net_stat_ref_t nsr, if_stat_t x, uint64_t v) { + SDT_PROBE3(sdt, net, interface, stat, ifp, x, -v); _NET_STATSUB_REF(nsr, x, v); } diff --git a/lib/libc/include/generic-netbsd/net/net_stats.h b/lib/libc/include/generic-netbsd/net/net_stats.h @@ -1,4 +1,4 @@ -/* $NetBSD: net_stats.h,v 1.5 2020/01/29 03:04:55 thorpej Exp $ */ +/* $NetBSD: net_stats.h,v 1.6 2024/06/29 13:01:30 riastradh Exp $ */ /*- * Copyright (c) 2008, 2020 The NetBSD Foundation, Inc. @@ -35,14 +35,21 @@ #ifdef _KERNEL #include <sys/percpu.h> -typedef void *net_stat_ref_t; +typedef struct net_stat_ref { + /* + * Flexible array member annoyingly requires some other + * non-flexible array member. + */ + uint64_t nsr_stat[1]; + uint64_t nsr_stats[]; +} *net_stat_ref_t; #define _NET_STAT_GETREF(stat) ((net_stat_ref_t)percpu_getref((stat))) #define _NET_STAT_PUTREF(stat) percpu_putref((stat)) #define _NET_STATINC_REF(r, x) \ do { \ - uint64_t *_stat_ = (r); \ + uint64_t *_stat_ = (r)->nsr_stat; \ _stat_[x]++; \ } while (/*CONSTCOND*/0) @@ -55,7 +62,7 @@ do { \ #define _NET_STATDEC_REF(r, x) \ do { \ - uint64_t *_stat_ = (r); \ + uint64_t *_stat_ = (r)->nsr_stat; \ _stat_[x]--; \ } while (/*CONSTCOND*/0) @@ -68,7 +75,7 @@ do { \ #define _NET_STATADD_REF(r, x, v) \ do { \ - uint64_t *_stat_ = (r); \ + uint64_t *_stat_ = (r)->nsr_stat; \ _stat_[x] += (v); \ } while (/*CONSTCOND*/0) @@ -81,7 +88,7 @@ do { \ #define _NET_STATSUB_REF(r, x, v) \ do { \ - uint64_t *_stat_ = (r); \ + uint64_t *_stat_ = (r)->nsr_stat; \ _stat_[x] -= (v); \ } while (/*CONSTCOND*/0) diff --git a/lib/libc/include/generic-netbsd/net/npf.h b/lib/libc/include/generic-netbsd/net/npf.h @@ -1,5 +1,5 @@ /*- - * Copyright (c) 2009-2014 The NetBSD Foundation, Inc. + * Copyright (c) 2009-2025 The NetBSD Foundation, Inc. * All rights reserved. * * This material is based upon work partially supported by The @@ -45,6 +45,7 @@ #include <sys/ioctl.h> #include <netinet/in_systm.h> #include <netinet/in.h> +#include <net/if_ether.h> #endif struct npf; @@ -59,6 +60,15 @@ typedef union { uint32_t word32[4]; } npf_addr_t; +/* + * use a single type for both user id and group id + */ +struct r_id { + uint32_t id[2]; + uint8_t op; +}; + +typedef struct r_id rid_t; typedef uint8_t npf_netmask_t; #define NPF_MAX_NETMASK (128) @@ -142,6 +152,7 @@ int nbuf_find_tag(nbuf_t *, uint32_t *); #define NPC_ALG_EXEC 0x100 /* ALG execution. */ #define NPC_FMTERR 0x200 /* Format error. */ +#define NPC_LAYER2 0x400 /* ether header */ #define NPC_IP46 (NPC_IP4|NPC_IP6) @@ -153,6 +164,9 @@ typedef struct { uint32_t npc_info; nbuf_t * npc_nbuf; + struct ether_header ether; + uint8_t ether_type; + /* * Pointers to the IP source and destination addresses, * and the address length (4 for IPv4 or 16 for IPv6). @@ -214,6 +228,8 @@ bool npf_autounload_p(void); #define NPF_RULE_RETICMP 0x00000020 #define NPF_RULE_DYNAMIC 0x00000040 #define NPF_RULE_GSTATEFUL 0x00000080 +#define NPF_RULE_LAYER_3 0x00000100 +#define NPF_RULE_LAYER_2 0x00000200 #define NPF_DYNAMIC_GROUP (NPF_RULE_GROUP | NPF_RULE_DYNAMIC) @@ -259,10 +275,6 @@ bool npf_autounload_p(void); #define NPF_TABLE_MAXNAMELEN 32 -/* Layers. */ -#define NPF_LAYER_2 2 -#define NPF_LAYER_3 3 - /* * Flags passed via nbuf tags. */ @@ -368,10 +380,26 @@ typedef enum { /* nbuf non-contiguous cases. */ NPF_STAT_NBUF_NONCONTIG, NPF_STAT_NBUF_CONTIG_FAIL, + /* layer 2 statistics */ + NPF_ETHER_STAT_PASS, + NPF_ETHER_STAT_BLOCK, /* Count (last). */ NPF_STATS_COUNT } npf_stats_t; #define NPF_STATS_SIZE (sizeof(uint64_t) * NPF_STATS_COUNT) +/* unary and binary operators */ +enum { + NPF_OP_NONE, + NPF_OP_EQ, + NPF_OP_NE, + NPF_OP_LE, + NPF_OP_LT, + NPF_OP_GE, + NPF_OP_GT, + NPF_OP_XRG, + NPF_OP_IRG +}; + #endif /* _NPF_NET_H_ */ \ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/net/pfkeyv2.h b/lib/libc/include/generic-netbsd/net/pfkeyv2.h @@ -1,4 +1,4 @@ -/* $NetBSD: pfkeyv2.h,v 1.34.2.1 2023/01/04 12:17:08 martin Exp $ */ +/* $NetBSD: pfkeyv2.h,v 1.35 2023/01/04 01:58:33 knakahara Exp $ */ /* $KAME: pfkeyv2.h,v 1.36 2003/07/25 09:33:37 itojun Exp $ */ /* diff --git a/lib/libc/include/generic-netbsd/net/route.h b/lib/libc/include/generic-netbsd/net/route.h @@ -1,4 +1,4 @@ -/* $NetBSD: route.h,v 1.132 2022/09/20 02:23:37 knakahara Exp $ */ +/* $NetBSD: route.h,v 1.134 2023/06/16 02:48:07 rin Exp $ */ /* * Copyright (c) 1980, 1986, 1993 @@ -525,14 +525,14 @@ void rtcache_unref(struct rtentry *, struct route *); percpu_t * rtcache_percpu_alloc(void); -static inline struct route * +static __inline struct route * rtcache_percpu_getref(percpu_t *pc) { return *(struct route **)percpu_getref(pc); } -static inline void +static __inline void rtcache_percpu_putref(percpu_t *pc) { @@ -579,7 +579,7 @@ struct rtentry * int (*)(struct rtentry *, void *), void *); void rtbl_init(void); -void sysctl_net_route_setup(struct sysctllog **, int, const char *); +void sysctl_net_route_setup(struct sysctllog **, int, const char *); #endif /* _KERNEL */ diff --git a/lib/libc/include/generic-netbsd/net80211/ieee80211_node.h b/lib/libc/include/generic-netbsd/net80211/ieee80211_node.h @@ -1,4 +1,4 @@ -/* $NetBSD: ieee80211_node.h,v 1.31 2022/02/16 22:00:56 andvar Exp $ */ +/* $NetBSD: ieee80211_node.h,v 1.32 2023/08/01 07:04:16 mrg Exp $ */ /*- * Copyright (c) 2001 Atsushi Onoe * Copyright (c) 2002-2005 Sam Leffler, Errno Consulting @@ -283,7 +283,8 @@ void ieee80211_dump_node(struct ieee80211_node_table *, void ieee80211_dump_nodes(struct ieee80211_node_table *); struct ieee80211_node *ieee80211_fakeup_adhoc_node( - struct ieee80211_node_table *, const u_int8_t macaddr[]); + struct ieee80211_node_table *, + const u_int8_t macaddr[IEEE80211_ADDR_LEN]); void ieee80211_node_join(struct ieee80211com *, struct ieee80211_node *,int); void ieee80211_node_leave(struct ieee80211com *, struct ieee80211_node *); u_int8_t ieee80211_getrssi(struct ieee80211com *ic); diff --git a/lib/libc/include/generic-netbsd/net80211/ieee80211_var.h b/lib/libc/include/generic-netbsd/net80211/ieee80211_var.h @@ -1,4 +1,4 @@ -/* $NetBSD: ieee80211_var.h,v 1.34 2020/03/15 23:04:51 thorpej Exp $ */ +/* $NetBSD: ieee80211_var.h,v 1.35 2023/06/24 05:12:03 msaitoh Exp $ */ /*- * Copyright (c) 2001 Atsushi Onoe * Copyright (c) 2002-2005 Sam Leffler, Errno Consulting @@ -363,7 +363,7 @@ ieee80211_anyhdrspace(struct ieee80211com *ic, const void *data) /* Flags set in ic_debug, used to print debug messages */ #define IEEE80211_MSG_DEBUG 0x40000000 /* IFF_DEBUG equivalent */ -#define IEEE80211_MSG_DUMPPKTS 0x20000000 /* IFF_LINK2 equivalant */ +#define IEEE80211_MSG_DUMPPKTS 0x20000000 /* IFF_LINK2 equivalent */ #define IEEE80211_MSG_CRYPTO 0x10000000 /* crypto work */ #define IEEE80211_MSG_INPUT 0x08000000 /* input handling */ #define IEEE80211_MSG_XRATE 0x04000000 /* rate set handling */ diff --git a/lib/libc/include/generic-netbsd/netbt/hci.h b/lib/libc/include/generic-netbsd/netbt/hci.h @@ -1,4 +1,4 @@ -/* $NetBSD: hci.h,v 1.46 2019/09/28 07:06:33 plunky Exp $ */ +/* $NetBSD: hci.h,v 1.46.34.1 2025/08/25 16:09:27 martin Exp $ */ /*- * Copyright (c) 2005 Iain Hibbert. @@ -54,7 +54,7 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * $Id: hci.h,v 1.46 2019/09/28 07:06:33 plunky Exp $ + * $Id: hci.h,v 1.46.34.1 2025/08/25 16:09:27 martin Exp $ * $FreeBSD: src/sys/netgraph/bluetooth/include/ng_hci.h,v 1.6 2005/01/07 01:45:43 imp Exp $ */ @@ -984,7 +984,7 @@ typedef struct { /* No return parameter(s) */ #define HCI_OCF_SNIFF_SUBRATING 0x0011 -#define HCI_CMD_SNIFF_SUBRATING 0x0810 +#define HCI_CMD_SNIFF_SUBRATING 0x0811 typedef struct { uint16_t con_handle; /* connection handle */ uint16_t max_latency; diff --git a/lib/libc/include/generic-netbsd/netdb.h b/lib/libc/include/generic-netbsd/netdb.h @@ -1,4 +1,4 @@ -/* $NetBSD: netdb.h,v 1.71 2021/08/09 20:49:08 andvar Exp $ */ +/* $NetBSD: netdb.h,v 1.72 2024/02/16 11:13:59 jkoshy Exp $ */ /* * ++Copyright++ 1980, 1983, 1988, 1993 @@ -296,7 +296,7 @@ struct addrinfo { #define NI_NAMEREQD 0x00000004 #define NI_NUMERICSERV 0x00000008 #define NI_DGRAM 0x00000010 -#define NI_WITHSCOPEID 0x00000020 +#define NI_WITHSCOPEID 0x00000020 /* Obsolete. */ #define NI_NUMERICSCOPE 0x00000040 /*% diff --git a/lib/libc/include/generic-netbsd/netinet/icmp6.h b/lib/libc/include/generic-netbsd/netinet/icmp6.h @@ -1,4 +1,4 @@ -/* $NetBSD: icmp6.h,v 1.59 2022/08/29 09:14:02 knakahara Exp $ */ +/* $NetBSD: icmp6.h,v 1.61 2024/12/06 18:36:09 riastradh Exp $ */ /* $KAME: icmp6.h,v 1.84 2003/04/23 10:26:51 itojun Exp $ */ @@ -65,6 +65,10 @@ #ifndef _NETINET_ICMP6_H_ #define _NETINET_ICMP6_H_ +#include <sys/types.h> + +#include <netinet/in.h> + #define ICMPV6_PLD_MAXLEN 1232 /* IPV6_MMTU - sizeof(struct ip6_hdr) - sizeof(struct icmp6_hdr) */ @@ -757,7 +761,7 @@ static const char * const icmp6_code_timxceed[] = { static const char * const icmp6_code_paramprob[] = { "hdr_field", "nxthdr_type", "option", NULL -}; +}; /* not all informational icmps that have codes have a names array */ #endif diff --git a/lib/libc/include/generic-netbsd/netinet/in.h b/lib/libc/include/generic-netbsd/netinet/in.h @@ -1,4 +1,4 @@ -/* $NetBSD: in.h,v 1.114 2021/02/03 18:13:13 roy Exp $ */ +/* $NetBSD: in.h,v 1.115 2023/06/16 03:02:30 rin Exp $ */ /* * Copyright (c) 1982, 1986, 1990, 1993 @@ -107,7 +107,7 @@ typedef __sa_family_t sa_family_t; #define IPPROTO_CARP 112 /* Common Address Resolution Protocol */ #define IPPROTO_L2TP 115 /* L2TPv3 */ #define IPPROTO_SCTP 132 /* SCTP */ -#define IPPROTO_PFSYNC 240 /* PFSYNC */ +#define IPPROTO_PFSYNC 240 /* PFSYNC */ #define IPPROTO_RAW 255 /* raw IP packet */ #define IPPROTO_MAX 256 @@ -353,22 +353,22 @@ struct ip_mreq { #define IPCTL_ALLOWSRCRT 7 /* allow/drop all source-routed pkts */ #define IPCTL_SUBNETSARELOCAL 8 /* treat subnets as local addresses */ #define IPCTL_MTUDISC 9 /* allow path MTU discovery */ -#define IPCTL_ANONPORTMIN 10 /* minimum ephemeral port */ -#define IPCTL_ANONPORTMAX 11 /* maximum ephemeral port */ -#define IPCTL_MTUDISCTIMEOUT 12 /* allow path MTU discovery */ -#define IPCTL_MAXFLOWS 13 /* maximum ip flows allowed */ -#define IPCTL_HOSTZEROBROADCAST 14 /* is host zero a broadcast addr? */ -#define IPCTL_GIF_TTL 15 /* default TTL for gif encap packet */ -#define IPCTL_LOWPORTMIN 16 /* minimum reserved port */ -#define IPCTL_LOWPORTMAX 17 /* maximum reserved port */ -#define IPCTL_MAXFRAGPACKETS 18 /* max packets reassembly queue */ -#define IPCTL_GRE_TTL 19 /* default TTL for gre encap packet */ -#define IPCTL_CHECKINTERFACE 20 /* drop pkts in from 'wrong' iface */ -#define IPCTL_IFQ 21 /* IP packet input queue */ -#define IPCTL_RANDOMID 22 /* use random IP ids (if configured) */ -#define IPCTL_LOOPBACKCKSUM 23 /* do IP checksum on loopback */ +#define IPCTL_ANONPORTMIN 10 /* minimum ephemeral port */ +#define IPCTL_ANONPORTMAX 11 /* maximum ephemeral port */ +#define IPCTL_MTUDISCTIMEOUT 12 /* allow path MTU discovery */ +#define IPCTL_MAXFLOWS 13 /* maximum ip flows allowed */ +#define IPCTL_HOSTZEROBROADCAST 14 /* is host zero a broadcast addr? */ +#define IPCTL_GIF_TTL 15 /* default TTL for gif encap packet */ +#define IPCTL_LOWPORTMIN 16 /* minimum reserved port */ +#define IPCTL_LOWPORTMAX 17 /* maximum reserved port */ +#define IPCTL_MAXFRAGPACKETS 18 /* max packets reassembly queue */ +#define IPCTL_GRE_TTL 19 /* default TTL for gre encap packet */ +#define IPCTL_CHECKINTERFACE 20 /* drop pkts in from 'wrong' iface */ +#define IPCTL_IFQ 21 /* IP packet input queue */ +#define IPCTL_RANDOMID 22 /* use random IP ids (if configured) */ +#define IPCTL_LOOPBACKCKSUM 23 /* do IP checksum on loopback */ #define IPCTL_STATS 24 /* IP statistics */ -#define IPCTL_DAD_COUNT 25 /* DAD packets to send */ +#define IPCTL_DAD_COUNT 25 /* DAD packets to send */ #endif /* _NETBSD_SOURCE */ diff --git a/lib/libc/include/generic-netbsd/netinet/in_var.h b/lib/libc/include/generic-netbsd/netinet/in_var.h @@ -1,4 +1,4 @@ -/* $NetBSD: in_var.h,v 1.103 2022/11/19 08:00:51 yamt Exp $ */ +/* $NetBSD: in_var.h,v 1.105 2025/06/11 02:44:13 ozaki-r Exp $ */ /*- * Copyright (c) 1998 The NetBSD Foundation, Inc. @@ -327,11 +327,7 @@ in_get_ia_from_ifp(struct ifnet *ifp) { struct ifaddr *ifa; - IFADDR_READER_FOREACH(ifa, ifp) { - if (ifa->ifa_addr->sa_family == AF_INET) - break; - } - + ifa = if_first_addr(ifp, AF_INET); return ifatoia(ifa); } @@ -467,7 +463,7 @@ ip_randomid(void) * => Return the first ID. */ static __inline uint16_t -ip_newid_range(const struct in_ifaddr *ia, u_int num) +ip_newid_range(u_int num) { uint16_t id; @@ -486,10 +482,10 @@ ip_newid_range(const struct in_ifaddr *ia, u_int num) } static __inline uint16_t -ip_newid(const struct in_ifaddr *ia) +ip_newid(void) { - return ip_newid_range(ia, 1); + return ip_newid_range(1); } #ifdef SYSCTLFN_PROTO diff --git a/lib/libc/include/generic-netbsd/netinet/ip_mroute.h b/lib/libc/include/generic-netbsd/netinet/ip_mroute.h @@ -1,4 +1,4 @@ -/* $NetBSD: ip_mroute.h,v 1.35 2021/02/03 18:13:13 roy Exp $ */ +/* $NetBSD: ip_mroute.h,v 1.36 2025/07/28 21:25:00 kim Exp $ */ #ifndef _NETINET_IP_MROUTE_H_ #define _NETINET_IP_MROUTE_H_ @@ -21,10 +21,6 @@ #include <sys/queue.h> #include <sys/callout.h> -#ifdef _KERNEL -struct sockopt; /* from <sys/socketvar.h> */ -#endif - /* * Multicast Routing set/getsockopt commands. */ @@ -42,7 +38,6 @@ struct sockopt; /* from <sys/socketvar.h> */ #define MRT_ADD_BW_UPCALL 111 /* create bandwidth monitor */ #define MRT_DEL_BW_UPCALL 112 /* delete bandwidth monitor */ - /* * Types and macros for handling bitmaps with one bit per virtual interface. */ @@ -101,6 +96,7 @@ struct mfcctl2 { u_int8_t mfcc_flags[MAXVIFS]; /* the MRT_MFC_FLAGS_* flags */ struct in_addr mfcc_rp; /* the RP address */ }; + /* * The advanced-API flags. * @@ -196,7 +192,6 @@ struct sioc_vif_req { u_long obytes; /* output byte count on vif */ }; - /* * The kernel's multicast routing statistics. */ @@ -216,6 +211,26 @@ struct mrtstat { u_long mrts_upq_sockfull; /* upcalls dropped - socket full */ }; +/* + * Structure used to communicate from kernel to multicast router. + * (Note the convenient similarity to an IP packet.) + */ +struct igmpmsg { + u_int32_t unused1; + u_int32_t unused2; + u_int8_t im_msgtype; /* what type of message */ +#define IGMPMSG_NOCACHE 1 /* no MFC in the kernel */ +#define IGMPMSG_WRONGVIF 2 /* packet came from wrong interface */ +#define IGMPMSG_WHOLEPKT 3 /* PIM pkt for user level encap. */ +#define IGMPMSG_BW_UPCALL 4 /* BW monitoring upcall */ + u_int8_t im_mbz; /* must be zero */ + u_int8_t im_vif; /* vif rec'd on */ + u_int8_t unused3; + struct in_addr im_src, im_dst; +}; +#ifdef __CTASSERT +__CTASSERT(sizeof(struct igmpmsg) == 20); +#endif #ifdef _KERNEL @@ -268,27 +283,6 @@ struct mfc { }; /* - * Structure used to communicate from kernel to multicast router. - * (Note the convenient similarity to an IP packet.) - */ -struct igmpmsg { - u_int32_t unused1; - u_int32_t unused2; - u_int8_t im_msgtype; /* what type of message */ -#define IGMPMSG_NOCACHE 1 /* no MFC in the kernel */ -#define IGMPMSG_WRONGVIF 2 /* packet came from wrong interface */ -#define IGMPMSG_WHOLEPKT 3 /* PIM pkt for user level encap. */ -#define IGMPMSG_BW_UPCALL 4 /* BW monitoring upcall */ - u_int8_t im_mbz; /* must be zero */ - u_int8_t im_vif; /* vif rec'd on */ - u_int8_t unused3; - struct in_addr im_src, im_dst; -}; -#ifdef __CTASSERT -__CTASSERT(sizeof(struct igmpmsg) == 20); -#endif - -/* * Argument structure used for pkt info. while upcall is made. */ struct rtdetq { @@ -335,6 +329,8 @@ struct bw_meter { struct timeval bm_start_time; /* abs. time */ }; +struct sockopt; /* from <sys/socketvar.h> */ + int ip_mrouter_set(struct socket *, struct sockopt *); int ip_mrouter_get(struct socket *, struct sockopt *); int mrt_ioctl(struct socket *, u_long, void *); diff --git a/lib/libc/include/generic-netbsd/netinet/ip_var.h b/lib/libc/include/generic-netbsd/netinet/ip_var.h @@ -1,4 +1,4 @@ -/* $NetBSD: ip_var.h,v 1.134 2022/04/10 09:50:46 andvar Exp $ */ +/* $NetBSD: ip_var.h,v 1.135 2025/06/27 21:36:23 andvar Exp $ */ /* * Copyright (c) 1982, 1986, 1993 @@ -130,7 +130,7 @@ struct ip_pktopts { #define IP_STAT_FORWARD 9 /* packets forwarded */ #define IP_STAT_FASTFORWARD 10 /* packets fast forwarded */ #define IP_STAT_CANTFORWARD 11 /* packets rcvd for unreachable dest */ -#define IP_STAT_REDIRECTSENT 12 /* packets forwareded on same net */ +#define IP_STAT_REDIRECTSENT 12 /* packets forwarded on same net */ #define IP_STAT_NOPROTO 13 /* unknown or unsupported protocol */ #define IP_STAT_DELIVERED 14 /* datagrams delivered to upper level */ #define IP_STAT_LOCALOUT 15 /* total ip packets generated here */ diff --git a/lib/libc/include/generic-netbsd/netinet/sctp.h b/lib/libc/include/generic-netbsd/netinet/sctp.h @@ -1,5 +1,5 @@ /* $KAME: sctp.h,v 1.18 2005/03/06 16:04:16 itojun Exp $ */ -/* $NetBSD: sctp.h,v 1.5 2021/10/24 20:00:12 andvar Exp $ */ +/* $NetBSD: sctp.h,v 1.7 2025/02/28 09:07:12 andvar Exp $ */ #ifndef _NETINET_SCTP_H_ #define _NETINET_SCTP_H_ @@ -146,8 +146,8 @@ struct sctp_paramhdr { #define SCTP_PEER_PUBLIC_KEY 0x00000100 /* get the peers public key */ #define SCTP_MY_PUBLIC_KEY 0x00000101 /* get/set my endpoints public key */ #define SCTP_SET_AUTH_SECRET 0x00000102 /* get/set my shared secret */ -#define SCTP_SET_AUTH_CHUNKS 0x00000103/* specify what chunks you want - * the system may have additional requirments +#define SCTP_SET_AUTH_CHUNKS 0x00000103 /* specify what chunks you want + * the system may have additional requirements * as well. I.e. probably ASCONF/ASCONF-ACK no matter * if you want it or not. */ @@ -285,7 +285,7 @@ struct sctp_error_unrecognized_chunk { #define SCTP_SAT_NETWORK_MIN 400 /* min ms for RTT to set satellite time */ #define SCTP_SAT_NETWORK_BURST_INCR 2 /* how many times to multiply maxburst in sat */ -/* Data Chuck Specific Flags */ +/* Data Chunk Specific Flags */ #define SCTP_DATA_FRAG_MASK 0x03 #define SCTP_DATA_MIDDLE_FRAG 0x00 #define SCTP_DATA_LAST_FRAG 0x01 diff --git a/lib/libc/include/generic-netbsd/netinet/tcp_var.h b/lib/libc/include/generic-netbsd/netinet/tcp_var.h @@ -1,4 +1,4 @@ -/* $NetBSD: tcp_var.h,v 1.198 2022/10/28 05:18:39 ozaki-r Exp $ */ +/* $NetBSD: tcp_var.h,v 1.199 2024/12/03 20:02:30 andvar Exp $ */ /* * Copyright (C) 1995, 1996, 1997, and 1998 WIDE Project. @@ -619,7 +619,7 @@ struct tcp_opt_info { shortage */ #define TCP_STAT_PMTUBLACKHOLE 17 /* PMTUD blackhole detected */ #define TCP_STAT_SNDTOTAL 18 /* total packets sent */ -#define TCP_STAT_SNDPACK 19 /* data packlets sent */ +#define TCP_STAT_SNDPACK 19 /* data packets sent */ #define TCP_STAT_SNDBYTE 20 /* data bytes sent */ #define TCP_STAT_SNDREXMITPACK 21 /* data packets retransmitted */ #define TCP_STAT_SNDREXMITBYTE 22 /* data bytes retransmitted */ diff --git a/lib/libc/include/generic-netbsd/netinet/tcp_vtw.h b/lib/libc/include/generic-netbsd/netinet/tcp_vtw.h @@ -1,4 +1,4 @@ -/* $NetBSD: tcp_vtw.h,v 1.10 2022/12/11 08:09:20 mlelstv Exp $ */ +/* $NetBSD: tcp_vtw.h,v 1.11 2024/10/07 23:17:00 jakllsch Exp $ */ /* * Copyright (c) 2011 The NetBSD Foundation, Inc. * All rights reserved. @@ -151,7 +151,7 @@ */ struct fatp_mi; -#if CACHE_LINE_SIZE == 128 +#if CACHE_LINE_SIZE >= 128 typedef uint64_t fatp_word_t; #else typedef uint32_t fatp_word_t; diff --git a/lib/libc/include/generic-netbsd/netinet6/in6_var.h b/lib/libc/include/generic-netbsd/netinet6/in6_var.h @@ -1,4 +1,4 @@ -/* $NetBSD: in6_var.h,v 1.104 2020/06/16 17:12:18 maxv Exp $ */ +/* $NetBSD: in6_var.h,v 1.108 2025/06/27 21:36:23 andvar Exp $ */ /* $KAME: in6_var.h,v 1.81 2002/06/08 11:16:51 itojun Exp $ */ /* @@ -177,7 +177,7 @@ struct in6_ifstat { u_quad_t ifs6_out_forward; /* # of datagrams forwarded */ /* NOTE: increment on outgoing if */ u_quad_t ifs6_out_request; /* # of outgoing datagrams from ULP */ - /* NOTE: does not include forwrads */ + /* NOTE: does not include forwards */ u_quad_t ifs6_out_discard; /* # of discarded datagrams */ u_quad_t ifs6_out_fragok; /* # of datagrams fragmented */ u_quad_t ifs6_out_fragfail; /* # of datagrams failed on fragment */ @@ -492,37 +492,6 @@ do { \ extern const struct in6_addr zeroin6_addr; extern const u_char inet6ctlerrmap[]; extern bool in6_present; - -/* - * Macro for finding the internet address structure (in6_ifaddr) corresponding - * to a given interface (ifnet structure). - */ -static __inline struct in6_ifaddr * -in6_get_ia_from_ifp(struct ifnet *ifp) -{ - struct ifaddr *ifa; - - IFADDR_READER_FOREACH(ifa, ifp) { - if (ifa->ifa_addr->sa_family == AF_INET6) - break; - } - return (struct in6_ifaddr *)ifa; -} - -static __inline struct in6_ifaddr * -in6_get_ia_from_ifp_psref(struct ifnet *ifp, struct psref *psref) -{ - struct in6_ifaddr *ia; - int s; - - s = pserialize_read_enter(); - ia = in6_get_ia_from_ifp(ifp); - if (ia != NULL) - ia6_acquire(ia, psref); - pserialize_read_exit(s); - - return ia; -} #endif /* _KERNEL */ /* @@ -623,6 +592,11 @@ struct in6_ifaddr * in6ifa_ifpwithaddr_psref(const struct ifnet *, const struct in6_addr *, struct psref *); struct in6_ifaddr *in6ifa_ifwithaddr(const struct in6_addr *, uint32_t); +struct ifaddr * + in6ifa_first_lladdr(const struct ifnet *); +struct ifaddr * + in6ifa_first_lladdr_psref(const struct ifnet *, struct psref *); + int in6_matchlen(struct in6_addr *, struct in6_addr *); void in6_prefixlen2mask(struct in6_addr *, int); void in6_purge_mcast_references(struct in6_multi *); diff --git a/lib/libc/include/generic-netbsd/netinet6/ip6_var.h b/lib/libc/include/generic-netbsd/netinet6/ip6_var.h @@ -1,4 +1,4 @@ -/* $NetBSD: ip6_var.h,v 1.93 2022/10/28 05:18:39 ozaki-r Exp $ */ +/* $NetBSD: ip6_var.h,v 1.94 2024/02/09 22:08:37 andvar Exp $ */ /* $KAME: ip6_var.h,v 1.33 2000/06/11 14:59:20 jinmei Exp $ */ /* @@ -257,7 +257,7 @@ extern int ip6_mcast_pmtu; /* enable pMTU discovery for multicast? */ extern int ip6_v6only; extern int ip6_neighborgcthresh; /* Threshold # of NDP entries for GC */ extern int ip6_maxdynroutes; /* Max # of routes created via redirect */ -extern int ip6_param_rt_msg; /* How to send parmeter changing rtm */ +extern int ip6_param_rt_msg; /* How to send parameter changing rtm */ extern struct socket *ip6_mrouter; /* multicast routing daemon */ diff --git a/lib/libc/include/generic-netbsd/nfs/krpc.h b/lib/libc/include/generic-netbsd/nfs/krpc.h @@ -1,8 +1,12 @@ -/* $NetBSD: krpc.h,v 1.9 2009/03/14 14:46:11 dsl Exp $ */ +/* $NetBSD: krpc.h,v 1.10 2024/12/07 02:05:55 riastradh Exp $ */ + +#ifndef _NFS_KRPC_H_ +#define _NFS_KRPC_H_ #include <sys/cdefs.h> #ifdef _KERNEL + int krpc_call(struct sockaddr_in *sin, u_int prog, u_int vers, u_int func, struct mbuf **data, struct mbuf **from, struct lwp *l); @@ -15,8 +19,8 @@ struct mbuf *xdr_string_encode(char *str, int len); struct mbuf *xdr_string_decode(struct mbuf *m, char *str, int *len_p); struct mbuf *xdr_inaddr_encode(struct in_addr *ia); struct mbuf *xdr_inaddr_decode(struct mbuf *m, struct in_addr *ia); -#endif /* _KERNEL */ +#endif /* _KERNEL */ /* * RPC definitions for the portmapper @@ -31,11 +35,12 @@ struct mbuf *xdr_inaddr_decode(struct mbuf *m, struct in_addr *ia); #define PMAPPROC_DUMP 4 #define PMAPPROC_CALLIT 5 - /* * RPC definitions for bootparamd */ #define BOOTPARAM_PROG 100026 #define BOOTPARAM_VERS 1 #define BOOTPARAM_WHOAMI 1 -#define BOOTPARAM_GETFILE 2 -\ No newline at end of file +#define BOOTPARAM_GETFILE 2 + +#endif /* _NFS_KRPC_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/nfs/nfs.h b/lib/libc/include/generic-netbsd/nfs/nfs.h @@ -1,4 +1,4 @@ -/* $NetBSD: nfs.h,v 1.80 2021/12/05 07:44:53 msaitoh Exp $ */ +/* $NetBSD: nfs.h,v 1.81 2024/12/07 02:05:55 riastradh Exp $ */ /* * Copyright (c) 1989, 1993, 1995 * The Regents of the University of California. All rights reserved. @@ -44,6 +44,8 @@ #include <sys/rbtree.h> #endif +#include <nfs/rpcv2.h> + /* * Tunable constants for nfs */ @@ -69,8 +71,8 @@ #define NFS_TRYLATERDELMAX (1*60) /* Maximum try later delay (sec) */ #define NFS_TRYLATERDELMUL 2 /* Exponential backoff multiplier */ -#define NFS_CWNDSCALE 256 -#define NFS_MAXCWND (NFS_CWNDSCALE * 32) +#define NFS_CWNDSCALE 256 +#define NFS_MAXCWND (NFS_CWNDSCALE * 32) /* * These can be overridden through <machine/param.h>, included via diff --git a/lib/libc/include/generic-netbsd/nfs/nfsdiskless.h b/lib/libc/include/generic-netbsd/nfs/nfsdiskless.h @@ -1,4 +1,4 @@ -/* $NetBSD: nfsdiskless.h,v 1.32 2015/05/21 02:04:22 rtr Exp $ */ +/* $NetBSD: nfsdiskless.h,v 1.33 2024/12/07 02:05:55 riastradh Exp $ */ /*- * Copyright (c) 1995, 1997 The NetBSD Foundation, Inc. @@ -30,9 +30,22 @@ * * @(#)nfsdiskless.h 8.1 (Berkeley) 6/10/93 */ + #ifndef _NFS_NFSDISKLESS_H_ #define _NFS_NFSDISKLESS_H_ +#include <sys/types.h> + +#include <sys/mount.h> +#include <sys/socket.h> + +#include <netinet/in.h> + +#include <nfs/nfsmount.h> +#include <nfs/nfsproto.h> + +struct ifnet; + /* * Structure holds parameters needed by nfs_mountroot(), * which are filled in by nfs_boot_init() using either @@ -66,25 +79,27 @@ struct nfs_diskless { }; #ifdef _KERNEL -int nfs_boot_init (struct nfs_diskless *, struct lwp *); -void nfs_boot_cleanup (struct nfs_diskless *, struct lwp *); -int nfs_boot_ifupdown (struct ifnet *, struct lwp *, int); -int nfs_boot_setaddress (struct ifnet *, struct lwp *, - uint32_t, uint32_t, uint32_t); +struct lwp; + +int nfs_boot_init(struct nfs_diskless *, struct lwp *); +void nfs_boot_cleanup(struct nfs_diskless *, struct lwp *); +int nfs_boot_ifupdown(struct ifnet *, struct lwp *, int); +int nfs_boot_setaddress(struct ifnet *, struct lwp *, + uint32_t, uint32_t, uint32_t); void nfs_boot_setmtu (struct ifnet *, int, struct lwp *); -int nfs_boot_deladdress (struct ifnet *, struct lwp *, uint32_t); -void nfs_boot_flushrt (struct ifnet *); -int nfs_boot_setrecvtimo (struct socket *); -int nfs_boot_enbroadcast (struct socket *); -int nfs_boot_sobind_ipport (struct socket *, uint16_t, struct lwp *); -int nfs_boot_sendrecv (struct socket *, struct sockaddr_in *, - int (*)(struct mbuf*, void*, int), struct mbuf*, - int (*)(struct mbuf**, void*), struct mbuf**, - struct mbuf**, void*, struct lwp *); - -int nfs_bootdhcp (struct nfs_diskless *, struct lwp *, int *); -int nfs_bootparam (struct nfs_diskless *, struct lwp *, int *); -int nfs_bootstatic (struct nfs_diskless *, struct lwp *, int *); +int nfs_boot_deladdress(struct ifnet *, struct lwp *, uint32_t); +void nfs_boot_flushrt(struct ifnet *); +int nfs_boot_setrecvtimo(struct socket *); +int nfs_boot_enbroadcast(struct socket *); +int nfs_boot_sobind_ipport(struct socket *, uint16_t, struct lwp *); +int nfs_boot_sendrecv(struct socket *, struct sockaddr_in *, + int (*)(struct mbuf *, void*, int), struct mbuf *, + int (*)(struct mbuf **, void*), struct mbuf **, + struct mbuf **, void*, struct lwp *); + +int nfs_bootdhcp(struct nfs_diskless *, struct lwp *, int *); +int nfs_bootparam(struct nfs_diskless *, struct lwp *, int *); +int nfs_bootstatic(struct nfs_diskless *, struct lwp *, int *); extern int (*nfs_bootstatic_callback)(struct nfs_diskless *); @@ -96,7 +111,9 @@ extern int (*nfs_bootstatic_callback)(struct nfs_diskless *); #define NFS_BOOT_NOSTATIC 0x20 #define NFS_BOOT_HAS_ROOTPATH 0x40 -#define NFS_BOOT_ALLINFO (NFS_BOOT_HAS_MYIP|NFS_BOOT_HAS_GWIP|NFS_BOOT_HAS_MASK|NFS_BOOT_HAS_SERVADDR|NFS_BOOT_HAS_SERVER|NFS_BOOT_HAS_ROOTPATH) +#define NFS_BOOT_ALLINFO \ + (NFS_BOOT_HAS_MYIP|NFS_BOOT_HAS_GWIP|NFS_BOOT_HAS_MASK| \ + NFS_BOOT_HAS_SERVADDR|NFS_BOOT_HAS_SERVER|NFS_BOOT_HAS_ROOTPATH) #endif /* _KERNEL */ diff --git a/lib/libc/include/generic-netbsd/nfs/nfsm_subs.h b/lib/libc/include/generic-netbsd/nfs/nfsm_subs.h @@ -1,4 +1,4 @@ -/* $NetBSD: nfsm_subs.h,v 1.55.4.1 2023/03/30 11:57:26 martin Exp $ */ +/* $NetBSD: nfsm_subs.h,v 1.59 2024/12/07 02:05:55 riastradh Exp $ */ /* * Copyright (c) 1989, 1993 @@ -34,7 +34,6 @@ * @(#)nfsm_subs.h 8.2 (Berkeley) 3/30/95 */ - #ifndef _NFS_NFSM_SUBS_H_ #define _NFS_NFSM_SUBS_H_ @@ -447,10 +446,8 @@ else \ (void) nfs_rephead((s), nfsd, slp, error, cache, &frev, \ mrq, &mb, &bpos); \ - if (mrep != NULL) { \ - m_freem(mrep); \ - mrep = NULL; \ - } \ + m_freem(mrep); \ + mrep = NULL; \ mreq = *mrq; \ if (error && (!(nfsd->nd_flag & ND_NFSV3) || \ error == EBADRPC)) {\ @@ -574,4 +571,4 @@ break; \ }; } -#endif -\ No newline at end of file +#endif /* _NFS_NFSM_SUBS_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/nfs/nfsmount.h b/lib/libc/include/generic-netbsd/nfs/nfsmount.h @@ -1,4 +1,4 @@ -/* $NetBSD: nfsmount.h,v 1.53 2015/07/15 03:28:55 manu Exp $ */ +/* $NetBSD: nfsmount.h,v 1.54 2024/12/07 02:05:55 riastradh Exp $ */ /* * Copyright (c) 1989, 1993 @@ -34,9 +34,8 @@ * @(#)nfsmount.h 8.3 (Berkeley) 3/30/95 */ - #ifndef _NFS_NFSMOUNT_H_ -#define _NFS_NFSMOUNT_H_ +#define _NFS_NFSMOUNT_H_ #if defined(_KERNEL) && !defined(NFS_ARGS_ONLY) #include <sys/condvar.h> @@ -200,4 +199,4 @@ void nfs_vfs_done(void); #endif /* _KERNEL */ -#endif -\ No newline at end of file +#endif /* _NFS_NFSMOUNT_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/nfs/nfsnode.h b/lib/libc/include/generic-netbsd/nfs/nfsnode.h @@ -1,4 +1,4 @@ -/* $NetBSD: nfsnode.h,v 1.76 2021/10/21 13:21:55 andvar Exp $ */ +/* $NetBSD: nfsnode.h,v 1.77 2024/12/07 02:05:55 riastradh Exp $ */ /* * Copyright (c) 1989, 1993 @@ -36,14 +36,18 @@ #ifndef _NFS_NFSNODE_H_ -#define _NFS_NFSNODE_H_ +#define _NFS_NFSNODE_H_ + +#include <sys/types.h> #include <sys/condvar.h> #include <sys/mutex.h> +#include <sys/queue.h> +#include <sys/timespec.h> -#ifndef _NFS_NFS_H_ #include <nfs/nfs.h> -#endif +#include <nfs/nfsproto.h> + #include <miscfs/genfs/genfs.h> #include <miscfs/genfs/genfs_node.h> @@ -62,7 +66,6 @@ * the cookies are stored. */ - LIST_HEAD(nfsdirhashhead, nfsdircache); TAILQ_HEAD(nfsdirchainhead, nfsdircache); @@ -280,4 +283,4 @@ extern int (**nfsv2_vnodeop_p)(void *); #endif /* _KERNEL */ -#endif -\ No newline at end of file +#endif /* _NFS_NFSNODE_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/nfs/nfsproto.h b/lib/libc/include/generic-netbsd/nfs/nfsproto.h @@ -1,4 +1,4 @@ -/* $NetBSD: nfsproto.h,v 1.17 2006/12/27 12:10:09 yamt Exp $ */ +/* $NetBSD: nfsproto.h,v 1.18 2024/12/07 02:05:55 riastradh Exp $ */ /* * Copyright (c) 1989, 1993 @@ -37,6 +37,9 @@ #ifndef _NFS_NFSPROTO_H_ #define _NFS_NFSPROTO_H_ +#include <sys/types.h> + +#include <sys/fstypes.h> /* * nfs definitions as per the Version 2 and 3 specs @@ -432,4 +435,4 @@ struct nfsv3_pathconf { u_int32_t pc_casepreserving; }; -#endif -\ No newline at end of file +#endif /* _NFS_NFSPROTO_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/nfs/nfsrtt.h b/lib/libc/include/generic-netbsd/nfs/nfsrtt.h @@ -1,4 +1,4 @@ -/* $NetBSD: nfsrtt.h,v 1.10 2014/09/05 05:34:41 matt Exp $ */ +/* $NetBSD: nfsrtt.h,v 1.11 2024/12/07 02:05:55 riastradh Exp $ */ /* * Copyright (c) 1992, 1993 @@ -34,9 +34,13 @@ * @(#)nfsrtt.h 8.2 (Berkeley) 3/30/95 */ - #ifndef _NFS_NFSRTT_H_ -#define _NFS_NFSRTT_H_ +#define _NFS_NFSRTT_H_ + +#include <sys/types.h> + +#include <sys/fstypes.h> +#include <sys/time.h> /* * Definitions for performance monitor. @@ -103,4 +107,4 @@ struct nfsdrt { extern int nfsrtton; #endif -#endif -\ No newline at end of file +#endif /* _NFS_NFSRTT_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/nfs/nfsrvcache.h b/lib/libc/include/generic-netbsd/nfs/nfsrvcache.h @@ -1,4 +1,4 @@ -/* $NetBSD: nfsrvcache.h,v 1.16 2007/12/04 17:42:32 yamt Exp $ */ +/* $NetBSD: nfsrvcache.h,v 1.17 2024/12/07 02:05:55 riastradh Exp $ */ /* * Copyright (c) 1989, 1993 @@ -34,10 +34,16 @@ * @(#)nfsrvcache.h 8.3 (Berkeley) 3/30/95 */ - #ifndef _NFS_NFSRVCACHE_H_ #define _NFS_NFSRVCACHE_H_ +#include <sys/types.h> + +#include <sys/condvar.h> +#include <sys/queue.h> + +#include <nfs/nfs.h> + /* * Definitions for the server recent request cache */ @@ -85,4 +91,4 @@ struct nfsrvcache { #define RC_INETADDR 0x20 #define RC_NAM 0x40 -#endif -\ No newline at end of file +#endif /* _NFS_NFSRVCACHE_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/nfs/rpcv2.h b/lib/libc/include/generic-netbsd/nfs/rpcv2.h @@ -1,4 +1,4 @@ -/* $NetBSD: rpcv2.h,v 1.12 2006/12/28 00:39:03 yamt Exp $ */ +/* $NetBSD: rpcv2.h,v 1.13 2024/12/07 02:05:55 riastradh Exp $ */ /* * Copyright (c) 1989, 1993 @@ -34,10 +34,11 @@ * @(#)rpcv2.h 8.2 (Berkeley) 3/30/95 */ - #ifndef _NFS_RPCV2_H_ #define _NFS_RPCV2_H_ +#include <sys/types.h> + /* * Definitions for Sun RPC Version 2, from * "RPC: Remote Procedure Call Protocol Specification" RFC1057 @@ -142,4 +143,5 @@ typedef u_char NFSKERBKEYSCHED_T[2]; #define NFS_KERBTTL (30 * 60) /* Credential ttl (sec) */ #define NFS_KERBCLOCKSKEW (5 * 60) /* Clock skew (sec) */ #define NFS_KERBW1(t) (*((u_long *)(&((t).dat[((t).length + 3) & ~0x3])))) -#endif -\ No newline at end of file + +#endif /* _NFS_RPCV2_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/nfs/xdr_subs.h b/lib/libc/include/generic-netbsd/nfs/xdr_subs.h @@ -1,4 +1,4 @@ -/* $NetBSD: xdr_subs.h,v 1.15 2005/12/11 12:25:17 christos Exp $ */ +/* $NetBSD: xdr_subs.h,v 1.16 2024/12/07 02:05:55 riastradh Exp $ */ /* * Copyright (c) 1989, 1993 @@ -34,7 +34,6 @@ * @(#)xdr_subs.h 8.3 (Berkeley) 3/30/95 */ - #ifndef _NFS_XDR_SUBS_H_ #define _NFS_XDR_SUBS_H_ @@ -72,14 +71,16 @@ #define fxdr_nfsv2time(f, t) { \ (t)->tv_sec = ntohl(((struct nfsv2_time *)(f))->nfsv2_sec); \ if (((struct nfsv2_time *)(f))->nfsv2_usec != 0xffffffff) \ - (t)->tv_nsec = 1000 * ntohl(((struct nfsv2_time *)(f))->nfsv2_usec); \ + (t)->tv_nsec = 1000 * \ + ntohl(((struct nfsv2_time *)(f))->nfsv2_usec); \ else \ (t)->tv_nsec = 0; \ } #define txdr_nfsv2time(f, t) { \ ((struct nfsv2_time *)(t))->nfsv2_sec = htonl((f)->tv_sec); \ if ((f)->tv_nsec != -1) \ - ((struct nfsv2_time *)(t))->nfsv2_usec = htonl((f)->tv_nsec / 1000); \ + ((struct nfsv2_time *)(t))->nfsv2_usec = \ + htonl((f)->tv_nsec / 1000); \ else \ ((struct nfsv2_time *)(t))->nfsv2_usec = 0xffffffff; \ } @@ -103,4 +104,4 @@ ((u_int32_t *)(t))[1] = htonl((u_int32_t)((f) & 0xffffffff)); \ } -#endif -\ No newline at end of file +#endif /* _NFS_XDR_SUBS_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/nl_types.h b/lib/libc/include/generic-netbsd/nl_types.h @@ -1,4 +1,4 @@ -/* $NetBSD: nl_types.h,v 1.13 2013/08/19 08:03:33 joerg Exp $ */ +/* $NetBSD: nl_types.h,v 1.14 2024/10/30 15:56:10 riastradh Exp $ */ /*- * Copyright (c) 1996 The NetBSD Foundation, Inc. @@ -31,7 +31,9 @@ #ifndef _NL_TYPES_H_ #define _NL_TYPES_H_ + #include <sys/cdefs.h> +#include <sys/featuretest.h> #ifdef _NLS_PRIVATE /* diff --git a/lib/libc/include/generic-netbsd/ntfs/ntfs_inode.h b/lib/libc/include/generic-netbsd/ntfs/ntfs_inode.h @@ -1,4 +1,4 @@ -/* $NetBSD: ntfs_inode.h,v 1.9 2014/11/13 16:51:53 hannken Exp $ */ +/* $NetBSD: ntfs_inode.h,v 1.10 2024/12/05 21:24:38 andvar Exp $ */ /*- * Copyright (c) 1998, 1999 Semen Ustimenko @@ -82,7 +82,7 @@ struct fnode { struct genfs_node f_gnode; LIST_ENTRY(fnode) f_fnlist; - struct vnode *f_vp; /* Associatied vnode */ + struct vnode *f_vp; /* Associated vnode */ struct ntnode *f_ip; /* Associated ntnode */ ntfs_times_t f_times; /* $NAME/dirinfo */ diff --git a/lib/libc/include/generic-netbsd/poll.h b/lib/libc/include/generic-netbsd/poll.h @@ -1,4 +1,4 @@ -/* $NetBSD: poll.h,v 1.16 2020/07/17 15:34:16 kamil Exp $ */ +/* $NetBSD: poll.h,v 1.17 2024/11/01 16:37:42 nia Exp $ */ /*- * Copyright (c) 1998 The NetBSD Foundation, Inc. @@ -83,15 +83,21 @@ __BEGIN_DECLS int poll(struct pollfd *, nfds_t, int); __END_DECLS -#ifdef _NETBSD_SOURCE +/* + * IEEE Std 1003.1-2024 (POSIX.1-2024) + */ +#if (_POSIX_C_SOURCE - 0) >= 202405L || (_XOPEN_SOURCE - 0 >= 800) || \ + defined(_NETBSD_SOURCE) #include <sys/sigtypes.h> /* for sigset_t */ struct timespec; __BEGIN_DECLS #ifndef __LIBC12_SOURCE__ +#ifdef _NETBSD_SOURCE int pollts(struct pollfd * __restrict, nfds_t, const struct timespec * __restrict, const sigset_t * __restrict) __RENAME(__pollts50); +#endif int ppoll(struct pollfd * __restrict, nfds_t, const struct timespec * __restrict, const sigset_t * __restrict); #endif /* __LIBC12_SOURCE__ */ diff --git a/lib/libc/include/generic-netbsd/powerpc/asm.h b/lib/libc/include/generic-netbsd/powerpc/asm.h @@ -1,453 +0,0 @@ -/* $NetBSD: asm.h,v 1.53 2022/01/07 22:59:32 andvar Exp $ */ - -/* - * Copyright (C) 1995, 1996 Wolfgang Solfrank. - * Copyright (C) 1995, 1996 TooLs GmbH. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by TooLs GmbH. - * 4. The name of TooLs GmbH may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _PPC_ASM_H_ -#define _PPC_ASM_H_ - -#ifdef _LP64 - -/* ppc64 is always PIC, r2 is always the TOC */ - -# define PIC_PLT(x) .x - -#else - -# ifdef __PIC__ -# define PIC_PROLOGUE XXX -# define PIC_EPILOGUE XXX -# define PIC_PLT(x) x+32768@plt -# ifdef __STDC__ -# define PIC_TOCNAME(name) .LCTOC_##name -# else -# define PIC_TOCNAME(name) .LCTOC_/**/name -# endif /* __STDC __*/ -# define PIC_TOCSETUP(name, reg) \ - .pushsection ".got2","aw" ;\ - PIC_TOCNAME(name) = . + 32768 ;\ - .popsection ;\ - bcl 20,31,1001f ;\ - 1001: mflr reg ;\ - addis reg,reg,PIC_TOCNAME(name)-1001b@ha ;\ - addi reg,reg,PIC_TOCNAME(name)-1001b@l -# define PIC_GOTSETUP(reg) \ - bcl 20,31,2002f ;\ - 2002: mflr reg ;\ - addis reg,reg,_GLOBAL_OFFSET_TABLE_-2002b@ha ;\ - addi reg,reg,_GLOBAL_OFFSET_TABLE_-2002b@l -# ifdef __STDC__ -# define PIC_GOT(x) XXX -# define PIC_GOTOFF(x) XXX -# else /* not __STDC__ */ -# define PIC_GOT(x) XXX -# define PIC_GOTOFF(x) XXX -# endif /* __STDC__ */ -# else /* !__PIC__ */ -# define PIC_PROLOGUE -# define PIC_EPILOGUE -# define PIC_PLT(x) x -# define PIC_GOT(x) x -# define PIC_GOTOFF(x) x -# define PIC_GOTSETUP(r) -# define PIC_TOCSETUP(n, r) -# endif /* __PIC__ */ - -#endif /* _LP64 */ - -#define _C_LABEL(x) x -#define _ASM_LABEL(x) x - -#define _GLOBAL(x) \ - .data; .align 2; .globl x; x: - -#ifdef GPROF -# define _PROF_PROLOGUE mflr 0; stw 0,4(1); bl _mcount -#else -# define _PROF_PROLOGUE -#endif - -#ifdef _LP64 - -# define SF_HEADER_SZ 48 -# define SF_PARAM_SZ 64 -# define SF_SZ (SF_HEADER_SZ + SF_PARAM_SZ) - -# define SF_SP 0 -# define SF_CR 8 -# define SF_LR 16 -# define SF_COMP 24 -# define SF_LD 32 -# define SF_TOC 40 -# define SF_PARAM SF_HEADER_SZ -# define SF_ALIGN(x) (((x) + 0xf) & ~0xf) - -# define _XENTRY(y) \ - .globl y; \ - .pushsection ".opd","aw"; \ - .align 3; \ -y: .quad .##y,.TOC.@tocbase,0; \ - .popsection; \ - .size y,24; \ - .type .##y,@function; \ - .globl .##y; \ - .align 3; \ -.##y: - -#define _ENTRY(x) .text; _XENTRY(x) - -# define ENTRY(y) _ENTRY(y) - -# define END(y) .size .##y,. - .##y - -# define CALL(y) \ - bl .y; \ - nop - -# define ENTRY_NOPROFILE(y) ENTRY(y) -# define ASENTRY(y) ENTRY(y) -#else /* !_LP64 */ - -# define _XENTRY(x) .align 2; .globl x; .type x,@function; x: -# define _ENTRY(x) .text; _XENTRY(x) - -# define ENTRY(y) _ENTRY(_C_LABEL(y)); _PROF_PROLOGUE - -# define END(y) .size _C_LABEL(y),.-_C_LABEL(y) - -# define CALL(y) \ - bl y - -# define ENTRY_NOPROFILE(y) _ENTRY(_C_LABEL(y)) -# define ASENTRY(y) _ENTRY(_ASM_LABEL(y)); _PROF_PROLOGUE -#endif /* _LP64 */ - -#define GLOBAL(y) _GLOBAL(_C_LABEL(y)) - -#define ASMSTR .asciz - -#undef __RCSID -#define RCSID(x) __RCSID(x) -#define __RCSID(x) .pushsection ".ident","MS",@progbits,1; \ - .asciz x; \ - .popsection - -#ifdef __ELF__ -# define WEAK_ALIAS(alias,sym) \ - .weak alias; \ - alias = sym -#endif /* __ELF__ */ -/* - * STRONG_ALIAS: create a strong alias. - */ -#define STRONG_ALIAS(alias,sym) \ - .globl alias; \ - alias = sym - -#ifdef __STDC__ -# define WARN_REFERENCES(sym,msg) \ - .pushsection .gnu.warning. ## sym; \ - .ascii msg; \ - .popsection -#else -# define WARN_REFERENCES(sym,msg) \ - .pushsection .gnu.warning./**/sym; \ - .ascii msg; \ - .popsection -#endif /* __STDC__ */ - -#ifdef _KERNEL -/* - * Get cpu_info pointer for current processor. Always in SPRG0. *ALWAYS* - */ -# define GET_CPUINFO(r) mfsprg r,0 -/* - * IN: - * R4[er] = first free byte beyond end/esym. - * - * OUT: - * R1[sp] = new kernel stack - * R4[er] = kernelend - */ - -# ifdef CI_INTSTK -# define INIT_CPUINFO_INTSTK(er,tmp1) \ - addis er,er,INTSTK@ha; \ - addi er,er,INTSTK@l; \ - stptr er,CI_INTSTK(tmp1) -# else -# define INIT_CPUINFO_INTSTK(er,tmp1) /* nothing */ -# endif /* CI_INTSTK */ - -/* - * We use lis/ori instead of lis/addi in case tmp2 is r0. - */ -# define INIT_CPUINFO(er,sp,tmp1,tmp2) \ - li tmp1,PAGE_MASK; \ - add er,er,tmp1; \ - andc er,er,tmp1; /* page align */ \ - lis tmp1,_C_LABEL(cpu_info)@ha; \ - addi tmp1,tmp1,_C_LABEL(cpu_info)@l; \ - mtsprg0 tmp1; /* save for later use */ \ - INIT_CPUINFO_INTSTK(er,tmp1); \ - lis tmp2,_C_LABEL(emptyidlespin)@h; \ - ori tmp2,tmp2,_C_LABEL(emptyidlespin)@l; \ - stptr tmp2,CI_IDLESPIN(tmp1); \ - li tmp2,-1; \ - stint tmp2,CI_IDEPTH(tmp1); \ - li tmp2,0; \ - lis %r13,_C_LABEL(lwp0)@h; \ - ori %r13,%r13,_C_LABEL(lwp0)@l; \ - stptr er,L_PCB(%r13); /* XXXuvm_lwp_getuarea */ \ - stptr tmp1,L_CPU(%r13); \ - addis er,er,USPACE@ha; /* stackpointer for lwp0 */ \ - addi er,er,USPACE@l; /* stackpointer for lwp0 */ \ - addi sp,er,-FRAMELEN-CALLFRAMELEN; /* stackpointer for lwp0 */ \ - stptr sp,L_MD_UTF(%r13); /* save in lwp0.l_md.md_utf */ \ - /* er = end of mem reserved for kernel */ \ - li tmp2,0; \ - stptr tmp2,-CALLFRAMELEN(er); /* end of stack chain */ \ - stptru tmp2,-CALLFRAMELEN(sp) /* end of stack chain */ - -#endif /* _KERNEL */ - - -#if defined(_REGNAMES) && (defined(_KERNEL) || defined(_STANDALONE)) - /* Condition Register Bit Fields */ -# define cr0 0 -# define cr1 1 -# define cr2 2 -# define cr3 3 -# define cr4 4 -# define cr5 5 -# define cr6 6 -# define cr7 7 - /* General Purpose Registers (GPRs) */ -# define r0 0 -# define r1 1 -# define r2 2 -# define r3 3 -# define r4 4 -# define r5 5 -# define r6 6 -# define r7 7 -# define r8 8 -# define r9 9 -# define r10 10 -# define r11 11 -# define r12 12 -# define r13 13 -# define r14 14 -# define r15 15 -# define r16 16 -# define r17 17 -# define r18 18 -# define r19 19 -# define r20 20 -# define r21 21 -# define r22 22 -# define r23 23 -# define r24 24 -# define r25 25 -# define r26 26 -# define r27 27 -# define r28 28 -# define r29 29 -# define r30 30 -# define r31 31 - /* Floating Point Registers (FPRs) */ -# define fr0 0 -# define fr1 1 -# define fr2 2 -# define fr3 3 -# define fr4 4 -# define fr5 5 -# define fr6 6 -# define fr7 7 -# define fr8 8 -# define fr9 9 -# define fr10 10 -# define fr11 11 -# define fr12 12 -# define fr13 13 -# define fr14 14 -# define fr15 15 -# define fr16 16 -# define fr17 17 -# define fr18 18 -# define fr19 19 -# define fr20 20 -# define fr21 21 -# define fr22 22 -# define fr23 23 -# define fr24 24 -# define fr25 25 -# define fr26 26 -# define fr27 27 -# define fr28 28 -# define fr29 29 -# define fr30 30 -# define fr31 31 -#endif /* _REGNAMES && (_KERNEL || _STANDALONE) */ - -/* - * Add some psuedo instructions to made sharing of assembly versions of - * ILP32 and LP64 code possible. - */ -#define ldint lwz /* not needed but for completeness */ -#define ldintu lwzu /* not needed but for completeness */ -#define stint stw /* not needed but for completeness */ -#define stintu stwu /* not needed but for completeness */ - -#ifndef _LP64 - -# define ldlong lwz /* load "C" long */ -# define ldlongu lwzu /* load "C" long with update */ -# define stlong stw /* load "C" long */ -# define stlongu stwu /* load "C" long with update */ -# define ldptr lwz /* load "C" pointer */ -# define ldptru lwzu /* load "C" pointer with update */ -# define stptr stw /* load "C" pointer */ -# define stptru stwu /* load "C" pointer with update */ -# define ldreg lwz /* load PPC general register */ -# define ldregu lwzu /* load PPC general register with update */ -# define streg stw /* load PPC general register */ -# define stregu stwu /* load PPC general register with update */ -# define SZREG 4 /* 4 byte registers */ -# define P2SZREG 2 - -# define lptrarx lwarx /* load "C" pointer with reservation */ -# define llongarx lwarx /* load "C" long with reservation */ -# define lregarx lwarx /* load PPC general register with reservation */ - -# define stptrcx stwcx /* store "C" pointer conditional */ -# define stlongcx stwcx /* store "C" long conditional */ -# define stregcx stwcx /* store PPC general register conditional */ - -# define clrrptri clrrwi /* clear right "C" pointer immediate */ -# define clrrlongi clrrwi /* clear right "C" long immediate */ -# define clrrregi clrrwi /* clear right PPC general register immediate */ - -# define cmpptr cmpw -# define cmplong cmpw -# define cmpreg cmpw -# define cmpptri cmpwi -# define cmplongi cmpwi -# define cmpregi cmpwi -# define cmpptrl cmplw -# define cmplongl cmplw -# define cmpregl cmplw -# define cmpptrli cmplwi -# define cmplongli cmplwi -# define cmpregli cmplwi - -#else /* _LP64 */ - -# define ldlong ld /* load "C" long */ -# define ldlongu ldu /* load "C" long with update */ -# define stlong std /* store "C" long */ -# define stlongu stdu /* store "C" long with update */ -# define ldptr ld /* load "C" pointer */ -# define ldptru ldu /* load "C" pointer with update */ -# define stptr std /* store "C" pointer */ -# define stptru stdu /* store "C" pointer with update */ -# define ldreg ld /* load PPC general register */ -# define ldregu ldu /* load PPC general register with update */ -# define streg std /* store PPC general register */ -# define stregu stdu /* store PPC general register with update */ -/* redefined this to force an error on PPC64 to catch their use. */ -# define lmw lmd /* load multiple PPC general registers */ -# define stmw stmd /* store multiple PPC general registers */ -# define SZREG 8 /* 8 byte registers */ -# define P2SZREG 3 - -# define lptrarx ldarx /* load "C" pointer with reservation */ -# define llongarx ldarx /* load "C" long with reservation */ -# define lregarx ldarx /* load PPC general register with reservation */ - -# define stptrcx stdcx /* store "C" pointer conditional */ -# define stlongcx stdcx /* store "C" long conditional */ -# define stregax stdcx /* store PPC general register conditional */ - -# define clrrptri clrrdi /* clear right "C" pointer immediate */ -# define clrrlongi clrrdi /* clear right "C" long immediate */ -# define clrrregi clrrdi /* clear right PPC general register immediate */ - -# define cmpptr cmpd -# define cmplong cmpd -# define cmpreg cmpd -# define cmpptri cmpdi -# define cmplongi cmpdi -# define cmpregi cmpdi -# define cmpptrl cmpld -# define cmplongl cmpld -# define cmpregl cmpld -# define cmpptrli cmpldi -# define cmplongli cmpldi -# define cmpregli cmpldi - -#endif /* _LP64 */ - -#ifdef _LOCORE -.macro stmd r,dst - i = 0 - .rept 32-\r - std i+\r, i*8+\dst - i = i + 1 - .endr -.endm - -.macro lmd r,dst - i = 0 - .rept 32-\r - ld i+\r, i*8+\dst - i = i + 1 - .endr -.endm -#endif /* _LOCORE */ - -#if defined(IBM405_ERRATA77) || \ - ((defined(_MODULE) || !defined(_KERNEL)) && !defined(_LP64)) -/* - * Workaround for IBM405 Errata 77 (CPU_210): interrupted stwcx. may - * errantly write data to memory - * - * (1) Insert dcbt before every stwcx. instruction - * (2) Insert sync before every rfi/rfci instruction - */ -#define IBM405_ERRATA77_DCBT(ra, rb) dcbt ra,rb -#define IBM405_ERRATA77_SYNC sync -#else -#define IBM405_ERRATA77_DCBT(ra, rb) /* nothing */ -#define IBM405_ERRATA77_SYNC /* nothing */ -#endif - -#endif /* !_PPC_ASM_H_ */ -\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/powerpc/bswap.h b/lib/libc/include/generic-netbsd/powerpc/bswap.h @@ -1,8 +0,0 @@ -/* $NetBSD: bswap.h,v 1.6 2006/01/31 07:51:41 dsl Exp $ */ - -#ifndef _POWERPC_BSWAP_H_ -#define _POWERPC_BSWAP_H_ - -#include <sys/bswap.h> - -#endif /* _POWERPC_BSWAP_H_ */ -\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/powerpc/cpu.h b/lib/libc/include/generic-netbsd/powerpc/cpu.h @@ -1,512 +0,0 @@ -/* $NetBSD: cpu.h,v 1.123 2022/11/15 12:43:14 macallan Exp $ */ - -/* - * Copyright (C) 1999 Wolfgang Solfrank. - * Copyright (C) 1999 TooLs GmbH. - * Copyright (C) 1995-1997 Wolfgang Solfrank. - * Copyright (C) 1995-1997 TooLs GmbH. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by TooLs GmbH. - * 4. The name of TooLs GmbH may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _POWERPC_CPU_H_ -#define _POWERPC_CPU_H_ - -struct cache_info { - int dcache_size; - int dcache_line_size; - int icache_size; - int icache_line_size; -}; - -#if defined(_KERNEL) || defined(_KMEMUSER) -#if defined(_KERNEL_OPT) -#include "opt_gprof.h" -#include "opt_modular.h" -#include "opt_multiprocessor.h" -#include "opt_ppcarch.h" -#include "opt_ppcopts.h" -#endif - -#ifdef _KERNEL -#include <sys/intr.h> -#include <sys/device_if.h> -#include <sys/evcnt.h> -#include <sys/param.h> -#include <sys/kernel.h> -#endif - -#include <sys/cpu_data.h> - -#ifdef _KERNEL -#define CI_SAVETEMP (0*CPUSAVE_LEN) -#define CI_SAVEDDB (1*CPUSAVE_LEN) -#define CI_SAVEIPKDB (2*CPUSAVE_LEN) /* obsolete */ -#define CI_SAVEMMU (3*CPUSAVE_LEN) -#define CI_SAVEMAX (4*CPUSAVE_LEN) -#define CPUSAVE_LEN 8 -#if defined(PPC_BOOKE) && !defined(MODULAR) && !defined(_MODULE) -#define CPUSAVE_SIZE 128 -#else -#define CPUSAVE_SIZE (CI_SAVEMAX*CPUSAVE_LEN) -CTASSERT(CPUSAVE_SIZE >= 128); -#endif -#define CPUSAVE_R28 0 /* where r28 gets saved */ -#define CPUSAVE_R29 1 /* where r29 gets saved */ -#define CPUSAVE_R30 2 /* where r30 gets saved */ -#define CPUSAVE_R31 3 /* where r31 gets saved */ -#define CPUSAVE_DEAR 4 /* where IBM4XX SPR_DEAR gets saved */ -#define CPUSAVE_DAR 4 /* where OEA SPR_DAR gets saved */ -#define CPUSAVE_ESR 5 /* where IBM4XX SPR_ESR gets saved */ -#define CPUSAVE_DSISR 5 /* where OEA SPR_DSISR gets saved */ -#define CPUSAVE_SRR0 6 /* where SRR0 gets saved */ -#define CPUSAVE_SRR1 7 /* where SRR1 gets saved */ -#endif /* _KERNEL */ - -struct cpu_info { - struct cpu_data ci_data; /* MI per-cpu data */ -#ifdef _KERNEL - device_t ci_dev; /* device of corresponding cpu */ - struct cpu_softc *ci_softc; /* private cpu info */ - struct lwp *ci_curlwp; /* current owner of the processor */ - struct lwp *ci_onproc; /* current user LWP / kthread */ - struct pcb *ci_curpcb; - struct pmap *ci_curpm; -#if defined(PPC_OEA) || defined(PPC_OEA601) || defined(PPC_OEA64) || \ - defined(PPC_OEA64_BRIDGE) || defined(MODULAR) || defined(_MODULE) - void *ci_battable; /* BAT table in use by this CPU */ -#endif - struct lwp *ci_softlwps[SOFTINT_COUNT]; - int ci_cpuid; /* from SPR_PIR */ - - int ci_want_resched; - volatile uint64_t ci_lastintr; - volatile u_long ci_lasttb; - volatile int ci_tickspending; - volatile int ci_cpl; - volatile int ci_iactive; - volatile int ci_idepth; - union { -#if !defined(PPC_BOOKE) && !defined(_MODULE) - volatile imask_t un1_ipending; -#define ci_ipending ci_un1.un1_ipending -#endif - uint64_t un1_pad64; - } ci_un1; - volatile uint32_t ci_pending_ipis; - int ci_mtx_oldspl; - int ci_mtx_count; -#if defined(PPC_IBM4XX) || \ - ((defined(MODULAR) || defined(_MODULE)) && !defined(_LP64)) - char *ci_intstk; -#endif - - register_t ci_savearea[CPUSAVE_SIZE]; -#if defined(PPC_BOOKE) || \ - ((defined(MODULAR) || defined(_MODULE)) && !defined(_LP64)) - uint32_t ci_pmap_asid_cur; - union pmap_segtab *ci_pmap_segtabs[2]; -#define ci_pmap_kern_segtab ci_pmap_segtabs[0] -#define ci_pmap_user_segtab ci_pmap_segtabs[1] - struct pmap_tlb_info *ci_tlb_info; -#endif /* PPC_BOOKE || ((MODULAR || _MODULE) && !_LP64) */ - struct cache_info ci_ci; - void *ci_sysmon_cookie; - void (*ci_idlespin)(void); - uint32_t ci_khz; - struct evcnt ci_ev_clock; /* clock intrs */ - struct evcnt ci_ev_statclock; /* stat clock */ - struct evcnt ci_ev_traps; /* calls to trap() */ - struct evcnt ci_ev_kdsi; /* kernel DSI traps */ - struct evcnt ci_ev_udsi; /* user DSI traps */ - struct evcnt ci_ev_udsi_fatal; /* user DSI trap failures */ - struct evcnt ci_ev_kisi; /* kernel ISI traps */ - struct evcnt ci_ev_isi; /* user ISI traps */ - struct evcnt ci_ev_isi_fatal; /* user ISI trap failures */ - struct evcnt ci_ev_pgm; /* user PGM traps */ - struct evcnt ci_ev_debug; /* user debug traps */ - struct evcnt ci_ev_fpu; /* FPU traps */ - struct evcnt ci_ev_fpusw; /* FPU context switch */ - struct evcnt ci_ev_ali; /* Alignment traps */ - struct evcnt ci_ev_ali_fatal; /* Alignment fatal trap */ - struct evcnt ci_ev_scalls; /* system call traps */ - struct evcnt ci_ev_vec; /* Altivec traps */ - struct evcnt ci_ev_vecsw; /* Altivec context switches */ - struct evcnt ci_ev_umchk; /* user MCHK events */ - struct evcnt ci_ev_ipi; /* IPIs received */ - struct evcnt ci_ev_tlbmiss_soft; /* tlb miss (no trap) */ - struct evcnt ci_ev_dtlbmiss_hard; /* data tlb miss (trap) */ - struct evcnt ci_ev_itlbmiss_hard; /* instruction tlb miss (trap) */ -#if defined(GPROF) && defined(MULTIPROCESSOR) - struct gmonparam *ci_gmon; /* MI per-cpu GPROF */ -#endif -#endif /* _KERNEL */ -}; -#endif /* _KERNEL || _KMEMUSER */ - -#ifdef _KERNEL - -#if defined(MULTIPROCESSOR) && !defined(_MODULE) -struct cpu_hatch_data { - int hatch_running; - device_t hatch_self; - struct cpu_info *hatch_ci; - uint32_t hatch_tbu; - uint32_t hatch_tbl; -#if defined(PPC_OEA64_BRIDGE) || defined (_ARCH_PPC64) - uint64_t hatch_hid0; - uint64_t hatch_hid1; - uint64_t hatch_hid4; - uint64_t hatch_hid5; -#else - uint32_t hatch_hid0; -#endif - uint32_t hatch_pir; -#if defined(PPC_OEA) || defined(PPC_OEA64_BRIDGE) - uintptr_t hatch_asr; - uintptr_t hatch_sdr1; - uint32_t hatch_sr[16]; - uintptr_t hatch_ibatu[8], hatch_ibatl[8]; - uintptr_t hatch_dbatu[8], hatch_dbatl[8]; -#endif -#if defined(PPC_BOOKE) - vaddr_t hatch_sp; - u_int hatch_tlbidx; -#endif -}; - -struct cpuset_info { - kcpuset_t *cpus_running; - kcpuset_t *cpus_hatched; - kcpuset_t *cpus_paused; - kcpuset_t *cpus_resumed; - kcpuset_t *cpus_halted; -}; - -extern struct cpuset_info cpuset_info; -#endif /* MULTIPROCESSOR && !_MODULE */ - -#if defined(MULTIPROCESSOR) || defined(_MODULE) -#define cpu_number() (curcpu()->ci_index + 0) - -#define CPU_IS_PRIMARY(ci) ((ci)->ci_cpuid == 0) -#define CPU_INFO_ITERATOR int -#define CPU_INFO_FOREACH(cii, ci) \ - cii = 0, ci = &cpu_info[0]; cii < (ncpu ? ncpu : 1); cii++, ci++ - -#else -#define cpu_number() 0 - -#define CPU_IS_PRIMARY(ci) true -#define CPU_INFO_ITERATOR int -#define CPU_INFO_FOREACH(cii, ci) \ - (void)cii, ci = curcpu(); ci != NULL; ci = NULL - -#endif /* MULTIPROCESSOR || _MODULE */ - -extern struct cpu_info cpu_info[]; - -static __inline struct cpu_info * curcpu(void) __pure; -static __inline __always_inline struct cpu_info * -curcpu(void) -{ - struct cpu_info *ci; - - __asm volatile ("mfsprg0 %0" : "=r"(ci)); - return ci; -} - -register struct lwp *powerpc_curlwp __asm("r13"); -#define curlwp powerpc_curlwp -#define curpcb (curcpu()->ci_curpcb) -#define curpm (curcpu()->ci_curpm) - -static __inline register_t -mfmsr(void) -{ - register_t msr; - - __asm volatile ("mfmsr %0" : "=r"(msr)); - return msr; -} - -static __inline void -mtmsr(register_t msr) -{ - //KASSERT(msr & PSL_CE); - //KASSERT(msr & PSL_DE); - __asm volatile ("mtmsr %0" : : "r"(msr)); -} - -#if !defined(_MODULE) -static __inline uint32_t -mftbl(void) -{ - uint32_t tbl; - - __asm volatile ( -#ifdef PPC_IBM403 - " mftblo %[tbl]" "\n" -#elif defined(PPC_BOOKE) - " mfspr %[tbl],268" "\n" -#else - " mftbl %[tbl]" "\n" -#endif - : [tbl] "=r" (tbl)); - - return tbl; -} - -static __inline uint64_t -mftb(void) -{ - uint64_t tb; - -#ifdef _ARCH_PPC64 - __asm volatile ("mftb %0" : "=r"(tb)); -#else - int tmp; - - __asm volatile ( -#ifdef PPC_IBM403 - "1: mftbhi %[tb]" "\n" - " mftblo %L[tb]" "\n" - " mftbhi %[tmp]" "\n" -#elif defined(PPC_BOOKE) - "1: mfspr %[tb],269" "\n" - " mfspr %L[tb],268" "\n" - " mfspr %[tmp],269" "\n" -#else - "1: mftbu %[tb]" "\n" - " mftb %L[tb]" "\n" - " mftbu %[tmp]" "\n" -#endif - " cmplw %[tb],%[tmp]" "\n" - " bne- 1b" "\n" - : [tb] "=r" (tb), [tmp] "=r"(tmp) - :: "cr0"); -#endif - - return tb; -} - -static __inline uint32_t -mfrtcl(void) -{ - uint32_t rtcl; - - __asm volatile ("mfrtcl %0" : "=r"(rtcl)); - return rtcl; -} - -static __inline void -mfrtc(uint32_t *rtcp) -{ - uint32_t tmp; - - __asm volatile ( - "1: mfrtcu %[rtcu]" "\n" - " mfrtcl %[rtcl]" "\n" - " mfrtcu %[tmp]" "\n" - " cmplw %[rtcu],%[tmp]" "\n" - " bne- 1b" - : [rtcu] "=r"(rtcp[0]), [rtcl] "=r"(rtcp[1]), [tmp] "=r"(tmp) - :: "cr0"); -} - -static __inline uint64_t -rtc_nanosecs(void) -{ - /* - * 601 RTC/DEC registers share clock of 7.8125 MHz, 128 ns per tick. - * DEC has max of 25 bits, FFFFFF => 2.14748352 seconds. - * RTCU is seconds, 32 bits. - * RTCL is nano-seconds, 23 bit counter from 0 - 999,999,872 (999,999,999 - 128 ns) - */ - uint64_t cycles; - uint32_t tmp[2]; - - mfrtc(tmp); - - cycles = tmp[0] * 1000000000; - cycles += (tmp[1] >> 7); - - return cycles; -} -#endif /* !_MODULE */ - -static __inline uint32_t -mfpvr(void) -{ - uint32_t pvr; - - __asm volatile ("mfpvr %0" : "=r"(pvr)); - return (pvr); -} - -#ifdef _MODULE -extern const char __CPU_MAXNUM; -/* - * Make with 0xffff to force a R_PPC_ADDR16_LO without the - * corresponding R_PPC_ADDR16_HI relocation. - */ -#define CPU_MAXNUM (((uintptr_t)&__CPU_MAXNUM)&0xffff) -#endif /* _MODULE */ - -#if !defined(_MODULE) -extern char *booted_kernel; -extern int powersave; -extern int cpu_timebase; -extern int cpu_printfataltraps; - -struct cpu_info * - cpu_attach_common(device_t, int); -void cpu_setup(device_t, struct cpu_info *); -void cpu_identify(char *, size_t); -void cpu_probe_cache(void); - -void dcache_wb_page(vaddr_t); -void dcache_wbinv_page(vaddr_t); -void dcache_inv_page(vaddr_t); -void dcache_zero_page(vaddr_t); -void icache_inv_page(vaddr_t); -void dcache_wb(vaddr_t, vsize_t); -void dcache_wbinv(vaddr_t, vsize_t); -void dcache_inv(vaddr_t, vsize_t); -void icache_inv(vaddr_t, vsize_t); - -void * mapiodev(paddr_t, psize_t, bool); -void unmapiodev(vaddr_t, vsize_t); - -int emulate_mxmsr(struct lwp *, struct trapframe *, uint32_t); - -#ifdef MULTIPROCESSOR -int md_setup_trampoline(volatile struct cpu_hatch_data *, - struct cpu_info *); -void md_presync_timebase(volatile struct cpu_hatch_data *); -void md_start_timebase(volatile struct cpu_hatch_data *); -void md_sync_timebase(volatile struct cpu_hatch_data *); -void md_setup_interrupts(void); -int cpu_spinup(device_t, struct cpu_info *); -register_t - cpu_hatch(void); -void cpu_spinup_trampoline(void); -void cpu_boot_secondary_processors(void); -void cpu_halt(void); -void cpu_halt_others(void); -void cpu_pause(struct trapframe *); -void cpu_pause_others(void); -void cpu_resume(cpuid_t); -void cpu_resume_others(void); -int cpu_is_paused(int); -void cpu_debug_dump(void); -#endif /* MULTIPROCESSOR */ -#endif /* !_MODULE */ - -#define cpu_proc_fork(p1, p2) - -#ifndef __HIDE_DELAY -#define DELAY(n) delay(n) -void delay(unsigned int); -#endif /* __HIDE_DELAY */ - -#define CLKF_USERMODE(cf) cpu_clkf_usermode(cf) -#define CLKF_PC(cf) cpu_clkf_pc(cf) -#define CLKF_INTR(cf) cpu_clkf_intr(cf) - -bool cpu_clkf_usermode(const struct clockframe *); -vaddr_t cpu_clkf_pc(const struct clockframe *); -bool cpu_clkf_intr(const struct clockframe *); - -#define LWP_PC(l) cpu_lwp_pc(l) - -vaddr_t cpu_lwp_pc(struct lwp *); - -void cpu_ast(struct lwp *, struct cpu_info *); -void * cpu_uarea_alloc(bool); -bool cpu_uarea_free(void *); -void cpu_signotify(struct lwp *); -void cpu_need_proftick(struct lwp *); - -void cpu_fixup_stubs(void); - -#if !defined(PPC_IBM4XX) && !defined(PPC_BOOKE) && !defined(_MODULE) -int cpu_get_dfs(void); -void cpu_set_dfs(int); - -void oea_init(void (*)(void)); -void oea_startup(const char *); -void oea_dumpsys(void); -void oea_install_extint(void (*)(void)); -paddr_t kvtop(void *); - -extern paddr_t msgbuf_paddr; -extern int cpu_altivec; -#endif - -#ifdef PPC_NO_UNALIGNED -bool fix_unaligned(struct trapframe *, ksiginfo_t *); -#endif - -#endif /* _KERNEL */ - -/* XXX The below breaks unified pmap on ppc32 */ - -#if !defined(CACHELINESIZE) && !defined(_MODULE) \ - && (defined(_KERNEL) || defined(_STANDALONE)) -#if defined(PPC_IBM403) -#define CACHELINESIZE 16 -#define MAXCACHELINESIZE 16 -#elif defined (PPC_OEA64_BRIDGE) -#define CACHELINESIZE 128 -#define MAXCACHELINESIZE 128 -#else -#define CACHELINESIZE 32 -#define MAXCACHELINESIZE 32 -#endif /* PPC_OEA64_BRIDGE */ -#endif - -void __syncicache(void *, size_t); - -/* - * CTL_MACHDEP definitions. - */ -#define CPU_CACHELINE 1 -#define CPU_TIMEBASE 2 -#define CPU_CPUTEMP 3 -#define CPU_PRINTFATALTRAPS 4 -#define CPU_CACHEINFO 5 -#define CPU_ALTIVEC 6 -#define CPU_MODEL 7 -#define CPU_POWERSAVE 8 /* int: use CPU powersave mode */ -#define CPU_BOOTED_DEVICE 9 /* string: device we booted from */ -#define CPU_BOOTED_KERNEL 10 /* string: kernel we booted */ -#define CPU_EXECPROT 11 /* bool: PROT_EXEC works */ -#define CPU_FPU 12 -#define CPU_NO_UNALIGNED 13 /* No HW support for unaligned access */ - -#endif /* _POWERPC_CPU_H_ */ -\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/powerpc/fenv.h b/lib/libc/include/generic-netbsd/powerpc/fenv.h @@ -1,331 +0,0 @@ -/* $NetBSD: fenv.h,v 1.7 2022/09/13 01:22:12 rin Exp $ */ - -/*- - * Copyright (c) 2004-2005 David Schultz <das@FreeBSD.ORG> - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD: head/lib/msun/powerpc/fenv.h 226218 2011-10-10 15:43:09Z das $ - */ - -#ifndef _POWERPC_FENV_H_ -#define _POWERPC_FENV_H_ - -#include <sys/stdint.h> - -/* Exception flags */ -#define FE_INEXACT 0x02000000 -#define FE_DIVBYZERO 0x04000000 -#define FE_UNDERFLOW 0x08000000 -#define FE_OVERFLOW 0x10000000 -#define FE_INVALID 0x20000000 /* all types of invalid FP ops */ - -/* - * The PowerPC architecture has extra invalid flags that indicate the - * specific type of invalid operation occurred. These flags may be - * tested, set, and cleared---but not masked---separately. All of - * these bits are cleared when FE_INVALID is cleared, but only - * FE_VXSOFT is set when FE_INVALID is explicitly set in software. - */ -#define FE_VXCVI 0x00000100 /* invalid integer convert */ -#define FE_VXSQRT 0x00000200 /* square root of a negative */ -#define FE_VXSOFT 0x00000400 /* software-requested exception */ -#define FE_VXVC 0x00080000 /* ordered comparison involving NaN */ -#define FE_VXIMZ 0x00100000 /* inf * 0 */ -#define FE_VXZDZ 0x00200000 /* 0 / 0 */ -#define FE_VXIDI 0x00400000 /* inf / inf */ -#define FE_VXISI 0x00800000 /* inf - inf */ -#define FE_VXSNAN 0x01000000 /* operation on a signalling NaN */ -#define FE_ALL_INVALID (FE_VXCVI | FE_VXSQRT | FE_VXSOFT | FE_VXVC | \ - FE_VXIMZ | FE_VXZDZ | FE_VXIDI | FE_VXISI | \ - FE_VXSNAN | FE_INVALID) -#define FE_ALL_EXCEPT (FE_DIVBYZERO | FE_INEXACT | \ - FE_ALL_INVALID | FE_OVERFLOW | FE_UNDERFLOW) - -/* Rounding modes */ -#define FE_TONEAREST 0x0000 -#define FE_TOWARDZERO 0x0001 -#define FE_UPWARD 0x0002 -#define FE_DOWNWARD 0x0003 -#define _ROUND_MASK (FE_TONEAREST | FE_DOWNWARD | \ - FE_UPWARD | FE_TOWARDZERO) - -#ifndef _SOFT_FLOAT - -#ifndef __fenv_static -#define __fenv_static static -#endif - -typedef uint32_t fenv_t; -typedef uint32_t fexcept_t; - -#ifndef _KERNEL -__BEGIN_DECLS - -/* Default floating-point environment */ -extern const fenv_t __fe_dfl_env; -#define FE_DFL_ENV (&__fe_dfl_env) - -/* We need to be able to map status flag positions to mask flag positions */ -#define _FPUSW_SHIFT 22 -#define _ENABLE_MASK ((FE_DIVBYZERO | FE_INEXACT | FE_INVALID | \ - FE_OVERFLOW | FE_UNDERFLOW) >> _FPUSW_SHIFT) - -#ifndef _SOFT_FLOAT -#define __mffs(__env) __asm __volatile("mffs %0" : "=f" (*(__env))) -#define __mtfsf(__env) __asm __volatile("mtfsf 255,%0" : : "f" (__env)) - -static __inline uint32_t -__mfmsr(void) -{ - uint32_t __msr; - - __asm volatile ("mfmsr %0" : "=r"(__msr)); - return __msr; -} - -static __inline void -__mtmsr(uint32_t __msr) -{ - - __asm volatile ("mtmsr %0" : : "r"(__msr)); -} - -#define __MSR_FE_MASK (0x00000800 | 0x00000100) -#define __MSR_FE_DIS (0) -#define __MSR_FE_PREC (0x00000800 | 0x00000100) - -static __inline void -__updatemsr(uint32_t __reg) -{ - uint32_t __msr; - - __msr = __mfmsr() & ~__MSR_FE_MASK; - if (__reg != 0) { - __msr |= __MSR_FE_PREC; - } else { - __msr |= __MSR_FE_DIS; - } - __mtmsr(__msr); -} - -#else -#define __mffs(__env) -#define __mtfsf(__env) -#define __updatemsr(__reg) -#endif - -union __fpscr { - double __d; - struct { - uint32_t __junk; - fenv_t __reg; - } __bits; -}; - -#if __GNUC_PREREQ__(8, 0) -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wshadow" -#endif - -__fenv_static __inline int -feclearexcept(int __excepts) -{ - union __fpscr __r; - - if (__excepts & FE_INVALID) - __excepts |= FE_ALL_INVALID; - __mffs(&__r.__d); - __r.__bits.__reg &= ~__excepts; - __mtfsf(__r.__d); - return (0); -} - -__fenv_static __inline int -fegetexceptflag(fexcept_t *__flagp, int __excepts) -{ - union __fpscr __r; - - __mffs(&__r.__d); - *__flagp = __r.__bits.__reg & __excepts; - return (0); -} - -__fenv_static __inline int -fesetexceptflag(const fexcept_t *__flagp, int __excepts) -{ - union __fpscr __r; - - if (__excepts & FE_INVALID) - __excepts |= FE_ALL_INVALID; - __mffs(&__r.__d); - __r.__bits.__reg &= ~__excepts; - __r.__bits.__reg |= *__flagp & __excepts; - __mtfsf(__r.__d); - return (0); -} - -__fenv_static __inline int -feraiseexcept(int __excepts) -{ - union __fpscr __r; - - if (__excepts & FE_INVALID) - __excepts |= FE_VXSOFT; - __mffs(&__r.__d); - __r.__bits.__reg |= __excepts; - __mtfsf(__r.__d); - return (0); -} - -__fenv_static __inline int -fetestexcept(int __excepts) -{ - union __fpscr __r; - - __mffs(&__r.__d); - return (__r.__bits.__reg & __excepts); -} - -__fenv_static __inline int -fegetround(void) -{ - union __fpscr __r; - - __mffs(&__r.__d); - return (__r.__bits.__reg & _ROUND_MASK); -} - -__fenv_static __inline int -fesetround(int __round) -{ - union __fpscr __r; - - if (__round & ~_ROUND_MASK) - return (-1); - __mffs(&__r.__d); - __r.__bits.__reg &= ~_ROUND_MASK; - __r.__bits.__reg |= __round; - __mtfsf(__r.__d); - return (0); -} - -__fenv_static __inline int -fegetenv(fenv_t *__envp) -{ - union __fpscr __r; - - __mffs(&__r.__d); - *__envp = __r.__bits.__reg; - return (0); -} - -__fenv_static __inline int -feholdexcept(fenv_t *__envp) -{ - union __fpscr __r; - uint32_t msr; - - __mffs(&__r.__d); - *__envp = __r.__bits.__reg; - __r.__bits.__reg &= ~(FE_ALL_EXCEPT | _ENABLE_MASK); - __mtfsf(__r.__d); - __updatemsr(__r.__bits.__reg); - return (0); -} - -__fenv_static __inline int -fesetenv(const fenv_t *__envp) -{ - union __fpscr __r; - - __r.__bits.__reg = *__envp; - __mtfsf(__r.__d); - __updatemsr(__r.__bits.__reg); - return (0); -} - -__fenv_static __inline int -feupdateenv(const fenv_t *__envp) -{ - union __fpscr __r; - - __mffs(&__r.__d); - __r.__bits.__reg &= FE_ALL_EXCEPT; - __r.__bits.__reg |= *__envp; - __mtfsf(__r.__d); - __updatemsr(__r.__bits.__reg); - return (0); -} - -#if __GNUC_PREREQ__(8, 0) -#pragma GCC diagnostic pop -#endif - -#if defined(_NETBSD_SOURCE) || defined(_GNU_SOURCE) - -__fenv_static __inline int -feenableexcept(int __mask) -{ - union __fpscr __r; - fenv_t __oldmask; - - __mffs(&__r.__d); - __oldmask = __r.__bits.__reg; - __r.__bits.__reg |= (__mask & FE_ALL_EXCEPT) >> _FPUSW_SHIFT; - __mtfsf(__r.__d); - __updatemsr(__r.__bits.__reg); - return ((__oldmask & _ENABLE_MASK) << _FPUSW_SHIFT); -} - -__fenv_static __inline int -fedisableexcept(int __mask) -{ - union __fpscr __r; - fenv_t __oldmask; - - __mffs(&__r.__d); - __oldmask = __r.__bits.__reg; - __r.__bits.__reg &= ~((__mask & FE_ALL_EXCEPT) >> _FPUSW_SHIFT); - __mtfsf(__r.__d); - __updatemsr(__r.__bits.__reg); - return ((__oldmask & _ENABLE_MASK) << _FPUSW_SHIFT); -} - -__fenv_static __inline int -fegetexcept(void) -{ - union __fpscr __r; - - __mffs(&__r.__d); - return ((__r.__bits.__reg & _ENABLE_MASK) << _FPUSW_SHIFT); -} - -#endif /* _NETBSD_SOURCE || _GNU_SOURCE */ - -__END_DECLS - -#endif -#endif /* _SOFT_FLOAT */ - -#endif /* !_POWERPC_FENV_H_ */ -\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/powerpc/ibm4xx/pmap.h b/lib/libc/include/generic-netbsd/powerpc/ibm4xx/pmap.h @@ -1,212 +0,0 @@ -/* $NetBSD: pmap.h,v 1.21 2020/03/14 14:05:43 ad Exp $ */ - -/* - * Copyright 2001 Wasabi Systems, Inc. - * All rights reserved. - * - * Written by Eduardo Horvath and Simon Burge for Wasabi Systems, Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed for the NetBSD Project by - * Wasabi Systems, Inc. - * 4. The name of Wasabi Systems, Inc. may not be used to endorse - * or promote products derived from this software without specific prior - * written permission. - * - * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -/*- - * Copyright (C) 1995, 1996 Wolfgang Solfrank. - * Copyright (C) 1995, 1996 TooLs GmbH. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by TooLs GmbH. - * 4. The name of TooLs GmbH may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _IBM4XX_PMAP_H_ -#define _IBM4XX_PMAP_H_ - -#ifdef _LOCORE -#error use assym.h instead -#endif - -#if defined(_MODULE) -#error this file should not be included by loadable kernel modules -#endif - -#include <powerpc/ibm4xx/tlb.h> - -#define KERNEL_PID 1 /* TLB PID to use for kernel translation */ - -/* - * A TTE is a 16KB or greater TLB entry w/size and endianness bits - * stuffed in the (unused) low bits of the PA. - */ -#define TTE_PA_MASK 0xffffc000 -#define TTE_RPN_MASK(sz) (~((1 << (10 + 2 * (sz))) - 1)) -#define TTE_ENDIAN 0x00002000 -#define TTE_SZ_MASK 0x00001c00 -#define TTE_SZ_SHIFT 10 - -/* TTE_SZ_1K and TTE_SZ_4K are not allowed. */ -#define TTE_SZ_16K (TLB_SIZE_16K << TTE_SZ_SHIFT) -#define TTE_SZ_64K (TLB_SIZE_64K << TTE_SZ_SHIFT) -#define TTE_SZ_256K (TLB_SIZE_256K << TTE_SZ_SHIFT) -#define TTE_SZ_1M (TLB_SIZE_1M << TTE_SZ_SHIFT) -#define TTE_SZ_4M (TLB_SIZE_4M << TTE_SZ_SHIFT) -#define TTE_SZ_16M (TLB_SIZE_16M << TTE_SZ_SHIFT) - -#define TTE_EX TLB_EX -#define TTE_WR TLB_WR -#define TTE_ZSEL_MASK TLB_ZSEL_MASK -#define TTE_ZSEL_SHFT TLB_ZSEL_SHFT -#define TTE_W TLB_W -#define TTE_I TLB_I -#define TTE_M TLB_M -#define TTE_G TLB_G - -#define ZONE_PRIV 0 -#define ZONE_USER 1 - -#define TTE_PA(p) ((p)&TTE_PA_MASK) -#define TTE_ZONE(z) TLB_ZONE(z) - -/* - * Definitions for sizes of 1st and 2nd level page tables. - * - */ -#define PTSZ (PAGE_SIZE / 4) -#define PTMAP (PTSZ * PAGE_SIZE) -#define PTMSK ((PTMAP - 1) & ~(PGOFSET)) - -#define PTIDX(v) (((v) & PTMSK) >> PGSHIFT) - -/* 2nd level tables map in any bits not mapped by 1st level tables. */ -#define STSZ ((0xffffffffU / (PAGE_SIZE * PTSZ)) + 1) -#define STMAP (0xffffffffU) -#define STMSK (~(PTMAP - 1)) - -#define STIDX(v) ((v) >> (PGSHIFT + 12)) - - -/* - * Extra flags to pass to pmap_enter() -- make sure they don't conflict - * w/PMAP_CANFAIL or PMAP_WIRED - */ -#define PME_NOCACHE 0x1000000 -#define PME_WRITETHROUG 0x2000000 - -/* - * Pmap stuff - */ -struct pmap { - volatile int pm_ctx; /* PID to identify PMAP's entries in TLB */ - int pm_refs; /* ref count */ - struct pmap_statistics pm_stats; /* pmap statistics */ - volatile u_int *pm_ptbl[STSZ]; /* Array of 64 pointers to page tables. */ -}; - -#ifdef _KERNEL -#define PMAP_GROWKERNEL - -#define PMAP_ATTR_REF 0x1 -#define PMAP_ATTR_CHG 0x2 - -#define pmap_clear_modify(pg) (pmap_check_attr((pg), PMAP_ATTR_CHG, 1)) -#define pmap_clear_reference(pg)(pmap_check_attr((pg), PMAP_ATTR_REF, 1)) -#define pmap_is_modified(pg) (pmap_check_attr((pg), PMAP_ATTR_CHG, 0)) -#define pmap_is_referenced(pg) (pmap_check_attr((pg), PMAP_ATTR_REF, 0)) - -#define pmap_phys_address(x) (x) - -#define pmap_resident_count(pmap) ((pmap)->pm_stats.resident_count) -#define pmap_wired_count(pmap) ((pmap)->pm_stats.wired_count) - -void pmap_unwire(struct pmap *pm, vaddr_t va); -void pmap_bootstrap(u_int kernelstart, u_int kernelend); -bool pmap_extract(struct pmap *, vaddr_t, paddr_t *); -bool pmap_check_attr(struct vm_page *, u_int, int); -void pmap_real_memory(paddr_t *, psize_t *); -int pmap_tlbmiss(vaddr_t va, int ctx); - -static __inline bool -pmap_remove_all(struct pmap *pmap) -{ - /* Nothing. */ - return false; -} - -int ctx_alloc(struct pmap *); -void ctx_free(struct pmap *); - -#define PMAP_NEED_PROCWR -void pmap_procwr(struct proc *, vaddr_t, size_t); - -/* - * Alternate mapping hooks for pool pages. Avoids thrashing the TLB. - * - * Note: This won't work if we have more memory than can be direct-mapped - * VA==PA all at once. But pmap_copy_page() and pmap_zero_page() will have - * this problem, too. - */ -#define PMAP_MAP_POOLPAGE(pa) (pa) -#define PMAP_UNMAP_POOLPAGE(pa) (pa) - -static __inline paddr_t vtophys(vaddr_t); - -static __inline paddr_t -vtophys(vaddr_t va) -{ - paddr_t pa; - - /* XXX should check battable */ - - if (pmap_extract(pmap_kernel(), va, &pa)) - return pa; - return va; -} -#endif /* _KERNEL */ -#endif /* _IBM4XX_PMAP_H_ */ -\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/powerpc/ieee.h b/lib/libc/include/generic-netbsd/powerpc/ieee.h @@ -1,18 +0,0 @@ -/* $NetBSD: ieee.h,v 1.6 2014/10/22 10:32:50 joerg Exp $ */ - -#include <sys/ieee754.h> - -/* - * A NaN is a `signalling NaN' if its QUIETNAN bit is clear in its - * high fraction; if the bit is set, it is a `quiet NaN'. - */ - -#if 0 -#define SNG_QUIETNAN (1 << 22) -#define DBL_QUIETNAN (1 << 19) -#endif - -union ldbl_u { - long double ldblu_ld; - double ldblu_d[2]; -}; -\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/powerpc/limits.h b/lib/libc/include/generic-netbsd/powerpc/limits.h @@ -1,130 +0,0 @@ -/* $NetBSD: limits.h,v 1.20 2019/01/21 20:28:18 dholland Exp $ */ - -/* - * Copyright (c) 1988, 1993 - * The Regents of the University of California. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * @(#)limits.h 8.3 (Berkeley) 1/4/94 - */ - -#ifndef _POWERPC_LIMITS_H_ -#define _POWERPC_LIMITS_H_ - -#include <sys/featuretest.h> - -#define CHAR_BIT 8 /* number of bits in a char */ - -/* - * According to ANSI (section 2.2.4.2), the values below must be usable by - * #if preprocessing directives. Additionally, the expression must have the - * same type as would an expression that is an object of the corresponding - * type converted according to the integral promotions. The subtraction for - * INT_MIN and LONG_MIN is so the value is not unsigned; 2147483648 is an - * unsigned int for 32-bit two's complement ANSI compilers (section 3.1.3.2). - * These numbers work for pcc as well. The UINT_MAX and ULONG_MAX values - * are written as hex so that GCC will be quiet about large integer constants. - */ -#define UCHAR_MAX 0xff /* max value for an unsigned char */ -#define SCHAR_MAX 0x7f /* max value for a signed char */ -#define SCHAR_MIN (-0x7f-1) /* min value for a signed char */ - -#define USHRT_MAX 0xffff /* max value for an unsigned short */ -#define SHRT_MAX 0x7fff /* max value for a short */ -#define SHRT_MIN (-0x7fff-1) /* min value for a short */ - -#define UINT_MAX 0xffffffffU /* max value for an unsigned int */ -#define INT_MAX 0x7fffffff /* max value for an int */ -#define INT_MIN (-0x7fffffff-1) /* min value for an int */ - -#ifdef _LP64 -#define ULONG_MAX 0xffffffffffffffffUL /* max for an unsigned long */ -#define LONG_MAX 0x7fffffffffffffffL /* max for a long */ -#define LONG_MIN (-0x7fffffffffffffffL-1) /* min for a long */ -#else -#define ULONG_MAX 0xffffffffUL /* max value for an unsigned long */ -#define LONG_MAX 0x7fffffffL /* max value for a long */ -#define LONG_MIN (-0x7fffffff-1) /* min value for a long */ -#endif - -#if defined(_ISOC99_SOURCE) || (__STDC_VERSION__ - 0) >= 199901L || \ - defined(_NETBSD_SOURCE) -#define ULLONG_MAX 0xffffffffffffffffULL /* max unsigned long long */ -#define LLONG_MAX 0x7fffffffffffffffLL /* max signed long long */ -#define LLONG_MIN (-0x7fffffffffffffffLL-1) /* min signed long long */ -#endif - -#if defined(_POSIX_C_SOURCE) || defined(_XOPEN_SOURCE) || \ - defined(_NETBSD_SOURCE) -#ifdef _LP64 -#define SSIZE_MAX LONG_MAX /* max value for a ssize_t */ -#else -#define SSIZE_MAX INT_MAX /* max value for a ssize_t */ -#endif - -#if defined(_NETBSD_SOURCE) -#ifdef _LP64 -#define SSIZE_MIN LONG_MIN /* min value for a ssize_t */ -#define SIZE_T_MAX ULONG_MAX /* max value for a size_t */ -#else -#define SSIZE_MIN INT_MIN /* min value for a ssize_t */ -#define SIZE_T_MAX UINT_MAX /* max value for a size_t */ -#endif - -#ifdef _LP64 -/* Quads and longs are the same on LP64. */ -#define UQUAD_MAX (ULONG_MAX) -#define QUAD_MAX (LONG_MAX) -#define QUAD_MIN (LONG_MIN) -#else -/* GCC requires that quad constants be written as expressions. */ -#define UQUAD_MAX ((u_quad_t)0-1) /* max value for a uquad_t */ - /* max value for a quad_t */ -#define QUAD_MAX ((quad_t)(UQUAD_MAX >> 1)) -#define QUAD_MIN (-QUAD_MAX-1) /* min value for a quad_t */ -#endif - -#endif /* _NETBSD_SOURCE */ -#endif /* _POSIX_C_SOURCE || _XOPEN_SOURCE || _NETBSD_SOURCE */ - -#if defined(_XOPEN_SOURCE) || defined(_NETBSD_SOURCE) -#ifdef _LP64 -#define LONG_BIT 64 -#else -#define LONG_BIT 32 -#endif -#define WORD_BIT 32 - -#define DBL_DIG __DBL_DIG__ -#define DBL_MAX __DBL_MAX__ -#define DBL_MIN __DBL_MIN__ - -#define FLT_DIG __FLT_DIG__ -#define FLT_MAX __FLT_MAX__ -#define FLT_MIN __FLT_MIN__ -#endif - -#endif /* _POWERPC_LIMITS_H_ */ -\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/powerpc/mcontext.h b/lib/libc/include/generic-netbsd/powerpc/mcontext.h @@ -1,188 +0,0 @@ -/* $NetBSD: mcontext.h,v 1.22 2020/10/04 10:34:18 rin Exp $ */ - -/*- - * Copyright (c) 2001 The NetBSD Foundation, Inc. - * All rights reserved. - * - * This code is derived from software contributed to The NetBSD Foundation - * by Klaus Klein. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _POWERPC_MCONTEXT_H_ -#define _POWERPC_MCONTEXT_H_ - -/* - * Layout of mcontext_t based on the System V Application Binary Interface, - * Edition 4.1, PowerPC Processor ABI Supplement - September 1995, and - * extended for the AltiVec Register File. Note that due to the increased - * alignment requirements of the latter, the offset of mcontext_t within - * an ucontext_t is different from System V. - */ - -#define _NGREG 39 /* GR0-31, CR, LR, SRR0, SRR1, CTR, XER, MQ */ - -typedef long __greg_t; -typedef __greg_t __gregset_t[_NGREG]; - -#define _REG_R0 0 -#define _REG_R1 1 -#define _REG_R2 2 -#define _REG_R3 3 -#define _REG_R4 4 -#define _REG_R5 5 -#define _REG_R6 6 -#define _REG_R7 7 -#define _REG_R8 8 -#define _REG_R9 9 -#define _REG_R10 10 -#define _REG_R11 11 -#define _REG_R12 12 -#define _REG_R13 13 -#define _REG_R14 14 -#define _REG_R15 15 -#define _REG_R16 16 -#define _REG_R17 17 -#define _REG_R18 18 -#define _REG_R19 19 -#define _REG_R20 20 -#define _REG_R21 21 -#define _REG_R22 22 -#define _REG_R23 23 -#define _REG_R24 24 -#define _REG_R25 25 -#define _REG_R26 26 -#define _REG_R27 27 -#define _REG_R28 28 -#define _REG_R29 29 -#define _REG_R30 30 -#define _REG_R31 31 -#define _REG_CR 32 /* Condition Register */ -#define _REG_LR 33 /* Link Register */ -#define _REG_PC 34 /* PC (copy of SRR0) */ -#define _REG_MSR 35 /* MSR (copy of SRR1) */ -#define _REG_CTR 36 /* Count Register */ -#define _REG_XER 37 /* Integer Exception Register */ -#define _REG_MQ 38 /* MQ Register (POWER only) */ - -typedef struct { -#ifdef _KERNEL - unsigned long long __fpu_regs[32]; /* FP0-31 */ -#else - double __fpu_regs[32]; /* FP0-31 */ -#endif - unsigned int __fpu_fpscr; /* FP Status and Control Register */ - unsigned int __fpu_valid; /* Set together with _UC_FPU */ -} __fpregset_t; - -#define _NVR 32 /* Number of Vector registers */ - -typedef struct { - union __vr { - unsigned char __vr8[16]; - unsigned short __vr16[8]; - unsigned int __vr32[4]; - unsigned char __spe8[8]; - unsigned short __spe16[4]; - unsigned int __spe32[2]; - } __vrs[_NVR] __aligned(16); - unsigned int __vscr; /* VSCR */ - unsigned int __vrsave; /* VRSAVE */ -} __vrf_t; - -typedef struct { - __gregset_t __gregs; /* General Purpose Register set */ - __fpregset_t __fpregs; /* Floating Point Register set */ - __vrf_t __vrf; /* Vector Register File */ -} mcontext_t; - -#if defined(_LP64) -typedef int __greg32_t; -typedef __greg32_t __gregset32_t[_NGREG]; - -typedef struct { - __gregset32_t __gregs; /* General Purpose Register set */ - __fpregset_t __fpregs; /* Floating Point Register set */ - __vrf_t __vrf; /* Vector Register File */ -} mcontext32_t; -#endif - -/* Machine-dependent uc_flags */ -#define _UC_POWERPC_VEC 0x00010000 /* Vector Register File valid */ -#define _UC_POWERPC_SPE 0x00020000 /* Vector Register File valid */ -#define _UC_TLSBASE 0x00080000 /* thread context valid in R2 */ -#define _UC_SETSTACK 0x00100000 -#define _UC_CLRSTACK 0x00200000 - -#define _UC_MACHINE_SP(uc) ((uc)->uc_mcontext.__gregs[_REG_R1]) -#define _UC_MACHINE_FP(uc) ((uc)->uc_mcontext.__gregs[_REG_R31]) -#define _UC_MACHINE_PC(uc) ((uc)->uc_mcontext.__gregs[_REG_PC]) -#define _UC_MACHINE_INTRV(uc) ((uc)->uc_mcontext.__gregs[_REG_R3]) - -#define _UC_MACHINE_SET_PC(uc, pc) _UC_MACHINE_PC(uc) = (pc) - -#if defined(_RTLD_SOURCE) || defined(_LIBC_SOURCE) || defined(__LIBPTHREAD_SOURCE__) -#include <sys/tls.h> - -/* - * On PowerPC, since displacements are signed 16-bit values, the TCB Pointer - * is biased by 0x7000 + sizeof(tcb) so that first thread datum can be - * addressed by -28672 thereby leaving 60KB available for use as thread data. - */ -#define TLS_TP_OFFSET 0x7000 -#define TLS_DTV_OFFSET 0x8000 -__CTASSERT(TLS_TP_OFFSET + sizeof(struct tls_tcb) < 0x8000); - -__BEGIN_DECLS - -static __inline void * -__lwp_gettcb_fast(void) -{ - void *__tcb; - - __asm __volatile( - "addi %[__tcb],%%r2,%[__offset]" - : [__tcb] "=r" (__tcb) - : [__offset] "n" (-(TLS_TP_OFFSET + sizeof(struct tls_tcb)))); - - return __tcb; -} - -void _lwp_setprivate(void *); - -static __inline void -__lwp_settcb(void *__tcb) -{ - __tcb = (uint8_t *)__tcb + TLS_TP_OFFSET + sizeof(struct tls_tcb); - - __asm __volatile( - "mr %%r2,%[__tcb]" - : - : [__tcb] "r" (__tcb)); - - _lwp_setprivate(__tcb); -} -__END_DECLS -#endif /* _RTLD_SOURCE || _LIBC_SOURCE || __LIBPTHREAD_SOURCE__ */ - -#endif /* !_POWERPC_MCONTEXT_H_ */ -\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/powerpc/mutex.h b/lib/libc/include/generic-netbsd/powerpc/mutex.h @@ -1,73 +0,0 @@ -/* $NetBSD: mutex.h,v 1.6.26.1 2023/08/09 17:42:01 martin Exp $ */ - -/*- - * Copyright (c) 2002, 2007 The NetBSD Foundation, Inc. - * All rights reserved. - * - * This code is derived from software contributed to The NetBSD Foundation - * by Jason R. Thorpe and Andrew Doran. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _POWERPC_MUTEX_H_ -#define _POWERPC_MUTEX_H_ - -#include <sys/types.h> - -#ifdef __MUTEX_PRIVATE -#include <sys/intr.h> -#include <machine/intr.h> -#endif - -struct kmutex { - union { -#ifdef __MUTEX_PRIVATE - struct { - volatile uintptr_t mtxm_owner; - ipl_cookie_t mtxm_ipl; - __cpu_simple_lock_t mtxm_lock; - } m; -#endif - struct { - uintptr_t mtxp_a; - uint32_t mtxp_b[2]; - } p; - } u; -}; - -#ifdef __MUTEX_PRIVATE - -#define mtx_owner u.m.mtxm_owner -#define mtx_ipl u.m.mtxm_ipl -#define mtx_lock u.m.mtxm_lock - -#define __HAVE_SIMPLE_MUTEXES 1 -#define __HAVE_MUTEX_STUBS 1 - -#define MUTEX_CAS(p, o, n) _lock_cas((p), (o), (n)) - -int _lock_cas(volatile uintptr_t *, uintptr_t, uintptr_t); - -#endif /* __MUTEX_PRIVATE */ - -#endif /* _POWERPC_MUTEX_H_ */ -\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/powerpc/oea/hid.h b/lib/libc/include/generic-netbsd/powerpc/oea/hid.h @@ -1,193 +0,0 @@ -/* $NetBSD: hid.h,v 1.13.20.1 2024/02/03 11:47:07 martin Exp $ */ - -/*- - * Copyright (c) 2000 Tsubai Masanari. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _POWERPC_OEA_HID_H_ -#define _POWERPC_OEA_HID_H_ - -#ifdef _KERNEL_OPT -#include "opt_ppcarch.h" -#endif - -/* Hardware Implementation Dependent registers for the PowerPC */ - -#if defined(_ARCH_PPC64) || defined (PPC_OEA64_BRIDGE) -/* this way we can use the same bit numbers as IBM's PowerPC manuals */ -#define HIDBIT(x) (0x8000000000000000LL >> x) -#define HID0_64_ONE_PPC HIDBIT(0) /* one instruction per dispatch group */ -#define HID0_64_DO_SNGL HIDBIT(1) /* single group completion mode */ -#define HID0_64_ISYNCSC HIDBIT(2) /* Disable isync scoreboard optimization */ -#define HID0_64_SER_GP HIDBIT(3) /* Serialize group dispatch */ -#define HID0_64_DEEPNAP HIDBIT(7) /* Enable deep nap mode (970) */ -#define HID0_64_DOZE HIDBIT(8) /* Enable doze mode */ -#define HID0_64_NAP HIDBIT(9) /* Enable nap mode */ -#define HID0_64_DPM HIDBIT(11) /* Enable Dynamic power management */ -#define HID0_64_TG HIDBIT(13) /* Perfmon threshold granularity control */ -#define HID0_64_HNG_DIS HIDBIT(14) /* Disable processor hang-detection */ -#define HID0_64_NHR HIDBIT(15) /* No Hard Reset */ -#define HID0_64_INORDER HIDBIT(16) /* Serialized group issue mode */ -#define HID0_64_TB_CTRL HIDBIT(18) /* TB keeps running if CPU stopped */ -#define HID0_64_EX_TBEN HIDBIT(19) /* timebase runs at external clock */ -#define HID0_64_CIABREN HIDBIT(22) /* enable CIABR register */ -#define HID0_64_HDICEEN HIDBIT(23) /* hypervisor decrementer enable */ -#define HID0_64_EN_ATTN HIDBIT(31) /* support processor attention inst. */ -#define HID0_64_EN_MCHK HIDBIT(32) /* ext. mchk interrupts */ -#endif -#define HID0_EMCP 0x80000000 /* Enable MCP */ -#define HID0_DBP 0x40000000 /* Disable 60x bus parity generation */ -#define HID0_EBA 0x20000000 /* Enable 60x bus address parity checking */ -#define HID0_EBD 0x10000000 /* Enable 60x bus data parity checking */ -#define HID0_BCLK 0x08000000 /* CLK_OUT clock type selection */ -#define HID0_EICE 0x04000000 /* Enable ICE output */ -#define HID0_TBEN 0x04000000 /* Time base enable (7450) */ -#define HID0_ECLK 0x02000000 /* CLK_OUT clock type selection */ -#define HID0_PAR 0x01000000 /* Disable precharge of ARTRY */ -#define HID0_STEN 0x01000000 /* Software table search enable (7450) */ -#define HID0_DOZE 0x00800000 /* Enable doze mode */ -#define HID0_HIGH_BAT_EN 0x00800000 /* Enable additional BATs (74[45][578]) */ -#define HID0_NAP 0x00400000 /* Enable nap mode */ -#define HID0_SLEEP 0x00200000 /* Enable sleep mode */ -#define HID0_DPM 0x00100000 /* Enable Dynamic power management */ -#define HID0_RISEG 0x00080000 /* Read I-SEG */ -#define HID0_BHTCLR 0x00040000 /* Clear branch history table (7450) */ -#define HID0_EIEC 0x00040000 /* Enable internal error checking */ -#define HID0_XAEN 0x00020000 /* Enable eXtended Addressing (7450) */ -#define HID0_NHR 0x00010000 /* Not hard reset */ -#define HID0_ICE 0x00008000 /* Enable i-cache */ -#define HID0_DCE 0x00004000 /* Enable d-cache */ -#define HID0_ILOCK 0x00002000 /* i-cache lock */ -#define HID0_DLOCK 0x00001000 /* d-cache lock */ -#define HID0_ICFI 0x00000800 /* i-cache flash invalidate */ -#define HID0_DCFI 0x00000400 /* d-cache flash invalidate */ -#define HID0_SPD 0x00000200 /* Disable speculative cache access */ -#define HID0_IFEM 0x00000100 /* Enable M-bit for I-fetch */ -#define HID0_XBSEN 0x00000100 /* Extended BAT block size enable (7455+) */ -#define HID0_SGE 0x00000080 /* Enable store gathering */ -#define HID0_DCFA 0x00000040 /* Data cache flush assist */ -#define HID0_BTIC 0x00000020 /* Enable BTIC */ -#define HID0_LRSTK 0x00000010 /* Link register stack enable (7450) */ -#define HID0_ABE 0x00000008 /* Enable address broadcast */ -#define HID0_FOLD 0x00000008 /* Branch folding enable (7450) */ -#define HID0_BHT 0x00000004 /* Enable branch history table */ -#define HID0_BTCD 0x00000002 /* Branch target addr cache disable (604) */ -#define HID0_NOPTI 0x00000001 /* No-op the dcbt(st) */ - -#define HID0_BITMASK "\020" \ - "\040EMCP\037DBP\036EBA\035EBD\034BCLK\033EICE\032ECLK\031PAR" \ - "\030DOZE\027NAP\026SLEEP\025DPM\024RISEG\023EIEC\022res\021NHR" \ - "\020ICE\017DCE\016ILOCK\015DLOCK\014ICFI\013DCFI\012SPD\011IFEM" \ - "\010SGE\007DCFA\006BTIC\005FBIOB\004ABE\003BHT\002NOPDST\001NOPTI" - -#define HID0_7450_BITMASK "\020" \ - "\040EMCP\037b1\036b2\035b3\034b4\033TBEN\032b6\031STEN" \ - "\030HIGH_BAT_EN\027NAP\026SLEEP\025DPM\024b12\023BHTCLR\022XAEN\021NHR" \ - "\020ICE\017DCE\016ILOCK\015DLOCK\014ICFI\013DCFI\012SPD\011XBSEN" \ - "\010SGE\007b25\006BTIC\005LRSTK\004FOLD\003BHT\002NOPDST\001NOPTI" - -#define HID0_970_BITMASK "\020" \ - "\040EMCP" - -#define HID0_970_BITMASK_U "\020" \ - "\040ONEPPC\036DOSNGL\036ISYNCSC\035SERGP\034res\033res\032res\031DEEPNAP" \ - "\030DOZE\027NAP\026res\025DPM\024res\023TG\022HNGDIS\021NHR" \ - "\020INORDER\017res\016TBCTRL\015EXTBEN\014res\013res\012CIABREN\011HDICEEN" \ - "\001ENATTN" -/* - * HID0 bit definitions per CPU model - * - * bit 603 604 750 7400 7410 7450 - * 0 EMCP EMCP EMCP EMCP EMCP - - * 1 - ECP DBP - - - - * 2 EBA EBA EBA EBA EDA - - * 3 EBD EBD EBD EBD EBD - - * 4 SBCLK - BCLK BCKL BCLK - - * 5 EICE - - - - TBEN - * 6 ECLK - ECLK ECLK ECLK - - * 7 PAR PAR PAR PAR PAR STEN - * 8 DOZE - DOZE DOZE DOZE HIGH_BAT_EN - * 9 NAP - NAP NAP NAP NAP - * 10 SLEEP - SLEEP SLEEP SLEEP SLEEP - * 11 DPM - DPM DPM DPM DPM - * 12 RISEG - - RISEG - - - * 13 - - - EIEC EIEC BHTCLR - * 14 - - - - - XAEN - * 15 - NHR NHR NHR NHR NHR - * 16 ICE ICE ICE ICE ICE ICE - * 17 DCE DCE DCE DCE DCE DCE - * 18 ILOCK ILOCK ILOCK ILOCK ILOCK ILOCK - * 19 DLOCK DLOCK DLOCK DLOCK DLOCK DLOCK - * 20 ICFI ICFI ICFI ICFI ICFI ICFI - * 21 DCFI DCFI DCFI DCFI DCFI DCFI - * 22 - - SPD SPD SPG SPD - * 23 - - IFEM IFTT IFTT XBSEN - * 24 - SIE SGE SGE SGE SGE - * 25 - - DCFA DCFA DCFA - - * 26 - - BTIC BTIC BTIC BTIC - * 27 FBIOB - - - - LRSTK - * 28 - - ABE - - FOLD - * 29 - BHT BHT BHT BHT BHT - * 30 - BTCD - NOPDST NOPDST NOPDST - * 31 NOOPTI - NOOPTI NOPTI NOPTI NOPTI - * - * 604: ECP = Enable cache parity checking - * 604: SIE = Serial instruction execution disable - * 604: BTCD = Branch target address cache disable - * 7450: TBEN = Time Base Enable - * 7450: STEN = Software table lookup enable - * 7450: BHTCLR = Branch history clear - * 7450: LRSTK = Link Register Stack Enable - * 7450: FOLD = Branch folding enable - */ - -#define HID1_EMCP 0x80000000 /* Machine Check Signal Enable */ -#define HID1_EBA 0x20000000 /* Enable/Disable 60x/MPX Bus Address - Parity Checking */ -#define HID1_EBD 0x10000000 /* Enable/Disable 60x/MPX Bus Data - Parity Checking */ -#define HID1_BCLK 0x08000000 /* CLK_OUT */ -#define HID1_ECLK 0x02000000 /* CLK_OUT */ -#define HID1_PAR 0x01000000 /* Disable Precharge for ... */ -#define HID1_DFS4 0x00800000 /* Dynamic Freq Switch / 4 (7448) */ -#define HID1_DFS2 0x00400000 /* Dynamic Freq Switch / 2 (7447A) */ -#define HID1_SYNCBE 0x00000800 /* Enable sync/eieio broadcast */ -#define HID1_ABE 0x00000400 /* Enable address broadcast */ - -/* PPC970 HID4 */ -#define HID4_RMLR0 0x0000000000000020 /* real mode limit bit 0 */ -#define HID4_RMLR1 0x4000000000000000 /* real mode limit bit 1 */ -#define HID4_RMLR2 0x2000000000000000 /* real mode limit bit 2 */ -/* - * real mode limit bits 012 - * 011 - 64MB - * 111 - 128MB - * 100 - 256MB - * x10 - 1GB - * x01 - 16GB - * 000 - 256GB - */ - -#endif /* _POWERPC_OEA_HID_H_ */ -\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/powerpc/oea/pmap.h b/lib/libc/include/generic-netbsd/powerpc/oea/pmap.h @@ -1,292 +0,0 @@ -/* $NetBSD: pmap.h,v 1.37.4.1 2023/12/29 20:21:39 martin Exp $ */ - -/*- - * Copyright (C) 1995, 1996 Wolfgang Solfrank. - * Copyright (C) 1995, 1996 TooLs GmbH. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by TooLs GmbH. - * 4. The name of TooLs GmbH may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _POWERPC_OEA_PMAP_H_ -#define _POWERPC_OEA_PMAP_H_ - -#ifdef _LOCORE -#error use assym.h instead -#endif - -#ifdef _MODULE -#error this file should not be included by loadable kernel modules -#endif - -#ifdef _KERNEL_OPT -#include "opt_ppcarch.h" -#include "opt_modular.h" -#endif -#include <powerpc/oea/pte.h> - -#define __HAVE_PMAP_PV_TRACK -#include <uvm/pmap/pmap_pvt.h> - -/* - * Pmap stuff - */ -struct pmap { -#ifdef PPC_OEA64 - struct steg *pm_steg_table; /* segment table pointer */ - /* XXX need way to track exec pages */ -#endif - -#if defined(PPC_OEA) || defined (PPC_OEA64_BRIDGE) - register_t pm_sr[16]; /* segments used in this pmap */ - int pm_exec[16]; /* counts of exec mappings */ -#endif - register_t pm_vsid; /* VSID bits */ - int pm_refs; /* ref count */ - struct pmap_statistics pm_stats; /* pmap statistics */ - unsigned int pm_evictions; /* pvo's not in page table */ - -#ifdef PPC_OEA64 - unsigned int pm_ste_evictions; -#endif -}; - -struct pmap_ops { - int (*pmapop_pte_spill)(struct pmap *, vaddr_t, bool); - void (*pmapop_real_memory)(paddr_t *, psize_t *); - void (*pmapop_init)(void); - void (*pmapop_virtual_space)(vaddr_t *, vaddr_t *); - pmap_t (*pmapop_create)(void); - void (*pmapop_reference)(pmap_t); - void (*pmapop_destroy)(pmap_t); - void (*pmapop_copy)(pmap_t, pmap_t, vaddr_t, vsize_t, vaddr_t); - void (*pmapop_update)(pmap_t); - int (*pmapop_enter)(pmap_t, vaddr_t, paddr_t, vm_prot_t, u_int); - void (*pmapop_remove)(pmap_t, vaddr_t, vaddr_t); - void (*pmapop_kenter_pa)(vaddr_t, paddr_t, vm_prot_t, u_int); - void (*pmapop_kremove)(vaddr_t, vsize_t); - bool (*pmapop_extract)(pmap_t, vaddr_t, paddr_t *); - - void (*pmapop_protect)(pmap_t, vaddr_t, vaddr_t, vm_prot_t); - void (*pmapop_unwire)(pmap_t, vaddr_t); - void (*pmapop_page_protect)(struct vm_page *, vm_prot_t); - void (*pmapop_pv_protect)(paddr_t, vm_prot_t); - bool (*pmapop_query_bit)(struct vm_page *, int); - bool (*pmapop_clear_bit)(struct vm_page *, int); - - void (*pmapop_activate)(struct lwp *); - void (*pmapop_deactivate)(struct lwp *); - - void (*pmapop_pinit)(pmap_t); - void (*pmapop_procwr)(struct proc *, vaddr_t, size_t); - - void (*pmapop_pte_print)(volatile struct pte *); - void (*pmapop_pteg_check)(void); - void (*pmapop_print_mmuregs)(void); - void (*pmapop_print_pte)(pmap_t, vaddr_t); - void (*pmapop_pteg_dist)(void); - void (*pmapop_pvo_verify)(void); - vaddr_t (*pmapop_steal_memory)(vsize_t, vaddr_t *, vaddr_t *); - void (*pmapop_bootstrap)(paddr_t, paddr_t); - void (*pmapop_bootstrap1)(paddr_t, paddr_t); - void (*pmapop_bootstrap2)(void); -}; - -#ifdef _KERNEL -#include <sys/cdefs.h> -__BEGIN_DECLS -#include <sys/param.h> -#include <sys/systm.h> - -/* - * For OEA and OEA64_BRIDGE, we guarantee that pa below USER_ADDR - * (== 3GB < VM_MIN_KERNEL_ADDRESS) is direct-mapped. - */ -#if defined(PPC_OEA) || defined(PPC_OEA64_BRIDGE) -#define PMAP_DIRECT_MAPPED_SR (USER_SR - 1) -#define PMAP_DIRECT_MAPPED_LEN \ - ((vaddr_t)SEGMENT_LENGTH * (PMAP_DIRECT_MAPPED_SR + 1)) -#endif - -#if defined (PPC_OEA) || defined (PPC_OEA64_BRIDGE) -extern register_t iosrtable[]; -#endif -extern int pmap_use_altivec; - -#define pmap_clear_modify(pg) (pmap_clear_bit((pg), PTE_CHG)) -#define pmap_clear_reference(pg) (pmap_clear_bit((pg), PTE_REF)) -#define pmap_is_modified(pg) (pmap_query_bit((pg), PTE_CHG)) -#define pmap_is_referenced(pg) (pmap_query_bit((pg), PTE_REF)) - -#define pmap_resident_count(pmap) ((pmap)->pm_stats.resident_count) -#define pmap_wired_count(pmap) ((pmap)->pm_stats.wired_count) - -/* ARGSUSED */ -static __inline bool -pmap_remove_all(struct pmap *pmap) -{ - /* Nothing. */ - return false; -} - -#if (defined(PPC_OEA) + defined(PPC_OEA64) + defined(PPC_OEA64_BRIDGE)) != 1 -#define PMAP_NEEDS_FIXUP -#endif - -extern volatile struct pteg *pmap_pteg_table; -extern unsigned int pmap_pteg_cnt; -extern unsigned int pmap_pteg_mask; - -void pmap_bootstrap(vaddr_t, vaddr_t); -void pmap_bootstrap1(vaddr_t, vaddr_t); -void pmap_bootstrap2(void); -bool pmap_extract(pmap_t, vaddr_t, paddr_t *); -bool pmap_query_bit(struct vm_page *, int); -bool pmap_clear_bit(struct vm_page *, int); -void pmap_real_memory(paddr_t *, psize_t *); -void pmap_procwr(struct proc *, vaddr_t, size_t); -int pmap_pte_spill(pmap_t, vaddr_t, bool); -int pmap_ste_spill(pmap_t, vaddr_t, bool); -void pmap_pinit(pmap_t); - -#ifdef PPC_OEA601 -bool pmap_extract_ioseg601(vaddr_t, paddr_t *); -#endif /* PPC_OEA601 */ -#ifdef PPC_OEA -bool pmap_extract_battable(vaddr_t, paddr_t *); -#endif /* PPC_OEA */ - -u_int powerpc_mmap_flags(paddr_t); -#define POWERPC_MMAP_FLAG_MASK 0xf -#define POWERPC_MMAP_FLAG_PREFETCHABLE 0x1 -#define POWERPC_MMAP_FLAG_CACHEABLE 0x2 - -#define pmap_phys_address(ppn) (ppn & ~POWERPC_MMAP_FLAG_MASK) -#define pmap_mmap_flags(ppn) powerpc_mmap_flags(ppn) - -static __inline paddr_t vtophys (vaddr_t); - -/* - * Alternate mapping hooks for pool pages. Avoids thrashing the TLB. - * - * Note: This won't work if we have more memory than can be direct-mapped - * VA==PA all at once. But pmap_copy_page() and pmap_zero_page() will have - * this problem, too. - */ -#if !defined(PPC_OEA64) -#define PMAP_MAP_POOLPAGE(pa) (pa) -#define PMAP_UNMAP_POOLPAGE(pa) (pa) -#define POOL_VTOPHYS(va) vtophys((vaddr_t) va) - -#define PMAP_ALLOC_POOLPAGE(flags) pmap_alloc_poolpage(flags) -struct vm_page *pmap_alloc_poolpage(int); -#endif - -static __inline paddr_t -vtophys(vaddr_t va) -{ - paddr_t pa; - - if (pmap_extract(pmap_kernel(), va, &pa)) - return pa; - KASSERTMSG(0, "vtophys: pmap_extract of %#"PRIxVADDR" failed", va); - return (paddr_t) -1; -} - - -#ifdef PMAP_NEEDS_FIXUP -extern const struct pmap_ops *pmapops; -extern const struct pmap_ops pmap32_ops; -extern const struct pmap_ops pmap64_ops; -extern const struct pmap_ops pmap64bridge_ops; - -static __inline void -pmap_setup32(void) -{ - pmapops = &pmap32_ops; -} - -static __inline void -pmap_setup64(void) -{ - pmapops = &pmap64_ops; -} - -static __inline void -pmap_setup64bridge(void) -{ - pmapops = &pmap64bridge_ops; -} -#endif - -bool pmap_pageidlezero (paddr_t); -void pmap_syncicache (paddr_t, psize_t); -#ifdef PPC_OEA64 -vaddr_t pmap_setusr (vaddr_t); -vaddr_t pmap_unsetusr (void); -#endif - -#ifdef PPC_OEA64_BRIDGE -int pmap_setup_segment0_map(int use_large_pages, ...); -#endif - -#define PMAP_MD_PREFETCHABLE 0x2000000 -#define PMAP_STEAL_MEMORY -#define PMAP_NEED_PROCWR - -void pmap_zero_page(paddr_t); -void pmap_copy_page(paddr_t, paddr_t); - -LIST_HEAD(pvo_head, pvo_entry); - -#define __HAVE_VM_PAGE_MD - -struct pmap_page { - unsigned int pp_attrs; - struct pvo_head pp_pvoh; -#ifdef MODULAR - uintptr_t pp_dummy[3]; -#endif -}; - -struct vm_page_md { - struct pmap_page mdpg_pp; -#define mdpg_attrs mdpg_pp.pp_attrs -#define mdpg_pvoh mdpg_pp.pp_pvoh -#ifdef MODULAR -#define mdpg_dummy mdpg_pp.pp_dummy -#endif -}; - -#define VM_MDPAGE_INIT(pg) do { \ - (pg)->mdpage.mdpg_attrs = 0; \ - LIST_INIT(&(pg)->mdpage.mdpg_pvoh); \ -} while (/*CONSTCOND*/0) - -__END_DECLS -#endif /* _KERNEL */ - -#endif /* _POWERPC_OEA_PMAP_H_ */ -\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/powerpc/pmap.h b/lib/libc/include/generic-netbsd/powerpc/pmap.h @@ -1,57 +0,0 @@ -/* $NetBSD: pmap.h,v 1.42.4.1 2023/12/29 20:21:39 martin Exp $ */ - -#ifndef _POWERPC_PMAP_H_ -#define _POWERPC_PMAP_H_ - -#ifdef _KERNEL_OPT -#include "opt_ppcarch.h" -#include "opt_modular.h" -#endif - -#if !defined(_MODULE) - -#if defined(PPC_BOOKE) -#include <powerpc/booke/pmap.h> -#elif defined(PPC_IBM4XX) -#include <powerpc/ibm4xx/pmap.h> -#elif defined(PPC_OEA) || defined (PPC_OEA64) || defined (PPC_OEA64_BRIDGE) -#include <powerpc/oea/pmap.h> -#elif defined(_KERNEL) -#error unknown PPC variant -#endif - -#ifndef PMAP_DIRECT_MAPPED_LEN -#define PMAP_DIRECT_MAPPED_LEN (~0UL) -#endif - -#endif /* !_MODULE */ - -#if !defined(_LOCORE) && (defined(MODULAR) || defined(_MODULE)) -/* - * Both BOOKE and OEA use __HAVE_VM_PAGE_MD but IBM4XX doesn't so define - * a compatible vm_page_md so that struct vm_page is the same size for all - * PPC variants. - */ -#ifndef __HAVE_VM_PAGE_MD -#define __HAVE_VM_PAGE_MD -#define VM_MDPAGE_INIT(pg) __nothing - -struct vm_page_md { - uintptr_t mdpg_dummy[5]; -}; -#endif /* !__HAVE_VM_PAGE_MD */ - -__CTASSERT(sizeof(struct vm_page_md) == sizeof(uintptr_t)*5); - -#ifndef __HAVE_PMAP_PV_TRACK -/* - * We need empty stubs for modules shared with all sub-archs. - */ -#define __HAVE_PMAP_PV_TRACK -#define PMAP_PV_TRACK_ONLY_STUBS -#include <uvm/pmap/pmap_pvt.h> -#endif /* !__HAVE_PMAP_PV_TRACK */ - -#endif /* !LOCORE && (MODULAR || _MODULE) */ - -#endif /* !_POWERPC_PMAP_H_ */ -\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/powerpc/psl.h b/lib/libc/include/generic-netbsd/powerpc/psl.h @@ -1,131 +0,0 @@ -/* $NetBSD: psl.h,v 1.22 2021/03/06 08:08:19 rin Exp $ */ - -/* - * Copyright (C) 1995, 1996 Wolfgang Solfrank. - * Copyright (C) 1995, 1996 TooLs GmbH. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by TooLs GmbH. - * 4. The name of TooLs GmbH may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _POWERPC_PSL_H_ -#define _POWERPC_PSL_H_ - -/* - * Machine State Register (MSR) - * - * The PowerPC 601 does not implement the following bits: - * - * VEC, POW, ILE, BE, RI, LE[*] - * - * [*] Little-endian mode on the 601 is implemented in the HID0 register. - */ -#define PSL_VEC 0x02000000 /* ..6. AltiVec vector unit available */ -#define PSL_SPV 0x02000000 /* B... (e500) SPE enable */ -#define PSL_UCLE 0x00400000 /* B... user-mode cache lock enable */ -#define PSL_POW 0x00040000 /* ..6. power management */ -#define PSL_WE PSL_POW /* B4.. wait state enable */ -#define PSL_TGPR 0x00020000 /* ..6. temp. gpr remapping (mpc603e) */ -#define PSL_CE PSL_TGPR /* B4.. critical interrupt enable */ -#define PSL_ILE 0x00010000 /* ..6. interrupt endian mode (1 == le) */ -#define PSL_EE 0x00008000 /* B468 external interrupt enable */ -#define PSL_PR 0x00004000 /* B468 privilege mode (1 == user) */ -#define PSL_FP 0x00002000 /* B.6. floating point enable */ -#define PSL_ME 0x00001000 /* B468 machine check enable */ -#define PSL_FE0 0x00000800 /* B.6. floating point mode 0 */ -#define PSL_SE 0x00000400 /* ..6. single-step trace enable */ -#define PSL_DWE PSL_SE /* .4.. debug wait enable */ -#define PSL_UBLE PSL_SE /* B... user BTB lock enable */ -#define PSL_BE 0x00000200 /* ..6. branch trace enable */ -#define PSL_DE PSL_BE /* B4.. debug interrupt enable */ -#define PSL_FE1 0x00000100 /* B.6. floating point mode 1 */ -#define PSL_IP 0x00000040 /* ..6. interrupt prefix */ -#define PSL_IR 0x00000020 /* .468 instruction address relocation */ -#define PSL_IS PSL_IR /* B... instruction address space */ -#define PSL_DR 0x00000010 /* .468 data address relocation */ -#define PSL_DS PSL_DR /* B... data address space */ -#define PSL_PM 0x00000008 /* ..6. Performance monitor */ -#define PSL_PMM PSL_PM /* B... Performance monitor */ -#define PSL_RI 0x00000002 /* ..6. recoverable interrupt */ -#define PSL_LE 0x00000001 /* ..6. endian mode (1 == le) */ - -#define PSL_601_MASK ~(PSL_VEC|PSL_POW|PSL_ILE|PSL_BE|PSL_RI|PSL_LE) - -/* The IBM 970 series does not implemnt LE mode */ -#define PSL_970_MASK ~(PSL_ILE|PSL_LE) - -/* - * Floating-point exception modes: - */ -#define PSL_FE_DIS 0 /* none */ -#define PSL_FE_NONREC PSL_FE1 /* imprecise non-recoverable */ -#define PSL_FE_REC PSL_FE0 /* imprecise recoverable */ -#define PSL_FE_PREC (PSL_FE0 | PSL_FE1) /* precise */ -#define PSL_FE_DFLT PSL_FE_DIS /* default == none */ - -/* - * Note that PSL_POW and PSL_ILE are not in the saved copy of the MSR - */ -#define PSL_MBO 0 -#define PSL_MBZ 0 - -/* - * A user is not allowed to change any MSR bits except the following: - * We restrict the test to the low 16 bits of the MSR since those are the - * only ones preserved in the trap. Note that this means PSL_VEC needs to - * be restored to SRR1 in userret. - */ -#if defined(_KERNEL) && !defined(_LOCORE) -#ifdef _KERNEL_OPT -#include "opt_ppcarch.h" -#endif /* _KERNEL_OPT */ - -#if defined(PPC_OEA) || defined (PPC_OEA64_BRIDGE) || defined (PPC_OEA64) \ - || defined(_MODULE) -extern register_t cpu_psluserset, cpu_pslusermod, cpu_pslusermask; - -#define PSL_USERSET cpu_psluserset -#define PSL_USERMOD cpu_pslusermod -#define PSL_USERMASK cpu_pslusermask -#elif defined(PPC_BOOKE) -#define PSL_USERSET (PSL_EE | PSL_PR | PSL_IS | PSL_DS | PSL_ME | PSL_CE) -#define PSL_USERMASK (PSL_SPV | PSL_CE | 0xFFFF) -#define PSL_USERMOD (0) -#else /* PPC_IBM4XX */ -#ifdef PPC_IBM403 -#define PSL_USERSET (PSL_EE | PSL_PR | PSL_IR | PSL_DR | PSL_ME) -#else /* Apparently we get unexplained machine checks, so disable them. */ -#define PSL_USERSET (PSL_EE | PSL_PR | PSL_IR | PSL_DR) -#endif -#define PSL_USERMASK 0xFFFF -#define PSL_USERMOD (0) -#endif - -#define PSL_USERSRR1 ((PSL_USERSET|PSL_USERMOD) & PSL_USERMASK) -#define PSL_USEROK_P(psl) (((psl) & ~PSL_USERMOD) == PSL_USERSET) -#endif /* !_LOCORE */ - -#endif /* _POWERPC_PSL_H_ */ -\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/powerpc/vmparam.h b/lib/libc/include/generic-netbsd/powerpc/vmparam.h @@ -1,95 +0,0 @@ -/* $NetBSD: vmparam.h,v 1.26.4.1 2023/12/29 20:21:39 martin Exp $ */ - -#ifndef _POWERPC_VMPARAM_H_ -#define _POWERPC_VMPARAM_H_ - -#ifdef _KERNEL_OPT -#include "opt_modular.h" -#include "opt_ppcarch.h" -#endif - -/* - * These are common for BOOKE, IBM4XX, and OEA - */ -#define VM_FREELIST_DEFAULT 0 -#define VM_FREELIST_DIRECT_MAPPED 1 -#define VM_FREELIST_FIRST16 2 -#define VM_NFREELIST 3 - -#define VM_PHYSSEG_MAX 16 - -/* - * The address to which unspecified mapping requests default - * Put the stack in its own segment and start mmaping at the - * top of the next lower segment. - */ -#define __USE_TOPDOWN_VM -#define VM_DEFAULT_ADDRESS_BOTTOMUP(da, sz) \ - round_page((vaddr_t)(da) + (vsize_t)maxdmap) - -#if defined(MODULAR) || defined(_MODULE) || !defined(_KERNEL) -/* - * If we are a module or a modular kernel, then we need to defined the range - * of our variable page sizes since BOOKE and OEA use 4KB pages while IBM4XX - * use 16KB pages. - * This is also required for userland by jemalloc. - */ -#define MIN_PAGE_SHIFT 12 /* BOOKE/OEA */ -#define MAX_PAGE_SHIFT 14 /* IBM4XX */ -#define MIN_PAGE_SIZE (1 << MIN_PAGE_SHIFT) -#define MAX_PAGE_SIZE (1 << MAX_PAGE_SHIFT) -#endif /* MODULAR || _MODULE || !_KERNEL */ - -#if defined(_MODULE) -#if defined(_RUMPKERNEL) -/* - * Safe definitions for RUMP kernels - */ -#define VM_MAXUSER_ADDRESS 0x7fff8000 -#define VM_MIN_ADDRESS 0x00000000 -#define VM_MAX_ADDRESS VM_MAXUSER_ADDRESS -#define MAXDSIZ (1024*1024*1024) -#define MAXSSIZ (32*1024*1024) -#define MAXTSIZ (256*1024*1024) -#else /* !_RUMPKERNEL */ -/* - * Some modules need some of the constants but those vary between the variants - * so those constants are exported as linker symbols so they don't take up any - * space but also avoid an extra load to put into a register. - */ -extern const char __USRSTACK; /* let the linker resolve it */ - -#define USRSTACK ((vaddr_t)(uintptr_t)&__USRSTACK) -#endif /* !_RUMPKERNEL */ - -#else /* !_MODULE */ - -#if defined(PPC_BOOKE) -#include <powerpc/booke/vmparam.h> -#elif defined(PPC_IBM4XX) -#include <powerpc/ibm4xx/vmparam.h> -#elif defined(PPC_OEA) || defined (PPC_OEA64) || defined (PPC_OEA64_BRIDGE) -#include <powerpc/oea/vmparam.h> -#elif defined(_KERNEL) -#error unknown PPC variant -#endif - -#endif /* !_MODULE */ - -#if defined(MODULAR) || defined(_MODULE) -/* - * If we are a module or support modules, we need to define a compatible - * pmap_physseg since IBM4XX uses one. This will waste a tiny of space - * but is needed for compatibility. - */ -#ifndef __HAVE_PMAP_PHYSSEG -#define __HAVE_PMAP_PHYSSEG -struct pmap_physseg { - uintptr_t pmseg_dummy[2]; -}; -#endif - -__CTASSERT(sizeof(struct pmap_physseg) == sizeof(uintptr_t) * 2); -#endif /* MODULAR || _MODULE */ - -#endif /* !_POWERPC_VMPARAM_H_ */ -\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/prop/prop_object.h b/lib/libc/include/generic-netbsd/prop/prop_object.h @@ -1,7 +1,7 @@ -/* $NetBSD: prop_object.h,v 1.8 2008/12/05 13:11:41 ad Exp $ */ +/* $NetBSD: prop_object.h,v 1.9 2025/04/23 02:58:52 thorpej Exp $ */ /*- - * Copyright (c) 2006 The NetBSD Foundation, Inc. + * Copyright (c) 2006, 2025 The NetBSD Foundation, Inc. * All rights reserved. * * This code is derived from software contributed to The NetBSD Foundation @@ -53,6 +53,11 @@ typedef enum { #endif /* !_PROPLIB_ZFS_CONFLICT */ } prop_type_t; +typedef enum { + PROP_FORMAT_XML = 0, + PROP_FORMAT_JSON = 1 +} prop_format_t; + __BEGIN_DECLS void prop_object_retain(prop_object_t); void prop_object_release(prop_object_t); @@ -60,13 +65,53 @@ void prop_object_release(prop_object_t); prop_type_t prop_object_type(prop_object_t); bool prop_object_equals(prop_object_t, prop_object_t); -bool prop_object_equals_with_error(prop_object_t, prop_object_t, bool *); +bool prop_object_equals_with_error(prop_object_t, prop_object_t, + bool *); typedef struct _prop_object_iterator *prop_object_iterator_t; prop_object_t prop_object_iterator_next(prop_object_iterator_t); void prop_object_iterator_reset(prop_object_iterator_t); void prop_object_iterator_release(prop_object_iterator_t); + +char * prop_object_externalize(prop_object_t); +char * prop_object_externalize_with_format(prop_object_t, + prop_format_t); +bool prop_object_externalize_to_file(prop_object_t, const char *); +bool prop_object_externalize_to_file_with_format(prop_object_t, + const char *, prop_format_t); + +prop_object_t prop_object_internalize(const char *); +prop_object_t prop_object_internalize_from_file(const char *); + +#if defined(__NetBSD__) +struct plistref; + +#if !defined(_KERNEL) && !defined(_STANDALONE) +int prop_object_send_ioctl(prop_object_t, int, + unsigned long); +int prop_object_recv_ioctl(int, unsigned long, + prop_object_t *); +int prop_object_sendrecv_ioctl(prop_object_t, int, + unsigned long, prop_object_t *); +int prop_object_send_syscall(prop_object_t, + struct plistref *); +int prop_object_recv_syscall(const struct plistref *, + prop_object_t *); +#elif defined(_KERNEL) +int prop_object_copyin(const struct plistref *, + prop_object_t *); +int prop_object_copyin_size(const struct plistref *, + prop_object_t *, size_t); +int prop_object_copyout(struct plistref *, prop_object_t); +int prop_object_copyin_ioctl(const struct plistref *, + const u_long, prop_object_t *); +int prop_object_copyin_ioctl_size(const struct plistref *, + const u_long, prop_object_t *, size_t); +int prop_object_copyout_ioctl(struct plistref *, const u_long, + prop_object_t); +#endif +#endif /* __NetBSD__ */ __END_DECLS #endif /* _PROPLIB_PROP_OBJECT_H_ */ \ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/protocols/talkd.h b/lib/libc/include/generic-netbsd/protocols/talkd.h @@ -1,4 +1,4 @@ -/* $NetBSD: talkd.h,v 1.11 2016/01/22 23:11:50 dholland Exp $ */ +/* $NetBSD: talkd.h,v 1.12 2025/07/11 22:19:53 andvar Exp $ */ /* * Copyright (c) 1983, 1993 @@ -87,7 +87,7 @@ typedef struct { typedef struct { unsigned char vers; /* protocol version */ unsigned char type; /* type of request message, see below */ - unsigned char answer; /* respose to request message, see below */ + unsigned char answer; /* response to request message, see below */ unsigned char pad; uint32_t id_num; /* message id */ struct talkd_sockaddr addr; /* address for establishing conversation */ diff --git a/lib/libc/include/generic-netbsd/pthread.h b/lib/libc/include/generic-netbsd/pthread.h @@ -1,4 +1,4 @@ -/* $NetBSD: pthread.h,v 1.41 2018/02/20 05:10:51 kamil Exp $ */ +/* $NetBSD: pthread.h,v 1.41.18.1 2025/11/20 18:46:42 martin Exp $ */ /*- * Copyright (c) 2001 The NetBSD Foundation, Inc. @@ -303,17 +303,21 @@ __END_DECLS * program. This permits code, particularly libraries that do not * directly use threads but want to be thread-safe in the presence of * threaded callers, to use pthread mutexes and the like without - * unnecessairly including libpthread in their linkage. + * unnecessarily including libpthread in their linkage. * - * Left out of this list are functions that can't sensibly be trivial - * or no-op stubs in a single-threaded process (pthread_create, - * pthread_kill, pthread_detach), functions that normally block and - * wait for another thread to do something (pthread_join), and - * functions that don't make sense without the previous functions - * (pthread_attr_*). The pthread_cond_wait and pthread_cond_timedwait - * functions are useful in implementing certain protection mechanisms, - * though a non-buggy app shouldn't end up calling them in - * single-threaded mode. + * A common mistake is to include pthread.h but not link against + * libpthread in applications that create threads. Since threading + * adds substantial overhead to basic libc functionality like stdio, we + * don't want to make libpthread default, but we do want to catch this + * mistake. We catch it by not defining pthread_create in libc or + * renaming it to a stub that is defined in libc by default. + * + * However, some libraries (like openssl libcrypto) will _optionally_ + * create threads in threaded applications. These libraries can + * request the stub by defining _PTHREAD_CREATE_WEAK, so they can be + * used by threaded applications -- which need to link against + * libpthread themselves to avoid runtime errors -- and non-threaded + * applications which don't link against libpthread at all. * * The rename is done as: * #define pthread_foo __libc_foo @@ -331,6 +335,41 @@ __END_DECLS #ifndef __LIBPTHREAD_SOURCE__ __BEGIN_DECLS +int __libc_thr_create(pthread_t * __restrict, + const pthread_attr_t * __restrict, void *(*)(void *), + void * __restrict); +int __libc_thr_detach(pthread_t); +int __libc_thr_join(pthread_t, void **); + +int __libc_thr_attr_init(pthread_attr_t *); +int __libc_thr_attr_setdetachstate(pthread_attr_t *, int); +int __libc_thr_attr_destroy(pthread_attr_t *); +__END_DECLS + +// zig patch: these aliases were added in NetBSD 11.0 +#if __NetBSD_Version__ >= 1100000000 +/* + * If _NETBSD_PTHREAD_CREATE_WEAK is defined, make pthread_create + * expand to a symbol which is defined as a weak alias by libc, so + * libraries can opt into using it for threaded applications without + * requiring non-threaded applications to be linked against libpthread. + * Otherwise, if you include pthread.h _without_ defining + * _NETBSD_PTHREAD_CREATE_WEAK and try to call pthread_create without + * linking against libpthread, the linker will detect this as an error. + */ +#ifdef _NETBSD_PTHREAD_CREATE_WEAK +#define pthread_create __libc_thr_create +#endif + +#define pthread_detach __libc_thr_detach +#define pthread_join __libc_thr_join + +#define pthread_attr_init __libc_thr_attr_init +#define pthread_attr_setdetachstate __libc_thr_attr_setdetachstate +#define pthread_attr_destroy __libc_thr_attr_destroy +#endif + +__BEGIN_DECLS int __libc_mutex_init(pthread_mutex_t * __restrict, const pthread_mutexattr_t * __restrict); int __libc_mutex_lock(pthread_mutex_t *); int __libc_mutex_trylock(pthread_mutex_t *); @@ -422,4 +461,4 @@ __END_DECLS #endif /* __LIBPTHREAD_SOURCE__ */ -#endif /* _LIB_PTHREAD_H */ -\ No newline at end of file +#endif /* _LIB_PTHREAD_H */ diff --git a/lib/libc/include/generic-netbsd/regex.h b/lib/libc/include/generic-netbsd/regex.h @@ -1,4 +1,4 @@ -/* $NetBSD: regex.h,v 1.16 2021/02/23 17:14:42 christos Exp $ */ +/* $NetBSD: regex.h,v 1.17 2024/10/30 15:56:10 riastradh Exp $ */ /*- * Copyright (c) 1992, 1993 @@ -75,6 +75,7 @@ #define _REGEX_H_ #include <sys/cdefs.h> +#include <sys/featuretest.h> #include <sys/types.h> /* types */ diff --git a/lib/libc/include/generic-netbsd/riscv/ansi.h b/lib/libc/include/generic-netbsd/riscv/ansi.h @@ -0,0 +1,3 @@ +/* $NetBSD: ansi.h,v 1.1 2014/09/19 17:36:26 matt Exp $ */ + +#include <sys/common_ansi.h> +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/riscv/aout_machdep.h b/lib/libc/include/generic-netbsd/riscv/aout_machdep.h @@ -0,0 +1,40 @@ +/* $NetBSD: aout_machdep.h,v 1.1 2014/09/19 17:36:26 matt Exp $ */ + +/*- + * Copyright (c) 2014 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Matt Thomas of 3am Software Foundry. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _RISCV_AOUT_MACHDEP_H_ +#define _RISCV_AOUT_MACHDEP_H_ + +#define cpu_exec_aout_makecmds(p, epp) ENOEXEC + +/* Size of a page in an object file. */ +#define AOUT_LDPGSZ 4096 + +#endif /* !_RISCV_AOUT_MACHDEP_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/riscv/asm.h b/lib/libc/include/generic-netbsd/riscv/asm.h @@ -0,0 +1,272 @@ +/* $NetBSD: asm.h,v 1.11.2.1 2026/04/02 15:59:59 martin Exp $ */ + +/*- + * Copyright (c) 2014 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Matt Thomas of 3am Software Foundry. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _RISCV_ASM_H +#define _RISCV_ASM_H + +#define _C_LABEL(x) x + +#define __CONCAT(x,y) x ## y +#define __STRING(x) #x + +#define ___CONCAT(x,y) __CONCAT(x,y) + +/* + * Define -pg profile entry code. + */ +#define _KERN_MCOUNT \ + addi sp, sp, -CALLFRAME_SIZ; \ + REG_S ra, CALLFRAME_RA(sp); \ + REG_S a0, CALLFRAME_S1(sp); \ + mv a0, ra; \ + call PLT(_mcount); \ + REG_L ra, CALLFRAME_RA(sp); \ + REG_L a0, CALLFRAME_S1(sp); \ + addi sp, sp, CALLFRAME_SIZ + +#ifdef GPROF +#define _PROF_PROLOGUE _KERN_MCOUNT +#else +#define _PROF_PROLOGUE +#endif + +#ifdef __PIC__ +#define PLT(x) x##@plt +#else +#define PLT(x) x +#endif + +/* + * WEAK_ALIAS: create a weak alias. + */ +#define WEAK_ALIAS(alias,sym) \ + .weak alias; \ + alias = sym +/* + * STRONG_ALIAS: create a strong alias. + */ +#define STRONG_ALIAS(alias,sym) \ + .globl alias; \ + alias = sym + +/* + * WARN_REFERENCES: create a warning if the specified symbol is referenced. + */ +#define WARN_REFERENCES(sym,msg) \ + .pushsection __CONCAT(.gnu.warning.,sym); \ + .ascii msg; \ + .popsection + +#define _ENTRY(x) \ + .globl _C_LABEL(x); \ + .type _C_LABEL(x), @function; \ + _C_LABEL(x): + +#define ENTRY_NP(x) .text; .align 2; _ENTRY(x) +#define ENTRY(x) ENTRY_NP(x); _PROF_PROLOGUE +#define ALTENTRY(x) _ENTRY(x) +#define END(x) .size _C_LABEL(x), . - _C_LABEL(x) + +/* + * Macros to panic and printf from assembly language. + */ +#define PANIC(msg) \ + la a0, 9f; \ + call _C_LABEL(panic); \ + MSG(msg) + +#define PRINTF(msg) \ + la a0, 9f; \ + call _C_LABEL(printf); \ + MSG(msg) + +#define MSG(msg) \ + .pushsection .rodata.str1.8,"aMS",@progbits,1; \ +9: .asciiz msg; \ + .popsection + +#define ASMSTR(str) \ + .asciiz str; \ + .align 3 + +#ifdef _NETBSD_REVISIONID +#define __RCSID(x) .pushsection ".ident","MS",@progbits,1; \ + .asciz x; \ + .ascii "$"; .ascii "NetBSD: "; .ascii __FILE__; \ + .ascii " "; .ascii _NETBSD_REVISIONID; \ + .asciz " $"; \ + .popsection +#else +#define __RCSID(x) .pushsection ".ident","MS",@progbits,1; \ + .asciz x; \ + .popsection +#endif +#define RCSID(name) __RCSID(name) + +#if defined(_LP64) +#define SZREG 8 +#else +#define SZREG 4 +#endif + +#define ALSK 15 /* stack alignment */ +#define ALMASK -15 /* stack alignment */ +#define SZFPREG 8 +#define FP_L fld +#define FP_S fsd + +/* + * standard callframe { + * register_t cf_sp; frame pointer + * register_t cf_ra; return address + * }; + */ +#define CALLFRAME_SIZ (SZREG * 4) +#define CALLFRAME_S1 (CALLFRAME_SIZ - 4 * SZREG) +#define CALLFRAME_S0 (CALLFRAME_SIZ - 3 * SZREG) +#define CALLFRAME_SP (CALLFRAME_SIZ - 2 * SZREG) +#define CALLFRAME_RA (CALLFRAME_SIZ - 1 * SZREG) + +/* + * These macros hide the use of rv32 and rv64 instructions from the + * assembler to prevent the assembler from generating 64-bit style + * ABI calls. + */ +#define PTR_ADD add +#define PTR_ADDI addi +#define PTR_SUB sub +#define PTR_SUBI subi +#define PTR_LA la +#define PTR_SLLI slli +#define PTR_SLL sll +#define PTR_SRLI srli +#define PTR_SRL srl +#define PTR_SRAI srai +#define PTR_SRA sra +#if _LP64 +#define PTR_L ld +#define PTR_S sd +#define PTR_LR lr.d +#define PTR_SC sc.d +#define PTR_WORD .dword +#define PTR_SCALESHIFT 3 +#else +#define PTR_L lw +#define PTR_S sw +#define PTR_LR lr.w +#define PTR_SC sc.w +#define PTR_WORD .word +#define PTR_SCALESHIFT 2 +#endif + +#define INT_L lw +#define INT_LA la +#define INT_S sw +#define INT_LR lr.w +#define INT_SC sc.w +#define INT_WORD .word +#define INT_SCALESHIFT 2 +#ifdef _LP64 +#define INT_ADD addw +#define INT_ADDI addwi +#define INT_SUB subw +#define INT_SUBI subwi +#define INT_SLL sllwi +#define INT_SLLV sllw +#define INT_SRL srlwi +#define INT_SRLV srlw +#define INT_SRA srawi +#define INT_SRAV sraw +#else +#define INT_ADD add +#define INT_ADDI addi +#define INT_SUB sub +#define INT_SUBI subi +#define INT_SLLI slli +#define INT_SLL sll +#define INT_SRLI srli +#define INT_SRL srl +#define INT_SRAI srai +#define INT_SRA sra +#endif + +#define LONG_LA la +#define LONG_ADD add +#define LONG_ADDI addi +#define LONG_SUB sub +#define LONG_SUBI subi +#define LONG_SLLI slli +#define LONG_SLL sll +#define LONG_SRLI srli +#define LONG_SRL srl +#define LONG_SRAI srai +#define LONG_SRA sra +#ifdef _LP64 +#define LONG_L ld +#define LONG_S sd +#define LONG_LR lr.d +#define LONG_SC sc.d +#define LONG_WORD .quad +#define LONG_SCALESHIFT 3 +#else +#define LONG_L lw +#define LONG_S sw +#define LONG_LR lr.w +#define LONG_SC sc.w +#define LONG_WORD .word +#define LONG_SCALESHIFT 2 +#endif + +#define REG_LI li +#define REG_ADD add +#define REG_SLLI slli +#define REG_SLL sll +#define REG_SRLI srli +#define REG_SRL srl +#define REG_SRAI srai +#define REG_SRA sra +#if _LP64 +#define REG_L ld +#define REG_S sd +#define REG_LR lr.d +#define REG_SC sc.d +#define REG_SCALESHIFT 3 +#else +#define REG_L lw +#define REG_S sw +#define REG_LR lr.w +#define REG_SC sc.w +#define REG_SCALESHIFT 2 +#endif + +#define CPUVAR(off) _C_LABEL(cpu_info_store)+__CONCAT(CPU_INFO_,off) + +#endif /* _RISCV_ASM_H */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/riscv/bswap.h b/lib/libc/include/generic-netbsd/riscv/bswap.h @@ -0,0 +1,11 @@ +/* $NetBSD: bswap.h,v 1.2 2024/08/04 08:16:25 skrll Exp $ */ + +#ifndef _RISCV_BSWAP_H_ +#define _RISCV_BSWAP_H_ + +#include <riscv/byte_swap.h> + +#define __BSWAP_RENAME +#include <sys/bswap.h> + +#endif /* _RISCV_BSWAP_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/riscv/byte_swap.h b/lib/libc/include/generic-netbsd/riscv/byte_swap.h @@ -0,0 +1,99 @@ +/* $NetBSD: byte_swap.h,v 1.5.30.1 2025/12/18 19:57:52 martin Exp $ */ + +/*- + * Copyright (c) 2014 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Matt Thomas of 3am Software Foundry. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _RISCV_BYTE_SWAP_H_ +#define _RISCV_BYTE_SWAP_H_ + +#ifdef _LOCORE + +#define BSWAP16(_src, _dst, _tmp) \ + andi _dst, _src, 0xff ;\ + slli _dst, _dst, 8 ;\ + srli _tmp, _src, 8 ;\ + and _tmp, _tmp, 0xff ;\ + ori _dst, _dst, _tmp + +#define BSWAP32(_src, _dst, _tmp) \ + li v1, 0xff00 ;\ + slli _dst, _src, 24 ;\ + srli _tmp, _src, 24 ;\ + ori _dst, _dst, _tmp ;\ + and _tmp, _src, v1 ;\ + slli _tmp, _src, 8 ;\ + ori _dst, _dst, _tmp ;\ + srli _tmp, _src, 8 ;\ + and _tmp, _tmp, v1 ;\ + ori _dst, _dst, _tmp + +#else + +#include <sys/stdint.h> +__BEGIN_DECLS + +#define __BYTE_SWAP_U64_VARIABLE __byte_swap_u64_variable +static __inline uint64_t +__byte_swap_u64_variable(uint64_t v) +{ + const uint64_t m1 = 0x0000ffff0000ffffull; + const uint64_t m0 = 0x00ff00ff00ff00ffull; + + v = (v >> 32) | (v << 32); + v = ((v >> 16) & m1) | ((v & m1) << 16); + v = ((v >> 8) & m0) | ((v & m0) << 8); + + return v; +} + +#define __BYTE_SWAP_U32_VARIABLE __byte_swap_u32_variable +static __inline uint32_t +__byte_swap_u32_variable(uint32_t v) +{ + const uint32_t m = 0xff00ff; + + v = (v >> 16) | (v << 16); + v = ((v >> 8) & m) | ((v & m) << 8); + + return v; +} + +#define __BYTE_SWAP_U16_VARIABLE __byte_swap_u16_variable +static __inline uint16_t +__byte_swap_u16_variable(uint16_t v) +{ + /*LINTED*/ + return (uint16_t)((v >> 8) | (v << 8)); +} + +__END_DECLS + +#endif /* _LOCORE */ + +#endif /* _RISCV_BYTE_SWAP_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/riscv/cdefs.h b/lib/libc/include/generic-netbsd/riscv/cdefs.h @@ -0,0 +1,8 @@ +/* $NetBSD: cdefs.h,v 1.2 2023/05/07 12:41:48 skrll Exp $ */ + +#ifndef _RISCV_CDEFS_H_ +#define _RISCV_CDEFS_H_ + +#define __ALIGNBYTES ((size_t)(__BIGGEST_ALIGNMENT__ - 1U)) + +#endif /* _RISCV_CDEFS_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/riscv/cpu.h b/lib/libc/include/generic-netbsd/riscv/cpu.h @@ -0,0 +1,242 @@ +/* $NetBSD: cpu.h,v 1.16 2024/08/04 08:16:25 skrll Exp $ */ + +/*- + * Copyright (c) 2014 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Matt Thomas of 3am Software Foundry. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _RISCV_CPU_H_ +#define _RISCV_CPU_H_ + +#if defined(_KERNEL) || defined(_KMEMUSER) + +struct clockframe { + vaddr_t cf_epc; + register_t cf_status; + int cf_intr_depth; +}; + +#define CLKF_USERMODE(cf) (((cf)->cf_status & SR_SPP) == 0) +#define CLKF_PC(cf) ((cf)->cf_epc) +#define CLKF_INTR(cf) ((cf)->cf_intr_depth > 1) + +#include <sys/cpu_data.h> +#include <sys/device_if.h> +#include <sys/evcnt.h> +#include <sys/intr.h> + +struct cpu_info { + struct cpu_data ci_data; + device_t ci_dev; + cpuid_t ci_cpuid; + struct lwp *ci_curlwp; + struct lwp *ci_onproc; /* current user LWP / kthread */ + struct lwp *ci_softlwps[SOFTINT_COUNT]; + struct trapframe *ci_ddb_regs; + + uint64_t ci_lastintr; + uint64_t ci_lastintr_scheduled; + struct evcnt ci_ev_timer; + struct evcnt ci_ev_timer_missed; + + u_long ci_cpu_freq; /* CPU frequency */ + int ci_mtx_oldspl; + int ci_mtx_count; + int ci_cpl; + volatile u_int ci_intr_depth; + + int ci_want_resched __aligned(COHERENCY_UNIT); + u_int ci_softints; + + tlb_asid_t ci_pmap_asid_cur; + + union pmap_segtab *ci_pmap_user_segtab; +#ifdef _LP64 + union pmap_segtab *ci_pmap_user_seg0tab; +#endif + + struct evcnt ci_ev_fpu_saves; + struct evcnt ci_ev_fpu_loads; + struct evcnt ci_ev_fpu_reenables; + + struct pmap_tlb_info *ci_tlb_info; + +#ifdef MULTIPROCESSOR + volatile u_long ci_flags; +#define CPUF_PRIMARY __BIT(0) /* CPU is primary CPU */ +#define CPUF_PRESENT __BIT(1) /* CPU is present */ +#define CPUF_RUNNING __BIT(2) /* CPU is running */ +#define CPUF_PAUSED __BIT(3) /* CPU is paused */ + + void *ci_intcsoftc; + volatile u_long ci_request_ipis; + /* bitmask of IPIs requested */ + u_long ci_active_ipis; /* bitmask of IPIs being serviced */ + + struct evcnt ci_evcnt_all_ipis; /* aggregated IPI counter */ + struct evcnt ci_evcnt_per_ipi[NIPIS]; /* individual IPI counters */ + struct evcnt ci_evcnt_synci_onproc_rqst; + struct evcnt ci_evcnt_synci_deferred_rqst; + struct evcnt ci_evcnt_synci_ipi_rqst; + + kcpuset_t *ci_shootdowncpus; + kcpuset_t *ci_multicastcpus; + kcpuset_t *ci_watchcpus; + kcpuset_t *ci_ddbcpus; +#endif + +#if defined(GPROF) && defined(MULTIPROCESSOR) + struct gmonparam *ci_gmon; /* MI per-cpu GPROF */ +#endif +}; + +#endif /* _KERNEL || _KMEMUSER */ + +#ifdef _KERNEL + +extern struct cpu_info cpu_info_store[]; +extern cpuid_t cpu_bphartid; +extern u_int cpu_hartindex[]; + +#ifdef MULTIPROCESSOR + +void cpu_hatch(struct cpu_info *, unsigned long); + +void cpu_init_secondary_processor(u_int); +void cpu_boot_secondary_processors(void); +void cpu_mpstart(void); +bool cpu_hatched_p(u_int); + +void cpu_clr_mbox(u_int); +void cpu_set_hatched(u_int); + + +void cpu_halt(void); +void cpu_halt_others(void); +bool cpu_is_paused(cpuid_t); +void cpu_pause(void); +void cpu_pause_others(void); +void cpu_resume(cpuid_t); +void cpu_resume_others(void); +void cpu_debug_dump(void); + +extern kcpuset_t *cpus_running; +extern kcpuset_t *cpus_hatched; +extern kcpuset_t *cpus_paused; +extern kcpuset_t *cpus_resumed; +extern kcpuset_t *cpus_halted; + +/* + * definitions of cpu-dependent requirements + * referenced in generic code + */ + +/* + * Send an inter-processor interrupt to each other CPU (excludes curcpu()) + */ +void cpu_broadcast_ipi(int); + +/* + * Send an inter-processor interrupt to CPUs in kcpuset (excludes curcpu()) + */ +void cpu_multicast_ipi(const kcpuset_t *, int); + +/* + * Send an inter-processor interrupt to another CPU. + */ +int cpu_send_ipi(struct cpu_info *, int); + +#endif + +struct lwp; +static inline struct cpu_info *lwp_getcpu(struct lwp *); + +register struct lwp *riscv_curlwp __asm("tp"); +#define curlwp riscv_curlwp +#define curcpu() lwp_getcpu(curlwp) +#define curpcb ((struct pcb *)lwp_getpcb(curlwp)) + +static inline cpuid_t +cpu_number(void) +{ +#ifdef MULTIPROCESSOR + return curcpu()->ci_cpuid; +#else + return 0; +#endif +} + +void cpu_proc_fork(struct proc *, struct proc *); +void cpu_signotify(struct lwp *); +void cpu_need_proftick(struct lwp *l); +void cpu_boot_secondary_processors(void); + +#define CPU_INFO_ITERATOR cpuid_t +#ifdef MULTIPROCESSOR +#define CPU_IS_PRIMARY(ci) ((ci)->ci_flags & CPUF_PRIMARY) +#define CPU_INFO_FOREACH(cii, ci) \ + cii = 0, ci = &cpu_info_store[0]; \ + ci != NULL; \ + cii++, ncpu ? (ci = cpu_infos[cii]) \ + : (ci = NULL) +#else +#define CPU_IS_PRIMARY(ci) true +#define CPU_INFO_FOREACH(cii, ci) \ + (cii) = 0, (ci) = curcpu(); (cii) == 0; (cii)++ +#endif + +#define CPU_INFO_CURPMAP(ci) (curlwp->l_proc->p_vmspace->vm_map.pmap) + +static inline void +cpu_dosoftints(void) +{ + extern void dosoftints(void); + struct cpu_info * const ci = curcpu(); + if (ci->ci_intr_depth == 0 + && (ci->ci_data.cpu_softints >> ci->ci_cpl) > 0) + dosoftints(); +} + +static inline bool +cpu_intr_p(void) +{ + return curcpu()->ci_intr_depth > 0; +} + +#define LWP_PC(l) cpu_lwp_pc(l) + +vaddr_t cpu_lwp_pc(struct lwp *); + +static inline void +cpu_idle(void) +{ + asm volatile("wfi" ::: "memory"); +} + +#endif /* _KERNEL */ + +#endif /* _RISCV_CPU_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/riscv/disklabel.h b/lib/libc/include/generic-netbsd/riscv/disklabel.h @@ -0,0 +1,68 @@ +/* $NetBSD: disklabel.h,v 1.2 2022/05/24 19:37:39 andvar Exp $ */ + +/*- + * Copyright (c) 2014 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Matt Thomas of 3am Software Foundry. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _RISCV_DISKLABEL_H_ +#define _RISCV_DISKLABEL_H_ + +#define LABELUSESMBR 1 /* use MBR partitionning */ +#define LABELSECTOR 1 /* sector containing label */ +#define LABELOFFSET 0 /* offset of label in sector */ +#define MAXPARTITIONS 16 /* number of partitions */ +#define RAW_PART 2 /* raw partition: XX?c */ + +#if HAVE_NBTOOL_CONFIG_H +#include <nbinclude/sys/dkbad.h> +#include <nbinclude/sys/bootblock.h> +#else +#include <sys/dkbad.h> +#include <sys/bootblock.h> +#endif /* HAVE_NBTOOL_CONFIG_H */ + +struct cpu_disklabel { + struct mbr_partition mbrparts[MBR_PART_COUNT]; +#define __HAVE_DISKLABEL_DKBAD + struct dkbad bad; +}; + +#ifdef _KERNEL +struct buf; +struct disklabel; + +/* for readdisklabel. rv != 0 -> matches, msg == NULL -> success */ +int mbr_label_read(dev_t, void (*)(struct buf *), struct disklabel *, + struct cpu_disklabel *, const char **, int *, int *); + +/* for writedisklabel. rv == 0 -> doesn't match, rv > 0 -> success */ +int mbr_label_locate(dev_t, void (*)(struct buf *), + struct disklabel *, struct cpu_disklabel *, int *, int *); +#endif /* _KERNEL */ + +#endif /* _RISCV_DISKLABEL_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/riscv/elf_machdep.h b/lib/libc/include/generic-netbsd/riscv/elf_machdep.h @@ -0,0 +1,144 @@ +/* $NetBSD: elf_machdep.h,v 1.10 2024/08/04 08:16:25 skrll Exp $ */ + +/*- + * Copyright (c) 2014 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Matt Thomas of 3am Software Foundry. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _RISCV_ELF_MACHDEP_H_ +#define _RISCV_ELF_MACHDEP_H_ + +#define ELF32_MACHDEP_ID EM_RISCV +#define ELF64_MACHDEP_ID EM_RISCV + +#define ELF32_MACHDEP_ENDIANNESS ELFDATA2LSB +#define ELF64_MACHDEP_ENDIANNESS ELFDATA2LSB + +#define ELF32_MACHDEP_ID_CASES \ + case EM_RISCV: \ + break; + +#define ELF64_MACHDEP_ID_CASES \ + case EM_RISCV: \ + break; + +#ifdef _LP64 +#define KERN_ELFSIZE 64 +#define ARCH_ELFSIZE 64 /* MD native binary size */ +#else +#define KERN_ELFSIZE 32 +#define ARCH_ELFSIZE 32 /* MD native binary size */ +#endif + +/* Processor specific flags for the ELF header e_flags field. */ + +/* Processor specific relocation types */ + +#define R_RISCV_NONE 0 +#define R_RISCV_32 1 // A +#define R_RISCV_64 2 +#define R_RISCV_RELATIVE 3 +#define R_RISCV_COPY 4 +#define R_RISCV_JMP_SLOT 5 +#define R_RISCV_TLS_DTPMOD32 6 +#define R_RISCV_TLS_DTPMOD64 7 +#define R_RISCV_TLS_DTPREL32 8 +#define R_RISCV_TLS_DTPREL64 9 +#define R_RISCV_TLS_TPREL32 10 +#define R_RISCV_TLS_TPREL64 11 + +/* The rest are not used by the dynamic linker */ +#define R_RISCV_BRANCH 16 // (A - P) & 0xffff +#define R_RISCV_JAL 17 // A & 0xff +#define R_RISCV_CALL 18 // (A - P) & 0xff +#define R_RISCV_CALL_PLT 19 +#define R_RISCV_GOT_HI20 20 +#define R_RISCV_TLS_GOT_HI20 21 +#define R_RISCV_TLS_GD_HI20 22 +#define R_RISCV_PCREL_HI20 23 +#define R_RISCV_PCREL_LO12_I 24 +#define R_RISCV_PCREL_LO12_S 25 +#define R_RISCV_HI20 26 // A & 0xffff +#define R_RISCV_LO12_I 27 // (A >> 16) & 0xffff +#define R_RISCV_LO12_S 28 // (S + A - P) >> 2 +#define R_RISCV_TPREL_HI20 29 +#define R_RISCV_TPREL_LO12_I 30 +#define R_RISCV_TPREL_LO12_S 31 +#define R_RISCV_TPREL_ADD 32 +#define R_RISCV_ADD8 33 +#define R_RISCV_ADD16 34 +#define R_RISCV_ADD32 35 +#define R_RISCV_ADD64 36 +#define R_RISCV_SUB8 37 +#define R_RISCV_SUB16 38 +#define R_RISCV_SUB32 39 +#define R_RISCV_SUB64 40 +#define R_RISCV_GNU_VTINHERIT 41 // A & 0xffff +#define R_RISCV_GNU_VTENTRY 42 +#define R_RISCV_ALIGN 43 +#define R_RISCV_RVC_BRANCH 44 +#define R_RISCV_RVC_JUMP 45 +#define R_RISCV_RVC_LUI 46 +#define R_RISCV_GPREL_I 47 +#define R_RISCV_GPREL_S 48 +#define R_RISCV_TPREL_I 49 +#define R_RISCV_TPREL_S 50 +#define R_RISCV_RELAX 51 +#define R_RISCV_SUB6 52 +#define R_RISCV_SET6 53 +#define R_RISCV_SET8 54 +#define R_RISCV_SET16 55 +#define R_RISCV_SET32 56 +#define R_RISCV_32_PCREL 57 + +/* These are aliases we can use R_TYPESZ */ +#define R_RISCV_ADDR32 R_RISCV_32 +#define R_RISCV_ADDR64 R_RISCV_64 + +#define R_TYPE(name) R_RISCV_ ## name +#if ELFSIZE == 32 +#define R_TYPESZ(name) R_RISCV_ ## name ## 32 +#else +#define R_TYPESZ(name) R_RISCV_ ## name ## 64 +#endif + +#ifdef _KERNEL +#ifdef ELFSIZE +#define ELF_MD_PROBE_FUNC ELFNAME2(cpu_netbsd,probe) +#endif + +struct exec_package; + +int cpu_netbsd_elf32_probe(struct lwp *, struct exec_package *, void *, char *, + vaddr_t *); + +int cpu_netbsd_elf64_probe(struct lwp *, struct exec_package *, void *, char *, + vaddr_t *); + +#endif /* _KERNEL */ + +#endif /* _RISCV_ELF_MACHDEP_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/riscv/endian.h b/lib/libc/include/generic-netbsd/riscv/endian.h @@ -0,0 +1,3 @@ +/* $NetBSD: endian.h,v 1.1 2014/09/19 17:36:26 matt Exp $ */ + +#include <sys/endian.h> +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/riscv/endian_machdep.h b/lib/libc/include/generic-netbsd/riscv/endian_machdep.h @@ -0,0 +1,3 @@ +/* $NetBSD: endian_machdep.h,v 1.1 2014/09/19 17:36:26 matt Exp $ */ + +#define _BYTE_ORDER _LITTLE_ENDIAN +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/riscv/fenv.h b/lib/libc/include/generic-netbsd/riscv/fenv.h @@ -0,0 +1,36 @@ +/* $NetBSD: fenv.h,v 1.5 2024/05/12 20:04:12 riastradh Exp $ */ + +/* + * Based on ieeefp.h written by J.T. Conklin, Apr 28, 1995 + * Public domain. + */ + +#ifndef _RISCV_FENV_H_ +#define _RISCV_FENV_H_ + +typedef int fenv_t; /* FPSCR */ +typedef int fexcept_t; + +#define FE_INEXACT ((int)__BIT(0)) /* Result inexact */ +#define FE_UNDERFLOW ((int)__BIT(1)) /* Result underflowed */ +#define FE_OVERFLOW ((int)__BIT(2)) /* Result overflowed */ +#define FE_DIVBYZERO ((int)__BIT(3)) /* divide-by-zero */ +#define FE_INVALID ((int)__BIT(4)) /* Result invalid */ + +#define FE_ALL_EXCEPT \ + (FE_INEXACT | FE_UNDERFLOW | FE_OVERFLOW | FE_DIVBYZERO | FE_INVALID) + +#define FE_TONEAREST 0 /* round to nearest representable number */ +#define FE_TOWARDZERO 1 /* round to zero (truncate) */ +#define FE_DOWNWARD 2 /* round toward negative infinity */ +#define FE_UPWARD 3 /* round toward positive infinity */ + +__BEGIN_DECLS + +/* Default floating-point environment */ +extern const fenv_t __fe_dfl_env; +#define FE_DFL_ENV (&__fe_dfl_env) + +__END_DECLS + +#endif /* _RISCV_FENV_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/riscv/float.h b/lib/libc/include/generic-netbsd/riscv/float.h @@ -0,0 +1,59 @@ +/* $NetBSD: float.h,v 1.2 2024/10/30 15:56:11 riastradh Exp $ */ + +/*- + * Copyright (c) 2014 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Matt Thomas of 3am Software Foundry. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _RISCV_FLOAT_H_ +#define _RISCV_FLOAT_H_ + +#include <sys/cdefs.h> +#include <sys/featuretest.h> + +#define LDBL_MANT_DIG __LDBL_MANT_DIG__ +#define LDBL_DIG __LDBL_DIG__ +#define LDBL_MIN_EXP __LDBL_MIN_EXP__ +#define LDBL_MIN_10_EXP __LDBL_MIN_10_EXP__ +#define LDBL_MAX_EXP __LDBL_MAX_EXP__ +#define LDBL_MAX_10_EXP __LDBL_MAX_10_EXP__ +#define LDBL_EPSILON __LDBL_EPSILON__ +#define LDBL_MIN __LDBL_MIN__ +#define LDBL_MAX __LDBL_MAX__ + +#include <sys/float_ieee754.h> + +#if (!defined(_ANSI_SOURCE) && !defined(_POSIX_C_SOURCE) \ + && !defined(_XOPEN_SOURCE)) \ + || (__STDC_VERSION__ - 0) >= 199901L \ + || (_POSIX_C_SOURCE - 0) >= 200112L \ + || ((_XOPEN_SOURCE - 0) >= 600) \ + || defined(_ISOC99_SOURCE) || defined(_NETBSD_SOURCE) +#define DECIMAL_DIG __DECIMAL_DIG__ +#endif + +#endif /* !_RISCV_FLOAT_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/riscv/ieee.h b/lib/libc/include/generic-netbsd/riscv/ieee.h @@ -0,0 +1,4 @@ +/* $NetBSD: ieee.h,v 1.2 2019/04/13 15:57:31 maya Exp $ */ + +#include <riscv/math.h> /* for #define __HAVE_LONG_DOUBLE 128 */ +#include <sys/ieee754.h> +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/riscv/ieeefp.h b/lib/libc/include/generic-netbsd/riscv/ieeefp.h @@ -0,0 +1,44 @@ +/* $NetBSD: ieeefp.h,v 1.2 2020/03/14 16:12:16 skrll Exp $ */ + +/* + * Based on ieeefp.h written by J.T. Conklin, Apr 28, 1995 + * Public domain. + */ + +#ifndef _RISCV_IEEEFP_H_ +#define _RISCV_IEEEFP_H_ + +#include <sys/featuretest.h> + +#if defined(_NETBSD_SOURCE) || defined(_ISOC99_SOURCE) + +#include <riscv/fenv.h> + +#if !defined(_ISOC99_SOURCE) + +/* Exception type (used by fpsetmask() et al.) */ + +typedef int fp_except; + +/* Bit defines for fp_except */ + +#define FP_X_INV FE_INVALID /* invalid operation exception */ +#define FP_X_DZ FE_DIVBYZERO /* divide-by-zero exception */ +#define FP_X_OFL FE_OVERFLOW /* overflow exception */ +#define FP_X_UFL FE_UNDERFLOW /* underflow exception */ +#define FP_X_IMP FE_INEXACT /* imprecise (prec. loss; "inexact") */ + +/* Rounding modes */ + +typedef enum { + FP_RN=FE_TONEAREST, /* round to nearest representable number */ + FP_RP=FE_UPWARD, /* round toward positive infinity */ + FP_RM=FE_DOWNWARD, /* round toward negative infinity */ + FP_RZ=FE_TOWARDZERO /* round to zero (truncate) */ +} fp_rnd; + +#endif /* !_ISOC99_SOURCE */ + +#endif /* _NETBSD_SOURCE || _ISOC99_SOURCE */ + +#endif /* _RISCV_IEEEFP_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/riscv/int_const.h b/lib/libc/include/generic-netbsd/riscv/int_const.h @@ -0,0 +1,33 @@ +/* $NetBSD: int_const.h,v 1.3 2025/01/12 09:05:28 skrll Exp $ */ + +#ifndef __INTMAX_C_SUFFIX__ + +#define __INT8_C_SUFFIX__ +#define __INT16_C_SUFFIX__ +#define __INT32_C_SUFFIX__ +#ifdef _LP64 +#define __INT64_C_SUFFIX__ L +#else +#define __INT64_C_SUFFIX__ LL +#endif + +#define __UINT8_C_SUFFIX__ +#define __UINT16_C_SUFFIX__ +#define __UINT32_C_SUFFIX__ U +#ifdef _LP64 +#define __UINT64_C_SUFFIX__ UL +#else +#define __UINT64_C_SUFFIX__ ULL +#endif + +#ifdef _LP64 +#define __INTMAX_C_SUFFIX__ L +#define __UINTMAX_C_SUFFIX__ UL +#else +#define __INTMAX_C_SUFFIX__ LL +#define __UINTMAX_C_SUFFIX__ ULL +#endif + +#endif + +#include <sys/common_int_const.h> +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/riscv/int_fmtio.h b/lib/libc/include/generic-netbsd/riscv/int_fmtio.h @@ -0,0 +1,381 @@ +/* $NetBSD: int_fmtio.h,v 1.4 2019/04/17 11:01:19 mrg Exp $ */ + +/*- + * Copyright (c) 2001 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Klaus Klein. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _RISCV_INT_FMTIO_H_ +#define _RISCV_INT_FMTIO_H_ + +#ifdef __INTPTR_FMTd__ +#include <sys/common_int_fmtio.h> +#else +/* + * 7.8.1 Macros for format specifiers + */ + +/* fprintf macros for signed integers */ +#define PRId8 "hhd" /* int8_t */ +#define PRId16 "hd" /* int16_t */ +#define PRId32 "d" /* int32_t */ +#ifdef _LP64 +#define PRId64 "ld" /* int64_t */ +#else +#define PRId64 "lld" /* int64_t */ +#endif +#define PRIdLEAST8 "hhd" /* int_least8_t */ +#define PRIdLEAST16 "hd" /* int_least16_t */ +#define PRIdLEAST32 "d" /* int_least32_t */ +#ifdef _LP64 +#define PRIdLEAST64 "ld" /* int_least64_t */ +#define PRIdFAST8 "d" /* int_fast8_t */ +#define PRIdFAST16 "d" /* int_fast16_t */ +#else +#define PRIdLEAST64 "lld" /* int_least64_t */ +#define PRIdFAST8 "hhd" /* int_fast8_t */ +#define PRIdFAST16 "hd" /* int_fast16_t */ +#endif +#define PRIdFAST32 "d" /* int_fast32_t */ +#ifdef _LP64 +#define PRIdFAST64 "ld" /* int_fast64_t */ +#define PRIdMAX "ld" /* intmax_t */ +#else +#define PRIdFAST64 "lld" /* int_fast64_t */ +#define PRIdMAX "lld" /* intmax_t */ +#endif +#define PRIdPTR "ld" /* intptr_t */ + +#define PRIi8 "hhi" /* int8_t */ +#define PRIi16 "hi" /* int16_t */ +#define PRIi32 "i" /* int32_t */ +#ifdef _LP64 +#define PRIi64 "li" /* int64_t */ +#else +#define PRIi64 "lli" /* int64_t */ +#endif +#define PRIiLEAST8 "hhi" /* int_least8_t */ +#define PRIiLEAST16 "hi" /* int_least16_t */ +#define PRIiLEAST32 "i" /* int_least32_t */ +#ifdef _LP64 +#define PRIiLEAST64 "li" /* int_least64_t */ +#define PRIiFAST8 "i" /* int_fast8_t */ +#define PRIiFAST16 "i" /* int_fast16_t */ +#else +#define PRIiLEAST64 "lli" /* int_least64_t */ +#define PRIiFAST8 "hhi" /* int_fast8_t */ +#define PRIiFAST16 "hi" /* int_fast16_t */ +#endif +#define PRIiFAST32 "i" /* int_fast32_t */ +#ifdef _LP64 +#define PRIiFAST64 "li" /* int_fast64_t */ +#define PRIiMAX "li" /* intmax_t */ +#else +#define PRIiFAST64 "lli" /* int_fast64_t */ +#define PRIiMAX "lli" /* intmax_t */ +#endif +#define PRIiPTR "li" /* intptr_t */ + +/* fprintf macros for unsigned integers */ + +#define PRIo8 "hho" /* uint8_t */ +#define PRIo16 "ho" /* uint16_t */ +#define PRIo32 "o" /* uint32_t */ +#ifdef _LP64 +#define PRIo64 "lo" /* uint64_t */ +#else +#define PRIo64 "llo" /* uint64_t */ +#endif +#define PRIoLEAST8 "o" /* uint_least8_t */ +#define PRIoLEAST16 "hho" /* uint_least16_t */ +#define PRIoLEAST32 "ho" /* uint_least32_t */ +#ifdef _LP64 +#define PRIoLEAST64 "lo" /* uint_least64_t */ +#define PRIoFAST8 "o" /* uint_fast8_t */ +#define PRIoFAST16 "o" /* uint_fast16_t */ +#else +#define PRIoLEAST64 "llo" /* uint_least64_t */ +#define PRIoFAST8 "hho" /* uint_fast8_t */ +#define PRIoFAST16 "ho" /* uint_fast16_t */ +#endif +#define PRIoFAST32 "o" /* uint_fast32_t */ +#ifdef _LP64 +#define PRIoFAST64 "lo" /* uint_fast64_t */ +#define PRIoMAX "lo" /* uintmax_t */ +#else +#define PRIoFAST64 "llo" /* uint_fast64_t */ +#define PRIoMAX "llo" /* uintmax_t */ +#endif +#define PRIoPTR "lo" /* uintptr_t */ + +#define PRIu8 "hhu" /* uint8_t */ +#define PRIu16 "hu" /* uint16_t */ +#define PRIu32 "u" /* uint32_t */ +#ifdef _LP64 +#define PRIu64 "lu" /* uint64_t */ +#else +#define PRIu64 "llu" /* uint64_t */ +#endif +#define PRIuLEAST8 "hhu" /* uint_least8_t */ +#define PRIuLEAST16 "hu" /* uint_least16_t */ +#define PRIuLEAST32 "u" /* uint_least32_t */ +#ifdef _LP64 +#define PRIuLEAST64 "lu" /* uint_least64_t */ +#define PRIuFAST8 "u" /* uint_fast8_t */ +#define PRIuFAST16 "u" /* uint_fast16_t */ +#else +#define PRIuLEAST64 "llu" /* uint_least64_t */ +#define PRIuFAST8 "hhu" /* uint_fast8_t */ +#define PRIuFAST16 "hu" /* uint_fast16_t */ +#endif +#define PRIuFAST32 "u" /* uint_fast32_t */ +#ifdef _LP64 +#define PRIuFAST64 "lu" /* uint_fast64_t */ +#define PRIuMAX "lu" /* uintmax_t */ +#else +#define PRIuFAST64 "llu" /* uint_fast64_t */ +#define PRIuMAX "llu" /* uintmax_t */ +#endif +#define PRIuPTR "lu" /* uintptr_t */ + +#define PRIx8 "hhx" /* uint8_t */ +#define PRIx16 "hx" /* uint16_t */ +#define PRIx32 "x" /* uint32_t */ +#ifdef _LP64 +#define PRIx64 "lx" /* uint64_t */ +#else +#define PRIx64 "llx" /* uint64_t */ +#endif +#define PRIxLEAST8 "x" /* uint_least8_t */ +#define PRIxLEAST16 "x" /* uint_least16_t */ +#define PRIxLEAST32 "x" /* uint_least32_t */ +#ifdef _LP64 +#define PRIxLEAST64 "lx" /* uint_least64_t */ +#define PRIxFAST8 "x" /* uint_fast8_t */ +#define PRIxFAST16 "x" /* uint_fast16_t */ +#else +#define PRIxLEAST64 "llx" /* uint_least64_t */ +#define PRIxFAST8 "hhx" /* uint_fast8_t */ +#define PRIxFAST16 "hx" /* uint_fast16_t */ +#endif +#define PRIxFAST32 "x" /* uint_fast32_t */ +#ifdef _LP64 +#define PRIxFAST64 "lx" /* uint_fast64_t */ +#define PRIxMAX "lx" /* uintmax_t */ +#else +#define PRIxFAST64 "llx" /* uint_fast64_t */ +#define PRIxMAX "llx" /* uintmax_t */ +#endif +#define PRIxPTR "lx" /* uintptr_t */ + +#define PRIX8 "hhX" /* uint8_t */ +#define PRIX16 "hX" /* uint16_t */ +#define PRIX32 "X" /* uint32_t */ +#ifdef _LP64 +#define PRIX64 "lX" /* uint64_t */ +#else +#define PRIX64 "llX" /* uint64_t */ +#endif +#define PRIXLEAST8 "X" /* uint_least8_t */ +#define PRIXLEAST16 "X" /* uint_least16_t */ +#define PRIXLEAST32 "X" /* uint_least32_t */ +#ifdef _LP64 +#define PRIXLEAST64 "lX" /* uint_least64_t */ +#define PRIXFAST8 "X" /* uint_fast8_t */ +#define PRIXFAST16 "X" /* uint_fast16_t */ +#else +#define PRIXLEAST64 "llX" /* uint_least64_t */ +#define PRIXFAST8 "hhX" /* uint_fast8_t */ +#define PRIXFAST16 "hX" /* uint_fast16_t */ +#endif +#define PRIXFAST32 "X" /* uint_fast32_t */ +#ifdef _LP64 +#define PRIXFAST64 "lX" /* uint_fast64_t */ +#define PRIXMAX "lX" /* uintmax_t */ +#else +#define PRIXFAST64 "llX" /* uint_fast64_t */ +#define PRIXMAX "llX" /* uintmax_t */ +#endif +#define PRIXPTR "lX" /* uintptr_t */ + +/* fscanf macros for signed integers */ + +#define SCNd8 "hhd" /* int8_t */ +#define SCNd16 "hd" /* int16_t */ +#define SCNd32 "d" /* int32_t */ +#ifdef _LP64 +#define SCNd64 "ld" /* int64_t */ +#else +#define SCNd64 "lld" /* int64_t */ +#endif +#define SCNdLEAST8 "hhd" /* int_least8_t */ +#define SCNdLEAST16 "hd" /* int_least16_t */ +#define SCNdLEAST32 "d" /* int_least32_t */ +#ifdef _LP64 +#define SCNdLEAST64 "ld" /* int_least64_t */ +#define SCNdFAST8 "d" /* int_fast8_t */ +#define SCNdFAST16 "d" /* int_fast16_t */ +#else +#define SCNdLEAST64 "lld" /* int_least64_t */ +#define SCNdFAST8 "hhd" /* int_fast8_t */ +#define SCNdFAST16 "hd" /* int_fast16_t */ +#endif +#define SCNdFAST32 "d" /* int_fast32_t */ +#ifdef _LP64 +#define SCNdFAST64 "ld" /* int_fast64_t */ +#define SCNdMAX "ld" /* intmax_t */ +#else +#define SCNdFAST64 "lld" /* int_fast64_t */ +#define SCNdMAX "lld" /* intmax_t */ +#endif +#define SCNdPTR "ld" /* intptr_t */ + +#define SCNi8 "hhi" /* int8_t */ +#define SCNi16 "hi" /* int16_t */ +#define SCNi32 "i" /* int32_t */ +#ifdef _LP64 +#define SCNi64 "li" /* int64_t */ +#else +#define SCNi64 "lli" /* int64_t */ +#endif +#define SCNiLEAST8 "hhi" /* int_least8_t */ +#define SCNiLEAST16 "hi" /* int_least16_t */ +#define SCNiLEAST32 "i" /* int_least32_t */ +#ifdef _LP64 +#define SCNiLEAST64 "li" /* int_least64_t */ +#define SCNiFAST8 "i" /* int_fast8_t */ +#define SCNiFAST16 "i" /* int_fast16_t */ +#else +#define SCNiLEAST64 "lli" /* int_least64_t */ +#define SCNiFAST8 "hhi" /* int_fast8_t */ +#define SCNiFAST16 "hi" /* int_fast16_t */ +#endif +#define SCNiFAST32 "i" /* int_fast32_t */ +#ifdef _LP64 +#define SCNiFAST64 "li" /* int_fast64_t */ +#define SCNiMAX "li" /* intmax_t */ +#else +#define SCNiFAST64 "lli" /* int_fast64_t */ +#define SCNiMAX "lli" /* intmax_t */ +#endif +#define SCNiPTR "li" /* intptr_t */ + +/* fscanf macros for unsigned integers */ + +#define SCNo8 "hho" /* uint8_t */ +#define SCNo16 "ho" /* uint16_t */ +#define SCNo32 "o" /* uint32_t */ +#ifdef _LP64 +#define SCNo64 "lo" /* uint64_t */ +#else +#define SCNo64 "llo" /* uint64_t */ +#endif +#define SCNoLEAST8 "hho" /* uint_least8_t */ +#define SCNoLEAST16 "ho" /* uint_least16_t */ +#define SCNoLEAST32 "o" /* uint_least32_t */ +#ifdef _LP64 +#define SCNoLEAST64 "lo" /* uint_least64_t */ +#define SCNoFAST8 "o" /* uint_fast8_t */ +#define SCNoFAST16 "o" /* uint_fast16_t */ +#else +#define SCNoLEAST64 "llo" /* uint_least64_t */ +#define SCNoFAST8 "hho" /* uint_fast8_t */ +#define SCNoFAST16 "ho" /* uint_fast16_t */ +#endif +#define SCNoFAST32 "o" /* uint_fast32_t */ +#ifdef _LP64 +#define SCNoFAST64 "lo" /* uint_fast64_t */ +#define SCNoMAX "lo" /* uintmax_t */ +#else +#define SCNoFAST64 "llo" /* uint_fast64_t */ +#define SCNoMAX "llo" /* uintmax_t */ +#endif +#define SCNoPTR "lo" /* uintptr_t */ + +#define SCNu8 "hhu" /* uint8_t */ +#define SCNu16 "hu" /* uint16_t */ +#define SCNu32 "u" /* uint32_t */ +#ifdef _LP64 +#define SCNu64 "lu" /* uint64_t */ +#else +#define SCNu64 "llu" /* uint64_t */ +#endif +#define SCNuLEAST8 "hhu" /* uint_least8_t */ +#define SCNuLEAST16 "hu" /* uint_least16_t */ +#define SCNuLEAST32 "u" /* uint_least32_t */ +#ifdef _LP64 +#define SCNuLEAST64 "lu" /* uint_least64_t */ +#define SCNuFAST8 "u" /* uint_fast8_t */ +#define SCNuFAST16 "u" /* uint_fast16_t */ +#else +#define SCNuLEAST64 "llu" /* uint_least64_t */ +#define SCNuFAST8 "hhu" /* uint_fast8_t */ +#define SCNuFAST16 "hu" /* uint_fast16_t */ +#endif +#define SCNuFAST32 "u" /* uint_fast32_t */ +#ifdef _LP64 +#define SCNuFAST64 "lu" /* uint_fast64_t */ +#define SCNuMAX "lu" /* uintmax_t */ +#else +#define SCNuFAST64 "llu" /* uint_fast64_t */ +#define SCNuMAX "llu" /* uintmax_t */ +#endif +#define SCNuPTR "lu" /* uintptr_t */ + +#define SCNx8 "hhx" /* uint8_t */ +#define SCNx16 "hx" /* uint16_t */ +#define SCNx32 "x" /* uint32_t */ +#ifdef _LP64 +#define SCNx64 "lx" /* uint64_t */ +#else +#define SCNx64 "llx" /* uint64_t */ +#endif +#define SCNxLEAST8 "hhx" /* uint_least8_t */ +#define SCNxLEAST16 "hx" /* uint_least16_t */ +#define SCNxLEAST32 "x" /* uint_least32_t */ +#ifdef _LP64 +#define SCNxLEAST64 "lx" /* uint_least64_t */ +#define SCNxFAST8 "x" /* uint_fast8_t */ +#define SCNxFAST16 "x" /* uint_fast16_t */ +#else +#define SCNxLEAST64 "llx" /* uint_least64_t */ +#define SCNxFAST8 "hhx" /* uint_fast8_t */ +#define SCNxFAST16 "hx" /* uint_fast16_t */ +#endif +#define SCNxFAST32 "x" /* uint_fast32_t */ +#ifdef _LP64 +#define SCNxFAST64 "lx" /* uint_fast64_t */ +#define SCNxMAX "lx" /* uintmax_t */ +#else +#define SCNxFAST64 "llx" /* uint_fast64_t */ +#define SCNxMAX "llx" /* uintmax_t */ +#endif +#define SCNxPTR "lx" /* uintptr_t */ + +#endif /* !__INTPTR_FMTd__ */ + +#endif /* !_RISCV_INT_FMTIO_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/riscv/int_limits.h b/lib/libc/include/generic-netbsd/riscv/int_limits.h @@ -0,0 +1,3 @@ +/* $NetBSD: int_limits.h,v 1.1 2014/09/19 17:36:26 matt Exp $ */ + +#include <sys/common_int_limits.h> +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/riscv/int_mwgwtypes.h b/lib/libc/include/generic-netbsd/riscv/int_mwgwtypes.h @@ -0,0 +1,3 @@ +/* $NetBSD: int_mwgwtypes.h,v 1.1 2014/09/19 17:36:26 matt Exp $ */ + +#include <sys/common_int_mwgwtypes.h> +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/riscv/int_types.h b/lib/libc/include/generic-netbsd/riscv/int_types.h @@ -0,0 +1,3 @@ +/* $NetBSD: int_types.h,v 1.1 2014/09/19 17:36:26 matt Exp $ */ + +#include <sys/common_int_types.h> +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/riscv/kcore.h b/lib/libc/include/generic-netbsd/riscv/kcore.h @@ -0,0 +1,40 @@ +/* $NetBSD: kcore.h,v 1.1 2014/09/19 17:36:26 matt Exp $ */ + +/*- + * Copyright (c) 2014 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Matt Thomas of 3am Software Foundry. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _RISCV_KCORE_H_ +#define _RISCV_KCORE_H_ + +typedef struct cpu_kcore_hdr { + uint64_t kh_misc[8]; + phys_ram_seg_t kh_ramsegs[0]; +} cpu_kcore_hdr_t; + +#endif /* _RISCV_KCORE_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/riscv/limits.h b/lib/libc/include/generic-netbsd/riscv/limits.h @@ -0,0 +1,3 @@ +/* $NetBSD: limits.h,v 1.1 2014/09/19 17:36:26 matt Exp $ */ + +#include <sys/common_limits.h> +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/riscv/lock.h b/lib/libc/include/generic-netbsd/riscv/lock.h @@ -0,0 +1,3 @@ +/* $NetBSD: lock.h,v 1.4 2015/06/26 14:27:35 matt Exp $ */ + +#include <sys/common_lock.h> +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/riscv/lwp_private.h b/lib/libc/include/generic-netbsd/riscv/lwp_private.h @@ -0,0 +1,83 @@ +/* $NetBSD: lwp_private.h,v 1.1 2024/11/30 01:04:13 christos Exp $ */ + +/*- + * Copyright (c) 2014 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Matt Thomas of 3am Software Foundry. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ +#ifndef _RISCV_LWP_PRIVATE_H_ +#define _RISCV_LWP_PRIVATE_H_ + +#include <sys/cdefs.h> +#include <sys/tls.h> + +/* + * On RISCV, since displacements are signed 12-bit values, the TCB Pointer + * is biased by sizeof(tcb) so that first thread datum can be addressed by + * -sizeof(tcb). + */ + +#define TLS_TP_OFFSET 0x0 +#define TLS_TCB_ALIGN 16 +#define TLS_DTV_OFFSET 0x800 +__CTASSERT(TLS_TP_OFFSET + sizeof(struct tls_tcb) < 0x800); + +__BEGIN_DECLS + +static __inline void * +__lwp_getprivate_fast(void) +{ + void *__tp; + __asm("mv %0, tp" : "=r"(__tp)); + return __tp; +} + +static __inline void * +__lwp_gettcb_fast(void) +{ + void *__tcb; + + __asm __volatile( + "addi %[__tcb], tp, %[__offset]" + : [__tcb] "=r" (__tcb) + : [__offset] "n" (-(TLS_TP_OFFSET + sizeof(struct tls_tcb)))); + + return __tcb; +} + +static __inline void +__lwp_settcb(void *__tcb) +{ + __asm __volatile( + "addi tp, %[__tcb], %[__offset]" + : + : [__tcb] "r" (__tcb), + [__offset] "n" (TLS_TP_OFFSET + sizeof(struct tls_tcb))); +} + +__END_DECLS + +#endif /* !_RISCV_LWP_PRIVATE_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/riscv/math.h b/lib/libc/include/generic-netbsd/riscv/math.h @@ -0,0 +1,4 @@ +/* $NetBSD: math.h,v 1.3 2019/04/16 07:40:02 maya Exp $ */ + +#define __HAVE_NANF +#define __HAVE_LONG_DOUBLE 128 +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/riscv/mcontext.h b/lib/libc/include/generic-netbsd/riscv/mcontext.h @@ -0,0 +1,150 @@ +/* $NetBSD: mcontext.h,v 1.12 2024/11/30 01:04:13 christos Exp $ */ + +/*- + * Copyright (c) 2014 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Matt Thomas of 3am Software Foundry. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ +#ifndef _RISCV_MCONTEXT_H_ +#define _RISCV_MCONTEXT_H_ + +/* + */ + +#define _NGREG 32 /* GR1-31 */ +#define _NFREG 33 /* F0-31, FCSR */ + +/* + * This fragment is common to <riscv/mcontext.h> and <riscv/reg.h> + */ +#ifndef _BSD_FPREG_T_ +union __fpreg { + __uint64_t u_u64; + double u_d; +}; +#define _BSD_FPREG_T_ union __fpreg +#endif + +typedef long __greg_t; +typedef __greg_t __gregset_t[_NGREG]; +typedef __uint32_t __greg32_t; +typedef __greg32_t __gregset32_t[_NGREG]; +typedef _BSD_FPREG_T_ __fregset_t[_NFREG]; + +#define _REG_X1 0 +#define _REG_X2 1 +#define _REG_X3 2 +#define _REG_X4 3 +#define _REG_X5 4 +#define _REG_X6 5 +#define _REG_X7 6 +#define _REG_X8 7 +#define _REG_X9 8 +#define _REG_X10 9 +#define _REG_X11 10 +#define _REG_X12 11 +#define _REG_X13 12 +#define _REG_X14 13 +#define _REG_X15 14 +#define _REG_X16 15 +#define _REG_X17 16 +#define _REG_X18 17 +#define _REG_X19 18 +#define _REG_X20 19 +#define _REG_X21 20 +#define _REG_X22 21 +#define _REG_X23 22 +#define _REG_X24 23 +#define _REG_X25 24 +#define _REG_X26 25 +#define _REG_X27 26 +#define _REG_X28 27 +#define _REG_X29 28 +#define _REG_X30 29 +#define _REG_X31 30 +#define _REG_PC 31 + +#define _REG_RA _REG_X1 +#define _REG_SP _REG_X2 +#define _REG_GP _REG_X3 +#define _REG_TP _REG_X4 +#define _REG_T0 _REG_X5 +#define _REG_T1 _REG_X6 +#define _REG_T2 _REG_X7 +#define _REG_S0 _REG_X8 +#define _REG_S1 _REG_X9 +#define _REG_RV _REG_X10 +#define _REG_A0 _REG_X10 +#define _REG_A1 _REG_X11 +#define _REG_A2 _REG_X12 +#define _REG_A3 _REG_X13 +#define _REG_A4 _REG_X14 +#define _REG_A5 _REG_X15 +#define _REG_A6 _REG_X16 +#define _REG_A7 _REG_X17 +#define _REG_S2 _REG_X18 +#define _REG_S3 _REG_X19 +#define _REG_S4 _REG_X20 +#define _REG_S5 _REG_X21 +#define _REG_S6 _REG_X22 +#define _REG_S7 _REG_X23 +#define _REG_S8 _REG_X24 +#define _REG_S9 _REG_X25 +#define _REG_S10 _REG_X26 +#define _REG_S11 _REG_X27 +#define _REG_T3 _REG_X28 +#define _REG_T4 _REG_X29 +#define _REG_T5 _REG_X30 +#define _REG_T6 _REG_X31 + +#define _REG_F0 0 +#define _REG_FPCSR 32 + +typedef struct { + __gregset_t __gregs; /* General Purpose Register set */ + __fregset_t __fregs; /* Floating Point Register set */ + __greg_t __spare[7]; /* future proof */ +} mcontext_t; + +typedef struct { + __gregset32_t __gregs; /* General Purpose Register set */ + __fregset_t __fregs; /* Floating Point Register set */ + __greg32_t __spare[7]; /* future proof */ +} mcontext32_t; + +/* Machine-dependent uc_flags */ +#define _UC_SETSTACK 0x00010000 /* see <sys/ucontext.h> */ +#define _UC_CLRSTACK 0x00020000 /* see <sys/ucontext.h> */ +#define _UC_TLSBASE 0x00080000 /* see <sys/ucontext.h> */ + +#define _UC_MACHINE_SP(uc) ((uc)->uc_mcontext.__gregs[_REG_SP]) +#define _UC_MACHINE_FP(uc) ((uc)->uc_mcontext.__gregs[_REG_S0]) +#define _UC_MACHINE_PC(uc) ((uc)->uc_mcontext.__gregs[_REG_PC]) +#define _UC_MACHINE_INTRV(uc) ((uc)->uc_mcontext.__gregs[_REG_RV]) + +#define _UC_MACHINE_SET_PC(uc, pc) _UC_MACHINE_PC(uc) = (pc) + +#endif /* !_RISCV_MCONTEXT_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/riscv/mutex.h b/lib/libc/include/generic-netbsd/riscv/mutex.h @@ -0,0 +1,128 @@ +/* $NetBSD: mutex.h,v 1.7 2024/11/25 22:04:14 skrll Exp $ */ + +/*- + * Copyright (c) 2002, 2007 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Jason R. Thorpe and Andrew Doran. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _RISCV_MUTEX_H_ +#define _RISCV_MUTEX_H_ + +#include <sys/types.h> + +#ifndef __MUTEX_PRIVATE + +struct kmutex { + uintptr_t mtx_pad1; +}; + +#else /* __MUTEX_PRIVATE */ + +#include <sys/cdefs.h> + +#include <sys/param.h> + +#include <machine/intr.h> + +struct kmutex { + volatile uintptr_t mtx_owner; +}; + +#ifdef _KERNEL + +#ifdef _LP64 +#define MTX_ASMOP_SFX ".d" // doubleword atomic op +#else +#define MTX_ASMOP_SFX ".w" // word atomic op +#endif + +#define MTX_LOCK __BIT(8) // just one bit +#define MTX_IPL __BITS(7,4) // only need 4 bits + +#undef MUTEX_SPIN_IPL // override <sys/mutex.h> +#define MUTEX_SPIN_IPL(a) riscv_mutex_spin_ipl(a) +#define MUTEX_INITIALIZE_SPIN_IPL(a,b) riscv_mutex_initialize_spin_ipl(a,b) +#define MUTEX_SPINBIT_LOCK_INIT(a) riscv_mutex_spinbit_lock_init(a) +#define MUTEX_SPINBIT_LOCK_TRY(a) riscv_mutex_spinbit_lock_try(a) +#define MUTEX_SPINBIT_LOCKED_P(a) riscv_mutex_spinbit_locked_p(a) +#define MUTEX_SPINBIT_LOCK_UNLOCK(a) riscv_mutex_spinbit_lock_unlock(a) + +static inline ipl_cookie_t +riscv_mutex_spin_ipl(kmutex_t *__mtx) +{ + return (ipl_cookie_t){._spl = __SHIFTOUT(__mtx->mtx_owner, MTX_IPL)}; +} + +static inline void +riscv_mutex_initialize_spin_ipl(kmutex_t *__mtx, int ipl) +{ + __mtx->mtx_owner = (__mtx->mtx_owner & ~MTX_IPL) + | __SHIFTIN(ipl, MTX_IPL); +} + +static inline void +riscv_mutex_spinbit_lock_init(kmutex_t *__mtx) +{ + __mtx->mtx_owner &= ~MTX_LOCK; +} + +static inline bool +riscv_mutex_spinbit_locked_p(const kmutex_t *__mtx) +{ + return (__mtx->mtx_owner & MTX_LOCK) != 0; +} + +static inline bool +riscv_mutex_spinbit_lock_try(kmutex_t *__mtx) +{ + uintptr_t __old; + __asm __volatile( + "amoor" MTX_ASMOP_SFX ".aq\t%0, %1, (%2)" + : "=r"(__old) + : "r"(MTX_LOCK), "r"(__mtx)); + return (__old & MTX_LOCK) == 0; +} + +static inline void +riscv_mutex_spinbit_lock_unlock(kmutex_t *__mtx) +{ + __asm __volatile( + "amoand" MTX_ASMOP_SFX ".rl\tx0, %0, (%1)" + :: "r"(~MTX_LOCK), "r"(__mtx)); +} + +#endif /* _KERNEL */ + +#if 0 +#define __HAVE_MUTEX_STUBS 1 +#define __HAVE_SPIN_MUTEX_STUBS 1 +#endif +#define __HAVE_SIMPLE_MUTEXES 1 + +#endif /* __MUTEX_PRIVATE */ + +#endif /* _RISCV_MUTEX_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/riscv/param.h b/lib/libc/include/generic-netbsd/riscv/param.h @@ -0,0 +1,110 @@ +/* $NetBSD: param.h,v 1.8 2023/05/07 12:41:48 skrll Exp $ */ + +/*- + * Copyright (c) 2014 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Matt Thomas of 3am Software Foundry. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _RISCV_PARAM_H_ +#define _RISCV_PARAM_H_ + +#ifdef _KERNEL_OPT +#include "opt_param.h" +#endif + +/* + * Machine dependent constants for all OpenRISC processors + */ + +/* + * For KERNEL code: + * MACHINE must be defined by the individual port. This is so that + * uname returns the correct thing, etc. + * + * For non-KERNEL code: + * If ELF, MACHINE and MACHINE_ARCH are forced to "or1k/or1k". + */ + +#ifdef _LP64 +#define _MACHINE_ARCH riscv64 +#define MACHINE_ARCH "riscv64" +#define _MACHINE_ARCH32 riscv32 +#define MACHINE_ARCH32 "riscv32" +#else +#define _MACHINE_ARCH riscv32 +#define MACHINE_ARCH "riscv32" +#endif +#define _MACHINE riscv +#define MACHINE "riscv" + +#define MID_MACHINE MID_RISCV + +/* RISC-V specific macro to align a stack pointer (downwards). */ +#define STACK_ALIGNBYTES (16UL - 1) +#define ALIGNBYTES32 __BIGGEST_ALIGNMENT__ + +#define NKMEMPAGES_MIN_DEFAULT ((128UL * 1024 * 1024) >> PAGE_SHIFT) +#define NKMEMPAGES_MAX_UNLIMITED 1 + +#define PGSHIFT 12 +#define NBPG (1 << PGSHIFT) +#define PGOFSET (NBPG - 1) + +#define UPAGES 2 +#define USPACE (UPAGES << PGSHIFT) +#define USPACE_ALIGN NBPG + +/* + * Constants related to network buffer management. + * MCLBYTES must be no larger than NBPG (the software page size), and + * NBPG % MCLBYTES must be zero. + */ +#define MSIZE 512 /* size of an mbuf */ + +#ifndef MCLSHIFT +#define MCLSHIFT 11 /* convert bytes to m_buf clusters */ + /* 2K cluster can hold Ether frame */ +#endif /* MCLSHIFT */ + +#define MCLBYTES (1 << MCLSHIFT) /* size of a m_buf cluster */ + +#ifndef MSGBUFSIZE +#define MSGBUFSIZE 65536 /* default message buffer size */ +#endif + +#define MAXCPUS 32 + +#ifdef _KERNEL +void delay(unsigned long); +#define DELAY(x) delay(x) +#endif + +#define riscv_btop(x) ((unsigned long)(x) >> PGSHIFT) +#define riscv_ptob(x) ((unsigned long)(x) << PGSHIFT) + + +#endif /* _RISCV_PARAM_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/riscv/pcb.h b/lib/libc/include/generic-netbsd/riscv/pcb.h @@ -0,0 +1,55 @@ +/* $NetBSD: pcb.h,v 1.3 2024/08/04 08:16:25 skrll Exp $ */ + +/*- + * Copyright (c) 2014 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Matt Thomas of 3am Software Foundry. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _RISCV_PCB_H_ +#define _RISCV_PCB_H_ + +#include <riscv/reg.h> + +struct pcb_faultinfo { + void *pfi_faultptep; + vaddr_t pfi_faultaddr; + u_int pfi_repeats; + pid_t pfi_lastpid; + uint8_t pfi_cause; +}; + +struct pcb { + struct fpreg pcb_fpregs; + struct pcb_faultinfo pcb_faultinfo; +}; + +struct md_coredump { + struct reg reg; + struct fpreg fpreg; +}; + +#endif /* _RISCV_PCB_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/riscv/pmap.h b/lib/libc/include/generic-netbsd/riscv/pmap.h @@ -0,0 +1,263 @@ +/* $NetBSD: pmap.h,v 1.24.2.2 2026/04/02 18:13:22 martin Exp $ */ + +/* + * Copyright (c) 2014, 2019, 2021 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Matt Thomas (of 3am Software Foundry), Maxime Villard, and + * Nick Hudson. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _RISCV_PMAP_H_ +#define _RISCV_PMAP_H_ + +#ifdef _KERNEL_OPT +#include "opt_modular.h" +#endif + +#if !defined(_MODULE) + +#include <sys/cdefs.h> +#include <sys/types.h> +#include <sys/pool.h> +#include <sys/evcnt.h> + +#include <uvm/uvm_physseg.h> +#include <uvm/pmap/vmpagemd.h> + +#include <riscv/pte.h> +#include <riscv/sysreg.h> + +#define PMAP_SEGTABSIZE NPTEPG +#define PMAP_PDETABSIZE NPTEPG + +#ifdef _LP64 +#define PTPSHIFT 3 +/* This is SV57. */ +//#define XSEGSHIFT (SEGSHIFT + SEGLENGTH + SEGLENGTH + SEGLENGTH) + +/* This is SV48. */ +//#define XSEGSHIFT (SEGSHIFT + SEGLENGTH + SEGLENGTH) + +/* This is SV39. */ +#define XSEGSHIFT (SEGSHIFT + SEGLENGTH) +#define NBXSEG (1ULL << XSEGSHIFT) +#define XSEGOFSET (NBXSEG - 1) /* byte offset into xsegment */ +#define XSEGLENGTH (PGSHIFT - 3) +#define NXSEGPG (1 << XSEGLENGTH) +#else +#define PTPSHIFT 2 +#define XSEGSHIFT SEGSHIFT +#endif + +#define SEGLENGTH (PGSHIFT - PTPSHIFT) +#define SEGSHIFT (SEGLENGTH + PGSHIFT) +#define NBSEG (1 << SEGSHIFT) /* bytes/segment */ +#define SEGOFSET (NBSEG - 1) /* byte offset into segment */ + +#define KERNEL_PID 0 + +#define PMAP_HWPAGEWALKER 1 +#define PMAP_TLB_MAX 1 +#define PMAP_TLB_ALWAYS_ASIDS false +#ifdef _LP64 +#define PMAP_INVALID_PDETAB_ADDRESS ((pmap_pdetab_t *)(VM_MIN_KERNEL_ADDRESS - PAGE_SIZE)) +#define PMAP_INVALID_SEGTAB_ADDRESS ((pmap_segtab_t *)(VM_MIN_KERNEL_ADDRESS - PAGE_SIZE)) +#else +#define PMAP_INVALID_PDETAB_ADDRESS ((pmap_pdetab_t *)0xdeadbeef) +#define PMAP_INVALID_SEGTAB_ADDRESS ((pmap_segtab_t *)0xdeadbeef) +#endif +#define PMAP_TLB_NUM_PIDS (__SHIFTOUT_MASK(SATP_ASID) + 1) +#define PMAP_TLB_BITMAP_LENGTH PMAP_TLB_NUM_PIDS +#define PMAP_TLB_FLUSH_ASID_ON_RESET true + +#define pmap_phys_address(x) (x) + +#ifndef __BSD_PTENTRY_T__ +#define __BSD_PTENTRY_T__ +#ifdef _LP64 +#define PRIxPTE PRIx64 +#else +#define PRIxPTE PRIx32 +#endif +#endif /* __BSD_PTENTRY_T__ */ + +#define PMAP_NEED_PROCWR +static inline void +pmap_procwr(struct proc *p, vaddr_t va, vsize_t len) +{ + __asm __volatile("fence\trw,rw; fence.i" ::: "memory"); +} + +#include <uvm/pmap/tlb.h> +#include <uvm/pmap/pmap_devmap.h> +#include <uvm/pmap/pmap_tlb.h> +#include <uvm/pmap/pmap_synci.h> + +#define PMAP_GROWKERNEL +#define PMAP_STEAL_MEMORY + +#ifdef _KERNEL + +#define __HAVE_PMAP_MD +struct pmap_md { + paddr_t md_ppn; +}; + +static inline void +pmap_md_icache_sync_all(void) +{ +} + +static inline void +pmap_md_icache_sync_range_index(vaddr_t va, vsize_t size) +{ +} + +struct vm_page * + pmap_md_alloc_poolpage(int); +vaddr_t pmap_md_map_poolpage(paddr_t, vsize_t); +void pmap_md_unmap_poolpage(vaddr_t, vsize_t); + +bool pmap_md_direct_mapped_vaddr_p(vaddr_t); +paddr_t pmap_md_direct_mapped_vaddr_to_paddr(vaddr_t); +vaddr_t pmap_md_direct_map_paddr(paddr_t); +void pmap_md_init(void); +bool pmap_md_io_vaddr_p(vaddr_t); +bool pmap_md_ok_to_steal_p(const uvm_physseg_t, size_t); +void pmap_md_pdetab_init(struct pmap *); +void pmap_md_pdetab_fini(struct pmap *); +void pmap_md_tlb_info_attach(struct pmap_tlb_info *, struct cpu_info *); +void pmap_md_xtab_activate(struct pmap *, struct lwp *); +void pmap_md_xtab_deactivate(struct pmap *); + +void pmap_pte_xmae(void); +void pmap_bootstrap(vaddr_t, vaddr_t); + +vsize_t pmap_kenter_range(vaddr_t, paddr_t, vsize_t, vm_prot_t, u_int); + +#ifdef _LP64 +extern vaddr_t pmap_direct_base; +extern vaddr_t pmap_direct_end; +#define PMAP_DIRECT_MAP(pa) RISCV_PA_TO_KVA(pa) +#define PMAP_DIRECT_UNMAP(va) RISCV_KVA_TO_PA(va) + +/* + * Other hooks for the pool allocator. + */ +#define POOL_PHYSTOV(pa) RISCV_PA_TO_KVA((paddr_t)(pa)) +#define POOL_VTOPHYS(va) RISCV_KVA_TO_PA((vaddr_t)(va)) + +#endif /* _LP64 */ + +#define MEGAPAGE_TRUNC(x) ((x) & ~SEGOFSET) +#define MEGAPAGE_ROUND(x) MEGAPAGE_TRUNC((x) + SEGOFSET) + +#define PMAP_DEV __BIT(29) /* 0x2000_0000 */ + +#define DEVMAP_ALIGN(x) MEGAPAGE_TRUNC((x)) +#define DEVMAP_SIZE(x) MEGAPAGE_ROUND((x)) +#define DEVMAP_FLAGS PMAP_DEV + +#ifdef __PMAP_PRIVATE + +static inline bool +pmap_md_tlb_check_entry(void *ctx, vaddr_t va, tlb_asid_t asid, pt_entry_t pte) +{ + // TLB not walked and so not called. + return false; +} + +static inline void +pmap_md_page_syncicache(struct vm_page_md *mdpg, const kcpuset_t *onproc) +{ + __asm __volatile("fence\trw,rw; fence.i" ::: "memory"); +} + +/* + * Virtual Cache Alias helper routines. Not a problem for RISCV CPUs. + */ +static inline bool +pmap_md_vca_add(struct vm_page_md *mdpg, vaddr_t va, pt_entry_t *nptep) +{ + return false; +} + +static inline void +pmap_md_vca_remove(struct vm_page_md *mdpg, vaddr_t va) +{ +} + +static inline void +pmap_md_vca_clean(struct vm_page_md *mdpg, vaddr_t va, int op) +{ +} + +static inline size_t +pmap_md_tlb_asid_max(void) +{ + const register_t satp = csr_satp_read(); + const register_t test = satp | SATP_ASID; + + csr_satp_write(test); + + const register_t ret = __SHIFTOUT(csr_satp_read(), SATP_ASID); + csr_satp_write(satp); + + KASSERT(ret < PMAP_TLB_NUM_PIDS); + return ret; +} + +static inline pt_entry_t * +pmap_md_nptep(pt_entry_t *ptep) +{ + return ptep + 1; +} + +#endif /* __PMAP_PRIVATE */ +#endif /* _KERNEL */ + +#include <uvm/pmap/pmap.h> + +#endif /* !_MODULE */ + +#if defined(MODULAR) || defined(_MODULE) +/* + * Define a compatible vm_page_md so that struct vm_page is the same size + * whether we are using modules or not. + */ +#ifndef __HAVE_VM_PAGE_MD +#define __HAVE_VM_PAGE_MD + +struct vm_page_md { + uintptr_t mdpg_dummy[3]; +}; +__CTASSERT(sizeof(struct vm_page_md) == sizeof(uintptr_t)*3); + +#endif /* !__HAVE_VM_PAGE_MD */ + +#endif /* MODULAR || _MODULE */ + +#endif /* !_RISCV_PMAP_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/riscv/proc.h b/lib/libc/include/generic-netbsd/riscv/proc.h @@ -0,0 +1,76 @@ +/* $NetBSD: proc.h,v 1.6 2024/08/04 08:16:25 skrll Exp $ */ + +/*- + * Copyright (c) 2014 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Matt Thomas of 3am Software Foundry. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _RISCV_PROC_H_ +#define _RISCV_PROC_H_ + +#include <sys/param.h> +#include <riscv/vmparam.h> + +struct lwp; + +/* + * Machine-dependent part of the lwp structure for RISCV + */ +struct trapframe; + +struct mdlwp { + struct trapframe *md_utf; /* trapframe from userspace */ + struct trapframe *md_ktf; /* trapframe from userspace */ + struct faultbuf *md_onfault; /* registers to store on fault */ + unsigned long md_usp; /* for locore.S */ + unsigned long md_ss_addr; /* single step address for ptrace */ + int md_ss_instr; /* single step instruction for ptrace */ + volatile int md_astpending; /* AST pending on return to userland */ +#if 0 +#if USPACE > PAGE_SIZE + int md_upte[USPACE/4096]; /* ptes for mapping u page */ +#else + int md_dpte[USPACE/4096]; /* dummy ptes to keep the same */ +#endif +#endif +}; + +struct mdproc { + /* syscall entry for this process */ + void (*md_syscall)(struct trapframe *); +}; + +#ifdef _KERNEL +#define LWP0_CPU_INFO &cpu_info_store[0] /* staticly set in lwp0 */ +#if 0 +#define LWP0_MD_INITIALIZER { \ + .md_utf = (void *)0xdeadbeef, \ + } +#endif +#endif /* _KERNEL */ + +#endif /* _RISCV_PROC_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/riscv/profile.h b/lib/libc/include/generic-netbsd/riscv/profile.h @@ -0,0 +1,117 @@ +/* $NetBSD: profile.h,v 1.1.60.1 2026/04/02 15:59:59 martin Exp $ */ + +/*- + * Copyright (c) 2014 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Matt Thomas of 3am Software Foundry. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _RISCV_PROFILE_H_ +#define _RISCV_PROFILE_H_ + +#include <machine/sysreg.h> + +#define _MCOUNT_DECL void mcount + +#define MCOUNT_ASM_NAME "_mcount" +#define PLTSYM + +#ifdef _LP64 +#define MCOUNT MCOUNT_ARCH("8", "sd", "ld") +#else +#define MCOUNT MCOUNT_ARCH("4", "sw", "lw") +#endif + +#ifdef __PIC__ +#define _PLT "@plt" +#else +#define _PLT /* nothing */ +#endif + + +#define MCOUNT_ARCH(_SZREG, _REG_S, _REG_L) __asm( \ +" .text\n" \ +" .align 2\n" \ +" .type " MCOUNT_ASM_NAME ",@function\n" \ +" .global " MCOUNT_ASM_NAME "\n" \ +MCOUNT_ASM_NAME ":\n" \ + /* \ + * Preserve registers that could be trashed during mcount, i.e. \ + * caller saved registers. \ + */ \ +" addi sp, sp, -(16 * " _SZREG ")\n" \ +" " _REG_S " ra, ( 0 * " _SZREG ")(sp)\n" \ +" " _REG_S " t0, ( 1 * " _SZREG ")(sp)\n" \ +" " _REG_S " t1, ( 2 * " _SZREG ")(sp)\n" \ +" " _REG_S " t2, ( 3 * " _SZREG ")(sp)\n" \ +" " _REG_S " a0, ( 4 * " _SZREG ")(sp)\n" \ +" " _REG_S " a1, ( 5 * " _SZREG ")(sp)\n" \ +" " _REG_S " a2, ( 6 * " _SZREG ")(sp)\n" \ +" " _REG_S " a3, ( 7 * " _SZREG ")(sp)\n" \ +" " _REG_S " a4, ( 8 * " _SZREG ")(sp)\n" \ +" " _REG_S " a5, ( 9 * " _SZREG ")(sp)\n" \ +" " _REG_S " a6, (10 * " _SZREG ")(sp)\n" \ +" " _REG_S " a7, (11 * " _SZREG ")(sp)\n" \ +" " _REG_S " t3, (12 * " _SZREG ")(sp)\n" \ +" " _REG_S " t4, (13 * " _SZREG ")(sp)\n" \ +" " _REG_S " t5, (14 * " _SZREG ")(sp)\n" \ +" " _REG_S " t6, (15 * " _SZREG ")(sp)\n" \ +" mv a1, ra\n" \ +" call mcount " _PLT "\n" \ + /* restore caller saved registers */ \ +" " _REG_L " ra, ( 0 * " _SZREG ")(sp)\n" \ +" " _REG_L " t0, ( 1 * " _SZREG ")(sp)\n" \ +" " _REG_L " t1, ( 2 * " _SZREG ")(sp)\n" \ +" " _REG_L " t2, ( 3 * " _SZREG ")(sp)\n" \ +" " _REG_L " a0, ( 4 * " _SZREG ")(sp)\n" \ +" " _REG_L " a1, ( 5 * " _SZREG ")(sp)\n" \ +" " _REG_L " a2, ( 6 * " _SZREG ")(sp)\n" \ +" " _REG_L " a3, ( 7 * " _SZREG ")(sp)\n" \ +" " _REG_L " a4, ( 8 * " _SZREG ")(sp)\n" \ +" " _REG_L " a5, ( 9 * " _SZREG ")(sp)\n" \ +" " _REG_L " a6, (10 * " _SZREG ")(sp)\n" \ +" " _REG_L " a7, (11 * " _SZREG ")(sp)\n" \ +" " _REG_L " t3, (12 * " _SZREG ")(sp)\n" \ +" " _REG_L " t4, (13 * " _SZREG ")(sp)\n" \ +" " _REG_L " t5, (14 * " _SZREG ")(sp)\n" \ +" " _REG_L " t6, (15 * " _SZREG ")(sp)\n" \ +" addi sp, sp, (16 * " _SZREG ")\n" \ +" jr ra\n"); + + +#ifdef _KERNEL + +#define MCOUNT_ENTER \ + s = (csr_sstatus_read() & SR_SIE) != 0; \ + csr_sstatus_clear(SR_SIE); // DISABLE_INTERRUPTS + +#define MCOUNT_EXIT \ + if (s) \ + csr_sstatus_set(SR_SIE); // ENABLE_INTERRUPTS + +#endif + +#endif /* _RISCV_PROFILE_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/riscv/pte.h b/lib/libc/include/generic-netbsd/riscv/pte.h @@ -0,0 +1,347 @@ +/* $NetBSD: pte.h,v 1.14.2.2 2025/10/26 12:28:36 martin Exp $ */ + +/* + * Copyright (c) 2014, 2019, 2021 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Matt Thomas (of 3am Software Foundry), Maxime Villard, and + * Nick Hudson. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _RISCV_PTE_H_ +#define _RISCV_PTE_H_ + +#ifdef _LP64 /* Sv39 */ +#define PTE_PPN __BITS(53, 10) +#define PTE_PPN0 __BITS(18, 10) +#define PTE_PPN1 __BITS(27, 19) +#define PTE_PPN2 __BITS(53, 28) +typedef uint64_t pt_entry_t; +typedef uint64_t pd_entry_t; +#define atomic_cas_pte atomic_cas_64 +#else /* Sv32 */ +#define PTE_PPN __BITS(31, 10) +#define PTE_PPN0 __BITS(19, 10) +#define PTE_PPN1 __BITS(31, 20) +typedef uint32_t pt_entry_t; +typedef uint32_t pd_entry_t; +#define atomic_cas_pte atomic_cas_32 +#endif + +#define PTE_PPN_SHIFT 10 + +#define NPTEPG (NBPG / sizeof(pt_entry_t)) +#define NSEGPG NPTEPG +#define NPDEPG NPTEPG + + +/* HardWare PTE bits SV39 */ +#define PTE_N __BIT(63) // Svnapot +#define PTE_PBMT __BITS(62, 61) // Svpbmt +#define PTE_reserved0 __BITS(60, 54) // + +/* + * Svpbmt (Page Based Memory Types) extension: + * + * PMA --> adhere to physical memory attributes + * NC --> non-cacheable, idempotent, weakly-ordered + * IO --> non-cacheable, non-idempotent, strongly-ordered + */ +#define PTE_PBMT_PMA __SHIFTIN(0, PTE_PBMT) +#define PTE_PBMT_NC __SHIFTIN(1, PTE_PBMT) +#define PTE_PBMT_IO __SHIFTIN(2, PTE_PBMT) + +/* XTheadMae (Memory Attribute Extensions) */ +#define PTE_XMAE __BITS(63,59) +#define PTE_XMAE_SO __BIT(63) // Strong Order +#define PTE_XMAE_C __BIT(62) // Cacheable +#define PTE_XMAE_B __BIT(61) // Bufferable +#define PTE_XMAE_SH __BIT(60) // Shareable +#define PTE_XMAE_T __BIT(59) // Trustable + +/* + * Map to the rough PBMT equivalent: + * + * PMA (i.e. no specific attribute) --> C B SH + * NC --> B SH + * IO --> SO SH + */ +#define PTE_XMAE_PMA ( PTE_XMAE_C | PTE_XMAE_B | PTE_XMAE_SH) +#define PTE_XMAE_NC ( PTE_XMAE_B | PTE_XMAE_SH) +#define PTE_XMAE_IO (PTE_XMAE_SO | PTE_XMAE_SH) + +/* Software PTE bits. */ +#define PTE_RSW __BITS(9, 8) +#define PTE_WIRED __BIT(9) + +/* Hardware PTE bits. */ +// These are hardware defined bits +#define PTE_D __BIT(7) // Dirty +#define PTE_A __BIT(6) // Accessed +#define PTE_G __BIT(5) // Global +#define PTE_U __BIT(4) // User +#define PTE_X __BIT(3) // eXecute +#define PTE_W __BIT(2) // Write +#define PTE_R __BIT(1) // Read +#define PTE_V __BIT(0) // Valid + +#define PTE_HARDWIRED (PTE_A | PTE_D) +#define PTE_USER (PTE_V | PTE_U) +#define PTE_KERN (PTE_V | PTE_G) +#define PTE_RW (PTE_R | PTE_W) +#define PTE_RX (PTE_R | PTE_X) +#define PTE_RWX (PTE_R | PTE_W | PTE_X) + +#define PTE_ISLEAF_P(pte) (((pte) & PTE_RWX) != 0) + +#define PA_TO_PTE(pa) (((pa) >> PGSHIFT) << PTE_PPN_SHIFT) +#define PTE_TO_PA(pte) (__SHIFTOUT((pte), PTE_PPN) << PGSHIFT) + +#if defined(_KERNEL) + +static inline bool +pte_valid_p(pt_entry_t pte) +{ + return (pte & PTE_V) != 0; +} + +static inline bool +pte_wired_p(pt_entry_t pte) +{ + return (pte & PTE_WIRED) != 0; +} + +static inline bool +pte_modified_p(pt_entry_t pte) +{ + return (pte & PTE_D) != 0; +} + +static inline bool +pte_cached_p(pt_entry_t pte) +{ + /* TODO: This seems wrong... */ + return true; +} + +static inline bool +pte_deferred_exec_p(pt_entry_t pte) +{ + return false; +} + +static inline pt_entry_t +pte_wire_entry(pt_entry_t pte) +{ + return pte | PTE_HARDWIRED | PTE_WIRED; +} + +static inline pt_entry_t +pte_unwire_entry(pt_entry_t pte) +{ + return pte & ~(PTE_HARDWIRED | PTE_WIRED); +} + +static inline paddr_t +pte_to_paddr(pt_entry_t pte) +{ + return PTE_TO_PA(pte); +} + +static inline pt_entry_t +pte_nv_entry(bool kernel_p) +{ + return 0; +} + +static inline pt_entry_t +pte_prot_nowrite(pt_entry_t pte) +{ + return pte & ~PTE_W; +} + +static inline pt_entry_t +pte_prot_downgrade(pt_entry_t pte, vm_prot_t newprot) +{ + if ((newprot & VM_PROT_READ) == 0) + pte &= ~PTE_R; + if ((newprot & VM_PROT_WRITE) == 0) + pte &= ~PTE_W; + if ((newprot & VM_PROT_EXECUTE) == 0) + pte &= ~PTE_X; + return pte; +} + +static inline pt_entry_t +pte_prot_bits(struct vm_page_md *mdpg, vm_prot_t prot, bool kernel_p) +{ + KASSERT(prot & VM_PROT_READ); + pt_entry_t pte = PTE_R; + + if (prot & VM_PROT_EXECUTE) { + pte |= PTE_X; + } + if (prot & VM_PROT_WRITE) { + pte |= PTE_W; + } + + return pte; +} + +static inline pt_entry_t +pte_flag_bits(struct vm_page_md *mdpg, int flags, bool kernel_p) +{ + return 0; +} + +#ifdef _LP64 +pt_entry_t pte_enter_flags_to_pbmt(int); +#else +static inline pt_entry_t +pte_enter_flags_to_pbmt(int flags) +{ + return 0; +}; +#endif + +static inline pt_entry_t +pte_make_enter(paddr_t pa, struct vm_page_md *mdpg, vm_prot_t prot, + int flags, bool kernel_p) +{ + pt_entry_t pte = (pt_entry_t)PA_TO_PTE(pa); + + pte |= kernel_p ? PTE_KERN : PTE_USER; + pte |= pte_flag_bits(mdpg, flags, kernel_p); + pte |= pte_prot_bits(mdpg, prot, kernel_p); + pte |= pte_enter_flags_to_pbmt(flags); + + if (mdpg != NULL) { + + if ((prot & VM_PROT_WRITE) != 0 && + ((flags & VM_PROT_WRITE) != 0 || VM_PAGEMD_MODIFIED_P(mdpg))) { + /* + * This is a writable mapping, and the page's mod state + * indicates it has already been modified. No need for + * modified emulation. + */ + pte |= PTE_A | PTE_D; + } else if ((flags & VM_PROT_ALL) || VM_PAGEMD_REFERENCED_P(mdpg)) { + /* + * - The access type indicates that we don't need to do + * referenced emulation. + * OR + * - The physical page has already been referenced so no need + * to re-do referenced emulation here. + */ + pte |= PTE_A; + } + } else { + pte |= PTE_A | PTE_D; + } + + return pte; +} + +static inline pt_entry_t +pte_make_kenter_pa(paddr_t pa, struct vm_page_md *mdpg, vm_prot_t prot, + int flags) +{ + pt_entry_t pte = (pt_entry_t)PA_TO_PTE(pa); + + pte |= PTE_KERN | PTE_HARDWIRED | PTE_WIRED; + pte |= pte_flag_bits(NULL, flags, true); + pte |= pte_prot_bits(NULL, prot, true); + pte |= pte_enter_flags_to_pbmt(flags); + + return pte; +} + +static inline void +pte_set(pt_entry_t *ptep, pt_entry_t pte) +{ + *ptep = pte; +} + +static inline pd_entry_t +pte_invalid_pde(void) +{ + return 0; +} + +static inline pd_entry_t +pte_pde_pdetab(paddr_t pa, bool kernel_p) +{ + return PTE_V | PA_TO_PTE(pa); +} + +static inline pd_entry_t +pte_pde_ptpage(paddr_t pa, bool kernel_p) +{ + return PTE_V | PA_TO_PTE(pa); +} + +static inline bool +pte_pde_valid_p(pd_entry_t pde) +{ + return (pde & (PTE_X | PTE_W | PTE_R | PTE_V)) == PTE_V; +} + +static inline paddr_t +pte_pde_to_paddr(pd_entry_t pde) +{ + return pte_to_paddr((pt_entry_t)pde); +} + +static inline pd_entry_t +pte_pde_cas(pd_entry_t *pdep, pd_entry_t opde, pt_entry_t npde) +{ +#ifdef MULTIPROCESSOR +#ifdef _LP64 + return atomic_cas_64(pdep, opde, npde); +#else + return atomic_cas_32(pdep, opde, npde); +#endif +#else + *pdep = npde; + return 0; +#endif +} + +static inline void +pte_pde_set(pd_entry_t *pdep, pd_entry_t npde) +{ + + *pdep = npde; +} + +static inline pt_entry_t +pte_value(pt_entry_t pte) +{ + return pte; +} + +#endif /* _KERNEL */ + +#endif /* _RISCV_PTE_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/riscv/ptrace.h b/lib/libc/include/generic-netbsd/riscv/ptrace.h @@ -0,0 +1,63 @@ +/* $NetBSD: ptrace.h,v 1.6 2024/05/03 07:11:14 skrll Exp $ */ + +/*- + * Copyright (c) 2014 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Matt Thomas of 3am Software Foundry. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _RISCV_PTRACE_H_ +#define _RISCV_PTRACE_H_ + +/* + * RISCV-dependent ptrace definitions. + * Note that PT_STEP is _not_ supported. + */ +#define PT_GETREGS (PT_FIRSTMACH + 0) +#define PT_SETREGS (PT_FIRSTMACH + 1) +#define PT_GETFPREGS (PT_FIRSTMACH + 2) +#define PT_SETFPREGS (PT_FIRSTMACH + 3) + +#define PT_MACHDEP_STRINGS \ + "PT_GETREGS", \ + "PT_SETREGS", \ + "PT_GETFPREGS", \ + "PT_SETFPREGS" + +#include <machine/reg.h> +#define PTRACE_REG_PC(r) (r)->r_pc +#define PTRACE_REG_FP(r) (r)->r_reg[_X_S0] +#define PTRACE_REG_SET_PC(r, v) (r)->r_pc = (v) +#define PTRACE_REG_SP(r) (r)->r_reg[_X_SP] +#define PTRACE_REG_INTRV(r) (r)->r_reg[_X_A0] + +#define PTRACE_ILLEGAL_ASM __asm __volatile("c.unimp" ::: "memory") + +#define PTRACE_BREAKPOINT ((const uint8_t[]) { 0x02, 0x90 }) +#define PTRACE_BREAKPOINT_ASM __asm __volatile("c.ebreak" ::: "memory") +#define PTRACE_BREAKPOINT_SIZE 2 + +#endif /* _RISCV_PTRACE_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/riscv/reg.h b/lib/libc/include/generic-netbsd/riscv/reg.h @@ -0,0 +1,125 @@ +/* $NetBSD: reg.h,v 1.10 2022/12/13 22:25:08 skrll Exp $ */ + +/*- + * Copyright (c) 2014 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Matt Thomas of 3am Software Foundry. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _RISCV_REG_H_ +#define _RISCV_REG_H_ + +// x0 = 0 +// x1 = ra (return address) Caller +// x2 = sp (stack pointer) Callee +// x3 = gp (global pointer) +// x4 = tp (thread pointer) +// x5 - x7 = t0 - t2 (temporary) Caller +// x8 = s0/fp (saved register / frame pointer) Callee +// x9 = s1 (saved register) Callee +// x10 - x11 = a0 - a1 (arguments/return values) Caller +// x12 - x17 = a2 - a7 (arguments) Caller +// x18 - x27 = s2 - s11 (saved registers) Callee +// x28 - x31 = t3 - t6 (temporaries) Caller + +struct reg { // synced with register_t in <riscv/types.h> +#ifdef _LP64 + __uint64_t r_reg[31]; /* x0 is always 0 */ + __uint64_t r_pc; +#else + __uint32_t r_reg[31]; /* x0 is always 0 */ + __uint32_t r_pc; +#endif +}; + +#ifdef _LP64 +struct reg32 { // synced with register_t in <riscv/types.h> + __uint32_t r_reg[31]; /* x0 is always 0 */ + __uint32_t r_pc; +}; +#endif + +#define _XREG(n) ((n) - 1) +#define _X_RA _XREG(1) +#define _X_SP _XREG(2) +#define _X_GP _XREG(3) +#define _X_TP _XREG(4) +#define _X_T0 _XREG(5) +#define _X_T1 _XREG(6) +#define _X_T2 _XREG(7) +#define _X_S0 _XREG(8) +#define _X_S1 _XREG(9) +#define _X_A0 _XREG(10) +#define _X_A1 _XREG(11) +#define _X_A2 _XREG(12) +#define _X_A3 _XREG(13) +#define _X_A4 _XREG(14) +#define _X_A5 _XREG(15) +#define _X_A6 _XREG(16) +#define _X_A7 _XREG(17) +#define _X_S2 _XREG(18) +#define _X_S3 _XREG(19) +#define _X_S4 _XREG(20) +#define _X_S5 _XREG(21) +#define _X_S6 _XREG(22) +#define _X_S7 _XREG(23) +#define _X_S8 _XREG(24) +#define _X_S9 _XREG(25) +#define _X_S10 _XREG(26) +#define _X_S11 _XREG(27) +#define _X_T3 _XREG(28) +#define _X_T4 _XREG(29) +#define _X_T5 _XREG(30) +#define _X_T6 _XREG(31) + +// f0 - f7 = ft0 - ft7 (FP temporaries) Caller +// following layout is similar to integer registers above +// f8 - f9 = fs0 - fs1 (FP saved registers) Callee +// f10 - f11 = fa0 - fa1 (FP arguments/return values) Caller +// f12 - f17 = fa2 - fa7 (FP arguments) Caller +// f18 - f27 = fs2 - fa11 (FP saved registers) Callee +// f28 - f31 = ft8 - ft11 (FP temporaries) Caller + +/* + * This fragment is common to <riscv/mcontext.h> and <riscv/reg.h> + */ +#ifndef _BSD_FPREG_T_ +union __fpreg { + __uint64_t u_u64; + double u_d; +}; +#define _BSD_FPREG_T_ union __fpreg +#endif + +/* + * 32 double precision floating point, 1 CSR + */ +struct fpreg { + _BSD_FPREG_T_ r_fpreg[33]; +}; +#define r_fcsr r_fpreg[32].u_u64 + +#endif /* _RISCV_REG_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/riscv/rwlock.h b/lib/libc/include/generic-netbsd/riscv/rwlock.h @@ -0,0 +1 @@ +/* $NetBSD: rwlock.h,v 1.2 2019/11/29 20:04:53 riastradh Exp $ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/riscv/setjmp.h b/lib/libc/include/generic-netbsd/riscv/setjmp.h @@ -0,0 +1,70 @@ +/* $NetBSD: setjmp.h,v 1.2 2015/03/27 06:57:21 matt Exp $ */ + +/*- + * Copyright (c) 2014 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Matt Thomas of 3am Software Foundry. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + + /* magic + 16 reg + 1 fcsr + 12 fp + 4 sigmask + 8 spare */ +#define _JBLEN (_JB_SIGMASK + 4 + 8) +#define _JB_MAGIC 0 +#define _JB_RA 1 +#define _JB_SP 2 +#define _JB_GP 3 +#define _JB_TP 4 +#define _JB_S0 5 +#define _JB_S1 6 +#define _JB_S2 7 +#define _JB_S3 8 +#define _JB_S4 9 +#define _JB_S5 10 +#define _JB_S6 11 +#define _JB_S7 12 +#define _JB_S8 13 +#define _JB_S9 14 +#define _JB_S10 15 +#define _JB_S11 16 +#define _JB_FCSR 17 + +#define _JB_FS0 18 +#define _JB_FS1 (_JB_FS0 + sizeof(double) / sizeof(_BSD_JBSLOT_T_)) +#define _JB_FS2 (_JB_FS1 + sizeof(double) / sizeof(_BSD_JBSLOT_T_)) +#define _JB_FS3 (_JB_FS2 + sizeof(double) / sizeof(_BSD_JBSLOT_T_)) +#define _JB_FS4 (_JB_FS3 + sizeof(double) / sizeof(_BSD_JBSLOT_T_)) +#define _JB_FS5 (_JB_FS4 + sizeof(double) / sizeof(_BSD_JBSLOT_T_)) +#define _JB_FS6 (_JB_FS5 + sizeof(double) / sizeof(_BSD_JBSLOT_T_)) +#define _JB_FS7 (_JB_FS6 + sizeof(double) / sizeof(_BSD_JBSLOT_T_)) +#define _JB_FS8 (_JB_FS7 + sizeof(double) / sizeof(_BSD_JBSLOT_T_)) +#define _JB_FS9 (_JB_FS8 + sizeof(double) / sizeof(_BSD_JBSLOT_T_)) +#define _JB_FS10 (_JB_FS9 + sizeof(double) / sizeof(_BSD_JBSLOT_T_)) +#define _JB_FS11 (_JB_FS10 + sizeof(double) / sizeof(_BSD_JBSLOT_T_)) + +#define _JB_SIGMASK (_JB_FS11 + sizeof(double) / sizeof(_BSD_JBSLOT_T_)) + +#ifndef _BSD_JBSLOT_T_ +#define _BSD_JBSLOT_T_ long long +#endif +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/riscv/signal.h b/lib/libc/include/generic-netbsd/riscv/signal.h @@ -0,0 +1,40 @@ +/* $NetBSD: signal.h,v 1.1 2014/09/19 17:36:26 matt Exp $ */ + +/*- + * Copyright (c) 2014 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Matt Thomas of 3am Software Foundry. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _RISCV_SIGNAL_H_ +#define _RISCV_SIGNAL_H_ + +#ifndef _LOCORE +// zig patch: Clang does not define __SIG_ATOMIC_TYPE__ +typedef int sig_atomic_t; +#endif + +#endif /* _RISCV_SIGNAL_H_ */ diff --git a/lib/libc/include/generic-netbsd/riscv/sysarch.h b/lib/libc/include/generic-netbsd/riscv/sysarch.h @@ -0,0 +1,3 @@ +/* $NetBSD: sysarch.h,v 1.1 2014/09/19 17:36:26 matt Exp $ */ + +/* nothing */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/riscv/sysreg.h b/lib/libc/include/generic-netbsd/riscv/sysreg.h @@ -0,0 +1,354 @@ +/* $NetBSD: sysreg.h,v 1.33.4.1 2025/10/26 12:26:27 martin Exp $ */ + +/* + * Copyright (c) 2014 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Matt Thomas of 3am Software Foundry. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _RISCV_SYSREG_H_ +#define _RISCV_SYSREG_H_ + +#ifndef _KERNEL +#include <sys/param.h> +#endif + +#include <riscv/reg.h> + +/* CPU vendors (get CSR value from SBI). */ +#define CPU_VENDOR_SIFIVE 0x489 +#define CPU_SIFIVE_ARCH_7SERIES 0x8000000000000007 + +#define CPU_VENDOR_THEAD 0x5b7 + +#define FCSR_FMASK 0 // no exception bits +#define FCSR_FRM __BITS(7, 5) +#define FCSR_FRM_RNE 0b000 // Round Nearest, ties to Even +#define FCSR_FRM_RTZ 0b001 // Round Towards Zero +#define FCSR_FRM_RDN 0b010 // Round DowN (-infinity) +#define FCSR_FRM_RUP 0b011 // Round UP (+infinity) +#define FCSR_FRM_RMM 0b100 // Round to nearest, ties to Max Magnitude +#define FCSR_FRM_DYN 0b111 // Dynamic rounding +#define FCSR_FFLAGS __BITS(4, 0) // Sticky bits +#define FCSR_NV __BIT(4) // iNValid operation +#define FCSR_DZ __BIT(3) // Divide by Zero +#define FCSR_OF __BIT(2) // OverFlow +#define FCSR_UF __BIT(1) // UnderFlow +#define FCSR_NX __BIT(0) // iNeXact + +static inline uint32_t +fcsr_read(void) +{ + uint32_t __fcsr; + asm("frcsr %0" : "=r"(__fcsr) :: "memory"); + return __fcsr; +} + +static inline uint32_t +fcsr_write(uint32_t __new) +{ + uint32_t __old; + asm volatile("fscsr %0, %1" : "=r"(__old) : "r"(__new) : "memory"); + return __old; +} + +static inline uint32_t +fcsr_fflags_read(void) +{ + uint32_t __old; + asm("frflags %0" : "=r"(__old) :: "memory"); + return __old; +} + +static inline uint32_t +fcsr_fflags_write(uint32_t __new) +{ + uint32_t __old; + asm volatile("fsflags %0, %1" : "=r"(__old) : "r"(__new) : "memory"); + return __old; +} + +static inline uint32_t +fcsr_frm_read(void) +{ + uint32_t __old; + asm("frrm\t%0" : "=r"(__old) :: "memory"); + return __old; +} + +static inline uint32_t +fcsr_frm_write(uint32_t __new) +{ + uint32_t __old; + asm volatile("fsrm\t%0, %1" : "=r"(__old) : "r"(__new) : "memory"); + return __old; +} + +#define RISCVREG_READ_INLINE(regname) \ +static inline uintptr_t \ +csr_##regname##_read(void) \ +{ \ + uintptr_t __rv; \ + asm volatile("csrr %0, " #regname : "=r"(__rv) :: "memory"); \ + return __rv; \ +} + +#define RISCVREG_WRITE_INLINE(regname) \ +static inline void \ +csr_##regname##_write(uintptr_t __val) \ +{ \ + asm volatile("csrw " #regname ", %0" :: "r"(__val) : "memory"); \ +} + +#define RISCVREG_SET_INLINE(regname) \ +static inline void \ +csr_##regname##_set(uintptr_t __mask) \ +{ \ + if (__builtin_constant_p(__mask) && __mask < 0x20) { \ + asm volatile("csrsi " #regname ", %0" :: "i"(__mask) : \ + "memory"); \ + } else { \ + asm volatile("csrs " #regname ", %0" :: "r"(__mask) : \ + "memory"); \ + } \ +} + +#define RISCVREG_CLEAR_INLINE(regname) \ +static inline void \ +csr_##regname##_clear(uintptr_t __mask) \ +{ \ + if (__builtin_constant_p(__mask) && __mask < 0x20) { \ + asm volatile("csrci " #regname ", %0" :: "i"(__mask) : \ + "memory"); \ + } else { \ + asm volatile("csrc " #regname ", %0" :: "r"(__mask) : \ + "memory"); \ + } \ +} + +#define RISCVREG_READ_WRITE_INLINE(regname) \ +RISCVREG_READ_INLINE(regname) \ +RISCVREG_WRITE_INLINE(regname) +#define RISCVREG_SET_CLEAR_INLINE(regname) \ +RISCVREG_SET_INLINE(regname) \ +RISCVREG_CLEAR_INLINE(regname) +#define RISCVREG_READ_SET_CLEAR_INLINE(regname) \ +RISCVREG_READ_INLINE(regname) \ +RISCVREG_SET_CLEAR_INLINE(regname) +#define RISCVREG_READ_WRITE_SET_CLEAR_INLINE(regname) \ +RISCVREG_READ_WRITE_INLINE(regname) \ +RISCVREG_SET_CLEAR_INLINE(regname) + +/* Supervisor Status Register */ +RISCVREG_READ_SET_CLEAR_INLINE(sstatus) // supervisor status register +#ifdef _LP64 +#define SR_WPRI __BITS(62, 34) | __BITS(31, 20) | \ + __BIT(17) | __BITS(12, 11) | __BIT(7) | __BITS(4, 2) | \ + __BIT(0) +#define SR_SD __BIT(63) // any of FS or VS or XS dirty + /* Bits 62-34 are WPRI */ +#define SR_UXL __BITS(33, 32) // U-mode XLEN +#define SR_UXL_32 1 // XLEN == 32 +#define SR_UXL_64 2 // XLEN == 64 +#define SR_UXL_128 3 // XLEN == 128 + /* Bits 31-20 are WPRI*/ +#else +#define SR_WPRI __BITS(30, 20) | \ + __BIT(17) | __BITS(12, 11) | __BIT(7) | __BITS(4, 2) | \ + __BIT(0) +#define SR_SD __BIT(31) // any of FS or VS or XS dirty + /* Bits 30-20 are WPRI*/ +#endif /* _LP64 */ + +/* Both RV32 and RV64 have the bottom 20 bits shared */ +#define SR_MXR __BIT(19) // Make eXecutable Readable +#define SR_SUM __BIT(18) // permit Supervisor User Memory access + /* Bit 17 is WPRI */ +#define SR_XS __BITS(16, 15) // Vector extension state +#define SR_XS_OFF 0 // All off +#define SR_XS_SOME_ON 1 // None dirty or clean, some on +#define SR_XS_SOME_CLEAN 2 // None dirty, some clean +#define SR_XS_SOME_DIRTY 3 // Some dirty +#define SR_FS __BITS(14, 13) // Floating-point unit state +#define SR_FS_OFF 0 // Off +#define SR_FS_INITIAL 1 // Initial +#define SR_FS_CLEAN 2 // Clean +#define SR_FS_DIRTY 3 // Dirty + /* Bits 12-11 are WPRI */ +#define SR_VS __BITS(10, 9) // User-mode extension state +#define SR_VS_OFF SR_FS_OFF // Off +#define SR_VS_INITIAL SR_FS_INITIAL // Initial +#define SR_VS_CLEAN SR_FS_CLEAN // Clean +#define SR_VS_DIRTY SR_FS_DIRTY // Dirty +#define SR_SPP __BIT(8) // Priv level before supervisor mode + /* Bit 7 is WPRI */ +#define SR_UBE __BIT(6) // User-mode endianness +#define SR_SPIE __BIT(5) // S-Mode interrupts enabled before trap + /* Bits 4-2 are WPRI */ +#define SR_SIE __BIT(1) // Supervisor mode interrupt enable + /* Bit 0 is WPRI */ + +/* Supervisor interrupt registers */ +/* ... interrupt pending register (sip) */ +RISCVREG_READ_SET_CLEAR_INLINE(sip) // supervisor interrupt pending + /* Bit (XLEN-1) - 10 is WIRI */ +#define SIP_SEIP __BIT(9) // S-mode interrupt pending + /* Bit 8-6 is WIRI */ +#define SIP_STIP __BIT(5) // S-mode timer interrupt pending + /* Bit 4-2 is WIRI */ +#define SIP_SSIP __BIT(1) // S-mode software interrupt pending + /* Bit 0 is WIRI */ + +/* ... interrupt-enable register (sie) */ +RISCVREG_READ_SET_CLEAR_INLINE(sie) // supervisor interrupt enable + /* Bit (XLEN-1) - 10 is WIRI */ +#define SIE_SEIE __BIT(9) // S-mode interrupt enable + /* Bit 8-6 is WIRI */ +#define SIE_STIE __BIT(5) // S-mode timer interrupt enable + /* Bit 4-2 is WIRI */ +#define SIE_SSIE __BIT(1) // S-mode software interrupt enable + /* Bit 0 is WIRI */ + +// U-mode sstatus values +#ifdef _LP64 +#define SR_USER64 (SR_SPIE | __SHIFTIN(SR_UXL_64, SR_UXL)) +#define SR_USER32 (SR_SPIE | __SHIFTIN(SR_UXL_32, SR_UXL)) +#else +#define SR_USER (SR_SPIE) +#endif + +// Cause register +#define CAUSE_INTERRUPT_P(cause) ((cause) & __BIT(XLEN - 1)) +#define CAUSE_CODE(cause) ((cause) & __BITS(XLEN - 2, 0)) + +// Cause register - exceptions +#define CAUSE_FETCH_MISALIGNED 0 +#define CAUSE_FETCH_ACCESS 1 +#define CAUSE_ILLEGAL_INSTRUCTION 2 +#define CAUSE_BREAKPOINT 3 +#define CAUSE_LOAD_MISALIGNED 4 +#define CAUSE_LOAD_ACCESS 5 +#define CAUSE_STORE_MISALIGNED 6 +#define CAUSE_STORE_ACCESS 7 +#define CAUSE_USER_ECALL 8 +#define CAUSE_SYSCALL CAUSE_USER_ECALL /* convenience alias */ +#define CAUSE_SUPERVISOR_ECALL 9 +/* 10 is reserved */ +#define CAUSE_MACHINE_ECALL 11 +#define CAUSE_FETCH_PAGE_FAULT 12 +#define CAUSE_LOAD_PAGE_FAULT 13 +/* 14 is Reserved */ +#define CAUSE_STORE_PAGE_FAULT 15 +/* >= 16 is reserved/custom */ + +// Cause register - interrupts +#define IRQ_SUPERVISOR_SOFTWARE 1 +#define IRQ_VIRTUAL_SUPERVISOR_SOFTWARE 2 +#define IRQ_MACHINE_SOFTWARE 3 +#define IRQ_SUPERVISOR_TIMER 5 +#define IRQ_VIRTUAL_SUPERVISOR_TIMER 6 +#define IRQ_MACHINE_TIMER 7 +#define IRQ_SUPERVISOR_EXTERNAL 9 +#define IRQ_VIRTUAL_SUPERVISOR_EXTERNAL 10 +#define IRQ_MACHINE_EXTERNAL 11 +#define IRQ_SUPERVISOR_GUEST_EXTERNAL 12 +#define IRQ_NSOURCES 16 + +RISCVREG_READ_INLINE(time) +#ifdef _LP64 +RISCVREG_READ_INLINE(cycle) +#else /* !_LP64 */ +static inline uint64_t +csr_cycle_read(void) +{ + uint32_t __hi0, __hi1, __lo0; + do { + asm volatile( + "csrr\t%[__hi0], cycleh" + "\n\t" "csrr\t%[__lo0], cycle" + "\n\t" "csrr\t%[__hi1], cycleh" + : [__hi0] "=r"(__hi0), + [__lo0] "=r"(__lo0), + [__hi1] "=r"(__hi1)); + } while (__hi0 != __hi1); + return + __SHIFTIN(__hi0, __BITS(63, 32)) | + __SHIFTIN(__lo0, __BITS(31, 0)); +} +#endif /* !_LP64 */ + +#ifdef _LP64 +#define SATP_MODE __BITS(63, 60) // Translation mode +#define SATP_MODE_BARE 0 // No translation or protection + /* modes 1-7 reserved for standard use */ +#define SATP_MODE_SV39 8 // Page-based 39-bit virt addr +#define SATP_MODE_SV48 9 // Page-based 48-bit virt addr +#define SATP_MODE_SV57 10 // Page-based 57-bit virt addr +#define SATP_MODE_SV64 11 // Page-based 64-bit virt addr + /* modes 12-13 reserved for standard use */ + /* modes 14-15 designated for custom use */ +#define SATP_ASID __BITS(59, 44) // Address Space Identifier +#define SATP_PPN __BITS(43, 0) // Physical Page Number +#else +#define SATP_MODE __BIT(31) // Translation mode +#define SATP_MODE_BARE 0 // No translation or protection +#define SATP_MODE_SV32 1 // Page-based 32-bit virt addr +#define SATP_ASID __BITS(30, 22) // Address Space Identifier +#define SATP_PPN __BITS(21, 0) // Physical Page Number +#endif + +RISCVREG_READ_WRITE_INLINE(satp) + +/* Fake "ASID" CSR (a field of SATP register) functions */ +static inline uint32_t +csr_asid_read(void) +{ + uintptr_t satp = csr_satp_read(); + return __SHIFTOUT(satp, SATP_ASID); +} + +static inline void +csr_asid_write(uint32_t asid) +{ + uintptr_t satp = csr_satp_read(); + satp &= ~SATP_ASID; + satp |= __SHIFTIN(asid, SATP_ASID); + csr_satp_write(satp); +} + +/* Non-standard CSRs. */ +static inline uintptr_t +csr_thead_sxstatus_read(void) +{ + uintptr_t __rv; + asm volatile("csrr %0, 0x5c0" : "=r"(__rv) :: "memory"); + return __rv; +} + +#define TX_SXSTATUS_MAEE __BIT(21) +#define TH_SXSTATUS_THEADISAEE __BIT(22) + +#endif /* _RISCV_SYSREG_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/riscv/types.h b/lib/libc/include/generic-netbsd/riscv/types.h @@ -0,0 +1,123 @@ +/* $NetBSD: types.h,v 1.19 2024/11/23 18:13:04 skrll Exp $ */ + +/*- + * Copyright (c) 2014 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Matt Thomas of 3am Software Foundry. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _RISCV_TYPES_H_ +#define _RISCV_TYPES_H_ + +#include <sys/cdefs.h> +#include <sys/featuretest.h> +#include <riscv/int_types.h> + +#if defined(_KERNEL) || defined(_KMEMUSER) || defined(_KERNTYPES) || defined(_STANDALONE) + +/* XLEN is the native base integer ISA width */ +#define XLEN (sizeof(long) * NBBY) + +typedef __uint64_t paddr_t; +typedef __uint64_t psize_t; +#define PRIxPADDR PRIx64 +#define PRIxPSIZE PRIx64 +#define PRIuPSIZE PRIu64 + +typedef __UINTPTR_TYPE__ vaddr_t; +typedef __UINTPTR_TYPE__ vsize_t; +#define PRIxVADDR PRIxPTR +#define PRIxVSIZE PRIxPTR +#define PRIuVSIZE PRIuPTR + +#ifdef _LP64 // match <riscv/reg.h> +#define PRIxREGISTER PRIx64 +typedef __int64_t register_t; +typedef __uint64_t uregister_t; +#else +#define PRIxREGISTER PRIx32 +typedef __int32_t register_t; +typedef __uint32_t uregister_t; +#endif +typedef signed int register32_t; +typedef unsigned int uregister32_t; +#define PRIxREGISTER32 "x" + +typedef unsigned int tlb_asid_t; +#endif + +#if defined(_KERNEL) +typedef struct label_t { /* Used by setjmp & longjmp */ + register_t lb_reg[16]; /* */ + __uint32_t lb_sr; +} label_t; +#endif + +typedef unsigned int __cpu_simple_lock_nv_t; +#ifdef _LP64 +typedef __int64_t __register_t; +#else +typedef __int32_t __register_t; +#endif + +#define __SIMPLELOCK_LOCKED 1 +#define __SIMPLELOCK_UNLOCKED 0 + +#define __HAVE_COMMON___TLS_GET_ADDR +#define __HAVE_COMPAT_NETBSD32 +#define __HAVE_CPU_COUNTER +#define __HAVE_CPU_DATA_FIRST +#define __HAVE_CPU_LWP_SETPRIVATE +#if 0 +#define __HAVE_FAST_SOFTINTS // Not yet +#endif +#define __HAVE_MM_MD_DIRECT_MAPPED_PHYS +#define __HAVE_MM_MD_KERNACC +#define __HAVE_NEW_STYLE_BUS_H +#define __HAVE_SYSCALL_INTERN +#define __HAVE_TLS_VARIANT_I +#define __HAVE_UCAS_FULL +/* XXX temporary */ +#define __HAVE_UNLOCKED_PMAP +#define __HAVE___LWP_GETPRIVATE_FAST +#define __HAVE___LWP_GETTCB_FAST +#define __HAVE___LWP_SETTCB + +#ifdef __LP64 +#define __HAVE_ATOMIC64_OPS +#define __HAVE_CPU_UAREA_ROUTINES +#endif + +//#if defined(_KERNEL) +//#define __HAVE_RAS +//#endif + +#if defined(_KERNEL) || defined(_KMEMUSER) +#define PCU_FPU 0 +#define PCU_UNIT_COUNT 1 +#endif + +#endif /* _RISCV_TYPES_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/riscv/vmparam.h b/lib/libc/include/generic-netbsd/riscv/vmparam.h @@ -0,0 +1,236 @@ +/* $NetBSD: vmparam.h,v 1.14 2023/05/07 12:41:48 skrll Exp $ */ + +/*- + * Copyright (c) 2014, 2020 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Matt Thomas of 3am Software Foundry, and Nick Hudson. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _RISCV_VMPARAM_H_ +#define _RISCV_VMPARAM_H_ + +#include <riscv/param.h> + +#ifdef _KERNEL_OPT +#include "opt_multiprocessor.h" +#endif + +/* + * Machine dependent VM constants for RISCV. + */ + +/* + * We use a 4K page on both RV64 and RV32 systems. + * Override PAGE_* definitions to compile-time constants. + */ +#define PAGE_SHIFT PGSHIFT +#define PAGE_SIZE (1 << PAGE_SHIFT) +#define PAGE_MASK (PAGE_SIZE - 1) + +/* + * USRSTACK is the top (end) of the user stack. + * + * USRSTACK needs to start a page below the maxuser address so that a memory + * access with a maximum displacement (0x7ff) won't cross into the kernel's + * address space. We use PAGE_SIZE instead of 0x800 since these need to be + * page-aligned. + */ +#define USRSTACK (VM_MAXUSER_ADDRESS - PAGE_SIZE) /* Start of user stack */ +#define USRSTACK32 ((uint32_t)VM_MAXUSER_ADDRESS32 - PAGE_SIZE) + +/* + * Virtual memory related constants, all in bytes + */ +#ifndef MAXTSIZ +#define MAXTSIZ (128*1024*1024) /* max text size */ +#endif +#ifndef DFLDSIZ +#define DFLDSIZ (256*1024*1024) /* initial data size limit */ +#endif +#ifndef MAXDSIZ +#define MAXDSIZ (1536*1024*1024) /* max data size */ +#endif +#ifndef DFLSSIZ +#define DFLSSIZ (4*1024*1024) /* initial stack size limit */ +#endif +#ifndef MAXSSIZ +#define MAXSSIZ (120*1024*1024) /* max stack size */ +#endif + +/* + * Virtual memory related constants, all in bytes + */ +#ifndef DFLDSIZ32 +#define DFLDSIZ32 DFLDSIZ /* initial data size limit */ +#endif +#ifndef MAXDSIZ32 +#define MAXDSIZ32 MAXDSIZ /* max data size */ +#endif +#ifndef DFLSSIZ32 +#define DFLSSIZ32 DFLTSIZ /* initial stack size limit */ +#endif +#ifndef MAXSSIZ32 +#define MAXSSIZ32 MAXSSIZ /* max stack size */ +#endif + +/* + * PTEs for mapping user space into the kernel for phyio operations. + * The default PTE number is enough to cover 8 disks * MAXBSIZE. + */ +#ifndef USRIOSIZE +#define USRIOSIZE (MAXBSIZE/PAGE_SIZE * 8) +#endif + +/* + * User/kernel map constants. + */ +#define VM_MIN_ADDRESS ((vaddr_t)PAGE_SIZE) +#ifdef _LP64 /* Sv39 / Sv48 / Sv57 */ +/* + * SV39 gives 1 << (39 - 1) address space to kernel and same to userland. + * This is 256GiB each. Split the kernel space in two and use the top half + * for direct map. + * + * kernel virtual space layout: + * 0xffff_ffc0_0000_0000 - 64GiB KERNEL VM Space (inc. text/data/bss) + * (0xffff_ffc0_4000_0000 +1GiB) KERNEL VM start of KVA + * (0xffff_ffd0_0000_0000 64GiB) reserved + * 0xffff_ffe0_0000_0000 - 128GiB direct mapping + */ +#define VM_MAXUSER_ADDRESS ((vaddr_t)0x0000004000000000 - 16 * PAGE_SIZE) +#define VM_MIN_KERNEL_ADDRESS ((vaddr_t)0xffffffc000000000) +#define VM_MAX_KERNEL_ADDRESS ((vaddr_t)0xffffffd000000000) + +#else /* Sv32 */ +/* + * kernel virtual space layout: + * 0x8000_0000 - 64GiB KERNEL VM Space (inc. text/data/bss) + * (0x4000_0000 +1GiB) KERNEL VM start of KVA + * (0x0000_0000 64GiB) reserved + */ + +/* + * kernel virtual space layout without direct map (common case) + * + * 0x8000_0000 - 256MB kernel text/data/bss + * 0x9000_0000 - 1536MB Kernel VM Space + * 0xf000_0000 - 256MB IO + * + * kernel virtual space layout with KASAN + * + * 0x8000_0000 - 256MB kernel text/data/bss + * 0x9000_0000 - 768MB Kernel VM Space + * 0xc000_0000 - 128MB (KASAN SHADOW MAP) + * 0xc800_0000 - 640MB (spare) + * 0xf000_0000 - 256MB IO + * + * kernel virtual space layout with direct map (1GB limited) + * 0x8000_0000 - 1024MB kernel text/data/bss and direct map start + * 0xc000_0000 - 768MB Kernel VM Space + * 0xf000_0000 - 256MB IO + * + */ + + + +#define VM_MAXUSER_ADDRESS ((vaddr_t)-0x7fffffff-1)/* 0xffff_ffff_8000_0000 */ +#define VM_MIN_KERNEL_ADDRESS ((vaddr_t)-0x7fffffff-1)/* 0xffff_ffff_8000_0000 */ +#define VM_MAX_KERNEL_ADDRESS ((vaddr_t)-0x10000000) /* 0xffff_ffff_f000_0000 */ + +#endif +#define VM_KERNEL_BASE VM_MIN_KERNEL_ADDRESS +#define VM_KERNEL_SIZE 0x2000000 /* 32 MiB (8 / 16 megapages) */ +#define VM_KERNEL_DTB_BASE (VM_KERNEL_BASE + VM_KERNEL_SIZE) +#define VM_KERNEL_DTB_SIZE 0x1000000 /* 16 MiB (4 / 8 megapages) */ +#define VM_KERNEL_IO_BASE (VM_KERNEL_DTB_BASE + VM_KERNEL_DTB_SIZE) +#define VM_KERNEL_IO_SIZE 0x1000000 /* 16 MiB (4 / 8 megapages) */ + +#define VM_KERNEL_RESERVED (VM_KERNEL_SIZE + VM_KERNEL_DTB_SIZE + VM_KERNEL_IO_SIZE) + +#define VM_KERNEL_VM_BASE (VM_MIN_KERNEL_ADDRESS + VM_KERNEL_RESERVED) +#define VM_KERNEL_VM_SIZE (VM_MAX_KERNEL_ADDRESS - VM_KERNEL_VM_BASE) + +#define VM_MAX_ADDRESS VM_MAXUSER_ADDRESS +#define VM_MAXUSER_ADDRESS32 ((vaddr_t)(1UL << 31))/* 0x0000000080000000 */ + +#ifdef _LP64 +/* + * Since we have the address space, we map all of physical memory (RAM) + * using gigapages on SV39, terapages on SV48 and petapages on SV57. + */ +#define RISCV_DIRECTMAP_MASK ((vaddr_t) 0xffffffe000000000L) +#define RISCV_DIRECTMAP_SIZE (-RISCV_DIRECTMAP_MASK - PAGE_SIZE) /* 128GiB */ +#define RISCV_DIRECTMAP_START RISCV_DIRECTMAP_MASK +#define RISCV_DIRECTMAP_END (RISCV_DIRECTMAP_START + RISCV_DIRECTMAP_SIZE) +#define RISCV_DIRECTMAP_P(va) (((vaddr_t) (va) & RISCV_DIRECTMAP_MASK) == RISCV_DIRECTMAP_MASK) +#define RISCV_PA_TO_KVA(pa) ((vaddr_t) ((pa) | RISCV_DIRECTMAP_START)) +#define RISCV_KVA_TO_PA(va) ((paddr_t) ((va) & ~RISCV_DIRECTMAP_MASK)) +#endif + +/* + * The address to which unspecified mapping requests default + */ +#define __USE_TOPDOWN_VM + +#define VM_DEFAULT_ADDRESS_TOPDOWN(da, sz) \ + trunc_page(USRSTACK - MAXSSIZ - (sz) - user_stack_guard_size) +#define VM_DEFAULT_ADDRESS_BOTTOMUP(da, sz) \ + round_page((vaddr_t)(da) + (vsize_t)maxdmap) + +#define VM_DEFAULT_ADDRESS32_TOPDOWN(da, sz) \ + trunc_page(USRSTACK32 - MAXSSIZ32 - (sz) - user_stack_guard_size) +#define VM_DEFAULT_ADDRESS32_BOTTOMUP(da, sz) \ + round_page((vaddr_t)(da) + (vsize_t)MAXDSIZ32) + +/* virtual sizes (bytes) for various kernel submaps */ +#define VM_PHYS_SIZE (USRIOSIZE*PAGE_SIZE) + +/* + * max number of non-contig chunks of physical RAM you can have + */ +#define VM_PHYSSEG_MAX 64 + +/* + * when converting a physical address to a vm_page structure, we + * want to use a binary search on the chunks of physical memory + * to find our RAM + */ +#define VM_PHYSSEG_STRAT VM_PSTRAT_BSEARCH + +#ifndef VM_NFREELIST +#define VM_NFREELIST 2 /* 2 distinct memory segments */ +#define VM_FREELIST_DEFAULT 0 +#define VM_FREELIST_DIRECTMAP 1 +#endif + +#ifdef _KERNEL +#ifdef _LP64 +void * cpu_uarea_alloc(bool); +bool cpu_uarea_free(void *); +#endif +#endif + +#endif /* ! _RISCV_VMPARAM_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/riscv/wchar_limits.h b/lib/libc/include/generic-netbsd/riscv/wchar_limits.h @@ -0,0 +1,13 @@ +/* $NetBSD: wchar_limits.h,v 1.1 2014/09/19 17:36:26 matt Exp $ */ + +// zig patch: https://github.com/llvm/llvm-project/issues/199678 +#ifndef _RISCV_WCHAR_LIMITS_H_ +#define _RISCV_WCHAR_LIMITS_H_ + +#define WCHAR_MIN (-0x7fffffff-1) /* wchar_t */ +#define WCHAR_MAX 0x7fffffff /* wchar_t */ + +#define WINT_MIN (-0x7fffffff-1) /* wint_t */ +#define WINT_MAX 0x7fffffff /* wint_t */ + +#endif /* !_RISCV_WCHAR_LIMITS_H_ */ diff --git a/lib/libc/include/generic-netbsd/rmd160.h b/lib/libc/include/generic-netbsd/rmd160.h @@ -1,4 +1,4 @@ -/* $NetBSD: rmd160.h,v 1.3 2016/07/01 16:43:16 christos Exp $ */ +/* $NetBSD: rmd160.h,v 1.4 2023/08/01 07:04:16 mrg Exp $ */ /* $KAME: rmd160.h,v 1.2 2003/07/25 09:37:55 itojun Exp $ */ /* $OpenBSD: rmd160.h,v 1.3 2002/03/14 01:26:51 millert Exp $ */ /* @@ -47,10 +47,10 @@ void RMD160Transform(uint32_t [5], const u_char [64]); void RMD160Update(RMD160_CTX *, const u_char *, uint32_t); void RMD160Final(u_char [RMD160_DIGEST_LENGTH], RMD160_CTX *); #ifndef _KERNEL -char *RMD160End(RMD160_CTX *, char *); +char *RMD160End(RMD160_CTX *, char[RMD160_DIGEST_STRING_LENGTH]); char *RMD160FileChunk(const char *, char *, off_t, off_t); char *RMD160File(const char *, char *); -char *RMD160Data(const u_char *, size_t, char *); +char *RMD160Data(const u_char *, size_t, char[RMD160_DIGEST_STRING_LENGTH]); #endif /* _KERNEL */ __END_DECLS diff --git a/lib/libc/include/generic-netbsd/rpc/xdr.h b/lib/libc/include/generic-netbsd/rpc/xdr.h @@ -1,4 +1,4 @@ -/* $NetBSD: xdr.h,v 1.2 2019/06/16 16:01:44 christos Exp $ */ +/* $NetBSD: xdr.h,v 1.3 2024/02/05 21:46:04 andvar Exp $ */ /* * Sun RPC is a product of Sun Microsystems, Inc. and is provided for @@ -93,8 +93,8 @@ enum xdr_op { /* * The XDR handle. * Contains operation which is being applied to the stream, - * an operations vector for the paticular implementation (e.g. see xdr_mem.c), - * and two private fields for the use of the particular impelementation. + * an operations vector for the particular implementation (e.g. see xdr_mem.c), + * and two private fields for the use of the particular implementation. */ typedef struct __rpc_xdr { enum xdr_op x_op; /* operation; fast additional param */ diff --git a/lib/libc/include/generic-netbsd/rpcsvc/yp_prot.h b/lib/libc/include/generic-netbsd/rpcsvc/yp_prot.h @@ -1,4 +1,4 @@ -/* $NetBSD: yp_prot.h,v 1.20 2020/04/02 15:30:25 msaitoh Exp $ */ +/* $NetBSD: yp_prot.h,v 1.22 2024/05/30 03:33:31 msaitoh Exp $ */ /* * Copyright (c) 1992, 1993 Theo de Raadt <deraadt@fsa.ca> @@ -264,7 +264,8 @@ struct ypbind_setdom { * YPPUSH PROTOCOL: * * Sun says: - * "Protocol between clients (ypxfr, only) and yppush + * "Protocol between clients (ypxfr, only) and yppush: + * * yppush speaks a protocol in the transient range, which * is supplied to ypxfr as a command-line parameter when it * is activated by ypserv." diff --git a/lib/libc/include/generic-netbsd/rump/rump_namei.h b/lib/libc/include/generic-netbsd/rump/rump_namei.h @@ -1,11 +1,11 @@ -/* $NetBSD: rump_namei.h,v 1.48 2021/06/29 22:40:06 dholland Exp $ */ +/* $NetBSD: rump_namei.h,v 1.53 2024/07/01 00:58:43 christos Exp $ */ /* * WARNING: GENERATED FILE. DO NOT EDIT * (edit namei.src and run make namei in src/sys/sys) * by: NetBSD: gennameih.awk,v 1.5 2009/12/23 14:17:19 pooka Exp - * from: NetBSD: namei.src,v 1.60 2021/06/29 22:39:21 dholland Exp + * from: NetBSD: namei.src,v 1.65 2024/07/01 00:58:05 christos Exp */ #ifndef _RUMP_RUMP_NAMEI_H_ diff --git a/lib/libc/include/generic-netbsd/rump/rump_syscalls.h b/lib/libc/include/generic-netbsd/rump/rump_syscalls.h @@ -1,10 +1,10 @@ -/* $NetBSD: rump_syscalls.h,v 1.126 2021/11/01 05:26:28 thorpej Exp $ */ +/* $NetBSD: rump_syscalls.h,v 1.133 2024/10/09 16:29:11 christos Exp $ */ /* * System call protos in rump namespace. * * DO NOT EDIT-- this file is automatically generated. - * created from NetBSD: syscalls.master,v 1.309 2021/11/01 05:07:17 thorpej Exp + * created from NetBSD: syscalls.master,v 1.316 2024/10/09 16:27:28 christos Exp */ #ifndef _RUMP_RUMP_SYSCALLS_H_ @@ -193,7 +193,7 @@ #endif #ifndef RUMP_SYS_RENAME_DUP3 -#define RUMP_SYS_RENAME_DUP3 rump___sysimpl_dup3 +#define RUMP_SYS_RENAME_DUP3 rump___sysimpl_dup3100 #endif #ifndef RUMP_SYS_RENAME_EXTATTR_DELETE_FD @@ -461,7 +461,7 @@ #endif #ifndef RUMP_SYS_RENAME_KEVENT -#define RUMP_SYS_RENAME_KEVENT rump___sysimpl_kevent50 +#define RUMP_SYS_RENAME_KEVENT rump___sysimpl_kevent100 #endif #ifndef RUMP_SYS_RENAME_KQUEUE diff --git a/lib/libc/include/generic-netbsd/rump/rumpuser.h b/lib/libc/include/generic-netbsd/rump/rumpuser.h @@ -1,4 +1,4 @@ -/* $NetBSD: rumpuser.h,v 1.116 2020/03/22 13:30:10 pgoyette Exp $ */ +/* $NetBSD: rumpuser.h,v 1.117 2023/09/24 09:33:26 martin Exp $ */ /* * Copyright (c) 2007-2013 Antti Kantee. All Rights Reserved. @@ -168,6 +168,11 @@ void rumpuser_dprintf(const char *, ...) __printflike(1, 2); int rumpuser_getrandom(void *, size_t, int, size_t *); /* + * for architectures with non-constant page size + */ +unsigned long rumpuser_getpagesize(void); + +/* * threads, scheduling (host) and synchronization */ int rumpuser_thread_create(void *(*f)(void *), void *, const char *, int, diff --git a/lib/libc/include/generic-netbsd/rump/rumpvnode_if.h b/lib/libc/include/generic-netbsd/rump/rumpvnode_if.h @@ -1,11 +1,11 @@ -/* $NetBSD: rumpvnode_if.h,v 1.40.4.1 2023/06/21 16:52:28 martin Exp $ */ +/* $NetBSD: rumpvnode_if.h,v 1.41 2023/06/15 09:15:13 hannken Exp $ */ /* * Warning: DO NOT EDIT! This file is automatically generated! * (Modifications made here may easily be lost!) * * Created from the file: - * NetBSD: vnode_if.src,v 1.84.4.1 2023/06/21 16:50:21 martin Exp + * NetBSD: vnode_if.src,v 1.85 2023/06/15 09:13:36 hannken Exp * by the script: * NetBSD: vnode_if.sh,v 1.77 2022/10/26 23:39:43 riastradh Exp */ diff --git a/lib/libc/include/generic-netbsd/sha1.h b/lib/libc/include/generic-netbsd/sha1.h @@ -1,4 +1,4 @@ -/* $NetBSD: sha1.h,v 1.15 2016/07/01 16:43:16 christos Exp $ */ +/* $NetBSD: sha1.h,v 1.16 2023/08/01 07:04:16 mrg Exp $ */ /* * SHA-1 in C @@ -28,10 +28,10 @@ void SHA1Init(SHA1_CTX *); void SHA1Update(SHA1_CTX *, const uint8_t *, unsigned int); void SHA1Final(uint8_t[SHA1_DIGEST_LENGTH], SHA1_CTX *); #ifndef _KERNEL -char *SHA1End(SHA1_CTX *, char *); +char *SHA1End(SHA1_CTX *, char[SHA1_DIGEST_STRING_LENGTH]); char *SHA1FileChunk(const char *, char *, off_t, off_t); char *SHA1File(const char *, char *); -char *SHA1Data(const uint8_t *, size_t, char *); +char *SHA1Data(const uint8_t *, size_t, char[SHA1_DIGEST_STRING_LENGTH]); #endif /* _KERNEL */ __END_DECLS diff --git a/lib/libc/include/generic-netbsd/sha2.h b/lib/libc/include/generic-netbsd/sha2.h @@ -1,4 +1,4 @@ -/* $NetBSD: sha2.h,v 1.3 2009/05/26 08:04:12 joerg Exp $ */ +/* $NetBSD: sha2.h,v 1.4 2024/01/19 18:39:59 christos Exp $ */ /* $KAME: sha2.h,v 1.4 2003/07/20 00:28:38 itojun Exp $ */ /* @@ -115,6 +115,13 @@ char *SHA512_FileChunk(const char *, char *, off_t, off_t); char *SHA512_File(const char *, char *); char *SHA512_Data(const uint8_t *, size_t, char[SHA512_DIGEST_STRING_LENGTH]); #endif /* !_KERNEL */ + +#ifdef _LIBC_INTERNAL +void SHA224_Transform(SHA224_CTX *, const uint32_t*); +void SHA256_Transform(SHA256_CTX *, const uint32_t*); +void SHA384_Transform(SHA384_CTX *, const uint64_t*); +void SHA512_Transform(SHA512_CTX *, const uint64_t*); +#endif __END_DECLS #endif /* __SHA2_H__ */ \ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/signal.h b/lib/libc/include/generic-netbsd/signal.h @@ -1,4 +1,4 @@ -/* $NetBSD: signal.h,v 1.59 2021/11/02 20:12:25 christos Exp $ */ +/* $NetBSD: signal.h,v 1.60 2024/09/09 21:19:54 rillig Exp $ */ /*- * Copyright (c) 1991, 1993 @@ -162,7 +162,7 @@ sigfillset(sigset_t *set) /* * X/Open CAE Specification Issue 4 Version 2 - */ + */ #if (defined(_XOPEN_SOURCE) && defined(_XOPEN_SOURCE_EXTENDED)) || \ (_XOPEN_SOURCE - 0) >= 500 || (_POSIX_C_SOURCE - 0) >= 200809L || \ defined(_NETBSD_SOURCE) @@ -185,7 +185,7 @@ void (*sigset (int, void (*)(int)))(int); /* * X/Open CAE Specification Issue 5; IEEE Std 1003.1b-1993 (POSIX) - */ + */ #if (_POSIX_C_SOURCE - 0) >= 199309L || (_XOPEN_SOURCE - 0) >= 500 || \ defined(_NETBSD_SOURCE) int sigwait (const sigset_t * __restrict, int * __restrict); @@ -201,7 +201,7 @@ int __sigtimedwait(const sigset_t * __restrict, siginfo_t * __restrict, struct timespec * __restrict) __RENAME(____sigtimedwait50); #endif -#endif /* _POSIX_C_SOURCE >= 200112 || _XOPEN_SOURCE_EXTENDED || ... */ +#endif /* _POSIX_C_SOURCE >= 199309L || _XOPEN_SOURCE_EXTENDED || ... */ #if defined(_NETBSD_SOURCE) diff --git a/lib/libc/include/generic-netbsd/sparc/asm.h b/lib/libc/include/generic-netbsd/sparc/asm.h @@ -1,4 +1,4 @@ -/* $NetBSD: asm.h,v 1.23 2020/04/17 14:19:44 joerg Exp $ */ +/* $NetBSD: asm.h,v 1.25 2025/01/06 10:46:44 martin Exp $ */ /* * Copyright (c) 1994 Allen Briggs @@ -157,10 +157,19 @@ #define ASMSTR .asciz #ifdef __ELF__ +#ifdef _NETBSD_REVISIONID #define RCSID(x) .pushsection ".ident","MS",@progbits,1; \ .asciz x; \ + .ascii "$"; .ascii "NetBSD: "; .ascii __FILE__; \ + .ascii " "; .ascii _NETBSD_REVISIONID; \ + .asciz " $"; \ .popsection #else +#define RCSID(x) .pushsection ".ident","MS",@progbits,1; \ + .asciz x; \ + .popsection +#endif +#else #define RCSID(name) .asciz name #endif diff --git a/lib/libc/include/generic-netbsd/sparc/bswap.h b/lib/libc/include/generic-netbsd/sparc/bswap.h @@ -1,8 +1,16 @@ -/* $NetBSD: bswap.h,v 1.2 1999/08/21 05:39:55 simonb Exp $ */ +/* $NetBSD: bswap.h,v 1.2.264.1 2025/11/28 10:58:02 martin Exp $ */ #ifndef _MACHINE_BSWAP_H_ #define _MACHINE_BSWAP_H_ +/* + * GCC doesn't generate inline calls to bswapX on sparc and instead + * generates function calls. + */ +#if !defined(__clang__) +#define __HAVE_SLOW_BSWAP_BUILTIN +#endif + #include <sys/bswap.h> #endif /* !_MACHINE_BSWAP_H_ */ \ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/sparc/cgtworeg.h b/lib/libc/include/generic-netbsd/sparc/cgtworeg.h @@ -1,4 +1,4 @@ -/* $NetBSD: cgtworeg.h,v 1.5 2003/05/20 13:38:00 nakayama Exp $ */ +/* $NetBSD: cgtworeg.h,v 1.6 2023/03/28 20:01:57 andvar Exp $ */ /* * Copyright (c) 1994 Dennis Ferguson @@ -119,7 +119,7 @@ struct cg2_extstatus { */ struct dblbufreg { u_int display_b : 1; /* display memory B (set) or A (reset) */ - u_int read_b : 1; /* accesss memory B (set) or A (reset) */ + u_int read_b : 1; /* access memory B (set) or A (reset) */ u_int nowrite_b : 1; /* when set, writes don't update memory B */ u_int nowrite_a : 1; /* when set, writes don't update memory A */ u_int read_ecmap : 1; /* copy from(clear)/to(set) shadow colour map */ diff --git a/lib/libc/include/generic-netbsd/sparc/cpu.h b/lib/libc/include/generic-netbsd/sparc/cpu.h @@ -1,4 +1,4 @@ -/* $NetBSD: cpu.h,v 1.110.4.1 2023/08/09 17:42:02 martin Exp $ */ +/* $NetBSD: cpu.h,v 1.111 2023/07/13 12:06:20 riastradh Exp $ */ /* * Copyright (c) 1992, 1993 diff --git a/lib/libc/include/generic-netbsd/sparc/float.h b/lib/libc/include/generic-netbsd/sparc/float.h @@ -1,8 +1,10 @@ -/* $NetBSD: float.h,v 1.12 2009/11/25 08:43:15 martin Exp $ */ +/* $NetBSD: float.h,v 1.13 2024/10/30 15:56:12 riastradh Exp $ */ #ifndef _SPARC_FLOAT_H_ #define _SPARC_FLOAT_H_ +#include <sys/featuretest.h> + #ifdef _LP64 #define LDBL_MANT_DIG 113 diff --git a/lib/libc/include/generic-netbsd/sparc/limits.h b/lib/libc/include/generic-netbsd/sparc/limits.h @@ -1,4 +1,4 @@ -/* $NetBSD: limits.h,v 1.23 2019/01/21 20:28:18 dholland Exp $ */ +/* $NetBSD: limits.h,v 1.25 2024/03/16 21:50:47 christos Exp $ */ /* * Copyright (c) 1988 The Regents of the University of California. @@ -75,11 +75,9 @@ #define SSIZE_MIN LONG_MIN /* min value for a ssize_t */ #define SIZE_T_MAX ULONG_MAX /* max value for a size_t */ -/* GCC requires that quad constants be written as expressions. */ -#define UQUAD_MAX ((u_quad_t)0-1) /* max value for a uquad_t */ - /* max value for a quad_t */ -#define QUAD_MAX ((quad_t)(UQUAD_MAX >> 1)) -#define QUAD_MIN (-QUAD_MAX-1) /* min value for a quad_t */ +#define UQUAD_MAX 0xffffffffffffffffULL /* max unsigned quad */ +#define QUAD_MAX 0x7fffffffffffffffLL /* max signed quad */ +#define QUAD_MIN (-0x7fffffffffffffffLL-1) /* min signed quad */ #endif /* _NETBSD_SOURCE */ #endif /* _POSIX_C_SOURCE || _XOPEN_SOURCE || _NETBSD_SOURCE */ diff --git a/lib/libc/include/generic-netbsd/sparc/lwp_private.h b/lib/libc/include/generic-netbsd/sparc/lwp_private.h @@ -0,0 +1,51 @@ +/* $NetBSD: lwp_private.h,v 1.1 2024/11/30 01:04:14 christos Exp $ */ + +/*- + * Copyright (c) 2001 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Klaus Klein. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _SPARC_LWP_PRIVATE_H_ +#define _SPARC_LWP_PRIVATE_H_ + +#include <sys/tls.h> + +__BEGIN_DECLS + +static __inline void * +__lwp_getprivate_fast(void) +{ + register void *__tmp; + + __asm volatile("mov %%g7, %0" : "=r" (__tmp)); + + return __tmp; +} + +__END_DECLS + +#endif /* !_SPARC_LWP_PRIVATE_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/sparc/mcontext.h b/lib/libc/include/generic-netbsd/sparc/mcontext.h @@ -1,4 +1,4 @@ -/* $NetBSD: mcontext.h,v 1.18 2019/12/27 00:32:17 kamil Exp $ */ +/* $NetBSD: mcontext.h,v 1.22 2024/11/30 01:04:14 christos Exp $ */ /*- * Copyright (c) 2001 The NetBSD Foundation, Inc. @@ -32,9 +32,9 @@ #ifndef _SPARC_MCONTEXT_H_ #define _SPARC_MCONTEXT_H_ -#define _UC_SETSTACK 0x00010000 -#define _UC_CLRSTACK 0x00020000 -#define _UC_TLSBASE 0x00080000 +#define _UC_SETSTACK _UC_MD_BIT16 +#define _UC_CLRSTACK _UC_MD_BIT17 +#define _UC_TLSBASE _UC_MD_BIT19 /* * Layout of mcontext_t according the System V Application Binary Interface, @@ -161,22 +161,4 @@ do { \ (uc)->uc_mcontext.__gregs[_REG_nPC] = (pc) + 4; \ } while (/*CONSTCOND*/0) -#if defined(_RTLD_SOURCE) || defined(_LIBC_SOURCE) || \ - defined(__LIBPTHREAD_SOURCE__) -#include <sys/tls.h> - -__BEGIN_DECLS -static __inline void * -__lwp_getprivate_fast(void) -{ - register void *__tmp; - - __asm volatile("mov %%g7, %0" : "=r" (__tmp)); - - return __tmp; -} -__END_DECLS - -#endif - #endif /* !_SPARC_MCONTEXT_H_ */ \ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/sparc/mutex.h b/lib/libc/include/generic-netbsd/sparc/mutex.h @@ -1,4 +1,4 @@ -/* $NetBSD: mutex.h,v 1.11.26.1 2023/08/09 17:42:02 martin Exp $ */ +/* $NetBSD: mutex.h,v 1.13 2023/07/12 12:50:13 riastradh Exp $ */ /*- * Copyright (c) 2002, 2006 The NetBSD Foundation, Inc. diff --git a/lib/libc/include/generic-netbsd/sparc/param.h b/lib/libc/include/generic-netbsd/sparc/param.h @@ -1,4 +1,4 @@ -/* $NetBSD: param.h,v 1.74 2020/05/01 08:21:27 isaki Exp $ */ +/* $NetBSD: param.h,v 1.76 2025/04/20 22:33:41 riastradh Exp $ */ /* * Copyright (c) 1992, 1993 @@ -60,6 +60,8 @@ #define SUN4_PGSHIFT 13 /* for a sun4 machine */ #define SUN4CM_PGSHIFT 12 /* for a sun4c or sun4m machine */ +#define STACK_ALIGNBYTES (8 - 1) + /* * The following variables are always defined and initialized (in locore) * so independently compiled modules (e.g. LKMs) can be used irrespective @@ -75,7 +77,7 @@ extern int nbpg, pgofset, pgshift; #else /* * JS1/OF has prom sitting in f000.0000..f007.ffff, modify kernel VA - * layout to work around that. XXX - kernel should live beyound prom on + * layout to work around that. XXX - kernel should live beyond prom on * those machines. */ #define KERNBASE 0xe8000000 diff --git a/lib/libc/include/generic-netbsd/sparc/pmap.h b/lib/libc/include/generic-netbsd/sparc/pmap.h @@ -1,4 +1,4 @@ -/* $NetBSD: pmap.h,v 1.97 2021/01/25 20:05:29 mrg Exp $ */ +/* $NetBSD: pmap.h,v 1.98 2024/03/23 18:48:31 andvar Exp $ */ /* * Copyright (c) 1996 @@ -74,7 +74,7 @@ struct vm_page; * User space begins at 0x00000000 and runs through 0x1fffffff, * then has a `hole', then resumes at 0xe0000000 and runs until it * hits the kernel space at 0xf8000000. This can be mapped - * contiguously by ignorning the top two bits and pretending the + * contiguously by ignoring the top two bits and pretending the * space goes from 0 to 37ffffff. Typically the lower range is * used for text+data and the upper for stack, but the code here * makes no such distinction. diff --git a/lib/libc/include/generic-netbsd/sparc/psl.h b/lib/libc/include/generic-netbsd/sparc/psl.h @@ -1,4 +1,4 @@ -/* $NetBSD: psl.h,v 1.50.4.1 2023/08/09 17:42:02 martin Exp $ */ +/* $NetBSD: psl.h,v 1.53 2024/04/07 17:08:00 rillig Exp $ */ /* * Copyright (c) 1992, 1993 @@ -113,8 +113,11 @@ #define PSTATE_IE 0x002 /* interrupt enable */ #define PSTATE_AG 0x001 /* enable alternate globals */ -#define PSTATE_BITS "\20\14IG\13MG\12CLE\11TLE\10\7MM\6RED\5PEF\4AM\3PRIV\2IE\1AG" - +#define PSTATE_BITS "\177\020" \ + "b\013IG\0" "b\012MG\0" "b\011CLE\0" "b\010TLE\0" \ + "F\006\002\0" ":\000MM_TSO\0" ":\001MM_PSO\0" \ + ":\002MM_RMO\0" "*?\0" "b\005RED\0" "b\004PEF\0" \ + "b\003AM\0" "b\002PRIV\0" "b\001IE\0" "b\000AG\0" /* * 32-bit code requires TSO or at best PSO since that's what's supported on diff --git a/lib/libc/include/generic-netbsd/sparc/types.h b/lib/libc/include/generic-netbsd/sparc/types.h @@ -1,4 +1,4 @@ -/* $NetBSD: types.h,v 1.72 2022/07/30 14:13:27 riastradh Exp $ */ +/* $NetBSD: types.h,v 1.73 2023/03/20 11:07:33 martin Exp $ */ /* * Copyright (c) 1992, 1993 @@ -136,7 +136,7 @@ typedef unsigned long int __register_t; #define __HAVE_FAST_SOFTINTS #else #define __HAVE_MM_MD_READWRITE -#ifdef MULTIPROCESSOR +#if !defined(_KERNEL) || defined(MULTIPROCESSOR) #define __HAVE_HASHLOCKED_ATOMICS #endif #endif diff --git a/lib/libc/include/generic-netbsd/sparc64/bswap.h b/lib/libc/include/generic-netbsd/sparc64/bswap.h @@ -1,8 +1,16 @@ -/* $NetBSD: bswap.h,v 1.2 1999/08/21 05:39:55 simonb Exp $ */ +/* $NetBSD: bswap.h,v 1.2.264.1 2025/11/28 10:58:02 martin Exp $ */ #ifndef _MACHINE_BSWAP_H_ #define _MACHINE_BSWAP_H_ +/* + * GCC doesn't generate inline calls to bswapX on sparc and instead + * generates function calls. + */ +#if !defined(__clang__) +#define __HAVE_SLOW_BSWAP_BUILTIN +#endif + #include <sys/bswap.h> #endif /* !_MACHINE_BSWAP_H_ */ \ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/sparc64/cpu.h b/lib/libc/include/generic-netbsd/sparc64/cpu.h @@ -1,4 +1,4 @@ -/* $NetBSD: cpu.h,v 1.133.4.1 2023/08/09 17:42:03 martin Exp $ */ +/* $NetBSD: cpu.h,v 1.135 2024/09/07 06:17:37 andvar Exp $ */ /* * Copyright (c) 1992, 1993 @@ -266,7 +266,7 @@ extern struct pool_cache *fpstate_cache; /* CURCPU_INT() a local (per CPU) view of our cpu_info */ #define CURCPU_INT() ((struct cpu_info *)CPUINFO_VA) -/* in general we prefer the globaly visible pointer */ +/* in general we prefer the globally visible pointer */ #define curcpu() (CURCPU_INT()->ci_self) #define cpu_number() (curcpu()->ci_index) #define CPU_IS_PRIMARY(ci) ((ci)->ci_flags & CPUF_PRIMARY) diff --git a/lib/libc/include/generic-netbsd/sparc64/ctlreg.h b/lib/libc/include/generic-netbsd/sparc64/ctlreg.h @@ -1,4 +1,4 @@ -/* $NetBSD: ctlreg.h,v 1.67 2019/11/13 10:06:38 nakayama Exp $ */ +/* $NetBSD: ctlreg.h,v 1.71 2024/03/10 17:34:47 rillig Exp $ */ /* * Copyright (c) 1996-2002 Eduardo Horvath @@ -286,14 +286,14 @@ /* SFSR bits for both D_SFSR and I_SFSR */ #define SFSR_ASI(x) ((x)>>16) -#define SFSR_FT_VA_OOR_2 0x02000 /* IMMU: jumpl or return to unsupportd VA */ +#define SFSR_FT_VA_OOR_2 0x02000 /* IMMU: jumpl or return to unsupported VA */ #define SFSR_FT_VA_OOR_1 0x01000 /* fault at unsupported VA */ #define SFSR_FT_NFO 0x00800 /* DMMU: Access to page marked NFO */ #define SFSR_ILL_ASI 0x00400 /* DMMU: Illegal (unsupported) ASI */ #define SFSR_FT_IO_ATOMIC 0x00200 /* DMMU: Atomic access to noncacheable page */ #define SFSR_FT_ILL_NF 0x00100 /* DMMU: NF load or flush to page marked E (has side effects) */ #define SFSR_FT_PRIV 0x00080 /* Privilege violation */ -#define SFSR_FT_E 0x00040 /* DMUU: value of E bit associated address */ +#define SFSR_FT_E 0x00040 /* DMMU: value of E bit associated address */ #define SFSR_CTXT(x) (((x)>>4)&0x3) #define SFSR_CTXT_IS_PRIM(x) (SFSR_CTXT(x)==0x00) #define SFSR_CTXT_IS_SECOND(x) (SFSR_CTXT(x)==0x01) @@ -306,9 +306,10 @@ SFSR_ILL_ASI|SFSR_FT_IO_ATOMIC|SFSR_FT_ILL_NF|SFSR_FT_PRIV) #define SFSR_BITS "\177\20" \ - "f\20\30ASI\0" "b\16VAT\0" "b\15VAD\0" "b\14NFO\0" "b\13ASI\0" "b\12A\0" \ - "b\11NF\0" "b\10PRIV\0" "b\7E\0" "b\6NUCLEUS\0" "b\5SECONDCTX\0" "b\4PRIV\0" \ - "b\3W\0" "b\2OW\0" "b\1FV\0" + "f\20\30ASI\0" "b\15VAT\0" "b\14VAD\0" \ + "b\13NFO\0" "b\12ASI\0" "b\11A\0" "b\10NF\0" \ + "b\07PRIV\0" "b\06E\0" "b\05NUCLEUS\0" "b\04SECONDCTX\0" \ + "b\03PRIV\0" "b\02W\0" "b\01OW\0" "b\00FV\0" /* ASFR bits */ #define ASFR_ME 0x100000000LL @@ -396,7 +397,7 @@ * Interrupt registers. This really gets hairy. */ -/* IRSR -- Interrupt Receive Status Ragister */ +/* IRSR -- Interrupt Receive Status Register */ #define ASI_IRSR 0x49 #define IRSR 0x00 #define IRSR_BUSY 0x020 diff --git a/lib/libc/include/generic-netbsd/sparc64/intr.h b/lib/libc/include/generic-netbsd/sparc64/intr.h @@ -1,4 +1,4 @@ -/* $NetBSD: intr.h,v 1.31.70.1 2023/09/09 15:01:24 martin Exp $ */ +/* $NetBSD: intr.h,v 1.32 2023/09/02 05:51:57 jdc Exp $ */ /*- * Copyright (c) 1998 The NetBSD Foundation, Inc. diff --git a/lib/libc/include/generic-netbsd/sparc64/lwp_private.h b/lib/libc/include/generic-netbsd/sparc64/lwp_private.h @@ -0,0 +1,3 @@ +/* $NetBSD: lwp_private.h,v 1.2 2024/11/30 14:42:42 uwe Exp $ */ + +#include <sparc/lwp_private.h> +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/sparc64/mcontext.h b/lib/libc/include/generic-netbsd/sparc64/mcontext.h @@ -1,4 +1,4 @@ -/* $NetBSD: mcontext.h,v 1.10 2018/02/19 08:31:13 mrg Exp $ */ +/* $NetBSD: mcontext.h,v 1.11 2024/05/18 00:37:41 thorpej Exp $ */ #ifndef _SPARC64_MCONTEXT_H_ #define _SPARC64_MCONTEXT_H_ @@ -72,9 +72,9 @@ typedef struct { __xrs32_t __xrs; /* may indicate extra reg state */ } mcontext32_t; -#define _UC_SETSTACK 0x00010000 -#define _UC_CLRSTACK 0x00020000 -#define _UC_TLSBASE 0x00080000 +#define _UC_SETSTACK _UC_MD_BIT16 +#define _UC_CLRSTACK _UC_MD_BIT17 +#define _UC_TLSBASE _UC_MD_BIT19 #define _UC_MACHINE32_PAD 43 /* compat_netbsd32 variant */ #define _UC_MACHINE32_SP(uc) ((uc)->uc_mcontext.__gregs[_REG_O6]) diff --git a/lib/libc/include/generic-netbsd/sparc64/mutex.h b/lib/libc/include/generic-netbsd/sparc64/mutex.h @@ -1,4 +1,4 @@ -/* $NetBSD: mutex.h,v 1.7.4.1 2023/08/09 17:42:03 martin Exp $ */ +/* $NetBSD: mutex.h,v 1.10 2023/07/12 12:50:13 riastradh Exp $ */ /*- * Copyright (c) 2002, 2007 The NetBSD Foundation, Inc. diff --git a/lib/libc/include/generic-netbsd/sparc64/param.h b/lib/libc/include/generic-netbsd/sparc64/param.h @@ -1,4 +1,4 @@ -/* $NetBSD: param.h,v 1.62 2021/05/31 14:38:56 simonb Exp $ */ +/* $NetBSD: param.h,v 1.63 2025/04/24 11:01:27 martin Exp $ */ /* * Copyright (c) 1992, 1993 @@ -279,4 +279,10 @@ extern const int cputyp; #define NBPG (1<<PGSHIFT) /* bytes/page */ #define PGOFSET (NBPG-1) /* byte offset into page */ -#define PCI_MAGIC_IO_RANGE 0x100000000LL -\ No newline at end of file +#define PCI_MAGIC_IO_RANGE 0x100000000LL + +#ifdef __arch64__ +#define STACK_ALIGNBYTES ALIGNBYTES64 +#else +#define STACK_ALIGNBYTES ALIGNBYTES32 +#endif +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/sparc64/psl.h b/lib/libc/include/generic-netbsd/sparc64/psl.h @@ -1,4 +1,4 @@ -/* $NetBSD: psl.h,v 1.62.4.2 2023/09/09 15:01:24 martin Exp $ */ +/* $NetBSD: psl.h,v 1.66 2025/05/20 06:12:00 macallan Exp $ */ /* * Copyright (c) 1992, 1993 @@ -129,7 +129,11 @@ #define PSTATE_IE 0x002 /* interrupt enable */ #define PSTATE_AG 0x001 /* enable alternate globals */ -#define PSTATE_BITS "\20\14IG\13MG\12CLE\11TLE\10\7MM\6RED\5PEF\4AM\3PRIV\2IE\1AG" +#define PSTATE_BITS "\177\020" \ + "b\013IG\0" "b\012MG\0" "b\011CLE\0" "b\010TLE\0" \ + "F\006\002\0" ":\000MM_TSO\0" ":\001MM_PSO\0" \ + ":\002MM_RMO\0" "*?\0" "b\005RED\0" "b\004PEF\0" \ + "b\003AM\0" "b\002PRIV\0" "b\001IE\0" "b\000AG\0" /* @@ -508,6 +512,7 @@ SPL(spl0, 0) SPLHOLD(splsoftint, 1) #define splsoftclock splsoftint #define splsoftnet splsoftint +#define splsoftbio splsoftint SPLHOLD(splsoftserial, 4) diff --git a/lib/libc/include/generic-netbsd/sparc64/pte.h b/lib/libc/include/generic-netbsd/sparc64/pte.h @@ -1,4 +1,4 @@ -/* $NetBSD: pte.h,v 1.28 2016/11/04 05:41:01 macallan Exp $ */ +/* $NetBSD: pte.h,v 1.29 2025/01/07 18:51:05 andvar Exp $ */ /* * Copyright (c) 1996-1999 Eduardo Horvath @@ -91,7 +91,7 @@ * a real pain to do this in C. */ #if 0 -/* We don't use bitfeilds anyway. */ +/* We don't use bitfields anyway. */ struct sun4u_tag_fields { uint64_t tag_g:1, /* global flag */ tag_reserved:2, /* reserved for future use */ diff --git a/lib/libc/include/generic-netbsd/sparc64/vmparam.h b/lib/libc/include/generic-netbsd/sparc64/vmparam.h @@ -1,4 +1,4 @@ -/* $NetBSD: vmparam.h,v 1.42.18.1 2023/02/08 16:40:45 martin Exp $ */ +/* $NetBSD: vmparam.h,v 1.43 2023/02/07 14:11:16 hgutch Exp $ */ /* * Copyright (c) 1992, 1993 diff --git a/lib/libc/include/generic-netbsd/ssp/ssp.h b/lib/libc/include/generic-netbsd/ssp/ssp.h @@ -1,7 +1,7 @@ -/* $NetBSD: ssp.h,v 1.13 2015/09/03 20:43:47 plunky Exp $ */ +/* $NetBSD: ssp.h,v 1.16 2023/11/15 03:14:16 christos Exp $ */ /*- - * Copyright (c) 2006, 2011 The NetBSD Foundation, Inc. + * Copyright (c) 2006, 2011, 2023 The NetBSD Foundation, Inc. * All rights reserved. * * This code is derived from software contributed to The NetBSD Foundation @@ -36,7 +36,9 @@ #if !defined(__cplusplus) # if _FORTIFY_SOURCE > 0 && !defined(__lint__) && \ (__OPTIMIZE__ > 0 || defined(__clang__)) && __GNUC_PREREQ__(4, 1) -# if _FORTIFY_SOURCE > 1 +# if _FORTIFY_SOURCE > 2 && __has_builtin(__builtin_dynamic_object_size) +# define __SSP_FORTIFY_LEVEL 3 +# elif _FORTIFY_SOURCE > 1 # define __SSP_FORTIFY_LEVEL 2 # else # define __SSP_FORTIFY_LEVEL 1 @@ -56,10 +58,18 @@ #endif #define __ssp_real(fun) __ssp_real_(fun) -#define __ssp_inline static __inline __attribute__((__always_inline__)) +#ifndef __ssp_inline +#define __ssp_inline extern __inline \ + __attribute__((__always_inline__, __gnu_inline__)) +#endif -#define __ssp_bos(ptr) __builtin_object_size(ptr, __SSP_FORTIFY_LEVEL > 1) -#define __ssp_bos0(ptr) __builtin_object_size(ptr, 0) +#if __SSP_FORTIFY_LEVEL > 2 +# define __ssp_bos(ptr) __builtin_dynamic_object_size(ptr, 1) +# define __ssp_bos0(ptr) __builtin_dynamic_object_size(ptr, 0) +#else +# define __ssp_bos(ptr) __builtin_object_size(ptr, __SSP_FORTIFY_LEVEL > 1) +# define __ssp_bos0(ptr) __builtin_object_size(ptr, 0) +#endif #define __ssp_check(buf, len, bos) \ if (bos(buf) != (size_t)-1 && len > bos(buf)) \ diff --git a/lib/libc/include/generic-netbsd/stdalign.h b/lib/libc/include/generic-netbsd/stdalign.h @@ -1,4 +1,4 @@ -/* $NetBSD: stdalign.h,v 1.1 2016/10/02 17:19:00 kamil Exp $ */ +/* $NetBSD: stdalign.h,v 1.1 2024/08/25 22:10:40 christos Exp $ */ /*- * Copyright (c) 2016 The NetBSD Foundation, Inc. @@ -29,8 +29,8 @@ * POSSIBILITY OF SUCH DAMAGE. */ -#ifndef _STDALIGN_H_ -#define _STDALIGN_H_ +#ifndef _SYS_STDALIGN_H_ +#define _SYS_STDALIGN_H_ /*- * ISO/IEC 9899:201x 7.15 Alignment <stdalign.h> diff --git a/lib/libc/include/generic-netbsd/stdarg.h b/lib/libc/include/generic-netbsd/stdarg.h @@ -1,4 +1,4 @@ -/* $NetBSD: stdarg.h,v 1.6 2022/10/08 15:48:01 christos Exp $ */ +/* $NetBSD: stdarg.h,v 1.7 2025/06/03 20:25:27 rillig Exp $ */ /*- * Copyright (c) 1991, 1993 @@ -41,7 +41,7 @@ #ifdef __lint__ #define __builtin_next_arg(t) ((t) ? 0 : 0) #define __builtin_va_start(a, l) ((a) = (va_list)(void *)&(l)) -#define __builtin_va_arg(a, t) ((a) ? (t) 0 : (t) 0) +#define __builtin_va_arg(a, t) ((a) != 0 ? (t)0 : (t)0) #define __builtin_va_end(a) __nothing #define __builtin_va_copy(d, s) ((d) = (s)) #elif !(__GNUC_PREREQ__(4, 5) || \ diff --git a/lib/libc/include/generic-netbsd/stddef.h b/lib/libc/include/generic-netbsd/stddef.h @@ -1,4 +1,4 @@ -/* $NetBSD: stddef.h,v 1.24 2020/05/13 14:00:58 joerg Exp $ */ +/* $NetBSD: stddef.h,v 1.2 2025/04/01 00:33:55 riastradh Exp $ */ /*- * Copyright (c) 1990, 1993 @@ -31,13 +31,62 @@ * @(#)stddef.h 8.1 (Berkeley) 6/2/93 */ -#ifndef _STDDEF_H_ -#define _STDDEF_H_ +/* + * C99, 7.17: Common definitions <stddef.h> + * C11, 7.19: Common definitoins <stddef.h> + * C23, 7.21: Common definitions <stddef.h> + */ + +#ifndef _SYS_STDDEF_H_ +#define _SYS_STDDEF_H_ + +/* + * C23 `2. The macro + * + * __STDC_VERSION_STDDEF_H__ + * + * is an integer constant expression with a value equivalent + * to 202311L.' + */ +#if defined(_NETBSD_SOURCE) || defined(_ISOC23_SOURCE) || \ + (__STDC_VERSION__ - 0) >= 202311L +#define __STDC_VERSION_STDDEF_H__ 202311L +#endif #include <sys/cdefs.h> #include <sys/featuretest.h> #include <machine/ansi.h> +/* + * C23 `3. The types are + * + * ptrdiff_t + * + * which is the signed integer type of the result of + * subtracting two pointers; + * + * size_t + * + * which is the unsigned integer type of the result of the + * sizeof operator; + * + * max_align_t + * + * which is an object type whose alignment is the greatest + * fundamental alignment; + * + * wchar_t + * + * which is an integer type whose range of values can + * represent distinct codes for all members of the largest + * extended chracter set specified among the supported + * locales; [...] and + * + * nullptr_t + * + * which is the type of the nullptr predefined constant, see + * below.' + */ #ifdef _BSD_PTRDIFF_T_ typedef _BSD_PTRDIFF_T_ ptrdiff_t; #undef _BSD_PTRDIFF_T_ @@ -48,13 +97,50 @@ typedef _BSD_SIZE_T_ size_t; #undef _BSD_SIZE_T_ #endif +#if (__STDC_VERSION__ - 0) >= 201112L || (__cplusplus - 0) >= 201103L +typedef union { + void *_v; + long double _ld; + long long int _ll; +} max_align_t; +#endif + #if defined(_BSD_WCHAR_T_) && !defined(__cplusplus) typedef _BSD_WCHAR_T_ wchar_t; #undef _BSD_WCHAR_T_ #endif +#if (__STDC_VERSION__ - 0) >= 202311L +typedef typeof_unqual(nullptr) nullptr_t; +#endif + +/* + * C23 `4. The macros are + * + * NULL + * + * which expands to an implementation-defined null pointer + * constant; + * + * unreachable() + * + * which expands to a void expression that invokes undefined + * behavior if it is reached during execution; and + * + * offsetof(type, member-designator) + * + * which expands to an integer constant expression that has + * type size_t, the value of which is the offset in bytes, to + * the subobject (designated by member-designator), from the + * beginning of any object of type type.' + */ + #include <sys/null.h> +#if (__STDC_VERSION__ - 0) >= 202311L +#define unreachable() __unreachable() /* sys/cdefs.h */ +#endif + #if __GNUC_PREREQ__(4, 0) #define offsetof(type, member) __builtin_offsetof(type, member) #elif !defined(__cplusplus) @@ -67,12 +153,4 @@ typedef _BSD_WCHAR_T_ wchar_t; (&reinterpret_cast<const volatile char &>(static_cast<type *>(0)->member)))) #endif -#if (__STDC_VERSION__ - 0) >= 201112L || (__cplusplus - 0) >= 201103L -typedef union { - void *_v; - long double _ld; - long long int _ll; -} max_align_t; -#endif - -#endif /* _STDDEF_H_ */ -\ No newline at end of file +#endif /* _SYS_STDDEF_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/stdlib.h b/lib/libc/include/generic-netbsd/stdlib.h @@ -1,4 +1,4 @@ -/* $NetBSD: stdlib.h,v 1.125.2.2 2024/10/13 10:39:53 martin Exp $ */ +/* $NetBSD: stdlib.h,v 1.130 2025/03/02 16:35:40 riastradh Exp $ */ /*- * Copyright (c) 1990, 1993 @@ -184,7 +184,6 @@ void srandom(unsigned int) __RENAME(__srandom60); #endif #ifdef _NETBSD_SOURCE #define RANDOM_MAX 0x7fffffff /* (((long)1 << 31) - 1) */ -int mkostemp(char *, int); int mkostemps(char *, int, int); #endif @@ -318,8 +317,12 @@ int getenv_r(const char *, char *, size_t); void cfree(void *); int heapsort(void *, size_t, size_t, int (*)(const void *, const void *)); +int heapsort_r(void *, size_t, size_t, + int (*)(const void *, const void *, void *), void *); int mergesort(void *, size_t, size_t, int (*)(const void *, const void *)); +int mergesort_r(void *, size_t, size_t, + int (*)(const void *, const void *, void *), void *); int ptsname_r(int, char *, size_t); int radixsort(const unsigned char **, int, const unsigned char *, unsigned); @@ -399,6 +402,12 @@ size_t wcstombs_l(char * __restrict, const wchar_t * __restrict, size_t, void *reallocarray(void *, size_t, size_t); #endif /* _POSIX_C_SOURCE >= 202405L || _NETBSD_SOURCE || _OPENBSD_SOURCE */ +#if (_POSIX_C_SOURCE - 0) >= 202405L || defined(_NETBSD_SOURCE) +int mkostemp(char *, int); +void qsort_r(void *, size_t, size_t, + int (*)(const void *, const void *, void *), void *); +#endif /* _POSIX_C_SOURCE >= 202405L || _NETBSD_SOURCE */ + __END_DECLS #endif /* !_STDLIB_H_ */ \ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/stdnoreturn.h b/lib/libc/include/generic-netbsd/stdnoreturn.h @@ -1,4 +1,4 @@ -/* $NetBSD: stdnoreturn.h,v 1.1 2016/10/02 13:09:24 kamil Exp $ */ +/* $NetBSD: stdnoreturn.h,v 1.2 2024/09/08 18:13:07 rillig Exp $ */ /*- * Copyright (c) 2016 The NetBSD Foundation, Inc. @@ -32,7 +32,7 @@ #ifndef _STDNORETURN_H_ #define _STDNORETURN_H_ -/* ISO/IEC 9899:201x 7.23 _Noreturn <stdnoreturn.h> */ +/* ISO/IEC 9899:2011 7.23 _Noreturn <stdnoreturn.h> */ #ifndef __noreturn_is_defined #define noreturn _Noreturn diff --git a/lib/libc/include/generic-netbsd/string.h b/lib/libc/include/generic-netbsd/string.h @@ -1,4 +1,4 @@ -/* $NetBSD: string.h,v 1.53 2021/08/09 20:49:08 andvar Exp $ */ +/* $NetBSD: string.h,v 1.58 2024/12/09 12:09:02 nros Exp $ */ /*- * Copyright (c) 1990, 1993 @@ -45,83 +45,110 @@ typedef _BSD_SIZE_T_ size_t; #include <sys/cdefs.h> #include <sys/featuretest.h> +#if (_POSIX_C_SOURCE - 0) >= 200809L || defined(_NETBSD_SOURCE) +# ifndef __LOCALE_T_DECLARED +typedef struct _locale *locale_t; +# define __LOCALE_T_DECLARED +# endif +#endif /* _POSIX_C_SOURCE || _NETBSD_SOURCE */ + __BEGIN_DECLS +#if defined(_XOPEN_SOURCE) || defined(_NETBSD_SOURCE) || \ + (__STDC_VERSION__ - 0 >= 202311L) || defined(_ISOC23_SOURCE) +void *memccpy(void *, const void *, int, size_t); +#endif /* _XOPEN_SOURCE || _NETBSD_SOURCE || _ISOC23_SOURCE */ void *memchr(const void *, int, size_t); int memcmp(const void *, const void *, size_t); void *memcpy(void * __restrict, const void * __restrict, size_t); +#if (_POSIX_C_SOURCE - 0 >= 202405L) || defined(_NETBSD_SOURCE) +void *memmem(const void *, size_t, const void *, size_t); +#endif /* _POSIX_C_SOURCE || _NETBSD_SOURCE */ void *memmove(void *, const void *, size_t); void *memset(void *, int, size_t); +#if (__STDC_VERSION__ - 0 >= 202311L) || defined(_ISOC23_SOURCE) || \ + defined(_NETBSD_SOURCE) +void *memset_explicit(void *, int, size_t); +#endif +#if (_POSIX_C_SOURCE - 0 >= 200809L) || defined(_NETBSD_SOURCE) +char *stpcpy(char * __restrict, const char * __restrict); +char *stpncpy(char * __restrict, const char * __restrict, size_t); +#endif /* _POSIX_C_SOURCE || _NETBSD_SOURCE */ char *strcat(char * __restrict, const char * __restrict); char *strchr(const char *, int); int strcmp(const char *, const char *); int strcoll(const char *, const char *); +#if (_POSIX_C_SOURCE - 0) >= 200809L || defined(_NETBSD_SOURCE) +int strcoll_l(const char *, const char *, locale_t); +#endif /* _POSIX_C_SOURCE || _NETBSD_SOURCE */ char *strcpy(char * __restrict, const char * __restrict); size_t strcspn(const char *, const char *); +#if (_POSIX_C_SOURCE - 0 >= 200809L) || defined(_XOPEN_SOURCE) || \ + defined(_NETBSD_SOURCE) || (__STDC_VERSION__ - 0 >= 202311L) || \ + defined(_ISOC23_SOURCE) +char *strdup(const char *); +#endif /* _POSIX_C_SOURCE || _XOPEN_SOURCE || _NETBSD_SOURCE || + * _ISOC23_SOURCE + */ __aconst char *strerror(int); +#if (_POSIX_C_SOURCE - 0) >= 200809L || defined(_NETBSD_SOURCE) +__aconst char *strerror_l(int, locale_t); +#endif /* _POSIX_C_SOURCE || _NETBSD_SOURCE */ +#if (_POSIX_C_SOURCE - 0 >= 200112L) || \ + defined(_REENTRANT) || defined(_NETBSD_SOURCE) +int strerror_r(int, char *, size_t); +#endif /* _POSIX_C_SOURCE || _REENTRANT || _NETBSD_SOURCE */ +#if (_POSIX_C_SOURCE - 0 >= 202405L) || defined(_NETBSD_SOURCE) +size_t strlcat(char * __restrict, const char * __restrict, size_t); +size_t strlcpy(char * __restrict, const char * __restrict, size_t); +#endif /* _POSIX_C_SOURCE || _NETBSD_SOURCE */ size_t strlen(const char *); char *strncat(char * __restrict, const char * __restrict, size_t); int strncmp(const char *, const char *, size_t); char *strncpy(char * __restrict, const char * __restrict, size_t); -char *strpbrk(const char *, const char *); -char *strrchr(const char *, int); -size_t strspn(const char *, const char *); -char *strstr(const char *, const char *); -char *strtok(char * __restrict, const char * __restrict); -#if (_POSIX_C_SOURCE - 0 >= 199506L) || (_XOPEN_SOURCE - 0 >= 500) || \ - defined(_REENTRANT) || defined(_NETBSD_SOURCE) -char *strtok_r(char *, const char *, char **); -int strerror_r(int, char *, size_t); -#endif /* _POSIX_C_SOURCE >= 199506 || XOPEN_SOURCE >= 500 || ... */ -size_t strxfrm(char * __restrict, const char * __restrict, size_t); - -#if (_POSIX_C_SOURCE - 0 >= 200112L) || defined(_XOPEN_SOURCE) || \ - defined(_NETBSD_SOURCE) -void *memccpy(void *, const void *, int, size_t); -char *strdup(const char *); -#endif - -#if (_POSIX_C_SOURCE - 0 >= 200809L) || (_XOPEN_SOURCE - 0 >= 700) || \ - defined(_NETBSD_SOURCE) -char *stpcpy(char * __restrict, const char * __restrict); -char *stpncpy(char * __restrict, const char * __restrict, size_t); +#if (_POSIX_C_SOURCE - 0 >= 200809L) || defined(_NETBSD_SOURCE) || \ + (__STDC_VERSION__ - 0 >= 202311L) || defined(_ISOC23_SOURCE) char *strndup(const char *, size_t); +#endif /* _POSIX_C_SOURCE || _NETBSD_SOURCE || _ISOC23_SOURCE */ +#if (_POSIX_C_SOURCE - 0 >= 200809L) || defined(_NETBSD_SOURCE) size_t strnlen(const char *, size_t); +#endif /* _POSIX_C_SOURCE || _NETBSD_SOURCE */ +char *strpbrk(const char *, const char *); +char *strrchr(const char *, int); +#if (_POSIX_C_SOURCE - 0 >= 200809L) || defined(_NETBSD_SOURCE) #ifndef __STRSIGNAL_DECLARED #define __STRSIGNAL_DECLARED /* also in unistd.h */ __aconst char *strsignal(int); #endif /* __STRSIGNAL_DECLARED */ #endif +size_t strspn(const char *, const char *); +char *strstr(const char *, const char *); +char *strtok(char * __restrict, const char * __restrict); +#if (_POSIX_C_SOURCE - 0 >= 200112L) || \ + defined(_REENTRANT) || defined(_NETBSD_SOURCE) +char *strtok_r(char *, const char *, char **); +#endif /* _POSIX_C_SOURCE || _REENTRANT || _NETBSD_SOURCE */ +size_t strxfrm(char * __restrict, const char * __restrict, size_t); +#if (_POSIX_C_SOURCE - 0) >= 200809L || defined(_NETBSD_SOURCE) +size_t strxfrm_l(char * __restrict, const char * __restrict, size_t, + locale_t); +#endif /* _POSIX_C_SOURCE || _NETBSD_SOURCE */ __END_DECLS #if defined(_NETBSD_SOURCE) #include <strings.h> /* for backwards-compatibility */ __BEGIN_DECLS -void *memmem(const void *, size_t, const void *, size_t); char *strcasestr(const char *, const char *); char *strchrnul(const char *, int); -size_t strlcat(char *, const char *, size_t); -size_t strlcpy(char *, const char *, size_t); char *strsep(char **, const char *); char *stresep(char **, const char *, int); char *strnstr(const char *, const char *, size_t); void *memrchr(const void *, int, size_t); +void *mempcpy(void * __restrict, const void * __restrict, size_t); void *explicit_memset(void *, int, size_t); int consttime_memequal(const void *, const void *, size_t); __END_DECLS -#endif - -#if (_POSIX_C_SOURCE - 0) >= 200809L || defined(_NETBSD_SOURCE) -# ifndef __LOCALE_T_DECLARED -typedef struct _locale *locale_t; -# define __LOCALE_T_DECLARED -# endif -__BEGIN_DECLS -int strcoll_l(const char *, const char *, locale_t); -size_t strxfrm_l(char * __restrict, const char * __restrict, size_t, locale_t); -__aconst char *strerror_l(int, locale_t); -__END_DECLS -#endif /* _POSIX_C_SOURCE || _NETBSD_SOURCE */ +#endif /* _NETBSD_SOURCE */ #if _FORTIFY_SOURCE > 0 #include <ssp/string.h> diff --git a/lib/libc/include/generic-netbsd/strings.h b/lib/libc/include/generic-netbsd/strings.h @@ -1,4 +1,4 @@ -/* $NetBSD: strings.h,v 1.18 2011/08/22 01:24:15 dholland Exp $ */ +/* $NetBSD: strings.h,v 1.21 2024/11/01 18:52:29 riastradh Exp $ */ /*- * Copyright (c) 1998 The NetBSD Foundation, Inc. @@ -49,17 +49,31 @@ typedef _BSD_SIZE_T_ size_t; #include <machine/int_types.h> __BEGIN_DECLS +#if defined(_NETBSD_SOURCE) || \ + (defined(_XOPEN_SOURCE) && _XOPEN_SOURCE - 0 < 700) int bcmp(const void *, const void *, size_t); void bcopy(const void *, void *, size_t); void bzero(void *, size_t); -int ffs(int); -char *index(const char *, int); +#endif +#if defined(_NETBSD_SOURCE) || _XOPEN_SOURCE - 0 >= 600 +int ffs(int) __constfunc; +#endif +#if defined(_NETBSD_SOURCE) || _XOPEN_SOURCE - 0 >= 800 +int ffsl(long) __constfunc; +int ffsll(long long) __constfunc; +#endif +#ifdef _NETBSD_SOURCE unsigned int popcount(unsigned int) __constfunc; unsigned int popcountl(unsigned long) __constfunc; unsigned int popcountll(unsigned long long) __constfunc; unsigned int popcount32(__uint32_t) __constfunc; unsigned int popcount64(__uint64_t) __constfunc; +#endif +#if defined(_NETBSD_SOURCE) || \ + (defined(_XOPEN_SOURCE) && _XOPEN_SOURCE - 0 < 700) +char *index(const char *, int); char *rindex(const char *, int); +#endif int strcasecmp(const char *, const char *); int strncasecmp(const char *, const char *, size_t); __END_DECLS diff --git a/lib/libc/include/generic-netbsd/sys/atomic.h b/lib/libc/include/generic-netbsd/sys/atomic.h @@ -1,4 +1,4 @@ -/* $NetBSD: atomic.h,v 1.26 2022/07/31 11:28:46 martin Exp $ */ +/* $NetBSD: atomic.h,v 1.27 2025/04/22 01:34:38 riastradh Exp $ */ /*- * Copyright (c) 2007, 2008 The NetBSD Foundation, Inc. @@ -489,31 +489,36 @@ void kcsan_atomic_store(volatile void *, const void *, int); static __inline __always_inline void __do_atomic_store(volatile void *p, const void *q, size_t size) { + volatile uint32_t *p32 = (volatile uint32_t *)((uintptr_t)p & ~3); + switch (size) { case 1: { uint8_t v; unsigned s = 8 * ((uintptr_t)p & 3); uint32_t o, n, m = ~(0xffU << s); + memcpy(&v, q, 1); do { - o = atomic_load_relaxed((const volatile uint32_t *)p); + o = atomic_load_relaxed(p32); n = (o & m) | ((uint32_t)v << s); - } while (atomic_cas_32((volatile uint32_t *)p, o, n) != o); + } while (atomic_cas_32(p32, o, n) != o); break; } case 2: { uint16_t v; unsigned s = 8 * (((uintptr_t)p & 2) >> 1); uint32_t o, n, m = ~(0xffffU << s); + memcpy(&v, q, 2); do { - o = atomic_load_relaxed((const volatile uint32_t *)p); + o = atomic_load_relaxed(p32); n = (o & m) | ((uint32_t)v << s); - } while (atomic_cas_32((volatile uint32_t *)p, o, n) != o); + } while (atomic_cas_32(p32, o, n) != o); break; } case 4: { uint32_t v; + memcpy(&v, q, 4); (void)atomic_swap_32(p, v); break; diff --git a/lib/libc/include/generic-netbsd/sys/bitops.h b/lib/libc/include/generic-netbsd/sys/bitops.h @@ -1,4 +1,4 @@ -/* $NetBSD: bitops.h,v 1.15 2021/09/12 15:22:05 rillig Exp $ */ +/* $NetBSD: bitops.h,v 1.16 2024/05/12 10:34:56 rillig Exp $ */ /*- * Copyright (c) 2007, 2010 The NetBSD Foundation, Inc. @@ -323,7 +323,7 @@ fast_remainder32(uint32_t _v, uint32_t _div, uint32_t _m, uint8_t _s1, size_t __i; \ for (__i = 0; __i < __arraycount((__v)->_b); __i++) \ (__v)->_b[__i] = 0; \ - } while (/* CONSTCOND */ 0) + } while (0) #endif /* GCC 2.95 */ #endif /* _SYS_BITOPS_H_ */ \ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/sys/bootblock.h b/lib/libc/include/generic-netbsd/sys/bootblock.h @@ -1,4 +1,4 @@ -/* $NetBSD: bootblock.h,v 1.58.40.1 2024/06/22 10:57:11 martin Exp $ */ +/* $NetBSD: bootblock.h,v 1.61 2025/04/05 19:57:47 tsutsui Exp $ */ /*- * Copyright (c) 2002-2004 The NetBSD Foundation, Inc. @@ -800,7 +800,7 @@ struct alpha_boot_block { _i++) \ _cksum += le64toh(_bb->bb_data[_i]); \ *(cksum) = htole64(_cksum); \ - } while (/*CONSTCOND*/ 0) + } while (0) /* ------------------------------------------ * apple -- @@ -986,6 +986,17 @@ struct hp300_load { #define HP300_DIR_FLAG 0x8001 /* don't ask me! */ #define HP300_SECTSIZE 256 +#define HP300_LIF_NUMDIR 8 + +#define HP300_LIF_VOLSTART 0 +#define HP300_LIF_VOLSIZE sizeof(struct hp300_lifvol) +#define HP300_LIF_DIRSTART 512 +#define HP300_LIF_DIRSIZE (HP300_LIF_NUMDIR * sizeof(struct hp300_lifdir)) +#define HP300_LIF_FILESTART 8192 + +#define hp300_btolifs(b) (((b) + (HP300_SECTSIZE - 1)) / HP300_SECTSIZE) +#define hp300_lifstob(s) ((s) * HP300_SECTSIZE) + /* ------------------------------------------ * hppa diff --git a/lib/libc/include/generic-netbsd/sys/bswap.h b/lib/libc/include/generic-netbsd/sys/bswap.h @@ -1,4 +1,4 @@ -/* $NetBSD: bswap.h,v 1.19 2015/03/12 15:28:16 christos Exp $ */ +/* $NetBSD: bswap.h,v 1.19.56.1 2025/11/28 10:58:02 martin Exp $ */ /* Written by Manuel Bouyer. Public domain */ @@ -24,20 +24,7 @@ __END_DECLS #if defined(__GNUC__) && !defined(__lint__) -/* machine/byte_swap.h might have defined inline versions */ -#ifndef __BYTE_SWAP_U64_VARIABLE -#define __BYTE_SWAP_U64_VARIABLE bswap64 -#endif - -#ifndef __BYTE_SWAP_U32_VARIABLE -#define __BYTE_SWAP_U32_VARIABLE bswap32 -#endif - -#ifndef __BYTE_SWAP_U16_VARIABLE -#define __BYTE_SWAP_U16_VARIABLE bswap16 -#endif - -#define __byte_swap_u64_constant(x) \ +#define __byte_swap_u64_constexpr(x) \ (__CAST(uint64_t, \ ((((x) & 0xff00000000000000ull) >> 56) | \ (((x) & 0x00ff000000000000ull) >> 40) | \ @@ -48,29 +35,68 @@ __END_DECLS (((x) & 0x000000000000ff00ull) << 40) | \ (((x) & 0x00000000000000ffull) << 56)))) -#define __byte_swap_u32_constant(x) \ +#define __byte_swap_u32_constexpr(x) \ (__CAST(uint32_t, \ ((((x) & 0xff000000) >> 24) | \ (((x) & 0x00ff0000) >> 8) | \ (((x) & 0x0000ff00) << 8) | \ (((x) & 0x000000ff) << 24)))) -#define __byte_swap_u16_constant(x) \ +#define __byte_swap_u16_constexpr(x) \ (__CAST(uint16_t, \ ((((x) & 0xff00) >> 8) | \ (((x) & 0x00ff) << 8)))) +/* + * The compiler always generates an expensive function call to bswap + * on some architectures, we want the inline versions there. + */ +#ifdef __HAVE_SLOW_BSWAP_BUILTIN + +static __inline uint64_t __byte_swap_u64_inline(uint64_t x) { + return __byte_swap_u64_constexpr(x); +} + +static __inline uint32_t __byte_swap_u32_inline(uint32_t x) { + return __byte_swap_u32_constexpr(x); +} + +static __inline uint16_t __byte_swap_u16_inline(uint16_t x) { + return __byte_swap_u16_constexpr(x); +} + +#define __BYTE_SWAP_U64_VARIABLE __byte_swap_u64_inline +#define __BYTE_SWAP_U32_VARIABLE __byte_swap_u32_inline +#define __BYTE_SWAP_U16_VARIABLE __byte_swap_u16_inline + +#else /* !__HAVE_SLOW_BSWAP_BUILTIN */ + +/* allow machine/bswap.h to override these with inline versions */ +#ifndef __BYTE_SWAP_U64_VARIABLE +#define __BYTE_SWAP_U64_VARIABLE bswap64 +#endif + +#ifndef __BYTE_SWAP_U32_VARIABLE +#define __BYTE_SWAP_U32_VARIABLE bswap32 +#endif + +#ifndef __BYTE_SWAP_U16_VARIABLE +#define __BYTE_SWAP_U16_VARIABLE bswap16 +#endif + +#endif /* __HAVE_SLOW_BSWAP_BUILTIN */ + #define bswap64(x) \ __CAST(uint64_t, __builtin_constant_p((x)) ? \ - __byte_swap_u64_constant(x) : __BYTE_SWAP_U64_VARIABLE(x)) + __byte_swap_u64_constexpr(x) : __BYTE_SWAP_U64_VARIABLE(x)) #define bswap32(x) \ __CAST(uint32_t, __builtin_constant_p((x)) ? \ - __byte_swap_u32_constant(x) : __BYTE_SWAP_U32_VARIABLE(x)) + __byte_swap_u32_constexpr(x) : __BYTE_SWAP_U32_VARIABLE(x)) #define bswap16(x) \ __CAST(uint16_t, __builtin_constant_p((x)) ? \ - __byte_swap_u16_constant(x) : __BYTE_SWAP_U16_VARIABLE(x)) + __byte_swap_u16_constexpr(x) : __BYTE_SWAP_U16_VARIABLE(x)) #endif /* __GNUC__ && !__lint__ */ #endif /* !_LOCORE */ diff --git a/lib/libc/include/generic-netbsd/sys/buf.h b/lib/libc/include/generic-netbsd/sys/buf.h @@ -1,4 +1,4 @@ -/* $NetBSD: buf.h,v 1.134 2020/07/31 04:07:30 chs Exp $ */ +/* $NetBSD: buf.h,v 1.135.4.1 2026/04/03 12:38:34 martin Exp $ */ /*- * Copyright (c) 1999, 2000, 2007, 2008 The NetBSD Foundation, Inc. @@ -149,7 +149,7 @@ struct buf { off_t b_dcookie; /* NFS: Offset cookie if dir block */ kcondvar_t b_busy; /* c: threads waiting on buf */ - void *b_unused; /* : unused */ + void *b_private2; /* : private data for owner */ LIST_ENTRY(buf) b_hash; /* c: hash chain */ LIST_ENTRY(buf) b_vnbufs; /* c: associated vnode */ TAILQ_ENTRY(buf) b_freelist; /* c: position if not active */ @@ -234,7 +234,7 @@ struct cluster_save { do { \ memset((bp)->b_data, 0, (u_int)(bp)->b_bcount); \ (bp)->b_resid = 0; \ -} while (/* CONSTCOND */ 0) +} while (0) /* Flags to low-level allocation routines. */ #define B_CLRBUF 0x01 /* Request allocated buffer be cleared. */ diff --git a/lib/libc/include/generic-netbsd/sys/cdefs.h b/lib/libc/include/generic-netbsd/sys/cdefs.h @@ -1,4 +1,4 @@ -/* $NetBSD: cdefs.h,v 1.159.4.1 2024/10/13 16:15:07 martin Exp $ */ +/* $NetBSD: cdefs.h,v 1.166 2025/04/06 22:43:08 rillig Exp $ */ /* * Copyright (c) 1991, 1993 * The Regents of the University of California. All rights reserved. @@ -340,7 +340,7 @@ #if __GNUC_PREREQ__(4, 6) || defined(__clang__) || defined(__lint__) #define __unreachable() __builtin_unreachable() #else -#define __unreachable() do {} while (/*CONSTCOND*/0) +#define __unreachable() do {} while (0) #endif #if defined(_KERNEL) || defined(_RUMPKERNEL) @@ -451,7 +451,7 @@ #if defined(__lint__) #define __thread /* delete */ #define __packed __packed -#define __aligned(x) /* delete */ +#define __aligned(x) _Alignas((x)) #define __section(x) /* delete */ #elif __GNUC_PREREQ__(2, 7) || defined(__PCC__) || defined(__lint__) #define __packed __attribute__((__packed__)) @@ -546,10 +546,17 @@ * seldomly (e.g. at subsystem initialization time) as the * basic block reordering that this affects can often generate * larger code. + * + * We use an explicit ternary operator to map any value to exactly 0 or + * 1 so that (a) we can specify one value to expect, and (b) the given + * expression occurs only in the position of a conditional so that C++ + * classes with conversion to bool work as if this were a conditional. + * In contrast, say, `(exp) != 0' would require the type of exp to + * support conversion to integer as well. */ #if __GNUC_PREREQ__(2, 96) || defined(__lint__) -#define __predict_true(exp) __builtin_expect((exp) != 0, 1) -#define __predict_false(exp) __builtin_expect((exp) != 0, 0) +#define __predict_true(exp) __builtin_expect((exp) ? 1 : 0, 1) +#define __predict_false(exp) __builtin_expect((exp) ? 1 : 0, 0) #else #define __predict_true(exp) (exp) #define __predict_false(exp) (exp) @@ -690,7 +697,38 @@ #define __CASTV(__dt, __st) __CAST(__dt, __CAST(void *, __st)) #define __CASTCV(__dt, __st) __CAST(__dt, __CAST(const void *, __st)) -#define __USE(a) (/*LINTED*/(void)(a)) +/* + * Suppresses `variable set but not used' warnings. + * + * Typically for #ifdefs, where one branch of the #ifdef uses a + * variable but the other does not. Useful in patching external code + * to keep the patches narrowly scoped. + * + * Limitation: Only for variables, and only non-volatile variables. + * + * (Abusing this for anything else may lead to side effects. Pointers + * to volatile objects are OK, as in `volatile int *a', as long as the + * pointer itself is not volatile, as in `int *volatile a'.) + */ +#define __USE(a) (/*LINTED*/(void)(a)) + +/* + * Verifies the expression e compiles, but does not evaluate it. Safe + * when e has side effects. + * + * Typically used for the arguments to macros with conditional + * definitions like DIAGNOSTIC or KDTRACE_HOOKS: when enabled, the + * macro uses the argument; when disabled, the macro passes the + * argument to __MACROUSE but doesn't otherwise use it. Cast to long + * in case the argument is a bit field, which is forbidden in sizeof. + * + * Limitation: Doesn't work for expressions of aggregate (struct/union) + * types. + * + * (If you find a way to handle both bit fields and aggregate types, + * you could unify __USE and __MACROUSE.) + */ +#define __MACROUSE(e) (/*LINTED*/(void)sizeof((long)(e))) #define __type_mask(t) (/*LINTED*/sizeof(t) < sizeof(__INTMAX_TYPE__) ? \ (~((1ULL << (sizeof(t) * __CHAR_BIT__)) - 1)) : 0ULL) diff --git a/lib/libc/include/generic-netbsd/sys/cdefs_aout.h b/lib/libc/include/generic-netbsd/sys/cdefs_aout.h @@ -1,4 +1,4 @@ -/* $NetBSD: cdefs_aout.h,v 1.20 2006/05/18 17:55:38 christos Exp $ */ +/* $NetBSD: cdefs_aout.h,v 1.21 2024/05/29 02:06:46 riastradh Exp $ */ /* * Written by J.T. Conklin <jtc@wimsey.com> 01/17/95. @@ -77,7 +77,14 @@ #undef __KERNEL_RCSID +#ifdef _NETBSD_REVISIONID +#define __RCSID(_s) \ + __IDSTRING(rcsid,_s); \ + __IDSTRING(revisionid, \ + "$" "NetBSD: " __FILE__ " " _NETBSD_REVISIONID " $") +#else #define __RCSID(_s) __IDSTRING(rcsid,_s) +#endif #define __SCCSID(_s) #define __SCCSID2(_s) #if 0 /* XXX userland __COPYRIGHTs have \ns in them */ diff --git a/lib/libc/include/generic-netbsd/sys/cdefs_elf.h b/lib/libc/include/generic-netbsd/sys/cdefs_elf.h @@ -1,4 +1,4 @@ -/* $NetBSD: cdefs_elf.h,v 1.58 2021/06/04 01:58:02 thorpej Exp $ */ +/* $NetBSD: cdefs_elf.h,v 1.59 2024/05/29 02:06:46 riastradh Exp $ */ /* * Copyright (c) 1995, 1996 Carnegie-Mellon University. @@ -162,7 +162,14 @@ #define __IDSTRING(_n,_s) __SECTIONSTRING(.ident,_s) -#define __RCSID(_s) __IDSTRING(rcsid,_s) +#ifdef _NETBSD_REVISIONID +#define __RCSID(_s) \ + __IDSTRING(rcsid,_s); \ + __IDSTRING(revisionid, \ + "$" "NetBSD: " __FILE__ " " _NETBSD_REVISIONID " $") +#else +#define __RCSID(_s) __IDSTRING(rcsid,_s) +#endif #define __SCCSID(_s) #define __SCCSID2(_s) #define __COPYRIGHT(_s) __SECTIONSTRING(.copyright,_s) diff --git a/lib/libc/include/generic-netbsd/sys/chio.h b/lib/libc/include/generic-netbsd/sys/chio.h @@ -1,4 +1,4 @@ -/* $NetBSD: chio.h,v 1.13 2015/09/06 06:01:02 dholland Exp $ */ +/* $NetBSD: chio.h,v 1.14 2025/07/01 21:07:30 andvar Exp $ */ /*- * Copyright (c) 1996, 1999 The NetBSD Foundation, Inc. @@ -142,7 +142,7 @@ struct changer_element_status { char ces_xname[16]; /* external name of drive device */ /* - * The following fieds indicate the element the medium was + * The following fields indicate the element the medium was * moved from in order to arrive in this element. */ int ces_from_type; /* type of element */ diff --git a/lib/libc/include/generic-netbsd/sys/clock.h b/lib/libc/include/generic-netbsd/sys/clock.h @@ -1,4 +1,4 @@ -/* $NetBSD: clock.h,v 1.4 2018/04/19 21:19:07 christos Exp $ */ +/* $NetBSD: clock.h,v 1.7 2023/10/27 14:34:58 jschauma Exp $ */ /*- * Copyright (c) 1996 The NetBSD Foundation, Inc. @@ -32,6 +32,10 @@ #ifndef _SYS_CLOCK_H_ #define _SYS_CLOCK_H_ +#if !defined(_KERNEL) && !defined(_STANDALONE) +#include <stdint.h> +#endif + /* Some handy constants. */ #define SECS_PER_MINUTE 60 #define SECS_PER_HOUR 3600 diff --git a/lib/libc/include/generic-netbsd/sys/common_limits.h b/lib/libc/include/generic-netbsd/sys/common_limits.h @@ -1,4 +1,4 @@ -/* $NetBSD: common_limits.h,v 1.3 2019/01/21 20:29:27 dholland Exp $ */ +/* $NetBSD: common_limits.h,v 1.4 2024/10/30 15:56:12 riastradh Exp $ */ /*- * Copyright (c) 2014 The NetBSD Foundation, Inc. @@ -32,6 +32,8 @@ #ifndef _SYS_COMMON_LIMITS_H_ #define _SYS_COMMON_LIMITS_H_ +#include <sys/featuretest.h> + #define CHAR_BIT __CHAR_BIT__ /* number of bits in a char */ #define SCHAR_MIN (-__SCHAR_MAX__-1) /* min value for a signed char */ diff --git a/lib/libc/include/generic-netbsd/sys/condvar.h b/lib/libc/include/generic-netbsd/sys/condvar.h @@ -1,4 +1,4 @@ -/* $NetBSD: condvar.h,v 1.17 2020/05/11 03:59:33 riastradh Exp $ */ +/* $NetBSD: condvar.h,v 1.19 2023/11/02 10:31:55 martin Exp $ */ /*- * Copyright (c) 2006, 2007, 2008, 2020 The NetBSD Foundation, Inc. diff --git a/lib/libc/include/generic-netbsd/sys/conf.h b/lib/libc/include/generic-netbsd/sys/conf.h @@ -1,4 +1,4 @@ -/* $NetBSD: conf.h,v 1.161 2022/03/28 12:39:18 riastradh Exp $ */ +/* $NetBSD: conf.h,v 1.162 2024/04/17 18:01:29 riastradh Exp $ */ /*- * Copyright (c) 1990, 1993 @@ -43,8 +43,9 @@ * Definitions of device driver entry switches */ -#include <sys/queue.h> #include <sys/device_if.h> +#include <sys/queue.h> +#include <sys/types.h> struct buf; struct knote; @@ -109,7 +110,7 @@ struct cdevsw { extern kmutex_t device_lock; int devsw_attach(const char *, const struct bdevsw *, devmajor_t *, - const struct cdevsw *, devmajor_t *); + const struct cdevsw *, devmajor_t *); void devsw_detach(const struct bdevsw *, const struct cdevsw *); const struct bdevsw *bdevsw_lookup(dev_t); const struct cdevsw *cdevsw_lookup(dev_t); diff --git a/lib/libc/include/generic-netbsd/sys/container_of.h b/lib/libc/include/generic-netbsd/sys/container_of.h @@ -0,0 +1,75 @@ +/* $NetBSD: container_of.h,v 1.1 2024/10/08 22:53:20 christos Exp $ */ + +/*- + * Copyright (c) 2024 The NetBSD Foundation, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _SYS_CONTAINER_OF_H_ +#define _SYS_CONTAINER_OF_H_ + +#include <sys/stddef.h> + +/* + * Return the container of an embedded struct. Given x = &c->f, + * container_of(x, T, f) yields c, where T is the type of c. Example: + * + * struct foo { ... }; + * struct bar { + * int b_x; + * struct foo b_foo; + * ... + * }; + * + * struct bar b; + * struct foo *fp = &b.b_foo; + * + * Now we can get at b from fp by: + * + * struct bar *bp = container_of(fp, struct bar, b_foo); + * + * The 0*sizeof((PTR) - ...) causes the compiler to warn if the type of + * *fp does not match the type of struct bar::b_foo. + * We skip the validation for coverity runs to avoid warnings. + */ +#if defined(__COVERITY__) || defined(__LGTM_BOT__) +#define __validate_container_of(PTR, TYPE, FIELD) 0 +#define __validate_const_container_of(PTR, TYPE, FIELD) 0 +#else +#define __validate_container_of(PTR, TYPE, FIELD) \ + (0 * sizeof((PTR) - &((TYPE *)(((char *)(PTR)) - \ + offsetof(TYPE, FIELD)))->FIELD)) +#define __validate_const_container_of(PTR, TYPE, FIELD) \ + (0 * sizeof((PTR) - &((const TYPE *)(((const char *)(PTR)) - \ + offsetof(TYPE, FIELD)))->FIELD)) +#endif + +#define container_of(PTR, TYPE, FIELD) \ + ((TYPE *)(((char *)(PTR)) - offsetof(TYPE, FIELD)) \ + + __validate_container_of(PTR, TYPE, FIELD)) +#define const_container_of(PTR, TYPE, FIELD) \ + ((const TYPE *)(((const char *)(PTR)) - offsetof(TYPE, FIELD)) \ + + __validate_const_container_of(PTR, TYPE, FIELD)) + +#endif /* !_SYS_CONTAINER_OF_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/sys/device.h b/lib/libc/include/generic-netbsd/sys/device.h @@ -1,4 +1,4 @@ -/* $NetBSD: device.h,v 1.185 2022/08/24 11:19:25 riastradh Exp $ */ +/* $NetBSD: device.h,v 1.190 2025/03/19 20:47:49 jakllsch Exp $ */ /* * Copyright (c) 2021 The NetBSD Foundation, Inc. @@ -437,14 +437,6 @@ struct cfattachinit { const char *cfai_name; /* driver name */ struct cfattach * const *cfai_list;/* list of attachments */ }; -/* - * the same, but with a non-constant list so it can be modified - * for module bookkeeping - */ -struct cfattachlkminit { - const char *cfai_name; /* driver name */ - struct cfattach **cfai_list; /* list of attachments */ -}; /* * Configuration printing functions, and their return codes. The second @@ -554,14 +546,20 @@ device_t config_found(device_t, void *, cfprint_t, const struct cfargs *); device_t config_rootfound(const char *, void *); device_t config_attach(device_t, cfdata_t, void *, cfprint_t, const struct cfargs *); +device_t config_found_acquire(device_t, void *, cfprint_t, + const struct cfargs *); +device_t config_attach_acquire(device_t, cfdata_t, void *, cfprint_t, + const struct cfargs *); int config_match(device_t, cfdata_t, void *); int config_probe(device_t, cfdata_t, void *); bool ifattr_match(const char *, const char *); device_t config_attach_pseudo(cfdata_t); +device_t config_attach_pseudo_acquire(cfdata_t, void *); int config_detach(device_t, int); +int config_detach_release(device_t, int); int config_detach_children(device_t, int flags); void config_detach_commit(device_t); bool config_detach_all(int); @@ -588,6 +586,7 @@ device_t device_lookup(cfdriver_t, int); void *device_lookup_private(cfdriver_t, int); device_t device_lookup_acquire(cfdriver_t, int); +void device_acquire(device_t); void device_release(device_t); void device_register(device_t, void *); @@ -615,11 +614,16 @@ bool devhandle_is_valid(devhandle_t); devhandle_t devhandle_invalid(void); devhandle_type_t devhandle_type(devhandle_t); int devhandle_compare(devhandle_t, devhandle_t); +devhandle_t devhandle_subclass(devhandle_t, struct devhandle_impl *, + device_call_t (*)(devhandle_t, const char *, + devhandle_t *)); device_call_t devhandle_lookup_device_call(devhandle_t, const char *, devhandle_t *); -void devhandle_impl_inherit(struct devhandle_impl *, - const struct devhandle_impl *); +void devhandle_impl_subclass(struct devhandle_impl *, + const struct devhandle_impl *, + device_call_t (*)(devhandle_t, const char *, + devhandle_t *)); device_t deviter_first(deviter_t *, deviter_flags_t); void deviter_init(deviter_t *, deviter_flags_t); @@ -710,10 +714,13 @@ struct device_call_generic { void *args; }; -int device_call_generic(device_t, const struct device_call_generic *); +int device_call_generic(device_t, devhandle_t, + const struct device_call_generic *); #define device_call(dev, call) \ - device_call_generic((dev), &(call)->generic) + device_call_generic((dev), device_handle(dev), &(call)->generic) +#define devhandle_call(handle, call) \ + device_call_generic(NULL, (handle), &(call)->generic) #endif /* _KERNEL */ diff --git a/lib/libc/include/generic-netbsd/sys/disk.h b/lib/libc/include/generic-netbsd/sys/disk.h @@ -1,4 +1,4 @@ -/* $NetBSD: disk.h,v 1.77.10.1 2023/08/01 14:49:06 martin Exp $ */ +/* $NetBSD: disk.h,v 1.79 2025/04/13 14:01:00 jakllsch Exp $ */ /*- * Copyright (c) 1996, 1997, 2004 The NetBSD Foundation, Inc. @@ -248,6 +248,10 @@ struct dkwedge_list { * <integer>...</integer> * <key>alternative-cylinders</key> * <integer>...</integer> + * <key>physical-sector-size</key> + * <integer>...</integer> + * <key>aligned-sector</key> + * <integer>...</integer> * </dict> * NOTE: Not all geometry information is relevant for every kind of disk. */ @@ -274,6 +278,9 @@ struct disk_geom { * configuration description areas, etc. */ uint32_t dg_acylinders; + + uint32_t dg_physsecsize; /* # of bytes per physical sector */ + uint32_t dg_alignedsec; /* first aligned logical sector # */ }; /* diff --git a/lib/libc/include/generic-netbsd/sys/disklabel.h b/lib/libc/include/generic-netbsd/sys/disklabel.h @@ -1,4 +1,4 @@ -/* $NetBSD: disklabel.h,v 1.127 2022/11/01 06:47:41 simonb Exp $ */ +/* $NetBSD: disklabel.h,v 1.128 2024/04/10 20:00:12 andvar Exp $ */ /* * Copyright (c) 1987, 1988, 1993 @@ -127,7 +127,7 @@ struct partition { /* the partition table */ * padding at the end, but that would have been confusing (although that * is what actually happens), because the partitions structure is supposed * to be variable size and putting a padding uint32_t would be weird. - * Unfornately mips32 and i386 align uint64_t standalone at an 8 byte + * Unfortunately mips32 and i386 align uint64_t standalone at an 8 byte * boundary, but in structures at a 4 byte boundary so matt's * change did not affect them. * diff --git a/lib/libc/include/generic-netbsd/sys/disklabel_gpt.h b/lib/libc/include/generic-netbsd/sys/disklabel_gpt.h @@ -1,4 +1,4 @@ -/* $NetBSD: disklabel_gpt.h,v 1.15 2022/08/28 13:50:50 riastradh Exp $ */ +/* $NetBSD: disklabel_gpt.h,v 1.17 2024/08/19 17:16:02 christos Exp $ */ /* * Copyright (c) 2002 Marcel Moolenaar @@ -136,6 +136,10 @@ struct gpt_ent { {0x516e7cb8,0x6ecf,0x11d6,0x8f,0xf8,{0x00,0x02,0x2d,0x09,0x71,0x2b}} #define GPT_ENT_TYPE_FREEBSD_ZFS \ {0x516e7cba,0x6ecf,0x11d6,0x8f,0xf8,{0x00,0x02,0x2d,0x09,0x71,0x2b}} + +#define GPT_ENT_TYPE_OPENBSD_DATA \ + {0x824CC7A0,0x36A8,0x11E3,0x89,0x0A,{0x95,0x25,0x19,0xAD,0x3F,0x61}} + /* * The following are unused but documented here to avoid reuse. * @@ -147,6 +151,8 @@ struct gpt_ent { {0xe3c9e316,0x0b5c,0x4db8,0x81,0x7d,{0xf9,0x2d,0xf0,0x02,0x15,0xae}} #define GPT_ENT_TYPE_MS_BASIC_DATA \ {0xebd0a0a2,0xb9e5,0x4433,0x87,0xc0,{0x68,0xb6,0xb7,0x26,0x99,0xc7}} +#define GPT_ENT_TYPE_MS_RECOVERY \ + {0xde94bba4,0x06d1,0x4d40,0xa1,0x6a,{0xbf,0xd5,0x01,0x79,0xd6,0xac}} #define GPT_ENT_TYPE_MS_LDM_METADATA \ {0x5808c8aa,0x7e8f,0x42e0,0x85,0xd2,{0xe1,0xe9,0x04,0x34,0xcf,0xb3}} #define GPT_ENT_TYPE_MS_LDM_DATA \ diff --git a/lib/libc/include/generic-netbsd/sys/efiio.h b/lib/libc/include/generic-netbsd/sys/efiio.h @@ -1,4 +1,4 @@ -/* $NetBSD: efiio.h,v 1.2.4.1 2023/08/01 16:05:12 martin Exp $ */ +/* $NetBSD: efiio.h,v 1.3 2023/05/22 16:27:58 riastradh Exp $ */ /*- * Copyright (c) 2021 The NetBSD Foundation, Inc. diff --git a/lib/libc/include/generic-netbsd/sys/elfdefinitions.h b/lib/libc/include/generic-netbsd/sys/elfdefinitions.h @@ -1,5 +1,5 @@ /*- - * Copyright (c) 2010,2021 Joseph Koshy + * Copyright (c) 2010,2021,2024 Joseph Koshy * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -27,19 +27,78 @@ /* * WARNING: GENERATED FILE. DO NOT MODIFY. * - * GENERATED FROM: Id: elfdefinitions.m4 3984 2022-05-06 11:22:42Z jkoshy - * GENERATED FROM: Id: elfconstants.m4 3980 2022-05-02 19:50:00Z jkoshy + * GENERATED FROM: Id: elfdefinitions.m4 4162 2025-02-04 18:52:12Z jkoshy + * GENERATED FROM: Id: elfconstants.m4 4172 2025-02-06 21:19:36Z jkoshy */ /* - * These definitions are based on: - * - The public specification of the ELF format as defined in the - * October 2009 draft of System V ABI. - * See: http://www.sco.com/developers/gabi/latest/ch4.intro.html - * - The May 1998 (version 1.5) draft of "The ELF-64 object format". - * - Processor-specific ELF ABI definitions for sparc, i386, amd64, mips, - * ia64, powerpc, and RISC-V processors. - * - The "Linkers and Libraries Guide", from Sun Microsystems. + * These definitions are believed to be compatible with: + * + * - The public specification of the ELF format as defined in the + * October 2009 draft of System V ABI. + * http://www.sco.com/developers/gabi/latest/ch4.intro.html + * + * - The May 1998 (version 1.5) draft of "The ELF-64 object format". + * + * - The "Linkers and Libraries Guide", from Sun Microsystems. + * + * - Processor-specific ELF ABI definitions for the aarch64, arm, i386, + * ia_64, loongarch, mips, ppc, ppc64, riscv, s390, sparc, vax and + * x86_64 architectures: + * + * i386 :: + * System V Application Binary Interface + * Intel386 Architecture Processor Supplement Version 1.2 + * https://gitlab.com/x86-psABIs/i386-ABI/-/tree/hjl/x86/master + * + * aarch64 :: + * ELF for the Arm® 64-bit Architecture (AArch64) + * https://github.com/ARM-software/abi-aa/blob/main/aaelf64/aaelf64.rst + * + * arm :: + * ELF for the Arm® Architecture + * https://github.com/ARM-software/abi-aa/blob/main/aaelf32/aaelf32.rst + * + * ia_64 :: + * Intel® Itanium™ Processor-specific Application Binary Interface (ABI) + * Document Number: 245370-003 + * http://refspecs.linux-foundation.org/elf/IA64-SysV-psABI.pdf + * + * loongarch :: + * ELF for the LoongArch™ Architecture + * https://github.com/loongson/la-abi-specs/blob/release/laelf.adoc. + * + * mips :: + * SYSTEM V APPLICATION BINARY INTERFACE, MIPS RISC Processor Supplement, + * 3rd Edition, 1996. + * https://refspecs.linuxfoundation.org/elf/mipsabi.pdf + * + * ppc :: + * Power Architecture® 32-bit Application Binary Interface + * Supplement 1.0 - Linux® & Embedded + * (Archived link) https://web.archive.org/web/20120608002551/\ + * https://www.power.org/resources/downloads/\ + * Power-Arch-32-bit-ABI-supp-1.0-Unified.pdf + * + * ppc64 :: + * 64-bit ELF ABI Specification for OpenPOWER Architecture + * https://openpowerfoundation.org/specifications/64bitelfabi/ + * + * riscv :: + * RISC-V ELF Specification + * https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-elf.adoc + * + * s390 :: + * S/390 ELF Application Binary Interface Supplement + * https://refspecs.linuxfoundation.org/ELF/zSeries/lzsabi0_zSeries.htm + * + * sparc :: + * Oracle Solaris Linkers and Libraries Guide + * November 2024, Document E36783-04. + * + * x86_64 :: + * ELF x86-64-ABI psABI + * https://gitlab.com/x86-psABIs/x86-64-ABI */ #ifndef _SYS_ELFDEFINITIONS_H_ @@ -49,286 +108,293 @@ * Types of capabilities. */ -#define CA_SUNW_NULL 0 -#define CA_SUNW_HW_1 1 -#define CA_SUNW_SW_1 2 +#define CA_SUNW_NULL 0 /* ignored */ +#define CA_SUNW_HW_1 1 /* hardware capability */ +#define CA_SUNW_SW_1 2 /* software capability */ /* * Flags used with dynamic linking entries. */ -#define DF_ORIGIN 0x1 -#define DF_SYMBOLIC 0x2 -#define DF_TEXTREL 0x4 -#define DF_BIND_NOW 0x8 -#define DF_STATIC_TLS 0x10 -#define DF_1_BIND_NOW 0x1 -#define DF_1_GLOBAL 0x2 -#define DF_1_GROUP 0x4 -#define DF_1_NODELETE 0x8 -#define DF_1_LOADFLTR 0x10 -#define DF_1_INITFIRST 0x20 -#define DF_1_NOOPEN 0x40 -#define DF_1_ORIGIN 0x80 -#define DF_1_DIRECT 0x100 -#define DF_1_INTERPOSE 0x400 -#define DF_1_NODEFLIB 0x800 -#define DF_1_NODUMP 0x1000 -#define DF_1_CONFALT 0x2000 -#define DF_1_ENDFILTEE 0x4000 -#define DF_1_DISPRELDNE 0x8000 -#define DF_1_DISPRELPND 0x10000 +#define DF_ORIGIN 0x1 /* object being loaded may refer to $ORIGIN */ +#define DF_SYMBOLIC 0x2 /* search library for references before executable */ +#define DF_TEXTREL 0x4 /* relocation entries may modify text segment */ +#define DF_BIND_NOW 0x8 /* process relocation entries at load time */ +#define DF_STATIC_TLS 0x10 /* uses static thread-local storage */ +#define DF_1_BIND_NOW 0x1 /* process relocation entries at load time */ +#define DF_1_GLOBAL 0x2 /* unused */ +#define DF_1_GROUP 0x4 /* object is a member of a group */ +#define DF_1_NODELETE 0x8 /* object cannot be deleted from a process */ +#define DF_1_LOADFLTR 0x10 /* immediate load filtees */ +#define DF_1_INITFIRST 0x20 /* initialize object first */ +#define DF_1_NOOPEN 0x40 /* disallow dlopen() */ +#define DF_1_ORIGIN 0x80 /* object being loaded may refer to $ORIGIN */ +#define DF_1_DIRECT 0x100 /* direct bindings enabled */ +#define DF_1_INTERPOSE 0x400 /* object is interposer */ +#define DF_1_NODEFLIB 0x800 /* ignore default library search path */ +#define DF_1_NODUMP 0x1000 /* disallow dldump() */ +#define DF_1_CONFALT 0x2000 /* object is a configuration alternative */ +#define DF_1_ENDFILTEE 0x4000 /* filtee terminates filter search */ +#define DF_1_DISPRELDNE 0x8000 /* displacement relocation done */ +#define DF_1_DISPRELPND 0x10000 /* displacement relocation pending */ /* * Dynamic linking entry types. */ -#define DT_NULL 0 -#define DT_NEEDED 1 -#define DT_PLTRELSZ 2 -#define DT_PLTGOT 3 -#define DT_HASH 4 -#define DT_STRTAB 5 -#define DT_SYMTAB 6 -#define DT_RELA 7 -#define DT_RELASZ 8 -#define DT_RELAENT 9 -#define DT_STRSZ 10 -#define DT_SYMENT 11 -#define DT_INIT 12 -#define DT_FINI 13 -#define DT_SONAME 14 -#define DT_RPATH 15 -#define DT_SYMBOLIC 16 -#define DT_REL 17 -#define DT_RELSZ 18 -#define DT_RELENT 19 -#define DT_PLTREL 20 -#define DT_DEBUG 21 -#define DT_TEXTREL 22 -#define DT_JMPREL 23 -#define DT_BIND_NOW 24 -#define DT_INIT_ARRAY 25 -#define DT_FINI_ARRAY 26 -#define DT_INIT_ARRAYSZ 27 -#define DT_FINI_ARRAYSZ 28 -#define DT_RUNPATH 29 -#define DT_FLAGS 30 -#define DT_ENCODING 32 -#define DT_PREINIT_ARRAY 32 -#define DT_PREINIT_ARRAYSZ 33 -#define DT_MAXPOSTAGS 34 -#define DT_LOOS 0x6000000DUL -#define DT_SUNW_AUXILIARY 0x6000000DUL -#define DT_SUNW_RTLDINF 0x6000000EUL -#define DT_SUNW_FILTER 0x6000000FUL -#define DT_SUNW_CAP 0x60000010UL -#define DT_SUNW_ASLR 0x60000023UL -#define DT_HIOS 0x6FFFF000UL -#define DT_VALRNGLO 0x6FFFFD00UL -#define DT_GNU_PRELINKED 0x6FFFFDF5UL -#define DT_GNU_CONFLICTSZ 0x6FFFFDF6UL -#define DT_GNU_LIBLISTSZ 0x6FFFFDF7UL -#define DT_CHECKSUM 0x6FFFFDF8UL -#define DT_PLTPADSZ 0x6FFFFDF9UL -#define DT_MOVEENT 0x6FFFFDFAUL -#define DT_MOVESZ 0x6FFFFDFBUL -#define DT_FEATURE 0x6FFFFDFCUL -#define DT_POSFLAG_1 0x6FFFFDFDUL -#define DT_SYMINSZ 0x6FFFFDFEUL -#define DT_SYMINENT 0x6FFFFDFFUL -#define DT_VALRNGHI 0x6FFFFDFFUL -#define DT_ADDRRNGLO 0x6FFFFE00UL -#define DT_GNU_HASH 0x6FFFFEF5UL -#define DT_TLSDESC_PLT 0x6FFFFEF6UL -#define DT_TLSDESC_GOT 0x6FFFFEF7UL -#define DT_GNU_CONFLICT 0x6FFFFEF8UL -#define DT_GNU_LIBLIST 0x6FFFFEF9UL -#define DT_CONFIG 0x6FFFFEFAUL -#define DT_DEPAUDIT 0x6FFFFEFBUL -#define DT_AUDIT 0x6FFFFEFCUL -#define DT_PLTPAD 0x6FFFFEFDUL -#define DT_MOVETAB 0x6FFFFEFEUL -#define DT_SYMINFO 0x6FFFFEFFUL -#define DT_ADDRRNGHI 0x6FFFFEFFUL -#define DT_VERSYM 0x6FFFFFF0UL -#define DT_RELACOUNT 0x6FFFFFF9UL -#define DT_RELCOUNT 0x6FFFFFFAUL -#define DT_FLAGS_1 0x6FFFFFFBUL -#define DT_VERDEF 0x6FFFFFFCUL -#define DT_VERDEFNUM 0x6FFFFFFDUL -#define DT_VERNEED 0x6FFFFFFEUL -#define DT_VERNEEDNUM 0x6FFFFFFFUL -#define DT_LOPROC 0x70000000UL -#define DT_ARM_SYMTABSZ 0x70000001UL -#define DT_SPARC_REGISTER 0x70000001UL -#define DT_ARM_PREEMPTMAP 0x70000002UL -#define DT_MIPS_RLD_VERSION 0x70000001UL -#define DT_MIPS_TIME_STAMP 0x70000002UL -#define DT_MIPS_ICHECKSUM 0x70000003UL -#define DT_MIPS_IVERSION 0x70000004UL -#define DT_MIPS_FLAGS 0x70000005UL -#define DT_MIPS_BASE_ADDRESS 0x70000006UL -#define DT_MIPS_CONFLICT 0x70000008UL -#define DT_MIPS_LIBLIST 0x70000009UL -#define DT_MIPS_LOCAL_GOTNO 0x7000000AUL -#define DT_MIPS_CONFLICTNO 0x7000000BUL -#define DT_MIPS_LIBLISTNO 0x70000010UL -#define DT_MIPS_SYMTABNO 0x70000011UL -#define DT_MIPS_UNREFEXTNO 0x70000012UL -#define DT_MIPS_GOTSYM 0x70000013UL -#define DT_MIPS_HIPAGENO 0x70000014UL -#define DT_MIPS_RLD_MAP 0x70000016UL -#define DT_MIPS_DELTA_CLASS 0x70000017UL -#define DT_MIPS_DELTA_CLASS_NO 0x70000018UL -#define DT_MIPS_DELTA_INSTANCE 0x70000019UL -#define DT_MIPS_DELTA_INSTANCE_NO 0x7000001AUL -#define DT_MIPS_DELTA_RELOC 0x7000001BUL -#define DT_MIPS_DELTA_RELOC_NO 0x7000001CUL -#define DT_MIPS_DELTA_SYM 0x7000001DUL -#define DT_MIPS_DELTA_SYM_NO 0x7000001EUL -#define DT_MIPS_DELTA_CLASSSYM 0x70000020UL -#define DT_MIPS_DELTA_CLASSSYM_NO 0x70000021UL -#define DT_MIPS_CXX_FLAGS 0x70000022UL -#define DT_MIPS_PIXIE_INIT 0x70000023UL -#define DT_MIPS_SYMBOL_LIB 0x70000024UL -#define DT_MIPS_LOCALPAGE_GOTIDX 0x70000025UL -#define DT_MIPS_LOCAL_GOTIDX 0x70000026UL -#define DT_MIPS_HIDDEN_GOTIDX 0x70000027UL -#define DT_MIPS_PROTECTED_GOTIDX 0x70000028UL -#define DT_MIPS_OPTIONS 0x70000029UL -#define DT_MIPS_INTERFACE 0x7000002AUL -#define DT_MIPS_DYNSTR_ALIGN 0x7000002BUL -#define DT_MIPS_INTERFACE_SIZE 0x7000002CUL -#define DT_MIPS_RLD_TEXT_RESOLVE_ADDR 0x7000002DUL -#define DT_MIPS_PERF_SUFFIX 0x7000002EUL -#define DT_MIPS_COMPACT_SIZE 0x7000002FUL -#define DT_MIPS_GP_VALUE 0x70000030UL -#define DT_MIPS_AUX_DYNAMIC 0x70000031UL -#define DT_MIPS_PLTGOT 0x70000032UL -#define DT_MIPS_RLD_OBJ_UPDATE 0x70000033UL -#define DT_MIPS_RWPLT 0x70000034UL -#define DT_PPC_GOT 0x70000000UL -#define DT_PPC_TLSOPT 0x70000001UL -#define DT_PPC64_GLINK 0x70000000UL -#define DT_PPC64_OPD 0x70000001UL -#define DT_PPC64_OPDSZ 0x70000002UL -#define DT_PPC64_TLSOPT 0x70000003UL -#define DT_AUXILIARY 0x7FFFFFFDUL -#define DT_USED 0x7FFFFFFEUL -#define DT_FILTER 0x7FFFFFFFUL -#define DT_HIPROC 0x7FFFFFFFUL +#define DT_NULL 0 /* end of array */ +#define DT_NEEDED 1 /* names a needed library */ +#define DT_PLTRELSZ 2 /* size in bytes of associated relocation entries */ +#define DT_PLTGOT 3 /* address associated with the procedure linkage table */ +#define DT_HASH 4 /* address of the symbol hash table */ +#define DT_STRTAB 5 /* address of the string table */ +#define DT_SYMTAB 6 /* address of the symbol table */ +#define DT_RELA 7 /* address of the relocation table */ +#define DT_RELASZ 8 /* size of the DT_RELA table */ +#define DT_RELAENT 9 /* size of each DT_RELA entry */ +#define DT_STRSZ 10 /* size of the string table */ +#define DT_SYMENT 11 /* size of a symbol table entry */ +#define DT_INIT 12 /* address of the initialization function */ +#define DT_FINI 13 /* address of the finalization function */ +#define DT_SONAME 14 /* names the shared object */ +#define DT_RPATH 15 /* runtime library search path */ +#define DT_SYMBOLIC 16 /* alter symbol resolution algorithm */ +#define DT_REL 17 /* address of the DT_REL table */ +#define DT_RELSZ 18 /* size of the DT_REL table */ +#define DT_RELENT 19 /* size of each DT_REL entry */ +#define DT_PLTREL 20 /* type of relocation entry in the procedure linkage table */ +#define DT_DEBUG 21 /* used for debugging */ +#define DT_TEXTREL 22 /* text segment may be written to during relocation */ +#define DT_JMPREL 23 /* address of relocation entries associated with the procedure linkage table */ +#define DT_BIND_NOW 24 /* bind symbols at loading time */ +#define DT_INIT_ARRAY 25 /* pointers to initialization functions */ +#define DT_FINI_ARRAY 26 /* pointers to termination functions */ +#define DT_INIT_ARRAYSZ 27 /* size of the DT_INIT_ARRAY */ +#define DT_FINI_ARRAYSZ 28 /* size of the DT_FINI_ARRAY */ +#define DT_RUNPATH 29 /* index of library search path string */ +#define DT_FLAGS 30 /* flags specific to the object being loaded */ +#define DT_ENCODING 32 /* standard semantics */ +#define DT_PREINIT_ARRAY 32 /* pointers to pre-initialization functions */ +#define DT_PREINIT_ARRAYSZ 33 /* size of pre-initialization array */ +#define DT_MAXPOSTAGS 34 /* the number of positive tags */ +#define DT_LOOS 0x6000000D /* start of OS-specific types */ +#define DT_SUNW_AUXILIARY 0x6000000D /* offset of string naming auxiliary filtees */ +#define DT_SUNW_RTLDINF 0x6000000E /* rtld internal use */ +#define DT_SUNW_FILTER 0x6000000F /* offset of string naming standard filtees */ +#define DT_SUNW_CAP 0x60000010 /* address of hardware capabilities section */ +#define DT_SUNW_ASLR 0x60000023 /* Address Space Layout Randomization flag */ +#define DT_HIOS 0x6FFFF000 /* end of OS-specific types */ +#define DT_VALRNGLO 0x6FFFFD00 /* start of range using the d_val field */ +#define DT_GNU_PRELINKED 0x6FFFFDF5 /* prelinking timestamp */ +#define DT_GNU_CONFLICTSZ 0x6FFFFDF6 /* size of conflict section */ +#define DT_GNU_LIBLISTSZ 0x6FFFFDF7 /* size of library list */ +#define DT_CHECKSUM 0x6FFFFDF8 /* checksum for the object */ +#define DT_PLTPADSZ 0x6FFFFDF9 /* size of PLT padding */ +#define DT_MOVEENT 0x6FFFFDFA /* size of DT_MOVETAB entries */ +#define DT_MOVESZ 0x6FFFFDFB /* total size of the MOVETAB table */ +#define DT_FEATURE 0x6FFFFDFC /* feature values */ +#define DT_POSFLAG_1 0x6FFFFDFD /* dynamic position flags */ +#define DT_SYMINSZ 0x6FFFFDFE /* size of the DT_SYMINFO table */ +#define DT_SYMINENT 0x6FFFFDFF /* size of a DT_SYMINFO entry */ +#define DT_VALRNGHI 0x6FFFFDFF /* end of range using the d_val field */ +#define DT_ADDRRNGLO 0x6FFFFE00 /* start of range using the d_ptr field */ +#define DT_GNU_HASH 0x6FFFFEF5 /* GNU style hash tables */ +#define DT_TLSDESC_PLT 0x6FFFFEF6 /* location of PLT entry for TLS descriptor resolver calls */ +#define DT_TLSDESC_GOT 0x6FFFFEF7 /* location of GOT entry used by TLS descriptor resolver PLT entry */ +#define DT_GNU_CONFLICT 0x6FFFFEF8 /* address of conflict section */ +#define DT_GNU_LIBLIST 0x6FFFFEF9 /* address of conflict section */ +#define DT_CONFIG 0x6FFFFEFA /* configuration file */ +#define DT_DEPAUDIT 0x6FFFFEFB /* string defining audit libraries */ +#define DT_AUDIT 0x6FFFFEFC /* string defining audit libraries */ +#define DT_PLTPAD 0x6FFFFEFD /* PLT padding */ +#define DT_MOVETAB 0x6FFFFEFE /* address of a move table */ +#define DT_SYMINFO 0x6FFFFEFF /* address of the symbol information table */ +#define DT_ADDRRNGHI 0x6FFFFEFF /* end of range using the d_ptr field */ +#define DT_VERSYM 0x6FFFFFF0 /* address of the version section */ +#define DT_RELACOUNT 0x6FFFFFF9 /* count of RELA relocations */ +#define DT_RELCOUNT 0x6FFFFFFA /* count of REL relocations */ +#define DT_FLAGS_1 0x6FFFFFFB /* flag values */ +#define DT_VERDEF 0x6FFFFFFC /* address of the version definition segment */ +#define DT_VERDEFNUM 0x6FFFFFFD /* the number of version definition entries */ +#define DT_VERNEED 0x6FFFFFFE /* address of section with needed versions */ +#define DT_VERNEEDNUM 0x6FFFFFFF /* the number of version needed entries */ +#define DT_LOPROC 0x70000000 /* start of processor-specific types */ +#define DT_ARM_SYMTABSZ 0x70000001 /* number of entries in the dynamic symbol table */ +#define DT_SPARC_REGISTER 0x70000001 /* index of an STT_SPARC_REGISTER symbol */ +#define DT_ARM_PREEMPTMAP 0x70000002 /* address of the preemption map */ +#define DT_MIPS_RLD_VERSION 0x70000001 /* version ID for runtime linker interface */ +#define DT_MIPS_TIME_STAMP 0x70000002 /* timestamp */ +#define DT_MIPS_ICHECKSUM 0x70000003 /* checksum of all external strings and common sizes */ +#define DT_MIPS_IVERSION 0x70000004 /* string table index of a version string */ +#define DT_MIPS_FLAGS 0x70000005 /* MIPS-specific flags */ +#define DT_MIPS_BASE_ADDRESS 0x70000006 /* base address for the executable/DSO */ +#define DT_MIPS_CONFLICT 0x70000008 /* address of .conflict section */ +#define DT_MIPS_LIBLIST 0x70000009 /* address of .liblist section */ +#define DT_MIPS_LOCAL_GOTNO 0x7000000A /* number of local GOT entries */ +#define DT_MIPS_CONFLICTNO 0x7000000B /* number of entries in the .conflict section */ +#define DT_MIPS_LIBLISTNO 0x70000010 /* number of entries in the .liblist section */ +#define DT_MIPS_SYMTABNO 0x70000011 /* number of entries in the .dynsym section */ +#define DT_MIPS_UNREFEXTNO 0x70000012 /* index of first external dynamic symbol not referenced locally */ +#define DT_MIPS_GOTSYM 0x70000013 /* index of first dynamic symbol corresponds to a GOT entry */ +#define DT_MIPS_HIPAGENO 0x70000014 /* number of page table entries in GOT */ +#define DT_MIPS_RLD_MAP 0x70000016 /* address of runtime linker map */ +#define DT_MIPS_DELTA_CLASS 0x70000017 /* Delta C++ class definition */ +#define DT_MIPS_DELTA_CLASS_NO 0x70000018 /* number of entries in DT_MIPS_DELTA_CLASS */ +#define DT_MIPS_DELTA_INSTANCE 0x70000019 /* Delta C++ class instances */ +#define DT_MIPS_DELTA_INSTANCE_NO 0x7000001A /* number of entries in DT_MIPS_DELTA_INSTANCE */ +#define DT_MIPS_DELTA_RELOC 0x7000001B /* Delta relocations */ +#define DT_MIPS_DELTA_RELOC_NO 0x7000001C /* number of entries in DT_MIPS_DELTA_RELOC */ +#define DT_MIPS_DELTA_SYM 0x7000001D /* Delta symbols referred by Delta relocations */ +#define DT_MIPS_DELTA_SYM_NO 0x7000001E /* number of entries in DT_MIPS_DELTA_SYM */ +#define DT_MIPS_DELTA_CLASSSYM 0x70000020 /* Delta symbols for class declarations */ +#define DT_MIPS_DELTA_CLASSSYM_NO 0x70000021 /* number of entries in DT_MIPS_DELTA_CLASSSYM */ +#define DT_MIPS_CXX_FLAGS 0x70000022 /* C++ flavor flags */ +#define DT_MIPS_PIXIE_INIT 0x70000023 /* address of an initialization routine created by pixie */ +#define DT_MIPS_SYMBOL_LIB 0x70000024 /* address of .MIPS.symlib section */ +#define DT_MIPS_LOCALPAGE_GOTIDX 0x70000025 /* GOT index of first page table entry for a segment */ +#define DT_MIPS_LOCAL_GOTIDX 0x70000026 /* GOT index of first page table entry for a local symbol */ +#define DT_MIPS_HIDDEN_GOTIDX 0x70000027 /* GOT index of first page table entry for a hidden symbol */ +#define DT_MIPS_PROTECTED_GOTIDX 0x70000028 /* GOT index of first page table entry for a protected symbol */ +#define DT_MIPS_OPTIONS 0x70000029 /* address of .MIPS.options section */ +#define DT_MIPS_INTERFACE 0x7000002A /* address of .MIPS.interface section */ +#define DT_MIPS_DYNSTR_ALIGN 0x7000002B /* ??? */ +#define DT_MIPS_INTERFACE_SIZE 0x7000002C /* size of .MIPS.interface section */ +#define DT_MIPS_RLD_TEXT_RESOLVE_ADDR 0x7000002D /* address of _rld_text_resolve in GOT */ +#define DT_MIPS_PERF_SUFFIX 0x7000002E /* default suffix of DSO to be appended by dlopen */ +#define DT_MIPS_COMPACT_SIZE 0x7000002F /* size of a ucode compact relocation record (o32) */ +#define DT_MIPS_GP_VALUE 0x70000030 /* GP value of a specified GP relative range */ +#define DT_MIPS_AUX_DYNAMIC 0x70000031 /* address of an auxiliary dynamic table */ +#define DT_MIPS_PLTGOT 0x70000032 /* address of the PLTGOT */ +#define DT_MIPS_RLD_OBJ_UPDATE 0x70000033 /* object list update callback */ +#define DT_MIPS_RWPLT 0x70000034 /* address of a writable PLT */ +#define DT_PPC_GOT 0x70000000 /* value of _GLOBAL_OFFSET_TABLE_ */ +#define DT_PPC_TLSOPT 0x70000001 /* TLS descriptor should be optimized */ +#define DT_PPC64_GLINK 0x70000000 /* address of .glink section */ +#define DT_PPC64_OPD 0x70000001 /* address of .opd section */ +#define DT_PPC64_OPDSZ 0x70000002 /* size of .opd section */ +#define DT_PPC64_TLSOPT 0x70000003 /* TLS descriptor should be optimized */ +#define DT_AUXILIARY 0x7FFFFFFD /* offset of string naming auxiliary filtees */ +#define DT_USED 0x7FFFFFFE /* ignored */ +#define DT_FILTER 0x7FFFFFFF /* index of string naming filtees */ +#define DT_HIPROC 0x7FFFFFFF /* end of processor-specific types */ /* Aliases for dynamic linking entry symbols. */ -#define DT_DEPRECATED_SPARC_REGISTER DT_SPARC_REGISTER +#define DT_DEPRECATED_SPARC_REGISTER DT_SPARC_REGISTER /* * Flags used in the executable header (field: e_flags). */ -#define EF_ARM_RELEXEC 0x00000001UL -#define EF_ARM_HASENTRY 0x00000002UL -#define EF_ARM_SYMSARESORTED 0x00000004UL -#define EF_ARM_DYNSYMSUSESEGIDX 0x00000008UL -#define EF_ARM_MAPSYMSFIRST 0x00000010UL -#define EF_ARM_BE8 0x00800000UL -#define EF_ARM_LE8 0x00400000UL -#define EF_ARM_EABIMASK 0xFF000000UL -#define EF_ARM_EABI_UNKNOWN 0x00000000UL -#define EF_ARM_EABI_VER1 0x01000000UL -#define EF_ARM_EABI_VER2 0x02000000UL -#define EF_ARM_EABI_VER3 0x03000000UL -#define EF_ARM_EABI_VER4 0x04000000UL -#define EF_ARM_EABI_VER5 0x05000000UL -#define EF_ARM_INTERWORK 0x00000004UL -#define EF_ARM_APCS_26 0x00000008UL -#define EF_ARM_APCS_FLOAT 0x00000010UL -#define EF_ARM_PIC 0x00000020UL -#define EF_ARM_ALIGN8 0x00000040UL -#define EF_ARM_NEW_ABI 0x00000080UL -#define EF_ARM_OLD_ABI 0x00000100UL -#define EF_ARM_SOFT_FLOAT 0x00000200UL -#define EF_ARM_VFP_FLOAT 0x00000400UL -#define EF_ARM_MAVERICK_FLOAT 0x00000800UL -#define EF_MIPS_NOREORDER 0x00000001UL -#define EF_MIPS_PIC 0x00000002UL -#define EF_MIPS_CPIC 0x00000004UL -#define EF_MIPS_UCODE 0x00000010UL -#define EF_MIPS_ABI 0x00007000UL -#define EF_MIPS_ABI2 0x00000020UL -#define EF_MIPS_OPTIONS_FIRST 0x00000080UL -#define EF_MIPS_ARCH_ASE 0x0F000000UL -#define EF_MIPS_ARCH_ASE_MDMX 0x08000000UL -#define EF_MIPS_ARCH_ASE_M16 0x04000000UL -#define EF_MIPS_ARCH_ASE_MICROMIPS 0x02000000UL -#define EF_MIPS_ARCH 0xF0000000UL -#define EF_MIPS_ARCH_1 0x00000000UL -#define EF_MIPS_ARCH_2 0x10000000UL -#define EF_MIPS_ARCH_3 0x20000000UL -#define EF_MIPS_ARCH_4 0x30000000UL -#define EF_MIPS_ARCH_5 0x40000000UL -#define EF_MIPS_ARCH_32 0x50000000UL -#define EF_MIPS_ARCH_64 0x60000000UL -#define EF_MIPS_ARCH_32R2 0x70000000UL -#define EF_MIPS_ARCH_64R2 0x80000000UL -#define EF_PPC_EMB 0x80000000UL -#define EF_PPC_RELOCATABLE 0x00010000UL -#define EF_PPC_RELOCATABLE_LIB 0x00008000UL -#define EF_RISCV_RVC 0x00000001UL -#define EF_RISCV_FLOAT_ABI_MASK 0x00000006UL -#define EF_RISCV_FLOAT_ABI_SOFT 0x00000000UL -#define EF_RISCV_FLOAT_ABI_SINGLE 0x00000002UL -#define EF_RISCV_FLOAT_ABI_DOUBLE 0x00000004UL -#define EF_RISCV_FLOAT_ABI_QUAD 0x00000006UL -#define EF_RISCV_RVE 0x00000008UL -#define EF_RISCV_TSO 0x00000010UL -#define EF_SPARC_EXT_MASK 0x00ffff00UL -#define EF_SPARC_32PLUS 0x00000100UL -#define EF_SPARC_SUN_US1 0x00000200UL -#define EF_SPARC_HAL_R1 0x00000400UL -#define EF_SPARC_SUN_US3 0x00000800UL -#define EF_SPARCV9_MM 0x00000003UL -#define EF_SPARCV9_TSO 0x00000000UL -#define EF_SPARCV9_PSO 0x00000001UL -#define EF_SPARCV9_RMO 0x00000002UL +#define EF_ARM_RELEXEC 0x00000001U /* dynamic segment describes only how to relocate segments */ +#define EF_ARM_HASENTRY 0x00000002U /* e_entry contains a program entry point */ +#define EF_ARM_SYMSARESORTED 0x00000004U /* subsection of symbol table is sorted by symbol value */ +#define EF_ARM_DYNSYMSUSESEGIDX 0x00000008U /* dynamic symbol st_shndx = containing segment index + 1 */ +#define EF_ARM_MAPSYMSFIRST 0x00000010U /* mapping symbols precede other local symbols in symtab */ +#define EF_ARM_BE8 0x00800000U /* file contains BE-8 code */ +#define EF_ARM_LE8 0x00400000U /* file contains LE-8 code */ +#define EF_ARM_EABIMASK 0xFF000000U /* mask for ARM EABI version number (0 denotes GNU or unknown) */ +#define EF_ARM_EABI_UNKNOWN 0x00000000U /* Unknown or GNU ARM EABI version number */ +#define EF_ARM_EABI_VER1 0x01000000U /* ARM EABI version 1 */ +#define EF_ARM_EABI_VER2 0x02000000U /* ARM EABI version 2 */ +#define EF_ARM_EABI_VER3 0x03000000U /* ARM EABI version 3 */ +#define EF_ARM_EABI_VER4 0x04000000U /* ARM EABI version 4 */ +#define EF_ARM_EABI_VER5 0x05000000U /* ARM EABI version 5 */ +#define EF_ARM_INTERWORK 0x00000004U /* GNU EABI extension */ +#define EF_ARM_APCS_26 0x00000008U /* GNU EABI extension */ +#define EF_ARM_APCS_FLOAT 0x00000010U /* GNU EABI extension */ +#define EF_ARM_PIC 0x00000020U /* GNU EABI extension */ +#define EF_ARM_ALIGN8 0x00000040U /* GNU EABI extension */ +#define EF_ARM_NEW_ABI 0x00000080U /* GNU EABI extension */ +#define EF_ARM_OLD_ABI 0x00000100U /* GNU EABI extension */ +#define EF_ARM_SOFT_FLOAT 0x00000200U /* GNU EABI extension */ +#define EF_ARM_VFP_FLOAT 0x00000400U /* GNU EABI extension */ +#define EF_ARM_MAVERICK_FLOAT 0x00000800U /* GNU EABI extension */ +#define EF_LOONGARCH_ABI_SOFT_FLOAT 0x00000001U /* LoongArch software floating point emulation */ +#define EF_LOONGARCH_ABI_SINGLE_FLOAT 0x00000002U /* LoongArch 32-bit floating point registers */ +#define EF_LOONGARCH_ABI_DOUBLE_FLOAT 0x00000003U /* LoongArch 64-bit floating point registers */ +#define EF_LOONGARCH_ABI_MODIFIER_MASK 0x00000007U /* LoongArch floating point modifier mask */ +#define EF_LOONGARCH_OBJABI_V0 0x00000000U /* LoongArch object file ABI version 0 */ +#define EF_LOONGARCH_OBJABI_V1 0x00000040U /* LoongArch object file ABI version 1 */ +#define EF_LOONGARCH_OBJABI_MASK 0x000000C0U /* LoongArch object file ABI version mask */ +#define EF_MIPS_NOREORDER 0x00000001U /* at least one .noreorder directive appeared in the source */ +#define EF_MIPS_PIC 0x00000002U /* file contains position independent code */ +#define EF_MIPS_CPIC 0x00000004U /* file code uses standard conventions for calling PIC */ +#define EF_MIPS_UCODE 0x00000010U /* file contains UCODE (obsolete) */ +#define EF_MIPS_ABI 0x00007000U /* Application binary interface, see E_MIPS_* values */ +#define EF_MIPS_ABI2 0x00000020U /* file follows MIPS III 32-bit ABI */ +#define EF_MIPS_OPTIONS_FIRST 0x00000080U /* ld(1) should process .MIPS.options section first */ +#define EF_MIPS_ARCH_ASE 0x0F000000U /* file uses application-specific architectural extensions */ +#define EF_MIPS_ARCH_ASE_MDMX 0x08000000U /* file uses MDMX multimedia extensions */ +#define EF_MIPS_ARCH_ASE_M16 0x04000000U /* file uses MIPS-16 ISA extensions */ +#define EF_MIPS_ARCH_ASE_MICROMIPS 0x02000000U /* MicroMIPS architecture */ +#define EF_MIPS_ARCH 0xF0000000U /* 4-bit MIPS architecture field */ +#define EF_MIPS_ARCH_1 0x00000000U /* MIPS I instruction set */ +#define EF_MIPS_ARCH_2 0x10000000U /* MIPS II instruction set */ +#define EF_MIPS_ARCH_3 0x20000000U /* MIPS III instruction set */ +#define EF_MIPS_ARCH_4 0x30000000U /* MIPS IV instruction set */ +#define EF_MIPS_ARCH_5 0x40000000U /* Never introduced */ +#define EF_MIPS_ARCH_32 0x50000000U /* Mips32 Revision 1 */ +#define EF_MIPS_ARCH_64 0x60000000U /* Mips64 Revision 1 */ +#define EF_MIPS_ARCH_32R2 0x70000000U /* Mips32 Revision 2 */ +#define EF_MIPS_ARCH_64R2 0x80000000U /* Mips64 Revision 2 */ +#define EF_PPC_EMB 0x80000000U /* Embedded PowerPC flag */ +#define EF_PPC_RELOCATABLE 0x00010000U /* -mrelocatable flag */ +#define EF_PPC_RELOCATABLE_LIB 0x00008000U /* -mrelocatable-lib flag */ +#define EF_RISCV_RVC 0x00000001U /* Compressed instruction extension */ +#define EF_RISCV_FLOAT_ABI_MASK 0x00000006U /* Floating point ABI */ +#define EF_RISCV_FLOAT_ABI_SOFT 0x00000000U /* Software emulated floating point */ +#define EF_RISCV_FLOAT_ABI_SINGLE 0x00000002U /* Single precision floating point */ +#define EF_RISCV_FLOAT_ABI_DOUBLE 0x00000004U /* Double precision floating point */ +#define EF_RISCV_FLOAT_ABI_QUAD 0x00000006U /* Quad precision floating point */ +#define EF_RISCV_RVE 0x00000008U /* Compressed instruction ABI */ +#define EF_RISCV_TSO 0x00000010U /* RVTSO memory consistency model */ +#define EF_SPARC_EXT_MASK 0x00FFFF00U /* Vendor Extension mask */ +#define EF_SPARC_32PLUS 0x00000100U /* Generic V8+ features */ +#define EF_SPARC_SUN_US1 0x00000200U /* Sun UltraSPARCTM 1 Extensions */ +#define EF_SPARC_HAL_R1 0x00000400U /* HAL R1 Extensions */ +#define EF_SPARC_SUN_US3 0x00000800U /* Sun UltraSPARC 3 Extensions */ +#define EF_SPARCV9_MM 0x00000003U /* Mask for Memory Model */ +#define EF_SPARCV9_TSO 0x00000000U /* Total Store Ordering */ +#define EF_SPARCV9_PSO 0x00000001U /* Partial Store Ordering */ +#define EF_SPARCV9_RMO 0x00000002U /* Relaxed Memory Ordering */ /* * Offsets in the ei_ident[] field of an ELF executable header. */ -#define EI_MAG0 0 -#define EI_MAG1 1 -#define EI_MAG2 2 -#define EI_MAG3 3 -#define EI_CLASS 4 -#define EI_DATA 5 -#define EI_VERSION 6 -#define EI_OSABI 7 -#define EI_ABIVERSION 8 -#define EI_PAD 9 -#define EI_NIDENT 16 +#define EI_MAG0 0 /* magic number */ +#define EI_MAG1 1 /* magic number */ +#define EI_MAG2 2 /* magic number */ +#define EI_MAG3 3 /* magic number */ +#define EI_CLASS 4 /* file class */ +#define EI_DATA 5 /* data encoding */ +#define EI_VERSION 6 /* file version */ +#define EI_OSABI 7 /* OS ABI kind */ +#define EI_ABIVERSION 8 /* OS ABI version */ +#define EI_PAD 9 /* padding start */ +#define EI_NIDENT 16 /* total size */ /* * The ELF class of an object. */ -#define ELFCLASSNONE 0 -#define ELFCLASS32 1 -#define ELFCLASS64 2 +#define ELFCLASSNONE 0U /* Unknown ELF class */ +#define ELFCLASS32 1U /* 32 bit objects */ +#define ELFCLASS64 2U /* 64 bit objects */ /* * Endianness of data in an ELF object. */ -#define ELFDATANONE 0 -#define ELFDATA2LSB 1 -#define ELFDATA2MSB 2 +#define ELFDATANONE 0U /* Unknown data endianness */ +#define ELFDATA2LSB 1U /* little endian */ +#define ELFDATA2MSB 2U /* big endian */ /* @@ -337,489 +403,511 @@ * These numbers are: 0x7F, 'E', 'L' and 'F'. */ -#define ELFMAG0 0x7FU -#define ELFMAG1 0x45U -#define ELFMAG2 0x4CU -#define ELFMAG3 0x46U +#define ELFMAG0 0x7FU +#define ELFMAG1 0x45U +#define ELFMAG2 0x4CU +#define ELFMAG3 0x46U /* Additional magic-related constants. */ -#define ELFMAG "\177ELF" -#define SELFMAG 4 +#define ELFMAG "\177ELF" +#define SELFMAG 4 /* * ELF OS ABI field. */ -#define ELFOSABI_NONE 0 -#define ELFOSABI_SYSV 0 -#define ELFOSABI_HPUX 1 -#define ELFOSABI_NETBSD 2 -#define ELFOSABI_GNU 3 -#define ELFOSABI_HURD 4 -#define ELFOSABI_86OPEN 5 -#define ELFOSABI_SOLARIS 6 -#define ELFOSABI_AIX 7 -#define ELFOSABI_IRIX 8 -#define ELFOSABI_FREEBSD 9 -#define ELFOSABI_TRU64 10 -#define ELFOSABI_MODESTO 11 -#define ELFOSABI_OPENBSD 12 -#define ELFOSABI_OPENVMS 13 -#define ELFOSABI_NSK 14 -#define ELFOSABI_AROS 15 -#define ELFOSABI_FENIXOS 16 -#define ELFOSABI_CLOUDABI 17 -#define ELFOSABI_OPENVOS 18 -#define ELFOSABI_ARM_AEABI 64 -#define ELFOSABI_ARM 97 -#define ELFOSABI_STANDALONE 255 +#define ELFOSABI_NONE 0U /* No extensions or unspecified */ +#define ELFOSABI_SYSV 0U /* SYSV */ +#define ELFOSABI_HPUX 1U /* Hewlett-Packard HP-UX */ +#define ELFOSABI_NETBSD 2U /* NetBSD */ +#define ELFOSABI_GNU 3U /* GNU */ +#define ELFOSABI_HURD 4U /* GNU/HURD */ +#define ELFOSABI_86OPEN 5U /* 86Open Common ABI */ +#define ELFOSABI_SOLARIS 6U /* Sun Solaris */ +#define ELFOSABI_AIX 7U /* AIX */ +#define ELFOSABI_IRIX 8U /* IRIX */ +#define ELFOSABI_FREEBSD 9U /* FreeBSD */ +#define ELFOSABI_TRU64 10U /* Compaq TRU64 UNIX */ +#define ELFOSABI_MODESTO 11U /* Novell Modesto */ +#define ELFOSABI_OPENBSD 12U /* Open BSD */ +#define ELFOSABI_OPENVMS 13U /* Open VMS */ +#define ELFOSABI_NSK 14U /* Hewlett-Packard Non-Stop Kernel */ +#define ELFOSABI_AROS 15U /* Amiga Research OS */ +#define ELFOSABI_FENIXOS 16U /* The FenixOS highly scalable multi-core OS */ +#define ELFOSABI_CLOUDABI 17U /* Nuxi CloudABI */ +#define ELFOSABI_OPENVOS 18U /* Stratus Technologies OpenVOS */ +#define ELFOSABI_ARM_AEABI 64U /* ARM specific symbol versioning extensions */ +#define ELFOSABI_ARM 97U /* ARM ABI */ +#define ELFOSABI_STANDALONE 255U /* Standalone (embedded) application */ /* OS ABI Aliases. */ -#define ELFOSABI_LINUX ELFOSABI_GNU +#define ELFOSABI_LINUX ELFOSABI_GNU /* * ELF Machine types: (EM_*). */ -#define EM_NONE 0 -#define EM_M32 1 -#define EM_SPARC 2 -#define EM_386 3 -#define EM_68K 4 -#define EM_88K 5 -#define EM_IAMCU 6 -#define EM_860 7 -#define EM_MIPS 8 -#define EM_S370 9 -#define EM_MIPS_RS3_LE 10 -#define EM_PARISC 15 -#define EM_VPP500 17 -#define EM_SPARC32PLUS 18 -#define EM_960 19 -#define EM_PPC 20 -#define EM_PPC64 21 -#define EM_S390 22 -#define EM_SPU 23 -#define EM_V800 36 -#define EM_FR20 37 -#define EM_RH32 38 -#define EM_RCE 39 -#define EM_ARM 40 -#define EM_ALPHA 41 -#define EM_SH 42 -#define EM_SPARCV9 43 -#define EM_TRICORE 44 -#define EM_ARC 45 -#define EM_H8_300 46 -#define EM_H8_300H 47 -#define EM_H8S 48 -#define EM_H8_500 49 -#define EM_IA_64 50 -#define EM_MIPS_X 51 -#define EM_COLDFIRE 52 -#define EM_68HC12 53 -#define EM_MMA 54 -#define EM_PCP 55 -#define EM_NCPU 56 -#define EM_NDR1 57 -#define EM_STARCORE 58 -#define EM_ME16 59 -#define EM_ST100 60 -#define EM_TINYJ 61 -#define EM_X86_64 62 -#define EM_PDSP 63 -#define EM_PDP10 64 -#define EM_PDP11 65 -#define EM_FX66 66 -#define EM_ST9PLUS 67 -#define EM_ST7 68 -#define EM_68HC16 69 -#define EM_68HC11 70 -#define EM_68HC08 71 -#define EM_68HC05 72 -#define EM_SVX 73 -#define EM_ST19 74 -#define EM_VAX 75 -#define EM_CRIS 76 -#define EM_JAVELIN 77 -#define EM_FIREPATH 78 -#define EM_ZSP 79 -#define EM_MMIX 80 -#define EM_HUANY 81 -#define EM_PRISM 82 -#define EM_AVR 83 -#define EM_FR30 84 -#define EM_D10V 85 -#define EM_D30V 86 -#define EM_V850 87 -#define EM_M32R 88 -#define EM_MN10300 89 -#define EM_MN10200 90 -#define EM_PJ 91 -#define EM_OPENRISC 92 -#define EM_ARC_COMPACT 93 -#define EM_XTENSA 94 -#define EM_VIDEOCORE 95 -#define EM_TMM_GPP 96 -#define EM_NS32K 97 -#define EM_TPC 98 -#define EM_SNP1K 99 -#define EM_ST200 100 -#define EM_IP2K 101 -#define EM_MAX 102 -#define EM_CR 103 -#define EM_F2MC16 104 -#define EM_MSP430 105 -#define EM_BLACKFIN 106 -#define EM_SE_C33 107 -#define EM_SEP 108 -#define EM_ARCA 109 -#define EM_UNICORE 110 -#define EM_EXCESS 111 -#define EM_DXP 112 -#define EM_ALTERA_NIOS2 113 -#define EM_CRX 114 -#define EM_XGATE 115 -#define EM_C166 116 -#define EM_M16C 117 -#define EM_DSPIC30F 118 -#define EM_CE 119 -#define EM_M32C 120 -#define EM_TSK3000 131 -#define EM_RS08 132 -#define EM_SHARC 133 -#define EM_ECOG2 134 -#define EM_SCORE7 135 -#define EM_DSP24 136 -#define EM_VIDEOCORE3 137 -#define EM_LATTICEMICO32 138 -#define EM_SE_C17 139 -#define EM_TI_C6000 140 -#define EM_TI_C2000 141 -#define EM_TI_C5500 142 -#define EM_MMDSP_PLUS 160 -#define EM_CYPRESS_M8C 161 -#define EM_R32C 162 -#define EM_TRIMEDIA 163 -#define EM_QDSP6 164 -#define EM_8051 165 -#define EM_STXP7X 166 -#define EM_NDS32 167 -#define EM_ECOG1 168 -#define EM_ECOG1X 168 -#define EM_MAXQ30 169 -#define EM_XIMO16 170 -#define EM_MANIK 171 -#define EM_CRAYNV2 172 -#define EM_RX 173 -#define EM_METAG 174 -#define EM_MCST_ELBRUS 175 -#define EM_ECOG16 176 -#define EM_CR16 177 -#define EM_ETPU 178 -#define EM_SLE9X 179 -#define EM_AARCH64 183 -#define EM_AVR32 185 -#define EM_STM8 186 -#define EM_TILE64 187 -#define EM_TILEPRO 188 -#define EM_MICROBLAZE 189 -#define EM_CUDA 190 -#define EM_TILEGX 191 -#define EM_CLOUDSHIELD 192 -#define EM_COREA_1ST 193 -#define EM_COREA_2ND 194 -#define EM_ARC_COMPACT2 195 -#define EM_OPEN8 196 -#define EM_RL78 197 -#define EM_VIDEOCORE5 198 -#define EM_78KOR 199 -#define EM_56800EX 200 -#define EM_BA1 201 -#define EM_BA2 202 -#define EM_XCORE 203 -#define EM_MCHP_PIC 204 -#define EM_INTELGT 205 -#define EM_INTEL206 206 -#define EM_INTEL207 207 -#define EM_INTEL208 208 -#define EM_INTEL209 209 -#define EM_KM32 210 -#define EM_KMX32 211 -#define EM_KMX16 212 -#define EM_KMX8 213 -#define EM_KVARC 214 -#define EM_CDP 215 -#define EM_COGE 216 -#define EM_COOL 217 -#define EM_NORC 218 -#define EM_CSR_KALIMBA 219 -#define EM_Z80 220 -#define EM_VISIUM 221 -#define EM_FT32 222 -#define EM_MOXIE 223 -#define EM_AMDGPU 224 -#define EM_RISCV 243 -#define EM_LANAI 244 -#define EM_CEVA 245 -#define EM_CEVA_X2 246 -#define EM_BPF 247 -#define EM_GRAPHCORE_IPU 248 -#define EM_IMG1 249 -#define EM_NFP 250 -#define EM_CSKY 252 -#define EM_65816 257 -#define EM_KF32 259 +#define EM_NONE 0U /* No machine */ +#define EM_M32 1U /* AT&T WE 32100 */ +#define EM_SPARC 2U /* SPARC */ +#define EM_386 3U /* Intel 80386 */ +#define EM_68K 4U /* Motorola 68000 */ +#define EM_88K 5U /* Motorola 88000 */ +#define EM_IAMCU 6U /* Intel MCU */ +#define EM_860 7U /* Intel 80860 */ +#define EM_MIPS 8U /* MIPS I Architecture */ +#define EM_S370 9U /* IBM System/370 Processor */ +#define EM_MIPS_RS3_LE 10U /* MIPS RS3000 Little-endian */ +#define EM_PARISC 15U /* Hewlett-Packard PA-RISC */ +#define EM_VPP500 17U /* Fujitsu VPP500 */ +#define EM_SPARC32PLUS 18U /* Enhanced instruction set SPARC */ +#define EM_960 19U /* Intel 80960 */ +#define EM_PPC 20U /* PowerPC */ +#define EM_PPC64 21U /* 64-bit PowerPC */ +#define EM_S390 22U /* IBM System/390 Processor */ +#define EM_SPU 23U /* IBM SPU/SPC */ +#define EM_V800 36U /* NEC V800 */ +#define EM_FR20 37U /* Fujitsu FR20 */ +#define EM_RH32 38U /* TRW RH-32 */ +#define EM_RCE 39U /* Motorola RCE */ +#define EM_ARM 40U /* Advanced RISC Machines ARM */ +#define EM_ALPHA 41U /* Digital Alpha */ +#define EM_SH 42U /* Hitachi SH */ +#define EM_SPARCV9 43U /* SPARC Version 9 */ +#define EM_TRICORE 44U /* Siemens TriCore embedded processor */ +#define EM_ARC 45U /* Argonaut RISC Core, Argonaut Technologies Inc. */ +#define EM_H8_300 46U /* Hitachi H8/300 */ +#define EM_H8_300H 47U /* Hitachi H8/300H */ +#define EM_H8S 48U /* Hitachi H8S */ +#define EM_H8_500 49U /* Hitachi H8/500 */ +#define EM_IA_64 50U /* Intel IA-64 processor architecture */ +#define EM_MIPS_X 51U /* Stanford MIPS-X */ +#define EM_COLDFIRE 52U /* Motorola ColdFire */ +#define EM_68HC12 53U /* Motorola M68HC12 */ +#define EM_MMA 54U /* Fujitsu MMA Multimedia Accelerator */ +#define EM_PCP 55U /* Siemens PCP */ +#define EM_NCPU 56U /* Sony nCPU embedded RISC processor */ +#define EM_NDR1 57U /* Denso NDR1 microprocessor */ +#define EM_STARCORE 58U /* Motorola Star*Core processor */ +#define EM_ME16 59U /* Toyota ME16 processor */ +#define EM_ST100 60U /* STMicroelectronics ST100 processor */ +#define EM_TINYJ 61U /* Advanced Logic Corp. TinyJ embedded processor family */ +#define EM_X86_64 62U /* AMD x86-64 architecture */ +#define EM_PDSP 63U /* Sony DSP Processor */ +#define EM_PDP10 64U /* Digital Equipment Corp. PDP-10 */ +#define EM_PDP11 65U /* Digital Equipment Corp. PDP-11 */ +#define EM_FX66 66U /* Siemens FX66 microcontroller */ +#define EM_ST9PLUS 67U /* STMicroelectronics ST9+ 8/16 bit microcontroller */ +#define EM_ST7 68U /* STMicroelectronics ST7 8-bit microcontroller */ +#define EM_68HC16 69U /* Motorola MC68HC16 Microcontroller */ +#define EM_68HC11 70U /* Motorola MC68HC11 Microcontroller */ +#define EM_68HC08 71U /* Motorola MC68HC08 Microcontroller */ +#define EM_68HC05 72U /* Motorola MC68HC05 Microcontroller */ +#define EM_SVX 73U /* Silicon Graphics SVx */ +#define EM_ST19 74U /* STMicroelectronics ST19 8-bit microcontroller */ +#define EM_VAX 75U /* Digital VAX */ +#define EM_CRIS 76U /* Axis Communications 32-bit embedded processor */ +#define EM_JAVELIN 77U /* Infineon Technologies 32-bit embedded processor */ +#define EM_FIREPATH 78U /* Element 14 64-bit DSP Processor */ +#define EM_ZSP 79U /* LSI Logic 16-bit DSP Processor */ +#define EM_MMIX 80U /* Educational 64-bit processor by Donald Knuth */ +#define EM_HUANY 81U /* Harvard University machine-independent object files */ +#define EM_PRISM 82U /* SiTera Prism */ +#define EM_AVR 83U /* Atmel AVR 8-bit microcontroller */ +#define EM_FR30 84U /* Fujitsu FR30 */ +#define EM_D10V 85U /* Mitsubishi D10V */ +#define EM_D30V 86U /* Mitsubishi D30V */ +#define EM_V850 87U /* NEC v850 */ +#define EM_M32R 88U /* Mitsubishi M32R */ +#define EM_MN10300 89U /* Matsushita MN10300 */ +#define EM_MN10200 90U /* Matsushita MN10200 */ +#define EM_PJ 91U /* picoJava */ +#define EM_OPENRISC 92U /* OpenRISC 32-bit embedded processor */ +#define EM_ARC_COMPACT 93U /* ARC International ARCompact processor */ +#define EM_XTENSA 94U /* Tensilica Xtensa Architecture */ +#define EM_VIDEOCORE 95U /* Alphamosaic VideoCore processor */ +#define EM_TMM_GPP 96U /* Thompson Multimedia General Purpose Processor */ +#define EM_NS32K 97U /* National Semiconductor 32000 series */ +#define EM_TPC 98U /* Tenor Network TPC processor */ +#define EM_SNP1K 99U /* Trebia SNP 1000 processor */ +#define EM_ST200 100U /* STMicroelectronics (www.st.com) ST200 microcontroller */ +#define EM_IP2K 101U /* Ubicom IP2xxx microcontroller family */ +#define EM_MAX 102U /* MAX Processor */ +#define EM_CR 103U /* National Semiconductor CompactRISC microprocessor */ +#define EM_F2MC16 104U /* Fujitsu F2MC16 */ +#define EM_MSP430 105U /* Texas Instruments embedded microcontroller msp430 */ +#define EM_BLACKFIN 106U /* Analog Devices Blackfin (DSP) processor */ +#define EM_SE_C33 107U /* S1C33 Family of Seiko Epson processors */ +#define EM_SEP 108U /* Sharp embedded microprocessor */ +#define EM_ARCA 109U /* Arca RISC Microprocessor */ +#define EM_UNICORE 110U /* Microprocessor series from PKU-Unity Ltd. and MPRC of Peking University */ +#define EM_EXCESS 111U /* eXcess: 16/32/64-bit configurable embedded CPU */ +#define EM_DXP 112U /* Icera Semiconductor Inc. Deep Execution Processor */ +#define EM_ALTERA_NIOS2 113U /* Altera Nios II soft-core processor */ +#define EM_CRX 114U /* National Semiconductor CompactRISC CRX microprocessor */ +#define EM_XGATE 115U /* Motorola XGATE embedded processor */ +#define EM_C166 116U /* Infineon C16x/XC16x processor */ +#define EM_M16C 117U /* Renesas M16C series microprocessors */ +#define EM_DSPIC30F 118U /* Microchip Technology dsPIC30F Digital Signal Controller */ +#define EM_CE 119U /* Freescale Communication Engine RISC core */ +#define EM_M32C 120U /* Renesas M32C series microprocessors */ +#define EM_TSK3000 131U /* Altium TSK3000 core */ +#define EM_RS08 132U /* Freescale RS08 embedded processor */ +#define EM_SHARC 133U /* Analog Devices SHARC family of 32-bit DSP processors */ +#define EM_ECOG2 134U /* Cyan Technology eCOG2 microprocessor */ +#define EM_SCORE7 135U /* Sunplus S+core7 RISC processor */ +#define EM_DSP24 136U /* New Japan Radio (NJR) 24-bit DSP Processor */ +#define EM_VIDEOCORE3 137U /* Broadcom VideoCore III processor */ +#define EM_LATTICEMICO32 138U /* RISC processor for Lattice FPGA architecture */ +#define EM_SE_C17 139U /* Seiko Epson C17 family */ +#define EM_TI_C6000 140U /* The Texas Instruments TMS320C6000 DSP family */ +#define EM_TI_C2000 141U /* The Texas Instruments TMS320C2000 DSP family */ +#define EM_TI_C5500 142U /* The Texas Instruments TMS320C55x DSP family */ +#define EM_TI_ARP32 143U /* Texas Instruments Application Specific RISC Processor, 32bit fetch */ +#define EM_TI_PRU 144U /* Texas Instruments Programmable Realtime Unit */ +#define EM_MMDSP_PLUS 160U /* STMicroelectronics 64bit VLIW Data Signal Processor */ +#define EM_CYPRESS_M8C 161U /* Cypress M8C microprocessor */ +#define EM_R32C 162U /* Renesas R32C series microprocessors */ +#define EM_TRIMEDIA 163U /* NXP Semiconductors TriMedia architecture family */ +#define EM_QDSP6 164U /* QUALCOMM DSP6 Processor */ +#define EM_8051 165U /* Intel 8051 and variants */ +#define EM_STXP7X 166U /* STMicroelectronics STxP7x family of configurable and extensible RISC processors */ +#define EM_NDS32 167U /* Andes Technology compact code size embedded RISC processor family */ +#define EM_ECOG1X 168U /* Cyan Technology eCOG1X family */ +#define EM_MAXQ30 169U /* Dallas Semiconductor MAXQ30 Core Micro-controllers */ +#define EM_XIMO16 170U /* New Japan Radio (NJR) 16-bit DSP Processor */ +#define EM_MANIK 171U /* M2000 Reconfigurable RISC Microprocessor */ +#define EM_CRAYNV2 172U /* Cray Inc. NV2 vector architecture */ +#define EM_RX 173U /* Renesas RX family */ +#define EM_METAG 174U /* Imagination Technologies META processor architecture */ +#define EM_MCST_ELBRUS 175U /* MCST Elbrus general purpose hardware architecture */ +#define EM_ECOG16 176U /* Cyan Technology eCOG16 family */ +#define EM_CR16 177U /* National Semiconductor CompactRISC CR16 16-bit microprocessor */ +#define EM_ETPU 178U /* Freescale Extended Time Processing Unit */ +#define EM_SLE9X 179U /* Infineon Technologies SLE9X core */ +#define EM_L10M 180U /* Intel L10M */ +#define EM_K10M 181U /* Intel K10M */ +#define EM_AARCH64 183U /* AArch64 (64-bit ARM) */ +#define EM_AVR32 185U /* Atmel Corporation 32-bit microprocessor family */ +#define EM_STM8 186U /* STMicroeletronics STM8 8-bit microcontroller */ +#define EM_TILE64 187U /* Tilera TILE64 multicore architecture family */ +#define EM_TILEPRO 188U /* Tilera TILEPro multicore architecture family */ +#define EM_MICROBLAZE 189U /* Xilinx MicroBlaze 32-bit RISC soft processor core */ +#define EM_CUDA 190U /* NVIDIA CUDA architecture */ +#define EM_TILEGX 191U /* Tilera TILE-Gx multicore architecture family */ +#define EM_CLOUDSHIELD 192U /* CloudShield architecture family */ +#define EM_COREA_1ST 193U /* KIPO-KAIST Core-A 1st generation processor family */ +#define EM_COREA_2ND 194U /* KIPO-KAIST Core-A 2nd generation processor family */ +#define EM_ARC_COMPACT2 195U /* Synopsys ARCompact V2 */ +#define EM_OPEN8 196U /* Open8 8-bit RISC soft processor core */ +#define EM_RL78 197U /* Renesas RL78 family */ +#define EM_VIDEOCORE5 198U /* Broadcom VideoCore V processor */ +#define EM_78KOR 199U /* Renesas 78KOR family */ +#define EM_56800EX 200U /* Freescale 56800EX Digital Signal Controller */ +#define EM_BA1 201U /* Beyond BA1 CPU architecture */ +#define EM_BA2 202U /* Beyond BA2 CPU architecture */ +#define EM_XCORE 203U /* XMOS xCORE processor family */ +#define EM_MCHP_PIC 204U /* Microchip 8-bit PIC(r) family */ +#define EM_INTEL205 205U /* Intel Graphics Technology */ +#define EM_INTEL206 206U /* Reserved by Intel */ +#define EM_INTEL207 207U /* Reserved by Intel */ +#define EM_INTEL208 208U /* Reserved by Intel */ +#define EM_INTEL209 209U /* Reserved by Intel */ +#define EM_KM32 210U /* KM211 KM32 32-bit processor */ +#define EM_KMX32 211U /* KM211 KMX32 32-bit processor */ +#define EM_KMX16 212U /* KM211 KMX16 16-bit processor */ +#define EM_KMX8 213U /* KM211 KMX8 8-bit processor */ +#define EM_KVARC 214U /* KM211 KMX32 KVARC processor */ +#define EM_CDP 215U /* Paneve CDP architecture family */ +#define EM_COGE 216U /* Cognitive Smart Memory Processor */ +#define EM_COOL 217U /* Bluechip Systems CoolEngine */ +#define EM_NORC 218U /* Nanoradio Optimized RISC */ +#define EM_CSR_KALIMBA 219U /* CSR Kalimba architecture family */ +#define EM_Z80 220U /* Zilog Z80 */ +#define EM_VISIUM 221U /* Controls and Data Services VISIUMcore processor */ +#define EM_FT32 222U /* FTDI Chip FT32 high performance 32-bit RISC architecture */ +#define EM_MOXIE 223U /* Moxie processor family */ +#define EM_AMDGPU 224U /* AMD GPU architecture */ +#define EM_RISCV 243U /* RISC-V */ +#define EM_LANAI 244U /* Lanai processor */ +#define EM_CEVA 245U /* CEVA Processor Architecture Family */ +#define EM_CEVA_X2 246U /* CEVA X2 Processor Family */ +#define EM_BPF 247U /* Linux BPF – in-kernel virtual machine */ +#define EM_GRAPHCORE_IPU 248U /* Graphcore Intelligent Processing Unit */ +#define EM_IMG1 249U /* Imagination Technologies */ +#define EM_NFP 250U /* Netronome Flow Processor (NFP) */ +#define EM_VE 251U /* NEC Vector Engine */ +#define EM_CSKY 252U /* C-SKY processor family */ +#define EM_ARC_COMPACT3_64 253U /* Synopsys ARCv2.3 64-bit */ +#define EM_MCS6502 254U /* MOS Technology MCS 6502 processor */ +#define EM_ARC_COMPACT3 255U /* Synopsys ARCv2.3 32-bit */ +#define EM_KVX 256U /* Kalray VLIW core of the MPPA processor family */ +#define EM_65816 257U /* WDC 65816/65C816 */ +#define EM_LOONGARCH 258U /* Loongson LoongArch */ +#define EM_KF32 259U /* ChipON KungFu 32 */ +#define EM_U16_U8CORE 260U /* LAPIS nX-U16/U8 */ +#define EM_TACHYUM 261U /* Reserved for Tachyum processor */ +#define EM_56800EF 262U /* NXP 56800EF Digital Signal Controller (DSC) */ +#define EM_SBF 263U /* Solana Bytecode Format */ +#define EM_AIENGINE 264U /* AMD/Xilinx AIEngine architecture */ +#define EM_SIMA_MLA 265U /* SiMa MLA */ +#define EM_BANG 266U /* Cambricon BANG */ +#define EM_LOONGGPU 267U /* Loongson LoongArch GPU */ /* Other synonyms. */ -#define EM_AMD64 EM_X86_64 -#define EM_ARC_A5 EM_ARC_COMPACT +#define EM_AMD64 EM_X86_64 +#define EM_ARC_A5 EM_ARC_COMPACT +#define EM_ECOG1 EM_ECOG1X +#define EM_INTELGT EM_INTEL205 /* * ELF file types: (ET_*). */ -#define ET_NONE 0 -#define ET_REL 1 -#define ET_EXEC 2 -#define ET_DYN 3 -#define ET_CORE 4 -#define ET_LOOS 0xFE00U -#define ET_HIOS 0xFEFFU -#define ET_LOPROC 0xFF00U -#define ET_HIPROC 0xFFFFU +#define ET_NONE 0U /* No file type */ +#define ET_REL 1U /* Relocatable object */ +#define ET_EXEC 2U /* Executable */ +#define ET_DYN 3U /* Shared object */ +#define ET_CORE 4U /* Core file */ +#define ET_LOOS 0xFE00U /* Begin OS-specific range */ +#define ET_HIOS 0xFEFFU /* End OS-specific range */ +#define ET_LOPROC 0xFF00U /* Begin processor-specific range */ +#define ET_HIPROC 0xFFFFU /* End processor-specific range */ /* ELF file format version numbers. */ -#define EV_NONE 0 -#define EV_CURRENT 1 +#define EV_NONE 0U +#define EV_CURRENT 1U /* * Flags for section groups. */ -#define GRP_COMDAT 0x1 -#define GRP_MASKOS 0x0ff00000 -#define GRP_MASKPROC 0xf0000000 +#define GRP_COMDAT 0x1 /* COMDAT semantics */ +#define GRP_MASKOS 0x0ff00000 /* OS-specific flags */ +#define GRP_MASKPROC 0xf0000000 /* processor-specific flags */ /* * Flags / mask for .gnu.versym sections. */ -#define VERSYM_VERSION 0x7fff -#define VERSYM_HIDDEN 0x8000 +#define VERSYM_VERSION 0x7fff +#define VERSYM_HIDDEN 0x8000 /* * Flags used by program header table entries. */ -#define PF_X 0x1 -#define PF_W 0x2 -#define PF_R 0x4 -#define PF_MASKOS 0x0ff00000 -#define PF_MASKPROC 0xf0000000 -#define PF_ARM_SB 0x10000000 -#define PF_ARM_PI 0x20000000 -#define PF_ARM_ABS 0x40000000 +#define PF_X 0x1 /* Execute */ +#define PF_W 0x2 /* Write */ +#define PF_R 0x4 /* Read */ +#define PF_MASKOS 0x0ff00000 /* OS-specific flags */ +#define PF_MASKPROC 0xf0000000 /* Processor-specific flags */ +#define PF_ARM_SB 0x10000000 /* segment contains the location addressed by the static base */ +#define PF_ARM_PI 0x20000000 /* segment is position-independent */ +#define PF_ARM_ABS 0x40000000 /* segment must be loaded at its base address */ /* * Types of program header table entries. */ -#define PT_NULL 0UL -#define PT_LOAD 1UL -#define PT_DYNAMIC 2UL -#define PT_INTERP 3UL -#define PT_NOTE 4UL -#define PT_SHLIB 5UL -#define PT_PHDR 6UL -#define PT_TLS 7UL -#define PT_LOOS 0x60000000UL -#define PT_SUNW_UNWIND 0x6464E550UL -#define PT_GNU_EH_FRAME 0x6474E550UL -#define PT_GNU_STACK 0x6474E551UL -#define PT_GNU_RELRO 0x6474E552UL -#define PT_OPENBSD_RANDOMIZE 0x65A3DBE6UL -#define PT_OPENBSD_WXNEEDED 0x65A3DBE7UL -#define PT_OPENBSD_BOOTDATA 0x65A41BE6UL -#define PT_SUNWBSS 0x6FFFFFFAUL -#define PT_SUNWSTACK 0x6FFFFFFBUL -#define PT_SUNWDTRACE 0x6FFFFFFCUL -#define PT_SUNWCAP 0x6FFFFFFDUL -#define PT_HIOS 0x6FFFFFFFUL -#define PT_LOPROC 0x70000000UL -#define PT_ARM_ARCHEXT 0x70000000UL -#define PT_ARM_EXIDX 0x70000001UL -#define PT_MIPS_REGINFO 0x70000000UL -#define PT_MIPS_RTPROC 0x70000001UL -#define PT_MIPS_OPTIONS 0x70000002UL -#define PT_HIPROC 0x7FFFFFFFUL +#define PT_NULL 0U /* ignored entry */ +#define PT_LOAD 1U /* loadable segment */ +#define PT_DYNAMIC 2U /* contains dynamic linking information */ +#define PT_INTERP 3U /* names an interpreter */ +#define PT_NOTE 4U /* auxiliary information */ +#define PT_SHLIB 5U /* reserved */ +#define PT_PHDR 6U /* describes the program header itself */ +#define PT_TLS 7U /* thread local storage */ +#define PT_LOOS 0x60000000U /* start of OS-specific range */ +#define PT_SUNW_UNWIND 0x6464E550U /* Solaris/amd64 stack unwind tables */ +#define PT_GNU_EH_FRAME 0x6474E550U /* GCC generated .eh_frame_hdr segment */ +#define PT_GNU_STACK 0x6474E551U /* Stack flags */ +#define PT_GNU_RELRO 0x6474E552U /* Segment becomes read-only after relocation */ +#define PT_OPENBSD_RANDOMIZE 0x65A3DBE6U /* Segment filled with random data */ +#define PT_OPENBSD_WXNEEDED 0x65A3DBE7U /* Program violates W^X */ +#define PT_OPENBSD_BOOTDATA 0x65A41BE6U /* Boot data */ +#define PT_SUNWBSS 0x6FFFFFFAU /* A Solaris .SUNW_bss section */ +#define PT_SUNWSTACK 0x6FFFFFFBU /* A Solaris process stack */ +#define PT_SUNWDTRACE 0x6FFFFFFCU /* Used by dtrace(1) */ +#define PT_SUNWCAP 0x6FFFFFFDU /* Special hardware capability requirements */ +#define PT_HIOS 0x6FFFFFFFU /* end of OS-specific range */ +#define PT_LOPROC 0x70000000U /* start of processor-specific range */ +#define PT_AARCH64_ARCHEXT 0x70000000U /* platform architecture compatibility information */ +#define PT_AARCH64_UNWIND 0x70000001U /* exception unwinding tables */ +#define PT_AARCH64_MEMTAG_MTE 0x70000002U /* MTE memory tag data dumps in core files */ +#define PT_ARM_ARCHEXT 0x70000000U /* platform architecture compatibility information */ +#define PT_ARM_EXIDX 0x70000001U /* exception unwind tables */ +#define PT_MIPS_REGINFO 0x70000000U /* register usage information */ +#define PT_MIPS_RTPROC 0x70000001U /* runtime procedure table */ +#define PT_MIPS_OPTIONS 0x70000002U /* options segment */ +#define PT_HIPROC 0x7FFFFFFFU /* end of processor-specific range */ /* synonyms. */ -#define PT_ARM_UNWIND PT_ARM_EXIDX -#define PT_HISUNW PT_HIOS -#define PT_LOSUNW PT_SUNWBSS +#define PT_ARM_UNWIND PT_ARM_EXIDX +#define PT_HISUNW PT_HIOS +#define PT_LOSUNW PT_SUNWBSS /* * Section flags. */ -#define SHF_WRITE 0x1 -#define SHF_ALLOC 0x2 -#define SHF_EXECINSTR 0x4 -#define SHF_MERGE 0x10 -#define SHF_STRINGS 0x20 -#define SHF_INFO_LINK 0x40 -#define SHF_LINK_ORDER 0x80 -#define SHF_OS_NONCONFORMING 0x100 -#define SHF_GROUP 0x200 -#define SHF_TLS 0x400 -#define SHF_COMPRESSED 0x800 -#define SHF_MASKOS 0x0FF00000UL -#define SHF_AMD64_LARGE 0x10000000UL -#define SHF_ENTRYSECT 0x10000000UL -#define SHF_COMDEF 0x80000000UL -#define SHF_MIPS_GPREL 0x10000000UL -#define SHF_MIPS_MERGE 0x20000000UL -#define SHF_MIPS_ADDR 0x40000000UL -#define SHF_MIPS_STRING 0x80000000UL -#define SHF_MIPS_NOSTRIP 0x08000000UL -#define SHF_MIPS_LOCAL 0x04000000UL -#define SHF_MIPS_NAMES 0x02000000UL -#define SHF_MIPS_NODUPE 0x01000000UL -#define SHF_ORDERED 0x40000000UL -#define SHF_EXCLUDE 0x80000000UL -#define SHF_MASKPROC 0xF0000000UL +#define SHF_WRITE 0x1U /* writable during program execution */ +#define SHF_ALLOC 0x2U /* occupies memory during program execution */ +#define SHF_EXECINSTR 0x4U /* executable instructions */ +#define SHF_MERGE 0x10U /* may be merged to prevent duplication */ +#define SHF_STRINGS 0x20U /* NUL-terminated character strings */ +#define SHF_INFO_LINK 0x40U /* the sh_info field holds a link */ +#define SHF_LINK_ORDER 0x80U /* special ordering requirements during linking */ +#define SHF_OS_NONCONFORMING 0x100U /* requires OS-specific processing during linking */ +#define SHF_GROUP 0x200U /* member of a section group */ +#define SHF_TLS 0x400U /* holds thread-local storage */ +#define SHF_COMPRESSED 0x800U /* holds compressed data */ +#define SHF_MASKOS 0x0FF00000U /* bits reserved for OS-specific semantics */ +#define SHF_AMD64_LARGE 0x10000000U /* section uses large code model */ +#define SHF_ENTRYSECT 0x10000000U /* section contains an entry point (ARM) */ +#define SHF_COMDEF 0x80000000U /* section may be multiply defined in input to link step (ARM) */ +#define SHF_MIPS_GPREL 0x10000000U /* section must be part of global data area */ +#define SHF_MIPS_MERGE 0x20000000U /* section data should be merged to eliminate duplication */ +#define SHF_MIPS_ADDR 0x40000000U /* section data is addressed by default */ +#define SHF_MIPS_STRING 0x80000000U /* section data is string data by default */ +#define SHF_MIPS_NOSTRIP 0x08000000U /* section data may not be stripped */ +#define SHF_MIPS_LOCAL 0x04000000U /* section data local to process */ +#define SHF_MIPS_NAMES 0x02000000U /* linker must generate implicit hidden weak names */ +#define SHF_MIPS_NODUPE 0x01000000U /* linker must retain only one copy */ +#define SHF_ORDERED 0x40000000U /* section is ordered with respect to other sections */ +#define SHF_EXCLUDE 0x80000000U /* section is excluded from executables and shared objects */ +#define SHF_MASKPROC 0xF0000000U /* bits reserved for processor-specific semantics */ /* * Special section indices. */ -#define SHN_UNDEF 0 -#define SHN_LORESERVE 0xFF00U -#define SHN_LOPROC 0xFF00U -#define SHN_BEFORE 0xFF00U -#define SHN_AFTER 0xFF01U -#define SHN_AMD64_LCOMMON 0xFF02U -#define SHN_MIPS_ACOMMON 0xFF00U -#define SHN_MIPS_TEXT 0xFF01U -#define SHN_MIPS_DATA 0xFF02U -#define SHN_MIPS_SCOMMON 0xFF03U -#define SHN_MIPS_SUNDEFINED 0xFF04U -#define SHN_MIPS_LCOMMON 0xFF05U -#define SHN_MIPS_LUNDEFINED 0xFF06U -#define SHN_HIPROC 0xFF1FU -#define SHN_LOOS 0xFF20U -#define SHN_SUNW_IGNORE 0xFF3FU -#define SHN_HIOS 0xFF3FU -#define SHN_ABS 0xFFF1U -#define SHN_COMMON 0xFFF2U -#define SHN_XINDEX 0xFFFFU -#define SHN_HIRESERVE 0xFFFFU +#define SHN_UNDEF 0U /* undefined section */ +#define SHN_LORESERVE 0xFF00U /* start of reserved area */ +#define SHN_LOPROC 0xFF00U /* start of processor-specific range */ +#define SHN_BEFORE 0xFF00U /* used for section ordering */ +#define SHN_AFTER 0xFF01U /* used for section ordering */ +#define SHN_AMD64_LCOMMON 0xFF02U /* large common block label */ +#define SHN_MIPS_ACOMMON 0xFF00U /* allocated common symbols in a DSO */ +#define SHN_MIPS_TEXT 0xFF01U /* Reserved (obsolete) */ +#define SHN_MIPS_DATA 0xFF02U /* Reserved (obsolete) */ +#define SHN_MIPS_SCOMMON 0xFF03U /* gp-addressable common symbols */ +#define SHN_MIPS_SUNDEFINED 0xFF04U /* gp-addressable undefined symbols */ +#define SHN_MIPS_LCOMMON 0xFF05U /* local common symbols */ +#define SHN_MIPS_LUNDEFINED 0xFF06U /* local undefined symbols */ +#define SHN_HIPROC 0xFF1FU /* end of processor-specific range */ +#define SHN_LOOS 0xFF20U /* start of OS-specific range */ +#define SHN_SUNW_IGNORE 0xFF3FU /* used by dtrace */ +#define SHN_HIOS 0xFF3FU /* end of OS-specific range */ +#define SHN_ABS 0xFFF1U /* absolute references */ +#define SHN_COMMON 0xFFF2U /* references to COMMON areas */ +#define SHN_XINDEX 0xFFFFU /* extended index */ +#define SHN_HIRESERVE 0xFFFFU /* end of reserved area */ /* * Section types. */ -#define SHT_NULL 0 -#define SHT_PROGBITS 1 -#define SHT_SYMTAB 2 -#define SHT_STRTAB 3 -#define SHT_RELA 4 -#define SHT_HASH 5 -#define SHT_DYNAMIC 6 -#define SHT_NOTE 7 -#define SHT_NOBITS 8 -#define SHT_REL 9 -#define SHT_SHLIB 10 -#define SHT_DYNSYM 11 -#define SHT_INIT_ARRAY 14 -#define SHT_FINI_ARRAY 15 -#define SHT_PREINIT_ARRAY 16 -#define SHT_GROUP 17 -#define SHT_SYMTAB_SHNDX 18 -#define SHT_LOOS 0x60000000UL -#define SHT_SUNW_dof 0x6FFFFFF4UL -#define SHT_SUNW_cap 0x6FFFFFF5UL -#define SHT_GNU_ATTRIBUTES 0x6FFFFFF5UL -#define SHT_SUNW_SIGNATURE 0x6FFFFFF6UL -#define SHT_GNU_HASH 0x6FFFFFF6UL -#define SHT_GNU_LIBLIST 0x6FFFFFF7UL -#define SHT_SUNW_ANNOTATE 0x6FFFFFF7UL -#define SHT_SUNW_DEBUGSTR 0x6FFFFFF8UL -#define SHT_CHECKSUM 0x6FFFFFF8UL -#define SHT_SUNW_DEBUG 0x6FFFFFF9UL -#define SHT_SUNW_move 0x6FFFFFFAUL -#define SHT_SUNW_COMDAT 0x6FFFFFFBUL -#define SHT_SUNW_syminfo 0x6FFFFFFCUL -#define SHT_SUNW_verdef 0x6FFFFFFDUL -#define SHT_SUNW_verneed 0x6FFFFFFEUL -#define SHT_SUNW_versym 0x6FFFFFFFUL -#define SHT_HIOS 0x6FFFFFFFUL -#define SHT_LOPROC 0x70000000UL -#define SHT_ARM_EXIDX 0x70000001UL -#define SHT_ARM_PREEMPTMAP 0x70000002UL -#define SHT_ARM_ATTRIBUTES 0x70000003UL -#define SHT_ARM_DEBUGOVERLAY 0x70000004UL -#define SHT_ARM_OVERLAYSECTION 0x70000005UL -#define SHT_MIPS_LIBLIST 0x70000000UL -#define SHT_MIPS_MSYM 0x70000001UL -#define SHT_MIPS_CONFLICT 0x70000002UL -#define SHT_MIPS_GPTAB 0x70000003UL -#define SHT_MIPS_UCODE 0x70000004UL -#define SHT_MIPS_DEBUG 0x70000005UL -#define SHT_MIPS_REGINFO 0x70000006UL -#define SHT_MIPS_PACKAGE 0x70000007UL -#define SHT_MIPS_PACKSYM 0x70000008UL -#define SHT_MIPS_RELD 0x70000009UL -#define SHT_MIPS_IFACE 0x7000000BUL -#define SHT_MIPS_CONTENT 0x7000000CUL -#define SHT_MIPS_OPTIONS 0x7000000DUL -#define SHT_MIPS_DELTASYM 0x7000001BUL -#define SHT_MIPS_DELTAINST 0x7000001CUL -#define SHT_MIPS_DELTACLASS 0x7000001DUL -#define SHT_MIPS_DWARF 0x7000001EUL -#define SHT_MIPS_DELTADECL 0x7000001FUL -#define SHT_MIPS_SYMBOL_LIB 0x70000020UL -#define SHT_MIPS_EVENTS 0x70000021UL -#define SHT_MIPS_TRANSLATE 0x70000022UL -#define SHT_MIPS_PIXIE 0x70000023UL -#define SHT_MIPS_XLATE 0x70000024UL -#define SHT_MIPS_XLATE_DEBUG 0x70000025UL -#define SHT_MIPS_WHIRL 0x70000026UL -#define SHT_MIPS_EH_REGION 0x70000027UL -#define SHT_MIPS_XLATE_OLD 0x70000028UL -#define SHT_MIPS_PDR_EXCEPTION 0x70000029UL -#define SHT_MIPS_ABIFLAGS 0x7000002AUL -#define SHT_SPARC_GOTDATA 0x70000000UL -#define SHT_X86_64_UNWIND 0x70000001UL -#define SHT_ORDERED 0x7FFFFFFFUL -#define SHT_HIPROC 0x7FFFFFFFUL -#define SHT_LOUSER 0x80000000UL -#define SHT_HIUSER 0xFFFFFFFFUL +#define SHT_NULL 0U /* inactive header */ +#define SHT_PROGBITS 1U /* program defined information */ +#define SHT_SYMTAB 2U /* symbol table */ +#define SHT_STRTAB 3U /* string table */ +#define SHT_RELA 4U /* relocation entries with addends */ +#define SHT_HASH 5U /* symbol hash table */ +#define SHT_DYNAMIC 6U /* information for dynamic linking */ +#define SHT_NOTE 7U /* additional notes */ +#define SHT_NOBITS 8U /* section occupying no space */ +#define SHT_REL 9U /* relocation entries without addends */ +#define SHT_SHLIB 10U /* reserved */ +#define SHT_DYNSYM 11U /* symbol table */ +#define SHT_INIT_ARRAY 14U /* pointers to initialization functions */ +#define SHT_FINI_ARRAY 15U /* pointers to termination functions */ +#define SHT_PREINIT_ARRAY 16U /* pointers to functions called before initialization */ +#define SHT_GROUP 17U /* defines a section group */ +#define SHT_SYMTAB_SHNDX 18U /* used for extended section numbering */ +#define SHT_LOOS 0x60000000U /* start of OS-specific range */ +#define SHT_SUNW_dof 0x6FFFFFF4U /* used by dtrace */ +#define SHT_SUNW_cap 0x6FFFFFF5U /* capability requirements */ +#define SHT_GNU_ATTRIBUTES 0x6FFFFFF5U /* object attributes */ +#define SHT_SUNW_SIGNATURE 0x6FFFFFF6U /* module verification signature */ +#define SHT_GNU_HASH 0x6FFFFFF6U /* GNU Hash sections */ +#define SHT_GNU_LIBLIST 0x6FFFFFF7U /* List of libraries to be prelinked */ +#define SHT_SUNW_ANNOTATE 0x6FFFFFF7U /* special section where unresolved references are allowed */ +#define SHT_SUNW_DEBUGSTR 0x6FFFFFF8U /* debugging information */ +#define SHT_CHECKSUM 0x6FFFFFF8U /* checksum for dynamic shared objects */ +#define SHT_SUNW_DEBUG 0x6FFFFFF9U /* debugging information */ +#define SHT_SUNW_move 0x6FFFFFFAU /* information to handle partially initialized symbols */ +#define SHT_SUNW_COMDAT 0x6FFFFFFBU /* section supporting merging of multiple copies of data */ +#define SHT_SUNW_syminfo 0x6FFFFFFCU /* additional symbol information */ +#define SHT_SUNW_verdef 0x6FFFFFFDU /* symbol versioning information */ +#define SHT_SUNW_verneed 0x6FFFFFFEU /* symbol versioning requirements */ +#define SHT_SUNW_versym 0x6FFFFFFFU /* symbol versioning table */ +#define SHT_HIOS 0x6FFFFFFFU /* end of OS-specific range */ +#define SHT_LOPROC 0x70000000U /* start of processor-specific range */ +#define SHT_ARM_EXIDX 0x70000001U /* exception index table */ +#define SHT_ARM_PREEMPTMAP 0x70000002U /* BPABI DLL dynamic linking preemption map */ +#define SHT_ARM_ATTRIBUTES 0x70000003U /* object file compatibility attributes */ +#define SHT_ARM_DEBUGOVERLAY 0x70000004U /* overlay debug information */ +#define SHT_ARM_OVERLAYSECTION 0x70000005U /* overlay debug information */ +#define SHT_MIPS_LIBLIST 0x70000000U /* DSO library information used in link */ +#define SHT_MIPS_MSYM 0x70000001U /* MIPS symbol table extension */ +#define SHT_MIPS_CONFLICT 0x70000002U /* symbol conflicting with DSO-defined symbols */ +#define SHT_MIPS_GPTAB 0x70000003U /* global pointer table */ +#define SHT_MIPS_UCODE 0x70000004U /* reserved */ +#define SHT_MIPS_DEBUG 0x70000005U /* reserved (obsolete debug information) */ +#define SHT_MIPS_REGINFO 0x70000006U /* register usage information */ +#define SHT_MIPS_PACKAGE 0x70000007U /* OSF reserved */ +#define SHT_MIPS_PACKSYM 0x70000008U /* OSF reserved */ +#define SHT_MIPS_RELD 0x70000009U /* dynamic relocation */ +#define SHT_MIPS_IFACE 0x7000000BU /* subprogram interface information */ +#define SHT_MIPS_CONTENT 0x7000000CU /* section content classification */ +#define SHT_MIPS_OPTIONS 0x7000000DU /* general options */ +#define SHT_MIPS_DELTASYM 0x7000001BU /* Delta C++: symbol table */ +#define SHT_MIPS_DELTAINST 0x7000001CU /* Delta C++: instance table */ +#define SHT_MIPS_DELTACLASS 0x7000001DU /* Delta C++: class table */ +#define SHT_MIPS_DWARF 0x7000001EU /* DWARF debug information */ +#define SHT_MIPS_DELTADECL 0x7000001FU /* Delta C++: declarations */ +#define SHT_MIPS_SYMBOL_LIB 0x70000020U /* symbol-to-library mapping */ +#define SHT_MIPS_EVENTS 0x70000021U /* event locations */ +#define SHT_MIPS_TRANSLATE 0x70000022U /* ??? */ +#define SHT_MIPS_PIXIE 0x70000023U /* special pixie sections */ +#define SHT_MIPS_XLATE 0x70000024U /* address translation table */ +#define SHT_MIPS_XLATE_DEBUG 0x70000025U /* SGI internal address translation table */ +#define SHT_MIPS_WHIRL 0x70000026U /* intermediate code */ +#define SHT_MIPS_EH_REGION 0x70000027U /* C++ exception handling region info */ +#define SHT_MIPS_XLATE_OLD 0x70000028U /* obsolete */ +#define SHT_MIPS_PDR_EXCEPTION 0x70000029U /* runtime procedure descriptor table exception information */ +#define SHT_MIPS_ABIFLAGS 0x7000002AU /* ABI flags */ +#define SHT_SPARC_GOTDATA 0x70000000U /* SPARC-specific data */ +#define SHT_X86_64_UNWIND 0x70000001U /* unwind tables for the AMD64 */ +#define SHT_ORDERED 0x7FFFFFFFU /* sort entries in the section */ +#define SHT_HIPROC 0x7FFFFFFFU /* end of processor-specific range */ +#define SHT_LOUSER 0x80000000U /* start of application-specific range */ +#define SHT_HIUSER 0xFFFFFFFFU /* end of application-specific range */ /* Aliases for section types. */ -#define SHT_AMD64_UNWIND SHT_X86_64_UNWIND -#define SHT_GNU_verdef SHT_SUNW_verdef -#define SHT_GNU_verneed SHT_SUNW_verneed -#define SHT_GNU_versym SHT_SUNW_versym +#define SHT_AMD64_UNWIND SHT_X86_64_UNWIND +#define SHT_GNU_verdef SHT_SUNW_verdef +#define SHT_GNU_verneed SHT_SUNW_verneed +#define SHT_GNU_versym SHT_SUNW_versym #define PN_XNUM 0xFFFFU /* Use extended section numbering. */ @@ -828,101 +916,101 @@ * Symbol binding information. */ -#define STB_LOCAL 0 -#define STB_GLOBAL 1 -#define STB_WEAK 2 -#define STB_LOOS 10 -#define STB_GNU_UNIQUE 10 -#define STB_HIOS 12 -#define STB_LOPROC 13 -#define STB_HIPROC 15 +#define STB_LOCAL 0 /* not visible outside defining object file */ +#define STB_GLOBAL 1 /* visible across all object files being combined */ +#define STB_WEAK 2 /* visible across all object files but with low precedence */ +#define STB_LOOS 10 /* start of OS-specific range */ +#define STB_GNU_UNIQUE 10 /* unique symbol (GNU) */ +#define STB_HIOS 12 /* end of OS-specific range */ +#define STB_LOPROC 13 /* start of processor-specific range */ +#define STB_HIPROC 15 /* end of processor-specific range */ /* * Symbol types */ -#define STT_NOTYPE 0 -#define STT_OBJECT 1 -#define STT_FUNC 2 -#define STT_SECTION 3 -#define STT_FILE 4 -#define STT_COMMON 5 -#define STT_TLS 6 -#define STT_LOOS 10 -#define STT_GNU_IFUNC 10 -#define STT_HIOS 12 -#define STT_LOPROC 13 -#define STT_ARM_TFUNC 13 -#define STT_ARM_16BIT 15 -#define STT_SPARC_REGISTER 13 -#define STT_HIPROC 15 +#define STT_NOTYPE 0 /* unspecified type */ +#define STT_OBJECT 1 /* data object */ +#define STT_FUNC 2 /* executable code */ +#define STT_SECTION 3 /* section */ +#define STT_FILE 4 /* source file */ +#define STT_COMMON 5 /* uninitialized common block */ +#define STT_TLS 6 /* thread local storage */ +#define STT_LOOS 10 /* start of OS-specific types */ +#define STT_GNU_IFUNC 10 /* indirect function */ +#define STT_HIOS 12 /* end of OS-specific types */ +#define STT_LOPROC 13 /* start of processor-specific types */ +#define STT_ARM_TFUNC 13 /* Thumb function (GNU) */ +#define STT_ARM_16BIT 15 /* Thumb label (GNU) */ +#define STT_SPARC_REGISTER 13 /* SPARC register information */ +#define STT_HIPROC 15 /* end of processor-specific types */ /* Additional constants related to symbol types. */ -#define STT_NUM 7 +#define STT_NUM 7 /* the number of symbol types */ /* * Symbol binding. */ -#define SYMINFO_BT_SELF 0xFFFFU -#define SYMINFO_BT_PARENT 0xFFFEU -#define SYMINFO_BT_NONE 0xFFFDU +#define SYMINFO_BT_SELF 0xFFFFU /* bound to self */ +#define SYMINFO_BT_PARENT 0xFFFEU /* bound to parent */ +#define SYMINFO_BT_NONE 0xFFFDU /* no special binding */ /* * Symbol visibility. */ -#define STV_DEFAULT 0 -#define STV_INTERNAL 1 -#define STV_HIDDEN 2 -#define STV_PROTECTED 3 +#define STV_DEFAULT 0 /* as specified by symbol type */ +#define STV_INTERNAL 1 /* as defined by processor semantics */ +#define STV_HIDDEN 2 /* hidden from other components */ +#define STV_PROTECTED 3 /* local references are not preemptable */ /* * Symbol flags. */ -#define SYMINFO_FLG_DIRECT 0x01 -#define SYMINFO_FLG_COPY 0x04 -#define SYMINFO_FLG_LAZYLOAD 0x08 -#define SYMINFO_FLG_DIRECTBIND 0x10 -#define SYMINFO_FLG_NOEXTDIRECT 0x20 +#define SYMINFO_FLG_DIRECT 0x01 /* directly assocated reference */ +#define SYMINFO_FLG_COPY 0x04 /* definition by copy-relocation */ +#define SYMINFO_FLG_LAZYLOAD 0x08 /* object should be lazily loaded */ +#define SYMINFO_FLG_DIRECTBIND 0x10 /* reference should be directly bound */ +#define SYMINFO_FLG_NOEXTDIRECT 0x20 /* external references not allowed to bind to definition */ /* * Versioning dependencies. */ -#define VER_NDX_LOCAL 0 -#define VER_NDX_GLOBAL 1 +#define VER_NDX_LOCAL 0 /* local scope */ +#define VER_NDX_GLOBAL 1 /* global scope */ /* * Versioning flags. */ -#define VER_FLG_BASE 0x1 -#define VER_FLG_WEAK 0x2 +#define VER_FLG_BASE 0x1 /* file version */ +#define VER_FLG_WEAK 0x2 /* weak version */ /* * Versioning needs */ -#define VER_NEED_NONE 0 -#define VER_NEED_CURRENT 1 +#define VER_NEED_NONE 0 /* invalid version */ +#define VER_NEED_CURRENT 1 /* current version */ /* * Versioning numbers. */ -#define VER_DEF_NONE 0 -#define VER_DEF_CURRENT 1 +#define VER_DEF_NONE 0 /* invalid version */ +#define VER_DEF_CURRENT 1 /* current version */ /** @@ -930,833 +1018,1522 @@ **/ -#define R_386_NONE 0 -#define R_386_32 1 -#define R_386_PC32 2 -#define R_386_GOT32 3 -#define R_386_PLT32 4 -#define R_386_COPY 5 -#define R_386_GLOB_DAT 6 -#define R_386_JUMP_SLOT 7 -#define R_386_RELATIVE 8 -#define R_386_GOTOFF 9 -#define R_386_GOTPC 10 -#define R_386_32PLT 11 -#define R_386_TLS_TPOFF 14 -#define R_386_TLS_IE 15 -#define R_386_TLS_GOTIE 16 -#define R_386_TLS_LE 17 -#define R_386_TLS_GD 18 -#define R_386_TLS_LDM 19 -#define R_386_16 20 -#define R_386_PC16 21 -#define R_386_8 22 -#define R_386_PC8 23 -#define R_386_TLS_GD_32 24 -#define R_386_TLS_GD_PUSH 25 -#define R_386_TLS_GD_CALL 26 -#define R_386_TLS_GD_POP 27 -#define R_386_TLS_LDM_32 28 -#define R_386_TLS_LDM_PUSH 29 -#define R_386_TLS_LDM_CALL 30 -#define R_386_TLS_LDM_POP 31 -#define R_386_TLS_LDO_32 32 -#define R_386_TLS_IE_32 33 -#define R_386_TLS_LE_32 34 -#define R_386_TLS_DTPMOD32 35 -#define R_386_TLS_DTPOFF32 36 -#define R_386_TLS_TPOFF32 37 -#define R_386_SIZE32 38 -#define R_386_TLS_GOTDESC 39 -#define R_386_TLS_DESC_CALL 40 -#define R_386_TLS_DESC 41 -#define R_386_IRELATIVE 42 -#define R_386_GOT32X 43 - - -#define R_AARCH64_NONE 0 -#define R_AARCH64_ABS64 257 -#define R_AARCH64_ABS32 258 -#define R_AARCH64_ABS16 259 -#define R_AARCH64_PREL64 260 -#define R_AARCH64_PREL32 261 -#define R_AARCH64_PREL16 262 -#define R_AARCH64_MOVW_UABS_G0 263 -#define R_AARCH64_MOVW_UABS_G0_NC 264 -#define R_AARCH64_MOVW_UABS_G1 265 -#define R_AARCH64_MOVW_UABS_G1_NC 266 -#define R_AARCH64_MOVW_UABS_G2 267 -#define R_AARCH64_MOVW_UABS_G2_NC 268 -#define R_AARCH64_MOVW_UABS_G3 269 -#define R_AARCH64_MOVW_SABS_G0 270 -#define R_AARCH64_MOVW_SABS_G1 271 -#define R_AARCH64_MOVW_SABS_G2 272 -#define R_AARCH64_LD_PREL_LO19 273 -#define R_AARCH64_ADR_PREL_LO21 274 -#define R_AARCH64_ADR_PREL_PG_HI21 275 -#define R_AARCH64_ADR_PREL_PG_HI21_NC 276 -#define R_AARCH64_ADD_ABS_LO12_NC 277 -#define R_AARCH64_LDST8_ABS_LO12_NC 278 -#define R_AARCH64_TSTBR14 279 -#define R_AARCH64_CONDBR19 280 -#define R_AARCH64_JUMP26 282 -#define R_AARCH64_CALL26 283 -#define R_AARCH64_LDST16_ABS_LO12_NC 284 -#define R_AARCH64_LDST32_ABS_LO12_NC 285 -#define R_AARCH64_LDST64_ABS_LO12_NC 286 -#define R_AARCH64_MOVW_PREL_G0 287 -#define R_AARCH64_MOVW_PREL_G0_NC 288 -#define R_AARCH64_MOVW_PREL_G1 289 -#define R_AARCH64_MOVW_PREL_G1_NC 290 -#define R_AARCH64_MOVW_PREL_G2 291 -#define R_AARCH64_MOVW_PREL_G2_NC 292 -#define R_AARCH64_MOVW_PREL_G3 293 -#define R_AARCH64_LDST128_ABS_LO12_NC 299 -#define R_AARCH64_MOVW_GOTOFF_G0 300 -#define R_AARCH64_MOVW_GOTOFF_G0_NC 301 -#define R_AARCH64_MOVW_GOTOFF_G1 302 -#define R_AARCH64_MOVW_GOTOFF_G1_NC 303 -#define R_AARCH64_MOVW_GOTOFF_G2 304 -#define R_AARCH64_MOVW_GOTOFF_G2_NC 305 -#define R_AARCH64_MOVW_GOTOFF_G3 306 -#define R_AARCH64_GOTREL64 307 -#define R_AARCH64_GOTREL32 308 -#define R_AARCH64_GOT_LD_PREL19 309 -#define R_AARCH64_LD64_GOTOFF_LO15 310 -#define R_AARCH64_ADR_GOT_PAGE 311 -#define R_AARCH64_LD64_GOT_LO12_NC 312 -#define R_AARCH64_LD64_GOTPAGE_LO15 313 -#define R_AARCH64_TLSGD_ADR_PREL21 512 -#define R_AARCH64_TLSGD_ADR_PAGE21 513 -#define R_AARCH64_TLSGD_ADD_LO12_NC 514 -#define R_AARCH64_TLSGD_MOVW_G1 515 -#define R_AARCH64_TLSGD_MOVW_G0_NC 516 -#define R_AARCH64_TLSLD_ADR_PREL21 517 -#define R_AARCH64_TLSLD_ADR_PAGE21 518 -#define R_AARCH64_TLSLD_ADD_LO12_NC 519 -#define R_AARCH64_TLSLD_MOVW_G1 520 -#define R_AARCH64_TLSLD_MOVW_G0_NC 521 -#define R_AARCH64_TLSLD_LD_PREL19 522 -#define R_AARCH64_TLSLD_MOVW_DTPREL_G2 523 -#define R_AARCH64_TLSLD_MOVW_DTPREL_G1 524 -#define R_AARCH64_TLSLD_MOVW_DTPREL_G1_NC 525 -#define R_AARCH64_TLSLD_MOVW_DTPREL_G0 526 -#define R_AARCH64_TLSLD_MOVW_DTPREL_G0_NC 527 -#define R_AARCH64_TLSLD_ADD_DTPREL_HI12 529 -#define R_AARCH64_TLSLD_ADD_DTPREL_LO12_NC 530 -#define R_AARCH64_TLSLD_LDST8_DTPREL_LO12 531 -#define R_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC 532 -#define R_AARCH64_TLSLD_LDST16_DTPREL_LO12 533 -#define R_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC 534 -#define R_AARCH64_TLSLD_LDST32_DTPREL_LO12 535 -#define R_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC 536 -#define R_AARCH64_TLSLD_LDST64_DTPREL_LO12 537 -#define R_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC 538 -#define R_AARCH64_TLSIE_MOVW_GOTTPREL_G1 539 -#define R_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC 540 -#define R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21 541 -#define R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC 542 -#define R_AARCH64_TLSIE_LD_GOTTPREL_PREL19 543 -#define R_AARCH64_TLSLE_MOVW_TPREL_G2 544 -#define R_AARCH64_TLSLE_MOVW_TPREL_G1 545 -#define R_AARCH64_TLSLE_MOVW_TPREL_G1_NC 546 -#define R_AARCH64_TLSLE_MOVW_TPREL_G0 547 -#define R_AARCH64_TLSLE_MOVW_TPREL_G0_NC 548 -#define R_AARCH64_TLSLE_ADD_TPREL_HI12 549 -#define R_AARCH64_TLSLE_ADD_TPREL_LO12 550 -#define R_AARCH64_TLSLE_ADD_TPREL_LO12_NC 551 -#define R_AARCH64_TLSLE_LDST8_TPREL_LO12 552 -#define R_AARCH64_TLSLE_LDST8_TPREL_LO12_NC 553 -#define R_AARCH64_TLSLE_LDST16_TPREL_LO12 554 -#define R_AARCH64_TLSLE_LDST16_TPREL_LO12_NC 555 -#define R_AARCH64_TLSLE_LDST32_TPREL_LO12 556 -#define R_AARCH64_TLSLE_LDST32_TPREL_LO12_NC 557 -#define R_AARCH64_TLSLE_LDST64_TPREL_LO12 558 -#define R_AARCH64_TLSLE_LDST64_TPREL_LO12_NC 559 -#define R_AARCH64_TLSDESC_LD_PREL19 560 -#define R_AARCH64_TLSDESC_ADR_PREL21 561 -#define R_AARCH64_TLSDESC_ADR_PAGE21 562 -#define R_AARCH64_TLSDESC_LD64_LO12 563 -#define R_AARCH64_TLSDESC_ADD_LO12 564 -#define R_AARCH64_TLSDESC_OFF_G1 565 -#define R_AARCH64_TLSDESC_OFF_G0_NC 566 -#define R_AARCH64_TLSDESC_LDR 567 -#define R_AARCH64_TLSDESC_ADD 568 -#define R_AARCH64_TLSDESC_CALL 569 -#define R_AARCH64_TLSLE_LDST128_TPREL_LO12 570 -#define R_AARCH64_TLSLE_LDST128_TPREL_LO12_NC 571 -#define R_AARCH64_TLSLD_LDST128_DTPREL_LO12 572 -#define R_AARCH64_TLSLD_LDST128_DTPREL_LO12_NC 573 -#define R_AARCH64_COPY 1024 -#define R_AARCH64_GLOB_DAT 1025 -#define R_AARCH64_JUMP_SLOT 1026 -#define R_AARCH64_RELATIVE 1027 -#define R_AARCH64_TLS_DTPREL64 1028 -#define R_AARCH64_TLS_DTPMOD64 1029 -#define R_AARCH64_TLS_TPREL64 1030 -#define R_AARCH64_TLSDESC 1031 -#define R_AARCH64_IRELATIVE 1032 - - -#define R_AMD64_NONE 0 -#define R_AMD64_64 1 -#define R_AMD64_PC32 2 -#define R_AMD64_GOT32 3 -#define R_AMD64_PLT32 4 -#define R_AMD64_COPY 5 -#define R_AMD64_GLOB_DAT 6 -#define R_AMD64_JUMP_SLOT 7 -#define R_AMD64_RELATIVE 8 -#define R_AMD64_GOTPCREL 9 -#define R_AMD64_32 10 -#define R_AMD64_32S 11 -#define R_AMD64_16 12 -#define R_AMD64_PC16 13 -#define R_AMD64_8 14 -#define R_AMD64_PC8 15 -#define R_AMD64_PC64 24 -#define R_AMD64_GOTOFF64 25 -#define R_AMD64_GOTPC32 26 - - -#define R_ARM_NONE 0 -#define R_ARM_PC24 1 -#define R_ARM_ABS32 2 -#define R_ARM_REL32 3 -#define R_ARM_LDR_PC_G0 4 -#define R_ARM_ABS16 5 -#define R_ARM_ABS12 6 -#define R_ARM_THM_ABS5 7 -#define R_ARM_ABS8 8 -#define R_ARM_SBREL32 9 -#define R_ARM_THM_CALL 10 -#define R_ARM_THM_PC8 11 -#define R_ARM_BREL_ADJ 12 -#define R_ARM_SWI24 13 -#define R_ARM_TLS_DESC 13 -#define R_ARM_THM_SWI8 14 -#define R_ARM_XPC25 15 -#define R_ARM_THM_XPC22 16 -#define R_ARM_TLS_DTPMOD32 17 -#define R_ARM_TLS_DTPOFF32 18 -#define R_ARM_TLS_TPOFF32 19 -#define R_ARM_COPY 20 -#define R_ARM_GLOB_DAT 21 -#define R_ARM_JUMP_SLOT 22 -#define R_ARM_RELATIVE 23 -#define R_ARM_GOTOFF32 24 -#define R_ARM_BASE_PREL 25 -#define R_ARM_GOT_BREL 26 -#define R_ARM_PLT32 27 -#define R_ARM_CALL 28 -#define R_ARM_JUMP24 29 -#define R_ARM_THM_JUMP24 30 -#define R_ARM_BASE_ABS 31 -#define R_ARM_ALU_PCREL_7_0 32 -#define R_ARM_ALU_PCREL_15_8 33 -#define R_ARM_ALU_PCREL_23_15 34 -#define R_ARM_LDR_SBREL_11_0_NC 35 -#define R_ARM_ALU_SBREL_19_12_NC 36 -#define R_ARM_ALU_SBREL_27_20_CK 37 -#define R_ARM_TARGET1 38 -#define R_ARM_SBREL31 39 -#define R_ARM_V4BX 40 -#define R_ARM_TARGET2 41 -#define R_ARM_PREL31 42 -#define R_ARM_MOVW_ABS_NC 43 -#define R_ARM_MOVT_ABS 44 -#define R_ARM_MOVW_PREL_NC 45 -#define R_ARM_MOVT_PREL 46 -#define R_ARM_THM_MOVW_ABS_NC 47 -#define R_ARM_THM_MOVT_ABS 48 -#define R_ARM_THM_MOVW_PREL_NC 49 -#define R_ARM_THM_MOVT_PREL 50 -#define R_ARM_THM_JUMP19 51 -#define R_ARM_THM_JUMP6 52 -#define R_ARM_THM_ALU_PREL_11_0 53 -#define R_ARM_THM_PC12 54 -#define R_ARM_ABS32_NOI 55 -#define R_ARM_REL32_NOI 56 -#define R_ARM_ALU_PC_G0_NC 57 -#define R_ARM_ALU_PC_G0 58 -#define R_ARM_ALU_PC_G1_NC 59 -#define R_ARM_ALU_PC_G1 60 -#define R_ARM_ALU_PC_G2 61 -#define R_ARM_LDR_PC_G1 62 -#define R_ARM_LDR_PC_G2 63 -#define R_ARM_LDRS_PC_G0 64 -#define R_ARM_LDRS_PC_G1 65 -#define R_ARM_LDRS_PC_G2 66 -#define R_ARM_LDC_PC_G0 67 -#define R_ARM_LDC_PC_G1 68 -#define R_ARM_LDC_PC_G2 69 -#define R_ARM_ALU_SB_G0_NC 70 -#define R_ARM_ALU_SB_G0 71 -#define R_ARM_ALU_SB_G1_NC 72 -#define R_ARM_ALU_SB_G1 73 -#define R_ARM_ALU_SB_G2 74 -#define R_ARM_LDR_SB_G0 75 -#define R_ARM_LDR_SB_G1 76 -#define R_ARM_LDR_SB_G2 77 -#define R_ARM_LDRS_SB_G0 78 -#define R_ARM_LDRS_SB_G1 79 -#define R_ARM_LDRS_SB_G2 80 -#define R_ARM_LDC_SB_G0 81 -#define R_ARM_LDC_SB_G1 82 -#define R_ARM_LDC_SB_G2 83 -#define R_ARM_MOVW_BREL_NC 84 -#define R_ARM_MOVT_BREL 85 -#define R_ARM_MOVW_BREL 86 -#define R_ARM_THM_MOVW_BREL_NC 87 -#define R_ARM_THM_MOVT_BREL 88 -#define R_ARM_THM_MOVW_BREL 89 -#define R_ARM_TLS_GOTDESC 90 -#define R_ARM_TLS_CALL 91 -#define R_ARM_TLS_DESCSEQ 92 -#define R_ARM_THM_TLS_CALL 93 -#define R_ARM_PLT32_ABS 94 -#define R_ARM_GOT_ABS 95 -#define R_ARM_GOT_PREL 96 -#define R_ARM_GOT_BREL12 97 -#define R_ARM_GOTOFF12 98 -#define R_ARM_GOTRELAX 99 -#define R_ARM_GNU_VTENTRY 100 -#define R_ARM_GNU_VTINHERIT 101 -#define R_ARM_THM_JUMP11 102 -#define R_ARM_THM_JUMP8 103 -#define R_ARM_TLS_GD32 104 -#define R_ARM_TLS_LDM32 105 -#define R_ARM_TLS_LDO32 106 -#define R_ARM_TLS_IE32 107 -#define R_ARM_TLS_LE32 108 -#define R_ARM_TLS_LDO12 109 -#define R_ARM_TLS_LE12 110 -#define R_ARM_TLS_IE12GP 111 -#define R_ARM_PRIVATE_0 112 -#define R_ARM_PRIVATE_1 113 -#define R_ARM_PRIVATE_2 114 -#define R_ARM_PRIVATE_3 115 -#define R_ARM_PRIVATE_4 116 -#define R_ARM_PRIVATE_5 117 -#define R_ARM_PRIVATE_6 118 -#define R_ARM_PRIVATE_7 119 -#define R_ARM_PRIVATE_8 120 -#define R_ARM_PRIVATE_9 121 -#define R_ARM_PRIVATE_10 122 -#define R_ARM_PRIVATE_11 123 -#define R_ARM_PRIVATE_12 124 -#define R_ARM_PRIVATE_13 125 -#define R_ARM_PRIVATE_14 126 -#define R_ARM_PRIVATE_15 127 -#define R_ARM_ME_TOO 128 -#define R_ARM_THM_TLS_DESCSEQ16 129 -#define R_ARM_THM_TLS_DESCSEQ32 130 -#define R_ARM_THM_GOT_BREL12 131 -#define R_ARM_IRELATIVE 140 - - -#define R_IA_64_NONE 0 -#define R_IA_64_IMM14 0x21 -#define R_IA_64_IMM22 0x22 -#define R_IA_64_IMM64 0x23 -#define R_IA_64_DIR32MSB 0x24 -#define R_IA_64_DIR32LSB 0x25 -#define R_IA_64_DIR64MSB 0x26 -#define R_IA_64_DIR64LSB 0x27 -#define R_IA_64_GPREL22 0x2a -#define R_IA_64_GPREL64I 0x2b -#define R_IA_64_GPREL32MSB 0x2c -#define R_IA_64_GPREL32LSB 0x2d -#define R_IA_64_GPREL64MSB 0x2e -#define R_IA_64_GPREL64LSB 0x2f -#define R_IA_64_LTOFF22 0x32 -#define R_IA_64_LTOFF64I 0x33 -#define R_IA_64_PLTOFF22 0x3a -#define R_IA_64_PLTOFF64I 0x3b -#define R_IA_64_PLTOFF64MSB 0x3e -#define R_IA_64_PLTOFF64LSB 0x3f -#define R_IA_64_FPTR64I 0x43 -#define R_IA_64_FPTR32MSB 0x44 -#define R_IA_64_FPTR32LSB 0x45 -#define R_IA_64_FPTR64MSB 0x46 -#define R_IA_64_FPTR64LSB 0x47 -#define R_IA_64_PCREL60B 0x48 -#define R_IA_64_PCREL21B 0x49 -#define R_IA_64_PCREL21M 0x4a -#define R_IA_64_PCREL21F 0x4b -#define R_IA_64_PCREL32MSB 0x4c -#define R_IA_64_PCREL32LSB 0x4d -#define R_IA_64_PCREL64MSB 0x4e -#define R_IA_64_PCREL64LSB 0x4f -#define R_IA_64_LTOFF_FPTR22 0x52 -#define R_IA_64_LTOFF_FPTR64I 0x53 -#define R_IA_64_LTOFF_FPTR32MSB 0x54 -#define R_IA_64_LTOFF_FPTR32LSB 0x55 -#define R_IA_64_LTOFF_FPTR64MSB 0x56 -#define R_IA_64_LTOFF_FPTR64LSB 0x57 -#define R_IA_64_SEGREL32MSB 0x5c -#define R_IA_64_SEGREL32LSB 0x5d -#define R_IA_64_SEGREL64MSB 0x5e -#define R_IA_64_SEGREL64LSB 0x5f -#define R_IA_64_SECREL32MSB 0x64 -#define R_IA_64_SECREL32LSB 0x65 -#define R_IA_64_SECREL64MSB 0x66 -#define R_IA_64_SECREL64LSB 0x67 -#define R_IA_64_REL32MSB 0x6c -#define R_IA_64_REL32LSB 0x6d -#define R_IA_64_REL64MSB 0x6e -#define R_IA_64_REL64LSB 0x6f -#define R_IA_64_LTV32MSB 0x74 -#define R_IA_64_LTV32LSB 0x75 -#define R_IA_64_LTV64MSB 0x76 -#define R_IA_64_LTV64LSB 0x77 -#define R_IA_64_PCREL21BI 0x79 -#define R_IA_64_PCREL22 0x7A -#define R_IA_64_PCREL64I 0x7B -#define R_IA_64_IPLTMSB 0x80 -#define R_IA_64_IPLTLSB 0x81 -#define R_IA_64_SUB 0x85 -#define R_IA_64_LTOFF22X 0x86 -#define R_IA_64_LDXMOV 0x87 -#define R_IA_64_TPREL14 0x91 -#define R_IA_64_TPREL22 0x92 -#define R_IA_64_TPREL64I 0x93 -#define R_IA_64_TPREL64MSB 0x96 -#define R_IA_64_TPREL64LSB 0x97 -#define R_IA_64_LTOFF_TPREL22 0x9A -#define R_IA_64_DTPMOD64MSB 0xA6 -#define R_IA_64_DTPMOD64LSB 0xA7 -#define R_IA_64_LTOFF_DTPMOD22 0xAA -#define R_IA_64_DTPREL14 0xB1 -#define R_IA_64_DTPREL22 0xB2 -#define R_IA_64_DTPREL64I 0xB3 -#define R_IA_64_DTPREL32MSB 0xB4 -#define R_IA_64_DTPREL32LSB 0xB5 -#define R_IA_64_DTPREL64MSB 0xB6 -#define R_IA_64_DTPREL64LSB 0xB7 -#define R_IA_64_LTOFF_DTPREL22 0xBA - - -#define R_MIPS_NONE 0 -#define R_MIPS_16 1 -#define R_MIPS_32 2 -#define R_MIPS_REL32 3 -#define R_MIPS_26 4 -#define R_MIPS_HI16 5 -#define R_MIPS_LO16 6 -#define R_MIPS_GPREL16 7 -#define R_MIPS_LITERAL 8 -#define R_MIPS_GOT16 9 -#define R_MIPS_PC16 10 -#define R_MIPS_CALL16 11 -#define R_MIPS_GPREL32 12 -#define R_MIPS_SHIFT5 16 -#define R_MIPS_SHIFT6 17 -#define R_MIPS_64 18 -#define R_MIPS_GOT_DISP 19 -#define R_MIPS_GOT_PAGE 20 -#define R_MIPS_GOT_OFST 21 -#define R_MIPS_GOT_HI16 22 -#define R_MIPS_GOT_LO16 23 -#define R_MIPS_SUB 24 -#define R_MIPS_CALLHI16 30 -#define R_MIPS_CALLLO16 31 -#define R_MIPS_JALR 37 -#define R_MIPS_TLS_DTPMOD32 38 -#define R_MIPS_TLS_DTPREL32 39 -#define R_MIPS_TLS_DTPMOD64 40 -#define R_MIPS_TLS_DTPREL64 41 -#define R_MIPS_TLS_GD 42 -#define R_MIPS_TLS_LDM 43 -#define R_MIPS_TLS_DTPREL_HI16 44 -#define R_MIPS_TLS_DTPREL_LO16 45 -#define R_MIPS_TLS_GOTTPREL 46 -#define R_MIPS_TLS_TPREL32 47 -#define R_MIPS_TLS_TPREL64 48 -#define R_MIPS_TLS_TPREL_HI16 49 -#define R_MIPS_TLS_TPREL_LO16 50 - - -#define R_PPC_NONE 0 -#define R_PPC_ADDR32 1 -#define R_PPC_ADDR24 2 -#define R_PPC_ADDR16 3 -#define R_PPC_ADDR16_LO 4 -#define R_PPC_ADDR16_HI 5 -#define R_PPC_ADDR16_HA 6 -#define R_PPC_ADDR14 7 -#define R_PPC_ADDR14_BRTAKEN 8 -#define R_PPC_ADDR14_BRNTAKEN 9 -#define R_PPC_REL24 10 -#define R_PPC_REL14 11 -#define R_PPC_REL14_BRTAKEN 12 -#define R_PPC_REL14_BRNTAKEN 13 -#define R_PPC_GOT16 14 -#define R_PPC_GOT16_LO 15 -#define R_PPC_GOT16_HI 16 -#define R_PPC_GOT16_HA 17 -#define R_PPC_PLTREL24 18 -#define R_PPC_COPY 19 -#define R_PPC_GLOB_DAT 20 -#define R_PPC_JMP_SLOT 21 -#define R_PPC_RELATIVE 22 -#define R_PPC_LOCAL24PC 23 -#define R_PPC_UADDR32 24 -#define R_PPC_UADDR16 25 -#define R_PPC_REL32 26 -#define R_PPC_PLT32 27 -#define R_PPC_PLTREL32 28 -#define R_PPC_PLT16_LO 29 -#define R_PPC_PLT16_HI 30 -#define R_PPC_PLT16_HA 31 -#define R_PPC_SDAREL16 32 -#define R_PPC_SECTOFF 33 -#define R_PPC_SECTOFF_LO 34 -#define R_PPC_SECTOFF_HI 35 -#define R_PPC_SECTOFF_HA 36 -#define R_PPC_ADDR30 37 -#define R_PPC_TLS 67 -#define R_PPC_DTPMOD32 68 -#define R_PPC_TPREL16 69 -#define R_PPC_TPREL16_LO 70 -#define R_PPC_TPREL16_HI 71 -#define R_PPC_TPREL16_HA 72 -#define R_PPC_TPREL32 73 -#define R_PPC_DTPREL16 74 -#define R_PPC_DTPREL16_LO 75 -#define R_PPC_DTPREL16_HI 76 -#define R_PPC_DTPREL16_HA 77 -#define R_PPC_DTPREL32 78 -#define R_PPC_GOT_TLSGD16 79 -#define R_PPC_GOT_TLSGD16_LO 80 -#define R_PPC_GOT_TLSGD16_HI 81 -#define R_PPC_GOT_TLSGD16_HA 82 -#define R_PPC_GOT_TLSLD16 83 -#define R_PPC_GOT_TLSLD16_LO 84 -#define R_PPC_GOT_TLSLD16_HI 85 -#define R_PPC_GOT_TLSLD16_HA 86 -#define R_PPC_GOT_TPREL16 87 -#define R_PPC_GOT_TPREL16_LO 88 -#define R_PPC_GOT_TPREL16_HI 89 -#define R_PPC_GOT_TPREL16_HA 90 -#define R_PPC_GOT_DTPREL16 91 -#define R_PPC_GOT_DTPREL16_LO 92 -#define R_PPC_GOT_DTPREL16_HI 93 -#define R_PPC_GOT_DTPREL16_HA 94 -#define R_PPC_TLSGD 95 -#define R_PPC_TLSLD 96 -#define R_PPC_EMB_NADDR32 101 -#define R_PPC_EMB_NADDR16 102 -#define R_PPC_EMB_NADDR16_LO 103 -#define R_PPC_EMB_NADDR16_HI 104 -#define R_PPC_EMB_NADDR16_HA 105 -#define R_PPC_EMB_SDAI16 106 -#define R_PPC_EMB_SDA2I16 107 -#define R_PPC_EMB_SDA2REL 108 -#define R_PPC_EMB_SDA21 109 -#define R_PPC_EMB_MRKREF 110 -#define R_PPC_EMB_RELSEC16 111 -#define R_PPC_EMB_RELST_LO 112 -#define R_PPC_EMB_RELST_HI 113 -#define R_PPC_EMB_RELST_HA 114 -#define R_PPC_EMB_BIT_FLD 115 -#define R_PPC_EMB_RELSDA 116 - - -#define R_PPC64_NONE 0 -#define R_PPC64_ADDR32 1 -#define R_PPC64_ADDR24 2 -#define R_PPC64_ADDR16 3 -#define R_PPC64_ADDR16_LO 4 -#define R_PPC64_ADDR16_HI 5 -#define R_PPC64_ADDR16_HA 6 -#define R_PPC64_ADDR14 7 -#define R_PPC64_ADDR14_BRTAKEN 8 -#define R_PPC64_ADDR14_BRNTAKEN 9 -#define R_PPC64_REL24 10 -#define R_PPC64_REL14 11 -#define R_PPC64_REL14_BRTAKEN 12 -#define R_PPC64_REL14_BRNTAKEN 13 -#define R_PPC64_GOT16 14 -#define R_PPC64_GOT16_LO 15 -#define R_PPC64_GOT16_HI 16 -#define R_PPC64_GOT16_HA 17 -#define R_PPC64_COPY 19 -#define R_PPC64_GLOB_DAT 20 -#define R_PPC64_JMP_SLOT 21 -#define R_PPC64_RELATIVE 22 -#define R_PPC64_UADDR32 24 -#define R_PPC64_UADDR16 25 -#define R_PPC64_REL32 26 -#define R_PPC64_PLT32 27 -#define R_PPC64_PLTREL32 28 -#define R_PPC64_PLT16_LO 29 -#define R_PPC64_PLT16_HI 30 -#define R_PPC64_PLT16_HA 31 -#define R_PPC64_SECTOFF 33 -#define R_PPC64_SECTOFF_LO 34 -#define R_PPC64_SECTOFF_HI 35 -#define R_PPC64_SECTOFF_HA 36 -#define R_PPC64_ADDR30 37 -#define R_PPC64_ADDR64 38 -#define R_PPC64_ADDR16_HIGHER 39 -#define R_PPC64_ADDR16_HIGHERA 40 -#define R_PPC64_ADDR16_HIGHEST 41 -#define R_PPC64_ADDR16_HIGHESTA 42 -#define R_PPC64_UADDR64 43 -#define R_PPC64_REL64 44 -#define R_PPC64_PLT64 45 -#define R_PPC64_PLTREL64 46 -#define R_PPC64_TOC16 47 -#define R_PPC64_TOC16_LO 48 -#define R_PPC64_TOC16_HI 49 -#define R_PPC64_TOC16_HA 50 -#define R_PPC64_TOC 51 -#define R_PPC64_PLTGOT16 52 -#define R_PPC64_PLTGOT16_LO 53 -#define R_PPC64_PLTGOT16_HI 54 -#define R_PPC64_PLTGOT16_HA 55 -#define R_PPC64_ADDR16_DS 56 -#define R_PPC64_ADDR16_LO_DS 57 -#define R_PPC64_GOT16_DS 58 -#define R_PPC64_GOT16_LO_DS 59 -#define R_PPC64_PLT16_LO_DS 60 -#define R_PPC64_SECTOFF_DS 61 -#define R_PPC64_SECTOFF_LO_DS 62 -#define R_PPC64_TOC16_DS 63 -#define R_PPC64_TOC16_LO_DS 64 -#define R_PPC64_PLTGOT16_DS 65 -#define R_PPC64_PLTGOT16_LO_DS 66 -#define R_PPC64_TLS 67 -#define R_PPC64_DTPMOD64 68 -#define R_PPC64_TPREL16 69 -#define R_PPC64_TPREL16_LO 60 -#define R_PPC64_TPREL16_HI 71 -#define R_PPC64_TPREL16_HA 72 -#define R_PPC64_TPREL64 73 -#define R_PPC64_DTPREL16 74 -#define R_PPC64_DTPREL16_LO 75 -#define R_PPC64_DTPREL16_HI 76 -#define R_PPC64_DTPREL16_HA 77 -#define R_PPC64_DTPREL64 78 -#define R_PPC64_GOT_TLSGD16 79 -#define R_PPC64_GOT_TLSGD16_LO 80 -#define R_PPC64_GOT_TLSGD16_HI 81 -#define R_PPC64_GOT_TLSGD16_HA 82 -#define R_PPC64_GOT_TLSLD16 83 -#define R_PPC64_GOT_TLSLD16_LO 84 -#define R_PPC64_GOT_TLSLD16_HI 85 -#define R_PPC64_GOT_TLSLD16_HA 86 -#define R_PPC64_GOT_TPREL16_DS 87 -#define R_PPC64_GOT_TPREL16_LO_DS 88 -#define R_PPC64_GOT_TPREL16_HI 89 -#define R_PPC64_GOT_TPREL16_HA 90 -#define R_PPC64_GOT_DTPREL16_DS 91 -#define R_PPC64_GOT_DTPREL16_LO_DS 92 -#define R_PPC64_GOT_DTPREL16_HI 93 -#define R_PPC64_GOT_DTPREL16_HA 94 -#define R_PPC64_TPREL16_DS 95 -#define R_PPC64_TPREL16_LO_DS 96 -#define R_PPC64_TPREL16_HIGHER 97 -#define R_PPC64_TPREL16_HIGHERA 98 -#define R_PPC64_TPREL16_HIGHEST 99 -#define R_PPC64_TPREL16_HIGHESTA 100 -#define R_PPC64_DTPREL16_DS 101 -#define R_PPC64_DTPREL16_LO_DS 102 -#define R_PPC64_DTPREL16_HIGHER 103 -#define R_PPC64_DTPREL16_HIGHERA 104 -#define R_PPC64_DTPREL16_HIGHEST 105 -#define R_PPC64_DTPREL16_HIGHESTA 106 -#define R_PPC64_TLSGD 107 -#define R_PPC64_TLSLD 108 - - -#define R_RISCV_NONE 0 -#define R_RISCV_32 1 -#define R_RISCV_64 2 -#define R_RISCV_RELATIVE 3 -#define R_RISCV_COPY 4 -#define R_RISCV_JUMP_SLOT 5 -#define R_RISCV_TLS_DTPMOD32 6 -#define R_RISCV_TLS_DTPMOD64 7 -#define R_RISCV_TLS_DTPREL32 8 -#define R_RISCV_TLS_DTPREL64 9 -#define R_RISCV_TLS_TPREL32 10 -#define R_RISCV_TLS_TPREL64 11 -#define R_RISCV_BRANCH 16 -#define R_RISCV_JAL 17 -#define R_RISCV_CALL 18 -#define R_RISCV_CALL_PLT 19 -#define R_RISCV_GOT_HI20 20 -#define R_RISCV_TLS_GOT_HI20 21 -#define R_RISCV_TLS_GD_HI20 22 -#define R_RISCV_PCREL_HI20 23 -#define R_RISCV_PCREL_LO12_I 24 -#define R_RISCV_PCREL_LO12_S 25 -#define R_RISCV_HI20 26 -#define R_RISCV_LO12_I 27 -#define R_RISCV_LO12_S 28 -#define R_RISCV_TPREL_HI20 29 -#define R_RISCV_TPREL_LO12_I 30 -#define R_RISCV_TPREL_LO12_S 31 -#define R_RISCV_TPREL_ADD 32 -#define R_RISCV_ADD8 33 -#define R_RISCV_ADD16 34 -#define R_RISCV_ADD32 35 -#define R_RISCV_ADD64 36 -#define R_RISCV_SUB8 37 -#define R_RISCV_SUB16 38 -#define R_RISCV_SUB32 39 -#define R_RISCV_SUB64 40 -#define R_RISCV_GNU_VTINHERIT 41 -#define R_RISCV_GNU_VTENTRY 42 -#define R_RISCV_ALIGN 43 -#define R_RISCV_RVC_BRANCH 44 -#define R_RISCV_RVC_JUMP 45 -#define R_RISCV_RVC_LUI 46 -#define R_RISCV_GPREL_I 47 -#define R_RISCV_GPREL_S 48 -#define R_RISCV_TPREL_I 49 -#define R_RISCV_TPREL_S 50 -#define R_RISCV_RELAX 51 -#define R_RISCV_SUB6 52 -#define R_RISCV_SET6 53 -#define R_RISCV_SET8 54 -#define R_RISCV_SET16 55 -#define R_RISCV_SET32 56 -#define R_RISCV_32_PCREL 57 -#define R_RISCV_IRELATIVE 58 - - -#define R_SPARC_NONE 0 -#define R_SPARC_8 1 -#define R_SPARC_16 2 -#define R_SPARC_32 3 -#define R_SPARC_DISP8 4 -#define R_SPARC_DISP16 5 -#define R_SPARC_DISP32 6 -#define R_SPARC_WDISP30 7 -#define R_SPARC_WDISP22 8 -#define R_SPARC_HI22 9 -#define R_SPARC_22 10 -#define R_SPARC_13 11 -#define R_SPARC_LO10 12 -#define R_SPARC_GOT10 13 -#define R_SPARC_GOT13 14 -#define R_SPARC_GOT22 15 -#define R_SPARC_PC10 16 -#define R_SPARC_PC22 17 -#define R_SPARC_WPLT30 18 -#define R_SPARC_COPY 19 -#define R_SPARC_GLOB_DAT 20 -#define R_SPARC_JMP_SLOT 21 -#define R_SPARC_RELATIVE 22 -#define R_SPARC_UA32 23 -#define R_SPARC_PLT32 24 -#define R_SPARC_HIPLT22 25 -#define R_SPARC_LOPLT10 26 -#define R_SPARC_PCPLT32 27 -#define R_SPARC_PCPLT22 28 -#define R_SPARC_PCPLT10 29 -#define R_SPARC_10 30 -#define R_SPARC_11 31 -#define R_SPARC_64 32 -#define R_SPARC_OLO10 33 -#define R_SPARC_HH22 34 -#define R_SPARC_HM10 35 -#define R_SPARC_LM22 36 -#define R_SPARC_PC_HH22 37 -#define R_SPARC_PC_HM10 38 -#define R_SPARC_PC_LM22 39 -#define R_SPARC_WDISP16 40 -#define R_SPARC_WDISP19 41 -#define R_SPARC_GLOB_JMP 42 -#define R_SPARC_7 43 -#define R_SPARC_5 44 -#define R_SPARC_6 45 -#define R_SPARC_DISP64 46 -#define R_SPARC_PLT64 47 -#define R_SPARC_HIX22 48 -#define R_SPARC_LOX10 49 -#define R_SPARC_H44 50 -#define R_SPARC_M44 51 -#define R_SPARC_L44 52 -#define R_SPARC_REGISTER 53 -#define R_SPARC_UA64 54 -#define R_SPARC_UA16 55 -#define R_SPARC_TLS_GD_HI22 56 -#define R_SPARC_TLS_GD_LO10 57 -#define R_SPARC_TLS_GD_ADD 58 -#define R_SPARC_TLS_GD_CALL 59 -#define R_SPARC_TLS_LDM_HI22 60 -#define R_SPARC_TLS_LDM_LO10 61 -#define R_SPARC_TLS_LDM_ADD 62 -#define R_SPARC_TLS_LDM_CALL 63 -#define R_SPARC_TLS_LDO_HIX22 64 -#define R_SPARC_TLS_LDO_LOX10 65 -#define R_SPARC_TLS_LDO_ADD 66 -#define R_SPARC_TLS_IE_HI22 67 -#define R_SPARC_TLS_IE_LO10 68 -#define R_SPARC_TLS_IE_LD 69 -#define R_SPARC_TLS_IE_LDX 70 -#define R_SPARC_TLS_IE_ADD 71 -#define R_SPARC_TLS_LE_HIX22 72 -#define R_SPARC_TLS_LE_LOX10 73 -#define R_SPARC_TLS_DTPMOD32 74 -#define R_SPARC_TLS_DTPMOD64 75 -#define R_SPARC_TLS_DTPOFF32 76 -#define R_SPARC_TLS_DTPOFF64 77 -#define R_SPARC_TLS_TPOFF32 78 -#define R_SPARC_TLS_TPOFF64 79 -#define R_SPARC_GOTDATA_HIX22 80 -#define R_SPARC_GOTDATA_LOX10 81 -#define R_SPARC_GOTDATA_OP_HIX22 82 -#define R_SPARC_GOTDATA_OP_LOX10 83 -#define R_SPARC_GOTDATA_OP 84 -#define R_SPARC_H34 85 - - -#define R_X86_64_NONE 0 -#define R_X86_64_64 1 -#define R_X86_64_PC32 2 -#define R_X86_64_GOT32 3 -#define R_X86_64_PLT32 4 -#define R_X86_64_COPY 5 -#define R_X86_64_GLOB_DAT 6 -#define R_X86_64_JUMP_SLOT 7 -#define R_X86_64_RELATIVE 8 -#define R_X86_64_GOTPCREL 9 -#define R_X86_64_32 10 -#define R_X86_64_32S 11 -#define R_X86_64_16 12 -#define R_X86_64_PC16 13 -#define R_X86_64_8 14 -#define R_X86_64_PC8 15 -#define R_X86_64_DTPMOD64 16 -#define R_X86_64_DTPOFF64 17 -#define R_X86_64_TPOFF64 18 -#define R_X86_64_TLSGD 19 -#define R_X86_64_TLSLD 20 -#define R_X86_64_DTPOFF32 21 -#define R_X86_64_GOTTPOFF 22 -#define R_X86_64_TPOFF32 23 -#define R_X86_64_PC64 24 -#define R_X86_64_GOTOFF64 25 -#define R_X86_64_GOTPC32 26 -#define R_X86_64_GOT64 27 -#define R_X86_64_GOTPCREL64 28 -#define R_X86_64_GOTPC64 29 -#define R_X86_64_GOTPLT64 30 -#define R_X86_64_PLTOFF64 31 -#define R_X86_64_SIZE32 32 -#define R_X86_64_SIZE64 33 -#define R_X86_64_GOTPC32_TLSDESC 34 -#define R_X86_64_TLSDESC_CALL 35 -#define R_X86_64_TLSDESC 36 -#define R_X86_64_IRELATIVE 37 -#define R_X86_64_RELATIVE64 38 -#define R_X86_64_GOTPCRELX 41 -#define R_X86_64_REX_GOTPCRELX 42 +/* EM_386 */ +#define R_386_NONE 0 +#define R_386_32 1 +#define R_386_PC32 2 +#define R_386_GOT32 3 +#define R_386_PLT32 4 +#define R_386_COPY 5 +#define R_386_GLOB_DAT 6 +#define R_386_JUMP_SLOT 7 +#define R_386_RELATIVE 8 +#define R_386_GOTOFF 9 +#define R_386_GOTPC 10 +#define R_386_32PLT 11 + /* unused: 12-13 */ +#define R_386_TLS_TPOFF 14 +#define R_386_TLS_IE 15 +#define R_386_TLS_GOTIE 16 +#define R_386_TLS_LE 17 +#define R_386_TLS_GD 18 +#define R_386_TLS_LDM 19 +#define R_386_16 20 +#define R_386_PC16 21 +#define R_386_8 22 +#define R_386_PC8 23 +#define R_386_TLS_GD_32 24 +#define R_386_TLS_GD_PUSH 25 +#define R_386_TLS_GD_CALL 26 +#define R_386_TLS_GD_POP 27 +#define R_386_TLS_LDM_32 28 +#define R_386_TLS_LDM_PUSH 29 +#define R_386_TLS_LDM_CALL 30 +#define R_386_TLS_LDM_POP 31 +#define R_386_TLS_LDO_32 32 +#define R_386_TLS_IE_32 33 +#define R_386_TLS_LE_32 34 +#define R_386_TLS_DTPMOD32 35 +#define R_386_TLS_DTPOFF32 36 +#define R_386_TLS_TPOFF32 37 +#define R_386_SIZE32 38 +#define R_386_TLS_GOTDESC 39 +#define R_386_TLS_DESC_CALL 40 +#define R_386_TLS_DESC 41 +#define R_386_IRELATIVE 42 +#define R_386_GOT32X 43 + + +/* EM_AARCH64 */ +#define R_AARCH64_NONE 0 +#define R_AARCH64_P32_ABS32 1 +#define R_AARCH64_P32_ABS16 2 +#define R_AARCH64_P32_PREL32 3 +#define R_AARCH64_P32_PREL16 4 +#define R_AARCH64_P32_MOVW_UABS_G0 5 +#define R_AARCH64_P32_MOVW_UABS_G0_NC 6 +#define R_AARCH64_P32_MOVW_UABS_G1 7 +#define R_AARCH64_P32_MOVW_SABS_G0 8 +#define R_AARCH64_P32_LD_PREL_LO19 9 +#define R_AARCH64_P32_ADR_PREL_LO21 10 +#define R_AARCH64_P32_ADR_PREL_PG_HI21 11 +#define R_AARCH64_P32_ADD_ABS_LO12_NC 12 +#define R_AARCH64_P32_LDST8_ABS_LO12_NC 13 +#define R_AARCH64_P32_LDST16_ABS_LO12_NC 14 +#define R_AARCH64_P32_LDST32_ABS_LO12_NC 15 +#define R_AARCH64_P32_LDST64_ABS_LO12_NC 16 +#define R_AARCH64_P32_LDST128_ABS_LO12_NC 17 +#define R_AARCH64_P32_TSTBR14 18 +#define R_AARCH64_P32_CONDBR19 19 +#define R_AARCH64_P32_JUMP26 20 +#define R_AARCH64_P32_CALL26 21 +#define R_AARCH64_P32_MOVW_PREL_G0 22 +#define R_AARCH64_P32_MOVW_PREL_G0_NC 23 +#define R_AARCH64_P32_MOVW_PREL_G1 24 +#define R_AARCH64_P32_GOT_LD_PREL19 25 +#define R_AARCH64_P32_ADR_GOT_PAGE 26 +#define R_AARCH64_P32_LD32_GOT_LO12_NC 27 +#define R_AARCH64_P32_LD32_GOTPAGE_LO14 28 +#define R_AARCH64_P32_PLT32 29 + /* Unused: 30-79. */ +#define R_AARCH64_P32_TLSGD_ADR_PREL21 80 +#define R_AARCH64_P32_TLSGD_ADR_PAGE21 81 +#define R_AARCH64_P32_TLSGD_ADD_LO12_NC 82 +#define R_AARCH64_P32_TLSLD_ADR_PREL21 83 +#define R_AARCH64_P32_TLSLD_ADR_PAGE21 84 +#define R_AARCH64_P32_TLSLD_ADD_LO12_NC 85 +#define R_AARCH64_P32_TLSLD_LD_PREL19 86 +#define R_AARCH64_P32_TLSLD_MOVW_DTPREL_G1 87 +#define R_AARCH64_P32_TLSLD_MOVW_DTPREL_G0 88 +#define R_AARCH64_P32_TLSLD_MOVW_DTPREL_G0_NC 89 +#define R_AARCH64_P32_TLSLD_ADD_DTPREL_HI12 90 +#define R_AARCH64_P32_TLSLD_ADD_DTPREL_LO12 91 +#define R_AARCH64_P32_TLSLD_ADD_DTPREL_LO12_NC 92 +#define R_AARCH64_P32_TLSLD_LDST8_DTPREL_LO12 93 +#define R_AARCH64_P32_TLSLD_LDST8_DTPREL_LO12_NC 94 +#define R_AARCH64_P32_TLSLD_LDST16_DTPREL_LO12 95 +#define R_AARCH64_P32_TLSLD_LDST16_DTPREL_LO12_NC 96 +#define R_AARCH64_P32_TLSLD_LDST32_DTPREL_LO12 97 +#define R_AARCH64_P32_TLSLD_LDST32_DTPREL_LO12_NC 98 +#define R_AARCH64_P32_TLSLD_LDST64_DTPREL_LO12 99 +#define R_AARCH64_P32_TLSLD_LDST64_DTPREL_LO12_NC 100 +#define R_AARCH64_P32_TLSLD_LDST128_DTPREL_LO12 101 +#define R_AARCH64_P32_TLSLD_LDST128_DTPREL_LO12_NC 102 +#define R_AARCH64_P32_TLSIE_ADR_GOTTPREL_PAGE21 103 +#define R_AARCH64_P32_TLSIE_LD32_GOTTPREL_LO12_NC 104 +#define R_AARCH64_P32_TLSIE_LD_GOTTPREL_PREL19 105 +#define R_AARCH64_P32_TLSLE_MOVW_TPREL_G1 106 +#define R_AARCH64_P32_TLSLE_MOVW_TPREL_G0 107 +#define R_AARCH64_P32_TLSLE_MOVW_TPREL_G0_NC 108 +#define R_AARCH64_P32_TLSLE_ADD_TPREL_HI12 109 +#define R_AARCH64_P32_TLSLE_ADD_TPREL_LO12 110 +#define R_AARCH64_P32_TLSLE_ADD_TPREL_LO12_NC 111 +#define R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12 112 +#define R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12_NC 113 +#define R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12 114 +#define R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12_NC 115 +#define R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12 116 +#define R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12_NC 117 +#define R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12 118 +#define R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12_NC 119 +#define R_AARCH64_P32_TLSLE_LDST128_TPREL_LO12 120 +#define R_AARCH64_P32_TLSLE_LDST128_TPREL_LO12_NC 121 +#define R_AARCH64_P32_TLSDESC_LD_PREL19 122 +#define R_AARCH64_P32_TLSDESC_ADR_PREL21 123 +#define R_AARCH64_P32_TLSDESC_ADR_PAGE21 124 +#define R_AARCH64_P32_TLSDESC_LD32_LO12 125 +#define R_AARCH64_P32_TLSDESC_ADD_LO12 126 +#define R_AARCH64_P32_TLSDESC_CALL 127 + /* Unused: 128-179. */ +#define R_AARCH64_P32_COPY 180 +#define R_AARCH64_P32_GLOB_DAT 181 +#define R_AARCH64_P32_JUMP_SLOT 182 +#define R_AARCH64_P32_RELATIVE 183 +#define R_AARCH64_P32_TLS_IMPDEF1 184 /* R_AARCH64_P32_TLS_DTPREL or R_AARCH64_P32_TLS_DTPMOD. */ +#define R_AARCH64_P32_TLS_IMPDEF2 185 /* R_AARCH64_P32_TLS_DTPMOD or R_AARCH64_P32_TLS_DTPREL. */ +#define R_AARCH64_P32_TLS_TPREL 186 +#define R_AARCH64_P32_TLSDESC 187 +#define R_AARCH64_P32_IRELATIVE 188 + /* Unused: 189-256. */ +#define R_AARCH64_ABS64 257 +#define R_AARCH64_ABS32 258 +#define R_AARCH64_ABS16 259 +#define R_AARCH64_PREL64 260 +#define R_AARCH64_PREL32 261 +#define R_AARCH64_PREL16 262 +#define R_AARCH64_MOVW_UABS_G0 263 +#define R_AARCH64_MOVW_UABS_G0_NC 264 +#define R_AARCH64_MOVW_UABS_G1 265 +#define R_AARCH64_MOVW_UABS_G1_NC 266 +#define R_AARCH64_MOVW_UABS_G2 267 +#define R_AARCH64_MOVW_UABS_G2_NC 268 +#define R_AARCH64_MOVW_UABS_G3 269 +#define R_AARCH64_MOVW_SABS_G0 270 +#define R_AARCH64_MOVW_SABS_G1 271 +#define R_AARCH64_MOVW_SABS_G2 272 +#define R_AARCH64_LD_PREL_LO19 273 +#define R_AARCH64_ADR_PREL_LO21 274 +#define R_AARCH64_ADR_PREL_PG_HI21 275 +#define R_AARCH64_ADR_PREL_PG_HI21_NC 276 +#define R_AARCH64_ADD_ABS_LO12_NC 277 +#define R_AARCH64_LDST8_ABS_LO12_NC 278 +#define R_AARCH64_TSTBR14 279 +#define R_AARCH64_CONDBR19 280 + /* unused: 281 */ +#define R_AARCH64_JUMP26 282 +#define R_AARCH64_CALL26 283 +#define R_AARCH64_LDST16_ABS_LO12_NC 284 +#define R_AARCH64_LDST32_ABS_LO12_NC 285 +#define R_AARCH64_LDST64_ABS_LO12_NC 286 +#define R_AARCH64_MOVW_PREL_G0 287 +#define R_AARCH64_MOVW_PREL_G0_NC 288 +#define R_AARCH64_MOVW_PREL_G1 289 +#define R_AARCH64_MOVW_PREL_G1_NC 290 +#define R_AARCH64_MOVW_PREL_G2 291 +#define R_AARCH64_MOVW_PREL_G2_NC 292 +#define R_AARCH64_MOVW_PREL_G3 293 + /* unused: 294-298 */ +#define R_AARCH64_LDST128_ABS_LO12_NC 299 +#define R_AARCH64_MOVW_GOTOFF_G0 300 +#define R_AARCH64_MOVW_GOTOFF_G0_NC 301 +#define R_AARCH64_MOVW_GOTOFF_G1 302 +#define R_AARCH64_MOVW_GOTOFF_G1_NC 303 +#define R_AARCH64_MOVW_GOTOFF_G2 304 +#define R_AARCH64_MOVW_GOTOFF_G2_NC 305 +#define R_AARCH64_MOVW_GOTOFF_G3 306 +#define R_AARCH64_GOTREL64 307 +#define R_AARCH64_GOTREL32 308 +#define R_AARCH64_GOT_LD_PREL19 309 +#define R_AARCH64_LD64_GOTOFF_LO15 310 +#define R_AARCH64_ADR_GOT_PAGE 311 +#define R_AARCH64_LD64_GOT_LO12_NC 312 +#define R_AARCH64_LD64_GOTPAGE_LO15 313 +#define R_AARCH64_PLT32 314 +#define R_AARCH64_GOTPCREL32 315 + /* unused: 316-511 */ +#define R_AARCH64_TLSGD_ADR_PREL21 512 +#define R_AARCH64_TLSGD_ADR_PAGE21 513 +#define R_AARCH64_TLSGD_ADD_LO12_NC 514 +#define R_AARCH64_TLSGD_MOVW_G1 515 +#define R_AARCH64_TLSGD_MOVW_G0_NC 516 +#define R_AARCH64_TLSLD_ADR_PREL21 517 +#define R_AARCH64_TLSLD_ADR_PAGE21 518 +#define R_AARCH64_TLSLD_ADD_LO12_NC 519 +#define R_AARCH64_TLSLD_MOVW_G1 520 +#define R_AARCH64_TLSLD_MOVW_G0_NC 521 +#define R_AARCH64_TLSLD_LD_PREL19 522 +#define R_AARCH64_TLSLD_MOVW_DTPREL_G2 523 +#define R_AARCH64_TLSLD_MOVW_DTPREL_G1 524 +#define R_AARCH64_TLSLD_MOVW_DTPREL_G1_NC 525 +#define R_AARCH64_TLSLD_MOVW_DTPREL_G0 526 +#define R_AARCH64_TLSLD_MOVW_DTPREL_G0_NC 527 +#define R_AARCH64_TLSLD_ADD_DTPREL_HI12 528 +#define R_AARCH64_TLSLD_ADD_DTPREL_LO12 529 +#define R_AARCH64_TLSLD_ADD_DTPREL_LO12_NC 530 +#define R_AARCH64_TLSLD_LDST8_DTPREL_LO12 531 +#define R_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC 532 +#define R_AARCH64_TLSLD_LDST16_DTPREL_LO12 533 +#define R_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC 534 +#define R_AARCH64_TLSLD_LDST32_DTPREL_LO12 535 +#define R_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC 536 +#define R_AARCH64_TLSLD_LDST64_DTPREL_LO12 537 +#define R_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC 538 +#define R_AARCH64_TLSIE_MOVW_GOTTPREL_G1 539 +#define R_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC 540 +#define R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21 541 +#define R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC 542 +#define R_AARCH64_TLSIE_LD_GOTTPREL_PREL19 543 +#define R_AARCH64_TLSLE_MOVW_TPREL_G2 544 +#define R_AARCH64_TLSLE_MOVW_TPREL_G1 545 +#define R_AARCH64_TLSLE_MOVW_TPREL_G1_NC 546 +#define R_AARCH64_TLSLE_MOVW_TPREL_G0 547 +#define R_AARCH64_TLSLE_MOVW_TPREL_G0_NC 548 +#define R_AARCH64_TLSLE_ADD_TPREL_HI12 549 +#define R_AARCH64_TLSLE_ADD_TPREL_LO12 550 +#define R_AARCH64_TLSLE_ADD_TPREL_LO12_NC 551 +#define R_AARCH64_TLSLE_LDST8_TPREL_LO12 552 +#define R_AARCH64_TLSLE_LDST8_TPREL_LO12_NC 553 +#define R_AARCH64_TLSLE_LDST16_TPREL_LO12 554 +#define R_AARCH64_TLSLE_LDST16_TPREL_LO12_NC 555 +#define R_AARCH64_TLSLE_LDST32_TPREL_LO12 556 +#define R_AARCH64_TLSLE_LDST32_TPREL_LO12_NC 557 +#define R_AARCH64_TLSLE_LDST64_TPREL_LO12 558 +#define R_AARCH64_TLSLE_LDST64_TPREL_LO12_NC 559 +#define R_AARCH64_TLSDESC_LD_PREL19 560 +#define R_AARCH64_TLSDESC_ADR_PREL21 561 +#define R_AARCH64_TLSDESC_ADR_PAGE21 562 +#define R_AARCH64_TLSDESC_LD64_LO12 563 +#define R_AARCH64_TLSDESC_ADD_LO12 564 +#define R_AARCH64_TLSDESC_OFF_G1 565 +#define R_AARCH64_TLSDESC_OFF_G0_NC 566 +#define R_AARCH64_TLSDESC_LDR 567 +#define R_AARCH64_TLSDESC_ADD 568 +#define R_AARCH64_TLSDESC_CALL 569 +#define R_AARCH64_TLSLE_LDST128_TPREL_LO12 570 +#define R_AARCH64_TLSLE_LDST128_TPREL_LO12_NC 571 +#define R_AARCH64_TLSLD_LDST128_DTPREL_LO12 572 +#define R_AARCH64_TLSLD_LDST128_DTPREL_LO12_NC 573 + /* unused: 574-579 */ +#define R_AARCH64_AUTH_ABS64 580 +#define R_AARCH64_AUTH_MOVW_GOTOFF_G0 581 +#define R_AARCH64_AUTH_MOVW_GOTOFF_G0_NC 582 +#define R_AARCH64_AUTH_MOVW_GOTOFF_G1 583 +#define R_AARCH64_AUTH_MOVW_GOTOFF_G1_NC 584 +#define R_AARCH64_AUTH_MOVW_GOTOFF_G2 585 +#define R_AARCH64_AUTH_MOVW_GOTOFF_G2_NC 586 +#define R_AARCH64_AUTH_MOVW_GOTOFF_G3 587 +#define R_AARCH64_AUTH_GOT_LD_PREL19 588 +#define R_AARCH64_AUTH_LD64_GOTOFF_LO15 589 +#define R_AARCH64_AUTH_ADR_GOT_PAGE 590 +#define R_AARCH64_AUTH_LD64_GOT_LO12_NC 591 +#define R_AARCH64_AUTH_LD64_GOTPAGE_LO15 592 +#define R_AARCH64_AUTH_GOT_ADD_LO12_NC 593 +#define R_AARCH64_AUTH_GOT_ADR_PREL_LO21 594 +#define R_AARCH64_AUTH_TLSDESC_ADR_PAGE21 595 +#define R_AARCH64_AUTH_TLSDESC_LD64_LO12 596 +#define R_AARCH64_AUTH_TLSDESC_ADD_LO12 597 + /* unused: 598-1023 */ +#define R_AARCH64_COPY 1024 +#define R_AARCH64_GLOB_DAT 1025 +#define R_AARCH64_JUMP_SLOT 1026 +#define R_AARCH64_RELATIVE 1027 +#define R_AARCH64_TLS_IMPDEF1 1028 /* R_AARCH64_TLS_DTPREL or R_AARCH64_TLS_DTPMOD. */ +#define R_AARCH64_TLS_IMPDEF2 1029 /* R_AARCH64_TLS_DTPMOD or R_AARCH64_TLS_DTPREL. */ +#define R_AARCH64_TLS_TPREL 1030 +#define R_AARCH64_TLSDESC 1031 +#define R_AARCH64_IRELATIVE 1032 + /* unused: 1033-1040 */ +#define R_AARCH64_AUTH_RELATIVE 1041 +#define R_AARCH64_AUTH_GLOB_DAT 1042 +#define R_AARCH64_AUTH_TLSDESC 1043 +#define R_AARCH64_AUTH_IRELATIVE 1044 + + +/* EM_ARM */ +#define R_ARM_NONE 0 +#define R_ARM_PC24 1 /* Deprecated. */ +#define R_ARM_ABS32 2 +#define R_ARM_REL32 3 +#define R_ARM_LDR_PC_G0 4 +#define R_ARM_ABS16 5 +#define R_ARM_ABS12 6 +#define R_ARM_THM_ABS5 7 +#define R_ARM_ABS8 8 +#define R_ARM_SBREL32 9 +#define R_ARM_THM_CALL 10 +#define R_ARM_THM_PC8 11 +#define R_ARM_BREL_ADJ 12 +#define R_ARM_TLS_DESC 13 +#define R_ARM_THM_SWI8 14 /* Obsolete. */ +#define R_ARM_XPC25 15 /* Obsolete. */ +#define R_ARM_THM_XPC22 16 /* Obsolete. */ +#define R_ARM_TLS_DTPMOD32 17 +#define R_ARM_TLS_DTPOFF32 18 +#define R_ARM_TLS_TPOFF32 19 +#define R_ARM_COPY 20 +#define R_ARM_GLOB_DAT 21 +#define R_ARM_JUMP_SLOT 22 +#define R_ARM_RELATIVE 23 +#define R_ARM_GOTOFF32 24 +#define R_ARM_BASE_PREL 25 +#define R_ARM_GOT_BREL 26 +#define R_ARM_PLT32 27 /* Deprecated. */ +#define R_ARM_CALL 28 +#define R_ARM_JUMP24 29 +#define R_ARM_THM_JUMP24 30 +#define R_ARM_BASE_ABS 31 +#define R_ARM_ALU_PCREL_7_0 32 /* Obsolete. */ +#define R_ARM_ALU_PCREL_15_8 33 /* Obsolete. */ +#define R_ARM_ALU_PCREL_23_15 34 /* Obsolete. */ +#define R_ARM_LDR_SBREL_11_0_NC 35 /* Deprecated. */ +#define R_ARM_ALU_SBREL_19_12_NC 36 /* Deprecated. */ +#define R_ARM_ALU_SBREL_27_20_CK 37 /* Deprecated. */ +#define R_ARM_TARGET1 38 +#define R_ARM_SBREL31 39 /* Deprecated. */ +#define R_ARM_V4BX 40 +#define R_ARM_TARGET2 41 +#define R_ARM_PREL31 42 +#define R_ARM_MOVW_ABS_NC 43 +#define R_ARM_MOVT_ABS 44 +#define R_ARM_MOVW_PREL_NC 45 +#define R_ARM_MOVT_PREL 46 +#define R_ARM_THM_MOVW_ABS_NC 47 +#define R_ARM_THM_MOVT_ABS 48 +#define R_ARM_THM_MOVW_PREL_NC 49 +#define R_ARM_THM_MOVT_PREL 50 +#define R_ARM_THM_JUMP19 51 +#define R_ARM_THM_JUMP6 52 +#define R_ARM_THM_ALU_PREL_11_0 53 +#define R_ARM_THM_PC12 54 +#define R_ARM_ABS32_NOI 55 +#define R_ARM_REL32_NOI 56 +#define R_ARM_ALU_PC_G0_NC 57 +#define R_ARM_ALU_PC_G0 58 +#define R_ARM_ALU_PC_G1_NC 59 +#define R_ARM_ALU_PC_G1 60 +#define R_ARM_ALU_PC_G2 61 +#define R_ARM_LDR_PC_G1 62 +#define R_ARM_LDR_PC_G2 63 +#define R_ARM_LDRS_PC_G0 64 +#define R_ARM_LDRS_PC_G1 65 +#define R_ARM_LDRS_PC_G2 66 +#define R_ARM_LDC_PC_G0 67 +#define R_ARM_LDC_PC_G1 68 +#define R_ARM_LDC_PC_G2 69 +#define R_ARM_ALU_SB_G0_NC 70 +#define R_ARM_ALU_SB_G0 71 +#define R_ARM_ALU_SB_G1_NC 72 +#define R_ARM_ALU_SB_G1 73 +#define R_ARM_ALU_SB_G2 74 +#define R_ARM_LDR_SB_G0 75 +#define R_ARM_LDR_SB_G1 76 +#define R_ARM_LDR_SB_G2 77 +#define R_ARM_LDRS_SB_G0 78 +#define R_ARM_LDRS_SB_G1 79 +#define R_ARM_LDRS_SB_G2 80 +#define R_ARM_LDC_SB_G0 81 +#define R_ARM_LDC_SB_G1 82 +#define R_ARM_LDC_SB_G2 83 +#define R_ARM_MOVW_BREL_NC 84 +#define R_ARM_MOVT_BREL 85 +#define R_ARM_MOVW_BREL 86 +#define R_ARM_THM_MOVW_BREL_NC 87 +#define R_ARM_THM_MOVT_BREL 88 +#define R_ARM_THM_MOVW_BREL 89 +#define R_ARM_TLS_GOTDESC 90 +#define R_ARM_TLS_CALL 91 +#define R_ARM_TLS_DESCSEQ 92 +#define R_ARM_THM_TLS_CALL 93 +#define R_ARM_PLT32_ABS 94 +#define R_ARM_GOT_ABS 95 +#define R_ARM_GOT_PREL 96 +#define R_ARM_GOT_BREL12 97 +#define R_ARM_GOTOFF12 98 +#define R_ARM_GOTRELAX 99 +#define R_ARM_GNU_VTENTRY 100 /* Deprecated. */ +#define R_ARM_GNU_VTINHERIT 101 /* Deprecated. */ +#define R_ARM_THM_JUMP11 102 +#define R_ARM_THM_JUMP8 103 +#define R_ARM_TLS_GD32 104 +#define R_ARM_TLS_LDM32 105 +#define R_ARM_TLS_LDO32 106 +#define R_ARM_TLS_IE32 107 +#define R_ARM_TLS_LE32 108 +#define R_ARM_TLS_LDO12 109 +#define R_ARM_TLS_LE12 110 +#define R_ARM_TLS_IE12GP 111 +#define R_ARM_PRIVATE_0 112 +#define R_ARM_PRIVATE_1 113 +#define R_ARM_PRIVATE_2 114 +#define R_ARM_PRIVATE_3 115 +#define R_ARM_PRIVATE_4 116 +#define R_ARM_PRIVATE_5 117 +#define R_ARM_PRIVATE_6 118 +#define R_ARM_PRIVATE_7 119 +#define R_ARM_PRIVATE_8 120 +#define R_ARM_PRIVATE_9 121 +#define R_ARM_PRIVATE_10 122 +#define R_ARM_PRIVATE_11 123 +#define R_ARM_PRIVATE_12 124 +#define R_ARM_PRIVATE_13 125 +#define R_ARM_PRIVATE_14 126 +#define R_ARM_PRIVATE_15 127 +#define R_ARM_ME_TOO 128 /* Obsolete. */ +#define R_ARM_THM_TLS_DESCSEQ16 129 +#define R_ARM_THM_TLS_DESCSEQ32 130 +#define R_ARM_THM_GOT_BREL12 131 +#define R_ARM_THM_ALU_ABS_G0_NC 132 +#define R_ARM_THM_ALU_ABS_G1_NC 133 +#define R_ARM_THM_ALU_ABS_G2_NC 134 +#define R_ARM_THM_ALU_ABS_G3 135 +#define R_ARM_THM_BF16 136 +#define R_ARM_THM_BF12 137 +#define R_ARM_THM_BF18 138 + /* Reserved: 139-159. */ +#define R_ARM_IRELATIVE 160 +#define R_ARM_PRIVATE_16 161 +#define R_ARM_PRIVATE_17 162 +#define R_ARM_PRIVATE_18 163 +#define R_ARM_PRIVATE_19 164 +#define R_ARM_PRIVATE_20 165 +#define R_ARM_PRIVATE_21 166 +#define R_ARM_PRIVATE_22 167 +#define R_ARM_PRIVATE_23 168 +#define R_ARM_PRIVATE_24 169 +#define R_ARM_PRIVATE_25 170 +#define R_ARM_PRIVATE_26 171 +#define R_ARM_PRIVATE_27 172 +#define R_ARM_PRIVATE_28 173 +#define R_ARM_PRIVATE_29 174 +#define R_ARM_PRIVATE_30 175 +#define R_ARM_PRIVATE_31 176 + /* Reserved: 177-255. */ + + +/* EM_IA_64 */ +#define R_IA_64_NONE 0 + /* unused: 0x1-0x20 */ +#define R_IA_64_IMM14 0x21 +#define R_IA_64_IMM22 0x22 +#define R_IA_64_IMM64 0x23 +#define R_IA_64_DIR32MSB 0x24 +#define R_IA_64_DIR32LSB 0x25 +#define R_IA_64_DIR64MSB 0x26 +#define R_IA_64_DIR64LSB 0x27 + /* unused: 0x28-0x29 */ +#define R_IA_64_GPREL22 0x2a +#define R_IA_64_GPREL64I 0x2b +#define R_IA_64_GPREL32MSB 0x2c +#define R_IA_64_GPREL32LSB 0x2d +#define R_IA_64_GPREL64MSB 0x2e +#define R_IA_64_GPREL64LSB 0x2f + /* unused: 0x30-0x31 */ +#define R_IA_64_LTOFF22 0x32 +#define R_IA_64_LTOFF64I 0x33 + /* unused: 0x34-0x39 */ +#define R_IA_64_PLTOFF22 0x3a +#define R_IA_64_PLTOFF64I 0x3b + /* unused: 0x3c-0x3d */ +#define R_IA_64_PLTOFF64MSB 0x3e +#define R_IA_64_PLTOFF64LSB 0x3f + /* unused: 0x40-0x42 */ +#define R_IA_64_FPTR64I 0x43 +#define R_IA_64_FPTR32MSB 0x44 +#define R_IA_64_FPTR32LSB 0x45 +#define R_IA_64_FPTR64MSB 0x46 +#define R_IA_64_FPTR64LSB 0x47 +#define R_IA_64_PCREL60B 0x48 +#define R_IA_64_PCREL21B 0x49 +#define R_IA_64_PCREL21M 0x4a +#define R_IA_64_PCREL21F 0x4b +#define R_IA_64_PCREL32MSB 0x4c +#define R_IA_64_PCREL32LSB 0x4d +#define R_IA_64_PCREL64MSB 0x4e +#define R_IA_64_PCREL64LSB 0x4f + /* unused: 0x50-0x51 */ +#define R_IA_64_LTOFF_FPTR22 0x52 +#define R_IA_64_LTOFF_FPTR64I 0x53 +#define R_IA_64_LTOFF_FPTR32MSB 0x54 +#define R_IA_64_LTOFF_FPTR32LSB 0x55 +#define R_IA_64_LTOFF_FPTR64MSB 0x56 +#define R_IA_64_LTOFF_FPTR64LSB 0x57 + /* unused: 0x58-0x5b */ +#define R_IA_64_SEGREL32MSB 0x5c +#define R_IA_64_SEGREL32LSB 0x5d +#define R_IA_64_SEGREL64MSB 0x5e +#define R_IA_64_SEGREL64LSB 0x5f + /* unused: 0x60-0x63 */ +#define R_IA_64_SECREL32MSB 0x64 +#define R_IA_64_SECREL32LSB 0x65 +#define R_IA_64_SECREL64MSB 0x66 +#define R_IA_64_SECREL64LSB 0x67 + /* unused: 0x68-0x6b */ +#define R_IA_64_REL32MSB 0x6c +#define R_IA_64_REL32LSB 0x6d +#define R_IA_64_REL64MSB 0x6e +#define R_IA_64_REL64LSB 0x6f + /* unused: 0x70-0x73 */ +#define R_IA_64_LTV32MSB 0x74 +#define R_IA_64_LTV32LSB 0x75 +#define R_IA_64_LTV64MSB 0x76 +#define R_IA_64_LTV64LSB 0x77 + /* unused: 0x78 */ +#define R_IA_64_PCREL21BI 0x79 +#define R_IA_64_PCREL22 0x7A +#define R_IA_64_PCREL64I 0x7B + /* unused: 0x7C-0x7F */ +#define R_IA_64_IPLTMSB 0x80 +#define R_IA_64_IPLTLSB 0x81 + /* unused: 0x82-0x84 */ +#define R_IA_64_SUB 0x85 +#define R_IA_64_LTOFF22X 0x86 +#define R_IA_64_LDXMOV 0x87 + /* unused: 0x88-0x90 */ +#define R_IA_64_TPREL14 0x91 +#define R_IA_64_TPREL22 0x92 +#define R_IA_64_TPREL64I 0x93 + /* unused: 0x94-0x95 */ +#define R_IA_64_TPREL64MSB 0x96 +#define R_IA_64_TPREL64LSB 0x97 + /* unused: 0x98-0x99 */ +#define R_IA_64_LTOFF_TPREL22 0x9A + /* unused: 0x9B-0xA5 */ +#define R_IA_64_DTPMOD64MSB 0xA6 +#define R_IA_64_DTPMOD64LSB 0xA7 + /* unused: 0xA8-0xA9 */ +#define R_IA_64_LTOFF_DTPMOD22 0xAA + /* unused: 0xAB-0xB0 */ +#define R_IA_64_DTPREL14 0xB1 +#define R_IA_64_DTPREL22 0xB2 +#define R_IA_64_DTPREL64I 0xB3 +#define R_IA_64_DTPREL32MSB 0xB4 +#define R_IA_64_DTPREL32LSB 0xB5 +#define R_IA_64_DTPREL64MSB 0xB6 +#define R_IA_64_DTPREL64LSB 0xB7 + /* unused: 0xB8-0xB9 */ +#define R_IA_64_LTOFF_DTPREL22 0xBA + + +/* EM_LOONGARCH */ +#define R_LARCH_NONE 0 +#define R_LARCH_32 1 +#define R_LARCH_64 2 +#define R_LARCH_RELATIVE 3 +#define R_LARCH_COPY 4 +#define R_LARCH_JUMP_SLOT 5 +#define R_LARCH_TLS_DTPMOD32 6 +#define R_LARCH_TLS_DTPMOD64 7 +#define R_LARCH_TLS_DTPREL32 8 +#define R_LARCH_TLS_DTPREL64 9 +#define R_LARCH_TLS_TPREL32 10 +#define R_LARCH_TLS_TPREL64 11 +#define R_LARCH_IRELATIVE 12 +#define R_LARCH_TLS_DESC32 13 +#define R_LARCH_TLS_DESC64 14 + /* reserved for the dynamic linker: 15-19 */ +#define R_LARCH_MARK_LA 20 +#define R_LARCH_MARK_PCREL 21 +#define R_LARCH_SOP_PUSH_PCREL 22 +#define R_LARCH_SOP_PUSH_ABSOLUTE 23 +#define R_LARCH_SOP_PUSH_DUP 24 +#define R_LARCH_SOP_PUSH_GPREL 25 +#define R_LARCH_SOP_PUSH_TLS_TPREL 26 +#define R_LARCH_SOP_PUSH_TLS_GOT 27 +#define R_LARCH_SOP_PUSH_TLS_GD 28 +#define R_LARCH_SOP_PUSH_PLT_PCREL 29 +#define R_LARCH_SOP_ASSERT 30 +#define R_LARCH_SOP_NOT 31 +#define R_LARCH_SOP_SUB 32 +#define R_LARCH_SOP_SL 33 +#define R_LARCH_SOP_SR 34 +#define R_LARCH_SOP_ADD 35 +#define R_LARCH_SOP_AND 36 +#define R_LARCH_SOP_IF_ELSE 37 +#define R_LARCH_SOP_POP_32_S_10_5 38 +#define R_LARCH_SOP_POP_32_U_10_12 39 +#define R_LARCH_SOP_POP_32_S_10_12 40 +#define R_LARCH_SOP_POP_32_S_10_16 41 +#define R_LARCH_SOP_POP_32_S_10_16_S2 42 +#define R_LARCH_SOP_POP_32_S_5_20 43 +#define R_LARCH_SOP_POP_32_S_0_5_10_16_S2 44 +#define R_LARCH_SOP_POP_32_S_0_10_10_16_S2 45 +#define R_LARCH_SOP_POP_32_U 46 +#define R_LARCH_ADD8 47 +#define R_LARCH_ADD16 48 +#define R_LARCH_ADD24 49 +#define R_LARCH_ADD32 50 +#define R_LARCH_ADD64 51 +#define R_LARCH_SUB8 52 +#define R_LARCH_SUB16 53 +#define R_LARCH_SUB24 54 +#define R_LARCH_SUB32 55 +#define R_LARCH_SUB64 56 +#define R_LARCH_GNU_VTINHERIT 57 +#define R_LARCH_GNU_VTENTRY 58 + /* reserved: 59-63 */ +#define R_LARCH_B16 64 +#define R_LARCH_B21 65 +#define R_LARCH_B26 66 +#define R_LARCH_ABS_HI20 67 +#define R_LARCH_ABS_LO12 68 +#define R_LARCH_ABS64_LO20 69 +#define R_LARCH_ABS64_HI12 70 +#define R_LARCH_PCALA_HI20 71 +#define R_LARCH_PCALA_LO12 72 +#define R_LARCH_PCALA64_LO20 73 +#define R_LARCH_PCALA64_HI12 74 +#define R_LARCH_GOT_PC_HI20 75 +#define R_LARCH_GOT_PC_LO12 76 +#define R_LARCH_GOT64_PC_LO20 77 +#define R_LARCH_GOT64_PC_HI12 78 +#define R_LARCH_GOT_HI20 79 +#define R_LARCH_GOT_LO12 80 +#define R_LARCH_GOT64_LO20 81 +#define R_LARCH_GOT64_HI12 82 +#define R_LARCH_TLS_LE_HI20 83 +#define R_LARCH_TLS_LE_LO12 84 +#define R_LARCH_TLS_LE64_LO20 85 +#define R_LARCH_TLS_LE64_HI12 86 +#define R_LARCH_TLS_IE_PC_HI20 87 +#define R_LARCH_TLS_IE_PC_LO12 88 +#define R_LARCH_TLS_IE64_PC_LO20 89 +#define R_LARCH_TLS_IE64_PC_HI12 90 +#define R_LARCH_TLS_IE_HI20 91 +#define R_LARCH_TLS_IE_LO12 92 +#define R_LARCH_TLS_IE64_LO20 93 +#define R_LARCH_TLS_IE64_HI12 94 +#define R_LARCH_TLS_LD_PC_HI20 95 +#define R_LARCH_TLS_LD_HI20 96 +#define R_LARCH_TLS_GD_PC_HI20 97 +#define R_LARCH_TLS_GD_HI20 98 +#define R_LARCH_32_PCREL 99 +#define R_LARCH_RELAX 100 + /* reserved: 101 */ +#define R_LARCH_ALIGN 102 +#define R_LARCH_PCREL20_S2 103 + /* reserved: 104 */ +#define R_LARCH_ADD6 105 +#define R_LARCH_SUB6 106 +#define R_LARCH_ADD_ULEB128 107 +#define R_LARCH_SUB_ULEB128 108 +#define R_LARCH_64_PCREL 109 +#define R_LARCH_CALL36 110 +#define R_LARCH_TLS_DESC_PC_HI20 111 +#define R_LARCH_TLS_DESC_PC_LO12 112 +#define R_LARCH_TLS_DESC64_PC_LO20 113 +#define R_LARCH_TLS_DESC64_PC_HI12 114 +#define R_LARCH_TLS_DESC_HI20 115 +#define R_LARCH_TLS_DESC_LO12 116 +#define R_LARCH_TLS_DESC64_LO20 117 +#define R_LARCH_TLS_DESC64_HI12 118 +#define R_LARCH_TLS_DESC_LD 119 +#define R_LARCH_TLS_DESC_CALL 120 +#define R_LARCH_TLS_LE_HI20_R 121 +#define R_LARCH_TLS_LE_ADD_R 122 +#define R_LARCH_TLS_LE_LO12_R 123 +#define R_LARCH_TLS_LD_PCREL20_S2 124 +#define R_LARCH_TLS_GD_PCREL20_S2 125 +#define R_LARCH_TLS_DESC_PCREL20_S2 126 + + +/* EM_MIPS */ +#define R_MIPS_NONE 0 /* GNU binutils, LLVM, MIPS psABI. */ +#define R_MIPS_16 1 /* GNU binutils, LLVM, MIPS psABI. */ +#define R_MIPS_32 2 /* GNU binutils, LLVM, MIPS psABI. */ +#define R_MIPS_REL32 3 /* GNU binutils, LLVM, MIPS psABI. */ +#define R_MIPS_26 4 /* GNU binutils, LLVM, MIPS psABI. */ +#define R_MIPS_HI16 5 /* GNU binutils, LLVM, MIPS psABI. */ +#define R_MIPS_LO16 6 /* GNU binutils, LLVM, MIPS psABI. */ +#define R_MIPS_GPREL16 7 /* GNU binutils, LLVM, MIPS psABI. */ +#define R_MIPS_LITERAL 8 /* GNU binutils, LLVM, MIPS psABI. */ +#define R_MIPS_GOT16 9 /* GNU binutils, LLVM, MIPS psABI. */ +#define R_MIPS_PC16 10 /* GNU binutils, LLVM, MIPS psABI. */ +#define R_MIPS_CALL16 11 /* GNU binutils, LLVM, MIPS psABI. */ +#define R_MIPS_GPREL32 12 /* GNU binutils, LLVM, MIPS psABI. */ + /* Unused: 13-15. */ +#define R_MIPS_SHIFT5 16 /* GNU binutils, LLVM. */ +#define R_MIPS_SHIFT6 17 /* GNU binutils, LLVM. */ +#define R_MIPS_64 18 /* GNU binutils, LLVM */ +#define R_MIPS_GOT_DISP 19 /* GNU binutils, LLVM. */ +#define R_MIPS_GOT_PAGE 20 /* GNU binutils, LLVM. */ +#define R_MIPS_GOTHI16 21 /* MIPS psABI. */ +#define R_MIPS_GOTLO16 22 /* MIPS psABI. */ +#define R_MIPS_GOT_LO16 23 /* GNU binutils, LLVM. */ +#define R_MIPS_SUB 24 /* GNU binutils, LLVM. */ +#define R_MIPS_INSERT_A 25 /* GNU binutils, LLVM. */ +#define R_MIPS_INSERT_B 26 /* GNU binutils, LLVM. */ +#define R_MIPS_DELETE 27 /* GNU binutils, LLVM. */ +#define R_MIPS_HIGHER 28 /* GNU binutils, LLVM. */ +#define R_MIPS_HIGHEST 29 /* GNU binutils, LLVM. */ +#define R_MIPS_CALLHI16 30 /* GNU binutils, LLVM, MIPS psABI. */ +#define R_MIPS_CALLLO16 31 /* GNU binutils, LLVM, MIPS psABI. */ +#define R_MIPS_SCN_DISP 32 /* GNU binutils, LLVM. */ +#define R_MIPS_REL16 33 /* GNU binutils, LLVM. */ +#define R_MIPS_ADD_IMMEDIATE 34 /* GNU binutils, LLVM. */ +#define R_MIPS_PJUMP 35 /* GNU binutils, LLVM. */ +#define R_MIPS_RELGOT 36 /* GNU binutils, LLVM. */ +#define R_MIPS_JALR 37 /* GNU binutils, LLVM. */ +#define R_MIPS_TLS_DTPMOD32 38 /* GNU binutils, LLVM. */ +#define R_MIPS_TLS_DTPREL32 39 /* GNU binutils, LLVM. */ +#define R_MIPS_TLS_DTPMOD64 40 /* GNU binutils, LLVM. */ +#define R_MIPS_TLS_DTPREL64 41 /* GNU binutils, LLVM. */ +#define R_MIPS_TLS_GD 42 /* GNU binutils, LLVM. */ +#define R_MIPS_TLS_LDM 43 /* GNU binutils, LLVM. */ +#define R_MIPS_TLS_DTPREL_HI16 44 /* GNU binutils, LLVM. */ +#define R_MIPS_TLS_DTPREL_LO16 45 /* GNU binutils, LLVM. */ +#define R_MIPS_TLS_GOTTPREL 46 /* GNU binutils, LLVM. */ +#define R_MIPS_TLS_TPREL32 47 /* GNU binutils, LLVM. */ +#define R_MIPS_TLS_TPREL64 48 /* GNU binutils, LLVM. */ +#define R_MIPS_TLS_TPREL_HI16 49 /* GNU binutils, LLVM. */ +#define R_MIPS_TLS_TPREL_LO16 50 /* GNU binutils, LLVM. */ +#define R_MIPS_GLOB_DAT 51 /* GNU binutils, LLVM. */ + /* Unused: 52-59. */ +#define R_MIPS_PC21_S2 60 /* GNU binutils, LLVM. */ +#define R_MIPS_PC26_S2 61 /* GNU binutils, LLVM. */ +#define R_MIPS_PC18_S3 62 /* GNU binutils, LLVM. */ +#define R_MIPS_PC19_S2 63 /* GNU binutils, LLVM. */ +#define R_MIPS_PCHI16 64 /* GNU binutils, LLVM. */ +#define R_MIPS_PCLO16 65 /* GNU binutils, LLVM. */ + /* Unused: 66-99. */ +#define R_MIPS16_26 100 /* GNU binutils, LLVM. */ +#define R_MIPS16_GPREL 101 /* GNU binutils, LLVM. */ +#define R_MIPS16_GOT16 102 /* GNU binutils, LLVM. */ +#define R_MIPS16_CALL16 103 /* GNU binutils, LLVM. */ +#define R_MIPS16_HI16 104 /* GNU binutils, LLVM. */ +#define R_MIPS16_LO16 105 /* GNU binutils, LLVM. */ +#define R_MIPS16_TLS_GD 106 /* GNU binutils, LLVM. */ +#define R_MIPS16_TLS_LDM 107 /* GNU binutils, LLVM. */ +#define R_MIPS16_TLS_DTPREL_HI16 108 /* GNU binutils, LLVM. */ +#define R_MIPS16_TLS_DTPREL_LO16 109 /* GNU binutils, LLVM. */ +#define R_MIPS16_TLS_GOTTPREL 110 /* GNU binutils, LLVM. */ +#define R_MIPS16_TLS_TPREL_HI16 111 /* GNU binutils, LLVM. */ +#define R_MIPS16_TLS_TPREL_LO16 112 /* GNU binutils, LLVM. */ + /* Unused: 113-125. */ +#define R_MIPS_COPY 126 /* GNU binutils, LLVM. */ +#define R_MIPS_JUMP_SLOT 127 /* GNU binutils, LLVM. */ + /* Unused: 128-132. */ +#define R_MICROMIPS_26_S1 133 /* GNU binutils, LLVM. */ +#define R_MICROMIPS_HI16 134 /* GNU binutils, LLVM. */ +#define R_MICROMIPS_LO16 135 /* GNU binutils, LLVM. */ +#define R_MICROMIPS_GPREL16 136 /* GNU binutils, LLVM. */ +#define R_MICROMIPS_LITERAL 137 /* GNU binutils, LLVM. */ +#define R_MICROMIPS_GOT16 138 /* GNU binutils, LLVM. */ +#define R_MICROMIPS_PC7_S1 139 /* GNU binutils, LLVM. */ +#define R_MICROMIPS_PC10_S1 140 /* GNU binutils, LLVM. */ +#define R_MICROMIPS_PC16_S1 141 /* GNU binutils, LLVM. */ +#define R_MICROMIPS_CALL16 142 /* GNU binutils, LLVM. */ + /* Unused: 143-144. */ +#define R_MICROMIPS_GOT_DISP 145 /* GNU binutils, LLVM. */ +#define R_MICROMIPS_GOT_PAGE 146 /* GNU binutils, LLVM. */ +#define R_MICROMIPS_GOT_OFST 147 /* GNU binutils, LLVM. */ +#define R_MICROMIPS_GOT_HI16 148 /* GNU binutils, LLVM. */ +#define R_MICROMIPS_GOT_LO16 149 /* GNU binutils, LLVM. */ +#define R_MICROMIPS_SUB 150 /* GNU binutils, LLVM. */ +#define R_MICROMIPS_HIGHER 151 /* GNU binutils, LLVM. */ +#define R_MICROMIPS_HIGHEST 152 /* GNU binutils, LLVM. */ +#define R_MICROMIPS_CALL_HI16 153 /* GNU binutils, LLVM. */ +#define R_MICROMIPS_CALL_LO16 154 /* GNU binutils, LLVM. */ +#define R_MICROMIPS_SCN_DISP 155 /* GNU binutils, LLVM. */ +#define R_MICROMIPS_JALR 156 /* GNU binutils, LLVM. */ +#define R_MICROMIPS_HI0_LO16 157 /* GNU binutils, LLVM. */ + /* Unused: 158-161. */ +#define R_MICROMIPS_TLS_GD 162 /* GNU binutils, LLVM. */ +#define R_MICROMIPS_TLS_LDM 163 /* GNU binutils, LLVM. */ +#define R_MICROMIPS_TLS_DTPREL_HI16 164 /* GNU binutils, LLVM. */ +#define R_MICROMIPS_TLS_DTPREL_LO16 165 /* GNU binutils, LLVM. */ +#define R_MICROMIPS_TLS_GOTTPREL 166 /* GNU binutils, LLVM. */ + /* Unused: 167-168. */ +#define R_MICROMIPS_TLS_TPREL_HI16 169 /* GNU binutils, LLVM. */ +#define R_MICROMIPS_TLS_TPREL_LO16 170 /* GNU binutils, LLVM. */ + /* Unused: 171. */ +#define R_MICROMIPS_GPREL7_S2 172 /* GNU binutils, LLVM. */ +#define R_MICROMIPS_PC23_S2 173 /* GNU binutils, LLVM. */ +#define R_MICROMIPS_PC21_S1 174 /* LLVM. */ +#define R_MICROMIPS_PC26_S1 175 /* LLVM. */ +#define R_MICROMIPS_PC18_S3 176 /* LLVM. */ +#define R_MICROMIPS_PC19_S2 177 /* LLVM. */ + /* Unused: 178-247. */ +#define R_MIPS_PC32 248 /* GNU binutils, LLVM. */ +#define R_MIPS_EH 249 /* GNU binutils, LLVM. */ + /* GNU extensions. */ +#define R_MIPS_GNU_REL16_S2 250 /* GNU binutils. */ +#define R_MIPS_GNU_VTINHERIT 251 /* GNU binutils. */ +#define R_MIPS_GNU_VTENTRY 252 /* GNU binutils. */ + + +/* EM_PPC64 */ +#define R_PPC64_NONE 0 +#define R_PPC64_ADDR32 1 +#define R_PPC64_ADDR24 2 +#define R_PPC64_ADDR16 3 +#define R_PPC64_ADDR16_LO 4 +#define R_PPC64_ADDR16_HI 5 +#define R_PPC64_ADDR16_HA 6 +#define R_PPC64_ADDR14 7 + /* unused: 8-9. */ +#define R_PPC64_REL24 10 +#define R_PPC64_REL14 11 + /* unused: 12-13. */ +#define R_PPC64_GOT16 14 +#define R_PPC64_GOT16_LO 15 +#define R_PPC64_GOT16_HI 16 +#define R_PPC64_GOT16_HA 17 + /* unused: 18. */ +#define R_PPC64_COPY 19 +#define R_PPC64_GLOB_DAT 20 +#define R_PPC64_JMP_SLOT 21 +#define R_PPC64_RELATIVE 22 + /* unused: 23. */ +#define R_PPC64_UADDR32 24 +#define R_PPC64_UADDR16 25 +#define R_PPC64_REL32 26 +#define R_PPC64_PLT32 27 +#define R_PPC64_PLTREL32 28 +#define R_PPC64_PLT16_LO 29 +#define R_PPC64_PLT16_HI 30 +#define R_PPC64_PLT16_HA 31 + /* unused: 32. */ +#define R_PPC64_SECTOFF 33 +#define R_PPC64_SECTOFF_LO 34 +#define R_PPC64_SECTOFF_HI 35 +#define R_PPC64_SECTOFF_HA 36 +#define R_PPC64_REL30 37 +#define R_PPC64_ADDR64 38 +#define R_PPC64_ADDR16_HIGHER 39 +#define R_PPC64_ADDR16_HIGHERA 40 +#define R_PPC64_ADDR16_HIGHEST 41 +#define R_PPC64_ADDR16_HIGHESTA 42 +#define R_PPC64_UADDR64 43 +#define R_PPC64_REL64 44 +#define R_PPC64_PLT64 45 +#define R_PPC64_PLTREL64 46 +#define R_PPC64_TOC16 47 +#define R_PPC64_TOC16_LO 48 +#define R_PPC64_TOC16_HI 49 +#define R_PPC64_TOC16_HA 50 +#define R_PPC64_TOC 51 +#define R_PPC64_PLTGOT16 52 +#define R_PPC64_PLTGOT16_LO 53 +#define R_PPC64_PLTGOT16_HI 54 +#define R_PPC64_PLTGOT16_HA 55 +#define R_PPC64_ADDR16_DS 56 +#define R_PPC64_ADDR16_LO_DS 57 +#define R_PPC64_GOT16_DS 58 +#define R_PPC64_GOT16_LO_DS 59 +#define R_PPC64_PLT16_LO_DS 60 +#define R_PPC64_SECTOFF_DS 61 +#define R_PPC64_SECTOFF_LO_DS 62 +#define R_PPC64_TOC16_DS 63 +#define R_PPC64_TOC16_LO_DS 64 +#define R_PPC64_PLTGOT16_DS 65 +#define R_PPC64_PLTGOT16_LO_DS 66 +#define R_PPC64_TLS 67 +#define R_PPC64_DTPMOD64 68 +#define R_PPC64_TPREL16 69 +#define R_PPC64_TPREL16_LO 70 +#define R_PPC64_TPREL16_HI 71 +#define R_PPC64_TPREL16_HA 72 +#define R_PPC64_TPREL64 73 +#define R_PPC64_DTPREL16 74 +#define R_PPC64_DTPREL16_LO 75 +#define R_PPC64_DTPREL16_HI 76 +#define R_PPC64_DTPREL16_HA 77 +#define R_PPC64_DTPREL64 78 +#define R_PPC64_GOT_TLSGD16 79 +#define R_PPC64_GOT_TLSGD16_LO 80 +#define R_PPC64_GOT_TLSGD16_HI 81 +#define R_PPC64_GOT_TLSGD16_HA 82 +#define R_PPC64_GOT_TLSLD16 83 +#define R_PPC64_GOT_TLSLD16_LO 84 +#define R_PPC64_GOT_TLSLD16_HI 85 +#define R_PPC64_GOT_TLSLD16_HA 86 +#define R_PPC64_GOT_TPREL16_DS 87 +#define R_PPC64_GOT_TPREL16_LO_DS 88 +#define R_PPC64_GOT_TPREL16_HI 89 +#define R_PPC64_GOT_TPREL16_HA 90 +#define R_PPC64_GOT_DTPREL16_DS 91 +#define R_PPC64_GOT_DTPREL16_LO_DS 92 +#define R_PPC64_GOT_DTPREL16_HI 93 +#define R_PPC64_GOT_DTPREL16_HA 94 +#define R_PPC64_TPREL16_DS 95 +#define R_PPC64_TPREL16_LO_DS 96 +#define R_PPC64_TPREL16_HIGHER 97 +#define R_PPC64_TPREL16_HIGHERA 98 +#define R_PPC64_TPREL16_HIGHEST 99 +#define R_PPC64_TPREL16_HIGHESTA 100 +#define R_PPC64_DTPREL16_DS 101 +#define R_PPC64_DTPREL16_LO_DS 102 +#define R_PPC64_DTPREL16_HIGHER 103 +#define R_PPC64_DTPREL16_HIGHERA 104 +#define R_PPC64_DTPREL16_HIGHEST 105 +#define R_PPC64_DTPREL16_HIGHESTA 106 +#define R_PPC64_TLSGD 107 +#define R_PPC64_TLSLD 108 +#define R_PPC64_TOCSAVE 109 +#define R_PPC64_ADDR16_HIGH 110 +#define R_PPC64_ADDR16_HIGHA 111 +#define R_PPC64_TPREL16_HIGH 112 +#define R_PPC64_TPREL16_HIGHA 113 +#define R_PPC64_DTPREL16_HIGH 114 +#define R_PPC64_DTPREL16_HIGHA 115 +#define R_PPC64_REL24_NOTOC 116 +#define R_PPC64_ADDR64_LOCAL 117 +#define R_PPC64_ENTRY 118 +#define R_PPC64_PLTSEQ 119 +#define R_PPC64_PLTCALL 120 +#define R_PPC64_PLTSEQ_NOTOC 121 +#define R_PPC64_PLTCALL_NOTOC 122 +#define R_PPC64_PCREL_OPT 123 + /* unused: 124-127. */ +#define R_PPC64_D34 128 +#define R_PPC64_D34_LO 129 +#define R_PPC64_D34_HI30 130 +#define R_PPC64_D34_HA30 131 +#define R_PPC64_PCREL34 132 +#define R_PPC64_GOT_PCREL34 133 +#define R_PPC64_PLT_PCREL34 134 +#define R_PPC64_PLT_PCREL34_NOTOC 135 +#define R_PPC64_ADDR16_HIGHER34 136 +#define R_PPC64_ADDR16_HIGHERA34 137 +#define R_PPC64_ADDR16_HIGHEST34 138 +#define R_PPC64_ADDR16_HIGHESTA34 139 +#define R_PPC64_REL16_HIGHER34 140 +#define R_PPC64_REL16_HIGHERA34 141 +#define R_PPC64_REL16_HIGHEST34 142 +#define R_PPC64_REL16_HIGHESTA34 143 +#define R_PPC64_D28 144 +#define R_PPC64_PCREL28 145 +#define R_PPC64_TPREL34 146 +#define R_PPC64_DTPREL34 147 +#define R_PPC64_GOT_TLSGD_PCREL34 148 +#define R_PPC64_GOT_TLSLD_PCREL34 149 +#define R_PPC64_GOT_TPREL_PCREL34 150 +#define R_PPC64_GOT_DTPREL_PCREL34 151 + /* unused: 152-239. */ +#define R_PPC64_REL16_HIGH 240 +#define R_PPC64_REL16_HIGHA 241 +#define R_PPC64_REL16_HIGHER 242 +#define R_PPC64_REL16_HIGHERA 243 +#define R_PPC64_REL16_HIGHEST 244 +#define R_PPC64_REL16_HIGHESTA 245 +#define R_PPC64_REL16DX_HA 246 + /* unused: 247. */ +#define R_PPC64_IRELATIVE 248 +#define R_PPC64_REL16 249 +#define R_PPC64_REL16_LO 250 +#define R_PPC64_REL16_HI 251 +#define R_PPC64_REL16_HA 252 +#define R_PPC64_GNU_VTINHERIT 253 +#define R_PPC64_GNU_VTENTRY 254 + + +/* EM_PPC */ +#define R_PPC_NONE 0 +#define R_PPC_ADDR32 1 +#define R_PPC_ADDR24 2 +#define R_PPC_ADDR16 3 +#define R_PPC_ADDR16_LO 4 +#define R_PPC_ADDR16_HI 5 +#define R_PPC_ADDR16_HA 6 +#define R_PPC_ADDR14 7 +#define R_PPC_ADDR14_BRTAKEN 8 +#define R_PPC_ADDR14_BRNTAKEN 9 +#define R_PPC_REL24 10 +#define R_PPC_REL14 11 +#define R_PPC_REL14_BRTAKEN 12 +#define R_PPC_REL14_BRNTAKEN 13 +#define R_PPC_GOT16 14 +#define R_PPC_GOT16_LO 15 +#define R_PPC_GOT16_HI 16 +#define R_PPC_GOT16_HA 17 +#define R_PPC_PLTREL24 18 +#define R_PPC_COPY 19 +#define R_PPC_GLOB_DAT 20 +#define R_PPC_JMP_SLOT 21 +#define R_PPC_RELATIVE 22 +#define R_PPC_LOCAL24PC 23 +#define R_PPC_UADDR32 24 +#define R_PPC_UADDR16 25 +#define R_PPC_REL32 26 +#define R_PPC_PLT32 27 +#define R_PPC_PLTREL32 28 +#define R_PPC_PLT16_LO 29 +#define R_PPC_PLT16_HI 30 +#define R_PPC_PLT16_HA 31 + /* Not in the psABI: 32 */ +#define R_PPC_SDAREL16 32 +#define R_PPC_SECTOFF 33 +#define R_PPC_SECTOFF_LO 34 +#define R_PPC_SECTOFF_HI 35 +#define R_PPC_SECTOFF_HA 36 +#define R_PPC_ADDR30 37 + /* Used by the PPC64 ABI: 38-66. */ +#define R_PPC_TLS 67 +#define R_PPC_DTPMOD32 68 +#define R_PPC_TPREL16 69 +#define R_PPC_TPREL16_LO 70 +#define R_PPC_TPREL16_HI 71 +#define R_PPC_TPREL16_HA 72 +#define R_PPC_TPREL32 73 +#define R_PPC_DTPREL16 74 +#define R_PPC_DTPREL16_LO 75 +#define R_PPC_DTPREL16_HI 76 +#define R_PPC_DTPREL16_HA 77 +#define R_PPC_DTPREL32 78 +#define R_PPC_GOT_TLSGD16 79 +#define R_PPC_GOT_TLSGD16_LO 80 +#define R_PPC_GOT_TLSGD16_HI 81 +#define R_PPC_GOT_TLSGD16_HA 82 +#define R_PPC_GOT_TLSLD16 83 +#define R_PPC_GOT_TLSLD16_LO 84 +#define R_PPC_GOT_TLSLD16_HI 85 +#define R_PPC_GOT_TLSLD16_HA 86 +#define R_PPC_GOT_TPREL16 87 +#define R_PPC_GOT_TPREL16_LO 88 +#define R_PPC_GOT_TPREL16_HI 89 +#define R_PPC_GOT_TPREL16_HA 90 + /* Not in the psABI: 91-94. */ +#define R_PPC_GOT_DTPREL16 91 +#define R_PPC_GOT_DTPREL16_LO 92 +#define R_PPC_GOT_DTPREL16_HI 93 +#define R_PPC_GOT_DTPREL16_HA 94 +#define R_PPC_TLSGD 95 +#define R_PPC_TLSLD 96 + /* Reserved: 97-100. */ +#define R_PPC_EMB_NADDR32 101 +#define R_PPC_EMB_NADDR16 102 +#define R_PPC_EMB_NADDR16_LO 103 +#define R_PPC_EMB_NADDR16_HI 104 +#define R_PPC_EMB_NADDR16_HA 105 +#define R_PPC_EMB_SDAI16 106 +#define R_PPC_EMB_SDA2I16 107 +#define R_PPC_EMB_SDA2REL 108 +#define R_PPC_EMB_SDA21 109 +#define R_PPC_EMB_MRKREF 110 +#define R_PPC_EMB_RELSEC16 111 +#define R_PPC_EMB_RELST_LO 112 +#define R_PPC_EMB_RELST_HI 113 +#define R_PPC_EMB_RELST_HA 114 +#define R_PPC_EMB_BIT_FLD 115 +#define R_PPC_EMB_RELSDA 116 + /* Reserved: 117-179. */ +#define R_PPC_DIAB_SDA21_LO 180 +#define R_PPC_DIAB_SDA21_HI 181 +#define R_PPC_DIAB_SDA21_HA 182 +#define R_PPC_DIAB_RELSDA_LO 183 +#define R_PPC_DIAB_RELSDA_HI 184 +#define R_PPC_DIAB_RELSDA_HA 185 + /* Reserved: 201-200. */ +#define R_PPC_EMB_SPE_DOUBLE 201 +#define R_PPC_EMB_SPE_WORD 202 +#define R_PPC_EMB_SPE_HALF 203 +#define R_PPC_EMB_SPE_DOUBLE_SDAREL 204 +#define R_PPC_EMB_SPE_WORD_SDAREL 205 +#define R_PPC_EMB_SPE_HALF_SDAREL 206 +#define R_PPC_EMB_SPE_DOUBLE_SDA2REL 207 +#define R_PPC_EMB_SPE_WORD_SDA2REL 208 +#define R_PPC_EMB_SPE_HALF_SDA2REL 209 +#define R_PPC_EMB_SPE_DOUBLE_SDA0REL 210 +#define R_PPC_EMB_SPE_WORD_SDA0REL 211 +#define R_PPC_EMB_SPE_HALF_SDA0REL 212 +#define R_PPC_EMB_SPE_DOUBLE_SDA 213 +#define R_PPC_EMB_SPE_WORD_SDA 214 +#define R_PPC_EMB_SPE_HALF_SDA 215 +#define R_PPC_VLE_REL8 216 +#define R_PPC_VLE_REL15 217 +#define R_PPC_VLE_REL24 218 +#define R_PPC_VLE_LO16A 219 +#define R_PPC_VLE_LO16D 220 +#define R_PPC_VLE_HI16A 221 +#define R_PPC_VLE_HI16D 222 +#define R_PPC_VLE_HA16A 223 +#define R_PPC_VLE_HA16D 224 +#define R_PPC_VLE_SDA21 225 +#define R_PPC_VLE_SDA21_LO 226 +#define R_PPC_VLE_SDAREL_LO16A 227 +#define R_PPC_VLE_SDAREL_LO16D 228 +#define R_PPC_VLE_SDAREL_HI16A 229 +#define R_PPC_VLE_SDAREL_HI16D 230 +#define R_PPC_VLE_SDAREL_HA16A 231 +#define R_PPC_VLE_SDAREL_HA16D 232 +#define R_PPC_VLE_ADDR20 233 + /* Reserved: 234-248. */ +#define R_PPC_REL16 249 +#define R_PPC_REL16_LO 250 +#define R_PPC_REL16_HI 251 +#define R_PPC_REL16_HA 252 + /* Reserved: 253-255. */ + + +/* EM_RISCV */ +#define R_RISCV_NONE 0 +#define R_RISCV_32 1 +#define R_RISCV_64 2 +#define R_RISCV_RELATIVE 3 +#define R_RISCV_COPY 4 +#define R_RISCV_JUMP_SLOT 5 +#define R_RISCV_TLS_DTPMOD32 6 +#define R_RISCV_TLS_DTPMOD64 7 +#define R_RISCV_TLS_DTPREL32 8 +#define R_RISCV_TLS_DTPREL64 9 +#define R_RISCV_TLS_TPREL32 10 +#define R_RISCV_TLS_TPREL64 11 +#define R_RISCV_TLSDESC 12 + /* unused: 13-15 */ +#define R_RISCV_BRANCH 16 +#define R_RISCV_JAL 17 +#define R_RISCV_CALL 18 +#define R_RISCV_CALL_PLT 19 +#define R_RISCV_GOT_HI20 20 +#define R_RISCV_TLS_GOT_HI20 21 +#define R_RISCV_TLS_GD_HI20 22 +#define R_RISCV_PCREL_HI20 23 +#define R_RISCV_PCREL_LO12_I 24 +#define R_RISCV_PCREL_LO12_S 25 +#define R_RISCV_HI20 26 +#define R_RISCV_LO12_I 27 +#define R_RISCV_LO12_S 28 +#define R_RISCV_TPREL_HI20 29 +#define R_RISCV_TPREL_LO12_I 30 +#define R_RISCV_TPREL_LO12_S 31 +#define R_RISCV_TPREL_ADD 32 +#define R_RISCV_ADD8 33 +#define R_RISCV_ADD16 34 +#define R_RISCV_ADD32 35 +#define R_RISCV_ADD64 36 +#define R_RISCV_SUB8 37 +#define R_RISCV_SUB16 38 +#define R_RISCV_SUB32 39 +#define R_RISCV_SUB64 40 +#define R_RISCV_GOT32_PCREL 41 + /* reserved: 42 */ +#define R_RISCV_ALIGN 43 +#define R_RISCV_RVC_BRANCH 44 +#define R_RISCV_RVC_JUMP 45 + /* reserved: 46-50 */ +#define R_RISCV_RELAX 51 +#define R_RISCV_SUB6 52 +#define R_RISCV_SET6 53 +#define R_RISCV_SET8 54 +#define R_RISCV_SET16 55 +#define R_RISCV_SET32 56 +#define R_RISCV_32_PCREL 57 +#define R_RISCV_IRELATIVE 58 +#define R_RISCV_PLT32 59 +#define R_RISCV_SET_ULEB128 60 +#define R_RISCV_SUB_ULEB128 61 +#define R_RISCV_TLSDESC_HI20 62 +#define R_RISCV_TLSDESC_LOAD_LO12 63 +#define R_RISCV_TLSDESC_ADD_LO12 64 +#define R_RISCV_TLSDESC_CALL 65 + /* reserved: 66-190 */ +#define R_RISCV_VENDOR 191 + /* reserved: 192-255 */ + + +/* EM_S390 */ +#define R_390_NONE 0 +#define R_390_8 1 +#define R_390_12 2 +#define R_390_16 3 +#define R_390_32 4 +#define R_390_PC32 5 +#define R_390_GOT12 6 +#define R_390_GOT32 7 +#define R_390_PLT32 8 +#define R_390_COPY 9 +#define R_390_GLOB_DAT 10 +#define R_390_JMP_SLOT 11 +#define R_390_RELATIVE 12 +#define R_390_GOTOFF 13 +#define R_390_GOTPC 14 +#define R_390_GOT16 15 +#define R_390_PC16 16 +#define R_390_PC16DBL 17 +#define R_390_PLT16DBL 18 +#define R_390_PC32DBL 19 +#define R_390_PLT32DBL 20 +#define R_390_GOTPCDBL 21 +#define R_390_64 22 +#define R_390_PC64 23 +#define R_390_GOT64 24 +#define R_390_PLT64 25 +#define R_390_GOTENT 26 + + +/* EM_SPARC */ +#define R_SPARC_NONE 0 +#define R_SPARC_8 1 +#define R_SPARC_16 2 +#define R_SPARC_32 3 +#define R_SPARC_DISP8 4 +#define R_SPARC_DISP16 5 +#define R_SPARC_DISP32 6 +#define R_SPARC_WDISP30 7 +#define R_SPARC_WDISP22 8 +#define R_SPARC_HI22 9 +#define R_SPARC_22 10 +#define R_SPARC_13 11 +#define R_SPARC_LO10 12 +#define R_SPARC_GOT10 13 +#define R_SPARC_GOT13 14 +#define R_SPARC_GOT22 15 +#define R_SPARC_PC10 16 +#define R_SPARC_PC22 17 +#define R_SPARC_WPLT30 18 +#define R_SPARC_COPY 19 +#define R_SPARC_GLOB_DAT 20 +#define R_SPARC_JMP_SLOT 21 +#define R_SPARC_RELATIVE 22 +#define R_SPARC_UA32 23 +#define R_SPARC_PLT32 24 +#define R_SPARC_HIPLT22 25 +#define R_SPARC_LOPLT10 26 +#define R_SPARC_PCPLT32 27 +#define R_SPARC_PCPLT22 28 +#define R_SPARC_PCPLT10 29 +#define R_SPARC_10 30 +#define R_SPARC_11 31 +#define R_SPARC_64 32 +#define R_SPARC_OLO10 33 +#define R_SPARC_HH22 34 +#define R_SPARC_HM10 35 +#define R_SPARC_LM22 36 +#define R_SPARC_PC_HH22 37 +#define R_SPARC_PC_HM10 38 +#define R_SPARC_PC_LM22 39 +#define R_SPARC_WDISP16 40 +#define R_SPARC_WDISP19 41 + /* unused: 42 */ +#define R_SPARC_7 43 +#define R_SPARC_5 44 +#define R_SPARC_6 45 +#define R_SPARC_DISP64 46 +#define R_SPARC_PLT64 47 +#define R_SPARC_HIX22 48 +#define R_SPARC_LOX10 49 +#define R_SPARC_H44 50 +#define R_SPARC_M44 51 +#define R_SPARC_L44 52 +#define R_SPARC_REGISTER 53 +#define R_SPARC_UA64 54 +#define R_SPARC_UA16 55 +#define R_SPARC_TLS_GD_HI22 56 +#define R_SPARC_TLS_GD_LO10 57 +#define R_SPARC_TLS_GD_ADD 58 +#define R_SPARC_TLS_GD_CALL 59 +#define R_SPARC_TLS_LDM_HI22 60 +#define R_SPARC_TLS_LDM_LO10 61 +#define R_SPARC_TLS_LDM_ADD 62 +#define R_SPARC_TLS_LDM_CALL 63 +#define R_SPARC_TLS_LDO_HIX22 64 +#define R_SPARC_TLS_LDO_LOX10 65 +#define R_SPARC_TLS_LDO_ADD 66 +#define R_SPARC_TLS_IE_HI22 67 +#define R_SPARC_TLS_IE_LO10 68 +#define R_SPARC_TLS_IE_LD 69 +#define R_SPARC_TLS_IE_LDX 70 +#define R_SPARC_TLS_IE_ADD 71 +#define R_SPARC_TLS_LE_HIX22 72 +#define R_SPARC_TLS_LE_LOX10 73 +#define R_SPARC_TLS_DTPMOD32 74 +#define R_SPARC_TLS_DTPMOD64 75 +#define R_SPARC_TLS_DTPOFF32 76 +#define R_SPARC_TLS_DTPOFF64 77 +#define R_SPARC_TLS_TPOFF32 78 +#define R_SPARC_TLS_TPOFF64 79 +#define R_SPARC_GOTDATA_HIX22 80 +#define R_SPARC_GOTDATA_LOX10 81 +#define R_SPARC_GOTDATA_OP_HIX22 82 +#define R_SPARC_GOTDATA_OP_LOX10 83 +#define R_SPARC_GOTDATA_OP 84 +#define R_SPARC_H34 85 +#define R_SPARC_SIZE32 86 +#define R_SPARC_SIZE64 87 +#define R_SPARC_WDISP10 88 + + +/* EM_VAX */ +#define R_VAX_NONE 0 +#define R_VAX_32 1 +#define R_VAX_16 2 +#define R_VAX_8 3 +#define R_VAX_PC32 4 +#define R_VAX_PC16 5 +#define R_VAX_PC8 6 +#define R_VAX_GOT32 7 +#define R_VAX_PLT32 13 +#define R_VAX_COPY 19 +#define R_VAX_GLOB_DAT 20 +#define R_VAX_JMP_SLOT 21 +#define R_VAX_RELATIVE 22 + + +/* EM_X86_64 */ +#define R_X86_64_NONE 0 +#define R_X86_64_64 1 +#define R_X86_64_PC32 2 +#define R_X86_64_GOT32 3 +#define R_X86_64_PLT32 4 +#define R_X86_64_COPY 5 +#define R_X86_64_GLOB_DAT 6 +#define R_X86_64_JUMP_SLOT 7 +#define R_X86_64_RELATIVE 8 +#define R_X86_64_GOTPCREL 9 +#define R_X86_64_32 10 +#define R_X86_64_32S 11 +#define R_X86_64_16 12 +#define R_X86_64_PC16 13 +#define R_X86_64_8 14 +#define R_X86_64_PC8 15 +#define R_X86_64_DTPMOD64 16 +#define R_X86_64_DTPOFF64 17 +#define R_X86_64_TPOFF64 18 +#define R_X86_64_TLSGD 19 +#define R_X86_64_TLSLD 20 +#define R_X86_64_DTPOFF32 21 +#define R_X86_64_GOTTPOFF 22 +#define R_X86_64_TPOFF32 23 +#define R_X86_64_PC64 24 +#define R_X86_64_GOTOFF64 25 +#define R_X86_64_GOTPC32 26 +#define R_X86_64_GOT64 27 +#define R_X86_64_GOTPCREL64 28 +#define R_X86_64_GOTPC64 29 + /* deprecated: 30 */ +#define R_X86_64_PLTOFF64 31 +#define R_X86_64_SIZE32 32 +#define R_X86_64_SIZE64 33 +#define R_X86_64_GOTPC32_TLSDESC 34 +#define R_X86_64_TLSDESC_CALL 35 +#define R_X86_64_TLSDESC 36 +#define R_X86_64_IRELATIVE 37 +#define R_X86_64_RELATIVE64 38 + /* deprecated: 39-40 */ +#define R_X86_64_GOTPCRELX 41 +#define R_X86_64_REX_GOTPCRELX 42 +#define R_X86_64_CODE_4_GOTPCRELX 43 +#define R_X86_64_CODE_4_GOTTPOFF 44 +#define R_X86_64_CODE_4_GOTPC32_TLSDESC 45 +#define R_X86_64_CODE_5_GOTPCRELX 46 +#define R_X86_64_CODE_5_GOTTPOFF 47 +#define R_X86_64_CODE_5_GOTPC32_TLSDESC 48 +#define R_X86_64_CODE_6_GOTPCRELX 49 +#define R_X86_64_CODE_6_GOTTPOFF 50 +#define R_X86_64_CODE_6_GOTPC32_TLSDESC 51 + + + +/* + * Obsolete relocation types. + */ + +#define R_ARM_PC13 4 +#define R_ARM_THM_PC22 10 +#define R_ARM_AMP_VCALL9 12 +#define R_ARM_SWI24 13 +#define R_ARM_GOTOFF 24 +#define R_ARM_GOTPC 25 +#define R_ARM_GOT32 26 +#define R_ARM_THM_PC11 102 +#define R_ARM_THM_PC9 103 + + +#define R_PPC64_ADDR14_BRTAKEN 8 +#define R_PPC64_ADDR14_BRNTAKEN 9 +#define R_PPC64_REL14_BRTAKEN 12 +#define R_PPC64_REL14_BRNTAKEN 13 +#define R_PPC64_ADDR30 37 + + +#define R_RISCV_GNU_VTINHERIT 41 +#define R_RISCV_GNU_VTENTRY 42 +#define R_RISCV_RVC_LUI 46 +#define R_RISCV_GPREL_I 47 +#define R_RISCV_GPREL_S 48 +#define R_RISCV_TPREL_I 49 +#define R_RISCV_TPREL_S 50 + + +#define R_SPARC_GLOB_JMP 42 + + +#define R_X86_64_GOTPLT64 30 +#define R_X86_64_PC32_BND 39 +#define R_X86_64_PLT32_BND 40 + + + +/* + * Alternate spellings for relocation type symbols. + */ + + +#define R_386_JMP_SLOT 7 + + +#define R_AARCH64_TLS_TPREL64 R_AARCH64_TLS_TPREL + + +#define R_IA64_NONE R_IA_64_NONE +#define R_IA64_IMM14 R_IA_64_IMM14 +#define R_IA64_IMM22 R_IA_64_IMM22 +#define R_IA64_IMM64 R_IA_64_IMM64 +#define R_IA64_DIR32MSB R_IA_64_DIR32MSB +#define R_IA64_DIR32LSB R_IA_64_DIR32LSB +#define R_IA64_DIR64MSB R_IA_64_DIR64MSB +#define R_IA64_DIR64LSB R_IA_64_DIR64LSB +#define R_IA64_GPREL22 R_IA_64_GPREL22 +#define R_IA64_GPREL64I R_IA_64_GPREL64I +#define R_IA64_GPREL64MSB R_IA_64_GPREL64MSB +#define R_IA64_GPREL64LSB R_IA_64_GPREL64LSB +#define R_IA64_LTOFF22 R_IA_64_LTOFF22 +#define R_IA64_LTOFF64I R_IA_64_LTOFF64I +#define R_IA64_PLTOFF22 R_IA_64_PLTOFF22 +#define R_IA64_PLTOFF64I R_IA_64_PLTOFF64I +#define R_IA64_PLTOFF64MSB R_IA_64_PLTOFF64MSB +#define R_IA64_PLTOFF64LSB R_IA_64_PLTOFF64LSB +#define R_IA64_FPTR64I R_IA_64_FPTR64I +#define R_IA64_FPTR32MSB R_IA_64_FPTR32MSB +#define R_IA64_FPTR32LSB R_IA_64_FPTR32LSB +#define R_IA64_FPTR64MSB R_IA_64_FPTR64MSB +#define R_IA64_FPTR64LSB R_IA_64_FPTR64LSB +#define R_IA64_PCREL21B R_IA_64_PCREL21B +#define R_IA64_PCREL21M R_IA_64_PCREL21M +#define R_IA64_PCREL21F R_IA_64_PCREL21F +#define R_IA64_PCREL32MSB R_IA_64_PCREL32MSB +#define R_IA64_PCREL32LSB R_IA_64_PCREL32LSB +#define R_IA64_PCREL64MSB R_IA_64_PCREL64MSB +#define R_IA64_PCREL64LSB R_IA_64_PCREL64LSB +#define R_IA64_LTOFF_FPTR22 R_IA_64_LTOFF_FPTR22 +#define R_IA64_LTOFF_FPTR64I R_IA_64_LTOFF_FPTR64I +#define R_IA64_LTOFF_FPTR32MSB R_IA_64_LTOFF_FPTR32MSB +#define R_IA64_LTOFF_FPTR32LSB R_IA_64_LTOFF_FPTR32LSB +#define R_IA64_LTOFF_FPTR64MSB R_IA_64_LTOFF_FPTR64MSB +#define R_IA64_LTOFF_FPTR64LSB R_IA_64_LTOFF_FPTR64LSB +#define R_IA64_SEGREL32MSB R_IA_64_SEGREL32MSB +#define R_IA64_SEGREL32LSB R_IA_64_SEGREL32LSB +#define R_IA64_SEGREL64MSB R_IA_64_SEGREL64MSB +#define R_IA64_SEGREL64LSB R_IA_64_SEGREL64LSB +#define R_IA64_SECREL32MSB R_IA_64_SECREL32MSB +#define R_IA64_SECREL32LSB R_IA_64_SECREL32LSB +#define R_IA64_SECREL64MSB R_IA_64_SECREL64MSB +#define R_IA64_SECREL64LSB R_IA_64_SECREL64LSB +#define R_IA64_REL32MSB R_IA_64_REL32MSB +#define R_IA64_REL32LSB R_IA_64_REL32LSB +#define R_IA64_REL64MSB R_IA_64_REL64MSB +#define R_IA64_REL64LSB R_IA_64_REL64LSB +#define R_IA64_LTV32MSB R_IA_64_LTV32MSB +#define R_IA64_LTV32LSB R_IA_64_LTV32LSB +#define R_IA64_LTV64MSB R_IA_64_LTV64MSB +#define R_IA64_LTV64LSB R_IA_64_LTV64LSB +#define R_IA64_IPLTMSB R_IA_64_IPLTMSB +#define R_IA64_IPLTLSB R_IA_64_IPLTLSB +#define R_IA64_SUB R_IA_64_SUB +#define R_IA64_LTOFF22X R_IA_64_LTOFF22X +#define R_IA64_LDXMOV R_IA_64_LDXMOV +#define R_IA64_TPREL14 R_IA_64_TPREL14 +#define R_IA64_TPREL22 R_IA_64_TPREL22 +#define R_IA64_TPREL64I R_IA_64_TPREL64I +#define R_IA64_TPREL64MSB R_IA_64_TPREL64MSB +#define R_IA64_TPREL64LSB R_IA_64_TPREL64LSB +#define R_IA64_LTOFF_TPREL22 R_IA_64_LTOFF_TPREL22 +#define R_IA64_DTPMOD64MSB R_IA_64_DTPMOD64MSB +#define R_IA64_DTPMOD64LSB R_IA_64_DTPMOD64LSB +#define R_IA64_LTOFF_DTPMOD22 R_IA_64_LTOFF_DTPMOD22 +#define R_IA64_DTPREL14 R_IA_64_DTPREL14 +#define R_IA64_DTPREL22 R_IA_64_DTPREL22 +#define R_IA64_DTPREL64I R_IA_64_DTPREL64I +#define R_IA64_DTPREL32MSB R_IA_64_DTPREL32MSB +#define R_IA64_DTPREL32LSB R_IA_64_DTPREL32LSB +#define R_IA64_DTPREL64MSB R_IA_64_DTPREL64MSB +#define R_IA64_DTPREL64LSB R_IA_64_DTPREL64LSB +#define R_IA64_LTOFF_DTPREL22 R_IA_64_LTOFF_DTPREL22 + + +#define R_MIPS_GOT_OFST 21 /* GNU binutils, LLVM. */ +#define R_MIPS_GOT_HI16 22 /* GNU binutils, LLVM. */ + + +#define R_AMD64_NONE R_X86_64_NONE +#define R_AMD64_64 R_X86_64_64 +#define R_AMD64_PC32 R_X86_64_PC32 +#define R_AMD64_GOT32 R_X86_64_GOT32 +#define R_AMD64_PLT32 R_X86_64_PLT32 +#define R_AMD64_COPY R_X86_64_COPY +#define R_AMD64_GLOB_DAT R_X86_64_GLOB_DAT +#define R_AMD64_JUMP_SLOT R_X86_64_JUMP_SLOT +#define R_AMD64_RELATIVE R_X86_64_RELATIVE +#define R_AMD64_GOTPCREL R_X86_64_GOTPCREL +#define R_AMD64_32 R_X86_64_32 +#define R_AMD64_32S R_X86_64_32S +#define R_AMD64_16 R_X86_64_16 +#define R_AMD64_PC16 R_X86_64_PC16 +#define R_AMD64_8 R_X86_64_8 +#define R_AMD64_PC8 R_X86_64_PC8 +#define R_AMD64_PC64 R_X86_64_PC64 +#define R_AMD64_GOTOFF64 R_X86_64_GOTOFF64 +#define R_AMD64_GOTPC32 R_X86_64_PC32 @@ -1764,10 +2541,10 @@ * MIPS ABI related. */ -#define E_MIPS_ABI_O32 0x00001000 -#define E_MIPS_ABI_O64 0x00002000 -#define E_MIPS_ABI_EABI32 0x00003000 -#define E_MIPS_ABI_EABI64 0x00004000 +#define E_MIPS_ABI_O32 0x00001000 /* MIPS 32 bit ABI (UCODE) */ +#define E_MIPS_ABI_O64 0x00002000 /* UCODE MIPS 64 bit ABI */ +#define E_MIPS_ABI_EABI32 0x00003000 /* Embedded ABI for 32-bit */ +#define E_MIPS_ABI_EABI64 0x00004000 /* Embedded ABI for 64-bit */ /** @@ -1919,43 +2696,43 @@ typedef struct { } Elf64_Lib; -#define LL_NONE 0 -#define LL_EXACT_MATCH 0x1 -#define LL_IGNORE_INT_VER 0x2 -#define LL_REQUIRE_MINOR 0x4 -#define LL_EXPORTS 0x8 -#define LL_DELAY_LOAD 0x10 -#define LL_DELTA 0x20 +#define LL_NONE 0 /* no flags */ +#define LL_EXACT_MATCH 0x1 /* require an exact match */ +#define LL_IGNORE_INT_VER 0x2 /* ignore version incompatibilities */ +#define LL_REQUIRE_MINOR 0x4 +#define LL_EXPORTS 0x8 +#define LL_DELAY_LOAD 0x10 +#define LL_DELTA 0x20 /* * Note tags */ -#define NT_ABI_TAG 1 -#define NT_GNU_HWCAP 2 -#define NT_GNU_BUILD_ID 3 -#define NT_GNU_GOLD_VERSION 4 -#define NT_PRSTATUS 1 -#define NT_FPREGSET 2 -#define NT_PRPSINFO 3 -#define NT_AUXV 6 -#define NT_PRXFPREG 0x46E62B7FUL -#define NT_PSTATUS 10 -#define NT_FPREGS 12 -#define NT_PSINFO 13 -#define NT_LWPSTATUS 16 -#define NT_LWPSINFO 17 -#define NT_FREEBSD_NOINIT_TAG 2 -#define NT_FREEBSD_ARCH_TAG 3 -#define NT_FREEBSD_FEATURE_CTL 4 +#define NT_ABI_TAG 1 /* Tag indicating the ABI */ +#define NT_GNU_HWCAP 2 /* Hardware capabilities */ +#define NT_GNU_BUILD_ID 3 /* Build id, set by ld(1) */ +#define NT_GNU_GOLD_VERSION 4 /* Version number of the GNU gold linker */ +#define NT_PRSTATUS 1 /* Process status */ +#define NT_FPREGSET 2 /* Floating point information */ +#define NT_PRPSINFO 3 /* Process information */ +#define NT_AUXV 6 /* Auxiliary vector */ +#define NT_PRXFPREG 0x46E62B7FU /* Linux user_xfpregs structure */ +#define NT_PSTATUS 10 /* Linux process status */ +#define NT_FPREGS 12 /* Linux floating point regset */ +#define NT_PSINFO 13 /* Linux process information */ +#define NT_LWPSTATUS 16 /* Linux lwpstatus_t type */ +#define NT_LWPSINFO 17 /* Linux lwpinfo_t type */ +#define NT_FREEBSD_NOINIT_TAG 2 /* FreeBSD no .init tag */ +#define NT_FREEBSD_ARCH_TAG 3 /* FreeBSD arch tag */ +#define NT_FREEBSD_FEATURE_CTL 4 /* FreeBSD feature control */ /* Aliases for the ABI tag. */ -#define NT_FREEBSD_ABI_TAG NT_ABI_TAG -#define NT_GNU_ABI_TAG NT_ABI_TAG -#define NT_NETBSD_IDENT NT_ABI_TAG -#define NT_OPENBSD_IDENT NT_ABI_TAG +#define NT_FREEBSD_ABI_TAG NT_ABI_TAG +#define NT_GNU_ABI_TAG NT_ABI_TAG +#define NT_NETBSD_IDENT NT_ABI_TAG +#define NT_OPENBSD_IDENT NT_ABI_TAG /* @@ -1986,39 +2763,39 @@ typedef struct { * Option kinds. */ -#define ODK_NULL 0 -#define ODK_REGINFO 1 -#define ODK_EXCEPTIONS 2 -#define ODK_PAD 3 -#define ODK_HWPATCH 4 -#define ODK_FILL 5 -#define ODK_TAGS 6 -#define ODK_HWAND 7 -#define ODK_HWOR 8 -#define ODK_GP_GROUP 9 -#define ODK_IDENT 10 -#define ODK_PAGESIZE 11 +#define ODK_NULL 0 /* undefined */ +#define ODK_REGINFO 1 /* register usage info */ +#define ODK_EXCEPTIONS 2 /* exception processing info */ +#define ODK_PAD 3 /* section padding */ +#define ODK_HWPATCH 4 /* hardware patch applied */ +#define ODK_FILL 5 /* fill value used by linker */ +#define ODK_TAGS 6 /* reserved space for tools */ +#define ODK_HWAND 7 /* hardware AND patch applied */ +#define ODK_HWOR 8 /* hardware OR patch applied */ +#define ODK_GP_GROUP 9 /* GP group to use for text/data sections */ +#define ODK_IDENT 10 /* ID information */ +#define ODK_PAGESIZE 11 /* page size information */ /* * ODK_EXCEPTIONS info field masks. */ -#define OEX_FPU_MIN 0x0000001FUL -#define OEX_FPU_MAX 0x00001F00UL -#define OEX_PAGE0 0x00010000UL -#define OEX_SMM 0x00020000UL -#define OEX_PRECISEFP 0x00040000UL -#define OEX_DISMISS 0x00080000UL +#define OEX_FPU_MIN 0x0000001FU /* minimum FPU exception which must be enabled */ +#define OEX_FPU_MAX 0x00001F00U /* maximum FPU exception which can be enabled */ +#define OEX_PAGE0 0x00010000U /* page zero must be mapped */ +#define OEX_SMM 0x00020000U /* run in sequential memory mode */ +#define OEX_PRECISEFP 0x00040000U /* run in precise FP exception mode */ +#define OEX_DISMISS 0x00080000U /* dismiss invalid address traps */ /* * ODK_PAD info field masks. */ -#define OPAD_PREFIX 0x0001 -#define OPAD_POSTFIX 0x0002 -#define OPAD_SYMBOL 0x0004 +#define OPAD_PREFIX 0x0001 +#define OPAD_POSTFIX 0x0002 +#define OPAD_SYMBOL 0x0004 /* @@ -2026,22 +2803,22 @@ typedef struct { * and hwp_flags[12] masks. */ -#define OHW_R4KEOP 0x00000001UL -#define OHW_R8KPFETCH 0x00000002UL -#define OHW_R5KEOP 0x00000004UL -#define OHW_R5KCVTL 0x00000008UL -#define OHW_R10KLDL 0x00000010UL -#define OHWA0_R4KEOP_CHECKED 0x00000001UL -#define OHWA0_R4KEOP_CLEAN 0x00000002UL -#define OHWO0_FIXADE 0x00000001UL +#define OHW_R4KEOP 0x00000001U /* patch for R4000 branch at end-of-page bug */ +#define OHW_R8KPFETCH 0x00000002U /* R8000 prefetch bug may occur */ +#define OHW_R5KEOP 0x00000004U /* patch for R5000 branch at end-of-page bug */ +#define OHW_R5KCVTL 0x00000008U /* R5000 cvt.[ds].l bug: clean == 1 */ +#define OHW_R10KLDL 0x00000010U /* need patch for R10000 misaligned load */ +#define OHWA0_R4KEOP_CHECKED 0x00000001U /* object checked for R4000 end-of-page bug */ +#define OHWA0_R4KEOP_CLEAN 0x00000002U /* object verified clean for R4000 end-of-page bug */ +#define OHWO0_FIXADE 0x00000001U /* object requires call to fixade */ /* * ODK_IDENT/ODK_GP_GROUP info field masks. */ -#define OGP_GROUP 0x0000FFFFUL -#define OGP_SELF 0x00010000UL +#define OGP_GROUP 0x0000FFFFU /* GP group number */ +#define OGP_SELF 0x00010000U /* GP group is self-contained */ /* @@ -2327,7 +3104,7 @@ typedef struct { uint32_t gh_nbuckets; /* Number of hash buckets. */ uint32_t gh_symndx; /* First visible symbol in .dynsym. */ uint32_t gh_maskwords; /* #maskwords used in bloom filter. */ - uint32_t gh_shift2; /* Bloom filter count. */ + uint32_t gh_shift2; /* Bloom filter shift count. */ } Elf_GNU_Hash_Header; #endif /* _SYS_ELFDEFINITIONS_H_ */ \ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/sys/endian.h b/lib/libc/include/generic-netbsd/sys/endian.h @@ -1,4 +1,4 @@ -/* $NetBSD: endian.h,v 1.31.4.1 2024/10/11 19:07:20 martin Exp $ */ +/* $NetBSD: endian.h,v 1.37.2.1 2025/11/28 10:58:02 martin Exp $ */ /* * Copyright (c) 1987, 1991, 1993 @@ -112,15 +112,15 @@ __END_DECLS * Macros for network/external number representation conversion. */ #if BYTE_ORDER == BIG_ENDIAN && !defined(__lint__) -#define ntohl(x) (x) -#define ntohs(x) (x) -#define htonl(x) (x) -#define htons(x) (x) +#define ntohl(x) __CAST(uint32_t, (x)) +#define ntohs(x) __CAST(uint16_t, (x)) +#define htonl(x) __CAST(uint32_t, (x)) +#define htons(x) __CAST(uint16_t, (x)) -#define NTOHL(x) (void) (x) -#define NTOHS(x) (void) (x) -#define HTONL(x) (void) (x) -#define HTONS(x) (void) (x) +#define NTOHL(x) __CAST(void, (x)) +#define NTOHS(x) __CAST(void, (x)) +#define HTONL(x) __CAST(void, (x)) +#define HTONS(x) __CAST(void, (x)) #else /* LITTLE_ENDIAN || defined(__lint__) */ @@ -141,9 +141,9 @@ __END_DECLS #if BYTE_ORDER == BIG_ENDIAN -#define htobe16(x) (x) -#define htobe32(x) (x) -#define htobe64(x) (x) +#define htobe16(x) __CAST(uint16_t, (x)) +#define htobe32(x) __CAST(uint32_t, (x)) +#define htobe64(x) __CAST(uint64_t, (x)) #define htole16(x) bswap16(__CAST(uint16_t, (x))) #define htole32(x) bswap32(__CAST(uint32_t, (x))) #define htole64(x) bswap64(__CAST(uint64_t, (x))) @@ -160,9 +160,9 @@ __END_DECLS #define htobe16(x) bswap16(__CAST(uint16_t, (x))) #define htobe32(x) bswap32(__CAST(uint32_t, (x))) #define htobe64(x) bswap64(__CAST(uint64_t, (x))) -#define htole16(x) (x) -#define htole32(x) (x) -#define htole64(x) (x) +#define htole16(x) __CAST(uint16_t, (x)) +#define htole32(x) __CAST(uint32_t, (x)) +#define htole64(x) __CAST(uint64_t, (x)) #define HTOBE16(x) (x) = bswap16(__CAST(uint16_t, (x))) #define HTOBE32(x) (x) = bswap32(__CAST(uint32_t, (x))) @@ -194,7 +194,7 @@ __END_DECLS #ifdef _NETBSD_SOURCE -#if __GNUC_PREREQ__(2, 95) +#if __GNUC_PREREQ__(2, 95) && !defined(__HAVE_SLOW_BSWAP_BUILTIN) #define __GEN_ENDIAN_ENC(bits, endian) \ static __inline void __unused \ @@ -229,7 +229,7 @@ __GEN_ENDIAN_DEC(32, le) __GEN_ENDIAN_DEC(64, le) #undef __GEN_ENDIAN_DEC -#else /* !(GCC >= 2.95) */ +#else /* !(GCC >= 2.95 && !__HAVE_SLOW_BSWAP_BUILTIN) */ static __inline void __unused be16enc(void *buf, uint16_t u) diff --git a/lib/libc/include/generic-netbsd/sys/evcnt.h b/lib/libc/include/generic-netbsd/sys/evcnt.h @@ -1,4 +1,4 @@ -/* $NetBSD: evcnt.h,v 1.10 2021/08/03 23:12:14 andvar Exp $ */ +/* $NetBSD: evcnt.h,v 1.11 2024/01/15 18:14:23 thorpej Exp $ */ /* * Copyright (c) 1996, 2000 Christopher G. Demetriou @@ -83,7 +83,10 @@ */ struct evcnt { - uint64_t ev_count; /* how many have occurred */ + union { + uint64_t ev_count; /* how many have occurred */ + uint32_t ev__count32[2]; + }; TAILQ_ENTRY(evcnt) ev_list; /* entry on list of all counters */ unsigned char ev_type; /* counter type; see below */ unsigned char ev_grouplen; /* 'group' len, excluding NUL */ @@ -95,6 +98,16 @@ struct evcnt { }; TAILQ_HEAD(evcntlist, evcnt); +/* + * For 32-bit counters, ev_count32 is the correct half of the 64-bit + * counter field. + */ +#if _BYTE_ORDER == _BIG_ENDIAN +#define ev_count32 ev__count32[1] +#elif _BYTE_ORDER == _LITTLE_ENDIAN +#define ev_count32 ev__count32[0] +#endif + /* maximum group/name lengths, including trailing NUL */ #define EVCNT_STRING_MAX 255 diff --git a/lib/libc/include/generic-netbsd/sys/event.h b/lib/libc/include/generic-netbsd/sys/event.h @@ -1,4 +1,4 @@ -/* $NetBSD: event.h,v 1.54 2022/07/19 00:46:00 thorpej Exp $ */ +/* $NetBSD: event.h,v 1.55 2023/07/28 18:19:01 christos Exp $ */ /*- * Copyright (c) 1999,2000,2001 Jonathan Lemon <jlemon@FreeBSD.org> @@ -70,6 +70,7 @@ struct kevent { uint32_t fflags; /* filter flag value */ int64_t data; /* filter data value */ void *udata; /* opaque user data identifier */ + uint64_t ext[4]; /* extensions */ }; static __inline void @@ -349,7 +350,7 @@ int kqueue(void); int kqueue1(int); #ifndef __LIBC12_SOURCE__ int kevent(int, const struct kevent *, size_t, struct kevent *, size_t, - const struct timespec *) __RENAME(__kevent50); + const struct timespec *) __RENAME(__kevent100); #endif #endif /* !_POSIX_C_SOURCE */ __END_DECLS diff --git a/lib/libc/include/generic-netbsd/sys/exec.h b/lib/libc/include/generic-netbsd/sys/exec.h @@ -1,4 +1,4 @@ -/* $NetBSD: exec.h,v 1.161 2021/11/26 08:06:12 ryo Exp $ */ +/* $NetBSD: exec.h,v 1.162 2023/08/01 21:26:28 andvar Exp $ */ /*- * Copyright (c) 1992, 1993 @@ -215,7 +215,7 @@ struct exec_package { void *ep_emul_arg; /* emulation argument */ const struct execsw *ep_esch;/* execsw entry */ struct vnode *ep_emul_root; /* base of emulation filesystem */ - struct vnode *ep_interp; /* vnode of (elf) interpeter */ + struct vnode *ep_interp; /* vnode of (elf) interpreter */ uint32_t ep_pax_flags; /* pax flags */ void (*ep_emul_arg_free)(void *); /* free ep_emul_arg */ diff --git a/lib/libc/include/generic-netbsd/sys/exec_elf.h b/lib/libc/include/generic-netbsd/sys/exec_elf.h @@ -1,4 +1,4 @@ -/* $NetBSD: exec_elf.h,v 1.170 2022/06/08 10:12:42 rin Exp $ */ +/* $NetBSD: exec_elf.h,v 1.177 2025/05/27 14:03:08 christos Exp $ */ /*- * Copyright (c) 1994 The NetBSD Foundation, Inc. @@ -216,7 +216,7 @@ typedef struct { #define EM_68K 4 /* Motorola 68000 */ #define EM_88K 5 /* Motorola 88000 */ #define EM_486 6 /* Intel 80486 [old] */ -#define EM_IAMCU 6 /* Intel MCU. */ +#define EM_IAMCU EM_486 /* Intel MCU. */ #define EM_860 7 /* Intel 80860 */ #define EM_MIPS 8 /* MIPS I Architecture */ #define EM_S370 9 /* Amdahl UTS on System/370 */ @@ -292,6 +292,7 @@ typedef struct { #define EM_OR1K 92 /* OpenRISC 32-bit embedded processor */ #define EM_OPENRISC EM_OR1K #define EM_ARC_A5 93 /* ARC Cores Tangent-A5 */ +#define EM_ARC_COMPACT EM_ARC_A5 /* ARC International ARCompact processor (old spelling/synonym: EM_ARC_A5) */ #define EM_XTENSA 94 /* Tensilica Xtensa Architecture */ #define EM_VIDEOCORE 95 /* Alphamosaic VideoCore processor */ #define EM_TMM_GPP 96 /* Thompson Multimedia General Purpose Processor */ @@ -301,7 +302,7 @@ typedef struct { #define EM_ST200 100 /* STMicroelectronics ST200 microcontroller */ #define EM_IP2K 101 /* Ubicom IP2xxx microcontroller family */ #define EM_MAX 102 /* MAX processor */ -#define EM_CR 103 /* National Semiconductor CompactRISC micorprocessor */ +#define EM_CR 103 /* National Semiconductor CompactRISC microprocessor */ #define EM_F2MC16 104 /* Fujitsu F2MC16 */ #define EM_MSP430 105 /* Texas Instruments MSP430 */ #define EM_BLACKFIN 106 /* Analog Devices Blackfin DSP */ @@ -362,6 +363,7 @@ typedef struct { #define EM_AARCH64 183 /* AArch64 64-bit ARM microprocessor */ /* 184 - Reserved */ #define EM_AVR32 185 /* Atmel Corporation 32-bit microprocessor family*/ +#define EM_STM8 186 /* STMicroelectronics STM8 8-bit microcontroller */ #define EM_TILE64 187 /* Tilera TILE64 multicore architecture family */ #define EM_TILEPRO 188 /* Tilera TILEPro multicore architecture family */ #define EM_MICROBLAZE 189 /* Xilinx MicroBlaze 32-bit RISC soft processor core */ @@ -515,7 +517,8 @@ typedef struct { #define SHT_PREINIT_ARRAY 16 /* Pre-initialization function ptrs */ #define SHT_GROUP 17 /* Section group */ #define SHT_SYMTAB_SHNDX 18 /* Section indexes (see SHN_XINDEX) */ -#define SHT_NUM 19 +#define SHT_RELR 19 /* Relative relocation information */ +#define SHT_NUM 20 #define SHT_LOOS 0x60000000 /* Operating system specific range */ #define SHT_GNU_INCREMENTAL_INPUTS 0x6fff4700 /* GNU incremental build data */ @@ -540,9 +543,9 @@ typedef struct { #define SHT_LOPROC 0x70000000 /* Processor-specific range */ #define SHT_AMD64_UNWIND 0x70000001 /* unwind information */ #define SHT_ARM_EXIDX 0x70000001 /* exception index table */ -#define SHT_ARM_PREEMPTMAP 0x70000002 /* BPABI DLL dynamic linking +#define SHT_ARM_PREEMPTMAP 0x70000002 /* BPABI DLL dynamic linking * pre-emption map */ -#define SHT_ARM_ATTRIBUTES 0x70000003 /* Object file compatibility +#define SHT_ARM_ATTRIBUTES 0x70000003 /* Object file compatibility * attributes */ #define SHT_ARM_DEBUGOVERLAY 0x70000004 /* See DBGOVL for details */ #define SHT_ARM_OVERLAYSECTION 0x70000005 @@ -575,7 +578,7 @@ typedef struct { */ typedef struct { Elf32_Word st_name; /* Symbol name (.strtab index) */ - Elf32_Word st_value; /* value of symbol */ + Elf32_Addr st_value; /* value of symbol */ Elf32_Word st_size; /* size of symbol */ Elf_Byte st_info; /* type / binding attrs */ Elf_Byte st_other; /* unused */ @@ -679,6 +682,9 @@ typedef struct { #define ELF32_R_TYPE(info) ((info) & 0xff) #define ELF32_R_INFO(sym, type) (((sym) << 8) + (unsigned char)(type)) +/* Relative relocations (DT_RELR, SHT_RELR, .relr.dyn) */ +typedef Elf32_Word Elf32_Relr; + typedef struct { Elf64_Addr r_offset; /* where to do it */ Elf64_Xword r_info; /* index & type of relocation */ @@ -695,6 +701,9 @@ typedef struct { #define ELF64_R_TYPE(info) ((info) & 0xffffffff) #define ELF64_R_INFO(sym,type) (((sym) << 32) + (type)) +/* Relative relocations (DT_RELR, SHT_RELR, .relr.dyn) */ +typedef Elf64_Xword Elf64_Relr; + /* * Move entries */ @@ -792,10 +801,14 @@ typedef struct { #define DT_FINI_ARRAYSZ 28 /* Size, in bytes, of DT_FINI_ARRAY array*/ #define DT_RUNPATH 29 /* overrides DT_RPATH */ #define DT_FLAGS 30 /* Encodes ORIGIN, SYMBOLIC, TEXTREL, BIND_NOW, STATIC_TLS */ -#define DT_ENCODING 31 /* ??? */ +#define DT_ENCODING 32 /* In [32, DT_LOOS), only evens use d_ptr */ #define DT_PREINIT_ARRAY 32 /* Address of pre-init function array */ #define DT_PREINIT_ARRAYSZ 33 /* Size, in bytes, of DT_PREINIT_ARRAY array */ -#define DT_NUM 34 +#define DT_SYMTAB_SHNDX 34 /* Addr. of SHT_SYMTAB_SHNDX § of DT_SYMTAB */ +#define DT_RELRSZ 35 /* Size, in bytes, of DT_RELR table */ +#define DT_RELR 36 /* Address of Relr relocation table */ +#define DT_RELRENT 37 /* Size, in bytes, of one DT_RELR entry */ +#define DT_NUM 38 #define DT_LOOS 0x60000000 /* Operating system specific range */ #define DT_GNU_HASH 0x6ffffef5 /* GNU-style hash table */ @@ -972,7 +985,7 @@ typedef struct { * GNU-specific note type: Build ID generated by ld * name: GNU\0 * desc: - * word[0..4] SHA1 [default] + * word[0..4] SHA1 [default] * or * word[0..3] md5 or uuid * descsz: 16 or 20 @@ -999,7 +1012,7 @@ typedef struct { /* SuSE-specific note type: version * name: SuSE\0\0\0\0 * namesz: 8 - * desc: + * desc: * word[0] = VVTTMMmm * * V = version of following data @@ -1018,7 +1031,7 @@ typedef struct { /* Go-specific note type: buildid * name: Go\0\0 * namesz: 4 - * desc: + * desc: * words[10] * descsz: 40 */ @@ -1043,7 +1056,7 @@ typedef struct { /* NetBSD-specific note type: NetBSD ABI version. * name: NetBSD\0\0 * namesz: 8 - * desc: + * desc: * word[0]: MMmmrrpp00 * * M = major version @@ -1064,7 +1077,7 @@ typedef struct { * namesz: 8 * desc: * "netbsd\0" - * + * * descsz: 8 */ #define ELF_NOTE_TYPE_NETBSD_EMUL_TAG 2 @@ -1179,7 +1192,6 @@ struct netbsd_elfcore_procinfo { /* NetBSD-specific note name */ #define ELF_NOTE_MCMODEL_NAME ELF_NOTE_NETBSD_NAME - #if !defined(ELFSIZE) # if defined(_RUMPKERNEL) || !defined(_KERNEL) # define ELFSIZE ARCH_ELFSIZE @@ -1204,6 +1216,7 @@ struct netbsd_elfcore_procinfo { #define Elf_Sym Elf32_Sym #define Elf_Rel Elf32_Rel #define Elf_Rela Elf32_Rela +#define Elf_Relr Elf32_Relr #define Elf_Dyn Elf32_Dyn #define Elf_Word Elf32_Word #define Elf_Sword Elf32_Sword @@ -1230,6 +1243,7 @@ struct netbsd_elfcore_procinfo { #define Elf_Sym Elf64_Sym #define Elf_Rel Elf64_Rel #define Elf_Rela Elf64_Rela +#define Elf_Relr Elf64_Relr #define Elf_Dyn Elf64_Dyn #define Elf_Word Elf64_Word #define Elf_Sword Elf64_Sword @@ -1299,7 +1313,7 @@ typedef struct { #define SYMINFO_NUM 2 /* - * These constants are used for Elf32_Verdef struct's version number. + * These constants are used for Elf32_Verdef struct's version number. */ #define VER_DEF_NONE 0 #define VER_DEF_CURRENT 1 @@ -1310,7 +1324,7 @@ typedef struct { #define VER_DEF_IDX(x) VER_NDX(x) /* - * These constants are used for Elf32_Verdef struct's vd_flags. + * These constants are used for Elf32_Verdef struct's vd_flags. */ #define VER_FLG_BASE 0x1 #define VER_FLG_WEAK 0x2 @@ -1323,7 +1337,7 @@ typedef struct { #define VER_NDX_GIVEN 2 /* - * These constants are used for Elf32_Verneed struct's version number. + * These constants are used for Elf32_Verneed struct's version number. */ #define VER_NEED_NONE 0 #define VER_NEED_CURRENT 1 @@ -1460,7 +1474,6 @@ int coredump_elf32(struct lwp *, struct coredump_iostate *); void coredump_savenote_elf32(struct note_state *, unsigned int, const char *, void *, size_t); - #ifdef EXEC_ELF64 int exec_elf64_makecmds(struct lwp *, struct exec_package *); int elf64_populate_auxv(struct lwp *, struct exec_package *, char **); @@ -1475,7 +1488,6 @@ int coredump_elf64(struct lwp *, struct coredump_iostate *); void coredump_savenote_elf64(struct note_state *, unsigned int, const char *, void *, size_t); - #endif /* _KERNEL */ #endif /* !_SYS_EXEC_ELF_H_ */ \ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/sys/fcntl.h b/lib/libc/include/generic-netbsd/sys/fcntl.h @@ -1,4 +1,4 @@ -/* $NetBSD: fcntl.h,v 1.54 2020/03/30 20:17:42 kamil Exp $ */ +/* $NetBSD: fcntl.h,v 1.57 2025/07/25 23:24:46 kre Exp $ */ /*- * Copyright (c) 1983, 1990, 1993 @@ -123,6 +123,10 @@ #define O_REGULAR 0x02000000 /* fail if not a regular file */ #define O_EXEC 0x04000000 /* open for executing only */ #endif +#if (_POSIX_C_SOURCE - 0) >= 202405L || (_XOPEN_SOURCE - 0 >= 800) || \ + defined(_NETBSD_SOURCE) +#define O_CLOFORK 0x08000000 /* set close on fork */ +#endif #ifdef _KERNEL /* convert from open() flags to/from fflags; convert O_RD/WR to FREAD/FWRITE */ @@ -133,7 +137,8 @@ #define O_MASK (O_ACCMODE|O_NONBLOCK|O_APPEND|O_SHLOCK|O_EXLOCK|\ O_ASYNC|O_SYNC|O_CREAT|O_TRUNC|O_EXCL|O_DSYNC|\ O_RSYNC|O_NOCTTY|O_ALT_IO|O_NOFOLLOW|O_DIRECT|\ - O_DIRECTORY|O_CLOEXEC|O_NOSIGPIPE|O_REGULAR|O_EXEC) + O_DIRECTORY|O_CLOEXEC|O_CLOFORK|O_NOSIGPIPE|\ + O_REGULAR|O_EXEC) #define FEXEC O_EXEC #define FMARK 0x00001000 /* mark during gc() */ @@ -200,10 +205,20 @@ #define F_GETNOSIGPIPE 13 /* get SIGPIPE disposition */ #define F_SETNOSIGPIPE 14 /* set SIGPIPE disposition */ #define F_GETPATH 15 /* get pathname associated with fd */ +#define F_ADD_SEALS 16 /* set seals */ +#define F_GET_SEALS 17 /* get seals */ +#endif +#if (_POSIX_C_SOURCE - 0) >= 202405L || (_XOPEN_SOURCE - 0 >= 800) || \ + defined(_NETBSD_SOURCE) +#define F_DUPFD_CLOFORK 18 /* close on fork duplicated fd */ +#endif +#if defined(_NETBSD_SOURCE) +#define F_DUPFD_CLOBOTH 19 /* close on exec/fork duplicated fd */ #endif /* file descriptor flags (F_GETFD, F_SETFD) */ #define FD_CLOEXEC 1 /* close-on-exec flag */ +#define FD_CLOFORK 2 /* close-on-fork flag */ /* record locking flags (F_GETLK, F_SETLK, F_SETLKW) */ #define F_RDLCK 1 /* shared or read lock */ @@ -215,6 +230,15 @@ #define F_POSIX 0x040 /* Use POSIX semantics for lock */ #endif +/* types of seals (F_ADD_SEALS, F_GET_SEALS) */ +#if defined(_NETBSD_SOURCE) +#define F_SEAL_SEAL 0x0001 /* prevent further seals from being set */ +#define F_SEAL_SHRINK 0x0002 /* prevent file from shrinking */ +#define F_SEAL_GROW 0x0004 /* prevent file from growing */ +#define F_SEAL_WRITE 0x0008 /* prevent writes */ +#define F_SEAL_FUTURE_WRITE 0x0010 /* prevent future writes while mapped */ +#endif + /* Constants for fcntl's passed to the underlying fs - like ioctl's. */ #if defined(_NETBSD_SOURCE) #define F_PARAM_MASK 0xfff diff --git a/lib/libc/include/generic-netbsd/sys/fd_set.h b/lib/libc/include/generic-netbsd/sys/fd_set.h @@ -1,4 +1,4 @@ -/* $NetBSD: fd_set.h,v 1.7 2018/06/24 12:05:40 kamil Exp $ */ +/* $NetBSD: fd_set.h,v 1.8 2024/05/12 10:34:56 rillig Exp $ */ /*- * Copyright (c) 1992, 1993 @@ -81,7 +81,7 @@ typedef struct fd_set { unsigned int __i; \ for (__i = 0; __i < __NFD_SIZE; __i++) \ __fds->fds_bits[__i] = 0; \ - } while (/* CONSTCOND */ 0) + } while (0) #endif /* GCC 2.95 */ /* @@ -100,7 +100,7 @@ typedef struct fd_set { unsigned int __i; \ for (__i = 0; __i < __NFD_SIZE; __i++) \ __t->fds_bits[__i] = __f->fds_bits[__i]; \ - } while (/* CONSTCOND */ 0) + } while (0) #endif /* GCC 2.95 */ #endif /* _NETBSD_SOURCE */ diff --git a/lib/libc/include/generic-netbsd/sys/featuretest.h b/lib/libc/include/generic-netbsd/sys/featuretest.h @@ -1,4 +1,4 @@ -/* $NetBSD: featuretest.h,v 1.10.66.1 2024/10/11 18:51:20 martin Exp $ */ +/* $NetBSD: featuretest.h,v 1.13 2024/09/09 15:05:39 riastradh Exp $ */ /* * Written by Klaus Klein <kleink@NetBSD.org>, February 2, 1998. @@ -29,6 +29,14 @@ * _POSIX_C_SOURCE == 199506L ISO/IEC 9945-1:1996 * _POSIX_C_SOURCE == 200112L IEEE Std 1003.1-2001 * _POSIX_C_SOURCE == 200809L IEEE Std 1003.1-2008 + * _POSIX_C_SOURCE == 202405L IEEE Std 1003.1-2024 + * + * Reference: + * + * The Open Group Base Specifications Issue 8, IEEE Std + * 1003.1-2024, IEEE and The Open Group, 2024, Sec. 2.2.1.1 `The + * _POSIX_C_SOURCE Feature Test Macro'. + * https://pubs.opengroup.org/onlinepubs/9799919799.2024edition/functions/V2_chap02.html#tag_16_02_01_01 * * X/Open macros: * _XOPEN_SOURCE System Interfaces and Headers, Issue 4, Ver 2 @@ -37,6 +45,14 @@ * _XOPEN_SOURCE == 520 Networking Services (XNS), Issue 5.2 * _XOPEN_SOURCE == 600 IEEE Std 1003.1-2001, XSI option * _XOPEN_SOURCE == 700 IEEE Std 1003.1-2008, XSI option + * _XOPEN_SOURCE == 800 IEEE Std 1003.1-2024, XSI option + * + * Reference: + * + * The Open Group Base Specifications Issue 8, IEEE Std + * 1003.1-2024, IEEE and The Open Group, 2024, Sec. 2.2.1.2 `The + * _XOPEN_SOURCE Feature Test Macro'. + * https://pubs.opengroup.org/onlinepubs/9799919799.2024edition/functions/V2_chap02.html#tag_16_02_01_02 * * NetBSD macros: * _NETBSD_SOURCE == 1 Make all NetBSD features available. @@ -54,11 +70,13 @@ * defined along with one of the "major" macros. The "minor" macros * are: * - * _REENTRANT - * _ISOC99_SOURCE - * _ISOC11_SOURCE - * _LARGEFILE_SOURCE Large File Support - * <http://ftp.sas.com/standards/large.file/x_open.20Mar96.html> + * _REENTRANT Some thread-safety extensions like lgamma_r(3) + * (mostly subsumed by _POSIX_C_SOURCE >= 199506L) + * _ISOC99_SOURCE C99 extensions like snprintf without -std=c99 + * _ISOC11_SOURCE C11 extensions like aligned_alloc without -std=c11 + * _ISOC23_SOURCE C23 extensions like mbrtoc8 without -std=c23 + * _OPENBSD_SOURCE Nonstandard OpenBSD extensions like strtonum(3) + * _GNU_SOURCE Nonstandard GNU extensions like feenableexcept(3) */ #if defined(_POSIX_SOURCE) && !defined(_POSIX_C_SOURCE) diff --git a/lib/libc/include/generic-netbsd/sys/file.h b/lib/libc/include/generic-netbsd/sys/file.h @@ -1,4 +1,4 @@ -/* $NetBSD: file.h,v 1.88 2021/09/19 15:51:27 thorpej Exp $ */ +/* $NetBSD: file.h,v 1.93 2023/07/10 02:31:55 christos Exp $ */ /*- * Copyright (c) 2009 The NetBSD Foundation, Inc. @@ -63,6 +63,8 @@ #ifndef _SYS_FILE_H_ #define _SYS_FILE_H_ +#include <sys/types.h> + #include <sys/fcntl.h> #include <sys/unistd.h> @@ -71,12 +73,13 @@ #include <sys/mutex.h> #include <sys/condvar.h> -struct proc; -struct lwp; -struct uio; +struct flock; struct iovec; -struct stat; struct knote; +struct lwp; +struct proc; +struct stat; +struct uio; struct uvm_object; struct fileops { @@ -95,6 +98,12 @@ struct fileops { int (*fo_mmap) (struct file *, off_t *, size_t, int, int *, int *, struct uvm_object **, int *); int (*fo_seek) (struct file *, off_t, int, off_t *, int); + int (*fo_advlock) (struct file *, void *, int, struct flock *, + int); + int (*fo_fpathconf) (struct file *, int, register_t *); + int (*fo_posix_fadvise) + (struct file *, off_t, off_t, int); + int (*fo_truncate) (struct file *, off_t); }; union file_data { @@ -113,6 +122,7 @@ union file_data { struct mqueue *fd_mq; // DTYPE_MQUEUE struct ksem *fd_ks; // DTYPE_SEM struct iscsifd *fd_iscsi; // DTYPE_MISC (iscsi) + struct memfd *fd_memfd; // DTYPE_MEMFD }; /* @@ -152,6 +162,7 @@ struct file { #define f_ksem f_undata.fd_ks #define f_eventfd f_undata.fd_eventfd #define f_timerfd f_undata.fd_timerfd +#define f_memfd f_undata.fd_memfd #define f_rndctx f_undata.fd_rndctx #define f_audioctx f_undata.fd_audioctx @@ -176,10 +187,11 @@ struct file { #define DTYPE_SEM 8 /* semaphore */ #define DTYPE_EVENTFD 9 /* eventfd */ #define DTYPE_TIMERFD 10 /* timerfd */ +#define DTYPE_MEMFD 11 /* memfd */ #define DTYPE_NAMES \ "0", "file", "socket", "pipe", "kqueue", "misc", "crypto", "mqueue", \ - "semaphore", "eventfd", "timerfd" + "semaphore", "eventfd", "timerfd", "memfd" #ifdef _KERNEL diff --git a/lib/libc/include/generic-netbsd/sys/filedesc.h b/lib/libc/include/generic-netbsd/sys/filedesc.h @@ -1,4 +1,4 @@ -/* $NetBSD: filedesc.h,v 1.70.2.1 2024/11/17 16:16:10 martin Exp $ */ +/* $NetBSD: filedesc.h,v 1.73 2025/07/16 19:14:14 kre Exp $ */ /*- * Copyright (c) 2008 The NetBSD Foundation, Inc. @@ -106,11 +106,13 @@ * NOTE: ff_exclose should generally be set with fd_set_exclose(), not * written to directly, when implementing flags like O_CLOEXEC or * SOCK_CLOEXEC, so that struct filedesc::fd_exclose is updated as - * needed. See PR kern/58855: close-on-exec is broken for dup3 and - * opening cloning devices. + * needed. See PR kern/58822: close-on-exec is broken for dup3 and + * opening cloning devices (fixed). + * Same with fd_set_foclose() for O_CLOFORK, SOCK_CLOFORK, etc. */ typedef struct fdfile { bool ff_exclose; /* :: close on exec (fd_set_exclose) */ + bool ff_foclose; /* :: close on fork (fd_set_foclose) */ bool ff_allocated; /* d: descriptor slot is allocated */ u_int ff_refcnt; /* a: reference count on structure */ struct file *ff_file; /* d: pointer to file if open */ @@ -156,6 +158,7 @@ typedef struct filedesc { int fd_freefile; /* approx. next free file */ int fd_unused; /* unused */ bool fd_exclose; /* non-zero if >0 fd with EXCLOSE */ + bool fd_foclose; /* non-zero if >0 fd with FOCLOSE */ /* * This structure is used when the number of open files is * <= NDFILE, and are then pointed to by the pointers above. @@ -223,10 +226,11 @@ int fd_getsock1(unsigned, struct socket **, file_t **); void fd_putvnode(unsigned); void fd_putsock(unsigned); int fd_close(unsigned); -int fd_dup(file_t *, int, int *, bool); +int fd_dup(file_t *, int, int *, bool, bool); int fd_dup2(file_t *, unsigned, int); int fd_clone(file_t *, unsigned, int, const struct fileops *, void *); void fd_set_exclose(struct lwp *, int, bool); +void fd_set_foclose(struct lwp *, int, bool); int pipe1(struct lwp *, int *, int); int dodup(struct lwp *, int, int, int, register_t *); diff --git a/lib/libc/include/generic-netbsd/sys/futex.h b/lib/libc/include/generic-netbsd/sys/futex.h @@ -1,4 +1,4 @@ -/* $NetBSD: futex.h,v 1.5 2021/09/28 15:05:42 thorpej Exp $ */ +/* $NetBSD: futex.h,v 1.7 2025/03/05 12:02:00 riastradh Exp $ */ /*- * Copyright (c) 2018, 2019 The NetBSD Foundation, Inc. @@ -43,14 +43,14 @@ * 3. All advertising materials mentioning features or use of this software * must display the following acknowledgement: * This product includes software developed by Emmanuel Dreyfus - * 4. The name of the author may not be used to endorse or promote - * products derived from this software without specific prior written + * 4. The name of the author may not be used to endorse or promote + * products derived from this software without specific prior written * permission. * - * THIS SOFTWARE IS PROVIDED BY THE THE AUTHOR AND CONTRIBUTORS ``AS IS'' - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THIS SOFTWARE IS PROVIDED BY THE THE AUTHOR AND CONTRIBUTORS ``AS IS'' + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS @@ -72,7 +72,7 @@ #include <sys/timespec.h> -#define FUTEX_WAIT 0 +#define FUTEX_WAIT 0 #define FUTEX_WAKE 1 #define FUTEX_FD 2 #define FUTEX_REQUEUE 3 @@ -98,10 +98,10 @@ #define FUTEX_OP_CMPARG_MASK __BITS(0,11) #define FUTEX_OP(op, oparg, cmp, cmparg) \ - (__SHIFTIN(op, FUTEX_OP_OP_MASK) |\ - __SHIFTIN(oparg, FUTEX_OP_OPARG_MASK) |\ - __SHIFTIN(cmp, FUTEX_OP_CMP_MASK) |\ - __SHIFTIN(cmparg, FUTEX_OP_CMPARG_MASK)) + (__SHIFTIN((op) & 0xf, FUTEX_OP_OP_MASK) |\ + __SHIFTIN((oparg) & 0xfff, FUTEX_OP_OPARG_MASK)|\ + __SHIFTIN((cmp) & 0xf, FUTEX_OP_CMP_MASK) |\ + __SHIFTIN((cmparg) & 0xfff, FUTEX_OP_CMPARG_MASK)) #define FUTEX_OP_SET 0 #define FUTEX_OP_ADD 1 diff --git a/lib/libc/include/generic-netbsd/sys/ieee754.h b/lib/libc/include/generic-netbsd/sys/ieee754.h @@ -1,4 +1,4 @@ -/* $NetBSD: ieee754.h,v 1.17 2020/04/16 22:13:51 christos Exp $ */ +/* $NetBSD: ieee754.h,v 1.18 2024/05/12 10:34:56 rillig Exp $ */ /* * Copyright (c) 1992, 1993 @@ -131,7 +131,7 @@ struct ieee_double { (a)[1] = (uint32_t)((u).extu_ext.ext_fracl >> 32); \ (a)[2] = (uint32_t)((u).extu_ext.ext_frach >> 0); \ (a)[3] = (uint32_t)((u).extu_ext.ext_frach >> 32); \ -} while(/*CONSTCOND*/0) +} while (0) struct ieee_ext { #if _BYTE_ORDER == _BIG_ENDIAN diff --git a/lib/libc/include/generic-netbsd/sys/ipc.h b/lib/libc/include/generic-netbsd/sys/ipc.h @@ -1,4 +1,4 @@ -/* $NetBSD: ipc.h,v 1.37 2018/06/23 07:23:06 gson Exp $ */ +/* $NetBSD: ipc.h,v 1.38 2024/05/12 10:34:56 rillig Exp $ */ /* * Copyright (c) 1988 University of Utah. @@ -131,7 +131,7 @@ __END_DECLS (dst).cgid = (src).cgid; \ (dst).mode = (src).mode; \ (dst)._seq = (src)._seq; \ -} while (/*CONSTCOND*/ 0) +} while (0) /* * Set-up the sysctl routine for COMPAT_50 diff --git a/lib/libc/include/generic-netbsd/sys/ipmi.h b/lib/libc/include/generic-netbsd/sys/ipmi.h @@ -1,4 +1,4 @@ -/* $NetBSD: ipmi.h,v 1.1 2019/05/18 08:38:00 mlelstv Exp $ */ +/* $NetBSD: ipmi.h,v 1.2 2024/12/04 15:25:30 riastradh Exp $ */ /*- * Copyright (c) 2019 The NetBSD Foundation, Inc. @@ -32,6 +32,8 @@ #ifndef _SYS_IPMI_H_ #define _SYS_IPMI_H_ +#include <sys/ioccom.h> + #define IPMI_MAX_ADDR_SIZE 0x20 #define IPMI_MAX_RX 1024 #define IPMI_BMC_SLAVE_ADDR 0x20 @@ -99,7 +101,7 @@ struct ipmi_ipmb_addr { #define IPMICTL_SET_GETS_EVENTS_CMD _IOW('i', 16, int) #define IPMICTL_SET_MY_ADDRESS_CMD _IOW('i', 17, unsigned int) #define IPMICTL_GET_MY_ADDRESS_CMD _IOR('i', 18, unsigned int) -#define IPMICTL_SET_MY_LUN_CMD _IOW('i', 19, unsigned int) +#define IPMICTL_SET_MY_LUN_CMD _IOW('i', 19, unsigned int) #define IPMICTL_GET_MY_LUN_CMD _IOR('i', 20, unsigned int) #endif /* !_SYS_IPMI_H_ */ \ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/sys/ksem.h b/lib/libc/include/generic-netbsd/sys/ksem.h @@ -1,4 +1,4 @@ -/* $NetBSD: ksem.h,v 1.15.30.1 2023/08/09 17:42:01 martin Exp $ */ +/* $NetBSD: ksem.h,v 1.17 2023/07/11 11:37:29 riastradh Exp $ */ /* * Copyright (c) 2002 Alfred Perlstein <alfred@FreeBSD.org> diff --git a/lib/libc/include/generic-netbsd/sys/ktrace.h b/lib/libc/include/generic-netbsd/sys/ktrace.h @@ -1,4 +1,4 @@ -/* $NetBSD: ktrace.h,v 1.68 2022/06/29 22:10:43 riastradh Exp $ */ +/* $NetBSD: ktrace.h,v 1.71 2025/04/06 19:13:06 riastradh Exp $ */ /* * Copyright (c) 1988, 1993 @@ -34,6 +34,8 @@ #ifndef _SYS_KTRACE_H_ #define _SYS_KTRACE_H_ +#include <sys/param.h> + #include <sys/mutex.h> #include <sys/lwp.h> #include <sys/signal.h> @@ -265,9 +267,9 @@ struct ktr_execfd { "b\16MIB\0" \ "b\17EXEC_FD\0" \ "f\30\4VERSION\0" \ - "b\36TRC_EMUL\0" \ - "b\37INHERIT\0" \ - "b\40PERSISTENT\0" + "b\34TRC_EMUL\0" \ + "b\36INHERIT\0" \ + "b\37PERSISTENT\0" /* * trace flags (also in p_traceflags) diff --git a/lib/libc/include/generic-netbsd/sys/lock.h b/lib/libc/include/generic-netbsd/sys/lock.h @@ -1,4 +1,4 @@ -/* $NetBSD: lock.h,v 1.92 2022/07/24 20:28:39 riastradh Exp $ */ +/* $NetBSD: lock.h,v 1.94 2024/05/12 10:45:13 rillig Exp $ */ /*- * Copyright (c) 1999, 2000, 2006, 2007 The NetBSD Foundation, Inc. @@ -69,7 +69,7 @@ do { \ } \ if ((count) < SPINLOCK_BACKOFF_MAX) \ (count) += (count); \ -} while (/* CONSTCOND */ 0); +} while (0) #ifdef LOCKDEBUG #define SPINLOCK_SPINOUT(spins) ((spins)++ > 0x0fffffff) diff --git a/lib/libc/include/generic-netbsd/sys/lua.h b/lib/libc/include/generic-netbsd/sys/lua.h @@ -1,4 +1,4 @@ -/* $NetBSD: lua.h,v 1.8.48.1 2023/08/09 17:42:01 martin Exp $ */ +/* $NetBSD: lua.h,v 1.9 2023/07/11 14:57:21 martin Exp $ */ /* * Copyright (c) 2014 by Lourival Vieira Neto <lneto@NetBSD.org>. diff --git a/lib/libc/include/generic-netbsd/sys/lwp.h b/lib/libc/include/generic-netbsd/sys/lwp.h @@ -1,7 +1,7 @@ -/* $NetBSD: lwp.h,v 1.217 2022/07/23 19:15:29 mrg Exp $ */ +/* $NetBSD: lwp.h,v 1.231 2023/11/02 10:31:55 martin Exp $ */ /* - * Copyright (c) 2001, 2006, 2007, 2008, 2009, 2010, 2019, 2020 + * Copyright (c) 2001, 2006, 2007, 2008, 2009, 2010, 2019, 2020, 2023 * The NetBSD Foundation, Inc. * All rights reserved. * @@ -36,17 +36,18 @@ #if defined(_KERNEL) || defined(_KMEMUSER) #include <sys/param.h> -#include <sys/time.h> -#include <sys/queue.h> + #include <sys/callout.h> +#include <sys/condvar.h> #include <sys/kcpuset.h> #include <sys/mutex.h> -#include <sys/condvar.h> -#include <sys/signalvar.h> +#include <sys/queue.h> +#include <sys/resource.h> #include <sys/sched.h> +#include <sys/signalvar.h> #include <sys/specificdata.h> -#include <sys/syncobj.h> -#include <sys/resource.h> +#include <sys/time.h> +#include <sys/wchan.h> #if defined(_KERNEL) struct lwp; @@ -109,10 +110,8 @@ struct lwp { u_int l_rticksum; /* l: Sum of ticks spent running */ u_int l_slpticks; /* l: Saved start time of sleep */ u_int l_slpticksum; /* l: Sum of ticks spent sleeping */ - int l_biglocks; /* l: biglock count before sleep */ int l_class; /* l: scheduling class */ - int l_kpriority; /* !: has kernel priority boost */ - pri_t l_kpribase; /* !: kernel priority base level */ + pri_t l_boostpri; /* l: boosted priority after blocking */ pri_t l_priority; /* l: scheduler priority */ pri_t l_inheritedprio;/* l: inherited priority */ pri_t l_protectprio; /* l: for PTHREAD_PRIO_PROTECT */ @@ -122,8 +121,6 @@ struct lwp { psetid_t l_psid; /* l: assigned processor-set ID */ fixpt_t l_pctcpu; /* p: %cpu during l_swtime */ fixpt_t l_estcpu; /* l: cpu time for SCHED_4BSD */ - volatile uint64_t l_ncsw; /* l: total context switches */ - volatile uint64_t l_nivcsw; /* l: involuntary context switches */ SLIST_HEAD(, turnstile) l_pi_lenders; /* l: ts lending us priority */ struct cpu_info *l_target_cpu; /* l: target CPU to migrate */ struct lwpctl *l_lwpctl; /* p: lwpctl block kernel address */ @@ -131,7 +128,7 @@ struct lwp { kcpuset_t *l_affinity; /* l: CPU set for affinity */ /* Synchronisation. */ - struct syncobj *l_syncobj; /* l: sync object operations set */ + const struct syncobj *l_syncobj;/* l: sync object operations set */ LIST_ENTRY(lwp) l_sleepchain; /* l: sleep queue */ wchan_t l_wchan; /* l: sleep address */ const char *l_wmesg; /* l: reason for sleep */ @@ -267,6 +264,7 @@ extern int maxlwp __read_mostly; /* max number of lwps */ #define LW_WEXIT 0x00100000 /* Exit before return to user */ #define LW_PENDSIG 0x01000000 /* Pending signal for us */ #define LW_CANCELLED 0x02000000 /* tsleep should not sleep */ +#define LW_CACHECRED 0x04000000 /* Cache new process credential */ #define LW_WREBOOT 0x08000000 /* System is rebooting, please suspend */ #define LW_UNPARKED 0x10000000 /* Unpark op pending */ #define LW_RUMP_CLEAR 0x40000000 /* Clear curlwp in RUMP scheduler */ @@ -299,15 +297,14 @@ extern int maxlwp __read_mostly; /* max number of lwps */ * with p_lock held. */ #define LPR_DETACHED 0x00800000 /* Won't be waited for. */ -#define LPR_CRMOD 0x00000100 /* Credentials modified */ #define LPR_DRAINING 0x80000000 /* Draining references before exiting */ /* * Mask indicating that there is "exceptional" work to be done on return to * user. */ -#define LW_USERRET \ - (LW_WEXIT | LW_PENDSIG | LW_WREBOOT | LW_WSUSPEND | LW_WCORE | LW_LWPCTL) +#define LW_USERRET (LW_WEXIT | LW_PENDSIG | LW_WREBOOT | LW_WSUSPEND \ + | LW_WCORE | LW_LWPCTL | LW_CACHECRED) /* * Status values. @@ -338,23 +335,21 @@ lwp_getpcb(struct lwp *l) #endif /* _KERNEL || _KMEMUSER */ #ifdef _KERNEL -#define LWP_CACHE_CREDS(l, p) \ -do { \ - (void)p; \ - if (__predict_false((l)->l_prflag & LPR_CRMOD)) \ - lwp_update_creds(l); \ -} while (/* CONSTCOND */ 0) - void lwpinit(void); void lwp0_init(void); void lwp_startup(lwp_t *, lwp_t *); void startlwp(void *); +void lwp_lock(lwp_t *); +void lwp_unlock(lwp_t *); +pri_t lwp_eprio(lwp_t *); int lwp_locked(lwp_t *, kmutex_t *); kmutex_t *lwp_setlock(lwp_t *, kmutex_t *); void lwp_unlock_to(lwp_t *, kmutex_t *); int lwp_trylock(lwp_t *); +void lwp_changepri(lwp_t *, pri_t); +void lwp_lendpri(lwp_t *, pri_t); void lwp_addref(lwp_t *); void lwp_delref(lwp_t *); void lwp_delref2(lwp_t *); @@ -370,14 +365,13 @@ void lwp_exit(lwp_t *); int lwp_suspend(lwp_t *, lwp_t *); int lwp_create1(lwp_t *, const void *, size_t, u_long, lwpid_t *); void lwp_start(lwp_t *, int); -void lwp_update_creds(lwp_t *); void lwp_migrate(lwp_t *, struct cpu_info *); lwp_t * lwp_find2(pid_t, lwpid_t); lwp_t * lwp_find(proc_t *, int); void lwp_userret(lwp_t *); void lwp_need_userret(lwp_t *); void lwp_free(lwp_t *, bool, bool); -uint64_t lwp_pctr(void); +long lwp_pctr(void); int lwp_setprivate(lwp_t *, void *); int do_lwp_create(lwp_t *, void *, u_long, lwp_t **, const sigset_t *, const stack_t *); @@ -403,67 +397,6 @@ int lwp_unpark(const lwpid_t *, const u_int); /* DDB. */ void lwp_whatis(uintptr_t, void (*)(const char *, ...) __printflike(1, 2)); -/* - * Lock an LWP. XXX _MODULE - */ -static __inline void -lwp_lock(lwp_t *l) -{ - kmutex_t *old = atomic_load_consume(&l->l_mutex); - - /* - * Note: mutex_spin_enter() will have posted a read barrier. - * Re-test l->l_mutex. If it has changed, we need to try again. - */ - mutex_spin_enter(old); - while (__predict_false(atomic_load_relaxed(&l->l_mutex) != old)) { - mutex_spin_exit(old); - old = atomic_load_consume(&l->l_mutex); - mutex_spin_enter(old); - } -} - -/* - * Unlock an LWP. XXX _MODULE - */ -static __inline void -lwp_unlock(lwp_t *l) -{ - mutex_spin_exit(l->l_mutex); -} - -static __inline void -lwp_changepri(lwp_t *l, pri_t pri) -{ - KASSERT(mutex_owned(l->l_mutex)); - - if (l->l_priority == pri) - return; - - (*l->l_syncobj->sobj_changepri)(l, pri); - KASSERT(l->l_priority == pri); -} - -static __inline void -lwp_lendpri(lwp_t *l, pri_t pri) -{ - KASSERT(mutex_owned(l->l_mutex)); - - (*l->l_syncobj->sobj_lendpri)(l, pri); - KASSERT(l->l_inheritedprio == pri); -} - -static __inline pri_t -lwp_eprio(lwp_t *l) -{ - pri_t pri; - - pri = l->l_priority; - if ((l->l_flag & LW_SYSTEM) == 0 && l->l_kpriority && pri < PRI_KERNEL) - pri = (pri >> 1) + l->l_kpribase; - return MAX(l->l_auxprio, pri); -} - int lwp_create(lwp_t *, struct proc *, vaddr_t, int, void *, size_t, void (*)(void *), void *, lwp_t **, int, const sigset_t *, const stack_t *); @@ -539,8 +472,9 @@ CURCPU_IDLE_P(void) static __inline void KPREEMPT_DISABLE(lwp_t *l) { + struct lwp *l1 __diagused; - KASSERT(l == curlwp); + KASSERTMSG(l == (l1 = curlwp), "l=%p curlwp=%p", l, l1); l->l_nopreempt++; __insn_barrier(); } @@ -548,16 +482,15 @@ KPREEMPT_DISABLE(lwp_t *l) static __inline void KPREEMPT_ENABLE(lwp_t *l) { + struct lwp *l1 __diagused; - KASSERT(l == curlwp); + KASSERTMSG(l == (l1 = curlwp), "l=%p curlwp=%p", l, l1); KASSERT(l->l_nopreempt > 0); __insn_barrier(); - if (--l->l_nopreempt != 0) - return; + l->l_nopreempt--; __insn_barrier(); if (__predict_false(l->l_dopreempt)) kpreempt(0); - __insn_barrier(); } /* For lwp::l_dopreempt */ diff --git a/lib/libc/include/generic-netbsd/sys/mbuf.h b/lib/libc/include/generic-netbsd/sys/mbuf.h @@ -1,4 +1,4 @@ -/* $NetBSD: mbuf.h,v 1.237 2022/12/16 08:42:55 msaitoh Exp $ */ +/* $NetBSD: mbuf.h,v 1.240 2024/05/12 10:34:56 rillig Exp $ */ /* * Copyright (c) 1996, 1997, 1999, 2001, 2007 The NetBSD Foundation, Inc. @@ -226,7 +226,7 @@ struct pkthdr { #define M_CSUM_BITS \ "\20\1TCPv4\2UDPv4\3TCP_UDP_BAD\4DATA\5TCPv6\6UDPv6\7IPv4\10IPv4_BAD" \ - "\11TSOv4\12TSOv6\39BLANK\40NO_PSEUDOHDR" + "\11TSOv4\12TSOv6\37BLANK\40NO_PSEUDOHDR" /* * Macros for manipulating csum_data on outgoing packets. These are @@ -459,7 +459,7 @@ do { \ KASSERT(((m)->m_flags & M_EXT) == 0); \ (m)->m_ext_ref = (m); \ (m)->m_ext.ext_refcnt = 1; \ -} while (/* CONSTCOND */ 0) +} while (0) /* * Macros for mbuf external storage. @@ -489,7 +489,7 @@ do { \ (m)->m_ext.ext_arg = NULL; \ mowner_ref((m), M_EXT); \ } \ -} while (/* CONSTCOND */ 0) +} while (0) #define MEXTADD(m, buf, size, type, free, arg) \ do { \ @@ -500,7 +500,7 @@ do { \ (m)->m_ext.ext_free = (free); \ (m)->m_ext.ext_arg = (arg); \ mowner_ref((m), M_EXT); \ -} while (/* CONSTCOND */ 0) +} while (0) #define M_BUFADDR(m) \ (((m)->m_flags & M_EXT) ? (m)->m_ext.ext_buf : \ @@ -573,7 +573,7 @@ do { \ (m) = m_prepend((m), (plen), (how)); \ if ((m) && (m)->m_flags & M_PKTHDR) \ (m)->m_pkthdr.len += (plen); \ -} while (/* CONSTCOND */ 0) +} while (0) /* change mbuf to new type */ #define MCHTYPE(m, t) \ @@ -582,7 +582,7 @@ do { \ mbstat_type_add((m)->m_type, -1); \ mbstat_type_add(t, 1); \ (m)->m_type = t; \ -} while (/* CONSTCOND */ 0) +} while (0) #ifdef DIAGNOSTIC #define M_VERIFY_PACKET(m) m_verify_packet(m) @@ -623,7 +623,7 @@ do { \ (m) = NULL; \ } \ } \ -} while (/*CONSTCOND*/ 0) +} while (0) #endif /* defined(_KERNEL) */ @@ -644,19 +644,19 @@ struct name { \ #define MBUFQ_INIT(q) do { \ (q)->mq_first = NULL; \ (q)->mq_last = &(q)->mq_first; \ -} while (/*CONSTCOND*/0) +} while (0) #define MBUFQ_ENQUEUE(q, m) do { \ (m)->m_nextpkt = NULL; \ *(q)->mq_last = (m); \ (q)->mq_last = &(m)->m_nextpkt; \ -} while (/*CONSTCOND*/0) +} while (0) #define MBUFQ_PREPEND(q, m) do { \ if (((m)->m_nextpkt = (q)->mq_first) == NULL) \ (q)->mq_last = &(m)->m_nextpkt; \ (q)->mq_first = (m); \ -} while (/*CONSTCOND*/0) +} while (0) #define MBUFQ_DEQUEUE(q, m) do { \ if (((m) = (q)->mq_first) != NULL) { \ @@ -665,7 +665,7 @@ struct name { \ else \ (m)->m_nextpkt = NULL; \ } \ -} while (/*CONSTCOND*/0) +} while (0) #define MBUFQ_DRAIN(q) do { \ struct mbuf *__m0; \ @@ -674,7 +674,7 @@ struct name { \ m_freem(__m0); \ } \ (q)->mq_last = &(q)->mq_first; \ -} while (/*CONSTCOND*/0) +} while (0) #define MBUFQ_FIRST(q) ((q)->mq_first) #define MBUFQ_NEXT(m) ((m)->m_nextpkt) @@ -740,6 +740,8 @@ struct mbuf *m_devget(char *, int, int, struct ifnet *); struct mbuf *m_dup(struct mbuf *, int, int, int); struct mbuf *m_get(int, int); struct mbuf *m_gethdr(int, int); +struct mbuf *m_get_n(int, int, size_t, size_t); +struct mbuf *m_gethdr_n(int, int, size_t, size_t); struct mbuf *m_prepend(struct mbuf *,int, int); struct mbuf *m_pulldown(struct mbuf *, int, int, int *); struct mbuf *m_pullup(struct mbuf *, int); diff --git a/lib/libc/include/generic-netbsd/sys/mman.h b/lib/libc/include/generic-netbsd/sys/mman.h @@ -1,4 +1,4 @@ -/* $NetBSD: mman.h,v 1.62 2019/12/06 19:37:43 christos Exp $ */ +/* $NetBSD: mman.h,v 1.65.4.1 2025/11/20 19:27:16 martin Exp $ */ /*- * Copyright (c) 1982, 1986, 1993 @@ -157,7 +157,7 @@ typedef __off_t off_t; /* file offset */ ":\060" "ALIGN=256TB\0" \ ":\064" "ALIGN=4PB\0" \ ":\070" "ALIGN=64PB\0" \ - ":\074" "ALIGN=256PB\0" \ + ":\074" "ALIGN=1EB\0" \ "*" "ALIGN=2^%ju\0" #endif @@ -212,7 +212,14 @@ typedef __off_t off_t; /* file offset */ implemented in UVM */ #define MAP_INHERIT_ZERO 4 /* zero in child */ #define MAP_INHERIT_DEFAULT MAP_INHERIT_COPY -#endif + +/* + * Flags to memfd_create + */ +#define MFD_CLOEXEC 0x1U +#define MFD_ALLOW_SEALING 0x2U +#define MFD_CLOFORK 0x4U +#endif /* _NETBSD_SOURCE */ #ifndef _KERNEL @@ -234,6 +241,7 @@ int madvise(void *, size_t, int); int mincore(void *, size_t, char *); int minherit(void *, size_t, int); void * mremap(void *, size_t, void *, size_t, int); +int memfd_create(const char *, unsigned int); #endif int posix_madvise(void *, size_t, int); int shm_open(const char *, int, mode_t); diff --git a/lib/libc/include/generic-netbsd/sys/mount.h b/lib/libc/include/generic-netbsd/sys/mount.h @@ -1,4 +1,4 @@ -/* $NetBSD: mount.h,v 1.240 2022/11/04 11:20:40 hannken Exp $ */ +/* $NetBSD: mount.h,v 1.241 2023/04/22 14:30:54 hannken Exp $ */ /* * Copyright (c) 1989, 1991, 1993 @@ -141,7 +141,6 @@ struct mount { struct vfsops *mnt_op; /* operations on fs */ struct vnode *mnt_vnodecovered; /* vnode we mounted on */ struct mount *mnt_lower; /* fs mounted on */ - void *mnt_transinfo; /* for FS-internal use */ void *mnt_data; /* private data */ kmutex_t *mnt_renamelock; /* per-fs rename lock */ int mnt_flag; /* flags */ diff --git a/lib/libc/include/generic-netbsd/sys/msg.h b/lib/libc/include/generic-netbsd/sys/msg.h @@ -1,4 +1,4 @@ -/* $NetBSD: msg.h,v 1.28 2019/08/07 00:38:02 pgoyette Exp $ */ +/* $NetBSD: msg.h,v 1.30 2024/05/12 10:34:56 rillig Exp $ */ /*- * Copyright (c) 1999, 2007 The NetBSD Foundation, Inc. @@ -76,7 +76,7 @@ typedef unsigned long msgqnum_t; typedef size_t msglen_t; struct msqid_ds { - struct ipc_perm msg_perm; /* operation permission strucure */ + struct ipc_perm msg_perm; /* operation permission structure */ msgqnum_t msg_qnum; /* number of messages in the queue */ msglen_t msg_qbytes; /* max # of bytes in the queue */ pid_t msg_lspid; /* process ID of last msgsend() */ @@ -191,7 +191,7 @@ extern kmutex_t msgmutex; (dst).msg_stime = (src).msg_stime; \ (dst).msg_rtime = (src).msg_rtime; \ (dst).msg_ctime = (src).msg_ctime; \ -} while (/*CONSTCOND*/ 0) +} while (0) #endif /* _KERNEL */ diff --git a/lib/libc/include/generic-netbsd/sys/mutex.h b/lib/libc/include/generic-netbsd/sys/mutex.h @@ -1,4 +1,4 @@ -/* $NetBSD: mutex.h,v 1.26 2022/10/26 23:21:20 riastradh Exp $ */ +/* $NetBSD: mutex.h,v 1.28 2023/09/07 20:05:41 ad Exp $ */ /*- * Copyright (c) 2002, 2006, 2007, 2008, 2009, 2019 The NetBSD Foundation, Inc. @@ -199,8 +199,6 @@ int mutex_tryenter(kmutex_t *); int mutex_owned(const kmutex_t *); int mutex_ownable(const kmutex_t *); -lwp_t *mutex_owner(const kmutex_t *); -bool mutex_owner_running(const kmutex_t *); void mutex_obj_init(void); kmutex_t *mutex_obj_alloc(kmutex_type_t, int); diff --git a/lib/libc/include/generic-netbsd/sys/namei.h b/lib/libc/include/generic-netbsd/sys/namei.h @@ -1,11 +1,11 @@ -/* $NetBSD: namei.h,v 1.115 2021/06/29 22:40:06 dholland Exp $ */ +/* $NetBSD: namei.h,v 1.120 2024/07/01 00:58:43 christos Exp $ */ /* * WARNING: GENERATED FILE. DO NOT EDIT * (edit namei.src and run make namei in src/sys/sys) * by: NetBSD: gennameih.awk,v 1.5 2009/12/23 14:17:19 pooka Exp - * from: NetBSD: namei.src,v 1.60 2021/06/29 22:39:21 dholland Exp + * from: NetBSD: namei.src,v 1.65 2024/07/01 00:58:05 christos Exp */ /* @@ -208,12 +208,24 @@ struct nameidata { #define NCHNAMLEN sizeof(((struct namecache *)NULL)->nc_name) /* + * The uintptr_t-sized key value computed for each name consists of name + * length and a hash value. On 32-bit platforms the top NC_NLEN_BITS of + * the 32-bit hash value is lobbed off. + */ + +#define NC_NLEN_BITS 11 +#define NC_NLEN_MASK ((1 << NC_NLEN_BITS) - 1) +#define NC_NLEN(ncp) ((ncp)->nc_key & NC_NLEN_MASK) + +/* * Namecache entry. * * This structure describes the elements in the cache of recent names looked - * up by namei. It's carefully sized to take up 128 bytes on _LP64, to make - * good use of space and the CPU caches. Items used during RB tree lookup - * (nc_tree, nc_key) are clustered at the start of the structure. + * up by namei. It's carefully sized to take up 128 bytes on _LP64 and 64 + * bytes on 32-bit machines, to make good use of space and the CPU caches. + * + * Items used during RB tree lookup (nc_tree, nc_key) are clustered at the + * start of the structure to minimise cache misses during lookup. * * Field markings and their corresponding locks: * @@ -224,28 +236,29 @@ struct nameidata { */ struct namecache { struct rb_node nc_tree; /* d red-black tree, must be first */ - uint64_t nc_key; /* - hashed key value */ + uintptr_t nc_key; /* - hashed key value */ TAILQ_ENTRY(namecache) nc_list; /* v nc_vp's list of cache entries */ TAILQ_ENTRY(namecache) nc_lru; /* l pseudo-lru chain */ struct vnode *nc_dvp; /* - vnode of parent of name */ struct vnode *nc_vp; /* - vnode the name refers to */ - int nc_lrulist; /* l which LRU list it's on */ - u_short nc_nlen; /* - length of the name */ - char nc_whiteout; /* - true if a whiteout */ - char nc_name[41]; /* - segment name */ -}; + u_char nc_lrulist; /* l LRU list entry is on */ + u_char nc_whiteout; /* - whiteout indicator */ +#ifdef _LP64 + char nc_name[46]; /* - segment name */ +#else + char nc_name[22]; /* - segment name */ #endif +}; +#endif /* __NAMECACHE_PRIVATE */ #ifdef _KERNEL -#include <sys/pool.h> +#include <sys/kmem.h> struct mount; struct cpu_info; -extern pool_cache_t pnbuf_cache; /* pathname buffer cache */ - -#define PNBUF_GET() ((char *)pool_cache_get(pnbuf_cache, PR_WAITOK)) -#define PNBUF_PUT(pnb) pool_cache_put(pnbuf_cache, (void *)(pnb)) +#define PNBUF_GET() ((char *)kmem_alloc(MAXPATHLEN, KM_SLEEP)) +#define PNBUF_PUT(pnb) kmem_free((pnb), MAXPATHLEN) /* * Typesafe flags for namei_simple/nameiat_simple. @@ -267,7 +280,7 @@ extern const namei_simple_flags_t * * namei_simple_kernel takes a kernel-space path as the first argument. * namei_simple_user takes a user-space path as the first argument. - * The nameiat_simple_* variants handle relative path using the given + * The nameiat_simple* variants handle relative path using the given * directory vnode instead of current directory. * * A namei call can be converted to namei_simple_* if: @@ -278,6 +291,8 @@ extern const namei_simple_flags_t */ int namei_simple_kernel(const char *, namei_simple_flags_t, struct vnode **); int namei_simple_user(const char *, namei_simple_flags_t, struct vnode **); +int nameiat_simple(struct vnode *, struct pathbuf *, namei_simple_flags_t, + struct vnode **); int nameiat_simple_kernel(struct vnode *, const char *, namei_simple_flags_t, struct vnode **); int nameiat_simple_user(struct vnode *, const char *, namei_simple_flags_t, diff --git a/lib/libc/include/generic-netbsd/sys/param.h b/lib/libc/include/generic-netbsd/sys/param.h @@ -1,4 +1,4 @@ -/* $NetBSD: param.h,v 1.722.2.10 2024/12/16 12:48:46 martin Exp $ */ +/* $NetBSD: param.h,v 1.738.2.5 2026/05/12 04:23:51 martin Exp $ */ /*- * Copyright (c) 1982, 1986, 1989, 1993 @@ -395,13 +395,16 @@ #define MAXFRAG 8 /* - * MAXPATHLEN defines the longest permissible path length after expanding - * symbolic links. It is used to allocate a temporary buffer from the buffer - * pool in which to do the name expansion, hence should be a power of two, - * and must be less than or equal to MAXBSIZE. MAXSYMLINKS defines the - * maximum number of symbolic links that may be expanded in a path name. - * It should be set high enough to allow all legitimate uses, but halt - * infinite loops reasonably quickly. + * MAXPATHLEN defines the longest permissible path length after + * expanding symbolic links, including a trailing null terminator + * byte. It is used to allocate a temporary buffer from the buffer + * pool in which to do the name expansion, hence should be a power of + * two, and must be less than or equal to MAXBSIZE. It must be the + * same as PATH_MAX from <limits.h>. + * + * MAXSYMLINKS defines the maximum number of symbolic links that may + * be expanded in a path name. It should be set high enough to allow + * all legitimate uses, but halt infinite loops reasonably quickly. * * MAXSYMLINKS should be >= _POSIX_SYMLOOP_MAX (see <limits.h>) */ diff --git a/lib/libc/include/generic-netbsd/sys/pipe.h b/lib/libc/include/generic-netbsd/sys/pipe.h @@ -1,4 +1,4 @@ -/* $NetBSD: pipe.h,v 1.38 2021/01/25 19:21:11 dholland Exp $ */ +/* $NetBSD: pipe.h,v 1.42 2023/11/02 10:31:55 martin Exp $ */ /* * Copyright (c) 1996 John S. Dyson @@ -24,7 +24,7 @@ */ #ifndef _SYS_PIPE_H_ -#define _SYS_PIPE_H_ +#define _SYS_PIPE_H_ #include <sys/selinfo.h> /* for struct selinfo */ #include <sys/time.h> /* for struct timespec */ @@ -35,11 +35,11 @@ * Pipe buffer size, keep moderate in value, pipes take kva space. */ #ifndef PIPE_SIZE -#define PIPE_SIZE 16384 +#define PIPE_SIZE 16384 #endif #ifndef BIG_PIPE_SIZE -#define BIG_PIPE_SIZE (4*PIPE_SIZE) +#define BIG_PIPE_SIZE (4*PIPE_SIZE) #endif /* @@ -48,7 +48,7 @@ * size. */ #ifndef PIPE_DIRECT_CHUNK -#define PIPE_DIRECT_CHUNK (1*1024*1024) +#define PIPE_DIRECT_CHUNK (1*1024*1024) #endif /* @@ -56,7 +56,7 @@ * than PIPE_BUF. */ #ifndef PIPE_MINDIRECT -#define PIPE_MINDIRECT 8192 +#define PIPE_MINDIRECT 8192 #endif /* @@ -75,9 +75,9 @@ struct pipebuf { /* * Bits in pipe_state. */ -#define PIPE_ASYNC 0x001 /* Async I/O */ -#define PIPE_EOF 0x010 /* Pipe is in EOF condition */ -#define PIPE_SIGNALR 0x020 /* Do selwakeup() on read(2) */ +#define PIPE_ASYNC 0x001 /* Async I/O */ +#define PIPE_EOF 0x010 /* Pipe is in EOF condition */ +#define PIPE_SIGNALR 0x020 /* Do selwakeup() on read(2) */ #define PIPE_LOCKFL 0x100 /* Process has exclusive access to pointers/data. */ /* unused 0x200 */ @@ -98,9 +98,8 @@ struct pipe { struct timespec pipe_atime; /* time of last access */ struct timespec pipe_mtime; /* time of last modify */ struct timespec pipe_btime; /* time of creation */ - pid_t pipe_pgid; /* process group for sigio */ - u_int pipe_waiters; /* number of waiters pending */ struct pipe *pipe_peer; /* link with other direction */ + pid_t pipe_pgid; /* process group for sigio */ u_int pipe_state; /* pipe status info */ int pipe_busy; /* busy flag, to handle rundown */ vaddr_t pipe_kmem; /* preallocated PIPE_SIZE buffer */ diff --git a/lib/libc/include/generic-netbsd/sys/poll.h b/lib/libc/include/generic-netbsd/sys/poll.h @@ -1,4 +1,4 @@ -/* $NetBSD: poll.h,v 1.16 2020/07/17 15:34:16 kamil Exp $ */ +/* $NetBSD: poll.h,v 1.17 2024/11/01 16:37:42 nia Exp $ */ /*- * Copyright (c) 1998 The NetBSD Foundation, Inc. @@ -83,15 +83,21 @@ __BEGIN_DECLS int poll(struct pollfd *, nfds_t, int); __END_DECLS -#ifdef _NETBSD_SOURCE +/* + * IEEE Std 1003.1-2024 (POSIX.1-2024) + */ +#if (_POSIX_C_SOURCE - 0) >= 202405L || (_XOPEN_SOURCE - 0 >= 800) || \ + defined(_NETBSD_SOURCE) #include <sys/sigtypes.h> /* for sigset_t */ struct timespec; __BEGIN_DECLS #ifndef __LIBC12_SOURCE__ +#ifdef _NETBSD_SOURCE int pollts(struct pollfd * __restrict, nfds_t, const struct timespec * __restrict, const sigset_t * __restrict) __RENAME(__pollts50); +#endif int ppoll(struct pollfd * __restrict, nfds_t, const struct timespec * __restrict, const sigset_t * __restrict); #endif /* __LIBC12_SOURCE__ */ diff --git a/lib/libc/include/generic-netbsd/sys/proc.h b/lib/libc/include/generic-netbsd/sys/proc.h @@ -1,7 +1,7 @@ -/* $NetBSD: proc.h,v 1.370.4.2 2023/08/09 17:42:01 martin Exp $ */ +/* $NetBSD: proc.h,v 1.373 2023/10/04 20:52:07 ad Exp $ */ /*- - * Copyright (c) 2006, 2007, 2008, 2020 The NetBSD Foundation, Inc. + * Copyright (c) 2006, 2007, 2008, 2020, 2023 The NetBSD Foundation, Inc. * All rights reserved. * * This code is derived from software contributed to The NetBSD Foundation @@ -252,12 +252,12 @@ struct proc { int p_exitsig; /* l: signal to send to parent on exit */ int p_flag; /* p: PK_* flags */ int p_sflag; /* p: PS_* flags */ - int p_slflag; /* p, l: PSL_* flags */ - int p_lflag; /* l: PL_* flags */ int p_stflag; /* t: PST_* flags */ - char p_stat; /* p: S* process status. */ + short p_slflag; /* l, p: PSL_* flags */ + char p_stat; /* l: S* process status. */ + char p_lflag; /* l: PL_* flags */ char p_trace_enabled;/* p: cached by syscall_intern() */ - char p_pad1[2]; /* unused */ + char p_pad1[3]; /* unused */ pid_t p_pid; /* :: Process identifier. */ LIST_ENTRY(proc) p_pglist; /* l: List of processes in pgrp. */ @@ -414,11 +414,11 @@ struct proc { #define PSL_TRACEPOSIX_SPAWN \ 0x00000020 /* traced process wants posix_spawn events */ -#define PSL_TRACED 0x00000800 /* Debugged process being traced */ -#define PSL_TRACEDCHILD 0x00001000 /* Report process birth */ -#define PSL_CHTRACED 0x00400000 /* Child has been traced & reparented */ -#define PSL_SYSCALL 0x04000000 /* process has PT_SYSCALL enabled */ -#define PSL_SYSCALLEMU 0x08000000 /* cancel in-progress syscall */ +#define PSL_TRACED 0x00000040 /* Debugged process being traced */ +#define PSL_TRACEDCHILD 0x00000080 /* Report process birth */ +#define PSL_CHTRACED 0x00000100 /* Child has been traced & reparented */ +#define PSL_SYSCALL 0x00000200 /* process has PT_SYSCALL enabled */ +#define PSL_SYSCALLEMU 0x00000400 /* cancel in-progress syscall */ /* * Kept in p_stflag and protected by p_stmutex. @@ -429,10 +429,10 @@ struct proc { * Kept in p_lflag and protected by the proc_lock. Access * from process context only. */ -#define PL_CONTROLT 0x00000002 /* Has a controlling terminal */ -#define PL_PPWAIT 0x00000010 /* Parent is waiting for child exec/exit */ -#define PL_SIGCOMPAT 0x00000200 /* Has used compat signal trampoline */ -#define PL_ORPHANPG 0x20000000 /* Member of an orphaned pgrp */ +#define PL_CONTROLT 0x00000001 /* Has a controlling terminal */ +#define PL_PPWAIT 0x00000002 /* Parent is waiting for child exec/exit */ +#define PL_SIGCOMPAT 0x00000004 /* Has used compat signal trampoline */ +#define PL_ORPHANPG 0x00000008 /* Member of an orphaned pgrp */ #if defined(_KMEMUSER) || defined(_KERNEL) diff --git a/lib/libc/include/generic-netbsd/sys/ptrace.h b/lib/libc/include/generic-netbsd/sys/ptrace.h @@ -1,4 +1,4 @@ -/* $NetBSD: ptrace.h,v 1.75 2022/06/08 23:12:27 andvar Exp $ */ +/* $NetBSD: ptrace.h,v 1.77 2025/01/11 19:42:04 christos Exp $ */ /*- * Copyright (c) 1984, 1993 @@ -68,6 +68,9 @@ #define PT_FIRSTMACH 32 /* for machine-specific requests */ #include <machine/ptrace.h> /* machine-specific requests, if any */ +#ifndef PT_MACHDEP_STRINGS +# define PT_MACHDEP_STRINGS +#endif #define PT_STRINGS \ /* 0 */ "PT_TRACE_ME", \ @@ -97,7 +100,12 @@ /* 24 */ "PT_LWPSTATUS", \ /* 25 */ "PT_LWPNEXT", \ /* 26 */ "PT_SET_SIGPASS", \ -/* 27 */ "PT_GET_SIGPASS" +/* 27 */ "PT_GET_SIGPASS", \ +/* 28 */ "*PT_INVALID_28", \ +/* 29 */ "*PT_INVALID_29", \ +/* 30 */ "*PT_INVALID_30", \ +/* 31 */ "*PT_INVALID_31", \ +PT_MACHDEP_STRINGS /* PT_{G,S}EVENT_MASK */ typedef struct ptrace_event { @@ -346,11 +354,20 @@ int ptrace_machdep_dorequest(struct lwp *, struct lwp **, int, typedef int (*ptrace_regrfunc_t)(struct lwp *, void *, size_t *); typedef int (*ptrace_regwfunc_t)(struct lwp *, void *, size_t); -#if defined(PT_SETREGS) || defined(PT_GETREGS) || \ - defined(PT_SETFPREGS) || defined(PT_GETFPREGS) || \ - defined(PT_SETDBREGS) || defined(PT_GETDBREGS) -# define PT_REGISTERS -#endif +#if defined(PTRACE) +# if defined(PT_SETREGS) || defined(PT_GETREGS) +# define PT_REGS +# endif +# if defined(PT_SETFPREGS) || defined(PT_GETFPREGS) +# define PT_FPREGS +# endif +# if defined(PT_SETDBREGS) || defined(PT_GETDBREGS) +# define PT_DBREGS +# endif +# if defined(PT_REGS) || defined(PT_FPREGS) || defined(PT_DBREGS) +# define PT_REGISTERS +# endif +#endif /* PTRACE */ #else /* !_KERNEL */ diff --git a/lib/libc/include/generic-netbsd/sys/ptree.h b/lib/libc/include/generic-netbsd/sys/ptree.h @@ -1,4 +1,4 @@ -/* $NetBSD: ptree.h,v 1.8 2012/10/06 22:15:09 matt Exp $ */ +/* $NetBSD: ptree.h,v 1.9 2024/01/19 18:39:59 christos Exp $ */ /*- * Copyright (c) 2008 The NetBSD Foundation, Inc. @@ -190,5 +190,6 @@ void * ptree_find_filtered_node(pt_tree_t *, const void *, pt_filter_t, void *); ptree_find_filtered_node((pt), (key), NULL, NULL) void ptree_remove_node(pt_tree_t *, void *); void * ptree_iterate(pt_tree_t *, const void *, pt_direction_t); +bool ptree_check(const pt_tree_t *pt); #endif /* _SYS_PTREE_H_ */ \ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/sys/queue.h b/lib/libc/include/generic-netbsd/sys/queue.h @@ -1,4 +1,4 @@ -/* $NetBSD: queue.h,v 1.76 2021/01/16 23:51:51 chs Exp $ */ +/* $NetBSD: queue.h,v 1.77 2024/05/12 10:34:56 rillig Exp $ */ /* * Copyright (c) 1991, 1993 @@ -136,26 +136,26 @@ struct { \ */ #define SLIST_INIT(head) do { \ (head)->slh_first = SLIST_END(head); \ -} while (/*CONSTCOND*/0) +} while (0) #define SLIST_INSERT_AFTER(slistelm, elm, field) do { \ (elm)->field.sle_next = (slistelm)->field.sle_next; \ (slistelm)->field.sle_next = (elm); \ -} while (/*CONSTCOND*/0) +} while (0) #define SLIST_INSERT_HEAD(head, elm, field) do { \ (elm)->field.sle_next = (head)->slh_first; \ (head)->slh_first = (elm); \ -} while (/*CONSTCOND*/0) +} while (0) #define SLIST_REMOVE_AFTER(slistelm, field) do { \ (slistelm)->field.sle_next = \ SLIST_NEXT(SLIST_NEXT((slistelm), field), field); \ -} while (/*CONSTCOND*/0) +} while (0) #define SLIST_REMOVE_HEAD(head, field) do { \ (head)->slh_first = (head)->slh_first->field.sle_next; \ -} while (/*CONSTCOND*/0) +} while (0) #define SLIST_REMOVE(head, elm, type, field) do { \ if ((head)->slh_first == (elm)) { \ @@ -168,7 +168,7 @@ struct { \ curelm->field.sle_next = \ curelm->field.sle_next->field.sle_next; \ } \ -} while (/*CONSTCOND*/0) +} while (0) /* @@ -214,7 +214,7 @@ struct { \ (head2)->lh_first->field.le_prev = &(head2)->lh_first; \ LIST_INIT((head1)); \ } \ -} while (/*CONSTCOND*/0) +} while (0) /* * List functions. @@ -245,7 +245,7 @@ struct { \ #define LIST_INIT(head) do { \ (head)->lh_first = LIST_END(head); \ -} while (/*CONSTCOND*/0) +} while (0) #define LIST_INSERT_AFTER(listelm, elm, field) do { \ QUEUEDEBUG_LIST_OP((listelm), field) \ @@ -255,7 +255,7 @@ struct { \ &(elm)->field.le_next; \ (listelm)->field.le_next = (elm); \ (elm)->field.le_prev = &(listelm)->field.le_next; \ -} while (/*CONSTCOND*/0) +} while (0) #define LIST_INSERT_BEFORE(listelm, elm, field) do { \ QUEUEDEBUG_LIST_OP((listelm), field) \ @@ -263,7 +263,7 @@ struct { \ (elm)->field.le_next = (listelm); \ *(listelm)->field.le_prev = (elm); \ (listelm)->field.le_prev = &(elm)->field.le_next; \ -} while (/*CONSTCOND*/0) +} while (0) #define LIST_INSERT_HEAD(head, elm, field) do { \ QUEUEDEBUG_LIST_INSERT_HEAD((head), (elm), field) \ @@ -271,7 +271,7 @@ struct { \ (head)->lh_first->field.le_prev = &(elm)->field.le_next;\ (head)->lh_first = (elm); \ (elm)->field.le_prev = &(head)->lh_first; \ -} while (/*CONSTCOND*/0) +} while (0) #define LIST_REMOVE(elm, field) do { \ QUEUEDEBUG_LIST_OP((elm), field) \ @@ -280,7 +280,7 @@ struct { \ (elm)->field.le_prev; \ *(elm)->field.le_prev = (elm)->field.le_next; \ QUEUEDEBUG_LIST_POSTREMOVE((elm), field) \ -} while (/*CONSTCOND*/0) +} while (0) #define LIST_REPLACE(elm, elm2, field) do { \ if (((elm2)->field.le_next = (elm)->field.le_next) != NULL) \ @@ -289,7 +289,7 @@ struct { \ (elm2)->field.le_prev = (elm)->field.le_prev; \ *(elm2)->field.le_prev = (elm2); \ QUEUEDEBUG_LIST_POSTREMOVE((elm), field) \ -} while (/*CONSTCOND*/0) +} while (0) /* * Simple queue definitions. @@ -333,36 +333,36 @@ struct { \ #define SIMPLEQ_INIT(head) do { \ (head)->sqh_first = NULL; \ (head)->sqh_last = &(head)->sqh_first; \ -} while (/*CONSTCOND*/0) +} while (0) #define SIMPLEQ_INSERT_HEAD(head, elm, field) do { \ if (((elm)->field.sqe_next = (head)->sqh_first) == NULL) \ (head)->sqh_last = &(elm)->field.sqe_next; \ (head)->sqh_first = (elm); \ -} while (/*CONSTCOND*/0) +} while (0) #define SIMPLEQ_INSERT_TAIL(head, elm, field) do { \ (elm)->field.sqe_next = NULL; \ *(head)->sqh_last = (elm); \ (head)->sqh_last = &(elm)->field.sqe_next; \ -} while (/*CONSTCOND*/0) +} while (0) #define SIMPLEQ_INSERT_AFTER(head, listelm, elm, field) do { \ if (((elm)->field.sqe_next = (listelm)->field.sqe_next) == NULL)\ (head)->sqh_last = &(elm)->field.sqe_next; \ (listelm)->field.sqe_next = (elm); \ -} while (/*CONSTCOND*/0) +} while (0) #define SIMPLEQ_REMOVE_HEAD(head, field) do { \ if (((head)->sqh_first = (head)->sqh_first->field.sqe_next) == NULL) \ (head)->sqh_last = &(head)->sqh_first; \ -} while (/*CONSTCOND*/0) +} while (0) #define SIMPLEQ_REMOVE_AFTER(head, elm, field) do { \ if (((elm)->field.sqe_next = (elm)->field.sqe_next->field.sqe_next) \ == NULL) \ (head)->sqh_last = &(elm)->field.sqe_next; \ -} while (/*CONSTCOND*/0) +} while (0) #define SIMPLEQ_REMOVE(head, elm, type, field) do { \ if ((head)->sqh_first == (elm)) { \ @@ -375,7 +375,7 @@ struct { \ curelm->field.sqe_next->field.sqe_next) == NULL) \ (head)->sqh_last = &(curelm)->field.sqe_next; \ } \ -} while (/*CONSTCOND*/0) +} while (0) #define SIMPLEQ_CONCAT(head1, head2) do { \ if (!SIMPLEQ_EMPTY((head2))) { \ @@ -383,7 +383,7 @@ struct { \ (head1)->sqh_last = (head2)->sqh_last; \ SIMPLEQ_INIT((head2)); \ } \ -} while (/*CONSTCOND*/0) +} while (0) #define SIMPLEQ_LAST(head, type, field) \ (SIMPLEQ_EMPTY((head)) ? \ @@ -485,7 +485,7 @@ struct { \ #define TAILQ_INIT(head) do { \ (head)->tqh_first = TAILQ_END(head); \ (head)->tqh_last = &(head)->tqh_first; \ -} while (/*CONSTCOND*/0) +} while (0) #define TAILQ_INSERT_HEAD(head, elm, field) do { \ QUEUEDEBUG_TAILQ_INSERT_HEAD((head), (elm), field) \ @@ -496,7 +496,7 @@ struct { \ (head)->tqh_last = &(elm)->field.tqe_next; \ (head)->tqh_first = (elm); \ (elm)->field.tqe_prev = &(head)->tqh_first; \ -} while (/*CONSTCOND*/0) +} while (0) #define TAILQ_INSERT_TAIL(head, elm, field) do { \ QUEUEDEBUG_TAILQ_INSERT_TAIL((head), (elm), field) \ @@ -504,7 +504,7 @@ struct { \ (elm)->field.tqe_prev = (head)->tqh_last; \ *(head)->tqh_last = (elm); \ (head)->tqh_last = &(elm)->field.tqe_next; \ -} while (/*CONSTCOND*/0) +} while (0) #define TAILQ_INSERT_AFTER(head, listelm, elm, field) do { \ QUEUEDEBUG_TAILQ_OP((listelm), field) \ @@ -516,7 +516,7 @@ struct { \ (head)->tqh_last = &(elm)->field.tqe_next; \ (listelm)->field.tqe_next = (elm); \ (elm)->field.tqe_prev = &(listelm)->field.tqe_next; \ -} while (/*CONSTCOND*/0) +} while (0) #define TAILQ_INSERT_BEFORE(listelm, elm, field) do { \ QUEUEDEBUG_TAILQ_OP((listelm), field) \ @@ -524,7 +524,7 @@ struct { \ (elm)->field.tqe_next = (listelm); \ *(listelm)->field.tqe_prev = (elm); \ (listelm)->field.tqe_prev = &(elm)->field.tqe_next; \ -} while (/*CONSTCOND*/0) +} while (0) #define TAILQ_REMOVE(head, elm, field) do { \ QUEUEDEBUG_TAILQ_PREREMOVE((head), (elm), field) \ @@ -536,7 +536,7 @@ struct { \ (head)->tqh_last = (elm)->field.tqe_prev; \ *(elm)->field.tqe_prev = (elm)->field.tqe_next; \ QUEUEDEBUG_TAILQ_POSTREMOVE((elm), field); \ -} while (/*CONSTCOND*/0) +} while (0) #define TAILQ_REPLACE(head, elm, elm2, field) do { \ if (((elm2)->field.tqe_next = (elm)->field.tqe_next) != \ @@ -548,7 +548,7 @@ struct { \ (elm2)->field.tqe_prev = (elm)->field.tqe_prev; \ *(elm2)->field.tqe_prev = (elm2); \ QUEUEDEBUG_TAILQ_POSTREMOVE((elm), field); \ -} while (/*CONSTCOND*/0) +} while (0) #define TAILQ_CONCAT(head1, head2, field) do { \ if (!TAILQ_EMPTY(head2)) { \ @@ -557,7 +557,7 @@ struct { \ (head1)->tqh_last = (head2)->tqh_last; \ TAILQ_INIT((head2)); \ } \ -} while (/*CONSTCOND*/0) +} while (0) /* * Singly-linked Tail queue declarations. @@ -590,30 +590,30 @@ struct { \ #define STAILQ_INIT(head) do { \ (head)->stqh_first = NULL; \ (head)->stqh_last = &(head)->stqh_first; \ -} while (/*CONSTCOND*/0) +} while (0) #define STAILQ_INSERT_HEAD(head, elm, field) do { \ if (((elm)->field.stqe_next = (head)->stqh_first) == NULL) \ (head)->stqh_last = &(elm)->field.stqe_next; \ (head)->stqh_first = (elm); \ -} while (/*CONSTCOND*/0) +} while (0) #define STAILQ_INSERT_TAIL(head, elm, field) do { \ (elm)->field.stqe_next = NULL; \ *(head)->stqh_last = (elm); \ (head)->stqh_last = &(elm)->field.stqe_next; \ -} while (/*CONSTCOND*/0) +} while (0) #define STAILQ_INSERT_AFTER(head, listelm, elm, field) do { \ if (((elm)->field.stqe_next = (listelm)->field.stqe_next) == NULL)\ (head)->stqh_last = &(elm)->field.stqe_next; \ (listelm)->field.stqe_next = (elm); \ -} while (/*CONSTCOND*/0) +} while (0) #define STAILQ_REMOVE_HEAD(head, field) do { \ if (((head)->stqh_first = (head)->stqh_first->field.stqe_next) == NULL) \ (head)->stqh_last = &(head)->stqh_first; \ -} while (/*CONSTCOND*/0) +} while (0) #define STAILQ_REMOVE(head, elm, type, field) do { \ if ((head)->stqh_first == (elm)) { \ @@ -626,7 +626,7 @@ struct { \ curelm->field.stqe_next->field.stqe_next) == NULL) \ (head)->stqh_last = &(curelm)->field.stqe_next; \ } \ -} while (/*CONSTCOND*/0) +} while (0) #define STAILQ_FOREACH(var, head, field) \ for ((var) = ((head)->stqh_first); \ @@ -644,7 +644,7 @@ struct { \ (head1)->stqh_last = (head2)->stqh_last; \ STAILQ_INIT((head2)); \ } \ -} while (/*CONSTCOND*/0) +} while (0) #define STAILQ_LAST(head, type, field) \ (STAILQ_EMPTY((head)) ? \ diff --git a/lib/libc/include/generic-netbsd/sys/rbtree.h b/lib/libc/include/generic-netbsd/sys/rbtree.h @@ -1,4 +1,4 @@ -/* $NetBSD: rbtree.h,v 1.5.30.2 2024/10/14 04:47:55 martin Exp $ */ +/* $NetBSD: rbtree.h,v 1.12 2024/05/12 10:34:56 rillig Exp $ */ /*- * Copyright (c) 2001 The NetBSD Foundation, Inc. @@ -93,7 +93,7 @@ typedef struct rb_node { uintptr_t xorinfo = ((a)->rb_info ^ (b)->rb_info) & RB_FLAG_MASK; \ (a)->rb_info ^= xorinfo; \ (b)->rb_info ^= xorinfo; \ - } while (/*CONSTCOND*/ 0) + } while (0) #ifdef RBDEBUG TAILQ_ENTRY(rb_node) rb_link; #endif @@ -124,12 +124,17 @@ TAILQ_HEAD(rb_node_qh, rb_node); #define RB_TAILQ_INSERT_HEAD(a, b, c) TAILQ_INSERT_HEAD(a, b, c) #define RB_TAILQ_INSERT_BEFORE(a, b, c) TAILQ_INSERT_BEFORE(a, b, c) #define RB_TAILQ_INSERT_AFTER(a, b, c, d) TAILQ_INSERT_AFTER(a, b, c, d) + +#define RBDEBUG_TREE_INITIALIZER(t) \ + .rbt_nodes = TAILQ_HEAD_INITIALIZER((t).rbt_nodes), #else -#define RB_TAILQ_REMOVE(a, b, c) do { } while (/*CONSTCOND*/0) -#define RB_TAILQ_INIT(a) do { } while (/*CONSTCOND*/0) -#define RB_TAILQ_INSERT_HEAD(a, b, c) do { } while (/*CONSTCOND*/0) -#define RB_TAILQ_INSERT_BEFORE(a, b, c) do { } while (/*CONSTCOND*/0) -#define RB_TAILQ_INSERT_AFTER(a, b, c, d) do { } while (/*CONSTCOND*/0) +#define RB_TAILQ_REMOVE(a, b, c) do { } while (0) +#define RB_TAILQ_INIT(a) do { } while (0) +#define RB_TAILQ_INSERT_HEAD(a, b, c) do { } while (0) +#define RB_TAILQ_INSERT_BEFORE(a, b, c) do { } while (0) +#define RB_TAILQ_INSERT_AFTER(a, b, c, d) do { } while (0) + +#define RBDEBUG_TREE_INITIALIZER(t) /* nothing */ #endif /* RBDEBUG */ /* @@ -176,10 +181,19 @@ typedef struct rb_tree { #define RBSTAT_INC(v) ((void)((v)++)) #define RBSTAT_DEC(v) ((void)((v)--)) #else -#define RBSTAT_INC(v) do { } while (/*CONSTCOND*/0) -#define RBSTAT_DEC(v) do { } while (/*CONSTCOND*/0) +#define RBSTAT_INC(v) do { } while (0) +#define RBSTAT_DEC(v) do { } while (0) #endif +#define RB_TREE_INIT_TYPECHECK(t) \ + 0*sizeof(&(t) - (struct rb_tree *)0) + +#define RB_TREE_INITIALIZER(t, ops) \ +{ \ + .rbt_ops = (ops) + RB_TREE_INIT_TYPECHECK(t), \ + RBDEBUG_TREE_INITIALIZER(t) \ +} + void rb_tree_init(rb_tree_t *, const rb_tree_ops_t *); void * rb_tree_insert_node(rb_tree_t *, void *); void * rb_tree_find_node(rb_tree_t *, const void *); diff --git a/lib/libc/include/generic-netbsd/sys/resourcevar.h b/lib/libc/include/generic-netbsd/sys/resourcevar.h @@ -1,4 +1,4 @@ -/* $NetBSD: resourcevar.h,v 1.57.32.1 2024/10/11 17:12:28 martin Exp $ */ +/* $NetBSD: resourcevar.h,v 1.59 2024/05/12 10:34:56 rillig Exp $ */ /* * Copyright (c) 1991, 1993 @@ -95,7 +95,7 @@ struct plimit { _p->p_stats->p_prof.pr_addr, \ _p->p_stats->p_prof.pr_ticks); \ _p->p_stats->p_prof.pr_ticks = 0; \ - } while (/* CONSTCOND */ 0) + } while (0) extern char defcorename[]; diff --git a/lib/libc/include/generic-netbsd/sys/rmd160.h b/lib/libc/include/generic-netbsd/sys/rmd160.h @@ -1,4 +1,4 @@ -/* $NetBSD: rmd160.h,v 1.3 2016/07/01 16:43:16 christos Exp $ */ +/* $NetBSD: rmd160.h,v 1.4 2023/08/01 07:04:16 mrg Exp $ */ /* $KAME: rmd160.h,v 1.2 2003/07/25 09:37:55 itojun Exp $ */ /* $OpenBSD: rmd160.h,v 1.3 2002/03/14 01:26:51 millert Exp $ */ /* @@ -47,10 +47,10 @@ void RMD160Transform(uint32_t [5], const u_char [64]); void RMD160Update(RMD160_CTX *, const u_char *, uint32_t); void RMD160Final(u_char [RMD160_DIGEST_LENGTH], RMD160_CTX *); #ifndef _KERNEL -char *RMD160End(RMD160_CTX *, char *); +char *RMD160End(RMD160_CTX *, char[RMD160_DIGEST_STRING_LENGTH]); char *RMD160FileChunk(const char *, char *, off_t, off_t); char *RMD160File(const char *, char *); -char *RMD160Data(const u_char *, size_t, char *); +char *RMD160Data(const u_char *, size_t, char[RMD160_DIGEST_STRING_LENGTH]); #endif /* _KERNEL */ __END_DECLS diff --git a/lib/libc/include/generic-netbsd/sys/rndio.h b/lib/libc/include/generic-netbsd/sys/rndio.h @@ -1,4 +1,4 @@ -/* $NetBSD: rndio.h,v 1.2.50.1 2023/08/11 14:35:25 martin Exp $ */ +/* $NetBSD: rndio.h,v 1.3 2023/07/16 10:36:21 riastradh Exp $ */ /*- * Copyright (c) 1997 The NetBSD Foundation, Inc. diff --git a/lib/libc/include/generic-netbsd/sys/rwlock.h b/lib/libc/include/generic-netbsd/sys/rwlock.h @@ -1,4 +1,4 @@ -/* $NetBSD: rwlock.h,v 1.17.2.1 2023/08/09 17:42:01 martin Exp $ */ +/* $NetBSD: rwlock.h,v 1.19 2023/09/07 20:05:41 ad Exp $ */ /*- * Copyright (c) 2002, 2006, 2007, 2008, 2019, 2020 The NetBSD Foundation, Inc. @@ -84,7 +84,6 @@ typedef struct krwlock krwlock_t; void rw_vector_enter(krwlock_t *, const krw_t); void rw_vector_exit(krwlock_t *); int rw_vector_tryenter(krwlock_t *, const krw_t); -bool rw_owner_running(const krwlock_t *); #endif /* __RWLOCK_PRIVATE */ struct krwlock { diff --git a/lib/libc/include/generic-netbsd/sys/sched.h b/lib/libc/include/generic-netbsd/sys/sched.h @@ -1,4 +1,4 @@ -/* $NetBSD: sched.h,v 1.91.2.1 2023/08/09 17:42:01 martin Exp $ */ +/* $NetBSD: sched.h,v 1.94 2023/09/06 12:29:14 riastradh Exp $ */ /*- * Copyright (c) 1999, 2000, 2001, 2002, 2007, 2008, 2019, 2020 diff --git a/lib/libc/include/generic-netbsd/sys/sdt.h b/lib/libc/include/generic-netbsd/sys/sdt.h @@ -1,4 +1,4 @@ -/* $NetBSD: sdt.h,v 1.15 2022/10/29 14:00:12 riastradh Exp $ */ +/* $NetBSD: sdt.h,v 1.24 2024/06/29 13:03:02 riastradh Exp $ */ /*- * Copyright 2006-2008 John Birrell <jb@FreeBSD.org> @@ -11,7 +11,7 @@ * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. - * + * * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE @@ -37,6 +37,9 @@ #define _DTRACE_VERSION 1 +#define SDT_PROVIDER_DEFINE(prov) +#define SDT_PROVIDER_DECLARE(prov) + #define DTRACE_PROBE(prov, name) do { \ extern void __dtrace_##prov##___##name(void); \ __dtrace_##prov##___##name(); \ @@ -44,37 +47,37 @@ #define DTRACE_PROBE1(prov, name, arg1) do { \ extern void __dtrace_##prov##___##name(unsigned long); \ - __dtrace_##prov##___##name((unsigned long)arg1); \ + __dtrace_##prov##___##name((unsigned long)(arg1)); \ } while (0) #define DTRACE_PROBE2(prov, name, arg1, arg2) do { \ extern void __dtrace_##prov##___##name(unsigned long, \ unsigned long); \ - __dtrace_##prov##___##name((unsigned long)arg1, \ - (unsigned long)arg2); \ + __dtrace_##prov##___##name((unsigned long)(arg1), \ + (unsigned long)(arg2)); \ } while (0) #define DTRACE_PROBE3(prov, name, arg1, arg2, arg3) do { \ extern void __dtrace_##prov##___##name(unsigned long, \ unsigned long, unsigned long); \ - __dtrace_##prov##___##name((unsigned long)arg1, \ - (unsigned long)arg2, (unsigned long)arg3); \ + __dtrace_##prov##___##name((unsigned long)(arg1), \ + (unsigned long)(arg2), (unsigned long)(arg3)); \ } while (0) #define DTRACE_PROBE4(prov, name, arg1, arg2, arg3, arg4) do { \ extern void __dtrace_##prov##___##name(unsigned long, \ unsigned long, unsigned long, unsigned long); \ - __dtrace_##prov##___##name((unsigned long)arg1, \ - (unsigned long)arg2, (unsigned long)arg3, \ - (unsigned long)arg4); \ + __dtrace_##prov##___##name((unsigned long)(arg1), \ + (unsigned long)(arg2), (unsigned long)(arg3), \ + (unsigned long)(arg4)); \ } while (0) #define DTRACE_PROBE5(prov, name, arg1, arg2, arg3, arg4, arg5) do { \ extern void __dtrace_##prov##___##name(unsigned long, \ unsigned long, unsigned long, unsigned long, unsigned long);\ - __dtrace_##prov##___##name((unsigned long)arg1, \ - (unsigned long)arg2, (unsigned long)arg3, \ - (unsigned long)arg4, (unsigned long)arg5); \ + __dtrace_##prov##___##name((unsigned long)(arg1), \ + (unsigned long)(arg2), (unsigned long)(arg3), \ + (unsigned long)(arg4), (unsigned long)(arg5)); \ } while (0) #else /* _KERNEL */ @@ -93,8 +96,14 @@ #define SDT_PROVIDER_DECLARE(prov) #define SDT_PROBE_DEFINE(prov, mod, func, name) #define SDT_PROBE_DECLARE(prov, mod, func, name) -#define SDT_PROBE(prov, mod, func, name, arg0, arg1, arg2, arg3, arg4) \ - __nothing +#define SDT_PROBE(prov, mod, func, name, arg0, arg1, arg2, arg3, arg4) do \ +{ \ + __MACROUSE((uintptr_t)(arg0)); \ + __MACROUSE((uintptr_t)(arg1)); \ + __MACROUSE((uintptr_t)(arg2)); \ + __MACROUSE((uintptr_t)(arg3)); \ + __MACROUSE((uintptr_t)(arg4)); \ +} while (0) #define SDT_PROBE_ARGTYPE(prov, mod, func, name, num, type, xtype) #define SDT_PROBE_DEFINE0(prov, mod, func, name) @@ -108,19 +117,45 @@ #define SDT_PROBE_DEFINE7(prov, mod, func, name, arg0, arg1, arg2, \ arg3, arg4, arg5, arg6) -#define SDT_PROBE0(prov, mod, func, name) __nothing -#define SDT_PROBE1(prov, mod, func, name, arg0) __nothing -#define SDT_PROBE2(prov, mod, func, name, arg0, arg1) __nothing -#define SDT_PROBE3(prov, mod, func, name, arg0, arg1, arg2) __nothing -#define SDT_PROBE4(prov, mod, func, name, arg0, arg1, arg2, arg3) \ - __nothing -#define SDT_PROBE5(prov, mod, func, name, arg0, arg1, arg2, arg3, arg4) \ - __nothing -#define SDT_PROBE6(prov, mod, func, name, arg0, arg1, arg2, arg3, arg4, arg5) \ - __nothing -#define SDT_PROBE7(prov, mod, func, name, arg0, arg1, arg2, arg3, arg4, arg5, \ - arg6) \ +#define SDT_PROBE0(prov, mod, func, name) \ __nothing +#define SDT_PROBE1(prov, mod, func, name, arg0) \ + __MACROUSE((uintptr_t)(arg0)) +#define SDT_PROBE2(prov, mod, func, name, arg0, arg1) do \ +{ \ + __MACROUSE((uintptr_t)(arg0)); __MACROUSE((uintptr_t)(arg1)); \ +} while (0) +#define SDT_PROBE3(prov, mod, func, name, arg0, arg1, arg2) do \ +{ \ + __MACROUSE((uintptr_t)(arg0)); __MACROUSE((uintptr_t)(arg1)); \ + __MACROUSE((uintptr_t)(arg2)); \ +} while (0) +#define SDT_PROBE4(prov, mod, func, name, arg0, arg1, arg2, arg3) do \ +{ \ + __MACROUSE((uintptr_t)(arg0)); __MACROUSE((uintptr_t)(arg1)); \ + __MACROUSE((uintptr_t)(arg2)); __MACROUSE((uintptr_t)(arg3)); \ +} while (0) +#define SDT_PROBE5(prov, mod, func, name, arg0, arg1, arg2, arg3, arg4) do \ +{ \ + __MACROUSE((uintptr_t)(arg0)); __MACROUSE((uintptr_t)(arg1)); \ + __MACROUSE((uintptr_t)(arg2)); __MACROUSE((uintptr_t)(arg3)); \ + __MACROUSE((uintptr_t)(arg4)); \ +} while (0) +#define SDT_PROBE6(prov, mod, func, name, arg0, arg1, arg2, arg3, arg4, \ + arg5) do \ +{ \ + __MACROUSE((uintptr_t)(arg0)); __MACROUSE((uintptr_t)(arg1)); \ + __MACROUSE((uintptr_t)(arg2)); __MACROUSE((uintptr_t)(arg3)); \ + __MACROUSE((uintptr_t)(arg4)); __MACROUSE((uintptr_t)(arg5)); \ +} while (0) +#define SDT_PROBE7(prov, mod, func, name, arg0, arg1, arg2, arg3, arg4, \ + arg5, arg6) do \ +{ \ + __MACROUSE((uintptr_t)(arg0)); __MACROUSE((uintptr_t)(arg1)); \ + __MACROUSE((uintptr_t)(arg2)); __MACROUSE((uintptr_t)(arg3)); \ + __MACROUSE((uintptr_t)(arg4)); __MACROUSE((uintptr_t)(arg5)); \ + __MACROUSE((uintptr_t)(arg6)); \ +} while (0) #define SDT_PROBE_DEFINE0_XLATE(prov, mod, func, name) #define SDT_PROBE_DEFINE1_XLATE(prov, mod, func, name, arg0, xarg0) @@ -134,56 +169,80 @@ arg1, xarg1, arg2, xarg2, arg3, xarg3, arg4, xarg4) #define SDT_PROBE_DEFINE6_XLATE(prov, mod, func, name, arg0, xarg0, \ arg1, xarg1, arg2, xarg2, arg3, xarg3, arg4, xarg4, arg5, xarg5) -#define SDT_PROBE_DEFINE7_XLATE(prov, mod, func, name, arg0, xarg0, \ - arg1, xarg1, arg2, xarg2, arg3, xarg3, arg4, xarg4, arg5, xarg5, arg6, \ +#define SDT_PROBE_DEFINE7_XLATE(prov, mod, func, name, arg0, xarg0, \ + arg1, xarg1, arg2, xarg2, arg3, xarg3, arg4, xarg4, arg5, xarg5, arg6, \ xarg6) -#define DTRACE_PROBE(name) __nothing -#define DTRACE_PROBE1(name, type0, arg0) __nothing -#define DTRACE_PROBE2(name, type0, arg0, type1, arg1) __nothing -#define DTRACE_PROBE3(name, type0, arg0, type1, arg1, type2, arg2) \ - __nothing -#define DTRACE_PROBE4(name, type0, arg0, type1, arg1, type2, arg2, type3, arg3)\ - __nothing -#define DTRACE_PROBE5(name, type0, arg0, type1, arg1, type2, arg2, type3, arg3,\ - type4, arg4) \ +#define DTRACE_PROBE(name) \ __nothing +#define DTRACE_PROBE1(name, type0, arg0) \ + __MACROUSE((uintptr_t)(arg0)) +#define DTRACE_PROBE2(name, type0, arg0, type1, arg1) do \ +{ \ + __MACROUSE((uintptr_t)(arg0)); __MACROUSE((uintptr_t)(arg1)); \ +} while (0) +#define DTRACE_PROBE3(name, type0, arg0, type1, arg1, type2, arg2) do \ +{ \ + __MACROUSE((uintptr_t)(arg0)); __MACROUSE((uintptr_t)(arg1)); \ + __MACROUSE((uintptr_t)(arg2)); \ +} while (0) +#define DTRACE_PROBE4(name, type0, arg0, type1, arg1, type2, arg2, type3, \ + arg3) do \ +{ \ + __MACROUSE((uintptr_t)(arg0)); __MACROUSE((uintptr_t)(arg1)); \ + __MACROUSE((uintptr_t)(arg2)); __MACROUSE((uintptr_t)(arg3)); \ +} while (0) +#define DTRACE_PROBE5(name, type0, arg0, type1, arg1, type2, arg2, type3, \ + arg3, type4, arg4) do \ +{ \ + __MACROUSE((uintptr_t)(arg0)); __MACROUSE((uintptr_t)(arg1)); \ + __MACROUSE((uintptr_t)(arg2)); __MACROUSE((uintptr_t)(arg3)); \ + __MACROUSE((uintptr_t)(arg4)); \ +} while (0) #else -#define SDT_PROVIDER_DEFINE(prov) \ - struct sdt_provider sdt_provider_##prov[1] = { \ - { #prov, { NULL, NULL }, 0, 0 } \ - }; \ +#define SDT_PROVIDER_DEFINE(prov) \ + struct sdt_provider sdt_provider_##prov[1] = { \ + { #prov, { NULL, NULL }, 0, 0 } \ + }; \ __link_set_add_data(sdt_providers_set, sdt_provider_##prov); -#define SDT_PROVIDER_DECLARE(prov) \ +#define SDT_PROVIDER_DECLARE(prov) \ extern struct sdt_provider sdt_provider_##prov[1] -#define SDT_PROBE_DEFINE(prov, mod, func, name) \ - struct sdt_probe sdt_##prov##_##mod##_##func##_##name[1] = { \ - { sizeof(struct sdt_probe), sdt_provider_##prov, \ - { NULL, NULL }, { NULL, NULL }, #mod, #func, #name, 0, 0, \ - NULL } \ - }; \ - __link_set_add_data(sdt_probes_set, sdt_##prov##_##mod##_##func##_##name); - -#define SDT_PROBE_DECLARE(prov, mod, func, name) \ +#define SDT_PROBE_DEFINE(prov, mod, func, name) \ + struct sdt_probe sdt_##prov##_##mod##_##func##_##name[1] = { \ + { \ + sizeof(struct sdt_probe), sdt_provider_##prov, \ + { NULL, NULL }, { NULL, NULL }, \ + #mod, #func, #name, 0, 0, \ + NULL, \ + } \ + }; \ + __link_set_add_data(sdt_probes_set, \ + sdt_##prov##_##mod##_##func##_##name); + +#define SDT_PROBE_DECLARE(prov, mod, func, name) \ extern struct sdt_probe sdt_##prov##_##mod##_##func##_##name[1] -#define SDT_PROBE(prov, mod, func, name, arg0, arg1, arg2, arg3, arg4) do { \ - if (__predict_false(sdt_##prov##_##mod##_##func##_##name->id)) \ - (*sdt_probe_func)(sdt_##prov##_##mod##_##func##_##name->id, \ - (uintptr_t) (arg0), (uintptr_t) (arg1), (uintptr_t) (arg2), \ - (uintptr_t) (arg3), (uintptr_t) (arg4)); \ -} while (0) - -#define SDT_PROBE_ARGTYPE(prov, mod, func, name, num, type, xtype) \ - static struct sdt_argtype sdta_##prov##_##mod##_##func##_##name##num[1] \ - = { { num, type, xtype, { NULL, NULL }, \ - sdt_##prov##_##mod##_##func##_##name } \ - }; \ - __link_set_add_data(sdt_argtypes_set, sdta_##prov##_##mod##_##func##_##name##num); +#define SDT_PROBE(prov, mod, func, name, arg0, arg1, arg2, arg3, arg4) \ + (__predict_false(sdt_##prov##_##mod##_##func##_##name->id) \ + ? (*sdt_probe_func)(sdt_##prov##_##mod##_##func##_##name->id, \ + (uintptr_t)(arg0), (uintptr_t)(arg1), (uintptr_t)(arg2), \ + (uintptr_t)(arg3), (uintptr_t)(arg4)) \ + : 0) + +#define SDT_PROBE_ARGTYPE(prov, mod, func, name, num, type, xtype) \ + static struct sdt_argtype sdta_##prov##_##mod##_##func##_##name##num[1]\ + = { \ + { \ + num, type, xtype, { NULL, NULL }, \ + sdt_##prov##_##mod##_##func##_##name, \ + } \ + }; \ + __link_set_add_data(sdt_argtypes_set, \ + sdta_##prov##_##mod##_##func##_##name##num); #define SDT_PROBE_DEFINE0(prov, mod, func, name) \ SDT_PROBE_DEFINE(prov, mod, func, name) @@ -210,7 +269,8 @@ SDT_PROBE_ARGTYPE(prov, mod, func, name, 2, arg2, NULL); \ SDT_PROBE_ARGTYPE(prov, mod, func, name, 3, arg3, NULL) -#define SDT_PROBE_DEFINE5(prov, mod, func, name, arg0, arg1, arg2, arg3, arg4) \ +#define SDT_PROBE_DEFINE5(prov, mod, func, name, arg0, arg1, arg2, arg3,\ + arg4) \ SDT_PROBE_DEFINE(prov, mod, func, name); \ SDT_PROBE_ARGTYPE(prov, mod, func, name, 0, arg0, NULL); \ SDT_PROBE_ARGTYPE(prov, mod, func, name, 1, arg1, NULL); \ @@ -311,72 +371,76 @@ #define SDT_PROBE5(prov, mod, func, name, arg0, arg1, arg2, arg3, arg4) \ SDT_PROBE(prov, mod, func, name, arg0, arg1, arg2, arg3, arg4) /* XXX: void * function casts */ -#define SDT_PROBE6(prov, mod, func, name, arg0, arg1, arg2, arg3, arg4, arg5) \ - do { \ - if (__predict_false(sdt_##prov##_##mod##_##func##_##name->id)) \ - __FPTRCAST(void (*)(uint32_t, uintptr_t, uintptr_t, \ - uintptr_t, uintptr_t, uintptr_t, uintptr_t), \ - sdt_probe_func)( \ - sdt_##prov##_##mod##_##func##_##name->id, \ - (uintptr_t)arg0, (uintptr_t)arg1, (uintptr_t)arg2, \ - (uintptr_t)arg3, (uintptr_t)arg4, (uintptr_t)arg5);\ - } while (0) -#define SDT_PROBE7(prov, mod, func, name, arg0, arg1, arg2, arg3, arg4, arg5, \ - arg6) \ - do { \ - if (__predict_false(sdt_##prov##_##mod##_##func##_##name->id)) \ - __FPTRCAST(void (*)(uint32_t, uintptr_t, uintptr_t, \ - uintptr_t, uintptr_t, uintptr_t, uintptr_t, \ - uintptr_t), sdt_probe_func)( \ - sdt_##prov##_##mod##_##func##_##name->id, \ - (uintptr_t)arg0, (uintptr_t)arg1, (uintptr_t)arg2, \ - (uintptr_t)arg3, (uintptr_t)arg4, (uintptr_t)arg5, \ - (uintptr_t)arg6); \ - } while (0) - -#define DTRACE_PROBE_IMPL_START(name, arg0, arg1, arg2, arg3, arg4) do { \ - static SDT_PROBE_DEFINE(sdt, , , name); \ - SDT_PROBE(sdt, , , name, arg0, arg1, arg2, arg3, arg4); -#define DTRACE_PROBE_IMPL_END } while (0) +#define SDT_PROBE6(prov, mod, func, name, arg0, arg1, arg2, arg3, arg4, arg5) \ + (__predict_false(sdt_##prov##_##mod##_##func##_##name->id) \ + ? __FPTRCAST(void (*)(uint32_t, uintptr_t, uintptr_t, \ + uintptr_t, uintptr_t, uintptr_t, uintptr_t), \ + sdt_probe_func)( \ + sdt_##prov##_##mod##_##func##_##name->id, \ + (uintptr_t)(arg0), (uintptr_t)(arg1), \ + (uintptr_t)(arg2), (uintptr_t)(arg3), \ + (uintptr_t)(arg4), (uintptr_t)(arg5)) \ + : 0) +#define SDT_PROBE7(prov, mod, func, name, arg0, arg1, arg2, arg3, arg4, arg5, \ + arg6) \ + (__predict_false(sdt_##prov##_##mod##_##func##_##name->id) \ + ? __FPTRCAST(void (*)(uint32_t, uintptr_t, uintptr_t, \ + uintptr_t, uintptr_t, uintptr_t, uintptr_t, \ + uintptr_t), \ + sdt_probe_func)( \ + sdt_##prov##_##mod##_##func##_##name->id, \ + (uintptr_t)(arg0), (uintptr_t)(arg1), \ + (uintptr_t)(arg2), (uintptr_t)(arg3), \ + (uintptr_t)(arg4), (uintptr_t)(arg5), \ + (uintptr_t)(arg6)) \ + : 0) + +#define DTRACE_PROBE_IMPL_START(name, arg0, arg1, arg2, arg3, arg4) do \ +{ \ + static SDT_PROBE_DEFINE(sdt, , , name); \ + SDT_PROBE(sdt, , , name, arg0, arg1, arg2, arg3, arg4) +#define DTRACE_PROBE_IMPL_END \ +} while (0) #define DTRACE_PROBE(name) \ - DTRACE_PROBE_IMPL_START(name, 0, 0, 0, 0, 0) \ + DTRACE_PROBE_IMPL_START(name, 0, 0, 0, 0, 0); \ DTRACE_PROBE_IMPL_END #define DTRACE_PROBE1(name, type0, arg0) \ - DTRACE_PROBE_IMPL_START(name, arg0, 0, 0, 0, 0) \ + DTRACE_PROBE_IMPL_START(name, arg0, 0, 0, 0, 0); \ SDT_PROBE_ARGTYPE(sdt, , , name, 0, #type0, NULL); \ DTRACE_PROBE_IMPL_END #define DTRACE_PROBE2(name, type0, arg0, type1, arg1) \ - DTRACE_PROBE_IMPL_START(name, arg0, arg1, 0, 0, 0) \ + DTRACE_PROBE_IMPL_START(name, arg0, arg1, 0, 0, 0); \ SDT_PROBE_ARGTYPE(sdt, , , name, 0, #type0, NULL); \ SDT_PROBE_ARGTYPE(sdt, , , name, 1, #type1, NULL); \ DTRACE_PROBE_IMPL_END #define DTRACE_PROBE3(name, type0, arg0, type1, arg1, type2, arg2) \ - DTRACE_PROBE_IMPL_START(name, arg0, arg1, arg2, 0, 0) \ + DTRACE_PROBE_IMPL_START(name, arg0, arg1, arg2, 0, 0); \ SDT_PROBE_ARGTYPE(sdt, , , name, 0, #type0, NULL); \ SDT_PROBE_ARGTYPE(sdt, , , name, 1, #type1, NULL); \ SDT_PROBE_ARGTYPE(sdt, , , name, 2, #type2, NULL); \ DTRACE_PROBE_IMPL_END -#define DTRACE_PROBE4(name, type0, arg0, type1, arg1, type2, arg2, type3, arg3) \ - DTRACE_PROBE_IMPL_START(name, arg0, arg1, arg2, arg3, 0) \ - SDT_PROBE_ARGTYPE(sdt, , , name, 0, #type0, NULL); \ - SDT_PROBE_ARGTYPE(sdt, , , name, 1, #type1, NULL); \ - SDT_PROBE_ARGTYPE(sdt, , , name, 2, #type2, NULL); \ - SDT_PROBE_ARGTYPE(sdt, , , name, 3, #type3, NULL); \ +#define DTRACE_PROBE4(name, type0, arg0, type1, arg1, type2, arg2, type3, \ + arg3) \ + DTRACE_PROBE_IMPL_START(name, arg0, arg1, arg2, arg3, 0); \ + SDT_PROBE_ARGTYPE(sdt, , , name, 0, #type0, NULL); \ + SDT_PROBE_ARGTYPE(sdt, , , name, 1, #type1, NULL); \ + SDT_PROBE_ARGTYPE(sdt, , , name, 2, #type2, NULL); \ + SDT_PROBE_ARGTYPE(sdt, , , name, 3, #type3, NULL); \ DTRACE_PROBE_IMPL_END -#define DTRACE_PROBE5(name, type0, arg0, type1, arg1, type2, arg2, type3, arg3, \ - type4, arg4) \ - DTRACE_PROBE_IMPL_START(name, arg0, arg1, arg2, arg3, arg4) \ - SDT_PROBE_ARGTYPE(sdt, , , name, 0, #type0, NULL); \ - SDT_PROBE_ARGTYPE(sdt, , , name, 1, #type1, NULL); \ - SDT_PROBE_ARGTYPE(sdt, , , name, 2, #type2, NULL); \ - SDT_PROBE_ARGTYPE(sdt, , , name, 3, #type3, NULL); \ - SDT_PROBE_ARGTYPE(sdt, , , name, 4, #type4, NULL); \ +#define DTRACE_PROBE5(name, type0, arg0, type1, arg1, type2, arg2, type3, \ + arg3, type4, arg4) \ + DTRACE_PROBE_IMPL_START(name, arg0, arg1, arg2, arg3, arg4); \ + SDT_PROBE_ARGTYPE(sdt, , , name, 0, #type0, NULL); \ + SDT_PROBE_ARGTYPE(sdt, , , name, 1, #type1, NULL); \ + SDT_PROBE_ARGTYPE(sdt, , , name, 2, #type2, NULL); \ + SDT_PROBE_ARGTYPE(sdt, , , name, 3, #type3, NULL); \ + SDT_PROBE_ARGTYPE(sdt, , , name, 4, #type4, NULL); \ DTRACE_PROBE_IMPL_END #endif /* KDTRACE_HOOKS */ @@ -436,6 +500,12 @@ SDT_PROVIDER_DECLARE(sdt); void sdt_init(void *); void sdt_exit(void); +#ifdef KDTRACE_HOOKS +SDT_PROBE_DECLARE(sdt, , , set__error); +#define SET_ERROR(err) (SDT_PROBE1(sdt, , , set__error, (err)), (err)) +#else +#define SET_ERROR(err) (err) +#endif /* KDTRACE_HOOKS */ #endif /* _KERNEL */ diff --git a/lib/libc/include/generic-netbsd/sys/sem.h b/lib/libc/include/generic-netbsd/sys/sem.h @@ -1,4 +1,4 @@ -/* $NetBSD: sem.h,v 1.34 2019/08/07 00:38:02 pgoyette Exp $ */ +/* $NetBSD: sem.h,v 1.37 2025/05/09 10:22:55 martin Exp $ */ /*- * Copyright (c) 1999 The NetBSD Foundation, Inc. @@ -204,7 +204,10 @@ extern struct semid_ds *sema; /* semaphore id pool */ (dst).sem_nsems = (src).sem_nsems; \ (dst).sem_otime = (src).sem_otime; \ (dst).sem_ctime = (src).sem_ctime; \ -} while (/*CONSTCOND*/ 0) +} while (0) + +void do_semop_init(void); +int do_semop1(struct lwp*, int, struct sembuf*, size_t, struct timespec*, register_t*); #endif /* _KERNEL */ @@ -217,6 +220,8 @@ int semctl(int, int, int, ...) __RENAME(__semctl50); #endif int semget(key_t, int, int); int semop(int, struct sembuf *, size_t); +struct timespec; +int semtimedop(int, struct sembuf *, size_t, struct timespec *); #if defined(_NETBSD_SOURCE) int semconfig(int); #endif diff --git a/lib/libc/include/generic-netbsd/sys/sha1.h b/lib/libc/include/generic-netbsd/sys/sha1.h @@ -1,4 +1,4 @@ -/* $NetBSD: sha1.h,v 1.15 2016/07/01 16:43:16 christos Exp $ */ +/* $NetBSD: sha1.h,v 1.16 2023/08/01 07:04:16 mrg Exp $ */ /* * SHA-1 in C @@ -28,10 +28,10 @@ void SHA1Init(SHA1_CTX *); void SHA1Update(SHA1_CTX *, const uint8_t *, unsigned int); void SHA1Final(uint8_t[SHA1_DIGEST_LENGTH], SHA1_CTX *); #ifndef _KERNEL -char *SHA1End(SHA1_CTX *, char *); +char *SHA1End(SHA1_CTX *, char[SHA1_DIGEST_STRING_LENGTH]); char *SHA1FileChunk(const char *, char *, off_t, off_t); char *SHA1File(const char *, char *); -char *SHA1Data(const uint8_t *, size_t, char *); +char *SHA1Data(const uint8_t *, size_t, char[SHA1_DIGEST_STRING_LENGTH]); #endif /* _KERNEL */ __END_DECLS diff --git a/lib/libc/include/generic-netbsd/sys/sha2.h b/lib/libc/include/generic-netbsd/sys/sha2.h @@ -1,4 +1,4 @@ -/* $NetBSD: sha2.h,v 1.3 2009/05/26 08:04:12 joerg Exp $ */ +/* $NetBSD: sha2.h,v 1.4 2024/01/19 18:39:59 christos Exp $ */ /* $KAME: sha2.h,v 1.4 2003/07/20 00:28:38 itojun Exp $ */ /* @@ -115,6 +115,13 @@ char *SHA512_FileChunk(const char *, char *, off_t, off_t); char *SHA512_File(const char *, char *); char *SHA512_Data(const uint8_t *, size_t, char[SHA512_DIGEST_STRING_LENGTH]); #endif /* !_KERNEL */ + +#ifdef _LIBC_INTERNAL +void SHA224_Transform(SHA224_CTX *, const uint32_t*); +void SHA256_Transform(SHA256_CTX *, const uint32_t*); +void SHA384_Transform(SHA384_CTX *, const uint64_t*); +void SHA512_Transform(SHA512_CTX *, const uint64_t*); +#endif __END_DECLS #endif /* __SHA2_H__ */ \ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/sys/shm.h b/lib/libc/include/generic-netbsd/sys/shm.h @@ -1,4 +1,4 @@ -/* $NetBSD: shm.h,v 1.55 2021/08/17 22:00:32 andvar Exp $ */ +/* $NetBSD: shm.h,v 1.56 2024/05/12 10:34:56 rillig Exp $ */ /*- * Copyright (c) 1999 The NetBSD Foundation, Inc. @@ -192,7 +192,7 @@ extern void (*uvm_shmfork)(struct vmspace *, struct vmspace *); (dst).shm_dtime = (src).shm_dtime; \ (dst).shm_ctime = (src).shm_ctime; \ (dst).shm_nattch = (src).shm_nattch; \ -} while (/*CONSTCOND*/ 0) +} while (0) #else /* !_KERNEL */ diff --git a/lib/libc/include/generic-netbsd/sys/siginfo.h b/lib/libc/include/generic-netbsd/sys/siginfo.h @@ -1,4 +1,4 @@ -/* $NetBSD: siginfo.h,v 1.34 2019/09/30 21:13:33 kamil Exp $ */ +/* $NetBSD: siginfo.h,v 1.35 2024/05/12 10:34:56 rillig Exp $ */ /*- * Copyright (c) 2002 The NetBSD Foundation, Inc. @@ -112,26 +112,26 @@ typedef struct ksiginfo { #define KSI_INIT(ksi) \ do { \ memset((ksi), 0, sizeof(*(ksi))); \ -} while (/*CONSTCOND*/0) +} while (0) #define KSI_INIT_EMPTY(ksi) \ do { \ KSI_INIT((ksi)); \ (ksi)->ksi_flags = KSI_EMPTY; \ -} while (/*CONSTCOND*/0) +} while (0) #define KSI_INIT_TRAP(ksi) \ do { \ KSI_INIT((ksi)); \ (ksi)->ksi_flags = KSI_TRAP; \ -} while (/*CONSTCOND*/0) +} while (0) /* Copy the part of ksiginfo_t without the queue pointers */ #define KSI_COPY(fksi, tksi) \ do { \ (tksi)->ksi_info = (fksi)->ksi_info; \ (tksi)->ksi_flags = (fksi)->ksi_flags; \ -} while (/*CONSTCOND*/0) +} while (0) /* Predicate macros to test how a ksiginfo_t was generated. */ diff --git a/lib/libc/include/generic-netbsd/sys/signal.h b/lib/libc/include/generic-netbsd/sys/signal.h @@ -1,4 +1,4 @@ -/* $NetBSD: signal.h,v 1.75.4.2 2024/10/14 17:44:57 martin Exp $ */ +/* $NetBSD: signal.h,v 1.78 2024/09/19 14:41:05 kre Exp $ */ /* * Copyright (c) 1982, 1986, 1989, 1991, 1993 diff --git a/lib/libc/include/generic-netbsd/sys/sigtypes.h b/lib/libc/include/generic-netbsd/sys/sigtypes.h @@ -1,4 +1,4 @@ -/* $NetBSD: sigtypes.h,v 1.12 2021/11/02 20:12:26 christos Exp $ */ +/* $NetBSD: sigtypes.h,v 1.13 2024/05/12 10:34:56 rillig Exp $ */ /* * Copyright (c) 1982, 1986, 1989, 1991, 1993 @@ -87,21 +87,21 @@ typedef struct { (t)->__bits[1] |= (s)->__bits[1]; \ (t)->__bits[2] |= (s)->__bits[2]; \ (t)->__bits[3] |= (s)->__bits[3]; \ - } while (/* CONSTCOND */ 0) + } while (0) #define __sigminusset(s, t) \ do { \ (t)->__bits[0] &= ~(s)->__bits[0]; \ (t)->__bits[1] &= ~(s)->__bits[1]; \ (t)->__bits[2] &= ~(s)->__bits[2]; \ (t)->__bits[3] &= ~(s)->__bits[3]; \ - } while (/* CONSTCOND */ 0) + } while (0) #define __sigandset(s, t) \ do { \ (t)->__bits[0] &= (s)->__bits[0]; \ (t)->__bits[1] &= (s)->__bits[1]; \ (t)->__bits[2] &= (s)->__bits[2]; \ (t)->__bits[3] &= (s)->__bits[3]; \ - } while (/* CONSTCOND */ 0) + } while (0) #if (defined(_XOPEN_SOURCE) && defined(_XOPEN_SOURCE_EXTENDED)) || \ (_XOPEN_SOURCE - 0) >= 500 || (_POSIX_C_SOURCE - 0) >= 200809L || \ diff --git a/lib/libc/include/generic-netbsd/sys/sleepq.h b/lib/libc/include/generic-netbsd/sys/sleepq.h @@ -1,7 +1,7 @@ -/* $NetBSD: sleepq.h,v 1.36 2022/10/26 23:24:59 riastradh Exp $ */ +/* $NetBSD: sleepq.h,v 1.42 2023/10/15 10:30:00 riastradh Exp $ */ /*- - * Copyright (c) 2002, 2006, 2007, 2008, 2009, 2019, 2020 + * Copyright (c) 2002, 2006, 2007, 2008, 2009, 2019, 2020, 2023 * The NetBSD Foundation, Inc. * All rights reserved. * @@ -33,13 +33,16 @@ #ifndef _SYS_SLEEPQ_H_ #define _SYS_SLEEPQ_H_ +#include <sys/param.h> + #include <sys/lwp.h> #include <sys/mutex.h> #include <sys/pool.h> #include <sys/queue.h> #include <sys/sched.h> -#include <sys/syncobj.h> -#include <sys/param.h> +#include <sys/wchan.h> + +struct syncobj; /* * Generic sleep queues. @@ -48,11 +51,12 @@ typedef struct sleepq sleepq_t; void sleepq_init(sleepq_t *); -void sleepq_remove(sleepq_t *, lwp_t *); -void sleepq_enqueue(sleepq_t *, wchan_t, const char *, struct syncobj *, - bool); +void sleepq_remove(sleepq_t *, lwp_t *, bool); +int sleepq_enter(sleepq_t *, lwp_t *, kmutex_t *); +void sleepq_enqueue(sleepq_t *, wchan_t, const char *, + const struct syncobj *, bool); void sleepq_transfer(lwp_t *, sleepq_t *, sleepq_t *, wchan_t, const char *, - struct syncobj *, kmutex_t *, bool); + const struct syncobj *, kmutex_t *, bool); void sleepq_uncatch(lwp_t *); void sleepq_unsleep(lwp_t *, bool); void sleepq_timeout(void *); @@ -60,7 +64,7 @@ void sleepq_wake(sleepq_t *, wchan_t, u_int, kmutex_t *); int sleepq_abort(kmutex_t *, int); void sleepq_changepri(lwp_t *, pri_t); void sleepq_lendpri(lwp_t *, pri_t); -int sleepq_block(int, bool, struct syncobj *); +int sleepq_block(int, bool, const struct syncobj *, int); #ifdef _KERNEL @@ -83,24 +87,7 @@ sleepq_dontsleep(lwp_t *l) return cold || (doing_shutdown && (panicstr || CURCPU_IDLE_P())); } -/* - * Prepare to block on a sleep queue, after which any interlock can be - * safely released. - */ -static __inline void -sleepq_enter(sleepq_t *sq, lwp_t *l, kmutex_t *mp) -{ - - /* - * Acquire the per-LWP mutex and lend it ours sleep queue lock. - * Once interlocked, we can release the kernel lock. - */ - lwp_lock(l); - lwp_unlock_to(l, mp); - KERNEL_UNLOCK_ALL(NULL, &l->l_biglocks); -} - -#endif +#endif /* _KERNEL */ #include <sys/sleeptab.h> diff --git a/lib/libc/include/generic-netbsd/sys/socket.h b/lib/libc/include/generic-netbsd/sys/socket.h @@ -1,4 +1,4 @@ -/* $NetBSD: socket.h,v 1.131.4.1 2024/08/23 16:20:35 martin Exp $ */ +/* $NetBSD: socket.h,v 1.134 2025/07/25 23:24:46 kre Exp $ */ /* * Copyright (C) 1995, 1996, 1997, and 1998 WIDE Project. @@ -113,6 +113,7 @@ typedef _BSD_SSIZE_T_ ssize_t; #define SOCK_CLOEXEC 0x10000000 /* set close on exec on socket */ #define SOCK_NONBLOCK 0x20000000 /* set non blocking i/o socket */ #define SOCK_NOSIGPIPE 0x40000000 /* don't send sigpipe */ +#define SOCK_CLOFORK 0x80000000 /* set close on fork on socket */ #define SOCK_FLAGS_MASK 0xf0000000 /* flags mask */ /* @@ -503,6 +504,7 @@ struct msghdr { #define MSG_NBIO 0x1000 /* use non-blocking I/O */ #define MSG_WAITFORONE 0x2000 /* recvmmsg() wait for one message */ #define MSG_NOTIFICATION 0x4000 /* SCTP notification */ +#define MSG_CMSG_CLOFORK 0x8000 /* close on fork receiving fd */ struct mmsghdr { struct msghdr msg_hdr; diff --git a/lib/libc/include/generic-netbsd/sys/socketvar.h b/lib/libc/include/generic-netbsd/sys/socketvar.h @@ -1,4 +1,4 @@ -/* $NetBSD: socketvar.h,v 1.165.4.1 2024/02/04 11:20:15 martin Exp $ */ +/* $NetBSD: socketvar.h,v 1.171 2025/04/07 21:02:19 andvar Exp $ */ /*- * Copyright (c) 2008, 2009 The NetBSD Foundation, Inc. @@ -237,7 +237,7 @@ do { \ (sb)->sb_mbtail = NULL; \ (sb)->sb_lastrecord = NULL; \ } \ -} while (/*CONSTCOND*/0) +} while (0) extern u_long sb_max; extern int somaxkva; @@ -571,11 +571,11 @@ void soloanfree(struct mbuf *, void *, size_t, void *); * that should be delivered in their entirety, or not at all. * * SB_PRIO_OVERDRAFT: allow a small (2*MLEN) overflow, over and - * aboce normal socket limits. Intended messages indicating + * above normal socket limits. Intended messages indicating * buffer overflow in earlier normal/lower-priority messages . * * SB_PRIO_BESTEFFORT: Ignore limits entirely. Intended only for - * kernel-generated messages to specially-marked scokets which + * kernel-generated messages to specially-marked sockets which * require "reliable" delivery, nd where the source socket/protocol * message generator enforce some hard limit (but possibly well * above kern.sbmax). It is entirely up to the in-kernel source to diff --git a/lib/libc/include/generic-netbsd/sys/stat.h b/lib/libc/include/generic-netbsd/sys/stat.h @@ -1,4 +1,4 @@ -/* $NetBSD: stat.h,v 1.69 2019/09/15 23:55:22 christos Exp $ */ +/* $NetBSD: stat.h,v 1.70 2023/08/01 07:04:16 mrg Exp $ */ /*- * Copyright (c) 1982, 1986, 1989, 1993 @@ -279,17 +279,17 @@ int fstatat(int, const char *, struct stat *, int); int mkdirat(int, const char *, mode_t); int mkfifoat(int, const char *, mode_t); int mknodat(int, const char *, mode_t, dev_t); -int utimensat(int, const char *, const struct timespec *, int); +int utimensat(int, const char *, const struct timespec [2], int); #endif #ifdef _NETBSD_SOURCE -int utimens(const char *, const struct timespec *); -int lutimens(const char *, const struct timespec *); +int utimens(const char *, const struct timespec [2]); +int lutimens(const char *, const struct timespec [2]); #endif #if (_POSIX_C_SOURCE - 0) >= 200809L || (_XOPEN_SOURCE - 0) >= 700 || \ defined(_NETBSD_SOURCE) -int futimens(int, const struct timespec *); +int futimens(int, const struct timespec [2]); #endif #endif diff --git a/lib/libc/include/generic-netbsd/sys/stdalign.h b/lib/libc/include/generic-netbsd/sys/stdalign.h @@ -0,0 +1,55 @@ +/* $NetBSD: stdalign.h,v 1.1 2024/08/25 22:10:40 christos Exp $ */ + +/*- + * Copyright (c) 2016 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Kamil Rytarowski. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _SYS_STDALIGN_H_ +#define _SYS_STDALIGN_H_ + +/*- + * ISO/IEC 9899:201x 7.15 Alignment <stdalign.h> + * ISO/IEC N3242=11-0012 (C++1x) 18.10 Other runtime support 6. + * ISO/IEC N3797 (C++1y) 18.10 Other runtime support 7. + */ + +#ifndef __alignas_is_defined +#if ((__cplusplus - 0) < 201103L) +#define alignas _Alignas +#endif +#define __alignas_is_defined 1 +#endif /* __alignas_is_defined */ + +#ifndef __alignof_is_defined +#if ((__cplusplus - 0) < 201103L) +#define alignof _Alignof +#endif +#define __alignof_is_defined 1 +#endif /* __alignof_is_defined */ + +#endif +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/sys/stdarg.h b/lib/libc/include/generic-netbsd/sys/stdarg.h @@ -1,4 +1,4 @@ -/* $NetBSD: stdarg.h,v 1.6 2022/10/08 15:48:01 christos Exp $ */ +/* $NetBSD: stdarg.h,v 1.7 2025/06/03 20:25:27 rillig Exp $ */ /*- * Copyright (c) 1991, 1993 @@ -41,7 +41,7 @@ #ifdef __lint__ #define __builtin_next_arg(t) ((t) ? 0 : 0) #define __builtin_va_start(a, l) ((a) = (va_list)(void *)&(l)) -#define __builtin_va_arg(a, t) ((a) ? (t) 0 : (t) 0) +#define __builtin_va_arg(a, t) ((a) != 0 ? (t)0 : (t)0) #define __builtin_va_end(a) __nothing #define __builtin_va_copy(d, s) ((d) = (s)) #elif !(__GNUC_PREREQ__(4, 5) || \ diff --git a/lib/libc/include/generic-netbsd/sys/stddef.h b/lib/libc/include/generic-netbsd/sys/stddef.h @@ -0,0 +1,156 @@ +/* $NetBSD: stddef.h,v 1.2 2025/04/01 00:33:55 riastradh Exp $ */ + +/*- + * Copyright (c) 1990, 1993 + * The Regents of the University of California. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the University nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * @(#)stddef.h 8.1 (Berkeley) 6/2/93 + */ + +/* + * C99, 7.17: Common definitions <stddef.h> + * C11, 7.19: Common definitoins <stddef.h> + * C23, 7.21: Common definitions <stddef.h> + */ + +#ifndef _SYS_STDDEF_H_ +#define _SYS_STDDEF_H_ + +/* + * C23 `2. The macro + * + * __STDC_VERSION_STDDEF_H__ + * + * is an integer constant expression with a value equivalent + * to 202311L.' + */ +#if defined(_NETBSD_SOURCE) || defined(_ISOC23_SOURCE) || \ + (__STDC_VERSION__ - 0) >= 202311L +#define __STDC_VERSION_STDDEF_H__ 202311L +#endif + +#include <sys/cdefs.h> +#include <sys/featuretest.h> +#include <machine/ansi.h> + +/* + * C23 `3. The types are + * + * ptrdiff_t + * + * which is the signed integer type of the result of + * subtracting two pointers; + * + * size_t + * + * which is the unsigned integer type of the result of the + * sizeof operator; + * + * max_align_t + * + * which is an object type whose alignment is the greatest + * fundamental alignment; + * + * wchar_t + * + * which is an integer type whose range of values can + * represent distinct codes for all members of the largest + * extended chracter set specified among the supported + * locales; [...] and + * + * nullptr_t + * + * which is the type of the nullptr predefined constant, see + * below.' + */ +#ifdef _BSD_PTRDIFF_T_ +typedef _BSD_PTRDIFF_T_ ptrdiff_t; +#undef _BSD_PTRDIFF_T_ +#endif + +#ifdef _BSD_SIZE_T_ +typedef _BSD_SIZE_T_ size_t; +#undef _BSD_SIZE_T_ +#endif + +#if (__STDC_VERSION__ - 0) >= 201112L || (__cplusplus - 0) >= 201103L +typedef union { + void *_v; + long double _ld; + long long int _ll; +} max_align_t; +#endif + +#if defined(_BSD_WCHAR_T_) && !defined(__cplusplus) +typedef _BSD_WCHAR_T_ wchar_t; +#undef _BSD_WCHAR_T_ +#endif + +#if (__STDC_VERSION__ - 0) >= 202311L +typedef typeof_unqual(nullptr) nullptr_t; +#endif + +/* + * C23 `4. The macros are + * + * NULL + * + * which expands to an implementation-defined null pointer + * constant; + * + * unreachable() + * + * which expands to a void expression that invokes undefined + * behavior if it is reached during execution; and + * + * offsetof(type, member-designator) + * + * which expands to an integer constant expression that has + * type size_t, the value of which is the offset in bytes, to + * the subobject (designated by member-designator), from the + * beginning of any object of type type.' + */ + +#include <sys/null.h> + +#if (__STDC_VERSION__ - 0) >= 202311L +#define unreachable() __unreachable() /* sys/cdefs.h */ +#endif + +#if __GNUC_PREREQ__(4, 0) +#define offsetof(type, member) __builtin_offsetof(type, member) +#elif !defined(__cplusplus) +#define offsetof(type, member) ((size_t)(unsigned long)(&((type *)0)->member)) +#else +#if !__GNUC_PREREQ__(3, 4) +#define __offsetof__(a) a +#endif +#define offsetof(type, member) __offsetof__((reinterpret_cast<size_t> \ + (&reinterpret_cast<const volatile char &>(static_cast<type *>(0)->member)))) +#endif + +#endif /* _SYS_STDDEF_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/sys/swap.h b/lib/libc/include/generic-netbsd/sys/swap.h @@ -1,4 +1,4 @@ -/* $NetBSD: swap.h,v 1.8 2009/01/14 02:20:45 mrg Exp $ */ +/* $NetBSD: swap.h,v 1.9 2024/02/09 22:08:38 andvar Exp $ */ /* * Copyright (c) 1995, 1996, 1998, 2009 Matthew R. Green @@ -30,7 +30,7 @@ #include <sys/syslimits.h> -/* Thise structure is used to return swap information for userland */ +/* This structure is used to return swap information for userland */ struct swapent { dev_t se_dev; /* device id */ diff --git a/lib/libc/include/generic-netbsd/sys/syncobj.h b/lib/libc/include/generic-netbsd/sys/syncobj.h @@ -1,7 +1,7 @@ -/* $NetBSD: syncobj.h,v 1.13 2020/03/26 21:15:14 ad Exp $ */ +/* $NetBSD: syncobj.h,v 1.18 2023/10/15 10:27:11 riastradh Exp $ */ /*- - * Copyright (c) 2007, 2008, 2020 The NetBSD Foundation, Inc. + * Copyright (c) 2007, 2008, 2020, 2023 The NetBSD Foundation, Inc. * All rights reserved. * * This code is derived from software contributed to The NetBSD Foundation @@ -32,22 +32,24 @@ #if !defined(_SYS_SYNCOBJ_H_) #define _SYS_SYNCOBJ_H_ -struct lwp; +#include <sys/wchan.h> -typedef volatile const void *wchan_t; +struct lwp; -#if defined(_KERNEL) +#if defined(_KERNEL) || defined(_KMEMUSER) /* * Synchronisation object operations set. */ typedef struct syncobj { + char sobj_name[16]; u_int sobj_flag; + int sobj_boostpri; void (*sobj_unsleep)(struct lwp *, bool); void (*sobj_changepri)(struct lwp *, pri_t); void (*sobj_lendpri)(struct lwp *, pri_t); struct lwp *(*sobj_owner)(wchan_t); -} syncobj_t; +} const syncobj_t; struct lwp *syncobj_noowner(wchan_t); @@ -55,6 +57,7 @@ struct lwp *syncobj_noowner(wchan_t); #define SOBJ_SLEEPQ_LIFO 0x04 #define SOBJ_SLEEPQ_NULL 0x08 +extern syncobj_t callout_syncobj; extern syncobj_t cv_syncobj; extern syncobj_t kpause_syncobj; extern syncobj_t lwp_park_syncobj; diff --git a/lib/libc/include/generic-netbsd/sys/syscall.h b/lib/libc/include/generic-netbsd/sys/syscall.h @@ -1,10 +1,10 @@ -/* $NetBSD: syscall.h,v 1.321 2021/11/01 05:26:27 thorpej Exp $ */ +/* $NetBSD: syscall.h,v 1.329 2024/10/09 16:29:11 christos Exp $ */ /* * System call numbers. * * DO NOT EDIT-- this file is automatically generated. - * created from NetBSD: syscalls.master,v 1.309 2021/11/01 05:07:17 thorpej Exp + * created from NetBSD: syscalls.master,v 1.316 2024/10/09 16:27:28 christos Exp */ #ifndef _SYS_SYSCALL_H_ @@ -954,7 +954,7 @@ /* syscall: "kqueue" ret: "int" args: */ #define SYS_kqueue 344 -/* syscall: "compat_50_kevent" ret: "int" args: "int" "const struct kevent *" "size_t" "struct kevent *" "size_t" "const struct timespec50 *" */ +/* syscall: "compat_50_kevent" ret: "int" args: "int" "const struct kevent100 *" "size_t" "struct kevent100 *" "size_t" "const struct timespec50 *" */ #define SYS_compat_50_kevent 345 /* syscall: "_sched_setparam" ret: "int" args: "pid_t" "lwpid_t" "int" "const struct sched_param *" */ @@ -1207,8 +1207,8 @@ /* syscall: "compat_60__lwp_park" ret: "int" args: "const struct timespec *" "lwpid_t" "const void *" "const void *" */ #define SYS_compat_60__lwp_park 434 -/* syscall: "__kevent50" ret: "int" args: "int" "const struct kevent *" "size_t" "struct kevent *" "size_t" "const struct timespec *" */ -#define SYS___kevent50 435 +/* syscall: "compat_100___kevent50" ret: "int" args: "int" "const struct kevent100 *" "size_t" "struct kevent100 *" "size_t" "const struct timespec *" */ +#define SYS_compat_100___kevent50 435 /* syscall: "__pselect50" ret: "int" args: "int" "fd_set *" "fd_set *" "fd_set *" "const struct timespec *" "const sigset_t *" */ #define SYS___pselect50 436 @@ -1266,8 +1266,8 @@ /* syscall: "pipe2" ret: "int" args: "int *" "int" */ #define SYS_pipe2 453 -/* syscall: "dup3" ret: "int" args: "int" "int" "int" */ -#define SYS_dup3 454 +/* syscall: "compat_100_dup3" ret: "int" args: "int" "int" "int" */ +#define SYS_compat_100_dup3 454 /* syscall: "kqueue1" ret: "int" args: "int" */ #define SYS_kqueue1 455 @@ -1404,6 +1404,27 @@ /* syscall: "lpathconf" ret: "long" args: "const char *" "int" */ #define SYS_lpathconf 499 -#define SYS_MAXSYSCALL 500 +/* syscall: "memfd_create" ret: "int" args: "const char *" "unsigned int" */ +#define SYS_memfd_create 500 + +/* syscall: "__kevent100" ret: "int" args: "int" "const struct kevent *" "size_t" "struct kevent *" "size_t" "const struct timespec *" */ +#define SYS___kevent100 501 + +/* syscall: "epoll_create1" ret: "int" args: "int" */ +#define SYS_epoll_create1 502 + +/* syscall: "epoll_ctl" ret: "int" args: "int" "int" "int" "struct epoll_event *" */ +#define SYS_epoll_ctl 503 + +/* syscall: "epoll_pwait2" ret: "int" args: "int" "struct epoll_event *" "int" "const struct timespec *" "const sigset_t *" */ +#define SYS_epoll_pwait2 504 + +/* syscall: "__dup3100" ret: "int" args: "int" "int" "int" */ +#define SYS___dup3100 505 + +/* syscall: "semtimedop" ret: "int" args: "int" "struct sembuf *" "size_t" "struct timespec *" */ +#define SYS_semtimedop 506 + +#define SYS_MAXSYSCALL 507 #define SYS_NSYSENT 512 #endif /* _SYS_SYSCALL_H_ */ \ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/sys/syscallargs.h b/lib/libc/include/generic-netbsd/sys/syscallargs.h @@ -1,10 +1,10 @@ -/* $NetBSD: syscallargs.h,v 1.305 2021/11/01 05:26:27 thorpej Exp $ */ +/* $NetBSD: syscallargs.h,v 1.312 2024/10/09 16:29:11 christos Exp $ */ /* * System call argument lists. * * DO NOT EDIT-- this file is automatically generated. - * created from NetBSD: syscalls.master,v 1.309 2021/11/01 05:07:17 thorpej Exp + * created from NetBSD: syscalls.master,v 1.316 2024/10/09 16:27:28 christos Exp */ #ifndef _SYS_SYSCALLARGS_H_ @@ -2192,9 +2192,9 @@ check_syscall_args(sys_rasctl) struct compat_50_sys_kevent_args { syscallarg(int) fd; - syscallarg(const struct kevent *) changelist; + syscallarg(const struct kevent100 *) changelist; syscallarg(size_t) nchanges; - syscallarg(struct kevent *) eventlist; + syscallarg(struct kevent100 *) eventlist; syscallarg(size_t) nevents; syscallarg(const struct timespec50 *) timeout; }; @@ -2836,15 +2836,15 @@ struct compat_60_sys__lwp_park_args { check_syscall_args(compat_60_sys__lwp_park) #endif /* !RUMP_CLIENT */ -struct sys___kevent50_args { +struct compat_100_sys___kevent50_args { syscallarg(int) fd; - syscallarg(const struct kevent *) changelist; + syscallarg(const struct kevent100 *) changelist; syscallarg(size_t) nchanges; - syscallarg(struct kevent *) eventlist; + syscallarg(struct kevent100 *) eventlist; syscallarg(size_t) nevents; syscallarg(const struct timespec *) timeout; }; -check_syscall_args(sys___kevent50) +check_syscall_args(compat_100_sys___kevent50) struct sys___pselect50_args { syscallarg(int) nd; @@ -2979,12 +2979,12 @@ struct sys_pipe2_args { }; check_syscall_args(sys_pipe2) -struct sys_dup3_args { +struct compat_100_sys_dup3_args { syscallarg(int) from; syscallarg(int) to; syscallarg(int) flags; }; -check_syscall_args(sys_dup3) +check_syscall_args(compat_100_sys_dup3) struct sys_kqueue1_args { syscallarg(int) flags; @@ -3356,6 +3356,69 @@ struct sys_lpathconf_args { }; check_syscall_args(sys_lpathconf) +#ifndef RUMP_CLIENT +struct sys_memfd_create_args { + syscallarg(const char *) name; + syscallarg(unsigned int) flags; +}; +check_syscall_args(sys_memfd_create) +#endif /* !RUMP_CLIENT */ + +struct sys___kevent100_args { + syscallarg(int) fd; + syscallarg(const struct kevent *) changelist; + syscallarg(size_t) nchanges; + syscallarg(struct kevent *) eventlist; + syscallarg(size_t) nevents; + syscallarg(const struct timespec *) timeout; +}; +check_syscall_args(sys___kevent100) + +#ifndef RUMP_CLIENT +struct sys_epoll_create1_args { + syscallarg(int) flags; +}; +check_syscall_args(sys_epoll_create1) +#endif /* !RUMP_CLIENT */ + +#ifndef RUMP_CLIENT +struct sys_epoll_ctl_args { + syscallarg(int) epfd; + syscallarg(int) op; + syscallarg(int) fd; + syscallarg(struct epoll_event *) event; +}; +check_syscall_args(sys_epoll_ctl) +#endif /* !RUMP_CLIENT */ + +#ifndef RUMP_CLIENT +struct sys_epoll_pwait2_args { + syscallarg(int) epfd; + syscallarg(struct epoll_event *) events; + syscallarg(int) maxevents; + syscallarg(const struct timespec *) timeout; + syscallarg(const sigset_t *) sigmask; +}; +check_syscall_args(sys_epoll_pwait2) +#endif /* !RUMP_CLIENT */ + +struct sys___dup3100_args { + syscallarg(int) from; + syscallarg(int) to; + syscallarg(int) flags; +}; +check_syscall_args(sys___dup3100) + +#ifndef RUMP_CLIENT +struct sys_semtimedop_args { + syscallarg(int) semid; + syscallarg(struct sembuf *) sops; + syscallarg(size_t) nsops; + syscallarg(struct timespec *) timeout; +}; +check_syscall_args(sys_semtimedop) +#endif /* !RUMP_CLIENT */ + /* * System call prototypes. */ @@ -4149,7 +4212,7 @@ int sys___mq_timedreceive50(struct lwp *, const struct sys___mq_timedreceive50_a int compat_60_sys__lwp_park(struct lwp *, const struct compat_60_sys__lwp_park_args *, register_t *); -int sys___kevent50(struct lwp *, const struct sys___kevent50_args *, register_t *); +int compat_100_sys___kevent50(struct lwp *, const struct compat_100_sys___kevent50_args *, register_t *); int sys___pselect50(struct lwp *, const struct sys___pselect50_args *, register_t *); @@ -4188,7 +4251,7 @@ int sys___fhstat50(struct lwp *, const struct sys___fhstat50_args *, register_t int sys_pipe2(struct lwp *, const struct sys_pipe2_args *, register_t *); -int sys_dup3(struct lwp *, const struct sys_dup3_args *, register_t *); +int compat_100_sys_dup3(struct lwp *, const struct compat_100_sys_dup3_args *, register_t *); int sys_kqueue1(struct lwp *, const struct sys_kqueue1_args *, register_t *); @@ -4280,5 +4343,19 @@ int sys___acl_aclcheck_fd(struct lwp *, const struct sys___acl_aclcheck_fd_args int sys_lpathconf(struct lwp *, const struct sys_lpathconf_args *, register_t *); +int sys_memfd_create(struct lwp *, const struct sys_memfd_create_args *, register_t *); + +int sys___kevent100(struct lwp *, const struct sys___kevent100_args *, register_t *); + +int sys_epoll_create1(struct lwp *, const struct sys_epoll_create1_args *, register_t *); + +int sys_epoll_ctl(struct lwp *, const struct sys_epoll_ctl_args *, register_t *); + +int sys_epoll_pwait2(struct lwp *, const struct sys_epoll_pwait2_args *, register_t *); + +int sys___dup3100(struct lwp *, const struct sys___dup3100_args *, register_t *); + +int sys_semtimedop(struct lwp *, const struct sys_semtimedop_args *, register_t *); + #endif /* !RUMP_CLIENT */ #endif /* _SYS_SYSCALLARGS_H_ */ \ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/sys/sysctl.h b/lib/libc/include/generic-netbsd/sys/sysctl.h @@ -1,4 +1,4 @@ -/* $NetBSD: sysctl.h,v 1.236 2021/09/16 22:47:29 christos Exp $ */ +/* $NetBSD: sysctl.h,v 1.241 2025/07/13 20:13:39 christos Exp $ */ /* * Copyright (c) 1989, 1993 @@ -73,10 +73,10 @@ struct sysctlnode; #define CTL_MAXNAME 12 /* largest number of components supported */ -#define SYSCTL_NAMELEN 32 /* longest name allowed for a node */ +#define SYSCTL_NAMELEN 32 /* longest name allowed for a node */ -#define CREATE_BASE (1024) /* start of dynamic mib allocation */ -#define SYSCTL_DEFSIZE 8 /* initial size of a child set */ +#define CREATE_BASE (1024) /* start of dynamic mib allocation */ +#define SYSCTL_DEFSIZE 8 /* initial size of a child set */ /* * Each subsystem defined by sysctl defines a list of variables @@ -105,38 +105,38 @@ struct ctlname { /* * Flags that apply to each node, governing access and other features */ -#define CTLFLAG_READONLY 0x00000000 +#define CTLFLAG_READONLY 0x00000000 /* #define CTLFLAG_UNUSED1 0x00000010 */ /* #define CTLFLAG_UNUSED2 0x00000020 */ /* #define CTLFLAG_READ* 0x00000040 */ -#define CTLFLAG_READWRITE 0x00000070 -#define CTLFLAG_ANYWRITE 0x00000080 -#define CTLFLAG_PRIVATE 0x00000100 -#define CTLFLAG_PERMANENT 0x00000200 -#define CTLFLAG_OWNDATA 0x00000400 -#define CTLFLAG_IMMEDIATE 0x00000800 -#define CTLFLAG_HEX 0x00001000 -#define CTLFLAG_ROOT 0x00002000 -#define CTLFLAG_ANYNUMBER 0x00004000 -#define CTLFLAG_HIDDEN 0x00008000 -#define CTLFLAG_ALIAS 0x00010000 -#define CTLFLAG_MMAP 0x00020000 -#define CTLFLAG_OWNDESC 0x00040000 -#define CTLFLAG_UNSIGNED 0x00080000 +#define CTLFLAG_READWRITE 0x00000070 +#define CTLFLAG_ANYWRITE 0x00000080 +#define CTLFLAG_PRIVATE 0x00000100 +#define CTLFLAG_PERMANENT 0x00000200 +#define CTLFLAG_OWNDATA 0x00000400 +#define CTLFLAG_IMMEDIATE 0x00000800 +#define CTLFLAG_HEX 0x00001000 +#define CTLFLAG_ROOT 0x00002000 +#define CTLFLAG_ANYNUMBER 0x00004000 +#define CTLFLAG_HIDDEN 0x00008000 +#define CTLFLAG_ALIAS 0x00010000 +#define CTLFLAG_MMAP 0x00020000 +#define CTLFLAG_OWNDESC 0x00040000 +#define CTLFLAG_UNSIGNED 0x00080000 /* * sysctl API version */ -#define SYSCTL_VERS_MASK 0xff000000 -#define SYSCTL_VERS_0 0x00000000 -#define SYSCTL_VERS_1 0x01000000 -#define SYSCTL_VERSION SYSCTL_VERS_1 -#define SYSCTL_VERS(f) ((f) & SYSCTL_VERS_MASK) +#define SYSCTL_VERS_MASK 0xff000000 +#define SYSCTL_VERS_0 0x00000000 +#define SYSCTL_VERS_1 0x01000000 +#define SYSCTL_VERSION SYSCTL_VERS_1 +#define SYSCTL_VERS(f) ((f) & SYSCTL_VERS_MASK) /* * Flags that can be set by a create request from user-space */ -#define SYSCTL_USERFLAGS (CTLFLAG_READWRITE|\ +#define SYSCTL_USERFLAGS (CTLFLAG_READWRITE|\ CTLFLAG_ANYWRITE|\ CTLFLAG_PRIVATE|\ CTLFLAG_OWNDATA|\ @@ -147,21 +147,21 @@ struct ctlname { /* * Accessor macros */ -#define SYSCTL_TYPEMASK 0x0000000f -#define SYSCTL_TYPE(x) ((x) & SYSCTL_TYPEMASK) -#define SYSCTL_FLAGMASK 0x00fffff0 -#define SYSCTL_FLAGS(x) ((x) & SYSCTL_FLAGMASK) +#define SYSCTL_TYPEMASK 0x0000000f +#define SYSCTL_TYPE(x) ((x) & SYSCTL_TYPEMASK) +#define SYSCTL_FLAGMASK 0x00fffff0 +#define SYSCTL_FLAGS(x) ((x) & SYSCTL_FLAGMASK) /* * Meta-identifiers */ -#define CTL_EOL (-1) /* end of createv/destroyv list */ -#define CTL_QUERY (-2) /* enumerates children of a node */ -#define CTL_CREATE (-3) /* node create request */ -#define CTL_CREATESYM (-4) /* node create request with symbol */ -#define CTL_DESTROY (-5) /* node destroy request */ -#define CTL_MMAP (-6) /* mmap request */ -#define CTL_DESCRIBE (-7) /* get node descriptions */ +#define CTL_EOL (-1) /* end of createv/destroyv list */ +#define CTL_QUERY (-2) /* enumerates children of a node */ +#define CTL_CREATE (-3) /* node create request */ +#define CTL_CREATESYM (-4) /* node create request with symbol */ +#define CTL_DESTROY (-5) /* node destroy request */ +#define CTL_MMAP (-6) /* mmap request */ +#define CTL_DESCRIBE (-7) /* get node descriptions */ /* * Top-level identifiers @@ -275,6 +275,7 @@ struct ctlname { #define KERN_BOOTTIME 83 /* struct: time kernel was booted */ #define KERN_EVCNT 84 /* struct: evcnts */ #define KERN_SOFIXEDBUF 85 /* bool: fixed socket buffer sizes */ +#define KERN_ENTROPY 86 /* node: entropy(9) subsystem */ /* * KERN_CLOCKRATE structure @@ -362,8 +363,8 @@ struct kinfo_proc { * Convert pointer to 64 bit unsigned integer for struct * kinfo_proc2, etc. */ -#define PTRTOUINT64(p) ((uint64_t)(uintptr_t)(p)) -#define UINT64TOPTR(u) ((void *)(uintptr_t)(u)) +#define PTRTOUINT64(p) ((uint64_t)(uintptr_t)(p)) +#define UINT64TOPTR(u) ((void *)(uintptr_t)(u)) /* * KERN_PROC2 subtype ops return arrays of relatively fixed size @@ -378,7 +379,7 @@ struct kinfo_proc { #define KI_MAXEMULLEN 16 #define KI_LNAMELEN 20 /* extra 4 for alignment */ -#define KI_NOCPU (~(uint64_t)0) +#define KI_NOCPU (~(uint64_t)0) typedef struct { uint32_t __bits[4]; @@ -780,6 +781,12 @@ typedef int (*hashstat_func_t)(struct hashstat_sysctl *, bool); void hashstat_register(const char *, hashstat_func_t); /* + * kern.entropy.* variables + */ + +#define KERN_ENTROPY_EPOCH 1 /* int: PRNG reseed epoch */ + +/* * CTL_VM identifiers in <uvm/uvm_param.h> */ @@ -929,7 +936,7 @@ struct kinfo_vmentry { #define PROC_PID_LIMIT_CORE (RLIMIT_CORE+1) #define PROC_PID_LIMIT_RSS (RLIMIT_RSS+1) #define PROC_PID_LIMIT_MEMLOCK (RLIMIT_MEMLOCK+1) -#define PROC_PID_LIMIT_NPROC (RLIMIT_NPROC+1) +#define PROC_PID_LIMIT_NPROC (RLIMIT_NPROC+1) #define PROC_PID_LIMIT_NOFILE (RLIMIT_NOFILE+1) #define PROC_PID_LIMIT_SBSIZE (RLIMIT_SBSIZE+1) #define PROC_PID_LIMIT_AS (RLIMIT_AS+1) @@ -1004,15 +1011,15 @@ extern struct ctldebug debug10, debug11, debug12, debug13, debug14; extern struct ctldebug debug15, debug16, debug17, debug18, debug19; #endif /* DEBUG */ -#define SYSCTLFN_PROTO const int *, u_int, void *, \ +#define SYSCTLFN_PROTO const int *, u_int, void *, \ size_t *, const void *, size_t, \ const int *, struct lwp *, const struct sysctlnode * -#define SYSCTLFN_ARGS const int *name, u_int namelen, \ +#define SYSCTLFN_ARGS const int *name, u_int namelen, \ void *oldp, size_t *oldlenp, \ const void *newp, size_t newlen, \ const int *oname, struct lwp *l, \ const struct sysctlnode *rnode -#define SYSCTLFN_CALL(node) name, namelen, oldp, \ +#define SYSCTLFN_CALL(node) name, namelen, oldp, \ oldlenp, newp, newlen, \ oname, l, node @@ -1024,7 +1031,7 @@ struct sysctl_setup_chain { LIST_ENTRY(sysctl_setup_chain) ssc_entries; }; LIST_HEAD(sysctl_boot_chain, sysctl_setup_chain); -#define _SYSCTL_REGISTER(name) \ +#define _SYSCTL_REGISTER(name) \ static struct sysctl_setup_chain __CONCAT(ssc,name) = { \ .ssc_func = name, \ }; \ @@ -1048,16 +1055,16 @@ static void sysctldtor_##name(void) \ #else /* RUMP_USE_CTOR */ -#define _SYSCTL_REGISTER(name) __link_set_add_text(sysctl_funcs, name); +#define _SYSCTL_REGISTER(name) __link_set_add_text(sysctl_funcs, name); #endif /* RUMP_USE_CTOR */ #ifdef _MODULE -#define SYSCTL_SETUP_PROTO(name) \ +#define SYSCTL_SETUP_PROTO(name) \ void name(struct sysctllog **) #ifdef SYSCTL_DEBUG_SETUP -#define SYSCTL_SETUP(name, desc) \ +#define SYSCTL_SETUP(name, desc) \ SYSCTL_SETUP_PROTO(name); \ static void __CONCAT(___,name)(struct sysctllog **); \ void name(struct sysctllog **clog) { \ @@ -1066,7 +1073,7 @@ static void sysctldtor_##name(void) \ _SYSCTL_REGISTER(name); \ static void __CONCAT(___,name)(struct sysctllog **clog) #else /* !SYSCTL_DEBUG_SETUP */ -#define SYSCTL_SETUP(name, desc) \ +#define SYSCTL_SETUP(name, desc) \ SYSCTL_SETUP_PROTO(name); \ _SYSCTL_REGISTER(name); \ void name(struct sysctllog **clog) @@ -1074,9 +1081,9 @@ static void sysctldtor_##name(void) \ #else /* !_MODULE */ -#define SYSCTL_SETUP_PROTO(name) +#define SYSCTL_SETUP_PROTO(name) #ifdef SYSCTL_DEBUG_SETUP -#define SYSCTL_SETUP(name, desc) \ +#define SYSCTL_SETUP(name, desc) \ static void __CONCAT(___,name)(struct sysctllog **); \ static void name(struct sysctllog **clog) { \ printf("%s\n", desc); \ @@ -1084,7 +1091,7 @@ static void sysctldtor_##name(void) \ _SYSCTL_REGISTER(name); \ static void __CONCAT(___,name)(struct sysctllog **clog) #else /* !SYSCTL_DEBUG_SETUP */ -#define SYSCTL_SETUP(name, desc) \ +#define SYSCTL_SETUP(name, desc) \ static void name(struct sysctllog **); \ _SYSCTL_REGISTER(name); \ static void name(struct sysctllog **clog) @@ -1147,23 +1154,23 @@ int sysctl_createv(struct sysctllog **, int, sysctlfn, u_quad_t, void *, size_t, ...); int sysctl_destroyv(struct sysctlnode *, ...); -#define VERIFY_FN(ctl_type, c_type) \ +#define VERIFY_FN(ctl_type, c_type) \ __always_inline static __inline void * \ __sysctl_verify_##ctl_type##_arg(c_type *arg) \ { \ return arg; \ } -VERIFY_FN(CTLTYPE_NODE, struct sysctlnode); -VERIFY_FN(CTLTYPE_INT, int); -VERIFY_FN(CTLTYPE_STRING, char); -VERIFY_FN(CTLTYPE_QUAD, int64_t); -VERIFY_FN(CTLTYPE_STRUCT, void); -VERIFY_FN(CTLTYPE_BOOL, bool); -VERIFY_FN(CTLTYPE_LONG, long); +VERIFY_FN(CTLTYPE_NODE, struct sysctlnode) +VERIFY_FN(CTLTYPE_INT, int) +VERIFY_FN(CTLTYPE_STRING, char) +VERIFY_FN(CTLTYPE_QUAD, int64_t) +VERIFY_FN(CTLTYPE_STRUCT, void) +VERIFY_FN(CTLTYPE_BOOL, bool) +VERIFY_FN(CTLTYPE_LONG, long) #undef VERIFY_FN -#define sysctl_createv(lg, cfl, rn, cn, fl, type, nm, desc, fn, qv, newp, ...) \ +#define sysctl_createv(lg, cfl, rn, cn, fl, type, nm, desc, fn, qv, newp, ...) \ sysctl_createv(lg, cfl, rn, cn, fl, type, nm, desc, fn, qv, \ __sysctl_verify_##type##_arg(newp), __VA_ARGS__) @@ -1176,9 +1183,9 @@ void sysctl_teardown(struct sysctllog **); void sysctl_log_print(const struct sysctllog *); #ifdef SYSCTL_INCLUDE_DESCR -#define SYSCTL_DESCR(s) s +#define SYSCTL_DESCR(s) s #else /* SYSCTL_INCLUDE_DESCR */ -#define SYSCTL_DESCR(s) NULL +#define SYSCTL_DESCR(s) NULL #endif /* SYSCTL_INCLUDE_DESCR */ /* @@ -1231,6 +1238,7 @@ int proc_compare(const struct kinfo_proc2 *, const struct kinfo_lwp *, const struct kinfo_proc2 *, const struct kinfo_lwp *); void *asysctl(const int *, size_t, size_t *); void *asysctlbyname(const char *, size_t *); +int __learn_tree(int *, u_int, struct sysctlnode *); __END_DECLS #endif /* !_KERNEL */ @@ -1246,19 +1254,19 @@ __END_DECLS * the expense of making things bigger on 32 bit platforms. */ #if defined(_LP64) || (BYTE_ORDER == LITTLE_ENDIAN) -#define __sysc_pad(type) union { uint64_t __sysc_upad; \ +#define __sysc_pad(type) union { uint64_t __sysc_upad; \ struct { type __sysc_sdatum; } __sysc_ustr; } #else -#define __sysc_pad(type) union { uint64_t __sysc_upad; \ +#define __sysc_pad(type) union { uint64_t __sysc_upad; \ struct { uint32_t __sysc_spad; type __sysc_sdatum; } __sysc_ustr; } #endif -#define __sysc_unpad(x) x.__sysc_ustr.__sysc_sdatum +#define __sysc_unpad(x) x.__sysc_ustr.__sysc_sdatum /* * The following is for gcc2, which doesn't handle __sysc_unpad(). * The code gets a little less ugly this way. */ -#define sysc_init_field(field, value) \ +#define sysc_init_field(field, value) \ .field = { .__sysc_ustr = { .__sysc_sdatum = (value), }, } struct sysctlnode { @@ -1291,26 +1299,26 @@ struct sysctlnode { /* * padded data */ -#define suc_child __sysc_unpad(_suc_child) -#define sud_data __sysc_unpad(_sud_data) -#define sud_offset __sysc_unpad(_sud_offset) -#define sysctl_size __sysc_unpad(_sysctl_size) -#define sysctl_func __sysc_unpad(_sysctl_func) -#define sysctl_parent __sysc_unpad(_sysctl_parent) -#define sysctl_desc __sysc_unpad(_sysctl_desc) +#define suc_child __sysc_unpad(_suc_child) +#define sud_data __sysc_unpad(_sud_data) +#define sud_offset __sysc_unpad(_sud_offset) +#define sysctl_size __sysc_unpad(_sysctl_size) +#define sysctl_func __sysc_unpad(_sysctl_func) +#define sysctl_parent __sysc_unpad(_sysctl_parent) +#define sysctl_desc __sysc_unpad(_sysctl_desc) /* * nested data (may also be padded) */ -#define sysctl_csize sysctl_un.scu_child.suc_csize -#define sysctl_clen sysctl_un.scu_child.suc_clen -#define sysctl_child sysctl_un.scu_child.suc_child -#define sysctl_data sysctl_un.scu_data.sud_data -#define sysctl_offset sysctl_un.scu_data.sud_offset -#define sysctl_alias sysctl_un.scu_alias -#define sysctl_idata sysctl_un.scu_idata -#define sysctl_qdata sysctl_un.scu_qdata -#define sysctl_bdata sysctl_un.scu_bdata +#define sysctl_csize sysctl_un.scu_child.suc_csize +#define sysctl_clen sysctl_un.scu_child.suc_clen +#define sysctl_child sysctl_un.scu_child.suc_child +#define sysctl_data sysctl_un.scu_data.sud_data +#define sysctl_offset sysctl_un.scu_data.sud_offset +#define sysctl_alias sysctl_un.scu_alias +#define sysctl_idata sysctl_un.scu_idata +#define sysctl_qdata sysctl_un.scu_qdata +#define sysctl_bdata sysctl_un.scu_bdata /* * when requesting a description of a node (a set of nodes, actually), @@ -1328,13 +1336,13 @@ struct sysctldesc { char descr_str[1]; /* not really 1...see above */ }; -#define __sysc_desc_roundup(x) ((((x) - 1) | (sizeof(int32_t) - 1)) + 1) -#define __sysc_desc_len(l) (offsetof(struct sysctldesc, descr_str) +\ +#define __sysc_desc_roundup(x) ((((x) - 1) | (sizeof(int32_t) - 1)) + 1) +#define __sysc_desc_len(l) (offsetof(struct sysctldesc, descr_str) +\ __sysc_desc_roundup(l)) -#define __sysc_desc_adv(d, l) \ +#define __sysc_desc_adv(d, l) \ (/*XXXUNCONST ptr cast*/(struct sysctldesc *) \ __UNCONST(((const char*)(d)) + __sysc_desc_len(l))) -#define NEXT_DESCR(d) __sysc_desc_adv((d), (d)->descr_len) +#define NEXT_DESCR(d) __sysc_desc_adv((d), (d)->descr_len) static __inline const struct sysctlnode * sysctl_rootof(const struct sysctlnode *n) diff --git a/lib/libc/include/generic-netbsd/sys/syslimits.h b/lib/libc/include/generic-netbsd/sys/syslimits.h @@ -1,4 +1,4 @@ -/* $NetBSD: syslimits.h,v 1.28 2015/08/21 07:19:39 uebayasi Exp $ */ +/* $NetBSD: syslimits.h,v 1.29 2024/12/22 23:18:29 riastradh Exp $ */ /* * Copyright (c) 1988, 1993 @@ -70,6 +70,13 @@ #define RE_DUP_MAX 255 /* max RE's in interval notation */ /* + * POSIX Realtime Extension (1003.1b-1993) + */ +#if (_POSIX_C_SOURCE - 0) >= 199309L || defined(_NETBSD_SOURCE) +#define DELAYTIMER_MAX 32 /* max timer_overrun() value */ +#endif + +/* * IEEE Std 1003.1c-95, adopted in X/Open CAE Specification Issue 5 Version 2 */ #if (_POSIX_C_SOURCE - 0) >= 199506L || (_XOPEN_SOURCE - 0) >= 500 || \ diff --git a/lib/libc/include/generic-netbsd/sys/syslog.h b/lib/libc/include/generic-netbsd/sys/syslog.h @@ -1,4 +1,4 @@ -/* $NetBSD: syslog.h,v 1.41.44.1 2024/10/08 11:16:17 martin Exp $ */ +/* $NetBSD: syslog.h,v 1.44 2024/08/21 16:30:27 gutteridge Exp $ */ /* * Copyright (c) 1982, 1986, 1988, 1993 @@ -62,12 +62,11 @@ #define LOG_PRIMASK 0x07 /* mask to extract priority part (internal) */ /* extract priority */ #define LOG_PRI(p) ((p) & LOG_PRIMASK) -#define LOG_MAKEPRI(fac, pri) (((fac) << 3) | (pri)) #ifdef SYSLOG_NAMES #define INTERNAL_NOPRI 0x10 /* the "no priority" priority */ /* mark "facility" */ -#define INTERNAL_MARK LOG_MAKEPRI(LOG_NFACILITIES, 0) +#define INTERNAL_MARK (LOG_NFACILITIES<<3) typedef struct _code { const char *c_name; int c_val; @@ -222,11 +221,11 @@ void vsyslogp_r(int, struct syslog_data *, const char *, const char *, const char *, __va_list) __RENAME(__vsyslogp_r60) __sysloglike(5, 0); void syslog_ss(int, struct syslog_data *, const char *, ...) __RENAME(__syslog_ss60) __sysloglike(3, 4); -void vsyslog_ss(int, struct syslog_data *, const char *, va_list) - __RENAME(__vsyslog_ss60) __sysloglike(3, 0); -void syslogp_ss(int, struct syslog_data *, const char *, const char *, +void vsyslog_ss(int, struct syslog_data *, const char *, va_list) + __RENAME(__vsyslog_ss60) __sysloglike(3, 0); +void syslogp_ss(int, struct syslog_data *, const char *, const char *, const char *, ...) __RENAME(__syslogp_ss60) __sysloglike(5, 0); -void vsyslogp_ss(int, struct syslog_data *, const char *, const char *, +void vsyslogp_ss(int, struct syslog_data *, const char *, const char *, const char *, va_list) __RENAME(__vsyslogp_ss60) __sysloglike(5, 0); #endif void syslogp(int, const char *, const char *, const char *, ...) diff --git a/lib/libc/include/generic-netbsd/sys/time.h b/lib/libc/include/generic-netbsd/sys/time.h @@ -1,4 +1,4 @@ -/* $NetBSD: time.h,v 1.80 2022/06/26 22:31:38 riastradh Exp $ */ +/* $NetBSD: time.h,v 1.82 2024/12/22 23:24:20 riastradh Exp $ */ /* * Copyright (c) 1982, 1986, 1993 @@ -52,11 +52,11 @@ struct timeval { #define TIMEVAL_TO_TIMESPEC(tv, ts) do { \ (ts)->tv_sec = (tv)->tv_sec; \ (ts)->tv_nsec = (tv)->tv_usec * 1000; \ -} while (/*CONSTCOND*/0) +} while (0) #define TIMESPEC_TO_TIMEVAL(tv, ts) do { \ (tv)->tv_sec = (ts)->tv_sec; \ (tv)->tv_usec = (suseconds_t)(ts)->tv_nsec / 1000; \ -} while (/*CONSTCOND*/0) +} while (0) /* * Note: timezone is obsolete. All timezone handling is now in @@ -82,7 +82,7 @@ struct timezone { (vvp)->tv_sec++; \ (vvp)->tv_usec -= 1000000; \ } \ - } while (/* CONSTCOND */ 0) + } while (0) #define timersub(tvp, uvp, vvp) \ do { \ (vvp)->tv_sec = (tvp)->tv_sec - (uvp)->tv_sec; \ @@ -91,7 +91,7 @@ struct timezone { (vvp)->tv_sec--; \ (vvp)->tv_usec += 1000000; \ } \ - } while (/* CONSTCOND */ 0) + } while (0) /* * hide bintime for _STANDALONE because this header is used for hpcboot.exe, @@ -254,7 +254,7 @@ ns2bintime(uint64_t ns) (vsp)->tv_sec++; \ (vsp)->tv_nsec -= 1000000000L; \ } \ - } while (/* CONSTCOND */ 0) + } while (0) #define timespecsub(tsp, usp, vsp) \ do { \ (vsp)->tv_sec = (tsp)->tv_sec - (usp)->tv_sec; \ @@ -263,10 +263,11 @@ ns2bintime(uint64_t ns) (vsp)->tv_sec--; \ (vsp)->tv_nsec += 1000000000L; \ } \ - } while (/* CONSTCOND */ 0) + } while (0) #define timespec2ns(x) (((uint64_t)(x)->tv_sec) * 1000000000L + (x)->tv_nsec) -#ifdef _KERNEL +#if defined(_KERNEL) || defined(_TIME_TESTING) +#include <sys/stdbool.h> bool timespecaddok(const struct timespec *, const struct timespec *) __pure; bool timespecsubok(const struct timespec *, const struct timespec *) __pure; #endif @@ -310,6 +311,7 @@ struct itimerspec { #define TIMER_ABSTIME 0x1 /* absolute timer */ #ifdef _KERNEL +#include <sys/timearith.h> #include <sys/timevar.h> #else /* !_KERNEL */ #ifndef _STANDALONE diff --git a/lib/libc/include/generic-netbsd/sys/tree.h b/lib/libc/include/generic-netbsd/sys/tree.h @@ -1,4 +1,4 @@ -/* $NetBSD: tree.h,v 1.20 2013/09/14 13:20:45 joerg Exp $ */ +/* $NetBSD: tree.h,v 1.21 2024/05/12 10:34:56 rillig Exp $ */ /* $OpenBSD: tree.h,v 1.13 2011/07/09 00:19:45 pirofti Exp $ */ /* * Copyright 2002 Niels Provos <provos@citi.umich.edu> @@ -65,7 +65,7 @@ struct name { \ #define SPLAY_INIT(root) do { \ (root)->sph_root = NULL; \ -} while (/*CONSTCOND*/ 0) +} while (0) #define SPLAY_ENTRY(type) \ struct { \ @@ -83,32 +83,32 @@ struct { \ SPLAY_LEFT((head)->sph_root, field) = SPLAY_RIGHT(tmp, field); \ SPLAY_RIGHT(tmp, field) = (head)->sph_root; \ (head)->sph_root = tmp; \ -} while (/*CONSTCOND*/ 0) +} while (0) #define SPLAY_ROTATE_LEFT(head, tmp, field) do { \ SPLAY_RIGHT((head)->sph_root, field) = SPLAY_LEFT(tmp, field); \ SPLAY_LEFT(tmp, field) = (head)->sph_root; \ (head)->sph_root = tmp; \ -} while (/*CONSTCOND*/ 0) +} while (0) #define SPLAY_LINKLEFT(head, tmp, field) do { \ SPLAY_LEFT(tmp, field) = (head)->sph_root; \ tmp = (head)->sph_root; \ (head)->sph_root = SPLAY_LEFT((head)->sph_root, field); \ -} while (/*CONSTCOND*/ 0) +} while (0) #define SPLAY_LINKRIGHT(head, tmp, field) do { \ SPLAY_RIGHT(tmp, field) = (head)->sph_root; \ tmp = (head)->sph_root; \ (head)->sph_root = SPLAY_RIGHT((head)->sph_root, field); \ -} while (/*CONSTCOND*/ 0) +} while (0) #define SPLAY_ASSEMBLE(head, node, left, right, field) do { \ SPLAY_RIGHT(left, field) = SPLAY_LEFT((head)->sph_root, field); \ SPLAY_LEFT(right, field) = SPLAY_RIGHT((head)->sph_root, field);\ SPLAY_LEFT((head)->sph_root, field) = SPLAY_RIGHT(node, field); \ SPLAY_RIGHT((head)->sph_root, field) = SPLAY_LEFT(node, field); \ -} while (/*CONSTCOND*/ 0) +} while (0) /* Generates prototypes and inline functions */ @@ -299,7 +299,7 @@ struct name { \ #define RB_INIT(root) do { \ (root)->rbh_root = NULL; \ -} while (/*CONSTCOND*/ 0) +} while (0) #define RB_BLACK 0 #define RB_RED 1 @@ -322,15 +322,15 @@ struct { \ RB_PARENT(elm, field) = parent; \ RB_LEFT(elm, field) = RB_RIGHT(elm, field) = NULL; \ RB_COLOR(elm, field) = RB_RED; \ -} while (/*CONSTCOND*/ 0) +} while (0) #define RB_SET_BLACKRED(black, red, field) do { \ RB_COLOR(black, field) = RB_BLACK; \ RB_COLOR(red, field) = RB_RED; \ -} while (/*CONSTCOND*/ 0) +} while (0) #ifndef RB_AUGMENT -#define RB_AUGMENT(x) do {} while (/*CONSTCOND*/ 0) +#define RB_AUGMENT(x) do {} while (0) #endif #define RB_ROTATE_LEFT(head, elm, tmp, field) do { \ @@ -351,7 +351,7 @@ struct { \ RB_AUGMENT(tmp); \ if ((RB_PARENT(tmp, field))) \ RB_AUGMENT(RB_PARENT(tmp, field)); \ -} while (/*CONSTCOND*/ 0) +} while (0) #define RB_ROTATE_RIGHT(head, elm, tmp, field) do { \ (tmp) = RB_LEFT(elm, field); \ @@ -371,7 +371,7 @@ struct { \ RB_AUGMENT(tmp); \ if ((RB_PARENT(tmp, field))) \ RB_AUGMENT(RB_PARENT(tmp, field)); \ -} while (/*CONSTCOND*/ 0) +} while (0) /* Generates prototypes and inline functions */ #define RB_PROTOTYPE(name, type, field, cmp) \ diff --git a/lib/libc/include/generic-netbsd/sys/tty.h b/lib/libc/include/generic-netbsd/sys/tty.h @@ -1,4 +1,4 @@ -/* $NetBSD: tty.h,v 1.103 2022/10/26 23:41:49 riastradh Exp $ */ +/* $NetBSD: tty.h,v 1.104 2023/04/12 06:35:26 riastradh Exp $ */ /*- * Copyright (c) 2008 The NetBSD Foundation, Inc. @@ -285,7 +285,7 @@ int ttstart(struct tty *); void ttwakeup(struct tty *); int ttwrite(struct tty *, struct uio *, int); void ttychars(struct tty *); -int ttycheckoutq(struct tty *, int); +int ttycheckoutq(struct tty *); void ttycancel(struct tty *); int ttyclose(struct tty *); void ttyflush(struct tty *, int); diff --git a/lib/libc/include/generic-netbsd/sys/ttycom.h b/lib/libc/include/generic-netbsd/sys/ttycom.h @@ -1,4 +1,4 @@ -/* $NetBSD: ttycom.h,v 1.21.34.1 2022/12/21 19:58:15 martin Exp $ */ +/* $NetBSD: ttycom.h,v 1.23 2024/10/30 15:56:12 riastradh Exp $ */ /*- * Copyright (c) 1982, 1986, 1990, 1993, 1994 @@ -59,6 +59,12 @@ struct winsize { }; #endif /* !_POSIX_SYS_TTYCOM_H_ */ +#include <sys/featuretest.h> + +/* + * XXX This is revolting -- should not depend on order of includes via + * _SYS_IOCTL_H_. + */ #if defined(_NETBSD_SOURCE) || defined(_SYS_IOCTL_H_) #ifndef _NETBSD_SYS_TTYCOM_H_ diff --git a/lib/libc/include/generic-netbsd/sys/types.h b/lib/libc/include/generic-netbsd/sys/types.h @@ -1,4 +1,4 @@ -/* $NetBSD: types.h,v 1.105.20.1 2023/05/15 10:34:58 martin Exp $ */ +/* $NetBSD: types.h,v 1.106 2023/01/13 18:43:42 martin Exp $ */ /*- * Copyright (c) 1982, 1986, 1991, 1993, 1994 diff --git a/lib/libc/include/generic-netbsd/sys/ucontext.h b/lib/libc/include/generic-netbsd/sys/ucontext.h @@ -1,7 +1,7 @@ -/* $NetBSD: ucontext.h,v 1.19 2018/02/27 23:09:02 uwe Exp $ */ +/* $NetBSD: ucontext.h,v 1.24 2024/05/25 13:44:48 riastradh Exp $ */ /*- - * Copyright (c) 1999, 2003 The NetBSD Foundation, Inc. + * Copyright (c) 1999, 2003, 2024 The NetBSD Foundation, Inc. * All rights reserved. * * This code is derived from software contributed to The NetBSD Foundation @@ -33,6 +33,36 @@ #define _SYS_UCONTEXT_H_ #include <sys/sigtypes.h> + +/* uc_flags */ +#define _UC_SIGMASK 0x01 /* valid uc_sigmask */ +#define _UC_STACK 0x02 /* valid uc_stack */ +#define _UC_CPU 0x04 /* valid GPR context in uc_mcontext */ +#define _UC_FPU 0x08 /* valid FPU context in uc_mcontext */ +#define _UC_MD_BIT5 0x00000020 /* MD bits. see below */ +#define _UC_MD_BIT16 0x00010000 +#define _UC_MD_BIT17 0x00020000 +#define _UC_MD_BIT18 0x00040000 +#define _UC_MD_BIT19 0x00080000 +#define _UC_MD_BIT20 0x00100000 +#define _UC_MD_BIT21 0x00200000 +#define _UC_MD_BIT30 0x40000000 + +/* + * if your port needs more MD bits, please choose bits from _UC_MD_BIT* + * rather than picking random unused bits. + * + * For historical reasons, some common flags have machine-dependent + * definitions. All platforms must define and handle those flags, + * which are: + * + * _UC_TLSBASE Context contains valid pthread private pointer + * + * _UC_SETSTACK Context uses signal stack + * + * _UC_CLRSTACK Context does not use signal stack + */ + #include <machine/mcontext.h> typedef struct __ucontext ucontext_t; @@ -52,54 +82,21 @@ struct __ucontext { #define _UC_UCONTEXT_ALIGN (~0) #endif -/* uc_flags */ -#define _UC_SIGMASK 0x01 /* valid uc_sigmask */ -#define _UC_STACK 0x02 /* valid uc_stack */ -#define _UC_CPU 0x04 /* valid GPR context in uc_mcontext */ -#define _UC_FPU 0x08 /* valid FPU context in uc_mcontext */ -#define _UC_MD 0x400f0020 /* MD bits. see below */ +#ifndef __UCONTEXT_SIZE +#define __UCONTEXT_SIZE sizeof(ucontext_t) +#endif -/* - * if your port needs more MD bits, please try to choose bits from _UC_MD - * first, rather than picking random unused bits. - * - * _UC_MD details - * - * _UC_TLSBASE Context contains valid pthread private pointer - * All ports must define this MD flag - * 0x00040000 hppa, mips - * 0x00000020 alpha - * 0x00080000 all other ports - * - * _UC_SETSTACK Context uses signal stack - * 0x00020000 arm - * [undefined] alpha, powerpc and vax - * 0x00010000 other ports - * - * _UC_CLRSTACK Context does not use signal stack - * 0x00040000 arm - * [undefined] alpha, powerpc and vax - * 0x00020000 other ports - * - * _UC_POWERPC_VEC Context contains valid AltiVec context - * 0x00010000 powerpc only - * - * _UC_POWERPC_SPE Context contains valid SPE context - * 0x00020000 powerpc only - * - * _UC_M68K_UC_USER Used by m68k machdep code, but undocumented - * 0x40000000 m68k only - * - * _UC_ARM_VFP Unused - * 0x00010000 arm only - * - * _UC_VM Context contains valid virtual 8086 context - * 0x00040000 i386, amd64 only - * - * _UC_FXSAVE Context contains FPU context in that - * is in FXSAVE format in XMM space - * 0x00000020 i386, amd64 only - */ +#ifndef _UC_TLSBASE +#error _UC_TLSBASE not defined. +#endif + +#ifndef _UC_SETSTACK +#error _UC_SETSTACK not defined. +#endif + +#ifndef _UC_CLRSTACK +#error _UC_CLRSTACK not defined. +#endif #ifdef _KERNEL struct lwp; diff --git a/lib/libc/include/generic-netbsd/sys/un.h b/lib/libc/include/generic-netbsd/sys/un.h @@ -1,4 +1,4 @@ -/* $NetBSD: un.h,v 1.60 2021/08/08 20:54:49 nia Exp $ */ +/* $NetBSD: un.h,v 1.61 2023/11/08 19:27:13 jschauma Exp $ */ /* * Copyright (c) 1982, 1986, 1993 @@ -44,12 +44,20 @@ typedef __sa_family_t sa_family_t; #endif /* + * Historically, (struct sockaddr) needed to fit inside an mbuf. + * For this reason, UNIX domain sockets were therefore limited to + * 104 bytes. While this limit is no longer necessary, it is kept for + * binary compatibility reasons. + */ +#define SUNPATHLEN 104 + +/* * Definitions for UNIX IPC domain. */ struct sockaddr_un { - uint8_t sun_len; /* total sockaddr length */ - sa_family_t sun_family; /* AF_LOCAL */ - char sun_path[104]; /* path name (gag) */ + uint8_t sun_len; /* total sockaddr length */ + sa_family_t sun_family; /* AF_LOCAL */ + char sun_path[SUNPATHLEN]; /* path name (gag) */ }; /* diff --git a/lib/libc/include/generic-netbsd/sys/unistd.h b/lib/libc/include/generic-netbsd/sys/unistd.h @@ -1,4 +1,4 @@ -/* $NetBSD: unistd.h,v 1.63 2020/05/16 18:31:53 christos Exp $ */ +/* $NetBSD: unistd.h,v 1.65 2023/10/25 08:22:25 simonb Exp $ */ /* * Copyright (c) 1989, 1993 @@ -227,120 +227,121 @@ * XXX The value of _SC_CLK_TCK is embedded in <time.h>. * XXX The value of _SC_PAGESIZE is embedded in <sys/shm.h>. */ -#define _SC_ARG_MAX 1 -#define _SC_CHILD_MAX 2 -#define _O_SC_CLK_TCK 3 /* Old version, always 100 */ -#define _SC_NGROUPS_MAX 4 -#define _SC_OPEN_MAX 5 -#define _SC_JOB_CONTROL 6 -#define _SC_SAVED_IDS 7 -#define _SC_VERSION 8 -#define _SC_BC_BASE_MAX 9 -#define _SC_BC_DIM_MAX 10 -#define _SC_BC_SCALE_MAX 11 -#define _SC_BC_STRING_MAX 12 -#define _SC_COLL_WEIGHTS_MAX 13 -#define _SC_EXPR_NEST_MAX 14 -#define _SC_LINE_MAX 15 -#define _SC_RE_DUP_MAX 16 -#define _SC_2_VERSION 17 -#define _SC_2_C_BIND 18 -#define _SC_2_C_DEV 19 -#define _SC_2_CHAR_TERM 20 -#define _SC_2_FORT_DEV 21 -#define _SC_2_FORT_RUN 22 -#define _SC_2_LOCALEDEF 23 -#define _SC_2_SW_DEV 24 -#define _SC_2_UPE 25 -#define _SC_STREAM_MAX 26 -#define _SC_TZNAME_MAX 27 -#define _SC_PAGESIZE 28 -#define _SC_PAGE_SIZE _SC_PAGESIZE /* 1170 compatibility */ -#define _SC_FSYNC 29 -#define _SC_XOPEN_SHM 30 -#define _SC_SYNCHRONIZED_IO 31 -#define _SC_IOV_MAX 32 -#define _SC_MAPPED_FILES 33 -#define _SC_MEMLOCK 34 -#define _SC_MEMLOCK_RANGE 35 -#define _SC_MEMORY_PROTECTION 36 -#define _SC_LOGIN_NAME_MAX 37 -#define _SC_MONOTONIC_CLOCK 38 -#define _SC_CLK_TCK 39 /* New, variable version */ -#define _SC_ATEXIT_MAX 40 -#define _SC_THREADS 41 -#define _SC_SEMAPHORES 42 -#define _SC_BARRIERS 43 -#define _SC_TIMERS 44 -#define _SC_SPIN_LOCKS 45 -#define _SC_READER_WRITER_LOCKS 46 -#define _SC_GETGR_R_SIZE_MAX 47 -#define _SC_GETPW_R_SIZE_MAX 48 -#define _SC_CLOCK_SELECTION 49 -#define _SC_ASYNCHRONOUS_IO 50 -#define _SC_AIO_LISTIO_MAX 51 -#define _SC_AIO_MAX 52 -#define _SC_MESSAGE_PASSING 53 -#define _SC_MQ_OPEN_MAX 54 -#define _SC_MQ_PRIO_MAX 55 -#define _SC_PRIORITY_SCHEDULING 56 -#define _SC_THREAD_DESTRUCTOR_ITERATIONS 57 -#define _SC_THREAD_KEYS_MAX 58 -#define _SC_THREAD_STACK_MIN 59 -#define _SC_THREAD_THREADS_MAX 60 -#define _SC_THREAD_ATTR_STACKADDR 61 -#define _SC_THREAD_ATTR_STACKSIZE 62 -#define _SC_THREAD_PRIORITY_SCHEDULING 63 -#define _SC_THREAD_PRIO_INHERIT 64 -#define _SC_THREAD_PRIO_PROTECT 65 -#define _SC_THREAD_PROCESS_SHARED 66 -#define _SC_THREAD_SAFE_FUNCTIONS 67 -#define _SC_TTY_NAME_MAX 68 -#define _SC_HOST_NAME_MAX 69 -#define _SC_PASS_MAX 70 -#define _SC_REGEXP 71 -#define _SC_SHELL 72 -#define _SC_SYMLOOP_MAX 73 +#define _SC_ARG_MAX 1 +#define _SC_CHILD_MAX 2 +#define _O_SC_CLK_TCK 3 /* Old version, always 100 */ +#define _SC_NGROUPS_MAX 4 +#define _SC_OPEN_MAX 5 +#define _SC_JOB_CONTROL 6 +#define _SC_SAVED_IDS 7 +#define _SC_VERSION 8 +#define _SC_BC_BASE_MAX 9 +#define _SC_BC_DIM_MAX 10 +#define _SC_BC_SCALE_MAX 11 +#define _SC_BC_STRING_MAX 12 +#define _SC_COLL_WEIGHTS_MAX 13 +#define _SC_EXPR_NEST_MAX 14 +#define _SC_LINE_MAX 15 +#define _SC_RE_DUP_MAX 16 +#define _SC_2_VERSION 17 +#define _SC_2_C_BIND 18 +#define _SC_2_C_DEV 19 +#define _SC_2_CHAR_TERM 20 +#define _SC_2_FORT_DEV 21 +#define _SC_2_FORT_RUN 22 +#define _SC_2_LOCALEDEF 23 +#define _SC_2_SW_DEV 24 +#define _SC_2_UPE 25 +#define _SC_STREAM_MAX 26 +#define _SC_TZNAME_MAX 27 +#define _SC_PAGESIZE 28 +#define _SC_PAGE_SIZE _SC_PAGESIZE /* 1170 compatibility */ +#define _SC_FSYNC 29 +#define _SC_XOPEN_SHM 30 +#define _SC_SYNCHRONIZED_IO 31 +#define _SC_IOV_MAX 32 +#define _SC_MAPPED_FILES 33 +#define _SC_MEMLOCK 34 +#define _SC_MEMLOCK_RANGE 35 +#define _SC_MEMORY_PROTECTION 36 +#define _SC_LOGIN_NAME_MAX 37 +#define _SC_MONOTONIC_CLOCK 38 +#define _SC_CLK_TCK 39 /* New, variable version */ +#define _SC_ATEXIT_MAX 40 +#define _SC_THREADS 41 +#define _SC_SEMAPHORES 42 +#define _SC_BARRIERS 43 +#define _SC_TIMERS 44 +#define _SC_SPIN_LOCKS 45 +#define _SC_READER_WRITER_LOCKS 46 +#define _SC_GETGR_R_SIZE_MAX 47 +#define _SC_GETPW_R_SIZE_MAX 48 +#define _SC_CLOCK_SELECTION 49 +#define _SC_ASYNCHRONOUS_IO 50 +#define _SC_AIO_LISTIO_MAX 51 +#define _SC_AIO_MAX 52 +#define _SC_MESSAGE_PASSING 53 +#define _SC_MQ_OPEN_MAX 54 +#define _SC_MQ_PRIO_MAX 55 +#define _SC_PRIORITY_SCHEDULING 56 +#define _SC_THREAD_DESTRUCTOR_ITERATIONS 57 +#define _SC_THREAD_KEYS_MAX 58 +#define _SC_THREAD_STACK_MIN 59 +#define _SC_THREAD_THREADS_MAX 60 +#define _SC_THREAD_ATTR_STACKADDR 61 +#define _SC_THREAD_ATTR_STACKSIZE 62 +#define _SC_THREAD_PRIORITY_SCHEDULING 63 +#define _SC_THREAD_PRIO_INHERIT 64 +#define _SC_THREAD_PRIO_PROTECT 65 +#define _SC_THREAD_PROCESS_SHARED 66 +#define _SC_THREAD_SAFE_FUNCTIONS 67 +#define _SC_TTY_NAME_MAX 68 +#define _SC_HOST_NAME_MAX 69 +#define _SC_PASS_MAX 70 +#define _SC_REGEXP 71 +#define _SC_SHELL 72 +#define _SC_SYMLOOP_MAX 73 /* Actually, they are not supported or implemented yet */ -#define _SC_V6_ILP32_OFF32 74 -#define _SC_V6_ILP32_OFFBIG 75 -#define _SC_V6_LP64_OFF64 76 -#define _SC_V6_LPBIG_OFFBIG 77 -#define _SC_2_PBS 80 -#define _SC_2_PBS_ACCOUNTING 81 -#define _SC_2_PBS_CHECKPOINT 82 -#define _SC_2_PBS_LOCATE 83 -#define _SC_2_PBS_MESSAGE 84 -#define _SC_2_PBS_TRACK 85 +#define _SC_V6_ILP32_OFF32 74 +#define _SC_V6_ILP32_OFFBIG 75 +#define _SC_V6_LP64_OFF64 76 +#define _SC_V6_LPBIG_OFFBIG 77 +#define _SC_2_PBS 80 +#define _SC_2_PBS_ACCOUNTING 81 +#define _SC_2_PBS_CHECKPOINT 82 +#define _SC_2_PBS_LOCATE 83 +#define _SC_2_PBS_MESSAGE 84 +#define _SC_2_PBS_TRACK 85 /* These are implemented */ -#define _SC_SPAWN 86 -#define _SC_SHARED_MEMORY_OBJECTS 87 +#define _SC_SPAWN 86 +#define _SC_SHARED_MEMORY_OBJECTS 87 -#define _SC_TIMER_MAX 88 -#define _SC_SEM_NSEMS_MAX 89 -#define _SC_CPUTIME 90 -#define _SC_THREAD_CPUTIME 91 -#define _SC_DELAYTIMER_MAX 92 -#define _SC_SIGQUEUE_MAX 93 -#define _SC_REALTIME_SIGNALS 94 -#define _SC_RTSIG_MAX 95 +#define _SC_TIMER_MAX 88 +#define _SC_SEM_NSEMS_MAX 89 +#define _SC_CPUTIME 90 +#define _SC_THREAD_CPUTIME 91 +#define _SC_DELAYTIMER_MAX 92 +#define _SC_SIGQUEUE_MAX 93 +#define _SC_REALTIME_SIGNALS 94 +#define _SC_RTSIG_MAX 95 /* Extensions found in Solaris and Linux. */ -#define _SC_PHYS_PAGES 121 +#define _SC_PHYS_PAGES 121 +#define _SC_AVPHYS_PAGES 122 #ifdef _NETBSD_SOURCE /* Commonly provided sysconf() extensions */ -#define _SC_NPROCESSORS_CONF 1001 -#define _SC_NPROCESSORS_ONLN 1002 +#define _SC_NPROCESSORS_CONF 1001 +#define _SC_NPROCESSORS_ONLN 1002 /* Native variables */ -#define _SC_SCHED_RT_TS 2001 -#define _SC_SCHED_PRI_MIN 2002 -#define _SC_SCHED_PRI_MAX 2003 +#define _SC_SCHED_RT_TS 2001 +#define _SC_SCHED_PRI_MIN 2002 +#define _SC_SCHED_PRI_MAX 2003 #endif /* _NETBSD_SOURCE */ /* configurable system strings */ -#define _CS_PATH 1 +#define _CS_PATH 1 #endif /* !_SYS_UNISTD_H_ */ \ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/sys/unpcb.h b/lib/libc/include/generic-netbsd/sys/unpcb.h @@ -1,4 +1,4 @@ -/* $NetBSD: unpcb.h,v 1.18 2016/04/06 19:45:46 roy Exp $ */ +/* $NetBSD: unpcb.h,v 1.19 2024/09/08 09:36:52 rillig Exp $ */ /* * Copyright (c) 1982, 1986, 1989, 1993 @@ -41,7 +41,7 @@ * Protocol control block for an active * instance of a UNIX internal protocol. * - * A socket may be associated with an vnode in the + * A socket may be associated with a vnode in the * file system. If so, the unp_vnode pointer holds * a reference count to this vnode, which should be irele'd * when the socket goes away. diff --git a/lib/libc/include/generic-netbsd/sys/vmmeter.h b/lib/libc/include/generic-netbsd/sys/vmmeter.h @@ -1,4 +1,4 @@ -/* $NetBSD: vmmeter.h,v 1.19 2009/10/21 21:12:07 rmind Exp $ */ +/* $NetBSD: vmmeter.h,v 1.20 2023/09/23 14:19:12 ad Exp $ */ /*- * Copyright (c) 1982, 1986, 1993 @@ -53,42 +53,4 @@ struct vmtotal int32_t t_free; /* free memory pages */ }; -/* - * Optional instrumentation. - */ -#ifdef PGINPROF - -#define NDMON 128 -#define NSMON 128 - -#define DRES 20 -#define SRES 5 - -#define PMONMIN 20 -#define PRES 50 -#define NPMON 64 - -#define RMONMIN 130 -#define RRES 5 -#define NRMON 64 - -/* data and stack size distribution counters */ -u_int dmon[NDMON+1]; -u_int smon[NSMON+1]; - -/* page in time distribution counters */ -u_int pmon[NPMON+2]; - -/* reclaim time distribution counters */ -u_int rmon[NRMON+2]; - -int pmonmin; -int pres; -int rmonmin; -int rres; - -u_int rectime; /* accumulator for reclaim times */ -u_int pgintime; /* accumulator for page in times */ -#endif /* PGINPROF */ - #endif /* !_SYS_VMMETER_H_ */ \ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/sys/vnode_if.h b/lib/libc/include/generic-netbsd/sys/vnode_if.h @@ -1,11 +1,11 @@ -/* $NetBSD: vnode_if.h,v 1.111.4.1 2023/06/21 16:52:28 martin Exp $ */ +/* $NetBSD: vnode_if.h,v 1.112 2023/06/15 09:15:13 hannken Exp $ */ /* * Warning: DO NOT EDIT! This file is automatically generated! * (Modifications made here may easily be lost!) * * Created from the file: - * NetBSD: vnode_if.src,v 1.84.4.1 2023/06/21 16:50:21 martin Exp + * NetBSD: vnode_if.src,v 1.85 2023/06/15 09:13:36 hannken Exp * by the script: * NetBSD: vnode_if.sh,v 1.77 2022/10/26 23:39:43 riastradh Exp */ diff --git a/lib/libc/include/generic-netbsd/sys/vnode_impl.h b/lib/libc/include/generic-netbsd/sys/vnode_impl.h @@ -1,4 +1,4 @@ -/* $NetBSD: vnode_impl.h,v 1.24 2022/07/18 04:30:30 thorpej Exp $ */ +/* $NetBSD: vnode_impl.h,v 1.27 2023/08/01 16:33:43 dholland Exp $ */ /*- * Copyright (c) 2016, 2019, 2020 The NetBSD Foundation, Inc. @@ -30,6 +30,7 @@ #define _SYS_VNODE_IMPL_H_ #if defined(_KERNEL) || defined(_KMEMUSER) +#include <sys/sdt.h> #include <sys/vnode.h> struct namecache; @@ -65,7 +66,7 @@ struct vcache_key { * l vi_nc_listlock * m mnt_vnodelock * n vi_nc_lock - * n,l vi_nc_lock + vi_nc_listlock to modify + * n,l both vi_nc_lock + vi_nc_listlock to modify, either to read * s syncer_data_lock */ struct vnode_impl { @@ -127,7 +128,7 @@ typedef struct vnode_impl vnode_impl_t; */ void _vstate_assert(vnode_t *, enum vnode_state, const char *, int, bool); -#if defined(DIAGNOSTIC) +#if defined(DIAGNOSTIC) #define VSTATE_ASSERT(vp, state) \ _vstate_assert((vp), (state), __func__, __LINE__, true) @@ -155,5 +156,7 @@ int vcache_vget(vnode_t *); int vcache_tryvget(vnode_t *); int vfs_drainvnodes(void); +SDT_PROVIDER_DECLARE(vfs); + #endif /* defined(_KERNEL) || defined(_KMEMUSER) */ #endif /* !_SYS_VNODE_IMPL_H_ */ \ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/sys/wapbl_replay.h b/lib/libc/include/generic-netbsd/sys/wapbl_replay.h @@ -1,4 +1,4 @@ -/* $NetBSD: wapbl_replay.h,v 1.1 2008/11/24 16:05:21 joerg Exp $ */ +/* $NetBSD: wapbl_replay.h,v 1.2 2024/05/13 00:01:53 msaitoh Exp $ */ /*- * Copyright (c) 2003,2008 The NetBSD Foundation, Inc. @@ -93,7 +93,7 @@ struct wapbl_wc_header { uint32_t wc_fs_dev_bshift; int64_t wc_head; int64_t wc_tail; - int64_t wc_circ_off; /* offset of of circ buffer region */ + int64_t wc_circ_off; /* offset of circ buffer region */ int64_t wc_circ_size; /* size of circular buffer region */ uint8_t wc_spare[0]; /* actually longer */ }; diff --git a/lib/libc/include/generic-netbsd/sys/wchan.h b/lib/libc/include/generic-netbsd/sys/wchan.h @@ -0,0 +1,37 @@ +/* $NetBSD: wchan.h,v 1.1 2023/10/15 10:27:11 riastradh Exp $ */ + +/*- + * Copyright (c) 2007, 2008, 2020, 2023 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Andrew Doran. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _SYS_WCHAN_H_ +#define _SYS_WCHAN_H_ + +typedef volatile const void *wchan_t; + +#endif /* _SYS_WCHAN_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/syslog.h b/lib/libc/include/generic-netbsd/syslog.h @@ -1,4 +1,4 @@ -/* $NetBSD: syslog.h,v 1.41.44.1 2024/10/08 11:16:17 martin Exp $ */ +/* $NetBSD: syslog.h,v 1.44 2024/08/21 16:30:27 gutteridge Exp $ */ /* * Copyright (c) 1982, 1986, 1988, 1993 @@ -62,12 +62,11 @@ #define LOG_PRIMASK 0x07 /* mask to extract priority part (internal) */ /* extract priority */ #define LOG_PRI(p) ((p) & LOG_PRIMASK) -#define LOG_MAKEPRI(fac, pri) (((fac) << 3) | (pri)) #ifdef SYSLOG_NAMES #define INTERNAL_NOPRI 0x10 /* the "no priority" priority */ /* mark "facility" */ -#define INTERNAL_MARK LOG_MAKEPRI(LOG_NFACILITIES, 0) +#define INTERNAL_MARK (LOG_NFACILITIES<<3) typedef struct _code { const char *c_name; int c_val; @@ -222,11 +221,11 @@ void vsyslogp_r(int, struct syslog_data *, const char *, const char *, const char *, __va_list) __RENAME(__vsyslogp_r60) __sysloglike(5, 0); void syslog_ss(int, struct syslog_data *, const char *, ...) __RENAME(__syslog_ss60) __sysloglike(3, 4); -void vsyslog_ss(int, struct syslog_data *, const char *, va_list) - __RENAME(__vsyslog_ss60) __sysloglike(3, 0); -void syslogp_ss(int, struct syslog_data *, const char *, const char *, +void vsyslog_ss(int, struct syslog_data *, const char *, va_list) + __RENAME(__vsyslog_ss60) __sysloglike(3, 0); +void syslogp_ss(int, struct syslog_data *, const char *, const char *, const char *, ...) __RENAME(__syslogp_ss60) __sysloglike(5, 0); -void vsyslogp_ss(int, struct syslog_data *, const char *, const char *, +void vsyslogp_ss(int, struct syslog_data *, const char *, const char *, const char *, va_list) __RENAME(__vsyslogp_ss60) __sysloglike(5, 0); #endif void syslogp(int, const char *, const char *, const char *, ...) diff --git a/lib/libc/include/generic-netbsd/time.h b/lib/libc/include/generic-netbsd/time.h @@ -1,4 +1,4 @@ -/* $NetBSD: time.h,v 1.48 2022/10/23 15:43:40 jschauma Exp $ */ +/* $NetBSD: time.h,v 1.56.2.1 2026/05/07 15:43:06 martin Exp $ */ /* * Copyright (c) 1989, 1993 @@ -81,11 +81,22 @@ struct tm { int tm_year; /* years since 1900 */ int tm_wday; /* days since Sunday [0-6] */ int tm_yday; /* days since January 1 [0-365] */ - int tm_isdst; /* Daylight Savings Time flag */ + int tm_isdst; /* Daylight Saving Time flag */ long tm_gmtoff; /* offset from UTC in seconds */ __aconst char *tm_zone; /* timezone abbreviation */ }; +/* + * This represents the minimum value for how long a timezone abbreviation + * name is allowed to be, it is also (if >= 254) the default for the max length + * we currently allow (that can be changed by compiling libc(localtime.c) + * with -DTZNAME_MAXIMUM=N specifying a value at least this long, no less). + * + * This one should probably be made less, and localtime then use a longer value + * (it will use 254 at least), so this would never need to change in the future. + */ +#define _TZNAME_MAXIMUM 254 + __BEGIN_DECLS char *asctime(const struct tm *); clock_t clock(void); @@ -137,7 +148,7 @@ struct tm *getdate(const char *); extern int getdate_err; #endif -/* ISO/IEC 9899:201x 7.27.1/3 Components of time */ +/* ISO/IEC 9899:2011 7.27.1/3 Components of time */ #include <sys/timespec.h> #if (_POSIX_C_SOURCE - 0) >= 199309L || (_XOPEN_SOURCE - 0) >= 500 || \ @@ -171,11 +182,17 @@ int timer_delete(timer_t); int timer_getoverrun(timer_t); #endif /* _POSIX_C_SOURCE >= 199309 || _XOPEN_SOURCE >= 500 || ... */ -#if (_POSIX_C_SOURCE - 0) >= 199506L || (_XOPEN_SOURCE - 0) >= 500 || \ - defined(_REENTRANT) || defined(_NETBSD_SOURCE) +#if ((_POSIX_C_SOURCE - 0) >= 199506L && (_POSIX_C_SOURCE - 0) < 202405L) || \ + (_XOPEN_SOURCE - 0) >= 500 || defined(_REENTRANT) || defined(_NETBSD_SOURCE) char *asctime_r(const struct tm * __restrict, char * __restrict); #ifndef __LIBC12_SOURCE__ char *ctime_r(const time_t *, char *) __RENAME(__ctime_r50); +#endif +#endif + +#if (_POSIX_C_SOURCE - 0) >= 199506L || \ + (_XOPEN_SOURCE - 0) >= 500 || defined(_REENTRANT) || defined(_NETBSD_SOURCE) +#ifndef __LIBC12_SOURCE__ struct tm *gmtime_r(const time_t * __restrict, struct tm * __restrict) __RENAME(__gmtime_r50); struct tm *localtime_r(const time_t * __restrict, struct tm * __restrict) @@ -193,14 +210,19 @@ size_t strftime_l(char * __restrict, size_t, const char * __restrict, __attribute__((__format__(__strftime__, 3, 0))); #endif -#if defined(_NETBSD_SOURCE) +#if (__STDC_VERSION__ - 0 >= 202311L) || defined(_ISOC23_SOURCE) || \ + defined(_NETBSD_SOURCE) +#ifndef __LIBC12_SOURCE__ +time_t timegm(struct tm *) __RENAME(__timegm50); +#endif +#endif +#if defined(_NETBSD_SOURCE) typedef struct __state *timezone_t; #ifndef __LIBC12_SOURCE__ time_t time2posix(time_t) __RENAME(__time2posix50); time_t posix2time(time_t) __RENAME(__posix2time50); -time_t timegm(struct tm *) __RENAME(__timegm50); time_t timeoff(struct tm *, long) __RENAME(__timeoff50); time_t timelocal(struct tm *) __RENAME(__timelocal50); struct tm *offtime(const time_t *, long) __RENAME(__offtime50); @@ -234,9 +256,23 @@ char *strptime_l(const char * __restrict, const char * __restrict, #endif /* _NETBSD_SOURCE */ -/* ISO/IEC 9899:201x 7.27.2.5 The timespec_get function */ +/* ISO/IEC 9899:2011 7.27.2.5 The timespec_get function */ +#if defined(_ISOC11_SOURCE) || (__STDC_VERSION__ - 0) >= 201101L || \ + defined(_NETBSD_SOURCE) || (__cplusplus - 0) >= 201103L || \ + (_POSIX_C_SOURCE - 0) >= 202405L + #define TIME_UTC 1 /* time elapsed since epoch */ +#if (__STDC_VERSION__ - 0 >= 202311L) || defined(_ISOC23_SOURCE) || \ + defined(_NETBSD_SOURCE) +#define TIME_MONOTONIC 2 +#endif + int timespec_get(struct timespec *ts, int base); +#if (__STDC_VERSION__ - 0 >= 202311L) || defined(_ISOC23_SOURCE) || \ + defined(_NETBSD_SOURCE) +int timespec_getres(struct timespec *ts, int base); +#endif +#endif __END_DECLS diff --git a/lib/libc/include/generic-netbsd/tzfile.h b/lib/libc/include/generic-netbsd/tzfile.h @@ -1,4 +1,4 @@ -/* $NetBSD: tzfile.h,v 1.11 2022/08/16 09:03:04 christos Exp $ */ +/* $NetBSD: tzfile.h,v 1.14 2025/01/31 18:23:52 christos Exp $ */ #ifndef _TZFILE_H_ #define _TZFILE_H_ @@ -33,7 +33,7 @@ #endif /* !defined TZDEFRULES */ -/* See Internet RFC 8536 for more details about the following format. */ +/* See Internet RFC 9636 for more details about the following format. */ /* ** Each file begins with. . . @@ -85,11 +85,11 @@ struct tzhead { ** time uses 8 rather than 4 chars, ** then a POSIX-TZ-environment-variable-style string for use in handling ** instants after the last transition time stored in the file -** (with nothing between the newlines if there is no POSIX representation for -** such instants). +** (with nothing between the newlines if there is no POSIX.1-2017 +** representation for such instants). ** ** If tz_version is '3' or greater, the above is extended as follows. -** First, the POSIX TZ string's hour offset may range from -167 +** First, the TZ string's hour offset may range from -167 ** through 167 as compared to the POSIX-required 0 through 24. ** Second, its DST start time may be January 1 at 00:00 and its stop ** time December 31 at 24:00 plus the difference between DST and @@ -102,20 +102,24 @@ struct tzhead { */ #ifndef TZ_MAX_TIMES +/* This must be at least 242 for Europe/London with 'zic -b fat'. */ # define TZ_MAX_TIMES 2000 #endif /* !defined TZ_MAX_TIMES */ #ifndef TZ_MAX_TYPES -/* This must be at least 17 for Europe/Samara and Europe/Vilnius. */ +/* This must be at least 18 for Europe/Vilnius with 'zic -b fat'. */ # define TZ_MAX_TYPES 256 /* Limited by what (unsigned char)'s can hold */ #endif /* !defined TZ_MAX_TYPES */ #ifndef TZ_MAX_CHARS +/* This must be at least 40 for America/Anchorage. */ # define TZ_MAX_CHARS 50 /* Maximum number of abbreviation characters */ /* (limited by what unsigned chars can hold) */ #endif /* !defined TZ_MAX_CHARS */ #ifndef TZ_MAX_LEAPS +/* This must be at least 27 for leap seconds from 1972 through mid-2023. + There's a plan to discontinue leap seconds by 2035. */ # define TZ_MAX_LEAPS 50 /* Maximum number of leap second corrections */ #endif /* !defined TZ_MAX_LEAPS */ @@ -128,6 +132,7 @@ struct tzhead { #define SECSPERHOUR (SECSPERMIN * MINSPERHOUR) #define SECSPERDAY ((int_fast32_t) SECSPERHOUR * HOURSPERDAY) #define MONSPERYEAR 12 +#define YEARSPERREPEAT 400 #define TM_SUNDAY 0 #define TM_MONDAY 1 diff --git a/lib/libc/include/generic-netbsd/uchar.h b/lib/libc/include/generic-netbsd/uchar.h @@ -1,4 +1,4 @@ -/* $NetBSD: uchar.h,v 1.6.2.2 2024/10/14 17:20:21 martin Exp $ */ +/* $NetBSD: uchar.h,v 1.6 2024/10/13 22:00:38 riastradh Exp $ */ /*- * Copyright (c) 2024 The NetBSD Foundation, Inc. diff --git a/lib/libc/include/generic-netbsd/ucontext.h b/lib/libc/include/generic-netbsd/ucontext.h @@ -1,4 +1,4 @@ -/* $NetBSD: ucontext.h,v 1.11 2018/02/04 01:13:45 mrg Exp $ */ +/* $NetBSD: ucontext.h,v 1.12 2025/03/13 06:36:20 rillig Exp $ */ /*- * Copyright (c) 1999 The NetBSD Foundation, Inc. @@ -42,6 +42,7 @@ int setcontext(const ucontext_t *); #pragma GCC diagnostic push #ifndef __cplusplus #pragma GCC diagnostic ignored "-Wstrict-prototypes" +/* LINTED 287 "function declaration is not a prototype" */ #endif void makecontext(ucontext_t *, void (*)(), int, ...); #pragma GCC diagnostic pop diff --git a/lib/libc/include/generic-netbsd/ufs/ext2fs/ext2fs.h b/lib/libc/include/generic-netbsd/ufs/ext2fs/ext2fs.h @@ -1,4 +1,4 @@ -/* $NetBSD: ext2fs.h,v 1.48 2016/08/20 19:47:44 jdolecek Exp $ */ +/* $NetBSD: ext2fs.h,v 1.53 2025/05/04 20:26:56 rillig Exp $ */ /* * Copyright (c) 1982, 1986, 1993 @@ -177,7 +177,7 @@ struct ext2fs { uint8_t e2fs_prealloc; /* # of blocks to preallocate */ uint8_t e2fs_dir_prealloc; /* # of blocks to preallocate for dir */ uint16_t e2fs_reserved_ngdb; /* # of reserved gd blocks for resize */ - + /* Additional fields */ char e3fs_journal_uuid[16];/* uuid of journal superblock */ uint32_t e3fs_journal_inum; /* inode number of journal file */ @@ -252,6 +252,7 @@ struct m_ext2fs { int32_t e2fs_ngdb; /* number of group descriptor blocks */ int32_t e2fs_ipb; /* number of inodes per block */ int32_t e2fs_itpg; /* number of inode table blocks per group */ + uint8_t e2fs_group_desc_shift; /* binary log group desc size */ struct ext2_gd *e2fs_gd; /* group descriptors (data not byteswapped) */ }; @@ -301,11 +302,11 @@ struct m_ext2fs { "\20" \ "\16ROCOMPAT_PROJECT" \ "\15ROCOMPAT_READONLY" \ - "\14" \ + "\14?" \ "\13ROCOMPAT_METADATA_CKSUM" \ "\12ROCOMPAT_BIGALLOC" \ "\11ROCOMPAT_QUOTA" \ - "\10" \ + "\10?" \ "\07ROCOMPAT_EXTRA_ISIZE" \ "\06ROCOMPAT_DIR_NLINK" \ "\05ROCOMPAT_GDT_CSUM" \ @@ -336,7 +337,7 @@ struct m_ext2fs { "\017INCOMPAT_LARGEDIR" \ "\016INCOMPAT_CSUM_SEED" \ "\015INCOMPAT_DIRDATA" \ - "\014" \ + "\014?" \ "\013INCOMPAT_EA_INODE" \ "\012INCOMPAT_FLEX_BG" \ "\011INCOMPAT_MMP" \ @@ -355,7 +356,7 @@ struct m_ext2fs { * - EXT2F_ROCOMPAT_SPARSESUPER * superblock backups stored only in cg_has_sb(bno) groups * - EXT2F_ROCOMPAT_LARGEFILE - * use e2di_size_high in struct ext2fs_dinode to store + * use e2di_size_high in struct ext2fs_dinode to store * upper 32bit of size for >2GB files * - EXT2F_INCOMPAT_FTYPE * store file type to e2d_type in struct ext2fs_direct @@ -370,7 +371,8 @@ struct m_ext2fs { | EXT2F_ROCOMPAT_GDT_CSUM) #define EXT2F_INCOMPAT_SUPP (EXT2F_INCOMPAT_FTYPE \ | EXT2F_INCOMPAT_EXTENTS \ - | EXT2F_INCOMPAT_FLEX_BG) + | EXT2F_INCOMPAT_FLEX_BG \ + | EXT2F_INCOMPAT_64BIT) /* * Feature set definitions @@ -422,7 +424,7 @@ struct ext2_gd { uint16_t ext2bgd_ndirs; /* number of directories */ /* - * Following only valid when either GDT_CSUM (AKA uninit_bg) + * Following only valid when either GDT_CSUM (AKA uninit_bg) * or METADATA_CKSUM feature is on */ uint16_t ext2bgd_flags; /* ext4 bg flags (INODE_UNINIT, ...)*/ @@ -432,19 +434,24 @@ struct ext2_gd { uint16_t ext2bgd_itable_unused_lo; /* Low unused inode offset */ uint16_t ext2bgd_checksum; /* Group desc checksum */ - /* - * XXX disk32 Further fields only exist if 64BIT feature is on - * and superblock desc_size > 32, not supported for now. - */ + uint32_t ext2bgd_b_bitmap_hi; /* blocks bitmap block (high bits) */ + uint32_t ext2bgd_i_bitmap_hi; /* inodes bitmap block (high bits) */ + uint32_t ext2bgd_i_tables_hi; /* inodes table block (high bits) */ + uint16_t ext2bgd_nbfree_hi; /* number of free blocks (high bits) */ + uint16_t ext2bgd_nifree_hi; /* number of free inodes (high bits) */ + uint16_t ext2bgd_ndirs_hi; /* number of directories (high bits) */ + uint16_t reserved_hi; + uint32_t reserved2_hi[3]; }; +#define E2FS_REV0_GD_SIZE (sizeof(struct ext2_gd) / 2) /* 32 */ #define E2FS_BG_INODE_UNINIT 0x0001 /* Inode bitmap not used/initialized */ #define E2FS_BG_BLOCK_UNINIT 0x0002 /* Block bitmap not used/initialized */ #define E2FS_BG_INODE_ZEROED 0x0004 /* On-disk inode table initialized */ #define E2FS_HAS_GD_CSUM(fs) \ EXT2F_HAS_ROCOMPAT_FEATURE(fs, EXT2F_ROCOMPAT_GDT_CSUM|EXT2F_ROCOMPAT_METADATA_CKSUM) != 0 - + /* * If the EXT2F_ROCOMPAT_SPARSESUPER flag is set, the cylinder group has a * copy of the super and cylinder group descriptors blocks only if it's @@ -492,15 +499,21 @@ void e2fs_sb_bswap(struct ext2fs *, struct ext2fs *); # define e2fs_sbsave(old, new) e2fs_sb_bswap((old), (new)) #endif +#ifndef _KERNEL /* XXX */ /* Group descriptors are not byte swapped */ #define e2fs_cgload(old, new, size) memcpy((new), (old), (size)) #define e2fs_cgsave(old, new, size) memcpy((new), (old), (size)) +#endif /* * Turn file system block numbers into disk block addresses. * This maps file system blocks to device size blocks. */ #define EXT2_FSBTODB(fs, b) ((b) << (fs)->e2fs_fsbtodb) +#define EXT2_FSBTODB64(fs, b, b_hi) \ + (((((uint64_t)(b_hi)) << 32) | (b)) << (fs)->e2fs_fsbtodb) +#define EXT2_FSBTODB64OFF(fs, b, b_hi, off) \ + ((((((uint64_t)(b_hi)) << 32) | (b)) + (off)) << (fs)->e2fs_fsbtodb) #define EXT2_DBTOFSB(fs, b) ((b) >> (fs)->e2fs_fsbtodb) /* @@ -510,9 +523,11 @@ void e2fs_sb_bswap(struct ext2fs *, struct ext2fs *); * inode number to file system block address. */ #define ino_to_cg(fs, x) (((x) - 1) / (fs)->e2fs.e2fs_ipg) -#define ino_to_fsba(fs, x) \ - (fs2h32((fs)->e2fs_gd[ino_to_cg((fs), (x))].ext2bgd_i_tables) + \ - (((x) - 1) % (fs)->e2fs.e2fs_ipg) / (fs)->e2fs_ipb) +#define _e2fs_gd(fs, x) (fs)->e2fs_gd[ino_to_cg((fs), (x))] +#define ino_to_fsba(fs, x) \ + (fs2h32(_e2fs_gd(fs, x).ext2bgd_i_tables) + \ + (((uint64_t)fs2h32(_e2fs_gd(fs, x).ext2bgd_i_tables_hi)) << 32) + \ + (((x) - 1) % (fs)->e2fs.e2fs_ipg) / (fs)->e2fs_ipb) #define ino_to_fsbo(fs, x) (((x) - 1) % (fs)->e2fs_ipb) /* diff --git a/lib/libc/include/generic-netbsd/ufs/ext2fs/ext2fs_dir.h b/lib/libc/include/generic-netbsd/ufs/ext2fs/ext2fs_dir.h @@ -1,4 +1,4 @@ -/* $NetBSD: ext2fs_dir.h,v 1.22.46.1 2024/08/23 17:10:10 martin Exp $ */ +/* $NetBSD: ext2fs_dir.h,v 1.23 2024/03/10 17:36:33 christos Exp $ */ /* * Copyright (c) 1982, 1986, 1989, 1993 diff --git a/lib/libc/include/generic-netbsd/ufs/ext2fs/ext2fs_extents.h b/lib/libc/include/generic-netbsd/ufs/ext2fs/ext2fs_extents.h @@ -1,9 +1,9 @@ -/* $NetBSD: ext2fs_extents.h,v 1.4 2016/08/09 13:18:50 kre Exp $ */ +/* $NetBSD: ext2fs_extents.h,v 1.5 2023/08/26 05:22:50 riastradh Exp $ */ /*- * Copyright (c) 2012, 2010 Zheng Liu <lz@freebsd.org> * All rights reserved. - * + * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: @@ -12,7 +12,7 @@ * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. - * + * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE @@ -24,9 +24,9 @@ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. - * + * * $FreeBSD: head/sys/fs/ext2fs/ext2_extents.h 295523 2016-02-11 15:27:14Z pfg $ - */ + */ #ifndef _UFS_EXT2FS_EXT2FS_EXTENTS_H_ #define _UFS_EXT2FS_EXT2FS_EXTENTS_H_ diff --git a/lib/libc/include/generic-netbsd/ufs/ext2fs/ext2fs_extern.h b/lib/libc/include/generic-netbsd/ufs/ext2fs/ext2fs_extern.h @@ -1,4 +1,4 @@ -/* $NetBSD: ext2fs_extern.h,v 1.56 2017/05/28 16:38:55 hannken Exp $ */ +/* $NetBSD: ext2fs_extern.h,v 1.57 2023/08/26 05:22:50 riastradh Exp $ */ /*- * Copyright (c) 1991, 1993, 1994 @@ -135,7 +135,7 @@ int ext2fs_dirrewrite(struct inode *, const struct ufs_lookup_results *, struct inode *, struct componentname *); int ext2fs_dirempty(struct inode *, ino_t, kauth_cred_t); int ext2fs_add_entry(struct vnode *, struct ext2fs_direct *, - const struct ufs_lookup_results *, size_t); + const struct ufs_lookup_results *, size_t); /* ext2fs_subr.c */ int ext2fs_blkatoff(struct vnode *, off_t, char **, struct buf **); @@ -181,8 +181,8 @@ int ext2fs_reclaim(void *); /* ext2fs_hash.c */ int ext2fs_htree_hash(const char *, int, uint32_t *, int, uint32_t *, uint32_t *); - -/* ext2fs_htree.c */ + +/* ext2fs_htree.c */ int ext2fs_htree_has_idx(struct inode *); int ext2fs_htree_lookup(struct inode *, const char *, int, struct buf **, int *, doff_t *, doff_t *, doff_t *, struct ext2fs_searchslot *); diff --git a/lib/libc/include/generic-netbsd/ufs/ffs/ffs_extern.h b/lib/libc/include/generic-netbsd/ufs/ffs/ffs_extern.h @@ -1,4 +1,4 @@ -/* $NetBSD: ffs_extern.h,v 1.87.2.1 2023/05/13 11:51:14 martin Exp $ */ +/* $NetBSD: ffs_extern.h,v 1.88 2023/01/07 19:41:30 chs Exp $ */ /*- * Copyright (c) 1991, 1993, 1994 diff --git a/lib/libc/include/generic-netbsd/ufs/ffs/fs.h b/lib/libc/include/generic-netbsd/ufs/ffs/fs.h @@ -1,4 +1,4 @@ -/* $NetBSD: fs.h,v 1.70.2.1 2023/05/13 11:51:14 martin Exp $ */ +/* $NetBSD: fs.h,v 1.73 2024/12/13 22:32:45 riastradh Exp $ */ /* * Copyright (c) 1982, 1986, 1993 @@ -150,7 +150,7 @@ /* * The volume name for this filesystem is maintained in fs_volname. * MAXVOLLEN defines the length of the buffer allocated. - * This space used to be part of of fs_fsmnt. + * This space used to be part of fs_fsmnt. */ #define MAXVOLLEN 32 @@ -251,7 +251,7 @@ struct csum_total { /* - * Super block for an FFS file system in memory. + * Super block for an FFS file system. */ struct fs { int32_t fs_firstfield; /* historic file system linked list, */ diff --git a/lib/libc/include/generic-netbsd/ufs/ufs/quota2.h b/lib/libc/include/generic-netbsd/ufs/ufs/quota2.h @@ -1,4 +1,4 @@ -/* $NetBSD: quota2.h,v 1.10 2017/10/25 18:06:01 jdolecek Exp $ */ +/* $NetBSD: quota2.h,v 1.11 2023/02/22 21:49:45 riastradh Exp $ */ /*- * Copyright (c) 2010 Manuel Bouyer * All rights reserved. @@ -115,7 +115,7 @@ void quota2_ufs_rwq2e(const struct quota2_entry *, struct quota2_entry *, int); #define QL_S_ALLOW_SOFT 0x01 /* over soft limit */ #define QL_S_DENY_GRACE 0x02 /* over soft limit, grace time expired */ #define QL_S_DENY_HARD 0x03 /* over hard limit */ - + #define QL_F_CROSS 0x80 /* crossing soft limit */ #define QL_STATUS(x) ((x) & 0x0f) diff --git a/lib/libc/include/generic-netbsd/unistd.h b/lib/libc/include/generic-netbsd/unistd.h @@ -1,4 +1,4 @@ -/* $NetBSD: unistd.h,v 1.163.2.1 2024/10/09 13:12:40 martin Exp $ */ +/* $NetBSD: unistd.h,v 1.169 2024/11/01 18:48:17 nia Exp $ */ /*- * Copyright (c) 1998, 1999, 2008 The NetBSD Foundation, Inc. @@ -173,6 +173,7 @@ ssize_t readlink(const char * __restrict, char * __restrict, size_t); */ #if (_POSIX_C_SOURCE - 0) >= 200112L || (_XOPEN_SOURCE - 0) >= 600 || \ defined(_NETBSD_SOURCE) +int gethostname(char *, size_t); int setegid(gid_t); int seteuid(uid_t); #endif @@ -266,7 +267,6 @@ int fchown(int, uid_t, gid_t); #endif int getdtablesize(void); long gethostid(void); -int gethostname(char *, size_t); __pure int getpagesize(void); /* legacy */ pid_t getpgid(pid_t); @@ -326,8 +326,11 @@ int fexecve(int, char * const *, char * const *); #if (_POSIX_C_SOURCE - 0) >= 202405L || (_XOPEN_SOURCE - 0 >= 800) || \ defined(_NETBSD_SOURCE) int getentropy(void *, size_t); +#ifndef __LIBC12_SOURCE__ +int dup3(int, int, int) __RENAME(__dup3100); +#endif +int pipe2(int *, int); #endif - /* * Implementation-defined extensions @@ -337,7 +340,6 @@ int acct(const char *); int closefrom(int); int des_cipher(const char *, char *, long, int); int des_setkey(const char *); -int dup3(int, int, int); void endusershell(void); int exect(const char *, char * const *, char * const *); int execvpe(const char *, char * const *, char * const *); @@ -371,7 +373,6 @@ int issetugid(void); long lpathconf(const char *, int); int mkstemps(char *, int); int nfssvc(int, void *); -int pipe2(int *, int); int profil(char *, size_t, unsigned long, unsigned int); #ifndef __PSIGNAL_DECLARED #define __PSIGNAL_DECLARED @@ -421,5 +422,10 @@ extern int optreset; /* getopt(3) external variable */ extern char *suboptarg; /* getsubopt(3) external variable */ #endif +#ifdef _LIBC_INTERNAL +pid_t __fork(void); +pid_t __locked_fork(int *) __weak; +#endif + __END_DECLS #endif /* !_UNISTD_H_ */ \ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/unwind.h b/lib/libc/include/generic-netbsd/unwind.h @@ -1,5 +1,5 @@ /* Exception handling and frame unwind runtime interface routines. - Copyright (C) 2001-2020 Free Software Foundation, Inc. + Copyright (C) 2001-2022 Free Software Foundation, Inc. This file is part of GCC. diff --git a/lib/libc/include/generic-netbsd/util.h b/lib/libc/include/generic-netbsd/util.h @@ -1,4 +1,4 @@ -/* $NetBSD: util.h,v 1.69 2016/04/10 19:05:50 roy Exp $ */ +/* $NetBSD: util.h,v 1.70.2.1 2025/12/20 13:51:19 martin Exp $ */ /*- * Copyright (c) 1995 @@ -36,6 +36,7 @@ #include <sys/types.h> #include <sys/ansi.h> #include <sys/inttypes.h> +#include <sys/featuretest.h> #ifdef _BSD_TIME_T_ typedef _BSD_TIME_T_ time_t; @@ -60,6 +61,15 @@ typedef __va_list va_list; #define PW_POLICY_BYPASSWD 1 #define PW_POLICY_BYGROUP 2 +/* Definitions for the strpct() functions rounding modes */ +#define STRPCT_RTN 0U /* Round to nearest */ +#define STRPCT_RAZ 2U /* Round away from zero */ +#define STRPCT_RTZ 3U /* Round towards zero */ +#define STRPCT_RTI 6U /* Round towards +Inf */ +#define STRPCT_RAI 7U /* Round away from +Inf (to -Inf) */ +/* Do not alter those 5 values, the implementation depends upon them */ +#define STRPCT_RQRY 8U /* Any value not one of the above */ + __BEGIN_DECLS struct disklabel; struct iovec; @@ -135,6 +145,10 @@ int sockaddr_snprintf(char *, size_t, const char *, const struct sockaddr *); char *strpct(char *, size_t, uintmax_t, uintmax_t, size_t); char *strspct(char *, size_t, intmax_t, intmax_t, size_t); +char *strpct_r(char *, size_t, uintmax_t, uintmax_t, size_t, + uint32_t); +char *strspct_r(char *,size_t, intmax_t, intmax_t, size_t, uint32_t); +uint32_t strpct_round(uint32_t); int string_to_flags(char **, unsigned long *, unsigned long *); int ttyaction(const char *, const char *, const char *); int ttylock(const char *, int, pid_t *); diff --git a/lib/libc/include/generic-netbsd/uvm/uvm.h b/lib/libc/include/generic-netbsd/uvm/uvm.h @@ -1,4 +1,4 @@ -/* $NetBSD: uvm.h,v 1.77 2020/05/17 15:11:57 ad Exp $ */ +/* $NetBSD: uvm.h,v 1.78 2023/07/17 12:55:37 riastradh Exp $ */ /* * Copyright (c) 1997 Charles D. Cranor and Washington University. @@ -63,7 +63,6 @@ #ifdef _KERNEL #include <uvm/uvm_physseg.h> -#include <sys/rndsource.h> /* * pull in VM_NFREELIST @@ -85,9 +84,6 @@ struct uvm_cpu { u_int pgflcolor; /* next color to allocate */ u_int pgflbucket; /* where to send our pages */ - /* entropy */ - krndsource_t rs; /* entropy source */ - /* uvmpdpol: queue of intended page status changes. */ struct vm_page **pdq; /* queue entries */ u_int pdqhead; /* current queue head */ diff --git a/lib/libc/include/generic-netbsd/uvm/uvm_extern.h b/lib/libc/include/generic-netbsd/uvm/uvm_extern.h @@ -1,4 +1,4 @@ -/* $NetBSD: uvm_extern.h,v 1.232 2021/05/31 10:57:02 riastradh Exp $ */ +/* $NetBSD: uvm_extern.h,v 1.234.2.1 2025/11/15 10:13:25 martin Exp $ */ /* * Copyright (c) 1997 Charles D. Cranor and Washington University. @@ -298,7 +298,7 @@ struct vmtotal; #define UVM_PCTPARAM_SHIFT 8 #define UVM_PCTPARAM_SCALE (1 << UVM_PCTPARAM_SHIFT) #define UVM_PCTPARAM_APPLY(pct, x) \ - (((x) * (pct)->pct_scaled) >> UVM_PCTPARAM_SHIFT) + (((uint64_t)(x) * (pct)->pct_scaled) >> UVM_PCTPARAM_SHIFT) struct uvm_pctparam { int pct_pct; /* percent [0, 100] */ /* should be the first member */ int pct_scaled; @@ -731,7 +731,6 @@ struct vmspace *uvmspace_alloc(vaddr_t, vaddr_t, bool); void uvmspace_init(struct vmspace *, struct pmap *, vaddr_t, vaddr_t, bool); void uvmspace_exec(struct lwp *, vaddr_t, vaddr_t, bool); -void uvmspace_spawn(struct lwp *, vaddr_t, vaddr_t, bool); struct vmspace *uvmspace_fork(struct vmspace *); void uvmspace_addref(struct vmspace *); void uvmspace_free(struct vmspace *); @@ -840,7 +839,7 @@ bool uvn_needs_writefault_p(struct uvm_object *); /* kern_malloc.c */ void kmeminit_nkmempages(void); -extern int nkmempages; +extern size_t nkmempages; #endif /* _KERNEL */ diff --git a/lib/libc/include/generic-netbsd/uvm/uvm_object.h b/lib/libc/include/generic-netbsd/uvm/uvm_object.h @@ -1,4 +1,4 @@ -/* $NetBSD: uvm_object.h,v 1.39 2020/08/14 09:06:15 chs Exp $ */ +/* $NetBSD: uvm_object.h,v 1.40 2024/02/05 21:46:07 andvar Exp $ */ /* * Copyright (c) 1997 Charles D. Cranor and Washington University. @@ -76,7 +76,7 @@ struct uvm_object { * memory objects don't have reference counts -- they never die). * * this value is used to detected kernel object mappings at uvm_unmap() - * time. normally when an object is unmapped its pages eventaully become + * time. normally when an object is unmapped its pages eventually become * deactivated and then paged out and/or freed. this is not useful * for kernel objects... when a kernel object is unmapped we always want * to free the resources associated with the mapping. UVM_OBJ_KERN diff --git a/lib/libc/include/generic-netbsd/uvm/uvm_param.h b/lib/libc/include/generic-netbsd/uvm/uvm_param.h @@ -1,4 +1,4 @@ -/* $NetBSD: uvm_param.h,v 1.41.20.1 2023/08/09 17:42:01 martin Exp $ */ +/* $NetBSD: uvm_param.h,v 1.42 2023/07/11 09:48:56 riastradh Exp $ */ /* * Copyright (c) 1991, 1993 diff --git a/lib/libc/include/generic-netbsd/uvm/uvm_swap.h b/lib/libc/include/generic-netbsd/uvm/uvm_swap.h @@ -1,4 +1,4 @@ -/* $NetBSD: uvm_swap.h,v 1.26 2020/09/05 16:30:13 riastradh Exp $ */ +/* $NetBSD: uvm_swap.h,v 1.29.4.1 2026/04/03 12:38:34 martin Exp $ */ /* * Copyright (c) 1997 Matthew R. Green @@ -39,10 +39,10 @@ #endif struct lwp; +struct swapent; #if defined(VMSWAP) -struct swapent; struct vm_page; int uvm_swap_get(struct vm_page *, int, int); @@ -55,10 +55,21 @@ void swapsys_lock(krw_t); void swapsys_unlock(void); int uvm_swap_stats(char *, int, void (*)(void *, const struct swapent *), size_t, register_t *); +void uvm_swap_decrypt_pages(int startslot, void *p, int npages); #else /* defined(VMSWAP) */ + #define uvm_swapisfull() true -#define uvm_swap_stats(c, l, f, count, retval) (__used f, *retval = 0, ENOSYS) + +static inline int +uvm_swap_stats(char *c, int l, void (*f)(void *, const struct swapent *), + size_t count, register_t *retval) +{ + + *retval = 0; + return ENOSYS; +} + #endif /* defined(VMSWAP) */ void uvm_swap_shutdown(struct lwp *); diff --git a/lib/libc/include/generic-netbsd/wchar.h b/lib/libc/include/generic-netbsd/wchar.h @@ -1,4 +1,4 @@ -/* $NetBSD: wchar.h,v 1.44 2020/03/20 01:08:42 joerg Exp $ */ +/* $NetBSD: wchar.h,v 1.46 2024/11/01 16:36:58 nia Exp $ */ /*- * Copyright (c)1999 Citrus Project, @@ -130,10 +130,15 @@ wchar_t *wcswcs(const wchar_t *, const wchar_t *); wchar_t *wmemchr(const wchar_t *, wchar_t, size_t); int wmemcmp(const wchar_t *, const wchar_t *, size_t); wchar_t *wmemcpy(wchar_t * __restrict, const wchar_t * __restrict, size_t); +wchar_t *wmempcpy(wchar_t * __restrict, const wchar_t * __restrict, size_t); wchar_t *wmemmove(wchar_t *, const wchar_t *, size_t); wchar_t *wmemset(wchar_t *, wchar_t, size_t); -#if defined(_NETBSD_SOURCE) +/* + * IEEE Std 1003.1-2024 (POSIX.1-2024) + */ +#if (_POSIX_C_SOURCE - 0) >= 202405L || (_XOPEN_SOURCE - 0 >= 800) || \ + defined(_NETBSD_SOURCE) size_t wcslcat(wchar_t *, const wchar_t *, size_t); size_t wcslcpy(wchar_t *, const wchar_t *, size_t); #endif diff --git a/lib/libc/include/generic-netbsd/x86/bootinfo.h b/lib/libc/include/generic-netbsd/x86/bootinfo.h @@ -1,4 +1,4 @@ -/* $NetBSD: bootinfo.h,v 1.31 2022/08/20 23:12:00 riastradh Exp $ */ +/* $NetBSD: bootinfo.h,v 1.32 2025/04/30 05:15:08 imil Exp $ */ /* * Copyright (c) 1997 @@ -272,6 +272,9 @@ struct bootinfo { }; extern struct bootinfo bootinfo; +#ifdef XEN +extern bool pvh_boot; +#endif void *lookup_bootinfo(int); void aprint_bootinfo(void); diff --git a/lib/libc/include/generic-netbsd/x86/cpu.h b/lib/libc/include/generic-netbsd/x86/cpu.h @@ -1,4 +1,4 @@ -/* $NetBSD: cpu.h,v 1.133.4.1 2023/08/09 17:42:01 martin Exp $ */ +/* $NetBSD: cpu.h,v 1.140 2025/04/24 01:50:39 riastradh Exp $ */ /* * Copyright (c) 1990 The Regents of the University of California. @@ -325,6 +325,8 @@ struct cpu_info { struct evcnt ci_xen_raw_systime_backwards_evcnt; struct evcnt ci_xen_systime_backwards_hardclock_evcnt; struct evcnt ci_xen_missed_hardclock_evcnt; + struct evcnt ci_xen_timecounter_backwards_evcnt; + struct evcnt ci_xen_timecounter_jump_evcnt; #endif /* XEN */ #if defined(GPROF) && defined(MULTIPROCESSOR) @@ -479,6 +481,7 @@ extern uint64_t x86_xsave_features; extern size_t x86_xsave_offsets[]; extern size_t x86_xsave_sizes[]; extern uint32_t x86_fpu_mxcsr_mask; +bool x86_fpu_save_separate_p(void); extern void (*x86_cpu_idle)(void); #define cpu_idle() (*x86_cpu_idle)() @@ -514,6 +517,8 @@ typedef enum vm_guest { VM_GUEST_VMWARE, VM_GUEST_KVM, VM_GUEST_VIRTUALBOX, + VM_GUEST_GENPVH, + VM_GUEST_NVMM, VM_LAST } vm_guest_t; extern vm_guest_t vm_guest; @@ -543,6 +548,18 @@ vm_guest_is_xenpvh_or_pvhvm(void) } } +static __inline bool __unused +vm_guest_is_pvh(void) +{ + switch(vm_guest) { + case VM_GUEST_XENPVH: + case VM_GUEST_GENPVH: + return true; + default: + return false; + } +} + /* cpu_topology.c */ void x86_cpu_topology(struct cpu_info *); diff --git a/lib/libc/include/generic-netbsd/x86/cpu_extended_state.h b/lib/libc/include/generic-netbsd/x86/cpu_extended_state.h @@ -1,4 +1,4 @@ -/* $NetBSD: cpu_extended_state.h,v 1.17.28.1 2023/07/25 11:41:42 martin Exp $ */ +/* $NetBSD: cpu_extended_state.h,v 1.19 2025/04/24 01:50:39 riastradh Exp $ */ #ifndef _X86_CPU_EXTENDED_STATE_H_ #define _X86_CPU_EXTENDED_STATE_H_ @@ -226,6 +226,8 @@ struct xstate { * It is defined this way to separate the definitions and to * minimise the number of union/struct selectors. * NB: Some userspace stuff (eg firefox) uses it to parse ucontext. + * NB: This is not actually the largest possible save space; + * x86_fpu_save_size may be larger. */ union savefpu { struct save87 sv_87; diff --git a/lib/libc/include/generic-netbsd/x86/cpuvar.h b/lib/libc/include/generic-netbsd/x86/cpuvar.h @@ -1,4 +1,4 @@ -/* $NetBSD: cpuvar.h,v 1.53 2020/07/14 00:45:53 yamaguchi Exp $ */ +/* $NetBSD: cpuvar.h,v 1.55 2025/05/01 05:17:31 imil Exp $ */ /*- * Copyright (c) 2000, 2007 The NetBSD Foundation, Inc. @@ -124,8 +124,11 @@ void x86_cpu_idle_xen(void); void cpu_get_tsc_freq(struct cpu_info *); void pat_init(struct cpu_info *); +bool has_lapic(void); + extern int cpu_vendor; extern bool x86_mp_online; +extern u_int cpu_max_hypervisor_cpuid; extern uint32_t cpu_feature[7]; diff --git a/lib/libc/include/generic-netbsd/x86/float.h b/lib/libc/include/generic-netbsd/x86/float.h @@ -1,10 +1,33 @@ -/* $NetBSD: float.h,v 1.6 2013/04/27 21:35:25 joerg Exp $ */ +/* $NetBSD: float.h,v 1.8 2024/06/15 11:44:09 rillig Exp $ */ #ifndef _X86_FLOAT_H_ #define _X86_FLOAT_H_ #include <sys/featuretest.h> +/* + * LDBL_MIN is twice the m68k LDBL_MIN, even though both are 12-byte + * floats with the same base properties and both allegedly + * IEEE-compliant, because both these representations materialize the + * top (integer-part) bit of the mantissa. But on m68k if the exponent + * is 0 and the integer bit is set, it's a regular number, whereas on + * x86 it's called a pseudo-denormal and apparently treated as a + * denormal, so it doesn't count as a valid value for LDBL_MIN. + * + * x86 citation: Intel 64 and IA-32 Architectures Software Developer's + * Manual, vol. 1 (Order Number: 253665-077US, April 2022), Sec. 8.2.2 + * `Unsupported Double Extended-Precision Floating-Point Encodings + * and Pseudo-Denormals', p. 8-14. + * + * m86k citation: MC68881/MC68882 Floating-Point Coprocessor User's + * Manual, Second Edition (Prentice-Hall, 1989, apparently issued by + * Freescale), Section 3.2 `Binary Real Data formats', pg. 3-3 bottom + * in particular and pp. 3-2 to 3-5 in general. + * + * If anyone needs to update this comment please make sure the copy in + * m68k/include/float.h also gets updated. + */ + #define LDBL_MANT_DIG 64 #define LDBL_EPSILON 1.0842021724855044340E-19L #define LDBL_DIG 18 diff --git a/lib/libc/include/generic-netbsd/x86/ieee.h b/lib/libc/include/generic-netbsd/x86/ieee.h @@ -1,4 +1,4 @@ -/* $NetBSD: ieee.h,v 1.11 2010/09/15 16:11:28 christos Exp $ */ +/* $NetBSD: ieee.h,v 1.13 2024/01/02 19:28:25 christos Exp $ */ /* * Copyright (c) 1992, 1993 @@ -39,6 +39,8 @@ * * @(#)ieee.h 8.1 (Berkeley) 6/11/93 */ +#ifndef _X86_IEEE_H_ +#define _X86_IEEE_H_ /* * ieee.h defines the machine-dependent layout of the machine's IEEE @@ -67,13 +69,13 @@ * i386: 16 bits. */ struct ieee_ext { - u_int ext_fracl:EXT_FRACLBITS; - u_int ext_frach:EXT_FRACHBITS; + uint32_t ext_fracl:EXT_FRACLBITS; + uint32_t ext_frach:EXT_FRACHBITS; #if 0 - u_int ext_int:1; + uint32_t ext_int:1; #endif - u_int ext_exp:EXT_EXPBITS; - u_int ext_sign:1; + uint32_t ext_exp:EXT_EXPBITS; + uint32_t ext_sign:1; }; /* @@ -114,4 +116,6 @@ union ieee_ext_u { #define extu_frach extu_ext.ext_frach #define LDBL_NBIT 0x80000000 -#define mask_nbit_l(u) ((u).extu_frach &= ~LDBL_NBIT) -\ No newline at end of file +#define mask_nbit_l(u) ((u).extu_frach &= ~LDBL_NBIT) + +#endif /* _X86_IEEE_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/x86/lwp_private.h b/lib/libc/include/generic-netbsd/x86/lwp_private.h @@ -0,0 +1,56 @@ +/* $NetBSD: lwp_private.h,v 1.1 2024/11/30 01:04:16 christos Exp $ */ + +/*- + * Copyright (c) 1999 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Klaus Klein. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _X86_LWP_PRIVATE_H_ +#define _X86_LWP_PRIVATE_H_ + +#include <sys/cdefs.h> +#include <sys/tls.h> + +__BEGIN_DECLS + +static __inline void * +__lwp_getprivate_fast(void) +{ + void *__tmp; + +#ifdef _LP64 + __asm volatile("movq %%fs:0, %0" : "=r" (__tmp)); +#else + __asm volatile("movl %%gs:0, %0" : "=r" (__tmp)); +#endif + + return __tmp; +} + +__END_DECLS + +#endif /* !_X86_LWP_PRIVATE_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/x86/mutex.h b/lib/libc/include/generic-netbsd/x86/mutex.h @@ -1,4 +1,4 @@ -/* $NetBSD: mutex.h,v 1.9.22.1 2023/08/09 17:42:01 martin Exp $ */ +/* $NetBSD: mutex.h,v 1.10 2023/07/12 12:50:13 riastradh Exp $ */ /*- * Copyright (c) 2002, 2006, 2009 The NetBSD Foundation, Inc. diff --git a/lib/libc/include/generic-netbsd/x86/specialreg.h b/lib/libc/include/generic-netbsd/x86/specialreg.h @@ -1,4 +1,4 @@ -/* $NetBSD: specialreg.h,v 1.198.2.6 2024/10/03 12:00:57 martin Exp $ */ +/* $NetBSD: specialreg.h,v 1.219 2025/04/28 13:01:27 riastradh Exp $ */ /* * Copyright (c) 2014-2020 The NetBSD Foundation, Inc. @@ -122,7 +122,23 @@ #define CR4_PKS 0x01000000 /* Enable Protection Keys for kern pages */ /* - * Extended Control Register XCR0 + * Extended Control Register XCR0, also known as XFEATURE_ENABLED_MASK, + * with access via XGETBV/XSETBV instructions and support indicated by + * CPUID[EAX=0x0d, ECX=0].EAX/EDX. + * + * References: + * + * - Intel 64 and IA-32 Architectures Software Developer's Manual, + * Volume 3: System Programming Guide, Intel, Order Number: + * 325384-087US, March 2025, Sec. 2.6 `Extended Control Registers + * (Including XCR0)', pp. 2-20 -- 2-22. + * + * - AMD64 Architecture Programmer's Manual, Volume 2: System + * Programming, Advanced Micro Devices, Publication no. 24593, + * Rev. 3.42, March 2024, Sec. 11.5.2 `XFEATURE_ENABLED_MASK', + * p. 355. + * + * XXX Missing reference for XCR0_PT, XCR0_HDC, XCR0_LBR, XCR0_HWP. */ #define XCR0_X87 __BIT(0) /* x87 FPU/MMX state */ #define XCR0_SSE __BIT(1) /* SSE state */ @@ -139,20 +155,45 @@ #define XCR0_HDC __BIT(13) /* Hardware Duty Cycle state */ #define XCR0_LBR __BIT(15) /* Last Branch Record */ #define XCR0_HWP __BIT(16) /* Hardware P-states */ - -#define XCR0_FLAGS1 "\20" \ - "\1" "x87" "\2" "SSE" "\3" "AVX" "\4" "BNDREGS" \ - "\5" "BNDCSR" "\6" "Opmask" "\7" "ZMM_Hi256" "\10" "Hi16_ZMM" \ - "\11" "PT" "\12" "PKRU" "\14" "CET_U" \ - "\15" "CET_S" "\16" "HDC" "\20" "LBR" \ - "\21" "HWP" +#define XCR0_TILECFG __BIT(17) /* Intel AMX TILECFG state in XSAVE */ +#define XCR0_TILEDATA __BIT(18) /* Intel AMX TILEDATA state in XSAVE */ +#define XCR0_LWP __BIT(62) /* AMD Lightweight Profiling (LWP) */ +#define XCR0_X __BIT(63) /* AMD: reserved for XCR0 expansion */ + +#define XCR0_FLAGS1 "\177\020" \ + "b\000" "x87\0" \ + "b\001" "SSE\0" \ + "b\002" "AVX\0" \ + "b\003" "BNDREGS\0" \ + "b\004" "BNDCSR\0" \ + "b\005" "Opmask\0" \ + "b\006" "ZMM_Hi256\0" \ + "b\007" "Hi16_ZMM\0" \ + "b\010" "PT\0" \ + "b\011" "PKRU\0" \ + "b\013" "CET_U\0" \ + "b\014" "CET_S\0" \ + "b\015" "HDC\0" \ + "b\017" "LBR\0" \ + "b\020" "HWP\0" \ + "b\021" "TILECFG\0" \ + "b\022" "TILEDATA\0" \ + "b\076" "LWP\0" \ + "b\077" "X\0" \ + "\0" /* * Known FPU bits, only these get enabled. The save area is sized for all the * fields below. */ +#if defined __i386__ || defined XENPV /* XXX XENPV PR kern/59371 */ #define XCR0_FPU (XCR0_X87 | XCR0_SSE | XCR0_YMM_Hi128 | \ XCR0_Opmask | XCR0_ZMM_Hi256 | XCR0_Hi16_ZMM) +#else +#define XCR0_FPU (XCR0_X87 | XCR0_SSE | XCR0_YMM_Hi128 | \ + XCR0_Opmask | XCR0_ZMM_Hi256 | XCR0_Hi16_ZMM | \ + XCR0_TILECFG | XCR0_TILEDATA) +#endif /* * XSAVE component indices, internal to NetBSD. @@ -883,6 +924,7 @@ #define CPUID_CAPEX_PREFER_IBRS __BIT(18) /* IBRS preferred */ #define CPUID_CAPEX_IBRS_SAMEMODE __BIT(19) /* IBRS same speculation limits */ #define CPUID_CAPEX_EFER_LSMSLE_UN __BIT(20) /* EFER.LMSLE is unsupported */ +#define CPUID_CAPEX_INVLPGB_NEST __BIT(21) /* INVLPGB nested translation */ #define CPUID_CAPEX_AMD_PPIN __BIT(23) /* Protected Processor Inventory Number */ #define CPUID_CAPEX_SSBD __BIT(24) /* Speculation Control SSBD */ #define CPUID_CAPEX_VIRT_SSBD __BIT(25) /* Virt Spec Control SSBD */ @@ -899,7 +941,7 @@ "\15IBPB" "\16INT_WBINVD" "\17IBRS" "\20STIBP" \ "\21IBRS_ALWAYSON" "\22STIBP_ALWAYSON" "\23PREFER_IBRS" \ "\24IBRS_SAMEMODE" \ - "\25EFER_LSMSLE_UN" "\30PPIN" \ + "\25EFER_LSMSLE_UN" "\26INVLPGB_NEST" "\30PPIN" \ "\31SSBD" "\32VIRT_SSBD" "\33SSB_NO" "\34CPPC" \ "\35PSFD" "\36BTC_NO" "\37IBPB_RET" @@ -925,6 +967,7 @@ #define CPUID_AMD_SVM_VMCBCleanBits __BIT(5) /* VMCB Clean Bits support */ #define CPUID_AMD_SVM_FlushByASID __BIT(6) /* Flush by ASID */ #define CPUID_AMD_SVM_DecodeAssist __BIT(7) /* Decode Assists support */ +#define CPUID_AMD_SVM_PmcVirt __BIT(8) /* PMC Virtualization */ #define CPUID_AMD_SVM_PauseFilter __BIT(10) /* PAUSE intercept filter */ #define CPUID_AMD_SVM_PFThreshold __BIT(12) /* PAUSE filter threshold */ #define CPUID_AMD_SVM_AVIC __BIT(13) /* Advanced Virt. Intr. Ctrl */ @@ -932,7 +975,7 @@ #define CPUID_AMD_SVM_vGIF __BIT(16) /* Virtualized GIF */ #define CPUID_AMD_SVM_GMET __BIT(17) /* Guest Mode Execution Trap */ #define CPUID_AMD_SVM_X2AVIC __BIT(18) /* Virt. Intr. Ctrl 4 x2APIC */ -#define CPUID_AMD_SVM_SSSCHECK __BIT(19) /* Shadow Stack restrictions */ +#define CPUID_AMD_SVM_SSSCHECK __BIT(19) /* Shadow Stack restrictions */ #define CPUID_AMD_SVM_SPEC_CTRL __BIT(20) /* SPEC_CTRL virtualization */ #define CPUID_AMD_SVM_ROGPT __BIT(21) /* Read-Only Guest PTable */ #define CPUID_AMD_SVM_HOST_MCE_OVERRIDE __BIT(23) /* #MC intercept */ @@ -942,19 +985,21 @@ #define CPUID_AMD_SVM_XLVTOFFFLTCHG __BIT(27) /* Ext LVToffset FLT changed */ #define CPUID_AMD_SVM_VMCBADRCHKCHG __BIT(28) /* VMCB addr check changed */ #define CPUID_AMD_SVM_BUSLOCKTHRESH __BIT(29) /* Bus Lock Threshold */ - +#define CPUID_AMD_SVM_IDLEHLTINTERCEPT __BIT(30) /* Idle HLT Intercept */ +#define CPUID_AMD_SVM_ESHUTDOWN __BIT(31) /* Enhanced Shutdown Intr. */ #define CPUID_AMD_SVM_FLAGS "\20" \ "\1" "NP" "\2" "LbrVirt" "\3" "SVML" "\4" "NRIPS" \ "\5" "TSCRate" "\6" "VMCBCleanBits" \ "\7" "FlushByASID" "\10" "DecodeAssist" \ - "\11" "B08" "\12" "B09" "\13" "PauseFilter" "\14" "B11" \ + "\11PmcVirt" "\12" "B09" "\13" "PauseFilter" "\14" "B11" \ "\15" "PFThreshold" "\16" "AVIC" "\17" "B14" \ "\20" "V_VMSAVE_VMLOAD" \ "\21" "VGIF" "\22" "GMET" "\23x2AVIC" "\24SSSCHECK" \ "\25" "SPEC_CTRL" "\26" "ROGPT" "\30HOST_MCE_OVERRIDE" \ "\31" "TLBICTL" "\32VNMI" "\33IBSVIRT" "\34ExtLvtOffsetFaultChg" \ - "\35VmcbAddrChkChg" "\36BusLockThreshold" + "\35VmcbAddrChkChg" "\36BusLockThreshold" "\37IdleHltIntercept" \ + "\40EnhancedShutdownInterrupt" /* * AMD Instruction-Based Sampling Capabilities. @@ -972,13 +1017,17 @@ #define CPUID_IBS_OPBRNFUSE __BIT(8) /* Fused branch micro-op indicate */ #define CPUID_IBS_FETCHCTLEXTD __BIT(9) /* IC_IBS_EXTD_CTL MSR */ #define CPUID_IBS_OPDATA4 __BIT(10) /* IBS op data 4 MSR */ -#define CPUID_IBS_L3MISSFILT __BIT(11) /* L3 Miss Filtering */ +#define CPUID_IBS_ZEN4E __BIT(11) /* Zen4 IBS Extensions */ +#define CPUID_IBS_LOADLATFILT __BIT(12) /* Load Latency Filtering */ +#define CPUID_IBS_UPDDTLBSTAT __BIT(19) /* Updated DTLB stats */ #define CPUID_IBS_FLAGS "\20" \ "\1IBSFFV" "\2FetchSam" "\3OpSam" "\4RdWrOpCnt" \ "\5OpCnt" "\6BrnTrgt" "\7OpCntExt" "\10RipInvalidChk" \ "\11OpBrnFuse" "\12IbsFetchCtlExtd" "\13IbsOpData4" \ - "\14IbsL3MissFiltering" + "\14Zen4IbsExtensions" \ + "\15IbsLoadLatencyFiltering" \ + "\24IbsUpdtdDtlbStats" /* * AMD Cache Topology Information. @@ -1024,7 +1073,7 @@ #define CPUID_AMD_ENCMEM_RMPQUERY __BIT(6) /* RMPQUERY instruction */ #define CPUID_AMD_ENCMEM_VMPLSSS __BIT(7) /* VMPL Secure Shadow Stack */ #define CPUID_AMD_ENCMEM_SECTSC __BIT(8) /* Secure TSC */ -#define CPUID_AMD_ENCMEM_TSCAUX_V __BIT(9) /* TSC AUX Virtualization */ +#define CPUID_AMD_ENCMEM_TSCAUX_V __BIT(9) /* TSC AUX Virtualization */ #define CPUID_AMD_ENCMEM_HECC __BIT(10) /* HW Enf Cache Coh across enc dom */ #define CPUID_AMD_ENCMEM_64BH __BIT(11) /* 64Bit Host */ #define CPUID_AMD_ENCMEM_RSTRINJ __BIT(12) /* Restricted Injection */ @@ -1032,14 +1081,21 @@ #define CPUID_AMD_ENCMEM_DBGSWAP __BIT(14) /* Debug Swap */ #define CPUID_AMD_ENCMEM_PREVHOSTIBS __BIT(15) /* Prevent Host IBS */ #define CPUID_AMD_ENCMEM_VTE __BIT(16) /* Virtual Transparent Encryption */ - #define CPUID_AMD_ENCMEM_VMGEXITP __BIT(17) /* VMGEXIT Parameter */ #define CPUID_AMD_ENCMEM_VIRTTOM __BIT(18) /* Virtual TOM MSR */ #define CPUID_AMD_ENCMEM_IBSVGUEST __BIT(19) /* IBS Virt. for SEV-ES guest */ +#define CPUID_AMD_ENCMEM_PMCVGUEST __BIT(20) /* PMC Virt. for SEV-ES guest */ +#define CPUID_AMD_ENCMEM_RMPREAD __BIT(21) /* RMPREAD instruction */ +#define CPUID_AMD_ENCMEM_GUESTINTERCEPT __BIT(22) /* Guest Intercept 4SEV-ES */ +#define CPUID_AMD_ENCMEM_SEGRMP __BIT(23) /* Segmented RMP */ #define CPUID_AMD_ENCMEM_VMSA_REGPROT __BIT(24) /* VmsaRegProt */ #define CPUID_AMD_ENCMEM_SMTPROTECT __BIT(25) /* SMT Protection */ +#define CPUID_AMD_ENCMEM_SECAVIC __BIT(26) /* Secure AVIC */ +#define CPUID_AMD_ENCMEM_ALLOWSEV __BIT(27) /* Allowed SEV */ #define CPUID_AMD_ENCMEM_SVSM_COMMPAGE __BIT(28) /* SVSM Communication Page */ #define CPUID_AMD_ENCMEM_NESTED_VSMP __BIT(29) /* VIRT_{RMPUPDATE,PSMASH} */ +#define CPUID_AMD_ENCMEM_HVINUSEWR __BIT(30) /* HV In Use Write Allow */ +#define CPUID_AMD_ENCMEM_IBPBONENTRY __BIT(31) /* IBPB on Entry */ #define CPUID_AMD_ENCMEM_FLAGS "\20" \ "\1" "SME" "\2" "SEV" "\3" "PageFlushMsr" "\4" "SEV-ES" \ @@ -1047,8 +1103,11 @@ "\11SecureTSC" "\12TscAuxVirt" "\13HwEnfCacheCoh" "\14" "64BitHost" \ "\15" "RSTRINJ" "\16" "ALTINJ" "\17" "DebugSwap" "\20PreventHostIbs" \ "\21VTE" "\22VmgexitParam" "\23VirtualTomMsr" "\24IbsVirtGuest" \ - "\31VmsaRegProt" "\32SmtProtection" \ - "\35SvsmCommPageMSR" "\36NestedVirtSnpMsr" + "\25PmcVirtGuest" "\26RMPREAD" \ + "\27GuestInterceptControl" "\30SegmentedRmp" \ + "\31VmsaRegProt" "\32SmtProtection" "\33SecureAvic" "\34AllowedSev" \ + "\35SvsmCommPageMSR" "\36NestedVirtSnpMsr" "\37HvInuseWrAllowed" \ + "\40IbpbOnEntry" /* * AMD Extended Features 2. @@ -1066,17 +1125,37 @@ #define CPUID_AMDEXT2_NOSMMCTL __BIT(9) /* SMM_CTL MSR is not supported */ #define CPUID_AMDEXT2_FSRS __BIT(10) /* Fast Short Rep Stosb */ #define CPUID_AMDEXT2_FSRC __BIT(11) /* Fast Short Rep Cmpsb */ +#define CPUID_AMDEXT2_PMCPRECISERETIRE __BIT(12) /* PMC Presize Retire */ #define CPUID_AMDEXT2_PREFETCHCTL __BIT(13) /* Prefetch control MSR */ +#define CPUID_AMDEXT2_L2TLBSIZEX32 __BIT(14) /* L2TLB size encoded as x32 */ +#define CPUID_AMDEXT2_ERMSB __BIT(15) /* AMD implementation of ERMSB */ +#define CPUID_AMDEXT2_OPF17RECLAIM __BIT(16) /* Reserve opcode 0f 01/7 */ #define CPUID_AMDEXT2_CPUIDUSRDIS __BIT(17) /* CPUID dis. for non-priv. soft */ #define CPUID_AMDEXT2_EPSF __BIT(18) /* Enhanced Predictive Store Fwd */ +#define CPUID_AMDEXT2_0F017_RECLAIM __BIT(19) /* Opecode 0f 01/7 reserved */ +#define CPUID_AMDEXT2_PREFETCHI __BIT(20) /* IC prefetch support */ +#define CPUID_AMDEXT2_FP512_DOWNGRADE __BIT(21) /* FP512 dpath down to 256 */ +#define CPUID_AMDEXT2_WL_CLASS __BIT(22) /* wkld based heuristic feedback */ +#define CPUID_AMDEXT2_ERAPS __BIT(24) /* Enhn. Retn. Addr. Pred. Sec. */ +#define CPUID_AMDEXT2_SBPB __BIT(27) /* Selective Brnc. Pred. Barrier */ +#define CPUID_AMDEXT2_IBPB_BRTYPE __BIT(28) /* BRanch TYPE prediction flush */ +#define CPUID_AMDEXT2_SRSO_NO __BIT(29) /* Not vulnerable to SRSO */ +#define CPUID_AMDEXT2_SRSO_UK_NO __BIT(30) /* SRSO_NO at user-kern boundary */ +#define CPUID_AMDEXT2_SRSO_MSR_FIX __BIT(31) /* SRSO mitig. bit in BP_CFG[4] */ #define CPUID_AMDEXT2_FLAGS "\20" \ "\1NoNestedDataBp" "\2FsGsKernelGsBaseNonSerializing" \ "\3LfenceAlwaysSerialize" "\4SmmPgCfgLock" \ "\7NullSelectClearsBase" "\10UpperAddressIgnore" \ "\11AutomaticIBRS" "\12NoSmmCtlMSR" "\13FSRS" "\14FSRC" \ - "\16PrefetchCtlMSR" \ - "\22CpuidUserDis" "\23EPSF" + "\15PMC2PreciseRetire" "\16PrefetchCtlMSR" "\17L2TlbsizeX32" \ + "\20AMD_ERMSB" \ + "\21OPCODE_0F017_RECLAIM" "\22CpuidUserDis" "\23EPSF" \ + "\24FAST_REP_SCASB" \ + "\25PREFETCHI" "\26FP512_DOWNGRADE" "\27WL_CLASS_SUPPORT" \ + "\31ERAPS" "\34SBPB" \ + "\35IBPB_BRTYPE" "\36SRSO_NO" "\37SRSO_USER_KERNEL_NO" \ + "\40SRSO_MSR_FIX" /* * AMD Extended Performance Monitoring and Debug @@ -1095,7 +1174,16 @@ #define CPUID_AXPERF_NCPC __BITS(3, 0) /* Num of Core PMC counters */ #define CPUID_AXPERF_NLBRSTACK __BITS(9, 4) /* Num of LBR Stack entries */ #define CPUID_AXPERF_NNBPC __BITS(15, 10) /* Num of NorthBridge PMCs */ -#define CPUID_AXPERF_NUMCPC __BITS(21, 16) /* Num of UMC PMCs */ +#define CPUID_AXPERF_NUMCPC __BITS(23, 16) /* Num of UMC PMCs */ + +/* + * AMD Hetero Workload Classification + * CPUID Fn8000_0027 + */ + +/* %eax */ + +#define CPUID_HWC_NWC __BITS(3, 0) /* Number of Workload Class IDs */ /* * Centaur Extended Feature flags. diff --git a/lib/libc/include/m68k-netbsd-none/m68k/asm.h b/lib/libc/include/m68k-netbsd-none/m68k/asm.h @@ -1,4 +1,4 @@ -/* $NetBSD: asm.h,v 1.34 2020/04/17 14:19:43 joerg Exp $ */ +/* $NetBSD: asm.h,v 1.37 2025/01/06 10:46:44 martin Exp $ */ /*- * Copyright (c) 1997 The NetBSD Foundation, Inc. @@ -122,7 +122,7 @@ /* * The m68k ALTENTRY macro is very different than the traditional - * implementation used by other NetBSD ports. Usually ALTENTRY + * implementation used by other NetBSD ports. Usually ALTENTRY * simply provides an alternate function entry point. The m68k * definition takes a second argument and jumps inside the second * function when profiling is enabled. @@ -139,9 +139,18 @@ #define ALTENTRY(name, rname) _ENTRY(_C_LABEL(name)) #endif +#ifdef _NETBSD_REVISIONID #define RCSID(x) .pushsection ".ident","MS",@progbits,1; \ .asciz x; \ + .ascii "$"; .ascii "NetBSD: "; .ascii __FILE__; \ + .ascii " "; .ascii _NETBSD_REVISIONID; \ + .asciz " $"; \ .popsection +#else +#define RCSID(x) .pushsection ".ident","MS",@progbits,1; \ + .asciz x; \ + .popsection +#endif /* * Global variables of whatever sort. diff --git a/lib/libc/include/m68k-netbsd-none/m68k/bus_dma.h b/lib/libc/include/m68k-netbsd-none/m68k/bus_dma.h @@ -1,4 +1,4 @@ -/* $NetBSD: bus_dma.h,v 1.13 2021/12/05 04:54:20 msaitoh Exp $ */ +/* $NetBSD: bus_dma.h,v 1.14 2023/09/26 12:46:30 tsutsui Exp $ */ /* * This file was extracted from alpha/include/bus.h @@ -193,7 +193,7 @@ struct m68k_bus_dma_tag { #define bus_dmamem_mmap(t, sg, n, o, p, f) \ (*(t)->_dmamem_mmap)((t), (sg), (n), (o), (p), (f)) -#define bus_dmatag_subregion(t, mna, mxa, nt, f) EOPNOTSUPP +#define bus_dmatag_subregion(t, mna, mxa, nt, f) EOPNOTSUPP #define bus_dmatag_destroy(t) /* diff --git a/lib/libc/include/m68k-netbsd-none/m68k/byte_swap.h b/lib/libc/include/m68k-netbsd-none/m68k/byte_swap.h @@ -1,4 +1,4 @@ -/* $NetBSD: byte_swap.h,v 1.11 2014/03/18 18:20:41 riastradh Exp $ */ +/* $NetBSD: byte_swap.h,v 1.11.68.1 2025/12/18 19:57:52 martin Exp $ */ /*- * Copyright (c) 1998 The NetBSD Foundation, Inc. @@ -33,7 +33,7 @@ #define M68K_BYTE_SWAP_H_ #ifdef __GNUC__ -#include <sys/types.h> +#include <sys/stdint.h> __BEGIN_DECLS diff --git a/lib/libc/include/m68k-netbsd-none/m68k/cacheops_30.h b/lib/libc/include/m68k-netbsd-none/m68k/cacheops_30.h @@ -1,4 +1,4 @@ -/* $NetBSD: cacheops_30.h,v 1.9 2008/04/28 20:23:26 martin Exp $ */ +/* $NetBSD: cacheops_30.h,v 1.10 2023/09/26 12:46:30 tsutsui Exp $ */ /*- * Copyright (c) 1997 The NetBSD Foundation, Inc. @@ -40,7 +40,7 @@ TBIA_30(void) __asm volatile (" pflusha;" " movc %0,%%cacr" : : "d" (tmp)); } - + /* * Invalidate any TLB entry for given VA (TB Invalidate Single) */ diff --git a/lib/libc/include/m68k-netbsd-none/m68k/cacheops_40.h b/lib/libc/include/m68k-netbsd-none/m68k/cacheops_40.h @@ -1,4 +1,4 @@ -/* $NetBSD: cacheops_40.h,v 1.11 2008/04/28 20:23:26 martin Exp $ */ +/* $NetBSD: cacheops_40.h,v 1.12 2023/12/27 17:35:35 thorpej Exp $ */ /*- * Copyright (c) 1997 The NetBSD Foundation, Inc. @@ -29,6 +29,8 @@ * POSSIBILITY OF SUCH DAMAGE. */ +#include <machine/fcode.h> + /* * Invalidate entire TLB. */ diff --git a/lib/libc/include/m68k-netbsd-none/m68k/cacheops_60.h b/lib/libc/include/m68k-netbsd-none/m68k/cacheops_60.h @@ -1,4 +1,4 @@ -/* $NetBSD: cacheops_60.h,v 1.13 2008/04/28 20:23:26 martin Exp $ */ +/* $NetBSD: cacheops_60.h,v 1.15 2023/12/27 17:35:35 thorpej Exp $ */ /*- * Copyright (c) 1997 The NetBSD Foundation, Inc. @@ -29,6 +29,8 @@ * POSSIBILITY OF SUCH DAMAGE. */ +#include <machine/fcode.h> + /* * Invalidate entire TLB. */ @@ -74,7 +76,7 @@ TBIAS_60(void) " movc %%cacr,%0;" " orl %1,%0;" " movc %0,%%cacr" /* clear all branch cache - entries */ + entries */ : "=d" (tmp) : "i" (IC60_CABC) ); } @@ -93,7 +95,7 @@ TBIAU_60(void) " movc %%cacr,%0;" " orl %1,%0;" " movc %0,%%cacr" /* clear all branch cache - entries */ + entries */ : "=d" (tmp) : "i" (IC60_CUBC) ); } diff --git a/lib/libc/include/m68k-netbsd-none/m68k/cpu.h b/lib/libc/include/m68k-netbsd-none/m68k/cpu.h @@ -1,4 +1,4 @@ -/* $NetBSD: cpu.h,v 1.17 2019/12/01 15:34:44 ad Exp $ */ +/* $NetBSD: cpu.h,v 1.25 2024/02/28 13:05:39 thorpej Exp $ */ /* * Copyright (c) 1988 University of Utah. @@ -41,26 +41,12 @@ #ifndef _M68K_CPU_H_ #define _M68K_CPU_H_ +#if defined(_KERNEL_OPT) +#include "opt_m68k_arch.h" /* XXX Should not do this here. */ +#endif + /* * Exported definitions common to Motorola m68k-based ports. - * - * Note that are some port-specific definitions here, such as - * HP and Sun MMU types. These facilitate adding very small - * amounts of port-specific code to what would otherwise be - * identical. The is especially true in the case of the HP - * and other m68k pmaps. - * - * Individual ports are expected to define the following CPP symbols - * in <machine/cpu.h> to enable conditional code: - * - * M68K_MMU_MOTOROLA Machine has a Motorola MMU (incl. - * 68851, 68030, 68040, 68060) - * - * M68K_MMU_HP Machine has an HP MMU. - * - * Note also that while m68k-generic code conditionalizes on the - * M68K_MMU_HP CPP symbol, none of the HP MMU definitions are in this - * file (since none are used in otherwise sharable code). */ /* @@ -73,46 +59,6 @@ #include <m68k/m68k.h> -/* XXX - Move this stuff into <m68k/mmu030.h> maybe? */ - -/* - * 68851 and 68030 MMU - */ -#define PMMU_LVLMASK 0x0007 -#define PMMU_INV 0x0400 -#define PMMU_WP 0x0800 -#define PMMU_ALV 0x1000 -#define PMMU_SO 0x2000 -#define PMMU_LV 0x4000 -#define PMMU_BE 0x8000 -#define PMMU_FAULT (PMMU_WP|PMMU_INV) - -/* XXX - Move this stuff into <m68k/mmu040.h> maybe? */ - -/* - * 68040 MMU - */ -#define MMU40_RES 0x001 -#define MMU40_TTR 0x002 -#define MMU40_WP 0x004 -#define MMU40_MOD 0x010 -#define MMU40_CMMASK 0x060 -#define MMU40_SUP 0x080 -#define MMU40_U0 0x100 -#define MMU40_U1 0x200 -#define MMU40_GLB 0x400 -#define MMU40_BE 0x800 - -/* XXX - Move this stuff into <m68k/fcode.h> maybe? */ - -/* 680X0 function codes */ -#define FC_USERD 1 /* user data space */ -#define FC_USERP 2 /* user program space */ -#define FC_PURGE 3 /* HPMMU: clear TLB entries */ -#define FC_SUPERD 5 /* supervisor data space */ -#define FC_SUPERP 6 /* supervisor program space */ -#define FC_CPU 7 /* CPU space */ - /* XXX - Move this stuff into <m68k/cacr.h> maybe? */ /* fields in the 68020 cache control register */ @@ -196,6 +142,87 @@ void cpu_proc_fork(struct proc *, struct proc *); #define cpu_number() 0 #define LWP_PC(l) (((struct trapframe *)((l)->l_md.md_regs))->tf_pc) + +/* + * Arguments to hardclock and gatherstats encapsulate the previous + * machine state in an opaque clockframe. On the m68k platforms, we use + * what the interrupt stub puts on the stack before calling C code. + */ +struct clockframe { + /* regs saved on the stack by the interrupt stub */ + u_int cf_regs[4]; /* d0,d1,a0,a1 */ + /* hardware frame */ + u_short cf_sr; /* sr at time of interrupt */ + u_long cf_pc; /* pc at time of interrupt */ + u_short cf_vo; /* vector offset (4-word HW frame) */ +} __attribute__((__packed__)); + +#define CLKF_USERMODE(framep) (((framep)->cf_sr & PSL_S) == 0) +#define CLKF_PC(framep) ((framep)->cf_pc) + +#if 0 +/* + * We can determine if we were previously in an interrupt context + * if we were running on the interrupt stack (as opposed to the + * "master" stack). + * + * XXX Actually, we can't, because we don't use the master stack + * XXX right now. + * + * (Actually, it's unlikely that we'll ever use the master stack in NetBSD. + * It would complicate the spl*() functions considerably and it just doesn't + * seem like a good trade-off for what seems like extremely marginal gains. + * So, just blissfully run the kernel on the interrupt stack all the time, + * and it's been that way for >30 years and no one has really complained + * about it.) + */ +#define CLKF_INTR(framep) (((framep)->cf_sr & PSL_M) == 0) +#else +/* + * The clock interrupt handler can determine if it's a nested + * interrupt by checking for intr_depth > 1. + * (Remember, the clock interrupt handler itself will cause the + * depth counter to be incremented). + */ +extern volatile unsigned int intr_depth; +#define CLKF_INTR(framep) (intr_depth > 1) +#endif + +#ifndef __HAVE_M68K_HW_AST +#define cpu_set_hw_ast(l) __nothing +#endif + +extern volatile int astpending; +#define cpu_set_ast(l) \ + do { \ + __USE(l); astpending = 1; cpu_set_hw_ast(l); \ + } while (/*CONSTCOND*/0) + +/* + * Preempt the current process if in interrupt from user mode, + * or after the current trap/syscall if in system mode. + */ +#define cpu_need_resched(ci, l, flags) \ + do { \ + __USE(ci); __USE(flags); cpu_set_ast(l); \ + } while (/*CONSTCOND*/0) + +/* + * Give a profiling tick to the current process when the user profiling + * buffer pages are invalid. On m68k, request an ast to send us through + * trap, marking the proc as needing a profiling tick. + */ +#define cpu_need_proftick(l) \ + do { \ + (l)->l_pflag |= LP_OWEUPC; cpu_set_ast(l); \ + } while (/*CONSTCOND*/0) + +/* + * Notify the current process (p) that it has a signal pending, + * process as soon as possible. + */ +#define cpu_signotify(l) cpu_set_ast(l) + #endif /* _KERNEL */ #endif /* _M68K_CPU_H_ */ \ No newline at end of file diff --git a/lib/libc/include/m68k-netbsd-none/m68k/cpuframe.h b/lib/libc/include/m68k-netbsd-none/m68k/cpuframe.h @@ -1,4 +1,4 @@ -/* $NetBSD: cpuframe.h,v 1.8 2021/12/05 02:53:51 msaitoh Exp $ */ +/* $NetBSD: cpuframe.h,v 1.10 2023/09/26 14:33:55 tsutsui Exp $ */ /* * Copyright (c) 1988 University of Utah. @@ -64,8 +64,8 @@ struct frame { u_int f_fa; u_int f_fslw; /* for 060FP type 4 FP disabled frames: */ -#define f_fea f_fa -#define f_pcfi f_fslw +#define f_fea f_fa +#define f_pcfi f_fslw } F_fmt4; struct fmt7 { @@ -187,8 +187,8 @@ struct fpframe { #define fpf_busy FPF_u2.FPF_busy #define fpf_unimp FPF_u2.FPF_unimp -/* - * This is incompatible with the earlier one; especially, an earlier frame +/* + * This is incompatible with the earlier one; especially, an earlier frame * must not be FRESTOREd on a 060 or vv, because a frame error exception is * not guaranteed. */ diff --git a/lib/libc/include/m68k-netbsd-none/m68k/fenv.h b/lib/libc/include/m68k-netbsd-none/m68k/fenv.h @@ -1,4 +1,4 @@ -/* $NetBSD: fenv.h,v 1.8 2019/10/26 17:51:49 christos Exp $ */ +/* $NetBSD: fenv.h,v 1.10 2024/10/30 15:56:11 riastradh Exp $ */ /*- * Copyright (c) 2015 The NetBSD Foundation, Inc. @@ -32,7 +32,9 @@ #ifndef _M68K_FENV_H_ #define _M68K_FENV_H_ +#include <sys/featuretest.h> #include <sys/stdint.h> + #include <m68k/float.h> #include <m68k/fpreg.h> @@ -86,19 +88,19 @@ typedef struct { do { \ __t d = __d; \ __asm__ __volatile__ ("fmul" __s "; fnop" : "=f" (d) : "0" (d)); \ - } while (/*CONSTCOND*/0) + } while (/*CONSTCOND*/0) #define __fdiv(__s, __t, __d) \ do { \ __t d = __d; \ __asm__ __volatile__ ("fdiv" __s "; fnop" : "=f" (d) : "0" (d)); \ - } while (/*CONSTCOND*/0) + } while (/*CONSTCOND*/0) #define __fetox(__s, __t, __d) \ do { \ __t d = __d; \ __asm__ __volatile__ ("fetox" __s "; fnop" : "=f" (d) : "0" (d)); \ - } while (/*CONSTCOND*/0) + } while (/*CONSTCOND*/0) #define __fgetenv(__envp) \ __asm__ __volatile__ ("fmovem%.l %/fpcr/%/fpsr/%/fpiar,%0" : "=m" (__envp)) diff --git a/lib/libc/include/m68k-netbsd-none/m68k/float.h b/lib/libc/include/m68k-netbsd-none/m68k/float.h @@ -1,8 +1,33 @@ -/* $NetBSD: float.h,v 1.21 2014/03/18 18:20:41 riastradh Exp $ */ +/* $NetBSD: float.h,v 1.24 2024/10/30 15:56:11 riastradh Exp $ */ #ifndef _M68K_FLOAT_H_ #define _M68K_FLOAT_H_ +#include <sys/featuretest.h> + +/* + * LDBL_MIN is half the x86 LDBL_MIN, even though both are 12-byte + * floats with the same base properties and both allegedly + * IEEE-compliant, because both these representations materialize the + * top (integer-part) bit of the mantissa. But on m68k if the exponent + * is 0 and the integer bit is set, it's a regular number, whereas on + * x86 it's called a pseudo-denormal and apparently treated as a + * denormal, so it doesn't count as a valid value for LDBL_MIN. + * + * x86 citation: Intel 64 and IA-32 Architectures Software Developer's + * Manual, vol. 1 (Order Number: 253665-077US, April 2022), Sec. 8.2.2 + * `Unsupported Double Extended-Precision Floating-Point Encodings + * and Pseudo-Denormals', p. 8-14. + * + * m86k citation: MC68881/MC68882 Floating-Point Coprocessor User's + * Manual, Second Edition (Prentice-Hall, 1989, apparently issued by + * Freescale), Section 3.2 `Binary Real Data formats', pg. 3-3 bottom + * in particular and pp. 3-2 to 3-5 in general. + * + * If anyone needs to update this comment please make sure the copy in + * x86/include/float.h also gets updated. + */ + #if defined(__LDBL_MANT_DIG__) #define LDBL_MANT_DIG __LDBL_MANT_DIG__ #define LDBL_EPSILON __LDBL_EPSILON__ diff --git a/lib/libc/include/m68k-netbsd-none/m68k/frame.h b/lib/libc/include/m68k-netbsd-none/m68k/frame.h @@ -1,4 +1,4 @@ -/* $NetBSD: frame.h,v 1.31 2019/02/18 01:12:23 thorpej Exp $ */ +/* $NetBSD: frame.h,v 1.35 2024/01/13 17:07:26 thorpej Exp $ */ /* * Copyright (c) 1988 University of Utah. @@ -70,10 +70,6 @@ #define FMTASIZE sizeof(struct fmtA) #define FMTBSIZE sizeof(struct fmtB) -#define V_BUSERR 0x008 -#define V_ADDRERR 0x00C -#define V_TRAP1 0x084 - /* 68010 SSW bits */ #define SSW1_RR 0x8000 #define SSW1_IF 0x2000 @@ -128,8 +124,8 @@ #define FSLW_SIZE 0x00600000 /* - * We better define the FSLW_SIZE values here, as the table given in the - * MC68060UM/AD rev. 0/1 p. 8-23 is wrong, and was corrected in the errata + * We better define the FSLW_SIZE values here, as the table given in the + * MC68060UM/AD rev. 0/1 p. 8-23 is wrong, and was corrected in the errata * document. */ #define FSLW_SIZE_LONG 0x00000000 @@ -147,17 +143,17 @@ #define FSLW_PBE 0x00004000 #define FSLW_SBE 0x00002000 #define FSLW_PTA 0x00001000 -#define FSLW_PTB 0x00000800 -#define FSLW_IL 0x00000400 -#define FSLW_PF 0x00000200 -#define FSLW_SP 0x00000100 -#define FSLW_WP 0x00000080 -#define FSLW_TWE 0x00000040 -#define FSLW_RE 0x00000020 -#define FSLW_WE 0x00000010 -#define FSLW_TTR 0x00000008 -#define FSLW_BPE 0x00000004 -#define FSLW_SEE 0x00000001 +#define FSLW_PTB 0x00000800 +#define FSLW_IL 0x00000400 +#define FSLW_PF 0x00000200 +#define FSLW_SP 0x00000100 +#define FSLW_WP 0x00000080 +#define FSLW_TWE 0x00000040 +#define FSLW_RE 0x00000020 +#define FSLW_WE 0x00000010 +#define FSLW_TTR 0x00000008 +#define FSLW_BPE 0x00000004 +#define FSLW_SEE 0x00000001 /* struct fpframe060 */ #define FPF6_FMT_NULL 0x00 @@ -236,13 +232,29 @@ do { \ if (! CLKF_USERMODE(cfp) && \ (CLKF_PC(cfp) < (u_long)&_atomic_cas_ras_end && \ CLKF_PC(cfp) > (u_long)&_atomic_cas_ras_start)) { \ - (cfp)->cf_pc = (u_long)&_atomic_cas_ras_start; \ + (cfp)->cf_pc = (u_long)&_atomic_cas_ras_start; \ } \ } while (/*CONSTCOND*/0) #else #define ATOMIC_CAS_CHECK(cfp) /* nothing */ #endif /* __mc68010__ */ +static inline void ** +getvbr(void) +{ + void **vbr; + + __asm volatile("movc %%vbr,%0" : "=r" (vbr)); + + return vbr; +} + +static inline void +setvbr(void **vbr) +{ + __asm volatile("movc %0,%%vbr" : : "r" (vbr)); +} + #endif /* _KERNEL */ #endif /* _M68K_FRAME_H_ */ \ No newline at end of file diff --git a/lib/libc/include/m68k-netbsd-none/m68k/ieee.h b/lib/libc/include/m68k-netbsd-none/m68k/ieee.h @@ -1,4 +1,4 @@ -/* $NetBSD: ieee.h,v 1.16 2010/09/20 16:13:35 christos Exp $ */ +/* $NetBSD: ieee.h,v 1.18 2025/07/02 14:41:35 christos Exp $ */ /* * Copyright (c) 1992, 1993 @@ -40,6 +40,9 @@ * @(#)ieee.h 8.1 (Berkeley) 6/11/93 */ +#ifndef __68K_IEEE_H_INCLUDED +#define __68K_IEEE_H_INCLUDED + /* * ieee.h defines the machine-dependent layout of the machine's IEEE * floating point. It does *not* define (yet?) any of the rounding @@ -60,14 +63,14 @@ } while(/*CONSTCOND*/0) struct ieee_ext { - u_int ext_sign:1; - u_int ext_exp:EXT_EXPBITS; - u_int ext_zero:16; + uint32_t ext_sign:1; + uint32_t ext_exp:EXT_EXPBITS; + uint32_t ext_zero:16; #if 0 - u_int ext_int:1; + uint32_t ext_int:1; #endif - u_int ext_frach; - u_int ext_fracl; + uint32_t ext_frach; + uint32_t ext_fracl; }; /* @@ -110,4 +113,6 @@ union ieee_ext_u { #define LDBL_NBIT 0x80000000 #define mask_nbit_l(u) ((u).extu_frach &= ~LDBL_NBIT) -#endif /* !__mc68010__ || _KERNEL */ -\ No newline at end of file +#endif /* !__mc68010__ || _KERNEL */ + +#endif /* __68K_IEEE_H_INCLUDED */ +\ No newline at end of file diff --git a/lib/libc/include/m68k-netbsd-none/m68k/ieeefp.h b/lib/libc/include/m68k-netbsd-none/m68k/ieeefp.h @@ -1,6 +1,6 @@ -/* $NetBSD: ieeefp.h,v 1.10 2017/03/22 23:11:09 chs Exp $ */ +/* $NetBSD: ieeefp.h,v 1.11 2023/09/26 12:46:30 tsutsui Exp $ */ -/* +/* * Written by J.T. Conklin, Apr 6, 1995 * Modified by Jason R. Thorpe, June 22, 2003 * Public domain. @@ -19,7 +19,7 @@ typedef int fp_except; -/* adjust for FP_* and FE_* value differences */ +/* adjust for FP_* and FE_* value differences */ #define __FPE(x) ((x) >> 3) #define __FEE(x) ((x) << 3) #define __FPR(x) ((x) >> 4) diff --git a/lib/libc/include/m68k-netbsd-none/m68k/int_limits.h b/lib/libc/include/m68k-netbsd-none/m68k/int_limits.h @@ -1,4 +1,4 @@ -/* $NetBSD: int_limits.h,v 1.8 2014/08/13 22:31:07 matt Exp $ */ +/* $NetBSD: int_limits.h,v 1.9 2023/09/26 12:46:30 tsutsui Exp $ */ /*- * Copyright (c) 2001 The NetBSD Foundation, Inc. @@ -80,7 +80,7 @@ #define UINT_LEAST64_MAX 0xffffffffffffffffULL /* uint_least64_t */ /* 7.18.2.3 Limits of fastest minimum-width integer types */ - + /* minimum values of fastest minimum-width signed integer types */ #define INT_FAST8_MIN (-0x7f-1) /* int_fast8_t */ #define INT_FAST16_MIN (-0x7fff-1) /* int_fast16_t */ diff --git a/lib/libc/include/m68k-netbsd-none/m68k/intr.h b/lib/libc/include/m68k-netbsd-none/m68k/intr.h @@ -0,0 +1,211 @@ +/* $NetBSD: intr.h,v 1.9 2024/02/08 20:11:56 andvar Exp $ */ + +/*- + * Copyright (c) 2023, 2024 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Jason R. Thorpe. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _M68k_INTR_H_ +#define _M68k_INTR_H_ + +#include <machine/psl.h> + +#if (defined(_KERNEL) && !defined(_LOCORE)) || defined(_KMEMUSER) +typedef struct { + uint16_t _psl; /* physical manifestation of logical IPL_* */ +} ipl_cookie_t; +#endif + +#ifdef _KERNEL + +/* + * Logical interrupt priority levels -- these are distinct from + * the hardware interrupt priority levels of the m68k. + */ +#define IPL_NONE 0 +#define IPL_SOFTCLOCK 1 /* clock software interrupts */ +#define IPL_SOFTBIO 2 /* block device software interrupts */ +#define IPL_SOFTNET 3 /* network software interrupts */ +#define IPL_SOFTSERIAL 4 /* serial device software interrupts */ +#define IPL_VM 5 /* all interrupts that can allocate memory */ +#define IPL_SCHED 6 /* scheduler / hard clock interrupts */ +#define IPL_HIGH 7 /* blocks all interrupts */ +#define NIPL 8 + +/* + * Abstract ISR priorities. These allow sorting of latency-sensitive + * devices earlier on the shared auto-vectored interrupt lists. + */ +#define ISRPRI_BIO 0 /* a block I/O device */ +#define ISRPRI_MISC 0 /* misc. devices */ +#define ISRPRI_NET 1 /* a network interface */ +#define ISRPRI_TTY 2 /* a serial port */ +#define ISRPRI_DISPLAY 2 /* display devices / framebuffers */ +#define ISRPRI_TTYNOBUF 3 /* a particularly bad serial port */ +#define ISRPRI_AUDIO 4 /* audio devices */ + +#ifndef _LOCORE + +extern volatile unsigned int intr_depth;/* interrupt depth */ +extern const uint16_t ipl2psl_table[NIPL]; + +typedef int ipl_t; /* logical IPL_* value */ + +static inline bool +cpu_intr_p(void) +{ + return intr_depth != 0; +} + +static inline ipl_cookie_t +makeiplcookie(ipl_t ipl) +{ + return (ipl_cookie_t){._psl = ipl2psl_table[ipl]}; +} + +static inline int +splraiseipl(ipl_cookie_t icookie) +{ + return _splraise(icookie._psl); +} + +/* + * These are essentially constant equivalents of what's in + * ipl2psl_table[] to avoid the memory reference. + */ +#define splsoftclock() _splraise(PSL_S | MACHINE_PSL_IPL_SOFTCLOCK) +#define splsoftbio() _splraise(PSL_S | MACHINE_PSL_IPL_SOFTBIO) +#define splsoftnet() _splraise(PSL_S | MACHINE_PSL_IPL_SOFTNET) +#define splsoftserial() _splraise(PSL_S | MACHINE_PSL_IPL_SOFTSERIAL) +#define splvm() _splraise(PSL_S | MACHINE_PSL_IPL_VM) +#define splsched() _splraise(PSL_S | MACHINE_PSL_IPL_SCHED) +#define splhigh() spl7() + +/* + * XXX TODO: Support for hardware-assisted soft interrupts (sun68k) + * XXX and fast-soft-interrupts (others). + */ +#define spl0() _spl0() +#define splx(s) _splx(s) + +#ifdef _M68K_INTR_PRIVATE +#include <sys/queue.h> + +struct m68k_intrhand { + LIST_ENTRY(m68k_intrhand) ih_link; + int (*ih_func)(void *); + void *ih_arg; + struct evcnt *ih_evcnt; + int ih_ipl; /* m68k IPL, not IPL_* */ + int ih_vec; + int ih_isrpri; +}; +LIST_HEAD(m68k_intrhand_list, m68k_intrhand); + +struct m68k_ih_allocfuncs { + struct m68k_intrhand * (*alloc)(int km_flag); + void (*free)(struct m68k_intrhand *); +}; +#else +struct m68k_ih_allocfuncs; +#endif /* _M68K_INTR_PRIVATE */ + +#include <sys/evcnt.h> + +#ifdef __HAVE_LEGACY_INTRCNT +#define m68k_count_intr(x) \ +do { \ + extern u_int intrcnt[]; \ + intrcnt[(x)]++; \ + curcpu()->ci_data.cpu_nintr++; \ +} while (/*CONSTCOND*/0) +#else +/* + * This is exposed here so that platform-specific interrupt handlers + * can access it. + */ +extern struct evcnt m68k_intr_evcnt[]; + +#define m68k_count_intr(x) \ +do { \ + /* 32-bit counter should be sufficient for m68k. */ \ + m68k_intr_evcnt[(x)].ev_count32++; \ + curcpu()->ci_data.cpu_nintr++; \ +} while (/*CONSTCOND*/0) +#endif /* __HAVE_LEGACY_INTRCNT */ + +/* + * Common m68k interrupt dispatch: + * + * ==> m68k_intr_init(const struct m68k_ih_allocfuncs *allocfuncs) + * + * Initialize the interrupt system. If the platform needs to store + * additional information in the interrupt handle, then it can provide + * its own alloc/free routines. Otherwise, pass NULL to get the default. + * If a platform doesn't want the special allocator behavior, calling + * this function is optional; it will be done for you on the first call + * to m68k_intr_establish(). + * + * ==> m68k_intr_establish(int (*func)(void *), void *arg, + * struct evcnt *ev, int vec, int ipl, int flags) + * + * Establish an interrupt handler. If vec is 0, then the handler is + * registered in the auto-vector list corresponding to the specified + * m68k interrupt priroity level (this is NOT an IPL_* value). Otherwise. + * the handler is registered at the specified vector. + * + * Vectored interrupts are not shareable. The interrupt vector must be + * within the platform's "user vector" region, which is generally defined + * as vectors 64-255, although some platforms may use vectors that start + * below 64 (in which case, that platform must define MACHINE_USERVEC_START + * to override the default). + * + * Vectored interrupt support is not included by default in order to reduce + * the memory footprint. If a platform wishes to enable vectored interrupts, + * then it should define __HAVE_M68K_INTR_VECTORED in its <machine/types.h> + * and genassym.cf. + * + * ==> m68k_intr_disestablish(void *ih) + * + * Removes a previously-established interrupt handler. Returns true + * if there are no more handlers on the list that handler was on. This + * information can be used to e.g. disable interrupts on a PIC. + */ +void m68k_intr_init(const struct m68k_ih_allocfuncs *); +void *m68k_intr_establish(int (*)(void *), void *, struct evcnt *, + int/*vec*/, int/*m68k ipl*/, int/*isrpri*/, int/*flags*/); +bool m68k_intr_disestablish(void *); + +#ifdef __HAVE_M68K_INTR_VECTORED +void *m68k_intrvec_intrhand(int vec); /* XXX */ +#endif + +#endif /* !_LOCORE */ + +#endif /* _KERNEL */ + +#endif /* _M68k_INTR_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/m68k-netbsd-none/m68k/kcore.h b/lib/libc/include/m68k-netbsd-none/m68k/kcore.h @@ -1,4 +1,4 @@ -/* $NetBSD: kcore.h,v 1.5 2008/04/28 20:23:26 martin Exp $ */ +/* $NetBSD: kcore.h,v 1.7 2023/01/29 09:24:33 mlelstv Exp $ */ /*- * Copyright (c) 1996, 1997 The NetBSD Foundation, Inc. @@ -57,24 +57,24 @@ #define M68K_NPHYS_RAM_SEGS 8 /* XXX */ struct m68k_kcore_hdr { int32_t mmutype; /* MMU type */ - u_int32_t sg_v; /* STE bits */ - u_int32_t sg_frame; - u_int32_t sg_ishift; - u_int32_t sg_pmask; - u_int32_t sg40_shift1; - u_int32_t sg40_mask2; - u_int32_t sg40_shift2; - u_int32_t sg40_mask3; - u_int32_t sg40_shift3; - u_int32_t sg40_addr1; - u_int32_t sg40_addr2; - u_int32_t pg_v; /* PTE bits */ - u_int32_t pg_frame; - u_int32_t sysseg_pa; /* PA of Sysseg[] */ - u_int32_t reloc; /* value added to relocate a symbol + uint32_t sg_v; /* STE bits */ + uint32_t sg_frame; + uint32_t sg_ishift; + uint32_t sg_pmask; + uint32_t sg40_shift1; + uint32_t sg40_mask2; + uint32_t sg40_shift2; + uint32_t sg40_mask3; + uint32_t sg40_shift3; + uint32_t sg40_addr1; + uint32_t sg40_addr2; + uint32_t pg_v; /* PTE bits */ + uint32_t pg_frame; + uint32_t sysseg_pa; /* PA of Sysseg[] */ + uint32_t reloc; /* value added to relocate a symbol before address translation is enabled */ - u_int32_t relocend; /* if kernbase < va < relocend, we + uint32_t relocend; /* if kernbase < va < relocend, we can do simple relocation to get the physical address */ phys_ram_seg_t ram_segs[M68K_NPHYS_RAM_SEGS]; @@ -84,20 +84,20 @@ struct m68k_kcore_hdr { * kcore information for the sun2 */ struct sun2_kcore_hdr { - u_int32_t segshift; - u_int32_t pg_frame; /* PTE bits */ - u_int32_t pg_valid; - u_int8_t ksegmap[512]; /* kernel segment map */ + uint32_t segshift; + uint32_t pg_frame; /* PTE bits */ + uint32_t pg_valid; + uint8_t ksegmap[512]; /* kernel segment map */ }; /* * kcore information for the sun3 */ struct sun3_kcore_hdr { - u_int32_t segshift; - u_int32_t pg_frame; /* PTE bits */ - u_int32_t pg_valid; - u_int8_t ksegmap[256]; /* kernel segment map */ + uint32_t segshift; + uint32_t pg_frame; /* PTE bits */ + uint32_t pg_valid; + uint8_t ksegmap[256]; /* kernel segment map */ }; /* @@ -106,10 +106,10 @@ struct sun3_kcore_hdr { */ #define SUN3X_NPHYS_RAM_SEGS 4 struct sun3x_kcore_hdr { - u_int32_t pg_frame; /* PTE bits */ - u_int32_t pg_valid; - u_int32_t contig_end; - u_int32_t kernCbase; /* VA of kernel level C page table */ + uint32_t pg_frame; /* PTE bits */ + uint32_t pg_valid; + uint32_t contig_end; + uint32_t kernCbase; /* VA of kernel level C page table */ phys_ram_seg_t ram_segs[SUN3X_NPHYS_RAM_SEGS]; }; @@ -118,8 +118,8 @@ struct sun3x_kcore_hdr { */ struct cpu_kcore_hdr { char name[16]; /* machine name */ - u_int32_t page_size; /* hardware page size */ - u_int32_t kernbase; /* start of KVA space */ + uint32_t page_size; /* hardware page size */ + uint32_t kernbase; /* start of KVA space */ union { struct m68k_kcore_hdr _m68k; struct sun2_kcore_hdr _sun2; diff --git a/lib/libc/include/m68k-netbsd-none/m68k/lwp_private.h b/lib/libc/include/m68k-netbsd-none/m68k/lwp_private.h @@ -0,0 +1,64 @@ +/* $NetBSD: lwp_private.h,v 1.2 2024/12/01 08:44:43 skrll Exp $ */ + +/*- + * Copyright (c) 2001 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Klaus Klein. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _M68K_LWP_PRIVATE_H_ +#define _M68K_LWP_PRIVATE_H_ + +#include <sys/cdefs.h> +#include <sys/tls.h> + +#include <lwp.h> + +#define TLS_TP_OFFSET 0x7000 +#define TLS_DTV_OFFSET 0x8000 + +__CTASSERT(TLS_TP_OFFSET + sizeof(struct tls_tcb) < 0x8000); +__CTASSERT(TLS_TP_OFFSET % sizeof(struct tls_tcb) == 0); + +__BEGIN_DECLS + +static __inline struct tls_tcb * +__lwp_gettcb_fast(void) +{ + unsigned int __tcb = (unsigned int)_lwp_getprivate(); + return (struct tls_tcb *)(uintptr_t) + (__tcb - TLS_TP_OFFSET - sizeof(struct tls_tcb)); +} + +static inline void +__lwp_settcb(struct tls_tcb *__tcb) +{ + __tcb += TLS_TP_OFFSET / sizeof(*__tcb) + 1; + _lwp_setprivate(__tcb); +} +__END_DECLS + +#endif /* !_M68K_LWP_PRIVATE_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/m68k-netbsd-none/m68k/m68k.h b/lib/libc/include/m68k-netbsd-none/m68k/m68k.h @@ -1,4 +1,4 @@ -/* $NetBSD: m68k.h,v 1.24 2019/04/06 03:06:26 thorpej Exp $ */ +/* $NetBSD: m68k.h,v 1.27 2024/01/13 00:44:42 thorpej Exp $ */ /* * Copyright (c) 1988 University of Utah. @@ -58,7 +58,7 @@ * All m68k ports must provide these globals. */ extern int cputype; /* CPU on this host */ -extern int ectype; /* external cache on this host */ +extern int ectype; /* external cache on this host */ extern int fputype; /* FPU on this host */ extern int mmutype; /* MMU on this host */ #endif /* _KERNEL */ @@ -103,14 +103,10 @@ void copypage040(void *fromaddr, void *toaddr); void copypage(void *fromaddr, void *toaddr); void zeropage(void *addr); -/* support.s */ -int getdfc(void); -int getsfc(void); - /* switch_subr.s */ void lwp_trampoline(void); void m68881_save(struct fpframe *); -void m68881_restore(struct fpframe *); +void m68881_restore(struct fpframe *); void savectx(struct pcb *); /* w16copy.s */ diff --git a/lib/libc/include/m68k-netbsd-none/m68k/mcontext.h b/lib/libc/include/m68k-netbsd-none/m68k/mcontext.h @@ -1,4 +1,4 @@ -/* $NetBSD: mcontext.h,v 1.12 2020/10/04 10:34:18 rin Exp $ */ +/* $NetBSD: mcontext.h,v 1.16 2024/11/30 01:04:11 christos Exp $ */ /*- * Copyright (c) 2001 The NetBSD Foundation, Inc. @@ -39,8 +39,8 @@ /* * mcontext extensions to handle signal delivery. */ -#define _UC_SETSTACK 0x00010000 -#define _UC_CLRSTACK 0x00020000 +#define _UC_SETSTACK _UC_MD_BIT16 +#define _UC_CLRSTACK _UC_MD_BIT17 /* * General register state @@ -98,8 +98,8 @@ typedef struct { /* Note: no additional padding is to be performed in ucontext_t. */ /* Machine-specific uc_flags value */ -#define _UC_M68K_UC_USER 0x40000000 -#define _UC_TLSBASE 0x00080000 +#define _UC_M68K_UC_USER _UC_MD_BIT30 +#define _UC_TLSBASE _UC_MD_BIT19 #define _UC_MACHINE_SP(uc) ((uc)->uc_mcontext.__gregs[_REG_A7]) #define _UC_MACHINE_FP(uc) ((uc)->uc_mcontext.__gregs[_REG_A6]) @@ -110,35 +110,4 @@ typedef struct { #define __UCONTEXT_SIZE 1024 -#if defined(_LIBC_SOURCE) || defined(_RTLD_SOURCE) || defined(__LIBPTHREAD_SOURCE__) -#define TLS_TP_OFFSET 0x7000 -#define TLS_DTV_OFFSET 0x8000 - -#include <sys/tls.h> - -__CTASSERT(TLS_TP_OFFSET + sizeof(struct tls_tcb) < 0x8000); -__CTASSERT(TLS_TP_OFFSET % sizeof(struct tls_tcb) == 0); - -__BEGIN_DECLS - -void *_lwp_getprivate(void); -void _lwp_setprivate(void *); - -static __inline struct tls_tcb * -__lwp_gettcb_fast(void) -{ - unsigned int __tcb = (unsigned int)_lwp_getprivate(); - return (struct tls_tcb *)(uintptr_t) - (__tcb - TLS_TP_OFFSET - sizeof(struct tls_tcb)); -} - -static inline void -__lwp_settcb(struct tls_tcb *__tcb) -{ - __tcb += TLS_TP_OFFSET / sizeof(*__tcb) + 1; - _lwp_setprivate(__tcb); -} -__END_DECLS -#endif - #endif /* !_M68K_MCONTEXT_H_ */ \ No newline at end of file diff --git a/lib/libc/include/m68k-netbsd-none/m68k/mmu_30.h b/lib/libc/include/m68k-netbsd-none/m68k/mmu_30.h @@ -0,0 +1,105 @@ +/* $NetBSD: mmu_30.h,v 1.3 2025/07/08 11:45:25 thorpej Exp $ */ + +/*- + * Copyright (c) 2023 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Jason R. Thorpe. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _M68K_MMU_30_H_ +#define _M68K_MMU_30_H_ + +#include <machine/fcode.h> + +/* + * The built-in MMU in the 68030 is a subset of the 68851. Section 9.6 + * of the 68030 User's Manual describes the differences: + * + * The following 68851 functions are not present on the 68030: + * - Access levels + * - Breakpoint registers + * - DMA Root Pointer + * - Task aliases + * - Lockable ATC entries + * - ATC entries defined as Shared Globally + * + * Furthermore, the 68030 has some functional differences: + * - Only 22 ATC entries + * - Reduced instruction set for MMU operations + * - Reduced addressing modes for MMU instructions. + * + * Instructions removed: PVALID, PFLUSHR, PFLUSHS, PBcc, PDBcc, PScc, + * PTRAPcc, PSAVE, PRESTORE. + * + * Registers removed: CAL, VAL, BAD, BACx, DRP, AC. + * + * The 68030 does, however, add a pair of Transparent Translation + * registers + */ + +/* + * 9.7.3 -- Transparent Translation registers + * + * These registers define blocks of logical address space that are + * transparently translated VA==PA. The minimum block size is 16MB, + * and the blocks may overlap. The mode in which the transparent + * translation is applied is specified by the Function Code base and + * mask fields. + * + * The Logical Address Base specifies the address of the block and + * the Logical Address Mask field specifies the address bits to *ignore*. + * + */ +#define TT30_LAB __BITS(31,24) /* Logical Address Base */ +#define TT30_LAM __BITS(16,23) /* Logical Address Mask */ +#define TT30_E __BIT(15) /* Enable transparent translation */ +#define TT30_CI __BIT(10) /* Cache Inhibit */ +#define TT30_RW __BIT(9) /* Read(1) or Write(0) translated */ +#define TT30_RWM __BIT(8) /* RW field used(0) or ignored(1) */ +#define TT30_FCBASE __BITS(4,6) /* Function Code base */ +#define TT30_FCMASK __BITS(0,2) /* Function Code bits to ignore */ + +/* Convenience definitions for address space selection. */ +#define TT30_USERD __SHIFTIN(FC_USERD,TT30_FCBASE) +#define TT30_USERP __SHIFTIN(FC_USERP,TT30_FCBASE) +#define TT30_SUPERD __SHIFTIN(FC_SUPERD,TT30_FCBASE) +#define TT30_SUPERP __SHIFTIN(FC_SUPERP,TT30_FCBASE) + +#ifdef _KERNEL +/* + * TT register value indices in the mmu_ttregs[] array. Note that asm + * code makes assumptions about these indices, to change them at your + * peril. + */ +extern uint32_t mmu_tt30[]; +#define MMU_TTREG_TT0 0 +#define MMU_TTREG_TT1 1 +#define MMU_NTTREGS30 2 + +void mmu_load_tt30(uint32_t *); +#endif /* _KERNEL */ + +#endif /* _M68K_MMU_30_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/m68k-netbsd-none/m68k/mmu_40.h b/lib/libc/include/m68k-netbsd-none/m68k/mmu_40.h @@ -0,0 +1,232 @@ +/* $NetBSD: mmu_40.h,v 1.4 2025/07/08 11:45:25 thorpej Exp $ */ + +/*- + * Copyright (c) 2023 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Jason R. Thorpe. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _M68K_MMU_40_H_ +#define _M68K_MMU_40_H_ + +/* + * Translation table structures for the 68040 MMU. + * + * The 68040 MMU uses a 3-level tree structure. The root (L1) and + * and pointer (L2) tables contain the base addresses of the tables + * at the lext level, and the page (L3) tables contain the addresses + * of the page descriptors, which may either contain the address of + * a physical page (4K or 8K) directly, or point to an indirect + * descriptor which points to the physical page. + * + * The L1 and L2 tables contain 128 4-byte descriptors, and are thus 512 + * bytes in size. Each of the 128 L1 descriptors corresponds to a 32MB + * region of address space. Each of the 128 L2 descriptors corresponds + * to a 256KB region of address space. + * + * For 8K pages, the L3 tables contain 32 4-byte descriptors, and are + * thus 128 bytes in size. + * + * 31 25 24 18 17 13 12 0 + * | | | | | + * 11111111111111 22222222222222 3333333333 .......................... + * Root Pointer Page Page + * Index Index Index Offset + * + * For 4K pages, the L3 tables contain 64 4-byte descriptors, and are + * thus 256 bytes in size. + * + * 31 25 24 18 17 12 11 0 + * | | | | | + * 11111111111111 22222222222222 333333333333 ........................ + * Root Pointer Page Page + * Index Index Index Offset + * + * Logical Address Format + */ + +#define LA40_L1_NBITS 7U +#define LA40_L1_SHIFT 25 +#define LA40_L2_NBITS 7U +#define LA40_L2_SHIFT 18 +#define LA40_L3_NBITS (32U - LA40_L1_NBITS - LA40_L2_NBITS - PGSHIFT) +#define LA40_L3_SHIFT PGSHIFT + +#define LA40_L1_COUNT __BIT(LA40_L1_NBITS) +#define LA40_L2_COUNT __BIT(LA40_L2_NBITS) +#define LA40_L3_COUNT __BIT(LA40_L3_NBITS) + +#define LA40_L1_MASK (__BITS(0,(LA40_L1_NBITS - 1)) << LA40_L1_SHIFT) +#define LA40_L2_MASK (__BITS(0,(LA40_L2_NBITS - 1)) << LA40_L2_SHIFT) +#define LA40_L3_MASK (__BITS(0,(LA40_L3_NBITS - 1)) << LA40_L3_SHIFT) + +/* N.B. all tables must be aligned to their size */ +#define TBL40_L1_SIZE (LA40_L1_COUNT * sizeof(uint32_t)) +#define TBL40_L2_SIZE (LA40_L2_COUNT * sizeof(uint32_t)) +#define TBL40_L3_SIZE (LA40_L3_COUNT * sizeof(uint32_t)) + +#define LA40_RI(va) __SHIFTOUT((va), LA40_L1_MASK) /* root index */ +#define LA40_PI(va) __SHIFTOUT((va), LA40_L2_MASK) /* pointer index */ +#define LA40_PGI(va) __SHIFTOUT((va), LA40_L3_MASK) /* page index */ + +#define LA40_TRUNC_L1(va) (((vaddr_t)(va)) & LA40_L1_MASK) +#define LA40_TRUNC_L2(va) (((vaddr_t)(va)) & (LA40_L1_MASK | LA40_L2_MASK)) + +/* + * The PTE format for L1 and L2 tables (Upper Tables). + */ +#define UTE40_PTA __BITS(9,31) /* Pointer Table Address (L1 PTE) */ + /* Page Table Address (L2 PTE) */ +#define UTE40_PGTA __BITS(8 - (13 - PGSHIFT),31) +#define UTE40_U __BIT(3) /* Used (referenced) */ +#define UTE40_W __BIT(2) /* Write Protected */ +#define UTE40_UDT __BITS(0,1) /* Upper Descriptor Type */ + /* 00 or 01 -- Invalid */ + /* 10 or 11 -- Resident */ + +#define UTE40_INVALID __SHIFTIN(0, UTE_UDT) +#define UTE40_RESIDENT __SHIFTIN(2, UTE_UDT) + +/* + * The PTE format for L3 tables. + * + * Some notes: + * + * - PFLUSH variants that specify non-global entries do not invalidate + * global entries. If these PFLUSH variants are not used, then the G + * bit can be used as a software-defined bit. + * + * - The UR bits are "reserved for use by the user", so can be + * used as software-defined bits. + * + * - The U0 and U1 "User Page Attribute" bits should *not* be used + * as software-defined bits; they are reflected on the UPA0 and UPA1 + * CPU signals if an external bus transfer results from the access, + * meaning that they may have system-specific side-effects. + */ +#define PTE40_PGA __BITS(PGSHIFT,31) /* Page Physical Address */ +#define PTE40_UR_x __BIT(12) /* User Reserved (extra avail if 8K) */ +#define PTE40_UR __BIT(11) /* User Reserved */ +#define PTE40_G __BIT(10) /* Global */ +#define PTE40_U1 __BIT(9) /* User Page Attribute 1 */ +#define PTE40_U0 __BIT(8) /* User Page Attribute 0 */ +#define PTE40_S __BIT(7) /* Supervisor Protected */ +#define PTE40_CM __BITS(5,6) /* Cache Mode */ + /* 00 -- write-through */ + /* 01 -- copy-back */ + /* 10 -- non-cacheable, serialized */ + /* 11 -- non-cacheable */ +#define PTE40_M __BIT(4) /* Modified */ +#define PTE40_U __BIT(3) /* Used (referenced) */ +#define PTE40_W __BIT(2) /* Write Protected */ +#define PTE40_PDT __BITS(0,1) /* Page Descriptor Type */ + /* 00 -- Invalid */ + /* 01 or 11 -- Resident */ + /* 10 -- Indirect */ + +#define PTE40_CM_WT __SHIFTIN(0, PTE40_CM) +#define PTE40_CM_CB __SHIFTIN(1, PTE40_CM) +#define PTE40_CM_NC_SER __SHIFTIN(2, PTE40_CM) +#define PTE40_CM_NC __SHIFTIN(3, PTE40_CM) + +#define PTE40_INVALID __SHIFTIN(0, PTE40_PDT) +#define PTE40_RESIDENT __SHIFTIN(1, PTE40_PDT) +#define PTE40_INDIRECT __SHIFTIN(2, PTE40_PDT) + +/* + * MMU registers (and the sections in the 68040 manual that + * describe them). + */ + +/* + * 3.1.1 -- User and Supervisor Root Pointer Registers (32-bit) + * + * URP and SRP contain the physical address of the L1 table for + * user and supervisor space, respectively. Bits 8-0 of the address + * must be 0. + */ + +/* + * 3.1.2 -- Translation Control Register (16-bit) + */ +#define TCR40_E __BIT(15) /* enable translation */ +#define TCR40_P __BIT(14) /* page size: 0=4K 1=8K */ + +/* + * 3.1.3 -- Transparent Translation Registers (32-bit) + * + * There are 2 data translation registers (DTTR0, DTTR1) and 2 + * instruction translation registers (ITTR0, ITTR1). + */ +#define TTR40_LAB __BITS(24,31) /* logical address base */ +#define TTR40_LAM __BITS(16,23) /* logical address mask */ +#define TTR40_E __BIT(15) /* enable TTR */ +#define TTR40_SFIELD __BITS(13,14) /* Supervisor Mode field (see below) */ +#define TTR40_U1 PTE40_U1 +#define TTR40_U0 PTE40_U0 +#define TTR40_CM PTE40_CM +#define TTR40_W PTE40_W + +#define TTR40_USER __SHIFTIN(0, TTR40_SFIELD) +#define TTR40_SUPER __SHIFTIN(1, TTR40_SFIELD) +#define TTR40_BOTH __SHIFTIN(2, TTR40_SFIELD) + +/* + * 3.1.4 -- MMU Status Register + * + * N.B. If 8K pages are in use, bit 12 of the PA field is **undefined**. + */ +#define MMUSR40_PA PTE40_PGA +#define MMUSR40_B __BIT(11) /* bus error */ +#define MMUSR40_G PTE40_G +#define MMUSR40_U1 PTE40_U1 +#define MMUSR40_U0 PTE40_U0 +#define MMUSR40_S PTE40_S +#define MMUSR40_CM PTE40_CM +#define MMUSR40_M PTE40_M +#define MMUSR40_W PTE40_W +#define MMUSR40_T __BIT(1) /* Transparent Translation hit */ +#define MMUSR40_R PTE40_RESIDENT + +#ifdef _KERNEL +/* + * TT register value indices in the mmu_ttregs[] array. Note that asm + * code makes assumptions about these indices, to change them at your + * peril. + */ +extern uint32_t mmu_tt40[]; +#define MMU_TTREG_ITT0 0 /* same order as CPU reg numbers */ +#define MMU_TTREG_ITT1 1 +#define MMU_TTREG_DTT0 2 +#define MMU_TTREG_DTT1 3 +#define MMU_NTTREGS40 + +void mmu_load_urp40(paddr_t); +void mmu_load_urp60(paddr_t); +void mmu_load_tt40(uint32_t *); +#endif /* _KERNEL */ + +#endif /* _M68K_MMU_40_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/m68k-netbsd-none/m68k/mmu_51.h b/lib/libc/include/m68k-netbsd-none/m68k/mmu_51.h @@ -0,0 +1,273 @@ +/* $NetBSD: mmu_51.h,v 1.4 2024/02/08 20:11:56 andvar Exp $ */ + +/*- + * Copyright (c) 1997, 2023 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Jeremy Cooper and by Jason R. Thorpe. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _M68K_MMU_51_H_ +#define _M68K_MMU_51_H_ + +/* + * Translation table structures for the 68851 MMU. + * + * The 68851 MMU (as well as the 68030's built-in MMU) are pretty flexible and + * can use a 1, 2, 3, or 4-level tree structure and a number of page sizes. + * + * The logical address format is defined as: + * + * 31 0 + * | | | | | | | + * SSSSSSSS AAAAAAAAAA BBBBBBBBBB CCCCCCCCCC DDDDDDDDDD PPPPPPPPPPPPPP + * Initial A Index B Index C Index D Index Page Offset + * Shift + * + * The Initial Shift, and number of A, B, C, and D index bits are defined + * in the Translation Control register. Once the MMU encounters a tree + * level where the number of index bits is 0, tree traversal stops. The + * values of IS + TIA + TIB + TIC + TID + page offset must equal 32. For + * example, for a 2-level arrangment using 4KB pages where all 32-bits of + * the address are significant: + * + * IS TIA TIB TIC TID page + * 0 + 10 + 10 + 0 + 0 + 12 == 32 + */ + +/* + * The 68851 has 3 descriptor formats: + * + * Long Table Descriptors (8 byte) + * Short Table Descriptors (4 byte) + * Page Descriptors (4 byte) + * + * These occupy the lower 2 bits of each descriptor and the root pointers. + */ +#define DT51_INVALID 0 +#define DT51_PAGE 1 /* points to a page */ +#define DT51_SHORT 2 /* points to a short entry table */ +#define DT51_LONG 3 /* points to a long entry table */ + +/* + * Long Format Table Descriptor + * + * 63 48 + * +---+---.---.---.---.---.---.---.---.---.---.---.---.---.---.---+ + * |L/U| LIMIT | + * +---+---.---+---.---.---+---+---+---+---+---+---+---+---+---.---+ + * | RAL | WAL |SG | S | 0 | 0 | 0 | 0 | U |WP | DT | + * +---.---.---+---.---.---+---+---+---+---+---+---+---+---+---.---+ + * | TABLE PHYSICAL ADDRESS (BITS 31-16) | + * +---.---.---.---.---.---.---.---.---.---.---.---+---.---.---.---+ + * | TABLE PHYSICAL ADDRESS (15-4) | UNUSED | + * +---.---.---.---.---.---.---.---.---.---.---.---+---.---.---.---+ + * 15 0 + * + * DT is either 2 or 3, depending on what next table descriptor format is. + */ +struct mmu51_ldte { /* 'dte' stands for 'descriptor table entry' */ + uint32_t ldte_attr; + uint32_t ldte_addr; +}; +#define DTE51_ADDR __BITS(4,31) /* table address mask */ +#define DTE51_LOWER __BIT(31) /* L: Index limit is lower limit */ +#define DTE51_LIMIT __BITS(16,30) /* L: Index limit */ +#define DTE51_RAL __BITS(13,15) /* L: Read Access Level */ +#define DTE51_WAL __BITS(10,12) /* L: Write Access Level */ +#define DTE51_SG __BIT(9) /* L: Shared Globally */ +#define DTE51_S __BIT(8) /* L: Supervisor protected */ +#define DTE51_U __BIT(3) /* Used */ +#define DTE51_WP __BIT(2) /* Write Protected */ + +/* + * Short Format Table Descriptor + * + * 31 16 + * +---.---.---.---.---.---.---.---.---.---.---.---.---.---.---.---+ + * | TABLE PHYSICAL BASE ADDRESS (BITS 31-16) | + * +---.---.---.---.---.---.---.---.---.---.---.---+---+---+---.---+ + * | TABLE PHYSICAL BASE ADDRESS (15-4) | U |WP | DT | + * +---.---.---.---.---.---.---.---.---.---.---.---+---+---+---.---+ + * 15 0 + * + * DT is either 2 or 3, depending on what next table descriptor format is. + */ + +/* + * Long Format Page Descriptor (Level A table only) + * + * 63 48 + * +---.---.---.---.---.---.---.---.---.---.---.---.---.---.---.---+ + * | UNUSED | + * +---.---.---+---.---.---+---+---+---+---+---+---+---+---+---.---+ + * | RAL | WAL |SG | S | G |CI | L | M | U |WP |DT (01)| + * +---.---.---+---.---.---+---+---+---+---+---+---+---+---+---.---+ + * | PAGE PHYSICAL ADDRESS (BITS 31-16) | + * +---.---.---.---.---.---.---.---.---.---.---.---.---.---.---.---+ + * | PAGE PHYS. ADDRESS (15-8) | UNUSED | + * +---.---.---.---.---.---.---.---.---.---.---.---.---.---.---.---+ + * 15 0 + * + * N.B. Unused bits of the page address (if the page size is larger + * than 256 bytes) can be used as software-defined PTE bits. + */ +struct mmu51_lpte { /* 'pte' stands for 'page table entry' */ + uint32_t lpte_attr; + uint32_t lpte_addr; +}; +#define PTE51_ADDR __BITS(8,31) /* page address mask */ +#define PTE51_RAL __BITS(13,15) /* L: Read Access Level */ +#define PTE51_WAL __BITS(10,12) /* L: Write Access Level */ +#define PTE51_SG __BIT(9) /* L: Shared Globally */ +#define PTE51_S __BIT(8) /* L: Supervisor protected */ +#define PTE51_G __BIT(7) /* Gate allowed */ +#define PTE51_CI __BIT(6) /* Cache inhibit */ +#define PTE51_L __BIT(5) /* Lock entry */ +#define PTE51_M __BIT(4) /* Modified */ +#define PTE51_U __BIT(3) /* Used */ +#define PTE51_WP __BIT(2) /* Write Protected */ + +/* + * Short Format Page Descriptor + * + * 31 16 + * +---.---.---.---.---.---.---.---.---.---.---.---.---.---.---.---+ + * | PAGE PHYSICAL BASE ADDRESS (BITS 31-16) | + * +---.---.---.---.---.---.---.---+---+---+---+---+---+---+---.---+ + * | PAGE PHYS. BASE ADDRESS (15-8)| G |CI | L | M | U |WP |DT (01)| + * +---.---.---.---.---.---.---.---+---+---+---+---+---+---+---.---+ + * 15 0 + * + * N.B. Unused bits of the page address (if the page size is larger + * than 256 bytes) can be used as software-defined PTE bits. + */ + +/* + * MMU registers (and the sections in the 68851 manual that + * describe them). + */ + +/* + * 5.1.4 -- Root Pointer + * (and also 6.1.1) + * + * This is a 64-bit register. The upper 32 bits contain configuration + * information, and the lower 32 bits contain the A table address. + * Bits 3-0 of the address must be 0. The root pointer is essentially + * a long format table descriptor with only the U/L, limit, and SG bits. + * + * The 68851 has 3 root pointers: + * + * CRP CPU root pointer, for user accesses + * SRP Supervisor root pointer + * DRP DMA root pointer, for IOMMU functionality (not on '030) + * + * Selection of root pointer is as follows: + * + * FC3 FC2 SRE Root pointer used + * 0 0 0 CRP + * 0 0 1 CRP + * 0 1 0 CRP + * 0 1 1 SRP + * 1 x x DRP + */ +struct mmu51_rootptr { + unsigned long rp_attr; /* Lower/Upper Limit and access flags */ + unsigned long rp_addr; /* Physical Base Address */ +}; + +/* + * 6.1.2 -- PMMU Cache Status (PCSR) (16-bit) + */ +#define PCSR51_F __BIT(15) /* Flush(ed) */ +#define PCSR51_LW __BIT(14) /* Lock Warning */ +#define PCSR51_TA __BITS(0,2) /* Task Alias (not '030) */ + +/* + * 6.1.3 -- Translation Control (TCR) (32-bit) + */ +#define TCR51_E __BIT(31) /* Enable translation */ +#define TCR51_SRE __BIT(25) /* Supervisor Root Enable */ +#define TCR51_FCL __BIT(24) /* Function Code Lookup */ +#define TCR51_PS __BITS(20,23) /* Page Size (see below) */ +#define TCR51_IS __BITS(16,19) /* Initial Shift */ +#define TCR51_TIA __BITS(12,15) /* Table A Index bits */ +#define TCR51_TIB __BITS(8,11) /* Table B Index bits */ +#define TCR51_TIC __BITS(4,7) /* Table C Index bits */ +#define TCR51_TID __BITS(0,3) /* Table D Index bits */ + +/* + * Astute readers will note that the value in the PS field is + * log2(PAGE_SIZE). + */ +#define TCR51_PS_256 __SHIFTIN(0x8, TCR51_PS) +#define TCR51_PS_512 __SHIFTIN(0x9, TCR51_PS) +#define TCR51_PS_1K __SHIFTIN(0xa, TCR51_PS) +#define TCR51_PS_2K __SHIFTIN(0xb, TCR51_PS) +#define TCR51_PS_4K __SHIFTIN(0xc, TCR51_PS) +#define TCR51_PS_8K __SHIFTIN(0xd, TCR51_PS) +#define TCR51_PS_16K __SHIFTIN(0xe, TCR51_PS) +#define TCR51_PS_32K __SHIFTIN(0xf, TCR51_PS) + +/* + * 6.1.4 -- Current Access Level (8-bit) + * 6.1.5 -- Validate Access Level + */ +#define CAL51_AL __BITS(5,7) + +/* + * 6.1.6 -- Stack Change Control (8-bit) + */ + +/* + * 6.1.7 -- Access Control (16-bit) + */ +#define AC51_MC __BIT(7) /* Module Control */ +#define AC51_ALC __BITS(4,5) /* Access Level Control */ +#define AC51_MDS __BITS(0,1) /* Module Descriptor Size */ + +/* + * 6.1.8 -- PMMU Status Register (PSR) (16-bit) + */ +#define PSR51_B __BIT(15) /* Bus Error */ +#define PSR51_L __BIT(14) /* Limit Violation */ +#define PSR51_S __BIT(13) /* Supervisor Violation */ +#define PSR51_A __BIT(12) /* Access Level Violation */ +#define PSR51_W __BIT(11) /* Write Protected */ +#define PSR51_I __BIT(10) /* Invalid */ +#define PSR51_M __BIT(9) /* Modified */ +#define PSR51_G __BIT(8) /* Gate */ +#define PSR51_C __BIT(7) /* Globally Shareable */ +#define PSR51_N __BITS(0,2) /* Number of levels */ + +#ifdef _KERNEL +extern unsigned int protorp[2]; + +void mmu_load_urp51(paddr_t); +void mmu_load_urp20hp(paddr_t); /* for convenience */ +#endif /* _KERNEL */ + +#endif /* _M68K_MMU_51_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/m68k-netbsd-none/m68k/mutex.h b/lib/libc/include/m68k-netbsd-none/m68k/mutex.h @@ -1,4 +1,4 @@ -/* $NetBSD: mutex.h,v 1.11.4.1 2023/08/09 17:42:01 martin Exp $ */ +/* $NetBSD: mutex.h,v 1.13 2023/07/12 12:50:12 riastradh Exp $ */ /*- * Copyright (c) 2002, 2007 The NetBSD Foundation, Inc. diff --git a/lib/libc/include/m68k-netbsd-none/m68k/pcb.h b/lib/libc/include/m68k-netbsd-none/m68k/pcb.h @@ -1,4 +1,4 @@ -/* $NetBSD: pcb.h,v 1.10 2011/02/08 20:20:16 rmind Exp $ */ +/* $NetBSD: pcb.h,v 1.11 2023/09/26 14:33:55 tsutsui Exp $ */ /* * Copyright (c) 1988 University of Utah. @@ -49,7 +49,7 @@ */ struct pcb { short pcb_flags; /* misc. process flags */ - short pcb_ps; /* processor status word */ + short pcb_ps; /* processor status word */ int __pcb_spare0; int pcb_usp; /* user stack pointer */ int pcb_regs[12]; /* D2-D7, A2-A7 */ diff --git a/lib/libc/include/m68k-netbsd-none/m68k/pmap_motorola.h b/lib/libc/include/m68k-netbsd-none/m68k/pmap_motorola.h @@ -1,6 +1,6 @@ -/* $NetBSD: pmap_motorola.h,v 1.37 2021/09/19 10:34:09 andvar Exp $ */ +/* $NetBSD: pmap_motorola.h,v 1.43 2023/12/31 21:59:24 thorpej Exp $ */ -/* +/* * Copyright (c) 1991, 1993 * The Regents of the University of California. All rights reserved. * @@ -35,7 +35,7 @@ * @(#)pmap.h 8.1 (Berkeley) 6/10/93 */ -/* +/* * Copyright (c) 1987 Carnegie-Mellon University * * This code is derived from software contributed to Berkeley by @@ -98,6 +98,21 @@ struct pmap { }; /* + * Root Pointer attributes for Supervisor and User modes. + * + * Supervisor: + * - No index limit (Lower limit == 0) + * - Points to Short format descriptor table. + * - Shared Globally + * + * User: + * - No index limit (Lower limit == 0) + * - Points to Short format descriptor table. + */ +#define MMU51_SRP_BITS (DTE51_LOWER | DTE51_SG | DT51_SHORT) +#define MMU51_CRP_BITS (DTE51_LOWER | DT51_SHORT) + +/* * MMU specific segment values * * We are using following segment layout in m68k pmap_motorola.c: @@ -108,7 +123,7 @@ struct pmap { * * 68020/030 l2 size is chosen per NPTEPG, a number of page table entries * per page, to use one whole page for PTEs per one segment table entry, - * and maybe also because 68020 HP MMU machines use simlar structures. + * and maybe also because 68020 HP MMU machines use similar structures. * * 68040/060 layout is defined by hardware design and not configurable, * as defined in <m68k/pte_motorola.h>. @@ -122,12 +137,19 @@ struct pmap { * so they have different values between 020/030 and 040/060. */ /* 8KB / 4KB */ -#define TIB_SHIFT (PG_SHIFT - 2) /* 11 / 10 */ +#define TIB_SHIFT (PGSHIFT - 2) /* 11 / 10 */ #define TIB_SIZE (1U << TIB_SHIFT) /* 2048 / 1024 */ -#define TIA_SHIFT (32 - TIB_SHIFT - PG_SHIFT) /* 8 / 10 */ +#define TIA_SHIFT (32 - TIB_SHIFT - PGSHIFT) /* 8 / 10 */ #define TIA_SIZE (1U << TIA_SHIFT) /* 256 / 1024 */ -#define SEGSHIFT (TIB_SHIFT + PG_SHIFT) /* 24 / 22 */ +#define MMU51_TCR_BITS (TCR51_E | TCR51_SRE | \ + __SHIFTIN(PGSHIFT, TCR51_PS) | \ + __SHIFTIN(TIA_SHIFT, TCR51_TIA) | \ + __SHIFTIN(TIB_SHIFT, TCR51_TIB)) +#define MMU40_TCR_BITS (TCR40_E | \ + __SHIFTIN(PGSHIFT - 12, TCR40_P)) + +#define SEGSHIFT (TIB_SHIFT + PGSHIFT) /* 24 / 22 */ #define NBSEG30 (1U << SEGSHIFT) #define NBSEG40 (1U << SG4_SHIFT2) @@ -142,7 +164,7 @@ struct pmap { #define NBSEG ((mmutype == MMU_68040) ? NBSEG40 : NBSEG30) #endif -#define SEGOFSET (NBSEG - 1) /* byte offset into segment */ +#define SEGOFSET (NBSEG - 1) /* byte offset into segment */ #define m68k_round_seg(x) ((((vaddr_t)(x)) + SEGOFSET) & ~SEGOFSET) #define m68k_trunc_seg(x) ((vaddr_t)(x) & ~SEGOFSET) @@ -171,15 +193,6 @@ struct pmap { #define bmtol2(n) (ffs(n) - 1) /* - * Macros for speed - */ -#define PMAP_ACTIVATE(pmap, loadhw) \ -{ \ - if ((loadhw)) \ - loadustp(m68k_btop((paddr_t)(pmap)->pm_stpa)); \ -} - -/* * For each struct vm_page, there is a list of all currently valid virtual * mappings of that page. An entry is a pv_entry, the list is pv_table. */ @@ -191,12 +204,6 @@ struct pv_entry { struct pmap *pv_ptpmap; /* if pv_ptste, pmap for PT page */ }; -#define active_pmap(pm) \ - ((pm) == pmap_kernel() || (pm) == curproc->p_vmspace->vm_map.pmap) -#define active_user_pmap(pm) \ - (curproc && \ - (pm) != pmap_kernel() && (pm) == curproc->p_vmspace->vm_map.pmap) - extern struct pv_header *pv_table; /* array of entries, one per page */ #define pmap_resident_count(pmap) ((pmap)->pm_stats.resident_count) @@ -247,4 +254,6 @@ void _pmap_set_page_cacheable(struct pmap *, vaddr_t); void _pmap_set_page_cacheinhibit(struct pmap *, vaddr_t); int _pmap_page_is_cacheable(struct pmap *, vaddr_t); +paddr_t vtophys(vaddr_t va); + #endif /* !_M68K_PMAP_MOTOROLA_H_ */ \ No newline at end of file diff --git a/lib/libc/include/m68k-netbsd-none/m68k/psl.h b/lib/libc/include/m68k-netbsd-none/m68k/psl.h @@ -1,4 +1,4 @@ -/* $NetBSD: psl.h,v 1.15 2012/07/27 05:36:11 matt Exp $ */ +/* $NetBSD: psl.h,v 1.19 2024/01/16 05:29:44 thorpej Exp $ */ /* * Copyright (c) 1982, 1986, 1993 @@ -65,6 +65,9 @@ #define PSL_USERSET (0) #define PSL_USERCLR (PSL_S | PSL_IPL7 | PSL_MBZ) +#define PSLTOIPL(x) (((x) >> 8) & 0x7) +#define IPLTOPSL(x) ((((x) & 0x7) << 8) | PSL_S) + #define USERMODE(ps) (((ps) & PSL_S) == 0) #if defined(_KERNEL) && !defined(_LOCORE) @@ -75,26 +78,42 @@ * spl functions; platform-specific code must define spl0 and splx(). */ -static __inline int +static inline int +getsr(void) +{ + int sr; + + __asm volatile("clrl %0; movew %%sr,%0" : "=&d" (sr)); + + return sr; +} + +static inline int _spl(int s) { int sr; - __asm volatile ("movew %%sr,%0; movew %1,%%sr" : + __asm volatile ("clrl %0; movew %%sr,%0; movew %1,%%sr" : "=&d" (sr) : "di" (s) : "memory"); return sr; } -static __inline int +static inline void +_splx(int s) +{ + __asm volatile("movew %0,%%sr" : : "di" (s) : "memory"); +} + +static inline int _splraise(int level) { int sr; - __asm volatile("movw %%sr,%0" : "=d" (sr)); + __asm volatile("clrl %0; movew %%sr,%0" : "=&d" (sr)); - if ((u_int16_t)level >= PSL_HIGHIPL || (u_int16_t)level > (u_int16_t)sr) - __asm volatile("movw %0,%%sr" :: "di" (level) : "memory"); + if ((uint16_t)level >= PSL_HIGHIPL || (uint16_t)level > (uint16_t)sr) + __asm volatile("movew %0,%%sr" : : "di" (level) : "memory"); return sr; } diff --git a/lib/libc/include/m68k-netbsd-none/m68k/pte_motorola.h b/lib/libc/include/m68k-netbsd-none/m68k/pte_motorola.h @@ -1,4 +1,4 @@ -/* $NetBSD: pte_motorola.h,v 1.8.86.1 2024/06/27 19:27:28 martin Exp $ */ +/* $NetBSD: pte_motorola.h,v 1.10 2024/01/01 22:47:58 thorpej Exp $ */ /* * Copyright (c) 1988 University of Utah. @@ -41,6 +41,9 @@ #ifndef _MACHINE_PTE_H_ #define _MACHINE_PTE_H_ +#include <m68k/mmu_51.h> +#include <m68k/mmu_40.h> + /* * m68k motorola MMU segment/page table entries */ @@ -53,12 +56,16 @@ typedef u_int pt_entry_t; /* page table entry */ #define PG_SHIFT PGSHIFT -#define SG_V 0x00000002 /* segment is valid */ -#define SG_NV 0x00000000 -#define SG_PROT 0x00000004 /* access protection mask */ -#define SG_RO 0x00000004 +/* + * "Segment" Table Entry bits, defined in terms of the 68851 bits + * (compatible 68040 bits noted in comments). + */ +#define SG_V DT51_SHORT /* == UTE40_RESIDENT */ +#define SG_NV DT51_INVALID /* == UTE40_INVALID */ +#define SG_RO DTE51_WP /* == UTE40_W */ #define SG_RW 0x00000000 -#define SG_U 0x00000008 /* modified bit (68040) */ +#define SG_PROT DTE51_WP +#define SG_U DTE51_U /* == UTE40_U */ #define SG_FRAME ((~0U) << PG_SHIFT) #define SG_ISHIFT ((PG_SHIFT << 1) - 2) /* 24 or 22 */ #define SG_IMASK ((~0U) << SG_ISHIFT) @@ -66,9 +73,9 @@ typedef u_int pt_entry_t; /* page table entry */ #define SG_PMASK (((~0U) << SG_PSHIFT) & ~SG_IMASK) /* 68040 additions */ -#define SG4_MASK1 0xfe000000 +#define SG4_MASK1 0xfe000000U #define SG4_SHIFT1 25 -#define SG4_MASK2 0x01fc0000 +#define SG4_MASK2 0x01fc0000U #define SG4_SHIFT2 18 #define SG4_MASK3 (((~0U) << PG_SHIFT) & ~(SG4_MASK1 | SG4_MASK2)) #define SG4_SHIFT3 PG_SHIFT @@ -76,32 +83,36 @@ typedef u_int pt_entry_t; /* page table entry */ #define SG4_ADDR2 ((~0U) << (20 - PG_SHIFT)) #define SG4_LEV1SIZE 128 #define SG4_LEV2SIZE 128 -#define SG4_LEV3SIZE (1 << (SG4_SHIFT2 - PG_SHIFT)) /* 64 or 32 */ +#define SG4_LEV3SIZE (1U << (SG4_SHIFT2 - PG_SHIFT)) /* 64 or 32 */ -#define PG_V 0x00000001 -#define PG_NV 0x00000000 -#define PG_PROT 0x00000004 -#define PG_U 0x00000008 -#define PG_M 0x00000010 -#define PG_W 0x00000100 -#define PG_RO 0x00000004 +/* + * Page Table Entry bits, defined in terms of the 68851 bits + * (compatible 68040 bits noted in comments). + */ +#define PG_V DT51_PAGE /* == PTE40_RESIDENT */ +#define PG_NV DT51_INVALID /* == PTE40_INVALID */ +#define PG_RO PTE51_WP /* == PTE40_W */ #define PG_RW 0x00000000 +#define PG_PROT PG_RO +#define PG_U PTE51_U /* == PTE40_U */ +#define PG_M PTE51_M /* == PTE40_M */ +#define PG_CI PTE51_CI +#define PG_W __BIT(8) /* 851 unused bit XXX040 PTE40_U0 */ #define PG_FRAME ((~0U) << PG_SHIFT) -#define PG_CI 0x00000040 -#define PG_PFNUM(x) (((x) & PG_FRAME) >> PG_SHIFT) +#define PG_PFNUM(x) (((uintptr_t)(x) & PG_FRAME) >> PG_SHIFT) /* 68040 additions */ -#define PG_CMASK 0x00000060 /* cache mode mask */ -#define PG_CWT 0x00000000 /* writethrough caching */ -#define PG_CCB 0x00000020 /* copyback caching */ -#define PG_CIS 0x00000040 /* cache inhibited serialized */ -#define PG_CIN 0x00000060 /* cache inhibited nonserialized */ -#define PG_SO 0x00000080 /* supervisor only */ +#define PG_CMASK PTE40_CM /* cache mode mask */ +#define PG_CWT PTE40_CM_WT /* writethrough caching */ +#define PG_CCB PTE40_CM_CB /* copyback caching */ +#define PG_CIS PTE40_CM_NC_SER /* cache inhibited serialized */ +#define PG_CIN PTE40_CM_NC /* cache inhibited nonserialized */ +#define PG_SO PTE40_S /* supervisor only */ #define M68K_STSIZE (MAXUL2SIZE * SG4_LEV2SIZE * sizeof(st_entry_t)) /* user process segment table size */ -#define M68K_MAX_PTSIZE (1 << (32 - PG_SHIFT + 2)) /* max size of UPT */ -#define M68K_MAX_KPTSIZE (M68K_MAX_PTSIZE >> 2) /* max memory to allocate to KPT */ +#define M68K_MAX_PTSIZE (1U << (32 - PG_SHIFT + 2)) /* max size of UPT */ +#define M68K_MAX_KPTSIZE (M68K_MAX_PTSIZE >> 2) /* max memory to allocate to KPT */ #define M68K_PTBASE 0x10000000 /* UPT map base address */ #define M68K_PTMAXSIZE 0x70000000 /* UPT map maximum size */ diff --git a/lib/libc/include/m68k-netbsd-none/m68k/trap.h b/lib/libc/include/m68k-netbsd-none/m68k/trap.h @@ -1,4 +1,4 @@ -/* $NetBSD: trap.h,v 1.11 2011/02/08 20:20:16 rmind Exp $ */ +/* $NetBSD: trap.h,v 1.12 2024/10/16 06:54:55 isaki Exp $ */ /* * Copyright (c) 1988 University of Utah. @@ -53,12 +53,12 @@ #define T_MMUFLT 8 #define T_SSIR 9 #define T_FMTERR 10 -#define T_FPERR 11 -#define T_COPERR 12 -#define T_ASTFLT 13 -#define T_TRAP15 15 +#define T_FPERR 11 +#define T_COPERR 12 +#define T_ASTFLT 13 +#define T_TRAP15 15 #define T_BREAKPOINT T_TRAP15 -#define T_FPEMULI 16 -#define T_FPEMULD 17 +#define T_FPEMULI 16 +#define T_FPEMULD 17 #define T_USER 0x80 /* user-mode flag or'ed with type */ \ No newline at end of file diff --git a/lib/libc/include/m68k-netbsd-none/mac68k/cpu.h b/lib/libc/include/m68k-netbsd-none/mac68k/cpu.h @@ -1,4 +1,4 @@ -/* $NetBSD: cpu.h,v 1.102 2019/11/23 19:40:35 ad Exp $ */ +/* $NetBSD: cpu.h,v 1.107 2024/02/28 13:05:40 thorpej Exp $ */ /* * Copyright (c) 1988 University of Utah. @@ -69,59 +69,6 @@ */ #include <m68k/cpu.h> -#if defined(_KERNEL) -/* - * Exported definitions unique to mac68k/68k cpu support. - */ -#define M68K_MMU_MOTOROLA - -/* - * Get interrupt glue. - */ -#include <machine/intr.h> - -/* - * Arguments to hardclock and gatherstats encapsulate the previous - * machine state in an opaque clockframe. On the mac68k, we use - * what the hardware pushes on an interrupt (frame format 0). - */ -struct clockframe { - u_short sr; /* sr at time of interrupt */ - u_long pc; /* pc at time of interrupt */ - u_short vo; /* vector offset (4-word frame) */ -} __attribute__((packed)); - -#define CLKF_USERMODE(framep) (((framep)->sr & PSL_S) == 0) -#define CLKF_PC(framep) ((framep)->pc) -#define CLKF_INTR(framep) (0) /* XXX should use PSL_M (see hp300) */ - -/* - * Preempt the current process if in interrupt from user mode, - * or after the current trap/syscall if in system mode. - */ -#define cpu_need_resched(ci,l,flags) do { \ - __USE(flags); \ - aston(); \ -} while (/*CONSTCOND*/0) - -/* - * Give a profiling tick to the current process from the softclock - * interrupt. Request an ast to send us through trap(), - * marking the proc as needing a profiling tick. - */ -#define cpu_need_proftick(l) ( (l)->l_pflag |= LP_OWEUPC, aston() ) - -/* - * Notify the current process (p) that it has a signal pending, - * process as soon as possible. - */ -#define cpu_signotify(l) aston() - -extern int astpending; /* need to trap before returning to user mode */ -#define aston() (astpending++) - -#endif /* _KERNEL */ - /* values for machineid -- * These are equivalent to the MacOS Gestalt values. */ #define MACH_MACII 6 @@ -287,9 +234,6 @@ void mac68k_set_bell_callback(int (*)(void *, int, int, int), void *); int mac68k_ring_bell(int, int, int); u_int get_mapping(void); -/* locore.s functions */ -void loadustp(int); - /* fpu.c */ void initfpu(void); diff --git a/lib/libc/include/m68k-netbsd-none/mac68k/intr.h b/lib/libc/include/m68k-netbsd-none/mac68k/intr.h @@ -1,4 +1,4 @@ -/* $NetBSD: intr.h,v 1.31.112.1 2023/08/09 17:42:03 martin Exp $ */ +/* $NetBSD: intr.h,v 1.33 2024/02/28 13:05:40 thorpej Exp $ */ /* * Copyright (C) 1997 Scott Reynolds @@ -90,10 +90,11 @@ splraiseipl(ipl_cookie_t icookie) #include <sys/spl.h> /* intr.c */ +struct clockframe; void intr_init(void); void intr_establish(int (*)(void *), void *, int); void intr_disestablish(int); -void intr_dispatch(int); +void intr_dispatch(struct clockframe); /* locore.s */ int spl0(void); diff --git a/lib/libc/include/m68k-netbsd-none/mac68k/lwp_private.h b/lib/libc/include/m68k-netbsd-none/mac68k/lwp_private.h @@ -0,0 +1,3 @@ +/* $NetBSD: lwp_private.h,v 1.1 2024/11/30 01:04:11 christos Exp $ */ + +#include <m68k/lwp_private.h> +\ No newline at end of file diff --git a/lib/libc/include/m68k-netbsd-none/mac68k/pmap.h b/lib/libc/include/m68k-netbsd-none/mac68k/pmap.h @@ -1,3 +1,21 @@ -/* $NetBSD: pmap.h,v 1.37 2002/11/03 19:56:30 chs Exp $ */ +/* $NetBSD: pmap.h,v 1.38 2023/12/27 19:26:29 thorpej Exp $ */ -#include <m68k/pmap_motorola.h> -\ No newline at end of file +#ifndef _MAC68K_PMAP_H_ +#define _MAC68K_PMAP_H_ + +#include <m68k/pmap_motorola.h> +#include <m68k/mmu_30.h> + +/* + * Tranparent translation register used in locore.s:get_pte(). + * User Data set up for R/W access of the entire address space. + * + * (XXX TT30_RW isn't actually needed because of TT30_RWM, but + * this the value historically used.) + */ +#define MAC68K_TT_GET_PTE (0x00000000 | \ + __SHIFTIN(0xff,TT30_LAM) | \ + TT30_E | TT30_CI | TT30_RW | TT30_RWM |\ + TT30_USERD) + +#endif /* _MAC68K_PMAP_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/m68k-netbsd-none/mac68k/z8530var.h b/lib/libc/include/m68k-netbsd-none/mac68k/z8530var.h @@ -1,4 +1,4 @@ -/* $NetBSD: z8530var.h,v 1.13 2008/03/29 19:15:34 tsutsui Exp $ */ +/* $NetBSD: z8530var.h,v 1.14 2025/04/25 21:06:41 andvar Exp $ */ /* * Copyright (c) 1992, 1993 @@ -98,7 +98,7 @@ struct zsclksrc { child. The other bits tell zsloadchannelregs if it should call an md signal source changing routine. ZSC_VARIABLE says if - an ioctl should be able to cahnge the + an ioctl should be able to change the clock rate.*/ }; #define ZSC_PCLK 0x01 diff --git a/lib/libc/include/m68k-netbsd-none/machine/cpu.h b/lib/libc/include/m68k-netbsd-none/machine/cpu.h @@ -1,4 +1,4 @@ -/* $NetBSD: cpu.h,v 1.102 2019/11/23 19:40:35 ad Exp $ */ +/* $NetBSD: cpu.h,v 1.107 2024/02/28 13:05:40 thorpej Exp $ */ /* * Copyright (c) 1988 University of Utah. @@ -69,59 +69,6 @@ */ #include <m68k/cpu.h> -#if defined(_KERNEL) -/* - * Exported definitions unique to mac68k/68k cpu support. - */ -#define M68K_MMU_MOTOROLA - -/* - * Get interrupt glue. - */ -#include <machine/intr.h> - -/* - * Arguments to hardclock and gatherstats encapsulate the previous - * machine state in an opaque clockframe. On the mac68k, we use - * what the hardware pushes on an interrupt (frame format 0). - */ -struct clockframe { - u_short sr; /* sr at time of interrupt */ - u_long pc; /* pc at time of interrupt */ - u_short vo; /* vector offset (4-word frame) */ -} __attribute__((packed)); - -#define CLKF_USERMODE(framep) (((framep)->sr & PSL_S) == 0) -#define CLKF_PC(framep) ((framep)->pc) -#define CLKF_INTR(framep) (0) /* XXX should use PSL_M (see hp300) */ - -/* - * Preempt the current process if in interrupt from user mode, - * or after the current trap/syscall if in system mode. - */ -#define cpu_need_resched(ci,l,flags) do { \ - __USE(flags); \ - aston(); \ -} while (/*CONSTCOND*/0) - -/* - * Give a profiling tick to the current process from the softclock - * interrupt. Request an ast to send us through trap(), - * marking the proc as needing a profiling tick. - */ -#define cpu_need_proftick(l) ( (l)->l_pflag |= LP_OWEUPC, aston() ) - -/* - * Notify the current process (p) that it has a signal pending, - * process as soon as possible. - */ -#define cpu_signotify(l) aston() - -extern int astpending; /* need to trap before returning to user mode */ -#define aston() (astpending++) - -#endif /* _KERNEL */ - /* values for machineid -- * These are equivalent to the MacOS Gestalt values. */ #define MACH_MACII 6 @@ -287,9 +234,6 @@ void mac68k_set_bell_callback(int (*)(void *, int, int, int), void *); int mac68k_ring_bell(int, int, int); u_int get_mapping(void); -/* locore.s functions */ -void loadustp(int); - /* fpu.c */ void initfpu(void); diff --git a/lib/libc/include/m68k-netbsd-none/machine/intr.h b/lib/libc/include/m68k-netbsd-none/machine/intr.h @@ -1,4 +1,4 @@ -/* $NetBSD: intr.h,v 1.31.112.1 2023/08/09 17:42:03 martin Exp $ */ +/* $NetBSD: intr.h,v 1.33 2024/02/28 13:05:40 thorpej Exp $ */ /* * Copyright (C) 1997 Scott Reynolds @@ -90,10 +90,11 @@ splraiseipl(ipl_cookie_t icookie) #include <sys/spl.h> /* intr.c */ +struct clockframe; void intr_init(void); void intr_establish(int (*)(void *), void *, int); void intr_disestablish(int); -void intr_dispatch(int); +void intr_dispatch(struct clockframe); /* locore.s */ int spl0(void); diff --git a/lib/libc/include/m68k-netbsd-none/machine/lwp_private.h b/lib/libc/include/m68k-netbsd-none/machine/lwp_private.h @@ -0,0 +1,3 @@ +/* $NetBSD: lwp_private.h,v 1.1 2024/11/30 01:04:11 christos Exp $ */ + +#include <m68k/lwp_private.h> +\ No newline at end of file diff --git a/lib/libc/include/m68k-netbsd-none/machine/pmap.h b/lib/libc/include/m68k-netbsd-none/machine/pmap.h @@ -1,3 +1,21 @@ -/* $NetBSD: pmap.h,v 1.37 2002/11/03 19:56:30 chs Exp $ */ +/* $NetBSD: pmap.h,v 1.38 2023/12/27 19:26:29 thorpej Exp $ */ -#include <m68k/pmap_motorola.h> -\ No newline at end of file +#ifndef _MAC68K_PMAP_H_ +#define _MAC68K_PMAP_H_ + +#include <m68k/pmap_motorola.h> +#include <m68k/mmu_30.h> + +/* + * Tranparent translation register used in locore.s:get_pte(). + * User Data set up for R/W access of the entire address space. + * + * (XXX TT30_RW isn't actually needed because of TT30_RWM, but + * this the value historically used.) + */ +#define MAC68K_TT_GET_PTE (0x00000000 | \ + __SHIFTIN(0xff,TT30_LAM) | \ + TT30_E | TT30_CI | TT30_RW | TT30_RWM |\ + TT30_USERD) + +#endif /* _MAC68K_PMAP_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/m68k-netbsd-none/machine/z8530var.h b/lib/libc/include/m68k-netbsd-none/machine/z8530var.h @@ -1,4 +1,4 @@ -/* $NetBSD: z8530var.h,v 1.13 2008/03/29 19:15:34 tsutsui Exp $ */ +/* $NetBSD: z8530var.h,v 1.14 2025/04/25 21:06:41 andvar Exp $ */ /* * Copyright (c) 1992, 1993 @@ -98,7 +98,7 @@ struct zsclksrc { child. The other bits tell zsloadchannelregs if it should call an md signal source changing routine. ZSC_VARIABLE says if - an ioctl should be able to cahnge the + an ioctl should be able to change the clock rate.*/ }; #define ZSC_PCLK 0x01 diff --git a/lib/libc/include/mips-netbsd-eabi/machine/lwp_private.h b/lib/libc/include/mips-netbsd-eabi/machine/lwp_private.h @@ -0,0 +1,3 @@ +/* $NetBSD: lwp_private.h,v 1.1 2024/11/30 01:04:08 christos Exp $ */ + +#include <mips/lwp_private.h> +\ No newline at end of file diff --git a/lib/libc/include/mips-netbsd-eabi/machine/psl.h b/lib/libc/include/mips-netbsd-eabi/machine/psl.h @@ -1,3 +0,0 @@ -/* $NetBSD: psl.h,v 1.1 2002/03/07 14:44:01 simonb Exp $ */ - -#include <mips/psl.h> -\ No newline at end of file diff --git a/lib/libc/include/mips-netbsd-eabi/machine/reloc.h b/lib/libc/include/mips-netbsd-eabi/machine/reloc.h @@ -1,3 +0,0 @@ -/* $NetBSD: reloc.h,v 1.1 2002/03/07 14:44:02 simonb Exp $ */ - -#include <mips/reloc.h> -\ No newline at end of file diff --git a/lib/libc/include/mips-netbsd-eabi/machine/sljit_machdep.h b/lib/libc/include/mips-netbsd-eabi/machine/sljit_machdep.h @@ -1,3 +0,0 @@ -/* $NetBSD: sljit_machdep.h,v 1.1 2014/07/23 18:19:43 alnsn Exp $ */ - -#include <mips/sljit_machdep.h> -\ No newline at end of file diff --git a/lib/libc/include/mips-netbsd-eabi/machine/trap.h b/lib/libc/include/mips-netbsd-eabi/machine/trap.h @@ -1,3 +0,0 @@ -/* $NetBSD: trap.h,v 1.1 2002/03/07 14:44:02 simonb Exp $ */ - -#include <mips/trap.h> -\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/evbppc/ansi.h b/lib/libc/include/powerpc-netbsd-eabi/evbppc/ansi.h diff --git a/lib/libc/include/generic-netbsd/evbppc/aout_machdep.h b/lib/libc/include/powerpc-netbsd-eabi/evbppc/aout_machdep.h diff --git a/lib/libc/include/generic-netbsd/evbppc/asm.h b/lib/libc/include/powerpc-netbsd-eabi/evbppc/asm.h diff --git a/lib/libc/include/generic-netbsd/evbppc/bswap.h b/lib/libc/include/powerpc-netbsd-eabi/evbppc/bswap.h diff --git a/lib/libc/include/generic-netbsd/evbppc/cdefs.h b/lib/libc/include/powerpc-netbsd-eabi/evbppc/cdefs.h diff --git a/lib/libc/include/generic-netbsd/evbppc/cpu.h b/lib/libc/include/powerpc-netbsd-eabi/evbppc/cpu.h diff --git a/lib/libc/include/generic-netbsd/evbppc/disklabel.h b/lib/libc/include/powerpc-netbsd-eabi/evbppc/disklabel.h diff --git a/lib/libc/include/generic-netbsd/evbppc/elf_machdep.h b/lib/libc/include/powerpc-netbsd-eabi/evbppc/elf_machdep.h diff --git a/lib/libc/include/generic-netbsd/evbppc/endian.h b/lib/libc/include/powerpc-netbsd-eabi/evbppc/endian.h diff --git a/lib/libc/include/generic-netbsd/evbppc/endian_machdep.h b/lib/libc/include/powerpc-netbsd-eabi/evbppc/endian_machdep.h diff --git a/lib/libc/include/generic-netbsd/evbppc/fenv.h b/lib/libc/include/powerpc-netbsd-eabi/evbppc/fenv.h diff --git a/lib/libc/include/generic-netbsd/evbppc/float.h b/lib/libc/include/powerpc-netbsd-eabi/evbppc/float.h diff --git a/lib/libc/include/generic-netbsd/evbppc/fpu.h b/lib/libc/include/powerpc-netbsd-eabi/evbppc/fpu.h diff --git a/lib/libc/include/generic-netbsd/evbppc/frame.h b/lib/libc/include/powerpc-netbsd-eabi/evbppc/frame.h diff --git a/lib/libc/include/generic-netbsd/evbppc/ieee.h b/lib/libc/include/powerpc-netbsd-eabi/evbppc/ieee.h diff --git a/lib/libc/include/generic-netbsd/evbppc/ieeefp.h b/lib/libc/include/powerpc-netbsd-eabi/evbppc/ieeefp.h diff --git a/lib/libc/include/generic-netbsd/evbppc/int_const.h b/lib/libc/include/powerpc-netbsd-eabi/evbppc/int_const.h diff --git a/lib/libc/include/generic-netbsd/evbppc/int_fmtio.h b/lib/libc/include/powerpc-netbsd-eabi/evbppc/int_fmtio.h diff --git a/lib/libc/include/generic-netbsd/evbppc/int_limits.h b/lib/libc/include/powerpc-netbsd-eabi/evbppc/int_limits.h diff --git a/lib/libc/include/generic-netbsd/evbppc/int_mwgwtypes.h b/lib/libc/include/powerpc-netbsd-eabi/evbppc/int_mwgwtypes.h diff --git a/lib/libc/include/generic-netbsd/evbppc/int_types.h b/lib/libc/include/powerpc-netbsd-eabi/evbppc/int_types.h diff --git a/lib/libc/include/generic-netbsd/evbppc/intr.h b/lib/libc/include/powerpc-netbsd-eabi/evbppc/intr.h diff --git a/lib/libc/include/generic-netbsd/evbppc/kcore.h b/lib/libc/include/powerpc-netbsd-eabi/evbppc/kcore.h diff --git a/lib/libc/include/generic-netbsd/evbppc/limits.h b/lib/libc/include/powerpc-netbsd-eabi/evbppc/limits.h diff --git a/lib/libc/include/generic-netbsd/evbppc/lock.h b/lib/libc/include/powerpc-netbsd-eabi/evbppc/lock.h diff --git a/lib/libc/include/powerpc-netbsd-eabi/evbppc/lwp_private.h b/lib/libc/include/powerpc-netbsd-eabi/evbppc/lwp_private.h @@ -0,0 +1,3 @@ +/* $NetBSD: lwp_private.h,v 1.1 2024/11/30 01:04:08 christos Exp $ */ + +#include <powerpc/lwp_private.h> +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/evbppc/math.h b/lib/libc/include/powerpc-netbsd-eabi/evbppc/math.h diff --git a/lib/libc/include/generic-netbsd/evbppc/mcontext.h b/lib/libc/include/powerpc-netbsd-eabi/evbppc/mcontext.h diff --git a/lib/libc/include/generic-netbsd/evbppc/mutex.h b/lib/libc/include/powerpc-netbsd-eabi/evbppc/mutex.h diff --git a/lib/libc/include/generic-netbsd/evbppc/param.h b/lib/libc/include/powerpc-netbsd-eabi/evbppc/param.h diff --git a/lib/libc/include/generic-netbsd/evbppc/pcb.h b/lib/libc/include/powerpc-netbsd-eabi/evbppc/pcb.h diff --git a/lib/libc/include/generic-netbsd/evbppc/pmap.h b/lib/libc/include/powerpc-netbsd-eabi/evbppc/pmap.h diff --git a/lib/libc/include/generic-netbsd/evbppc/proc.h b/lib/libc/include/powerpc-netbsd-eabi/evbppc/proc.h diff --git a/lib/libc/include/generic-netbsd/evbppc/profile.h b/lib/libc/include/powerpc-netbsd-eabi/evbppc/profile.h diff --git a/lib/libc/include/generic-netbsd/evbppc/psl.h b/lib/libc/include/powerpc-netbsd-eabi/evbppc/psl.h diff --git a/lib/libc/include/generic-netbsd/evbppc/pte.h b/lib/libc/include/powerpc-netbsd-eabi/evbppc/pte.h diff --git a/lib/libc/include/generic-netbsd/evbppc/ptrace.h b/lib/libc/include/powerpc-netbsd-eabi/evbppc/ptrace.h diff --git a/lib/libc/include/generic-netbsd/evbppc/reg.h b/lib/libc/include/powerpc-netbsd-eabi/evbppc/reg.h diff --git a/lib/libc/include/generic-netbsd/evbppc/reloc.h b/lib/libc/include/powerpc-netbsd-eabi/evbppc/reloc.h diff --git a/lib/libc/include/generic-netbsd/evbppc/rwlock.h b/lib/libc/include/powerpc-netbsd-eabi/evbppc/rwlock.h diff --git a/lib/libc/include/generic-netbsd/evbppc/setjmp.h b/lib/libc/include/powerpc-netbsd-eabi/evbppc/setjmp.h diff --git a/lib/libc/include/generic-netbsd/evbppc/signal.h b/lib/libc/include/powerpc-netbsd-eabi/evbppc/signal.h diff --git a/lib/libc/include/generic-netbsd/evbppc/sljit_machdep.h b/lib/libc/include/powerpc-netbsd-eabi/evbppc/sljit_machdep.h diff --git a/lib/libc/include/generic-netbsd/evbppc/trap.h b/lib/libc/include/powerpc-netbsd-eabi/evbppc/trap.h diff --git a/lib/libc/include/generic-netbsd/evbppc/types.h b/lib/libc/include/powerpc-netbsd-eabi/evbppc/types.h diff --git a/lib/libc/include/generic-netbsd/evbppc/vmparam.h b/lib/libc/include/powerpc-netbsd-eabi/evbppc/vmparam.h diff --git a/lib/libc/include/generic-netbsd/evbppc/wchar_limits.h b/lib/libc/include/powerpc-netbsd-eabi/evbppc/wchar_limits.h diff --git a/lib/libc/include/generic-netbsd/evbppc/float.h b/lib/libc/include/powerpc-netbsd-eabi/float.h diff --git a/lib/libc/include/generic-netbsd/evbppc/ansi.h b/lib/libc/include/powerpc-netbsd-eabi/machine/ansi.h diff --git a/lib/libc/include/generic-netbsd/evbppc/aout_machdep.h b/lib/libc/include/powerpc-netbsd-eabi/machine/aout_machdep.h diff --git a/lib/libc/include/generic-netbsd/evbppc/asm.h b/lib/libc/include/powerpc-netbsd-eabi/machine/asm.h diff --git a/lib/libc/include/generic-netbsd/evbppc/cdefs.h b/lib/libc/include/powerpc-netbsd-eabi/machine/cdefs.h diff --git a/lib/libc/include/generic-netbsd/evbppc/cpu.h b/lib/libc/include/powerpc-netbsd-eabi/machine/cpu.h diff --git a/lib/libc/include/generic-netbsd/evbppc/disklabel.h b/lib/libc/include/powerpc-netbsd-eabi/machine/disklabel.h diff --git a/lib/libc/include/generic-netbsd/evbppc/elf_machdep.h b/lib/libc/include/powerpc-netbsd-eabi/machine/elf_machdep.h diff --git a/lib/libc/include/generic-netbsd/evbppc/endian.h b/lib/libc/include/powerpc-netbsd-eabi/machine/endian.h diff --git a/lib/libc/include/generic-netbsd/evbppc/fenv.h b/lib/libc/include/powerpc-netbsd-eabi/machine/fenv.h diff --git a/lib/libc/include/generic-netbsd/evbppc/float.h b/lib/libc/include/powerpc-netbsd-eabi/machine/float.h diff --git a/lib/libc/include/generic-netbsd/machine/fpu.h b/lib/libc/include/powerpc-netbsd-eabi/machine/fpu.h diff --git a/lib/libc/include/generic-netbsd/evbppc/frame.h b/lib/libc/include/powerpc-netbsd-eabi/machine/frame.h diff --git a/lib/libc/include/generic-netbsd/evbppc/ieee.h b/lib/libc/include/powerpc-netbsd-eabi/machine/ieee.h diff --git a/lib/libc/include/generic-netbsd/evbppc/ieeefp.h b/lib/libc/include/powerpc-netbsd-eabi/machine/ieeefp.h diff --git a/lib/libc/include/generic-netbsd/evbppc/int_const.h b/lib/libc/include/powerpc-netbsd-eabi/machine/int_const.h diff --git a/lib/libc/include/generic-netbsd/evbppc/int_fmtio.h b/lib/libc/include/powerpc-netbsd-eabi/machine/int_fmtio.h diff --git a/lib/libc/include/generic-netbsd/evbppc/int_limits.h b/lib/libc/include/powerpc-netbsd-eabi/machine/int_limits.h diff --git a/lib/libc/include/generic-netbsd/evbppc/int_mwgwtypes.h b/lib/libc/include/powerpc-netbsd-eabi/machine/int_mwgwtypes.h diff --git a/lib/libc/include/generic-netbsd/evbppc/int_types.h b/lib/libc/include/powerpc-netbsd-eabi/machine/int_types.h diff --git a/lib/libc/include/generic-netbsd/machine/intr.h b/lib/libc/include/powerpc-netbsd-eabi/machine/intr.h diff --git a/lib/libc/include/generic-netbsd/evbppc/kcore.h b/lib/libc/include/powerpc-netbsd-eabi/machine/kcore.h diff --git a/lib/libc/include/generic-netbsd/evbppc/limits.h b/lib/libc/include/powerpc-netbsd-eabi/machine/limits.h diff --git a/lib/libc/include/generic-netbsd/evbppc/lock.h b/lib/libc/include/powerpc-netbsd-eabi/machine/lock.h diff --git a/lib/libc/include/powerpc-netbsd-eabi/machine/lwp_private.h b/lib/libc/include/powerpc-netbsd-eabi/machine/lwp_private.h @@ -0,0 +1,3 @@ +/* $NetBSD: lwp_private.h,v 1.1 2024/11/30 01:04:08 christos Exp $ */ + +#include <powerpc/lwp_private.h> +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/evbppc/math.h b/lib/libc/include/powerpc-netbsd-eabi/machine/math.h diff --git a/lib/libc/include/generic-netbsd/evbppc/mcontext.h b/lib/libc/include/powerpc-netbsd-eabi/machine/mcontext.h diff --git a/lib/libc/include/generic-netbsd/evbppc/mutex.h b/lib/libc/include/powerpc-netbsd-eabi/machine/mutex.h diff --git a/lib/libc/include/generic-netbsd/evbppc/param.h b/lib/libc/include/powerpc-netbsd-eabi/machine/param.h diff --git a/lib/libc/include/generic-netbsd/evbppc/pcb.h b/lib/libc/include/powerpc-netbsd-eabi/machine/pcb.h diff --git a/lib/libc/include/generic-netbsd/evbppc/pmap.h b/lib/libc/include/powerpc-netbsd-eabi/machine/pmap.h diff --git a/lib/libc/include/generic-netbsd/evbppc/proc.h b/lib/libc/include/powerpc-netbsd-eabi/machine/proc.h diff --git a/lib/libc/include/generic-netbsd/evbppc/profile.h b/lib/libc/include/powerpc-netbsd-eabi/machine/profile.h diff --git a/lib/libc/include/generic-netbsd/evbppc/psl.h b/lib/libc/include/powerpc-netbsd-eabi/machine/psl.h diff --git a/lib/libc/include/generic-netbsd/evbppc/pte.h b/lib/libc/include/powerpc-netbsd-eabi/machine/pte.h diff --git a/lib/libc/include/generic-netbsd/evbppc/ptrace.h b/lib/libc/include/powerpc-netbsd-eabi/machine/ptrace.h diff --git a/lib/libc/include/generic-netbsd/evbppc/reg.h b/lib/libc/include/powerpc-netbsd-eabi/machine/reg.h diff --git a/lib/libc/include/generic-netbsd/evbppc/reloc.h b/lib/libc/include/powerpc-netbsd-eabi/machine/reloc.h diff --git a/lib/libc/include/generic-netbsd/evbppc/setjmp.h b/lib/libc/include/powerpc-netbsd-eabi/machine/setjmp.h diff --git a/lib/libc/include/generic-netbsd/evbppc/signal.h b/lib/libc/include/powerpc-netbsd-eabi/machine/signal.h diff --git a/lib/libc/include/generic-netbsd/evbppc/sljit_machdep.h b/lib/libc/include/powerpc-netbsd-eabi/machine/sljit_machdep.h diff --git a/lib/libc/include/generic-netbsd/evbppc/trap.h b/lib/libc/include/powerpc-netbsd-eabi/machine/trap.h diff --git a/lib/libc/include/generic-netbsd/evbppc/types.h b/lib/libc/include/powerpc-netbsd-eabi/machine/types.h diff --git a/lib/libc/include/generic-netbsd/evbppc/vmparam.h b/lib/libc/include/powerpc-netbsd-eabi/machine/vmparam.h diff --git a/lib/libc/include/generic-netbsd/evbppc/wchar_limits.h b/lib/libc/include/powerpc-netbsd-eabi/machine/wchar_limits.h diff --git a/lib/libc/include/generic-netbsd/powerpc/ansi.h b/lib/libc/include/powerpc-netbsd-eabi/powerpc/ansi.h diff --git a/lib/libc/include/generic-netbsd/powerpc/aout_machdep.h b/lib/libc/include/powerpc-netbsd-eabi/powerpc/aout_machdep.h diff --git a/lib/libc/include/powerpc-netbsd-eabi/powerpc/asm.h b/lib/libc/include/powerpc-netbsd-eabi/powerpc/asm.h @@ -0,0 +1,463 @@ +/* $NetBSD: asm.h,v 1.56 2025/01/06 10:46:44 martin Exp $ */ + +/* + * Copyright (C) 1995, 1996 Wolfgang Solfrank. + * Copyright (C) 1995, 1996 TooLs GmbH. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by TooLs GmbH. + * 4. The name of TooLs GmbH may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _PPC_ASM_H_ +#define _PPC_ASM_H_ + +#ifdef _LP64 + +/* ppc64 is always PIC, r2 is always the TOC */ + +# define PIC_PLT(x) .x + +#else + +# ifdef __PIC__ +# define PIC_PROLOGUE XXX +# define PIC_EPILOGUE XXX +# define PIC_PLT(x) x+32768@plt +# ifdef __STDC__ +# define PIC_TOCNAME(name) .LCTOC_##name +# else +# define PIC_TOCNAME(name) .LCTOC_/**/name +# endif /* __STDC __*/ +# define PIC_TOCSETUP(name, reg) \ + .pushsection ".got2","aw" ;\ + PIC_TOCNAME(name) = . + 32768 ;\ + .popsection ;\ + bcl 20,31,1001f ;\ + 1001: mflr reg ;\ + addis reg,reg,PIC_TOCNAME(name)-1001b@ha ;\ + addi reg,reg,PIC_TOCNAME(name)-1001b@l +# define PIC_GOTSETUP(reg) \ + bcl 20,31,2002f ;\ + 2002: mflr reg ;\ + addis reg,reg,_GLOBAL_OFFSET_TABLE_-2002b@ha ;\ + addi reg,reg,_GLOBAL_OFFSET_TABLE_-2002b@l +# ifdef __STDC__ +# define PIC_GOT(x) XXX +# define PIC_GOTOFF(x) XXX +# else /* not __STDC__ */ +# define PIC_GOT(x) XXX +# define PIC_GOTOFF(x) XXX +# endif /* __STDC__ */ +# else /* !__PIC__ */ +# define PIC_PROLOGUE +# define PIC_EPILOGUE +# define PIC_PLT(x) x +# define PIC_GOT(x) x +# define PIC_GOTOFF(x) x +# define PIC_GOTSETUP(r) +# define PIC_TOCSETUP(n, r) +# endif /* __PIC__ */ + +#endif /* _LP64 */ + +#define _C_LABEL(x) x +#define _ASM_LABEL(x) x + +#define _GLOBAL(x) \ + .data; .align 2; .globl x; x: + +#ifdef GPROF +# define _PROF_PROLOGUE mflr 0; stw 0,4(1); bl _mcount +#else +# define _PROF_PROLOGUE +#endif + +#ifdef _LP64 + +# define SF_HEADER_SZ 48 +# define SF_PARAM_SZ 64 +# define SF_SZ (SF_HEADER_SZ + SF_PARAM_SZ) + +# define SF_SP 0 +# define SF_CR 8 +# define SF_LR 16 +# define SF_COMP 24 +# define SF_LD 32 +# define SF_TOC 40 +# define SF_PARAM SF_HEADER_SZ +# define SF_ALIGN(x) (((x) + 0xf) & ~0xf) + +# define _XENTRY(y) \ + .globl y; \ + .pushsection ".opd","aw"; \ + .align 3; \ +y: .quad .##y,.TOC.@tocbase,0; \ + .popsection; \ + .size y,24; \ + .type .##y,@function; \ + .globl .##y; \ + .align 3; \ +.##y: + +#define _ENTRY(x) .text; _XENTRY(x) + +# define ENTRY(y) _ENTRY(y) + +# define END(y) .size .##y,. - .##y + +# define CALL(y) \ + bl .y; \ + nop + +# define ENTRY_NOPROFILE(y) ENTRY(y) +# define ASENTRY(y) ENTRY(y) +#else /* !_LP64 */ + +# define _XENTRY(x) .align 2; .globl x; .type x,@function; x: +# define _ENTRY(x) .text; _XENTRY(x) + +# define ENTRY(y) _ENTRY(_C_LABEL(y)); _PROF_PROLOGUE + +# define END(y) .size _C_LABEL(y),.-_C_LABEL(y) + +# define CALL(y) \ + bl y + +# define ENTRY_NOPROFILE(y) _ENTRY(_C_LABEL(y)) +# define ASENTRY(y) _ENTRY(_ASM_LABEL(y)); _PROF_PROLOGUE +#endif /* _LP64 */ + +#define GLOBAL(y) _GLOBAL(_C_LABEL(y)) + +#define ASMSTR .asciz + +#undef __RCSID + +#define RCSID(x) __RCSID(x) +#ifdef _NETBSD_REVISIONID +#define __RCSID(x) .pushsection ".ident","MS",@progbits,1; \ + .asciz x; \ + .ascii "$"; .ascii "NetBSD: "; .ascii __FILE__; \ + .ascii " "; .ascii _NETBSD_REVISIONID; \ + .asciz " $"; \ + .popsection +#else +#define __RCSID(x) .pushsection ".ident","MS",@progbits,1; \ + .asciz x; \ + .popsection +#endif + +#ifdef __ELF__ +# define WEAK_ALIAS(alias,sym) \ + .weak alias; \ + alias = sym +#endif /* __ELF__ */ +/* + * STRONG_ALIAS: create a strong alias. + */ +#define STRONG_ALIAS(alias,sym) \ + .globl alias; \ + alias = sym + +#ifdef __STDC__ +# define WARN_REFERENCES(sym,msg) \ + .pushsection .gnu.warning. ## sym; \ + .ascii msg; \ + .popsection +#else +# define WARN_REFERENCES(sym,msg) \ + .pushsection .gnu.warning./**/sym; \ + .ascii msg; \ + .popsection +#endif /* __STDC__ */ + +#ifdef _KERNEL +/* + * Get cpu_info pointer for current processor. Always in SPRG0. *ALWAYS* + */ +# define GET_CPUINFO(r) mfsprg r,0 +/* + * IN: + * R4[er] = first free byte beyond end/esym. + * + * OUT: + * R1[sp] = new kernel stack + * R4[er] = kernelend + */ + +# ifdef CI_INTSTK +# define INIT_CPUINFO_INTSTK(er,tmp1) \ + addis er,er,INTSTK@ha; \ + addi er,er,INTSTK@l; \ + stptr er,CI_INTSTK(tmp1) +# else +# define INIT_CPUINFO_INTSTK(er,tmp1) /* nothing */ +# endif /* CI_INTSTK */ + +/* + * We use lis/ori instead of lis/addi in case tmp2 is r0. + */ +# define INIT_CPUINFO(er,sp,tmp1,tmp2) \ + li tmp1,PAGE_MASK; \ + add er,er,tmp1; \ + andc er,er,tmp1; /* page align */ \ + lis tmp1,_C_LABEL(cpu_info)@ha; \ + addi tmp1,tmp1,_C_LABEL(cpu_info)@l; \ + mtsprg0 tmp1; /* save for later use */ \ + INIT_CPUINFO_INTSTK(er,tmp1); \ + lis tmp2,_C_LABEL(emptyidlespin)@h; \ + ori tmp2,tmp2,_C_LABEL(emptyidlespin)@l; \ + stptr tmp2,CI_IDLESPIN(tmp1); \ + li tmp2,-1; \ + stint tmp2,CI_IDEPTH(tmp1); \ + li tmp2,0; \ + lis %r13,_C_LABEL(lwp0)@h; \ + ori %r13,%r13,_C_LABEL(lwp0)@l; \ + stptr er,L_PCB(%r13); /* XXXuvm_lwp_getuarea */ \ + stptr tmp1,L_CPU(%r13); \ + addis er,er,USPACE@ha; /* stackpointer for lwp0 */ \ + addi er,er,USPACE@l; /* stackpointer for lwp0 */ \ + addi sp,er,-FRAMELEN-CALLFRAMELEN; /* stackpointer for lwp0 */ \ + stptr sp,L_MD_UTF(%r13); /* save in lwp0.l_md.md_utf */ \ + /* er = end of mem reserved for kernel */ \ + li tmp2,0; \ + stptr tmp2,-CALLFRAMELEN(er); /* end of stack chain */ \ + stptru tmp2,-CALLFRAMELEN(sp) /* end of stack chain */ + +#endif /* _KERNEL */ + + +#if defined(_REGNAMES) && (defined(_KERNEL) || defined(_STANDALONE)) + /* Condition Register Bit Fields */ +# define cr0 0 +# define cr1 1 +# define cr2 2 +# define cr3 3 +# define cr4 4 +# define cr5 5 +# define cr6 6 +# define cr7 7 + /* General Purpose Registers (GPRs) */ +# define r0 0 +# define r1 1 +# define r2 2 +# define r3 3 +# define r4 4 +# define r5 5 +# define r6 6 +# define r7 7 +# define r8 8 +# define r9 9 +# define r10 10 +# define r11 11 +# define r12 12 +# define r13 13 +# define r14 14 +# define r15 15 +# define r16 16 +# define r17 17 +# define r18 18 +# define r19 19 +# define r20 20 +# define r21 21 +# define r22 22 +# define r23 23 +# define r24 24 +# define r25 25 +# define r26 26 +# define r27 27 +# define r28 28 +# define r29 29 +# define r30 30 +# define r31 31 + /* Floating Point Registers (FPRs) */ +# define fr0 0 +# define fr1 1 +# define fr2 2 +# define fr3 3 +# define fr4 4 +# define fr5 5 +# define fr6 6 +# define fr7 7 +# define fr8 8 +# define fr9 9 +# define fr10 10 +# define fr11 11 +# define fr12 12 +# define fr13 13 +# define fr14 14 +# define fr15 15 +# define fr16 16 +# define fr17 17 +# define fr18 18 +# define fr19 19 +# define fr20 20 +# define fr21 21 +# define fr22 22 +# define fr23 23 +# define fr24 24 +# define fr25 25 +# define fr26 26 +# define fr27 27 +# define fr28 28 +# define fr29 29 +# define fr30 30 +# define fr31 31 +#endif /* _REGNAMES && (_KERNEL || _STANDALONE) */ + +/* + * Add some pseudo instructions to made sharing of assembly versions of + * ILP32 and LP64 code possible. + */ +#define ldint lwz /* not needed but for completeness */ +#define ldintu lwzu /* not needed but for completeness */ +#define stint stw /* not needed but for completeness */ +#define stintu stwu /* not needed but for completeness */ + +#ifndef _LP64 + +# define ldlong lwz /* load "C" long */ +# define ldlongu lwzu /* load "C" long with update */ +# define stlong stw /* load "C" long */ +# define stlongu stwu /* load "C" long with update */ +# define ldptr lwz /* load "C" pointer */ +# define ldptru lwzu /* load "C" pointer with update */ +# define stptr stw /* load "C" pointer */ +# define stptru stwu /* load "C" pointer with update */ +# define ldreg lwz /* load PPC general register */ +# define ldregu lwzu /* load PPC general register with update */ +# define streg stw /* load PPC general register */ +# define stregu stwu /* load PPC general register with update */ +# define SZREG 4 /* 4 byte registers */ +# define P2SZREG 2 + +# define lptrarx lwarx /* load "C" pointer with reservation */ +# define llongarx lwarx /* load "C" long with reservation */ +# define lregarx lwarx /* load PPC general register with reservation */ + +# define stptrcx stwcx /* store "C" pointer conditional */ +# define stlongcx stwcx /* store "C" long conditional */ +# define stregcx stwcx /* store PPC general register conditional */ + +# define clrrptri clrrwi /* clear right "C" pointer immediate */ +# define clrrlongi clrrwi /* clear right "C" long immediate */ +# define clrrregi clrrwi /* clear right PPC general register immediate */ + +# define cmpptr cmpw +# define cmplong cmpw +# define cmpreg cmpw +# define cmpptri cmpwi +# define cmplongi cmpwi +# define cmpregi cmpwi +# define cmpptrl cmplw +# define cmplongl cmplw +# define cmpregl cmplw +# define cmpptrli cmplwi +# define cmplongli cmplwi +# define cmpregli cmplwi + +#else /* _LP64 */ + +# define ldlong ld /* load "C" long */ +# define ldlongu ldu /* load "C" long with update */ +# define stlong std /* store "C" long */ +# define stlongu stdu /* store "C" long with update */ +# define ldptr ld /* load "C" pointer */ +# define ldptru ldu /* load "C" pointer with update */ +# define stptr std /* store "C" pointer */ +# define stptru stdu /* store "C" pointer with update */ +# define ldreg ld /* load PPC general register */ +# define ldregu ldu /* load PPC general register with update */ +# define streg std /* store PPC general register */ +# define stregu stdu /* store PPC general register with update */ +/* redefined this to force an error on PPC64 to catch their use. */ +# define lmw lmd /* load multiple PPC general registers */ +# define stmw stmd /* store multiple PPC general registers */ +# define SZREG 8 /* 8 byte registers */ +# define P2SZREG 3 + +# define lptrarx ldarx /* load "C" pointer with reservation */ +# define llongarx ldarx /* load "C" long with reservation */ +# define lregarx ldarx /* load PPC general register with reservation */ + +# define stptrcx stdcx /* store "C" pointer conditional */ +# define stlongcx stdcx /* store "C" long conditional */ +# define stregax stdcx /* store PPC general register conditional */ + +# define clrrptri clrrdi /* clear right "C" pointer immediate */ +# define clrrlongi clrrdi /* clear right "C" long immediate */ +# define clrrregi clrrdi /* clear right PPC general register immediate */ + +# define cmpptr cmpd +# define cmplong cmpd +# define cmpreg cmpd +# define cmpptri cmpdi +# define cmplongi cmpdi +# define cmpregi cmpdi +# define cmpptrl cmpld +# define cmplongl cmpld +# define cmpregl cmpld +# define cmpptrli cmpldi +# define cmplongli cmpldi +# define cmpregli cmpldi + +#endif /* _LP64 */ + +#ifdef _LOCORE +.macro stmd r,dst + i = 0 + .rept 32-\r + std i+\r, i*8+\dst + i = i + 1 + .endr +.endm + +.macro lmd r,dst + i = 0 + .rept 32-\r + ld i+\r, i*8+\dst + i = i + 1 + .endr +.endm +#endif /* _LOCORE */ + +#if defined(IBM405_ERRATA77) || \ + ((defined(_MODULE) || !defined(_KERNEL)) && !defined(_LP64)) +/* + * Workaround for IBM405 Errata 77 (CPU_210): interrupted stwcx. may + * errantly write data to memory + * + * (1) Insert dcbt before every stwcx. instruction + * (2) Insert sync before every rfi/rfci instruction + */ +#define IBM405_ERRATA77_DCBT(ra, rb) dcbt ra,rb +#define IBM405_ERRATA77_SYNC sync +#else +#define IBM405_ERRATA77_DCBT(ra, rb) /* nothing */ +#define IBM405_ERRATA77_SYNC /* nothing */ +#endif + +#endif /* !_PPC_ASM_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/powerpc-netbsd-eabi/powerpc/bswap.h b/lib/libc/include/powerpc-netbsd-eabi/powerpc/bswap.h @@ -0,0 +1,14 @@ +/* $NetBSD: bswap.h,v 1.6.202.1 2025/12/05 13:03:52 martin Exp $ */ + +#ifndef _POWERPC_BSWAP_H_ +#define _POWERPC_BSWAP_H_ + +#if defined(__GNUC__) && !defined(__lint__) +#define __BYTE_SWAP_U64_VARIABLE __builtin_bswap64 +#define __BYTE_SWAP_U32_VARIABLE __builtin_bswap32 +#define __BYTE_SWAP_U16_VARIABLE __builtin_bswap16 +#endif + +#include <sys/bswap.h> + +#endif /* _POWERPC_BSWAP_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/powerpc/cdefs.h b/lib/libc/include/powerpc-netbsd-eabi/powerpc/cdefs.h diff --git a/lib/libc/include/powerpc-netbsd-eabi/powerpc/cpu.h b/lib/libc/include/powerpc-netbsd-eabi/powerpc/cpu.h @@ -0,0 +1,512 @@ +/* $NetBSD: cpu.h,v 1.124 2023/07/26 06:36:20 skrll Exp $ */ + +/* + * Copyright (C) 1999 Wolfgang Solfrank. + * Copyright (C) 1999 TooLs GmbH. + * Copyright (C) 1995-1997 Wolfgang Solfrank. + * Copyright (C) 1995-1997 TooLs GmbH. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by TooLs GmbH. + * 4. The name of TooLs GmbH may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _POWERPC_CPU_H_ +#define _POWERPC_CPU_H_ + +struct cache_info { + int dcache_size; + int dcache_line_size; + int icache_size; + int icache_line_size; +}; + +#if defined(_KERNEL) || defined(_KMEMUSER) +#if defined(_KERNEL_OPT) +#include "opt_gprof.h" +#include "opt_modular.h" +#include "opt_multiprocessor.h" +#include "opt_ppcarch.h" +#include "opt_ppcopts.h" +#endif + +#ifdef _KERNEL +#include <sys/intr.h> +#include <sys/device_if.h> +#include <sys/evcnt.h> +#include <sys/param.h> +#include <sys/kernel.h> +#endif + +#include <sys/cpu_data.h> + +#ifdef _KERNEL +#define CI_SAVETEMP (0*CPUSAVE_LEN) +#define CI_SAVEDDB (1*CPUSAVE_LEN) +#define CI_SAVEIPKDB (2*CPUSAVE_LEN) /* obsolete */ +#define CI_SAVEMMU (3*CPUSAVE_LEN) +#define CI_SAVEMAX (4*CPUSAVE_LEN) +#define CPUSAVE_LEN 8 +#if defined(PPC_BOOKE) && !defined(MODULAR) && !defined(_MODULE) +#define CPUSAVE_SIZE 128 +#else +#define CPUSAVE_SIZE (CI_SAVEMAX*CPUSAVE_LEN) +CTASSERT(CPUSAVE_SIZE >= 128); +#endif +#define CPUSAVE_R28 0 /* where r28 gets saved */ +#define CPUSAVE_R29 1 /* where r29 gets saved */ +#define CPUSAVE_R30 2 /* where r30 gets saved */ +#define CPUSAVE_R31 3 /* where r31 gets saved */ +#define CPUSAVE_DEAR 4 /* where IBM4XX SPR_DEAR gets saved */ +#define CPUSAVE_DAR 4 /* where OEA SPR_DAR gets saved */ +#define CPUSAVE_ESR 5 /* where IBM4XX SPR_ESR gets saved */ +#define CPUSAVE_DSISR 5 /* where OEA SPR_DSISR gets saved */ +#define CPUSAVE_SRR0 6 /* where SRR0 gets saved */ +#define CPUSAVE_SRR1 7 /* where SRR1 gets saved */ +#endif /* _KERNEL */ + +struct cpu_info { + struct cpu_data ci_data; /* MI per-cpu data */ +#ifdef _KERNEL + device_t ci_dev; /* device of corresponding cpu */ + struct cpu_softc *ci_softc; /* private cpu info */ + struct lwp *ci_curlwp; /* current owner of the processor */ + struct lwp *ci_onproc; /* current user LWP / kthread */ + struct pcb *ci_curpcb; + struct pmap *ci_curpm; +#if defined(PPC_OEA) || defined(PPC_OEA601) || defined(PPC_OEA64) || \ + defined(PPC_OEA64_BRIDGE) || defined(MODULAR) || defined(_MODULE) + void *ci_battable; /* BAT table in use by this CPU */ +#endif + struct lwp *ci_softlwps[SOFTINT_COUNT]; + int ci_cpuid; /* from SPR_PIR */ + + int ci_want_resched; + volatile uint64_t ci_lastintr; + volatile u_long ci_lasttb; + volatile int ci_tickspending; + volatile int ci_cpl; + volatile int ci_iactive; + volatile int ci_idepth; + union { +#if !defined(PPC_BOOKE) && !defined(_MODULE) + volatile imask_t un1_ipending; +#define ci_ipending ci_un1.un1_ipending +#endif + uint64_t un1_pad64; + } ci_un1; + volatile uint32_t ci_pending_ipis; + int ci_mtx_oldspl; + int ci_mtx_count; +#if defined(PPC_IBM4XX) || \ + ((defined(MODULAR) || defined(_MODULE)) && !defined(_LP64)) + char *ci_intstk; +#endif + + register_t ci_savearea[CPUSAVE_SIZE]; +#if defined(PPC_BOOKE) || \ + ((defined(MODULAR) || defined(_MODULE)) && !defined(_LP64)) + uint32_t ci_pmap_asid_cur; + union pmap_segtab *ci_pmap_segtabs[2]; +#define ci_pmap_kern_segtab ci_pmap_segtabs[0] +#define ci_pmap_user_segtab ci_pmap_segtabs[1] + struct pmap_tlb_info *ci_tlb_info; +#endif /* PPC_BOOKE || ((MODULAR || _MODULE) && !_LP64) */ + struct cache_info ci_ci; + void *ci_sysmon_cookie; + void (*ci_idlespin)(void); + uint32_t ci_khz; + struct evcnt ci_ev_clock; /* clock intrs */ + struct evcnt ci_ev_statclock; /* stat clock */ + struct evcnt ci_ev_traps; /* calls to trap() */ + struct evcnt ci_ev_kdsi; /* kernel DSI traps */ + struct evcnt ci_ev_udsi; /* user DSI traps */ + struct evcnt ci_ev_udsi_fatal; /* user DSI trap failures */ + struct evcnt ci_ev_kisi; /* kernel ISI traps */ + struct evcnt ci_ev_isi; /* user ISI traps */ + struct evcnt ci_ev_isi_fatal; /* user ISI trap failures */ + struct evcnt ci_ev_pgm; /* user PGM traps */ + struct evcnt ci_ev_debug; /* user debug traps */ + struct evcnt ci_ev_fpu; /* FPU traps */ + struct evcnt ci_ev_fpusw; /* FPU context switch */ + struct evcnt ci_ev_ali; /* Alignment traps */ + struct evcnt ci_ev_ali_fatal; /* Alignment fatal trap */ + struct evcnt ci_ev_scalls; /* system call traps */ + struct evcnt ci_ev_vec; /* Altivec traps */ + struct evcnt ci_ev_vecsw; /* Altivec context switches */ + struct evcnt ci_ev_umchk; /* user MCHK events */ + struct evcnt ci_ev_ipi; /* IPIs received */ + struct evcnt ci_ev_tlbmiss_soft; /* tlb miss (no trap) */ + struct evcnt ci_ev_dtlbmiss_hard; /* data tlb miss (trap) */ + struct evcnt ci_ev_itlbmiss_hard; /* instruction tlb miss (trap) */ +#if defined(GPROF) && defined(MULTIPROCESSOR) + struct gmonparam *ci_gmon; /* MI per-cpu GPROF */ +#endif +#endif /* _KERNEL */ +}; +#endif /* _KERNEL || _KMEMUSER */ + +#ifdef _KERNEL + +#if defined(MULTIPROCESSOR) && !defined(_MODULE) +struct cpu_hatch_data { + int hatch_running; + device_t hatch_self; + struct cpu_info *hatch_ci; + uint32_t hatch_tbu; + uint32_t hatch_tbl; +#if defined(PPC_OEA64_BRIDGE) || defined (_ARCH_PPC64) + uint64_t hatch_hid0; + uint64_t hatch_hid1; + uint64_t hatch_hid4; + uint64_t hatch_hid5; +#else + uint32_t hatch_hid0; +#endif + uint32_t hatch_pir; +#if defined(PPC_OEA) || defined(PPC_OEA64_BRIDGE) + uintptr_t hatch_asr; + uintptr_t hatch_sdr1; + uint32_t hatch_sr[16]; + uintptr_t hatch_ibatu[8], hatch_ibatl[8]; + uintptr_t hatch_dbatu[8], hatch_dbatl[8]; +#endif +#if defined(PPC_BOOKE) + vaddr_t hatch_sp; + u_int hatch_tlbidx; +#endif +}; + +struct cpuset_info { + kcpuset_t *cpus_running; + kcpuset_t *cpus_hatched; + kcpuset_t *cpus_paused; + kcpuset_t *cpus_resumed; + kcpuset_t *cpus_halted; +}; + +extern struct cpuset_info cpuset_info; +#endif /* MULTIPROCESSOR && !_MODULE */ + +#if defined(MULTIPROCESSOR) || defined(_MODULE) +#define cpu_number() (curcpu()->ci_index + 0) + +#define CPU_IS_PRIMARY(ci) ((ci)->ci_cpuid == 0) +#define CPU_INFO_ITERATOR int +#define CPU_INFO_FOREACH(cii, ci) \ + cii = 0, ci = &cpu_info[0]; cii < (ncpu ? ncpu : 1); cii++, ci++ + +#else +#define cpu_number() 0 + +#define CPU_IS_PRIMARY(ci) true +#define CPU_INFO_ITERATOR int +#define CPU_INFO_FOREACH(cii, ci) \ + (void)cii, ci = curcpu(); ci != NULL; ci = NULL + +#endif /* MULTIPROCESSOR || _MODULE */ + +extern struct cpu_info cpu_info[]; + +static __inline struct cpu_info * curcpu(void) __pure; +static __inline __always_inline struct cpu_info * +curcpu(void) +{ + struct cpu_info *ci; + + __asm volatile ("mfsprg0 %0" : "=r"(ci)); + return ci; +} + +register struct lwp *powerpc_curlwp __asm("r13"); +#define curlwp powerpc_curlwp +#define curpcb (curcpu()->ci_curpcb) +#define curpm (curcpu()->ci_curpm) + +static __inline register_t +mfmsr(void) +{ + register_t msr; + + __asm volatile ("mfmsr %0" : "=r"(msr)); + return msr; +} + +static __inline void +mtmsr(register_t msr) +{ + //KASSERT(msr & PSL_CE); + //KASSERT(msr & PSL_DE); + __asm volatile ("mtmsr %0" : : "r"(msr)); +} + +#if !defined(_MODULE) +static __inline uint32_t +mftbl(void) +{ + uint32_t tbl; + + __asm volatile ( +#ifdef PPC_IBM403 + " mftblo %[tbl]" "\n" +#elif defined(PPC_BOOKE) + " mfspr %[tbl],268" "\n" +#else + " mftbl %[tbl]" "\n" +#endif + : [tbl] "=r" (tbl)); + + return tbl; +} + +static __inline uint64_t +mftb(void) +{ + uint64_t tb; + +#ifdef _ARCH_PPC64 + __asm volatile ("mftb %0" : "=r"(tb)); +#else + int tmp; + + __asm volatile ( +#ifdef PPC_IBM403 + "1: mftbhi %[tb]" "\n" + " mftblo %L[tb]" "\n" + " mftbhi %[tmp]" "\n" +#elif defined(PPC_BOOKE) + "1: mfspr %[tb],269" "\n" + " mfspr %L[tb],268" "\n" + " mfspr %[tmp],269" "\n" +#else + "1: mftbu %[tb]" "\n" + " mftb %L[tb]" "\n" + " mftbu %[tmp]" "\n" +#endif + " cmplw %[tb],%[tmp]" "\n" + " bne- 1b" "\n" + : [tb] "=r" (tb), [tmp] "=r"(tmp) + :: "cr0"); +#endif + + return tb; +} + +static __inline uint32_t +mfrtcl(void) +{ + uint32_t rtcl; + + __asm volatile ("mfrtcl %0" : "=r"(rtcl)); + return rtcl; +} + +static __inline void +mfrtc(uint32_t *rtcp) +{ + uint32_t tmp; + + __asm volatile ( + "1: mfrtcu %[rtcu]" "\n" + " mfrtcl %[rtcl]" "\n" + " mfrtcu %[tmp]" "\n" + " cmplw %[rtcu],%[tmp]" "\n" + " bne- 1b" + : [rtcu] "=r"(rtcp[0]), [rtcl] "=r"(rtcp[1]), [tmp] "=r"(tmp) + :: "cr0"); +} + +static __inline uint64_t +rtc_nanosecs(void) +{ + /* + * 601 RTC/DEC registers share clock of 7.8125 MHz, 128 ns per tick. + * DEC has max of 25 bits, FFFFFF => 2.14748352 seconds. + * RTCU is seconds, 32 bits. + * RTCL is nano-seconds, 23 bit counter from 0 - 999,999,872 (999,999,999 - 128 ns) + */ + uint64_t cycles; + uint32_t tmp[2]; + + mfrtc(tmp); + + cycles = tmp[0] * 1000000000; + cycles += (tmp[1] >> 7); + + return cycles; +} +#endif /* !_MODULE */ + +static __inline uint32_t +mfpvr(void) +{ + uint32_t pvr; + + __asm volatile ("mfpvr %0" : "=r"(pvr)); + return (pvr); +} + +#ifdef _MODULE +extern const char __CPU_MAXNUM; +/* + * Make with 0xffff to force a R_PPC_ADDR16_LO without the + * corresponding R_PPC_ADDR16_HI relocation. + */ +#define CPU_MAXNUM (((uintptr_t)&__CPU_MAXNUM)&0xffff) +#endif /* _MODULE */ + +#if !defined(_MODULE) +extern char *booted_kernel; +extern int powersave; +extern int cpu_timebase; +extern int cpu_printfataltraps; + +struct cpu_info * + cpu_attach_common(device_t, int); +void cpu_setup(device_t, struct cpu_info *); +void cpu_identify(char *, size_t); +void cpu_probe_cache(void); + +void dcache_wb_page(vaddr_t); +void dcache_wbinv_page(vaddr_t); +void dcache_inv_page(vaddr_t); +void dcache_zero_page(vaddr_t); +void icache_inv_page(vaddr_t); +void dcache_wb(vaddr_t, vsize_t); +void dcache_wbinv(vaddr_t, vsize_t); +void dcache_inv(vaddr_t, vsize_t); +void icache_inv(vaddr_t, vsize_t); + +void * mapiodev(paddr_t, psize_t, bool); +void unmapiodev(vaddr_t, vsize_t); + +int emulate_mxmsr(struct lwp *, struct trapframe *, uint32_t); + +#ifdef MULTIPROCESSOR +int md_setup_trampoline(volatile struct cpu_hatch_data *, + struct cpu_info *); +void md_presync_timebase(volatile struct cpu_hatch_data *); +void md_start_timebase(volatile struct cpu_hatch_data *); +void md_sync_timebase(volatile struct cpu_hatch_data *); +void md_setup_interrupts(void); +int cpu_spinup(device_t, struct cpu_info *); +register_t + cpu_hatch(void); +void cpu_spinup_trampoline(void); +void cpu_boot_secondary_processors(void); +void cpu_halt(void); +void cpu_halt_others(void); +void cpu_pause(struct trapframe *); +void cpu_pause_others(void); +void cpu_resume(cpuid_t); +void cpu_resume_others(void); +int cpu_is_paused(int); +void cpu_debug_dump(void); +#endif /* MULTIPROCESSOR */ +#endif /* !_MODULE */ + +#define cpu_proc_fork(p1, p2) + +#ifndef __HIDE_DELAY +#define DELAY(n) delay(n) +void delay(unsigned int); +#endif /* __HIDE_DELAY */ + +#define CLKF_USERMODE(cf) cpu_clkf_usermode(cf) +#define CLKF_PC(cf) cpu_clkf_pc(cf) +#define CLKF_INTR(cf) cpu_clkf_intr(cf) + +bool cpu_clkf_usermode(const struct clockframe *); +vaddr_t cpu_clkf_pc(const struct clockframe *); +bool cpu_clkf_intr(const struct clockframe *); + +#define LWP_PC(l) cpu_lwp_pc(l) + +vaddr_t cpu_lwp_pc(struct lwp *); + +void cpu_ast(struct lwp *, struct cpu_info *); +void * cpu_uarea_alloc(bool); +bool cpu_uarea_free(void *); +void cpu_signotify(struct lwp *); +void cpu_need_proftick(struct lwp *); + +void cpu_fixup_stubs(void); + +#if !defined(PPC_IBM4XX) && !defined(PPC_BOOKE) && !defined(_MODULE) +int cpu_get_dfs(void); +void cpu_set_dfs(int); + +void oea_init(void (*)(void)); +void oea_startup(const char *); +void oea_dumpsys(void); +void oea_install_extint(void (*)(void)); +paddr_t kvtop(void *); + +extern paddr_t msgbuf_paddr; +extern int cpu_altivec; +#endif + +#ifdef PPC_NO_UNALIGNED +bool fix_unaligned(struct trapframe *, ksiginfo_t *); +#endif + +#endif /* _KERNEL */ + +/* XXX The below breaks unified pmap on ppc32 */ + +#if !defined(CACHELINESIZE) && !defined(_MODULE) \ + && (defined(_KERNEL) || defined(_STANDALONE)) +#if defined(PPC_IBM403) +#define CACHELINESIZE 16 +#define MAXCACHELINESIZE 16 +#elif defined (PPC_OEA64_BRIDGE) +#define CACHELINESIZE 128 +#define MAXCACHELINESIZE 128 +#else +#define CACHELINESIZE 32 +#define MAXCACHELINESIZE 32 +#endif /* PPC_OEA64_BRIDGE */ +#endif + +void __syncicache(void *, size_t); + +/* + * CTL_MACHDEP definitions. + */ +#define CPU_CACHELINE 1 +#define CPU_TIMEBASE 2 +#define CPU_CPUTEMP 3 +#define CPU_PRINTFATALTRAPS 4 +#define CPU_CACHEINFO 5 +#define CPU_ALTIVEC 6 +#define CPU_MODEL 7 +#define CPU_POWERSAVE 8 /* int: use CPU powersave mode */ +#define CPU_BOOTED_DEVICE 9 /* string: device we booted from */ +#define CPU_BOOTED_KERNEL 10 /* string: kernel we booted */ +#define CPU_EXECPROT 11 /* bool: PROT_EXEC works */ +#define CPU_FPU 12 +#define CPU_NO_UNALIGNED 13 /* No HW support for unaligned access */ + +#endif /* _POWERPC_CPU_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/powerpc/elf_machdep.h b/lib/libc/include/powerpc-netbsd-eabi/powerpc/elf_machdep.h diff --git a/lib/libc/include/generic-netbsd/powerpc/endian.h b/lib/libc/include/powerpc-netbsd-eabi/powerpc/endian.h diff --git a/lib/libc/include/generic-netbsd/powerpc/endian_machdep.h b/lib/libc/include/powerpc-netbsd-eabi/powerpc/endian_machdep.h diff --git a/lib/libc/include/powerpc-netbsd-eabi/powerpc/fenv.h b/lib/libc/include/powerpc-netbsd-eabi/powerpc/fenv.h @@ -0,0 +1,332 @@ +/* $NetBSD: fenv.h,v 1.8 2024/10/30 15:56:11 riastradh Exp $ */ + +/*- + * Copyright (c) 2004-2005 David Schultz <das@FreeBSD.ORG> + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD: head/lib/msun/powerpc/fenv.h 226218 2011-10-10 15:43:09Z das $ + */ + +#ifndef _POWERPC_FENV_H_ +#define _POWERPC_FENV_H_ + +#include <sys/featuretest.h> +#include <sys/stdint.h> + +/* Exception flags */ +#define FE_INEXACT 0x02000000 +#define FE_DIVBYZERO 0x04000000 +#define FE_UNDERFLOW 0x08000000 +#define FE_OVERFLOW 0x10000000 +#define FE_INVALID 0x20000000 /* all types of invalid FP ops */ + +/* + * The PowerPC architecture has extra invalid flags that indicate the + * specific type of invalid operation occurred. These flags may be + * tested, set, and cleared---but not masked---separately. All of + * these bits are cleared when FE_INVALID is cleared, but only + * FE_VXSOFT is set when FE_INVALID is explicitly set in software. + */ +#define FE_VXCVI 0x00000100 /* invalid integer convert */ +#define FE_VXSQRT 0x00000200 /* square root of a negative */ +#define FE_VXSOFT 0x00000400 /* software-requested exception */ +#define FE_VXVC 0x00080000 /* ordered comparison involving NaN */ +#define FE_VXIMZ 0x00100000 /* inf * 0 */ +#define FE_VXZDZ 0x00200000 /* 0 / 0 */ +#define FE_VXIDI 0x00400000 /* inf / inf */ +#define FE_VXISI 0x00800000 /* inf - inf */ +#define FE_VXSNAN 0x01000000 /* operation on a signalling NaN */ +#define FE_ALL_INVALID (FE_VXCVI | FE_VXSQRT | FE_VXSOFT | FE_VXVC | \ + FE_VXIMZ | FE_VXZDZ | FE_VXIDI | FE_VXISI | \ + FE_VXSNAN | FE_INVALID) +#define FE_ALL_EXCEPT (FE_DIVBYZERO | FE_INEXACT | \ + FE_ALL_INVALID | FE_OVERFLOW | FE_UNDERFLOW) + +/* Rounding modes */ +#define FE_TONEAREST 0x0000 +#define FE_TOWARDZERO 0x0001 +#define FE_UPWARD 0x0002 +#define FE_DOWNWARD 0x0003 +#define _ROUND_MASK (FE_TONEAREST | FE_DOWNWARD | \ + FE_UPWARD | FE_TOWARDZERO) + +#ifndef _SOFT_FLOAT + +#ifndef __fenv_static +#define __fenv_static static +#endif + +typedef uint32_t fenv_t; +typedef uint32_t fexcept_t; + +#ifndef _KERNEL +__BEGIN_DECLS + +/* Default floating-point environment */ +extern const fenv_t __fe_dfl_env; +#define FE_DFL_ENV (&__fe_dfl_env) + +/* We need to be able to map status flag positions to mask flag positions */ +#define _FPUSW_SHIFT 22 +#define _ENABLE_MASK ((FE_DIVBYZERO | FE_INEXACT | FE_INVALID | \ + FE_OVERFLOW | FE_UNDERFLOW) >> _FPUSW_SHIFT) + +#ifndef _SOFT_FLOAT +#define __mffs(__env) __asm __volatile("mffs %0" : "=f" (*(__env))) +#define __mtfsf(__env) __asm __volatile("mtfsf 255,%0" : : "f" (__env)) + +static __inline uint32_t +__mfmsr(void) +{ + uint32_t __msr; + + __asm volatile ("mfmsr %0" : "=r"(__msr)); + return __msr; +} + +static __inline void +__mtmsr(uint32_t __msr) +{ + + __asm volatile ("mtmsr %0" : : "r"(__msr)); +} + +#define __MSR_FE_MASK (0x00000800 | 0x00000100) +#define __MSR_FE_DIS (0) +#define __MSR_FE_PREC (0x00000800 | 0x00000100) + +static __inline void +__updatemsr(uint32_t __reg) +{ + uint32_t __msr; + + __msr = __mfmsr() & ~__MSR_FE_MASK; + if (__reg != 0) { + __msr |= __MSR_FE_PREC; + } else { + __msr |= __MSR_FE_DIS; + } + __mtmsr(__msr); +} + +#else +#define __mffs(__env) +#define __mtfsf(__env) +#define __updatemsr(__reg) +#endif + +union __fpscr { + double __d; + struct { + uint32_t __junk; + fenv_t __reg; + } __bits; +}; + +#if __GNUC_PREREQ__(8, 0) +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Wshadow" +#endif + +__fenv_static __inline int +feclearexcept(int __excepts) +{ + union __fpscr __r; + + if (__excepts & FE_INVALID) + __excepts |= FE_ALL_INVALID; + __mffs(&__r.__d); + __r.__bits.__reg &= ~__excepts; + __mtfsf(__r.__d); + return (0); +} + +__fenv_static __inline int +fegetexceptflag(fexcept_t *__flagp, int __excepts) +{ + union __fpscr __r; + + __mffs(&__r.__d); + *__flagp = __r.__bits.__reg & __excepts; + return (0); +} + +__fenv_static __inline int +fesetexceptflag(const fexcept_t *__flagp, int __excepts) +{ + union __fpscr __r; + + if (__excepts & FE_INVALID) + __excepts |= FE_ALL_INVALID; + __mffs(&__r.__d); + __r.__bits.__reg &= ~__excepts; + __r.__bits.__reg |= *__flagp & __excepts; + __mtfsf(__r.__d); + return (0); +} + +__fenv_static __inline int +feraiseexcept(int __excepts) +{ + union __fpscr __r; + + if (__excepts & FE_INVALID) + __excepts |= FE_VXSOFT; + __mffs(&__r.__d); + __r.__bits.__reg |= __excepts; + __mtfsf(__r.__d); + return (0); +} + +__fenv_static __inline int +fetestexcept(int __excepts) +{ + union __fpscr __r; + + __mffs(&__r.__d); + return (__r.__bits.__reg & __excepts); +} + +__fenv_static __inline int +fegetround(void) +{ + union __fpscr __r; + + __mffs(&__r.__d); + return (__r.__bits.__reg & _ROUND_MASK); +} + +__fenv_static __inline int +fesetround(int __round) +{ + union __fpscr __r; + + if (__round & ~_ROUND_MASK) + return (-1); + __mffs(&__r.__d); + __r.__bits.__reg &= ~_ROUND_MASK; + __r.__bits.__reg |= __round; + __mtfsf(__r.__d); + return (0); +} + +__fenv_static __inline int +fegetenv(fenv_t *__envp) +{ + union __fpscr __r; + + __mffs(&__r.__d); + *__envp = __r.__bits.__reg; + return (0); +} + +__fenv_static __inline int +feholdexcept(fenv_t *__envp) +{ + union __fpscr __r; + uint32_t msr; + + __mffs(&__r.__d); + *__envp = __r.__bits.__reg; + __r.__bits.__reg &= ~(FE_ALL_EXCEPT | _ENABLE_MASK); + __mtfsf(__r.__d); + __updatemsr(__r.__bits.__reg); + return (0); +} + +__fenv_static __inline int +fesetenv(const fenv_t *__envp) +{ + union __fpscr __r; + + __r.__bits.__reg = *__envp; + __mtfsf(__r.__d); + __updatemsr(__r.__bits.__reg); + return (0); +} + +__fenv_static __inline int +feupdateenv(const fenv_t *__envp) +{ + union __fpscr __r; + + __mffs(&__r.__d); + __r.__bits.__reg &= FE_ALL_EXCEPT; + __r.__bits.__reg |= *__envp; + __mtfsf(__r.__d); + __updatemsr(__r.__bits.__reg); + return (0); +} + +#if __GNUC_PREREQ__(8, 0) +#pragma GCC diagnostic pop +#endif + +#if defined(_NETBSD_SOURCE) || defined(_GNU_SOURCE) + +__fenv_static __inline int +feenableexcept(int __mask) +{ + union __fpscr __r; + fenv_t __oldmask; + + __mffs(&__r.__d); + __oldmask = __r.__bits.__reg; + __r.__bits.__reg |= (__mask & FE_ALL_EXCEPT) >> _FPUSW_SHIFT; + __mtfsf(__r.__d); + __updatemsr(__r.__bits.__reg); + return ((__oldmask & _ENABLE_MASK) << _FPUSW_SHIFT); +} + +__fenv_static __inline int +fedisableexcept(int __mask) +{ + union __fpscr __r; + fenv_t __oldmask; + + __mffs(&__r.__d); + __oldmask = __r.__bits.__reg; + __r.__bits.__reg &= ~((__mask & FE_ALL_EXCEPT) >> _FPUSW_SHIFT); + __mtfsf(__r.__d); + __updatemsr(__r.__bits.__reg); + return ((__oldmask & _ENABLE_MASK) << _FPUSW_SHIFT); +} + +__fenv_static __inline int +fegetexcept(void) +{ + union __fpscr __r; + + __mffs(&__r.__d); + return ((__r.__bits.__reg & _ENABLE_MASK) << _FPUSW_SHIFT); +} + +#endif /* _NETBSD_SOURCE || _GNU_SOURCE */ + +__END_DECLS + +#endif +#endif /* _SOFT_FLOAT */ + +#endif /* !_POWERPC_FENV_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/powerpc/float.h b/lib/libc/include/powerpc-netbsd-eabi/powerpc/float.h diff --git a/lib/libc/include/generic-netbsd/powerpc/fpu.h b/lib/libc/include/powerpc-netbsd-eabi/powerpc/fpu.h diff --git a/lib/libc/include/generic-netbsd/powerpc/frame.h b/lib/libc/include/powerpc-netbsd-eabi/powerpc/frame.h diff --git a/lib/libc/include/generic-netbsd/powerpc/ibm4xx/cpu.h b/lib/libc/include/powerpc-netbsd-eabi/powerpc/ibm4xx/cpu.h diff --git a/lib/libc/include/powerpc-netbsd-eabi/powerpc/ibm4xx/pmap.h b/lib/libc/include/powerpc-netbsd-eabi/powerpc/ibm4xx/pmap.h @@ -0,0 +1,212 @@ +/* $NetBSD: pmap.h,v 1.22 2023/09/28 06:19:19 skrll Exp $ */ + +/* + * Copyright 2001 Wasabi Systems, Inc. + * All rights reserved. + * + * Written by Eduardo Horvath and Simon Burge for Wasabi Systems, Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed for the NetBSD Project by + * Wasabi Systems, Inc. + * 4. The name of Wasabi Systems, Inc. may not be used to endorse + * or promote products derived from this software without specific prior + * written permission. + * + * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/*- + * Copyright (C) 1995, 1996 Wolfgang Solfrank. + * Copyright (C) 1995, 1996 TooLs GmbH. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by TooLs GmbH. + * 4. The name of TooLs GmbH may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _IBM4XX_PMAP_H_ +#define _IBM4XX_PMAP_H_ + +#ifdef _LOCORE +#error use assym.h instead +#endif + +#if defined(_MODULE) +#error this file should not be included by loadable kernel modules +#endif + +#include <powerpc/ibm4xx/tlb.h> + +#define KERNEL_PID 1 /* TLB PID to use for kernel translation */ + +/* + * A TTE is a 16KB or greater TLB entry w/size and endianness bits + * stuffed in the (unused) low bits of the PA. + */ +#define TTE_PA_MASK 0xffffc000 +#define TTE_RPN_MASK(sz) (~((1 << (10 + 2 * (sz))) - 1)) +#define TTE_ENDIAN 0x00002000 +#define TTE_SZ_MASK 0x00001c00 +#define TTE_SZ_SHIFT 10 + +/* TTE_SZ_1K and TTE_SZ_4K are not allowed. */ +#define TTE_SZ_16K (TLB_SIZE_16K << TTE_SZ_SHIFT) +#define TTE_SZ_64K (TLB_SIZE_64K << TTE_SZ_SHIFT) +#define TTE_SZ_256K (TLB_SIZE_256K << TTE_SZ_SHIFT) +#define TTE_SZ_1M (TLB_SIZE_1M << TTE_SZ_SHIFT) +#define TTE_SZ_4M (TLB_SIZE_4M << TTE_SZ_SHIFT) +#define TTE_SZ_16M (TLB_SIZE_16M << TTE_SZ_SHIFT) + +#define TTE_EX TLB_EX +#define TTE_WR TLB_WR +#define TTE_ZSEL_MASK TLB_ZSEL_MASK +#define TTE_ZSEL_SHFT TLB_ZSEL_SHFT +#define TTE_W TLB_W +#define TTE_I TLB_I +#define TTE_M TLB_M +#define TTE_G TLB_G + +#define ZONE_PRIV 0 +#define ZONE_USER 1 + +#define TTE_PA(p) ((p)&TTE_PA_MASK) +#define TTE_ZONE(z) TLB_ZONE(z) + +/* + * Definitions for sizes of 1st and 2nd level page tables. + * + */ +#define PTSZ (PAGE_SIZE / 4) +#define PTMAP (PTSZ * PAGE_SIZE) +#define PTMSK ((PTMAP - 1) & ~(PGOFSET)) + +#define PTIDX(v) (((v) & PTMSK) >> PGSHIFT) + +/* 2nd level tables map in any bits not mapped by 1st level tables. */ +#define STSZ ((0xffffffffU / (PAGE_SIZE * PTSZ)) + 1) +#define STMAP (0xffffffffU) +#define STMSK (~(PTMAP - 1)) + +#define STIDX(v) ((v) >> (PGSHIFT + 12)) + + +/* + * Extra flags to pass to pmap_enter() -- make sure they don't conflict + * w/PMAP_CANFAIL or PMAP_WIRED + */ +#define PME_NOCACHE 0x1000000 +#define PME_WRITETHROUG 0x2000000 + +/* + * Pmap stuff + */ +struct pmap { + volatile int pm_ctx; /* PID to identify PMAP's entries in TLB */ + int pm_refs; /* ref count */ + struct pmap_statistics pm_stats; /* pmap statistics */ + volatile u_int *pm_ptbl[STSZ]; /* Array of 64 pointers to page tables. */ +}; + +#ifdef _KERNEL +#define PMAP_GROWKERNEL + +#define PMAP_ATTR_REF 0x1 +#define PMAP_ATTR_CHG 0x2 + +#define pmap_clear_modify(pg) (pmap_check_attr((pg), PMAP_ATTR_CHG, 1)) +#define pmap_clear_reference(pg)(pmap_check_attr((pg), PMAP_ATTR_REF, 1)) +#define pmap_is_modified(pg) (pmap_check_attr((pg), PMAP_ATTR_CHG, 0)) +#define pmap_is_referenced(pg) (pmap_check_attr((pg), PMAP_ATTR_REF, 0)) + +#define pmap_phys_address(x) (x) + +#define pmap_resident_count(pmap) ((pmap)->pm_stats.resident_count) +#define pmap_wired_count(pmap) ((pmap)->pm_stats.wired_count) + +void pmap_unwire(struct pmap *pm, vaddr_t va); +void pmap_bootstrap(u_int kernelstart, u_int kernelend); +bool pmap_extract(struct pmap *, vaddr_t, paddr_t *); +bool pmap_check_attr(struct vm_page *, u_int, int); +void pmap_real_memory(paddr_t *, psize_t *); +int pmap_tlbmiss(vaddr_t va, int ctx); + +static __inline bool +pmap_remove_all(struct pmap *pmap) +{ + /* Nothing. */ + return false; +} + +int ctx_alloc(struct pmap *); +void ctx_free(struct pmap *); + +#define PMAP_NEED_PROCWR +void pmap_procwr(struct proc *, vaddr_t, size_t); + +/* + * Alternate mapping hooks for pool pages. Avoids thrashing the TLB. + * + * Note: This won't work if we have more memory than can be direct-mapped + * VA==PA all at once. But pmap_copy_page() and pmap_zero_page() will have + * this problem, too. + */ +#define PMAP_MAP_POOLPAGE(pa) (pa) +#define PMAP_UNMAP_POOLPAGE(pa) (pa) + +static __inline paddr_t vtophys(vaddr_t); + +static __inline paddr_t +vtophys(vaddr_t va) +{ + paddr_t pa; + + /* XXX should check battable */ + + if (pmap_extract(pmap_kernel(), va, &pa)) + return pa; + return va; +} +#endif /* _KERNEL */ +#endif /* _IBM4XX_PMAP_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/powerpc/ibm4xx/spr.h b/lib/libc/include/powerpc-netbsd-eabi/powerpc/ibm4xx/spr.h diff --git a/lib/libc/include/generic-netbsd/powerpc/ibm4xx/tlb.h b/lib/libc/include/powerpc-netbsd-eabi/powerpc/ibm4xx/tlb.h diff --git a/lib/libc/include/powerpc-netbsd-eabi/powerpc/ieee.h b/lib/libc/include/powerpc-netbsd-eabi/powerpc/ieee.h @@ -0,0 +1,23 @@ +/* $NetBSD: ieee.h,v 1.7 2024/01/23 04:15:54 rin Exp $ */ + +#ifndef _POWERPC_IEEE_H_ +#define _POWERPC_IEEE_H_ + +#include <sys/ieee754.h> + +/* + * A NaN is a `signalling NaN' if its QUIETNAN bit is clear in its + * high fraction; if the bit is set, it is a `quiet NaN'. + */ + +#if 0 +#define SNG_QUIETNAN (1 << 22) +#define DBL_QUIETNAN (1 << 19) +#endif + +union ldbl_u { + long double ldblu_ld; + double ldblu_d[2]; +}; + +#endif /* !_POWERPC_IEEE_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/powerpc/ieeefp.h b/lib/libc/include/powerpc-netbsd-eabi/powerpc/ieeefp.h diff --git a/lib/libc/include/generic-netbsd/powerpc/int_const.h b/lib/libc/include/powerpc-netbsd-eabi/powerpc/int_const.h diff --git a/lib/libc/include/generic-netbsd/powerpc/int_fmtio.h b/lib/libc/include/powerpc-netbsd-eabi/powerpc/int_fmtio.h diff --git a/lib/libc/include/generic-netbsd/powerpc/int_limits.h b/lib/libc/include/powerpc-netbsd-eabi/powerpc/int_limits.h diff --git a/lib/libc/include/generic-netbsd/powerpc/int_mwgwtypes.h b/lib/libc/include/powerpc-netbsd-eabi/powerpc/int_mwgwtypes.h diff --git a/lib/libc/include/generic-netbsd/powerpc/int_types.h b/lib/libc/include/powerpc-netbsd-eabi/powerpc/int_types.h diff --git a/lib/libc/include/generic-netbsd/powerpc/kcore.h b/lib/libc/include/powerpc-netbsd-eabi/powerpc/kcore.h diff --git a/lib/libc/include/powerpc-netbsd-eabi/powerpc/limits.h b/lib/libc/include/powerpc-netbsd-eabi/powerpc/limits.h @@ -0,0 +1,121 @@ +/* $NetBSD: limits.h,v 1.21 2024/04/02 14:21:29 christos Exp $ */ + +/* + * Copyright (c) 1988, 1993 + * The Regents of the University of California. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the University nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * @(#)limits.h 8.3 (Berkeley) 1/4/94 + */ + +#ifndef _POWERPC_LIMITS_H_ +#define _POWERPC_LIMITS_H_ + +#include <sys/featuretest.h> + +#define CHAR_BIT 8 /* number of bits in a char */ + +/* + * According to ANSI (section 2.2.4.2), the values below must be usable by + * #if preprocessing directives. Additionally, the expression must have the + * same type as would an expression that is an object of the corresponding + * type converted according to the integral promotions. The subtraction for + * INT_MIN and LONG_MIN is so the value is not unsigned; 2147483648 is an + * unsigned int for 32-bit two's complement ANSI compilers (section 3.1.3.2). + * These numbers work for pcc as well. The UINT_MAX and ULONG_MAX values + * are written as hex so that GCC will be quiet about large integer constants. + */ +#define UCHAR_MAX 0xff /* max value for an unsigned char */ +#define SCHAR_MAX 0x7f /* max value for a signed char */ +#define SCHAR_MIN (-0x7f-1) /* min value for a signed char */ + +#define USHRT_MAX 0xffff /* max value for an unsigned short */ +#define SHRT_MAX 0x7fff /* max value for a short */ +#define SHRT_MIN (-0x7fff-1) /* min value for a short */ + +#define UINT_MAX 0xffffffffU /* max value for an unsigned int */ +#define INT_MAX 0x7fffffff /* max value for an int */ +#define INT_MIN (-0x7fffffff-1) /* min value for an int */ + +#ifdef _LP64 +#define ULONG_MAX 0xffffffffffffffffUL /* max for an unsigned long */ +#define LONG_MAX 0x7fffffffffffffffL /* max for a long */ +#define LONG_MIN (-0x7fffffffffffffffL-1) /* min for a long */ +#else +#define ULONG_MAX 0xffffffffUL /* max value for an unsigned long */ +#define LONG_MAX 0x7fffffffL /* max value for a long */ +#define LONG_MIN (-0x7fffffff-1) /* min value for a long */ +#endif + +#if defined(_ISOC99_SOURCE) || (__STDC_VERSION__ - 0) >= 199901L || \ + defined(_NETBSD_SOURCE) +#define ULLONG_MAX 0xffffffffffffffffULL /* max unsigned long long */ +#define LLONG_MAX 0x7fffffffffffffffLL /* max signed long long */ +#define LLONG_MIN (-0x7fffffffffffffffLL-1) /* min signed long long */ +#endif + +#if defined(_POSIX_C_SOURCE) || defined(_XOPEN_SOURCE) || \ + defined(_NETBSD_SOURCE) +#ifdef _LP64 +#define SSIZE_MAX LONG_MAX /* max value for a ssize_t */ +#else +#define SSIZE_MAX INT_MAX /* max value for a ssize_t */ +#endif + +#if defined(_NETBSD_SOURCE) +#ifdef _LP64 +#define SSIZE_MIN LONG_MIN /* min value for a ssize_t */ +#define SIZE_T_MAX ULONG_MAX /* max value for a size_t */ +#else +#define SSIZE_MIN INT_MIN /* min value for a ssize_t */ +#define SIZE_T_MAX UINT_MAX /* max value for a size_t */ +#endif + +#define UQUAD_MAX 0xffffffffffffffffULL /* max unsigned quad */ +#define QUAD_MAX 0x7fffffffffffffffLL /* max signed quad */ +#define QUAD_MIN (-0x7fffffffffffffffLL-1) /* min signed quad */ + +#endif /* _NETBSD_SOURCE */ +#endif /* _POSIX_C_SOURCE || _XOPEN_SOURCE || _NETBSD_SOURCE */ + +#if defined(_XOPEN_SOURCE) || defined(_NETBSD_SOURCE) +#ifdef _LP64 +#define LONG_BIT 64 +#else +#define LONG_BIT 32 +#endif +#define WORD_BIT 32 + +#define DBL_DIG __DBL_DIG__ +#define DBL_MAX __DBL_MAX__ +#define DBL_MIN __DBL_MIN__ + +#define FLT_DIG __FLT_DIG__ +#define FLT_MAX __FLT_MAX__ +#define FLT_MIN __FLT_MIN__ +#endif + +#endif /* _POWERPC_LIMITS_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/powerpc/lock.h b/lib/libc/include/powerpc-netbsd-eabi/powerpc/lock.h diff --git a/lib/libc/include/powerpc-netbsd-eabi/powerpc/lwp_private.h b/lib/libc/include/powerpc-netbsd-eabi/powerpc/lwp_private.h @@ -0,0 +1,79 @@ +/* $NetBSD: lwp_private.h,v 1.1 2024/11/30 01:04:13 christos Exp $ */ + +/*- + * Copyright (c) 2001 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Klaus Klein. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _POWERPC_LWP_PRIVATE_H_ +#define _POWERPC_LWP_PRIVATE_H_ + +#include <sys/cdefs.h> +#include <sys/tls.h> + +#include <lwp.h> + +/* + * On PowerPC, since displacements are signed 16-bit values, the TCB Pointer + * is biased by 0x7000 + sizeof(tcb) so that first thread datum can be + * addressed by -28672 thereby leaving 60KB available for use as thread data. + */ +#define TLS_TP_OFFSET 0x7000 +#define TLS_DTV_OFFSET 0x8000 +__CTASSERT(TLS_TP_OFFSET + sizeof(struct tls_tcb) < 0x8000); + +__BEGIN_DECLS + +static __inline void * +__lwp_gettcb_fast(void) +{ + void *__tcb; + + __asm __volatile( + "addi %[__tcb],%%r2,%[__offset]" + : [__tcb] "=r" (__tcb) + : [__offset] "n" (-(TLS_TP_OFFSET + sizeof(struct tls_tcb)))); + + return __tcb; +} + +static __inline void +__lwp_settcb(void *__tcb) +{ + __tcb = (uint8_t *)__tcb + TLS_TP_OFFSET + sizeof(struct tls_tcb); + + __asm __volatile( + "mr %%r2,%[__tcb]" + : + : [__tcb] "r" (__tcb)); + + _lwp_setprivate(__tcb); +} + +__END_DECLS + +#endif /* !_POWERPC_LWP_PRIVATE_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/powerpc/math.h b/lib/libc/include/powerpc-netbsd-eabi/powerpc/math.h diff --git a/lib/libc/include/powerpc-netbsd-eabi/powerpc/mcontext.h b/lib/libc/include/powerpc-netbsd-eabi/powerpc/mcontext.h @@ -0,0 +1,144 @@ +/* $NetBSD: mcontext.h,v 1.26 2024/11/30 01:04:13 christos Exp $ */ + +/*- + * Copyright (c) 2001 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Klaus Klein. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _POWERPC_MCONTEXT_H_ +#define _POWERPC_MCONTEXT_H_ + +/* + * Layout of mcontext_t based on the System V Application Binary Interface, + * Edition 4.1, PowerPC Processor ABI Supplement - September 1995, and + * extended for the AltiVec Register File. Note that due to the increased + * alignment requirements of the latter, the offset of mcontext_t within + * an ucontext_t is different from System V. + */ + +#define _NGREG 39 /* GR0-31, CR, LR, SRR0, SRR1, CTR, XER, MQ */ + +typedef long __greg_t; +typedef __greg_t __gregset_t[_NGREG]; + +#define _REG_R0 0 +#define _REG_R1 1 +#define _REG_R2 2 +#define _REG_R3 3 +#define _REG_R4 4 +#define _REG_R5 5 +#define _REG_R6 6 +#define _REG_R7 7 +#define _REG_R8 8 +#define _REG_R9 9 +#define _REG_R10 10 +#define _REG_R11 11 +#define _REG_R12 12 +#define _REG_R13 13 +#define _REG_R14 14 +#define _REG_R15 15 +#define _REG_R16 16 +#define _REG_R17 17 +#define _REG_R18 18 +#define _REG_R19 19 +#define _REG_R20 20 +#define _REG_R21 21 +#define _REG_R22 22 +#define _REG_R23 23 +#define _REG_R24 24 +#define _REG_R25 25 +#define _REG_R26 26 +#define _REG_R27 27 +#define _REG_R28 28 +#define _REG_R29 29 +#define _REG_R30 30 +#define _REG_R31 31 +#define _REG_CR 32 /* Condition Register */ +#define _REG_LR 33 /* Link Register */ +#define _REG_PC 34 /* PC (copy of SRR0) */ +#define _REG_MSR 35 /* MSR (copy of SRR1) */ +#define _REG_CTR 36 /* Count Register */ +#define _REG_XER 37 /* Integer Exception Register */ +#define _REG_MQ 38 /* MQ Register (POWER only) */ + +typedef struct { +#ifdef _KERNEL + unsigned long long __fpu_regs[32]; /* FP0-31 */ +#else + double __fpu_regs[32]; /* FP0-31 */ +#endif + unsigned int __fpu_fpscr; /* FP Status and Control Register */ + unsigned int __fpu_valid; /* Set together with _UC_FPU */ +} __fpregset_t; + +#define _NVR 32 /* Number of Vector registers */ + +typedef struct { + union __vr { + unsigned char __vr8[16]; + unsigned short __vr16[8]; + unsigned int __vr32[4]; + unsigned char __spe8[8]; + unsigned short __spe16[4]; + unsigned int __spe32[2]; + } __vrs[_NVR] __aligned(16); + unsigned int __vscr; /* VSCR */ + unsigned int __vrsave; /* VRSAVE */ +} __vrf_t; + +typedef struct { + __gregset_t __gregs; /* General Purpose Register set */ + __fpregset_t __fpregs; /* Floating Point Register set */ + __vrf_t __vrf; /* Vector Register File */ +} mcontext_t; + +#if defined(_LP64) +typedef int __greg32_t; +typedef __greg32_t __gregset32_t[_NGREG]; + +typedef struct { + __gregset32_t __gregs; /* General Purpose Register set */ + __fpregset_t __fpregs; /* Floating Point Register set */ + __vrf_t __vrf; /* Vector Register File */ +} mcontext32_t; +#endif + +/* Machine-dependent uc_flags */ +#define _UC_POWERPC_VEC _UC_MD_BIT16 /* Vector Register File valid */ +#define _UC_POWERPC_SPE _UC_MD_BIT17 /* Vector Register File valid */ +#define _UC_TLSBASE _UC_MD_BIT19 /* thread context valid in R2 */ +#define _UC_SETSTACK _UC_MD_BIT20 +#define _UC_CLRSTACK _UC_MD_BIT21 + +#define _UC_MACHINE_SP(uc) ((uc)->uc_mcontext.__gregs[_REG_R1]) +#define _UC_MACHINE_FP(uc) ((uc)->uc_mcontext.__gregs[_REG_R31]) +#define _UC_MACHINE_PC(uc) ((uc)->uc_mcontext.__gregs[_REG_PC]) +#define _UC_MACHINE_INTRV(uc) ((uc)->uc_mcontext.__gregs[_REG_R3]) + +#define _UC_MACHINE_SET_PC(uc, pc) _UC_MACHINE_PC(uc) = (pc) + +#endif /* !_POWERPC_MCONTEXT_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/powerpc-netbsd-eabi/powerpc/mutex.h b/lib/libc/include/powerpc-netbsd-eabi/powerpc/mutex.h @@ -0,0 +1,73 @@ +/* $NetBSD: mutex.h,v 1.8 2023/07/12 12:50:13 riastradh Exp $ */ + +/*- + * Copyright (c) 2002, 2007 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Jason R. Thorpe and Andrew Doran. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _POWERPC_MUTEX_H_ +#define _POWERPC_MUTEX_H_ + +#include <sys/types.h> + +#ifdef __MUTEX_PRIVATE +#include <sys/intr.h> +#include <machine/intr.h> +#endif + +struct kmutex { + union { +#ifdef __MUTEX_PRIVATE + struct { + volatile uintptr_t mtxm_owner; + ipl_cookie_t mtxm_ipl; + __cpu_simple_lock_t mtxm_lock; + } m; +#endif + struct { + uintptr_t mtxp_a; + uint32_t mtxp_b[2]; + } p; + } u; +}; + +#ifdef __MUTEX_PRIVATE + +#define mtx_owner u.m.mtxm_owner +#define mtx_ipl u.m.mtxm_ipl +#define mtx_lock u.m.mtxm_lock + +#define __HAVE_SIMPLE_MUTEXES 1 +#define __HAVE_MUTEX_STUBS 1 + +#define MUTEX_CAS(p, o, n) _lock_cas((p), (o), (n)) + +int _lock_cas(volatile uintptr_t *, uintptr_t, uintptr_t); + +#endif /* __MUTEX_PRIVATE */ + +#endif /* _POWERPC_MUTEX_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/powerpc/oea/bat.h b/lib/libc/include/powerpc-netbsd-eabi/powerpc/oea/bat.h diff --git a/lib/libc/include/powerpc-netbsd-eabi/powerpc/oea/hid.h b/lib/libc/include/powerpc-netbsd-eabi/powerpc/oea/hid.h @@ -0,0 +1,193 @@ +/* $NetBSD: hid.h,v 1.15 2024/03/10 17:07:31 rillig Exp $ */ + +/*- + * Copyright (c) 2000 Tsubai Masanari. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _POWERPC_OEA_HID_H_ +#define _POWERPC_OEA_HID_H_ + +#ifdef _KERNEL_OPT +#include "opt_ppcarch.h" +#endif + +/* Hardware Implementation Dependent registers for the PowerPC */ + +#if defined(_ARCH_PPC64) || defined (PPC_OEA64_BRIDGE) +/* this way we can use the same bit numbers as IBM's PowerPC manuals */ +#define HIDBIT(x) (0x8000000000000000LL >> x) +#define HID0_64_ONE_PPC HIDBIT(0) /* one instruction per dispatch group */ +#define HID0_64_DO_SNGL HIDBIT(1) /* single group completion mode */ +#define HID0_64_ISYNCSC HIDBIT(2) /* Disable isync scoreboard optimization */ +#define HID0_64_SER_GP HIDBIT(3) /* Serialize group dispatch */ +#define HID0_64_DEEPNAP HIDBIT(7) /* Enable deep nap mode (970) */ +#define HID0_64_DOZE HIDBIT(8) /* Enable doze mode */ +#define HID0_64_NAP HIDBIT(9) /* Enable nap mode */ +#define HID0_64_DPM HIDBIT(11) /* Enable Dynamic power management */ +#define HID0_64_TG HIDBIT(13) /* Perfmon threshold granularity control */ +#define HID0_64_HNG_DIS HIDBIT(14) /* Disable processor hang-detection */ +#define HID0_64_NHR HIDBIT(15) /* No Hard Reset */ +#define HID0_64_INORDER HIDBIT(16) /* Serialized group issue mode */ +#define HID0_64_TB_CTRL HIDBIT(18) /* TB keeps running if CPU stopped */ +#define HID0_64_EX_TBEN HIDBIT(19) /* timebase runs at external clock */ +#define HID0_64_CIABREN HIDBIT(22) /* enable CIABR register */ +#define HID0_64_HDICEEN HIDBIT(23) /* hypervisor decrementer enable */ +#define HID0_64_EN_ATTN HIDBIT(31) /* support processor attention inst. */ +#define HID0_64_EN_MCHK HIDBIT(32) /* ext. mchk interrupts */ +#endif +#define HID0_EMCP 0x80000000 /* Enable MCP */ +#define HID0_DBP 0x40000000 /* Disable 60x bus parity generation */ +#define HID0_EBA 0x20000000 /* Enable 60x bus address parity checking */ +#define HID0_EBD 0x10000000 /* Enable 60x bus data parity checking */ +#define HID0_BCLK 0x08000000 /* CLK_OUT clock type selection */ +#define HID0_EICE 0x04000000 /* Enable ICE output */ +#define HID0_TBEN 0x04000000 /* Time base enable (7450) */ +#define HID0_ECLK 0x02000000 /* CLK_OUT clock type selection */ +#define HID0_PAR 0x01000000 /* Disable precharge of ARTRY */ +#define HID0_STEN 0x01000000 /* Software table search enable (7450) */ +#define HID0_DOZE 0x00800000 /* Enable doze mode */ +#define HID0_HIGH_BAT_EN 0x00800000 /* Enable additional BATs (74[45][578]) */ +#define HID0_NAP 0x00400000 /* Enable nap mode */ +#define HID0_SLEEP 0x00200000 /* Enable sleep mode */ +#define HID0_DPM 0x00100000 /* Enable Dynamic power management */ +#define HID0_RISEG 0x00080000 /* Read I-SEG */ +#define HID0_BHTCLR 0x00040000 /* Clear branch history table (7450) */ +#define HID0_EIEC 0x00040000 /* Enable internal error checking */ +#define HID0_XAEN 0x00020000 /* Enable eXtended Addressing (7450) */ +#define HID0_NHR 0x00010000 /* Not hard reset */ +#define HID0_ICE 0x00008000 /* Enable i-cache */ +#define HID0_DCE 0x00004000 /* Enable d-cache */ +#define HID0_ILOCK 0x00002000 /* i-cache lock */ +#define HID0_DLOCK 0x00001000 /* d-cache lock */ +#define HID0_ICFI 0x00000800 /* i-cache flash invalidate */ +#define HID0_DCFI 0x00000400 /* d-cache flash invalidate */ +#define HID0_SPD 0x00000200 /* Disable speculative cache access */ +#define HID0_IFEM 0x00000100 /* Enable M-bit for I-fetch */ +#define HID0_XBSEN 0x00000100 /* Extended BAT block size enable (7455+) */ +#define HID0_SGE 0x00000080 /* Enable store gathering */ +#define HID0_DCFA 0x00000040 /* Data cache flush assist */ +#define HID0_BTIC 0x00000020 /* Enable BTIC */ +#define HID0_LRSTK 0x00000010 /* Link register stack enable (7450) */ +#define HID0_ABE 0x00000008 /* Enable address broadcast */ +#define HID0_FOLD 0x00000008 /* Branch folding enable (7450) */ +#define HID0_BHT 0x00000004 /* Enable branch history table */ +#define HID0_BTCD 0x00000002 /* Branch target addr cache disable (604) */ +#define HID0_NOPTI 0x00000001 /* No-op the dcbt(st) */ + +#define HID0_BITMASK "\020" \ + "\040EMCP\037DBP\036EBA\035EBD\034BCLK\033EICE\032ECLK\031PAR" \ + "\030DOZE\027NAP\026SLEEP\025DPM\024RISEG\023EIEC\022res\021NHR" \ + "\020ICE\017DCE\016ILOCK\015DLOCK\014ICFI\013DCFI\012SPD\011IFEM" \ + "\010SGE\007DCFA\006BTIC\005FBIOB\004ABE\003BHT\002NOPDST\001NOPTI" + +#define HID0_7450_BITMASK "\020" \ + "\040EMCP\037b1\036b2\035b3\034b4\033TBEN\032b6\031STEN" \ + "\030HIGH_BAT_EN\027NAP\026SLEEP\025DPM\024b12\023BHTCLR\022XAEN\021NHR" \ + "\020ICE\017DCE\016ILOCK\015DLOCK\014ICFI\013DCFI\012SPD\011XBSEN" \ + "\010SGE\007b25\006BTIC\005LRSTK\004FOLD\003BHT\002NOPDST\001NOPTI" + +#define HID0_970_BITMASK "\020" \ + "\040EMCP" + +#define HID0_970_BITMASK_U "\020" \ + "\040ONEPPC\037DOSNGL\036ISYNCSC\035SERGP\034res\033res\032res\031DEEPNAP" \ + "\030DOZE\027NAP\026res\025DPM\024res\023TG\022HNGDIS\021NHR" \ + "\020INORDER\017res\016TBCTRL\015EXTBEN\014res\013res\012CIABREN\011HDICEEN" \ + "\001ENATTN" +/* + * HID0 bit definitions per CPU model + * + * bit 603 604 750 7400 7410 7450 + * 0 EMCP EMCP EMCP EMCP EMCP - + * 1 - ECP DBP - - - + * 2 EBA EBA EBA EBA EDA - + * 3 EBD EBD EBD EBD EBD - + * 4 SBCLK - BCLK BCKL BCLK - + * 5 EICE - - - - TBEN + * 6 ECLK - ECLK ECLK ECLK - + * 7 PAR PAR PAR PAR PAR STEN + * 8 DOZE - DOZE DOZE DOZE HIGH_BAT_EN + * 9 NAP - NAP NAP NAP NAP + * 10 SLEEP - SLEEP SLEEP SLEEP SLEEP + * 11 DPM - DPM DPM DPM DPM + * 12 RISEG - - RISEG - - + * 13 - - - EIEC EIEC BHTCLR + * 14 - - - - - XAEN + * 15 - NHR NHR NHR NHR NHR + * 16 ICE ICE ICE ICE ICE ICE + * 17 DCE DCE DCE DCE DCE DCE + * 18 ILOCK ILOCK ILOCK ILOCK ILOCK ILOCK + * 19 DLOCK DLOCK DLOCK DLOCK DLOCK DLOCK + * 20 ICFI ICFI ICFI ICFI ICFI ICFI + * 21 DCFI DCFI DCFI DCFI DCFI DCFI + * 22 - - SPD SPD SPG SPD + * 23 - - IFEM IFTT IFTT XBSEN + * 24 - SIE SGE SGE SGE SGE + * 25 - - DCFA DCFA DCFA - + * 26 - - BTIC BTIC BTIC BTIC + * 27 FBIOB - - - - LRSTK + * 28 - - ABE - - FOLD + * 29 - BHT BHT BHT BHT BHT + * 30 - BTCD - NOPDST NOPDST NOPDST + * 31 NOOPTI - NOOPTI NOPTI NOPTI NOPTI + * + * 604: ECP = Enable cache parity checking + * 604: SIE = Serial instruction execution disable + * 604: BTCD = Branch target address cache disable + * 7450: TBEN = Time Base Enable + * 7450: STEN = Software table lookup enable + * 7450: BHTCLR = Branch history clear + * 7450: LRSTK = Link Register Stack Enable + * 7450: FOLD = Branch folding enable + */ + +#define HID1_EMCP 0x80000000 /* Machine Check Signal Enable */ +#define HID1_EBA 0x20000000 /* Enable/Disable 60x/MPX Bus Address + Parity Checking */ +#define HID1_EBD 0x10000000 /* Enable/Disable 60x/MPX Bus Data + Parity Checking */ +#define HID1_BCLK 0x08000000 /* CLK_OUT */ +#define HID1_ECLK 0x02000000 /* CLK_OUT */ +#define HID1_PAR 0x01000000 /* Disable Precharge for ... */ +#define HID1_DFS4 0x00800000 /* Dynamic Freq Switch / 4 (7448) */ +#define HID1_DFS2 0x00400000 /* Dynamic Freq Switch / 2 (7447A) */ +#define HID1_SYNCBE 0x00000800 /* Enable sync/eieio broadcast */ +#define HID1_ABE 0x00000400 /* Enable address broadcast */ + +/* PPC970 HID4 */ +#define HID4_RMLR0 0x0000000000000020 /* real mode limit bit 0 */ +#define HID4_RMLR1 0x4000000000000000 /* real mode limit bit 1 */ +#define HID4_RMLR2 0x2000000000000000 /* real mode limit bit 2 */ +/* + * real mode limit bits 012 + * 011 - 64MB + * 111 - 128MB + * 100 - 256MB + * x10 - 1GB + * x01 - 16GB + * 000 - 256GB + */ + +#endif /* _POWERPC_OEA_HID_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/powerpc/oea/hid_601.h b/lib/libc/include/powerpc-netbsd-eabi/powerpc/oea/hid_601.h diff --git a/lib/libc/include/powerpc-netbsd-eabi/powerpc/oea/pmap.h b/lib/libc/include/powerpc-netbsd-eabi/powerpc/oea/pmap.h @@ -0,0 +1,292 @@ +/* $NetBSD: pmap.h,v 1.39 2023/12/15 09:42:33 rin Exp $ */ + +/*- + * Copyright (C) 1995, 1996 Wolfgang Solfrank. + * Copyright (C) 1995, 1996 TooLs GmbH. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by TooLs GmbH. + * 4. The name of TooLs GmbH may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _POWERPC_OEA_PMAP_H_ +#define _POWERPC_OEA_PMAP_H_ + +#ifdef _LOCORE +#error use assym.h instead +#endif + +#ifdef _MODULE +#error this file should not be included by loadable kernel modules +#endif + +#ifdef _KERNEL_OPT +#include "opt_ppcarch.h" +#include "opt_modular.h" +#endif +#include <powerpc/oea/pte.h> + +#define __HAVE_PMAP_PV_TRACK +#include <uvm/pmap/pmap_pvt.h> + +/* + * Pmap stuff + */ +struct pmap { +#ifdef PPC_OEA64 + struct steg *pm_steg_table; /* segment table pointer */ + /* XXX need way to track exec pages */ +#endif + +#if defined(PPC_OEA) || defined (PPC_OEA64_BRIDGE) + register_t pm_sr[16]; /* segments used in this pmap */ + int pm_exec[16]; /* counts of exec mappings */ +#endif + register_t pm_vsid; /* VSID bits */ + int pm_refs; /* ref count */ + struct pmap_statistics pm_stats; /* pmap statistics */ + unsigned int pm_evictions; /* pvo's not in page table */ + +#ifdef PPC_OEA64 + unsigned int pm_ste_evictions; +#endif +}; + +struct pmap_ops { + int (*pmapop_pte_spill)(struct pmap *, vaddr_t, bool); + void (*pmapop_real_memory)(paddr_t *, psize_t *); + void (*pmapop_init)(void); + void (*pmapop_virtual_space)(vaddr_t *, vaddr_t *); + pmap_t (*pmapop_create)(void); + void (*pmapop_reference)(pmap_t); + void (*pmapop_destroy)(pmap_t); + void (*pmapop_copy)(pmap_t, pmap_t, vaddr_t, vsize_t, vaddr_t); + void (*pmapop_update)(pmap_t); + int (*pmapop_enter)(pmap_t, vaddr_t, paddr_t, vm_prot_t, u_int); + void (*pmapop_remove)(pmap_t, vaddr_t, vaddr_t); + void (*pmapop_kenter_pa)(vaddr_t, paddr_t, vm_prot_t, u_int); + void (*pmapop_kremove)(vaddr_t, vsize_t); + bool (*pmapop_extract)(pmap_t, vaddr_t, paddr_t *); + + void (*pmapop_protect)(pmap_t, vaddr_t, vaddr_t, vm_prot_t); + void (*pmapop_unwire)(pmap_t, vaddr_t); + void (*pmapop_page_protect)(struct vm_page *, vm_prot_t); + void (*pmapop_pv_protect)(paddr_t, vm_prot_t); + bool (*pmapop_query_bit)(struct vm_page *, int); + bool (*pmapop_clear_bit)(struct vm_page *, int); + + void (*pmapop_activate)(struct lwp *); + void (*pmapop_deactivate)(struct lwp *); + + void (*pmapop_pinit)(pmap_t); + void (*pmapop_procwr)(struct proc *, vaddr_t, size_t); + + void (*pmapop_pte_print)(volatile struct pte *); + void (*pmapop_pteg_check)(void); + void (*pmapop_print_mmuregs)(void); + void (*pmapop_print_pte)(pmap_t, vaddr_t); + void (*pmapop_pteg_dist)(void); + void (*pmapop_pvo_verify)(void); + vaddr_t (*pmapop_steal_memory)(vsize_t, vaddr_t *, vaddr_t *); + void (*pmapop_bootstrap)(paddr_t, paddr_t); + void (*pmapop_bootstrap1)(paddr_t, paddr_t); + void (*pmapop_bootstrap2)(void); +}; + +#ifdef _KERNEL +#include <sys/cdefs.h> +__BEGIN_DECLS +#include <sys/param.h> +#include <sys/systm.h> + +/* + * For OEA and OEA64_BRIDGE, we guarantee that pa below USER_ADDR + * (== 3GB < VM_MIN_KERNEL_ADDRESS) is direct-mapped. + */ +#if defined(PPC_OEA) || defined(PPC_OEA64_BRIDGE) +#define PMAP_DIRECT_MAPPED_SR (USER_SR - 1) +#define PMAP_DIRECT_MAPPED_LEN \ + ((vaddr_t)SEGMENT_LENGTH * (PMAP_DIRECT_MAPPED_SR + 1)) +#endif + +#if defined (PPC_OEA) || defined (PPC_OEA64_BRIDGE) +extern register_t iosrtable[]; +#endif +extern int pmap_use_altivec; + +#define pmap_clear_modify(pg) (pmap_clear_bit((pg), PTE_CHG)) +#define pmap_clear_reference(pg) (pmap_clear_bit((pg), PTE_REF)) +#define pmap_is_modified(pg) (pmap_query_bit((pg), PTE_CHG)) +#define pmap_is_referenced(pg) (pmap_query_bit((pg), PTE_REF)) + +#define pmap_resident_count(pmap) ((pmap)->pm_stats.resident_count) +#define pmap_wired_count(pmap) ((pmap)->pm_stats.wired_count) + +/* ARGSUSED */ +static __inline bool +pmap_remove_all(struct pmap *pmap) +{ + /* Nothing. */ + return false; +} + +#if (defined(PPC_OEA) + defined(PPC_OEA64) + defined(PPC_OEA64_BRIDGE)) != 1 +#define PMAP_NEEDS_FIXUP +#endif + +extern volatile struct pteg *pmap_pteg_table; +extern unsigned int pmap_pteg_cnt; +extern unsigned int pmap_pteg_mask; + +void pmap_bootstrap(vaddr_t, vaddr_t); +void pmap_bootstrap1(vaddr_t, vaddr_t); +void pmap_bootstrap2(void); +bool pmap_extract(pmap_t, vaddr_t, paddr_t *); +bool pmap_query_bit(struct vm_page *, int); +bool pmap_clear_bit(struct vm_page *, int); +void pmap_real_memory(paddr_t *, psize_t *); +void pmap_procwr(struct proc *, vaddr_t, size_t); +int pmap_pte_spill(pmap_t, vaddr_t, bool); +int pmap_ste_spill(pmap_t, vaddr_t, bool); +void pmap_pinit(pmap_t); + +#ifdef PPC_OEA601 +bool pmap_extract_ioseg601(vaddr_t, paddr_t *); +#endif /* PPC_OEA601 */ +#ifdef PPC_OEA +bool pmap_extract_battable(vaddr_t, paddr_t *); +#endif /* PPC_OEA */ + +u_int powerpc_mmap_flags(paddr_t); +#define POWERPC_MMAP_FLAG_MASK 0xf +#define POWERPC_MMAP_FLAG_PREFETCHABLE 0x1 +#define POWERPC_MMAP_FLAG_CACHEABLE 0x2 + +#define pmap_phys_address(ppn) (ppn & ~POWERPC_MMAP_FLAG_MASK) +#define pmap_mmap_flags(ppn) powerpc_mmap_flags(ppn) + +static __inline paddr_t vtophys (vaddr_t); + +/* + * Alternate mapping hooks for pool pages. Avoids thrashing the TLB. + * + * Note: This won't work if we have more memory than can be direct-mapped + * VA==PA all at once. But pmap_copy_page() and pmap_zero_page() will have + * this problem, too. + */ +#if !defined(PPC_OEA64) +#define PMAP_MAP_POOLPAGE(pa) (pa) +#define PMAP_UNMAP_POOLPAGE(pa) (pa) +#define POOL_VTOPHYS(va) vtophys((vaddr_t) va) + +#define PMAP_ALLOC_POOLPAGE(flags) pmap_alloc_poolpage(flags) +struct vm_page *pmap_alloc_poolpage(int); +#endif + +static __inline paddr_t +vtophys(vaddr_t va) +{ + paddr_t pa; + + if (pmap_extract(pmap_kernel(), va, &pa)) + return pa; + KASSERTMSG(0, "vtophys: pmap_extract of %#"PRIxVADDR" failed", va); + return (paddr_t) -1; +} + + +#ifdef PMAP_NEEDS_FIXUP +extern const struct pmap_ops *pmapops; +extern const struct pmap_ops pmap32_ops; +extern const struct pmap_ops pmap64_ops; +extern const struct pmap_ops pmap64bridge_ops; + +static __inline void +pmap_setup32(void) +{ + pmapops = &pmap32_ops; +} + +static __inline void +pmap_setup64(void) +{ + pmapops = &pmap64_ops; +} + +static __inline void +pmap_setup64bridge(void) +{ + pmapops = &pmap64bridge_ops; +} +#endif + +bool pmap_pageidlezero (paddr_t); +void pmap_syncicache (paddr_t, psize_t); +#ifdef PPC_OEA64 +vaddr_t pmap_setusr (vaddr_t); +vaddr_t pmap_unsetusr (void); +#endif + +#ifdef PPC_OEA64_BRIDGE +int pmap_setup_segment0_map(int use_large_pages, ...); +#endif + +#define PMAP_MD_PREFETCHABLE 0x2000000 +#define PMAP_STEAL_MEMORY +#define PMAP_NEED_PROCWR + +void pmap_zero_page(paddr_t); +void pmap_copy_page(paddr_t, paddr_t); + +LIST_HEAD(pvo_head, pvo_entry); + +#define __HAVE_VM_PAGE_MD + +struct pmap_page { + unsigned int pp_attrs; + struct pvo_head pp_pvoh; +#ifdef MODULAR + uintptr_t pp_dummy[3]; +#endif +}; + +struct vm_page_md { + struct pmap_page mdpg_pp; +#define mdpg_attrs mdpg_pp.pp_attrs +#define mdpg_pvoh mdpg_pp.pp_pvoh +#ifdef MODULAR +#define mdpg_dummy mdpg_pp.pp_dummy +#endif +}; + +#define VM_MDPAGE_INIT(pg) do { \ + (pg)->mdpage.mdpg_attrs = 0; \ + LIST_INIT(&(pg)->mdpage.mdpg_pvoh); \ +} while (/*CONSTCOND*/0) + +__END_DECLS +#endif /* _KERNEL */ + +#endif /* _POWERPC_OEA_PMAP_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/powerpc/oea/pte.h b/lib/libc/include/powerpc-netbsd-eabi/powerpc/oea/pte.h diff --git a/lib/libc/include/generic-netbsd/powerpc/oea/spr.h b/lib/libc/include/powerpc-netbsd-eabi/powerpc/oea/spr.h diff --git a/lib/libc/include/generic-netbsd/powerpc/oea/sr_601.h b/lib/libc/include/powerpc-netbsd-eabi/powerpc/oea/sr_601.h diff --git a/lib/libc/include/generic-netbsd/powerpc/oea/vmparam.h b/lib/libc/include/powerpc-netbsd-eabi/powerpc/oea/vmparam.h diff --git a/lib/libc/include/generic-netbsd/powerpc/param.h b/lib/libc/include/powerpc-netbsd-eabi/powerpc/param.h diff --git a/lib/libc/include/generic-netbsd/powerpc/pcb.h b/lib/libc/include/powerpc-netbsd-eabi/powerpc/pcb.h diff --git a/lib/libc/include/powerpc-netbsd-eabi/powerpc/pmap.h b/lib/libc/include/powerpc-netbsd-eabi/powerpc/pmap.h @@ -0,0 +1,57 @@ +/* $NetBSD: pmap.h,v 1.43 2023/12/15 09:43:59 rin Exp $ */ + +#ifndef _POWERPC_PMAP_H_ +#define _POWERPC_PMAP_H_ + +#ifdef _KERNEL_OPT +#include "opt_ppcarch.h" +#include "opt_modular.h" +#endif + +#if !defined(_MODULE) + +#if defined(PPC_BOOKE) +#include <powerpc/booke/pmap.h> +#elif defined(PPC_IBM4XX) +#include <powerpc/ibm4xx/pmap.h> +#elif defined(PPC_OEA) || defined (PPC_OEA64) || defined (PPC_OEA64_BRIDGE) +#include <powerpc/oea/pmap.h> +#elif defined(_KERNEL) +#error unknown PPC variant +#endif + +#ifndef PMAP_DIRECT_MAPPED_LEN +#define PMAP_DIRECT_MAPPED_LEN (~0UL) +#endif + +#endif /* !_MODULE */ + +#if !defined(_LOCORE) && (defined(MODULAR) || defined(_MODULE)) +/* + * Both BOOKE and OEA use __HAVE_VM_PAGE_MD but IBM4XX doesn't so define + * a compatible vm_page_md so that struct vm_page is the same size for all + * PPC variants. + */ +#ifndef __HAVE_VM_PAGE_MD +#define __HAVE_VM_PAGE_MD +#define VM_MDPAGE_INIT(pg) __nothing + +struct vm_page_md { + uintptr_t mdpg_dummy[5]; +}; +#endif /* !__HAVE_VM_PAGE_MD */ + +__CTASSERT(sizeof(struct vm_page_md) == sizeof(uintptr_t)*5); + +#ifndef __HAVE_PMAP_PV_TRACK +/* + * We need empty stubs for modules shared with all sub-archs. + */ +#define __HAVE_PMAP_PV_TRACK +#define PMAP_PV_TRACK_ONLY_STUBS +#include <uvm/pmap/pmap_pvt.h> +#endif /* !__HAVE_PMAP_PV_TRACK */ + +#endif /* !LOCORE && (MODULAR || _MODULE) */ + +#endif /* !_POWERPC_PMAP_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/powerpc/proc.h b/lib/libc/include/powerpc-netbsd-eabi/powerpc/proc.h diff --git a/lib/libc/include/generic-netbsd/powerpc/profile.h b/lib/libc/include/powerpc-netbsd-eabi/powerpc/profile.h diff --git a/lib/libc/include/powerpc-netbsd-eabi/powerpc/psl.h b/lib/libc/include/powerpc-netbsd-eabi/powerpc/psl.h @@ -0,0 +1,131 @@ +/* $NetBSD: psl.h,v 1.23 2024/02/08 20:51:24 andvar Exp $ */ + +/* + * Copyright (C) 1995, 1996 Wolfgang Solfrank. + * Copyright (C) 1995, 1996 TooLs GmbH. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by TooLs GmbH. + * 4. The name of TooLs GmbH may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _POWERPC_PSL_H_ +#define _POWERPC_PSL_H_ + +/* + * Machine State Register (MSR) + * + * The PowerPC 601 does not implement the following bits: + * + * VEC, POW, ILE, BE, RI, LE[*] + * + * [*] Little-endian mode on the 601 is implemented in the HID0 register. + */ +#define PSL_VEC 0x02000000 /* ..6. AltiVec vector unit available */ +#define PSL_SPV 0x02000000 /* B... (e500) SPE enable */ +#define PSL_UCLE 0x00400000 /* B... user-mode cache lock enable */ +#define PSL_POW 0x00040000 /* ..6. power management */ +#define PSL_WE PSL_POW /* B4.. wait state enable */ +#define PSL_TGPR 0x00020000 /* ..6. temp. gpr remapping (mpc603e) */ +#define PSL_CE PSL_TGPR /* B4.. critical interrupt enable */ +#define PSL_ILE 0x00010000 /* ..6. interrupt endian mode (1 == le) */ +#define PSL_EE 0x00008000 /* B468 external interrupt enable */ +#define PSL_PR 0x00004000 /* B468 privilege mode (1 == user) */ +#define PSL_FP 0x00002000 /* B.6. floating point enable */ +#define PSL_ME 0x00001000 /* B468 machine check enable */ +#define PSL_FE0 0x00000800 /* B.6. floating point mode 0 */ +#define PSL_SE 0x00000400 /* ..6. single-step trace enable */ +#define PSL_DWE PSL_SE /* .4.. debug wait enable */ +#define PSL_UBLE PSL_SE /* B... user BTB lock enable */ +#define PSL_BE 0x00000200 /* ..6. branch trace enable */ +#define PSL_DE PSL_BE /* B4.. debug interrupt enable */ +#define PSL_FE1 0x00000100 /* B.6. floating point mode 1 */ +#define PSL_IP 0x00000040 /* ..6. interrupt prefix */ +#define PSL_IR 0x00000020 /* .468 instruction address relocation */ +#define PSL_IS PSL_IR /* B... instruction address space */ +#define PSL_DR 0x00000010 /* .468 data address relocation */ +#define PSL_DS PSL_DR /* B... data address space */ +#define PSL_PM 0x00000008 /* ..6. Performance monitor */ +#define PSL_PMM PSL_PM /* B... Performance monitor */ +#define PSL_RI 0x00000002 /* ..6. recoverable interrupt */ +#define PSL_LE 0x00000001 /* ..6. endian mode (1 == le) */ + +#define PSL_601_MASK ~(PSL_VEC|PSL_POW|PSL_ILE|PSL_BE|PSL_RI|PSL_LE) + +/* The IBM 970 series does not implement LE mode */ +#define PSL_970_MASK ~(PSL_ILE|PSL_LE) + +/* + * Floating-point exception modes: + */ +#define PSL_FE_DIS 0 /* none */ +#define PSL_FE_NONREC PSL_FE1 /* imprecise non-recoverable */ +#define PSL_FE_REC PSL_FE0 /* imprecise recoverable */ +#define PSL_FE_PREC (PSL_FE0 | PSL_FE1) /* precise */ +#define PSL_FE_DFLT PSL_FE_DIS /* default == none */ + +/* + * Note that PSL_POW and PSL_ILE are not in the saved copy of the MSR + */ +#define PSL_MBO 0 +#define PSL_MBZ 0 + +/* + * A user is not allowed to change any MSR bits except the following: + * We restrict the test to the low 16 bits of the MSR since those are the + * only ones preserved in the trap. Note that this means PSL_VEC needs to + * be restored to SRR1 in userret. + */ +#if defined(_KERNEL) && !defined(_LOCORE) +#ifdef _KERNEL_OPT +#include "opt_ppcarch.h" +#endif /* _KERNEL_OPT */ + +#if defined(PPC_OEA) || defined (PPC_OEA64_BRIDGE) || defined (PPC_OEA64) \ + || defined(_MODULE) +extern register_t cpu_psluserset, cpu_pslusermod, cpu_pslusermask; + +#define PSL_USERSET cpu_psluserset +#define PSL_USERMOD cpu_pslusermod +#define PSL_USERMASK cpu_pslusermask +#elif defined(PPC_BOOKE) +#define PSL_USERSET (PSL_EE | PSL_PR | PSL_IS | PSL_DS | PSL_ME | PSL_CE) +#define PSL_USERMASK (PSL_SPV | PSL_CE | 0xFFFF) +#define PSL_USERMOD (0) +#else /* PPC_IBM4XX */ +#ifdef PPC_IBM403 +#define PSL_USERSET (PSL_EE | PSL_PR | PSL_IR | PSL_DR | PSL_ME) +#else /* Apparently we get unexplained machine checks, so disable them. */ +#define PSL_USERSET (PSL_EE | PSL_PR | PSL_IR | PSL_DR) +#endif +#define PSL_USERMASK 0xFFFF +#define PSL_USERMOD (0) +#endif + +#define PSL_USERSRR1 ((PSL_USERSET|PSL_USERMOD) & PSL_USERMASK) +#define PSL_USEROK_P(psl) (((psl) & ~PSL_USERMOD) == PSL_USERSET) +#endif /* !_LOCORE */ + +#endif /* _POWERPC_PSL_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/powerpc/pte.h b/lib/libc/include/powerpc-netbsd-eabi/powerpc/pte.h diff --git a/lib/libc/include/generic-netbsd/powerpc/ptrace.h b/lib/libc/include/powerpc-netbsd-eabi/powerpc/ptrace.h diff --git a/lib/libc/include/generic-netbsd/powerpc/reg.h b/lib/libc/include/powerpc-netbsd-eabi/powerpc/reg.h diff --git a/lib/libc/include/generic-netbsd/powerpc/reloc.h b/lib/libc/include/powerpc-netbsd-eabi/powerpc/reloc.h diff --git a/lib/libc/include/generic-netbsd/powerpc/rwlock.h b/lib/libc/include/powerpc-netbsd-eabi/powerpc/rwlock.h diff --git a/lib/libc/include/generic-netbsd/powerpc/setjmp.h b/lib/libc/include/powerpc-netbsd-eabi/powerpc/setjmp.h diff --git a/lib/libc/include/generic-netbsd/powerpc/signal.h b/lib/libc/include/powerpc-netbsd-eabi/powerpc/signal.h diff --git a/lib/libc/include/generic-netbsd/powerpc/sljit_machdep.h b/lib/libc/include/powerpc-netbsd-eabi/powerpc/sljit_machdep.h diff --git a/lib/libc/include/generic-netbsd/powerpc/spr.h b/lib/libc/include/powerpc-netbsd-eabi/powerpc/spr.h diff --git a/lib/libc/include/generic-netbsd/powerpc/trap.h b/lib/libc/include/powerpc-netbsd-eabi/powerpc/trap.h diff --git a/lib/libc/include/generic-netbsd/powerpc/types.h b/lib/libc/include/powerpc-netbsd-eabi/powerpc/types.h diff --git a/lib/libc/include/powerpc-netbsd-eabi/powerpc/vmparam.h b/lib/libc/include/powerpc-netbsd-eabi/powerpc/vmparam.h @@ -0,0 +1,95 @@ +/* $NetBSD: vmparam.h,v 1.27 2023/12/15 09:42:33 rin Exp $ */ + +#ifndef _POWERPC_VMPARAM_H_ +#define _POWERPC_VMPARAM_H_ + +#ifdef _KERNEL_OPT +#include "opt_modular.h" +#include "opt_ppcarch.h" +#endif + +/* + * These are common for BOOKE, IBM4XX, and OEA + */ +#define VM_FREELIST_DEFAULT 0 +#define VM_FREELIST_DIRECT_MAPPED 1 +#define VM_FREELIST_FIRST16 2 +#define VM_NFREELIST 3 + +#define VM_PHYSSEG_MAX 16 + +/* + * The address to which unspecified mapping requests default + * Put the stack in its own segment and start mmaping at the + * top of the next lower segment. + */ +#define __USE_TOPDOWN_VM +#define VM_DEFAULT_ADDRESS_BOTTOMUP(da, sz) \ + round_page((vaddr_t)(da) + (vsize_t)maxdmap) + +#if defined(MODULAR) || defined(_MODULE) || !defined(_KERNEL) +/* + * If we are a module or a modular kernel, then we need to defined the range + * of our variable page sizes since BOOKE and OEA use 4KB pages while IBM4XX + * use 16KB pages. + * This is also required for userland by jemalloc. + */ +#define MIN_PAGE_SHIFT 12 /* BOOKE/OEA */ +#define MAX_PAGE_SHIFT 14 /* IBM4XX */ +#define MIN_PAGE_SIZE (1 << MIN_PAGE_SHIFT) +#define MAX_PAGE_SIZE (1 << MAX_PAGE_SHIFT) +#endif /* MODULAR || _MODULE || !_KERNEL */ + +#if defined(_MODULE) +#if defined(_RUMPKERNEL) +/* + * Safe definitions for RUMP kernels + */ +#define VM_MAXUSER_ADDRESS 0x7fff8000 +#define VM_MIN_ADDRESS 0x00000000 +#define VM_MAX_ADDRESS VM_MAXUSER_ADDRESS +#define MAXDSIZ (1024*1024*1024) +#define MAXSSIZ (32*1024*1024) +#define MAXTSIZ (256*1024*1024) +#else /* !_RUMPKERNEL */ +/* + * Some modules need some of the constants but those vary between the variants + * so those constants are exported as linker symbols so they don't take up any + * space but also avoid an extra load to put into a register. + */ +extern const char __USRSTACK; /* let the linker resolve it */ + +#define USRSTACK ((vaddr_t)(uintptr_t)&__USRSTACK) +#endif /* !_RUMPKERNEL */ + +#else /* !_MODULE */ + +#if defined(PPC_BOOKE) +#include <powerpc/booke/vmparam.h> +#elif defined(PPC_IBM4XX) +#include <powerpc/ibm4xx/vmparam.h> +#elif defined(PPC_OEA) || defined (PPC_OEA64) || defined (PPC_OEA64_BRIDGE) +#include <powerpc/oea/vmparam.h> +#elif defined(_KERNEL) +#error unknown PPC variant +#endif + +#endif /* !_MODULE */ + +#if defined(MODULAR) || defined(_MODULE) +/* + * If we are a module or support modules, we need to define a compatible + * pmap_physseg since IBM4XX uses one. This will waste a tiny of space + * but is needed for compatibility. + */ +#ifndef __HAVE_PMAP_PHYSSEG +#define __HAVE_PMAP_PHYSSEG +struct pmap_physseg { + uintptr_t pmseg_dummy[2]; +}; +#endif + +__CTASSERT(sizeof(struct pmap_physseg) == sizeof(uintptr_t) * 2); +#endif /* MODULAR || _MODULE */ + +#endif /* !_POWERPC_VMPARAM_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/generic-netbsd/powerpc/wchar_limits.h b/lib/libc/include/powerpc-netbsd-eabi/powerpc/wchar_limits.h diff --git a/lib/libc/include/riscv32-netbsd-none/machine/bswap.h b/lib/libc/include/riscv32-netbsd-none/machine/bswap.h @@ -0,0 +1,11 @@ +/* $NetBSD: bswap.h,v 1.2 2024/08/04 08:16:25 skrll Exp $ */ + +#ifndef _RISCV_BSWAP_H_ +#define _RISCV_BSWAP_H_ + +#include <riscv/byte_swap.h> + +#define __BSWAP_RENAME +#include <sys/bswap.h> + +#endif /* _RISCV_BSWAP_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/riscv32-netbsd-none/machine/endian_machdep.h b/lib/libc/include/riscv32-netbsd-none/machine/endian_machdep.h @@ -0,0 +1,3 @@ +/* $NetBSD: endian_machdep.h,v 1.1 2014/09/19 17:36:26 matt Exp $ */ + +#define _BYTE_ORDER _LITTLE_ENDIAN +\ No newline at end of file diff --git a/lib/libc/include/riscv32-netbsd-none/machine/rwlock.h b/lib/libc/include/riscv32-netbsd-none/machine/rwlock.h @@ -0,0 +1 @@ +/* $NetBSD: rwlock.h,v 1.2 2019/11/29 20:04:53 riastradh Exp $ */ +\ No newline at end of file diff --git a/lib/libc/include/riscv32-netbsd-none/machine/wchar_limits.h b/lib/libc/include/riscv32-netbsd-none/machine/wchar_limits.h @@ -0,0 +1,4 @@ +/* $NetBSD: wchar_limits.h,v 1.2 2005/12/11 12:17:12 christos Exp $ */ + +// zig patch: https://github.com/llvm/llvm-project/issues/199678 +#include <riscv/wchar_limits.h> diff --git a/lib/libc/include/riscv64-netbsd-none/machine/bswap.h b/lib/libc/include/riscv64-netbsd-none/machine/bswap.h @@ -0,0 +1,11 @@ +/* $NetBSD: bswap.h,v 1.2 2024/08/04 08:16:25 skrll Exp $ */ + +#ifndef _RISCV_BSWAP_H_ +#define _RISCV_BSWAP_H_ + +#include <riscv/byte_swap.h> + +#define __BSWAP_RENAME +#include <sys/bswap.h> + +#endif /* _RISCV_BSWAP_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/riscv64-netbsd-none/machine/endian_machdep.h b/lib/libc/include/riscv64-netbsd-none/machine/endian_machdep.h @@ -0,0 +1,3 @@ +/* $NetBSD: endian_machdep.h,v 1.1 2014/09/19 17:36:26 matt Exp $ */ + +#define _BYTE_ORDER _LITTLE_ENDIAN +\ No newline at end of file diff --git a/lib/libc/include/riscv64-netbsd-none/machine/rwlock.h b/lib/libc/include/riscv64-netbsd-none/machine/rwlock.h @@ -0,0 +1 @@ +/* $NetBSD: rwlock.h,v 1.2 2019/11/29 20:04:53 riastradh Exp $ */ +\ No newline at end of file diff --git a/lib/libc/include/riscv64-netbsd-none/machine/wchar_limits.h b/lib/libc/include/riscv64-netbsd-none/machine/wchar_limits.h @@ -0,0 +1,4 @@ +/* $NetBSD: wchar_limits.h,v 1.2 2005/12/11 12:17:12 christos Exp $ */ + +// zig patch: https://github.com/llvm/llvm-project/issues/199678 +#include <riscv/wchar_limits.h> diff --git a/lib/libc/include/sparc-netbsd-none/float.h b/lib/libc/include/sparc-netbsd-none/float.h @@ -1,8 +1,10 @@ -/* $NetBSD: float.h,v 1.12 2009/11/25 08:43:15 martin Exp $ */ +/* $NetBSD: float.h,v 1.13 2024/10/30 15:56:12 riastradh Exp $ */ #ifndef _SPARC_FLOAT_H_ #define _SPARC_FLOAT_H_ +#include <sys/featuretest.h> + #ifdef _LP64 #define LDBL_MANT_DIG 113 diff --git a/lib/libc/include/sparc-netbsd-none/machine/asm.h b/lib/libc/include/sparc-netbsd-none/machine/asm.h @@ -1,4 +1,4 @@ -/* $NetBSD: asm.h,v 1.23 2020/04/17 14:19:44 joerg Exp $ */ +/* $NetBSD: asm.h,v 1.25 2025/01/06 10:46:44 martin Exp $ */ /* * Copyright (c) 1994 Allen Briggs @@ -157,10 +157,19 @@ #define ASMSTR .asciz #ifdef __ELF__ +#ifdef _NETBSD_REVISIONID #define RCSID(x) .pushsection ".ident","MS",@progbits,1; \ .asciz x; \ + .ascii "$"; .ascii "NetBSD: "; .ascii __FILE__; \ + .ascii " "; .ascii _NETBSD_REVISIONID; \ + .asciz " $"; \ .popsection #else +#define RCSID(x) .pushsection ".ident","MS",@progbits,1; \ + .asciz x; \ + .popsection +#endif +#else #define RCSID(name) .asciz name #endif diff --git a/lib/libc/include/sparc-netbsd-none/machine/cgtworeg.h b/lib/libc/include/sparc-netbsd-none/machine/cgtworeg.h @@ -1,4 +1,4 @@ -/* $NetBSD: cgtworeg.h,v 1.5 2003/05/20 13:38:00 nakayama Exp $ */ +/* $NetBSD: cgtworeg.h,v 1.6 2023/03/28 20:01:57 andvar Exp $ */ /* * Copyright (c) 1994 Dennis Ferguson @@ -119,7 +119,7 @@ struct cg2_extstatus { */ struct dblbufreg { u_int display_b : 1; /* display memory B (set) or A (reset) */ - u_int read_b : 1; /* accesss memory B (set) or A (reset) */ + u_int read_b : 1; /* access memory B (set) or A (reset) */ u_int nowrite_b : 1; /* when set, writes don't update memory B */ u_int nowrite_a : 1; /* when set, writes don't update memory A */ u_int read_ecmap : 1; /* copy from(clear)/to(set) shadow colour map */ diff --git a/lib/libc/include/sparc-netbsd-none/machine/cpu.h b/lib/libc/include/sparc-netbsd-none/machine/cpu.h @@ -1,4 +1,4 @@ -/* $NetBSD: cpu.h,v 1.110.4.1 2023/08/09 17:42:02 martin Exp $ */ +/* $NetBSD: cpu.h,v 1.111 2023/07/13 12:06:20 riastradh Exp $ */ /* * Copyright (c) 1992, 1993 diff --git a/lib/libc/include/sparc-netbsd-none/machine/float.h b/lib/libc/include/sparc-netbsd-none/machine/float.h @@ -1,8 +1,10 @@ -/* $NetBSD: float.h,v 1.12 2009/11/25 08:43:15 martin Exp $ */ +/* $NetBSD: float.h,v 1.13 2024/10/30 15:56:12 riastradh Exp $ */ #ifndef _SPARC_FLOAT_H_ #define _SPARC_FLOAT_H_ +#include <sys/featuretest.h> + #ifdef _LP64 #define LDBL_MANT_DIG 113 diff --git a/lib/libc/include/sparc-netbsd-none/machine/limits.h b/lib/libc/include/sparc-netbsd-none/machine/limits.h @@ -1,4 +1,4 @@ -/* $NetBSD: limits.h,v 1.23 2019/01/21 20:28:18 dholland Exp $ */ +/* $NetBSD: limits.h,v 1.25 2024/03/16 21:50:47 christos Exp $ */ /* * Copyright (c) 1988 The Regents of the University of California. @@ -75,11 +75,9 @@ #define SSIZE_MIN LONG_MIN /* min value for a ssize_t */ #define SIZE_T_MAX ULONG_MAX /* max value for a size_t */ -/* GCC requires that quad constants be written as expressions. */ -#define UQUAD_MAX ((u_quad_t)0-1) /* max value for a uquad_t */ - /* max value for a quad_t */ -#define QUAD_MAX ((quad_t)(UQUAD_MAX >> 1)) -#define QUAD_MIN (-QUAD_MAX-1) /* min value for a quad_t */ +#define UQUAD_MAX 0xffffffffffffffffULL /* max unsigned quad */ +#define QUAD_MAX 0x7fffffffffffffffLL /* max signed quad */ +#define QUAD_MIN (-0x7fffffffffffffffLL-1) /* min signed quad */ #endif /* _NETBSD_SOURCE */ #endif /* _POSIX_C_SOURCE || _XOPEN_SOURCE || _NETBSD_SOURCE */ diff --git a/lib/libc/include/sparc-netbsd-none/machine/lwp_private.h b/lib/libc/include/sparc-netbsd-none/machine/lwp_private.h @@ -0,0 +1,51 @@ +/* $NetBSD: lwp_private.h,v 1.1 2024/11/30 01:04:14 christos Exp $ */ + +/*- + * Copyright (c) 2001 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Klaus Klein. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _SPARC_LWP_PRIVATE_H_ +#define _SPARC_LWP_PRIVATE_H_ + +#include <sys/tls.h> + +__BEGIN_DECLS + +static __inline void * +__lwp_getprivate_fast(void) +{ + register void *__tmp; + + __asm volatile("mov %%g7, %0" : "=r" (__tmp)); + + return __tmp; +} + +__END_DECLS + +#endif /* !_SPARC_LWP_PRIVATE_H_ */ +\ No newline at end of file diff --git a/lib/libc/include/sparc-netbsd-none/machine/mcontext.h b/lib/libc/include/sparc-netbsd-none/machine/mcontext.h @@ -1,4 +1,4 @@ -/* $NetBSD: mcontext.h,v 1.18 2019/12/27 00:32:17 kamil Exp $ */ +/* $NetBSD: mcontext.h,v 1.22 2024/11/30 01:04:14 christos Exp $ */ /*- * Copyright (c) 2001 The NetBSD Foundation, Inc. @@ -32,9 +32,9 @@ #ifndef _SPARC_MCONTEXT_H_ #define _SPARC_MCONTEXT_H_ -#define _UC_SETSTACK 0x00010000 -#define _UC_CLRSTACK 0x00020000 -#define _UC_TLSBASE 0x00080000 +#define _UC_SETSTACK _UC_MD_BIT16 +#define _UC_CLRSTACK _UC_MD_BIT17 +#define _UC_TLSBASE _UC_MD_BIT19 /* * Layout of mcontext_t according the System V Application Binary Interface, @@ -161,22 +161,4 @@ do { \ (uc)->uc_mcontext.__gregs[_REG_nPC] = (pc) + 4; \ } while (/*CONSTCOND*/0) -#if defined(_RTLD_SOURCE) || defined(_LIBC_SOURCE) || \ - defined(__LIBPTHREAD_SOURCE__) -#include <sys/tls.h> - -__BEGIN_DECLS -static __inline void * -__lwp_getprivate_fast(void) -{ - register void *__tmp; - - __asm volatile("mov %%g7, %0" : "=r" (__tmp)); - - return __tmp; -} -__END_DECLS - -#endif - #endif /* !_SPARC_MCONTEXT_H_ */ \ No newline at end of file diff --git a/lib/libc/include/sparc-netbsd-none/machine/mutex.h b/lib/libc/include/sparc-netbsd-none/machine/mutex.h @@ -1,4 +1,4 @@ -/* $NetBSD: mutex.h,v 1.11.26.1 2023/08/09 17:42:02 martin Exp $ */ +/* $NetBSD: mutex.h,v 1.13 2023/07/12 12:50:13 riastradh Exp $ */ /*- * Copyright (c) 2002, 2006 The NetBSD Foundation, Inc. diff --git a/lib/libc/include/sparc-netbsd-none/machine/param.h b/lib/libc/include/sparc-netbsd-none/machine/param.h @@ -1,4 +1,4 @@ -/* $NetBSD: param.h,v 1.74 2020/05/01 08:21:27 isaki Exp $ */ +/* $NetBSD: param.h,v 1.76 2025/04/20 22:33:41 riastradh Exp $ */ /* * Copyright (c) 1992, 1993 @@ -60,6 +60,8 @@ #define SUN4_PGSHIFT 13 /* for a sun4 machine */ #define SUN4CM_PGSHIFT 12 /* for a sun4c or sun4m machine */ +#define STACK_ALIGNBYTES (8 - 1) + /* * The following variables are always defined and initialized (in locore) * so independently compiled modules (e.g. LKMs) can be used irrespective @@ -75,7 +77,7 @@ extern int nbpg, pgofset, pgshift; #else /* * JS1/OF has prom sitting in f000.0000..f007.ffff, modify kernel VA - * layout to work around that. XXX - kernel should live beyound prom on + * layout to work around that. XXX - kernel should live beyond prom on * those machines. */ #define KERNBASE 0xe8000000 diff --git a/lib/libc/include/sparc-netbsd-none/machine/pmap.h b/lib/libc/include/sparc-netbsd-none/machine/pmap.h @@ -1,4 +1,4 @@ -/* $NetBSD: pmap.h,v 1.97 2021/01/25 20:05:29 mrg Exp $ */ +/* $NetBSD: pmap.h,v 1.98 2024/03/23 18:48:31 andvar Exp $ */ /* * Copyright (c) 1996 @@ -74,7 +74,7 @@ struct vm_page; * User space begins at 0x00000000 and runs through 0x1fffffff, * then has a `hole', then resumes at 0xe0000000 and runs until it * hits the kernel space at 0xf8000000. This can be mapped - * contiguously by ignorning the top two bits and pretending the + * contiguously by ignoring the top two bits and pretending the * space goes from 0 to 37ffffff. Typically the lower range is * used for text+data and the upper for stack, but the code here * makes no such distinction. diff --git a/lib/libc/include/sparc-netbsd-none/machine/psl.h b/lib/libc/include/sparc-netbsd-none/machine/psl.h @@ -1,4 +1,4 @@ -/* $NetBSD: psl.h,v 1.50.4.1 2023/08/09 17:42:02 martin Exp $ */ +/* $NetBSD: psl.h,v 1.53 2024/04/07 17:08:00 rillig Exp $ */ /* * Copyright (c) 1992, 1993 @@ -113,8 +113,11 @@ #define PSTATE_IE 0x002 /* interrupt enable */ #define PSTATE_AG 0x001 /* enable alternate globals */ -#define PSTATE_BITS "\20\14IG\13MG\12CLE\11TLE\10\7MM\6RED\5PEF\4AM\3PRIV\2IE\1AG" - +#define PSTATE_BITS "\177\020" \ + "b\013IG\0" "b\012MG\0" "b\011CLE\0" "b\010TLE\0" \ + "F\006\002\0" ":\000MM_TSO\0" ":\001MM_PSO\0" \ + ":\002MM_RMO\0" "*?\0" "b\005RED\0" "b\004PEF\0" \ + "b\003AM\0" "b\002PRIV\0" "b\001IE\0" "b\000AG\0" /* * 32-bit code requires TSO or at best PSO since that's what's supported on diff --git a/lib/libc/include/sparc-netbsd-none/machine/sxreg.h b/lib/libc/include/sparc-netbsd-none/machine/sxreg.h @@ -1,4 +1,4 @@ -/* $NetBSD: sxreg.h,v 1.21 2021/12/10 20:36:03 andvar Exp $ */ +/* $NetBSD: sxreg.h,v 1.22 2024/05/12 13:43:27 macallan Exp $ */ /*- * Copyright (c) 2013 The NetBSD Foundation, Inc. @@ -195,6 +195,8 @@ SX_LONG | (dreg << 7) | (o)) #define SX_LDB(dreg, cnt, o) (0x80000000 | ((cnt) << 23) | SX_LOAD | \ SX_UBYTE_0 | (dreg << 7) | (o)) +#define SX_LDW(dreg, cnt, o) (0x80000000 | ((cnt) << 23) | SX_LOAD | \ + SX_USHORT_0 | (dreg << 7) | (o)) #define SX_LDP(dreg, cnt, o) (0x80000000 | ((cnt) << 23) | SX_LOAD | \ SX_PACKED | (dreg << 7) | (o)) #define SX_LDUQ0(dreg, cnt, o) (0x80000000 | ((cnt) << 23) | SX_LOAD | \ @@ -223,6 +225,8 @@ SX_UBYTE_0 | (sreg << 7) | (o)) #define SX_STBC(sreg, cnt, o) (0x80000000 | ((cnt) << 23) | SX_STORE_CLAMP | \ SX_UBYTE_0 | (sreg << 7) | (o)) +#define SX_STW(sreg, cnt, o) (0x80000000 | ((cnt) << 23) | SX_STORE | \ + SX_USHORT_0 | (sreg << 7) | (o)) #define SX_STP(sreg, cnt, o) (0x80000000 | ((cnt) << 23) | SX_STORE | \ SX_PACKED | (sreg << 7) | (o)) #define SX_STPS(sreg, cnt, o) (0x80000000 | ((cnt) << 23) | SX_STORE_SELECT | \ diff --git a/lib/libc/include/sparc-netbsd-none/machine/types.h b/lib/libc/include/sparc-netbsd-none/machine/types.h @@ -1,4 +1,4 @@ -/* $NetBSD: types.h,v 1.72 2022/07/30 14:13:27 riastradh Exp $ */ +/* $NetBSD: types.h,v 1.73 2023/03/20 11:07:33 martin Exp $ */ /* * Copyright (c) 1992, 1993 @@ -136,7 +136,7 @@ typedef unsigned long int __register_t; #define __HAVE_FAST_SOFTINTS #else #define __HAVE_MM_MD_READWRITE -#ifdef MULTIPROCESSOR +#if !defined(_KERNEL) || defined(MULTIPROCESSOR) #define __HAVE_HASHLOCKED_ATOMICS #endif #endif diff --git a/lib/libc/include/sparc-netbsd-none/sparc/sxreg.h b/lib/libc/include/sparc-netbsd-none/sparc/sxreg.h @@ -1,4 +1,4 @@ -/* $NetBSD: sxreg.h,v 1.21 2021/12/10 20:36:03 andvar Exp $ */ +/* $NetBSD: sxreg.h,v 1.22 2024/05/12 13:43:27 macallan Exp $ */ /*- * Copyright (c) 2013 The NetBSD Foundation, Inc. @@ -195,6 +195,8 @@ SX_LONG | (dreg << 7) | (o)) #define SX_LDB(dreg, cnt, o) (0x80000000 | ((cnt) << 23) | SX_LOAD | \ SX_UBYTE_0 | (dreg << 7) | (o)) +#define SX_LDW(dreg, cnt, o) (0x80000000 | ((cnt) << 23) | SX_LOAD | \ + SX_USHORT_0 | (dreg << 7) | (o)) #define SX_LDP(dreg, cnt, o) (0x80000000 | ((cnt) << 23) | SX_LOAD | \ SX_PACKED | (dreg << 7) | (o)) #define SX_LDUQ0(dreg, cnt, o) (0x80000000 | ((cnt) << 23) | SX_LOAD | \ @@ -223,6 +225,8 @@ SX_UBYTE_0 | (sreg << 7) | (o)) #define SX_STBC(sreg, cnt, o) (0x80000000 | ((cnt) << 23) | SX_STORE_CLAMP | \ SX_UBYTE_0 | (sreg << 7) | (o)) +#define SX_STW(sreg, cnt, o) (0x80000000 | ((cnt) << 23) | SX_STORE | \ + SX_USHORT_0 | (sreg << 7) | (o)) #define SX_STP(sreg, cnt, o) (0x80000000 | ((cnt) << 23) | SX_STORE | \ SX_PACKED | (sreg << 7) | (o)) #define SX_STPS(sreg, cnt, o) (0x80000000 | ((cnt) << 23) | SX_STORE_SELECT | \ diff --git a/lib/libc/include/sparc64-netbsd-none/machine/cpu.h b/lib/libc/include/sparc64-netbsd-none/machine/cpu.h @@ -1,4 +1,4 @@ -/* $NetBSD: cpu.h,v 1.133.4.1 2023/08/09 17:42:03 martin Exp $ */ +/* $NetBSD: cpu.h,v 1.135 2024/09/07 06:17:37 andvar Exp $ */ /* * Copyright (c) 1992, 1993 @@ -266,7 +266,7 @@ extern struct pool_cache *fpstate_cache; /* CURCPU_INT() a local (per CPU) view of our cpu_info */ #define CURCPU_INT() ((struct cpu_info *)CPUINFO_VA) -/* in general we prefer the globaly visible pointer */ +/* in general we prefer the globally visible pointer */ #define curcpu() (CURCPU_INT()->ci_self) #define cpu_number() (curcpu()->ci_index) #define CPU_IS_PRIMARY(ci) ((ci)->ci_flags & CPUF_PRIMARY) diff --git a/lib/libc/include/sparc64-netbsd-none/machine/ctlreg.h b/lib/libc/include/sparc64-netbsd-none/machine/ctlreg.h @@ -1,4 +1,4 @@ -/* $NetBSD: ctlreg.h,v 1.67 2019/11/13 10:06:38 nakayama Exp $ */ +/* $NetBSD: ctlreg.h,v 1.71 2024/03/10 17:34:47 rillig Exp $ */ /* * Copyright (c) 1996-2002 Eduardo Horvath @@ -286,14 +286,14 @@ /* SFSR bits for both D_SFSR and I_SFSR */ #define SFSR_ASI(x) ((x)>>16) -#define SFSR_FT_VA_OOR_2 0x02000 /* IMMU: jumpl or return to unsupportd VA */ +#define SFSR_FT_VA_OOR_2 0x02000 /* IMMU: jumpl or return to unsupported VA */ #define SFSR_FT_VA_OOR_1 0x01000 /* fault at unsupported VA */ #define SFSR_FT_NFO 0x00800 /* DMMU: Access to page marked NFO */ #define SFSR_ILL_ASI 0x00400 /* DMMU: Illegal (unsupported) ASI */ #define SFSR_FT_IO_ATOMIC 0x00200 /* DMMU: Atomic access to noncacheable page */ #define SFSR_FT_ILL_NF 0x00100 /* DMMU: NF load or flush to page marked E (has side effects) */ #define SFSR_FT_PRIV 0x00080 /* Privilege violation */ -#define SFSR_FT_E 0x00040 /* DMUU: value of E bit associated address */ +#define SFSR_FT_E 0x00040 /* DMMU: value of E bit associated address */ #define SFSR_CTXT(x) (((x)>>4)&0x3) #define SFSR_CTXT_IS_PRIM(x) (SFSR_CTXT(x)==0x00) #define SFSR_CTXT_IS_SECOND(x) (SFSR_CTXT(x)==0x01) @@ -306,9 +306,10 @@ SFSR_ILL_ASI|SFSR_FT_IO_ATOMIC|SFSR_FT_ILL_NF|SFSR_FT_PRIV) #define SFSR_BITS "\177\20" \ - "f\20\30ASI\0" "b\16VAT\0" "b\15VAD\0" "b\14NFO\0" "b\13ASI\0" "b\12A\0" \ - "b\11NF\0" "b\10PRIV\0" "b\7E\0" "b\6NUCLEUS\0" "b\5SECONDCTX\0" "b\4PRIV\0" \ - "b\3W\0" "b\2OW\0" "b\1FV\0" + "f\20\30ASI\0" "b\15VAT\0" "b\14VAD\0" \ + "b\13NFO\0" "b\12ASI\0" "b\11A\0" "b\10NF\0" \ + "b\07PRIV\0" "b\06E\0" "b\05NUCLEUS\0" "b\04SECONDCTX\0" \ + "b\03PRIV\0" "b\02W\0" "b\01OW\0" "b\00FV\0" /* ASFR bits */ #define ASFR_ME 0x100000000LL @@ -396,7 +397,7 @@ * Interrupt registers. This really gets hairy. */ -/* IRSR -- Interrupt Receive Status Ragister */ +/* IRSR -- Interrupt Receive Status Register */ #define ASI_IRSR 0x49 #define IRSR 0x00 #define IRSR_BUSY 0x020 diff --git a/lib/libc/include/sparc64-netbsd-none/machine/intr.h b/lib/libc/include/sparc64-netbsd-none/machine/intr.h @@ -1,4 +1,4 @@ -/* $NetBSD: intr.h,v 1.31.70.1 2023/09/09 15:01:24 martin Exp $ */ +/* $NetBSD: intr.h,v 1.32 2023/09/02 05:51:57 jdc Exp $ */ /*- * Copyright (c) 1998 The NetBSD Foundation, Inc. diff --git a/lib/libc/include/sparc64-netbsd-none/machine/lwp_private.h b/lib/libc/include/sparc64-netbsd-none/machine/lwp_private.h @@ -0,0 +1,3 @@ +/* $NetBSD: lwp_private.h,v 1.2 2024/11/30 14:42:42 uwe Exp $ */ + +#include <sparc/lwp_private.h> +\ No newline at end of file diff --git a/lib/libc/include/sparc64-netbsd-none/machine/mcontext.h b/lib/libc/include/sparc64-netbsd-none/machine/mcontext.h @@ -1,4 +1,4 @@ -/* $NetBSD: mcontext.h,v 1.10 2018/02/19 08:31:13 mrg Exp $ */ +/* $NetBSD: mcontext.h,v 1.11 2024/05/18 00:37:41 thorpej Exp $ */ #ifndef _SPARC64_MCONTEXT_H_ #define _SPARC64_MCONTEXT_H_ @@ -72,9 +72,9 @@ typedef struct { __xrs32_t __xrs; /* may indicate extra reg state */ } mcontext32_t; -#define _UC_SETSTACK 0x00010000 -#define _UC_CLRSTACK 0x00020000 -#define _UC_TLSBASE 0x00080000 +#define _UC_SETSTACK _UC_MD_BIT16 +#define _UC_CLRSTACK _UC_MD_BIT17 +#define _UC_TLSBASE _UC_MD_BIT19 #define _UC_MACHINE32_PAD 43 /* compat_netbsd32 variant */ #define _UC_MACHINE32_SP(uc) ((uc)->uc_mcontext.__gregs[_REG_O6]) diff --git a/lib/libc/include/sparc64-netbsd-none/machine/mutex.h b/lib/libc/include/sparc64-netbsd-none/machine/mutex.h @@ -1,4 +1,4 @@ -/* $NetBSD: mutex.h,v 1.7.4.1 2023/08/09 17:42:03 martin Exp $ */ +/* $NetBSD: mutex.h,v 1.10 2023/07/12 12:50:13 riastradh Exp $ */ /*- * Copyright (c) 2002, 2007 The NetBSD Foundation, Inc. diff --git a/lib/libc/include/sparc64-netbsd-none/machine/param.h b/lib/libc/include/sparc64-netbsd-none/machine/param.h @@ -1,4 +1,4 @@ -/* $NetBSD: param.h,v 1.62 2021/05/31 14:38:56 simonb Exp $ */ +/* $NetBSD: param.h,v 1.63 2025/04/24 11:01:27 martin Exp $ */ /* * Copyright (c) 1992, 1993 @@ -279,4 +279,10 @@ extern const int cputyp; #define NBPG (1<<PGSHIFT) /* bytes/page */ #define PGOFSET (NBPG-1) /* byte offset into page */ -#define PCI_MAGIC_IO_RANGE 0x100000000LL -\ No newline at end of file +#define PCI_MAGIC_IO_RANGE 0x100000000LL + +#ifdef __arch64__ +#define STACK_ALIGNBYTES ALIGNBYTES64 +#else +#define STACK_ALIGNBYTES ALIGNBYTES32 +#endif +\ No newline at end of file diff --git a/lib/libc/include/sparc64-netbsd-none/machine/psl.h b/lib/libc/include/sparc64-netbsd-none/machine/psl.h @@ -1,4 +1,4 @@ -/* $NetBSD: psl.h,v 1.62.4.2 2023/09/09 15:01:24 martin Exp $ */ +/* $NetBSD: psl.h,v 1.66 2025/05/20 06:12:00 macallan Exp $ */ /* * Copyright (c) 1992, 1993 @@ -129,7 +129,11 @@ #define PSTATE_IE 0x002 /* interrupt enable */ #define PSTATE_AG 0x001 /* enable alternate globals */ -#define PSTATE_BITS "\20\14IG\13MG\12CLE\11TLE\10\7MM\6RED\5PEF\4AM\3PRIV\2IE\1AG" +#define PSTATE_BITS "\177\020" \ + "b\013IG\0" "b\012MG\0" "b\011CLE\0" "b\010TLE\0" \ + "F\006\002\0" ":\000MM_TSO\0" ":\001MM_PSO\0" \ + ":\002MM_RMO\0" "*?\0" "b\005RED\0" "b\004PEF\0" \ + "b\003AM\0" "b\002PRIV\0" "b\001IE\0" "b\000AG\0" /* @@ -508,6 +512,7 @@ SPL(spl0, 0) SPLHOLD(splsoftint, 1) #define splsoftclock splsoftint #define splsoftnet splsoftint +#define splsoftbio splsoftint SPLHOLD(splsoftserial, 4) diff --git a/lib/libc/include/sparc64-netbsd-none/machine/pte.h b/lib/libc/include/sparc64-netbsd-none/machine/pte.h @@ -1,4 +1,4 @@ -/* $NetBSD: pte.h,v 1.28 2016/11/04 05:41:01 macallan Exp $ */ +/* $NetBSD: pte.h,v 1.29 2025/01/07 18:51:05 andvar Exp $ */ /* * Copyright (c) 1996-1999 Eduardo Horvath @@ -91,7 +91,7 @@ * a real pain to do this in C. */ #if 0 -/* We don't use bitfeilds anyway. */ +/* We don't use bitfields anyway. */ struct sun4u_tag_fields { uint64_t tag_g:1, /* global flag */ tag_reserved:2, /* reserved for future use */ diff --git a/lib/libc/include/sparc64-netbsd-none/machine/vmparam.h b/lib/libc/include/sparc64-netbsd-none/machine/vmparam.h @@ -1,4 +1,4 @@ -/* $NetBSD: vmparam.h,v 1.42.18.1 2023/02/08 16:40:45 martin Exp $ */ +/* $NetBSD: vmparam.h,v 1.43 2023/02/07 14:11:16 hgutch Exp $ */ /* * Copyright (c) 1992, 1993 diff --git a/lib/libc/include/x86-netbsd-none/machine/asm.h b/lib/libc/include/x86-netbsd-none/machine/asm.h @@ -1,4 +1,4 @@ -/* $NetBSD: asm.h,v 1.44 2020/04/25 15:26:17 bouyer Exp $ */ +/* $NetBSD: asm.h,v 1.47 2025/01/05 16:53:26 riastradh Exp $ */ /*- * Copyright (c) 1990 The Regents of the University of California. @@ -181,11 +181,19 @@ #define ASMSTR .asciz #ifdef __ELF__ -#define RCSID(x) .pushsection ".ident","MS",@progbits,1; \ - .asciz x; \ +#define _IDENTSTR(x) .pushsection ".ident","MS",@progbits,1; \ + x; \ .popsection #else -#define RCSID(x) .text; .asciz x +#define _IDENTSTR(x) .text; x +#endif +#ifdef _NETBSD_REVISIONID +#define RCSID(_s) \ + _IDENTSTR(.asciz _s); \ + _IDENTSTR(.ascii "$"; .ascii "NetBSD: "; .ascii __FILE__; .ascii " "; \ + .ascii _NETBSD_REVISIONID; .asciz " $") +#else +#define RCSID(_s) _IDENTSTR(.asciz _s) #endif #ifdef NO_KERNEL_RCSIDS diff --git a/lib/libc/include/x86-netbsd-none/machine/byte_swap.h b/lib/libc/include/x86-netbsd-none/machine/byte_swap.h @@ -1,4 +1,4 @@ -/* $NetBSD: byte_swap.h,v 1.17 2020/08/10 10:59:33 rin Exp $ */ +/* $NetBSD: byte_swap.h,v 1.17.28.1 2025/12/18 19:57:53 martin Exp $ */ /*- * Copyright (c) 1998 The NetBSD Foundation, Inc. @@ -32,7 +32,7 @@ #ifndef _I386_BYTE_SWAP_H_ #define _I386_BYTE_SWAP_H_ -#include <sys/types.h> +#include <sys/stdint.h> #ifdef __GNUC__ __BEGIN_DECLS diff --git a/lib/libc/include/x86-netbsd-none/machine/cpu.h b/lib/libc/include/x86-netbsd-none/machine/cpu.h @@ -1,4 +1,4 @@ -/* $NetBSD: cpu.h,v 1.183 2021/11/02 11:26:04 ryo Exp $ */ +/* $NetBSD: cpu.h,v 1.185 2023/09/04 20:58:52 mrg Exp $ */ /*- * Copyright (c) 1990 The Regents of the University of California. @@ -45,12 +45,20 @@ static struct cpu_info *x86_curcpu(void); static lwp_t *x86_curlwp(void); +/* + * XXXGCC12 has: + * ./machine/cpu.h:57:9: error: array subscript 0 is outside array bounds of 'struct cpu_info * const[0]' [-Werror=array-bounds] + * 56 | __asm("movq %%gs:%1, %0" : + */ +#pragma GCC push_options +#pragma GCC diagnostic ignored "-Warray-bounds" + __inline __always_inline static struct cpu_info * __unused x86_curcpu(void) { struct cpu_info *ci; - __asm volatile("movl %%fs:%1, %0" : + __asm("movl %%fs:%1, %0" : "=r" (ci) : "m" (*(struct cpu_info * const *)offsetof(struct cpu_info, ci_self))); @@ -62,13 +70,16 @@ x86_curlwp(void) { lwp_t *l; - __asm volatile("movl %%fs:%1, %0" : + __asm("movl %%fs:%1, %0" : "=r" (l) : "m" (*(struct cpu_info * const *)offsetof(struct cpu_info, ci_curlwp))); return l; } -#endif + +#pragma GCC pop_options + +#endif /* __GNUC__ && !_MODULE */ #ifdef XENPV #define CLKF_USERMODE(frame) (curcpu()->ci_xen_clockf_usermode) diff --git a/lib/libc/include/x86-netbsd-none/machine/elf_machdep.h b/lib/libc/include/x86-netbsd-none/machine/elf_machdep.h @@ -1,4 +1,4 @@ -/* $NetBSD: elf_machdep.h,v 1.13 2017/11/06 03:47:46 christos Exp $ */ +/* $NetBSD: elf_machdep.h,v 1.14 2025/02/11 12:27:58 jkoshy Exp $ */ #define ELF32_MACHDEP_ENDIANNESS ELFDATA2LSB #define ELF32_MACHDEP_ID_CASES \ @@ -24,6 +24,7 @@ #define R_386_COPY 5 #define R_386_GLOB_DAT 6 #define R_386_JMP_SLOT 7 +#define R_386_JUMP_SLOT 7 /* psABI spelling. */ #define R_386_RELATIVE 8 #define R_386_GOTOFF 9 #define R_386_GOTPC 10 diff --git a/lib/libc/include/x86-netbsd-none/machine/lwp_private.h b/lib/libc/include/x86-netbsd-none/machine/lwp_private.h @@ -0,0 +1,3 @@ +/* $NetBSD: lwp_private.h,v 1.1 2024/11/30 01:04:10 christos Exp $ */ + +#include <x86/lwp_private.h> +\ No newline at end of file diff --git a/lib/libc/include/x86-netbsd-none/machine/mcontext.h b/lib/libc/include/x86-netbsd-none/machine/mcontext.h @@ -1,4 +1,4 @@ -/* $NetBSD: mcontext.h,v 1.15 2019/12/27 00:32:17 kamil Exp $ */ +/* $NetBSD: mcontext.h,v 1.19 2024/11/30 01:04:10 christos Exp $ */ /*- * Copyright (c) 1999 The NetBSD Foundation, Inc. @@ -36,10 +36,10 @@ /* * mcontext extensions to handle signal delivery. */ -#define _UC_SETSTACK 0x00010000 -#define _UC_CLRSTACK 0x00020000 -#define _UC_VM 0x00040000 -#define _UC_TLSBASE 0x00080000 +#define _UC_SETSTACK _UC_MD_BIT16 +#define _UC_CLRSTACK _UC_MD_BIT17 +#define _UC_VM _UC_MD_BIT18 +#define _UC_TLSBASE _UC_MD_BIT19 /* * Layout of mcontext_t according to the System V Application Binary Interface, @@ -96,7 +96,7 @@ typedef struct { __greg_t _mc_tlsbase; } mcontext_t; -#define _UC_FXSAVE 0x20 /* FP state is in FXSAVE format in XMM space */ +#define _UC_FXSAVE _UC_MD_BIT5 /* FP state is in FXSAVE format in XMM space */ #define _UC_MACHINE_PAD 4 /* Padding appended to ucontext_t */ @@ -113,22 +113,4 @@ typedef struct { #define __UCONTEXT_SIZE 776 -#if defined(_RTLD_SOURCE) || defined(_LIBC_SOURCE) || \ - defined(__LIBPTHREAD_SOURCE__) -#include <sys/tls.h> - -__BEGIN_DECLS -static __inline void * -__lwp_getprivate_fast(void) -{ - void *__tmp; - - __asm volatile("movl %%gs:0, %0" : "=r" (__tmp)); - - return __tmp; -} -__END_DECLS - -#endif - #endif /* !_I386_MCONTEXT_H_ */ \ No newline at end of file diff --git a/lib/libc/include/x86-netbsd-none/machine/param.h b/lib/libc/include/x86-netbsd-none/machine/param.h @@ -1,4 +1,4 @@ -/* $NetBSD: param.h,v 1.88 2021/05/31 14:38:55 simonb Exp $ */ +/* $NetBSD: param.h,v 1.89 2025/04/20 22:33:13 riastradh Exp $ */ /*- * Copyright (c) 1990 The Regents of the University of California. @@ -65,6 +65,14 @@ #define ALIGNED_POINTER(p,t) 1 #define ALIGNED_POINTER_LOAD(q,p,t) memcpy((q), (p), sizeof(t)) +/* + * Stack alignment is 4-byte, following the traditional i386 SysV ABI + * published by SCO. Note: Parts of the Linux world have altered the + * ABI to guarantee 16-byte alignment, which is convenient for SSE2, + * but an incompatible ABI change which we do not follow. + */ +#define STACK_ALIGNBYTES (4 - 1) + #define PGSHIFT 12 /* LOG2(NBPG) */ #define NBPG (1 << PGSHIFT) /* bytes/page */ #define PGOFSET (NBPG-1) /* byte offset into page */ diff --git a/lib/libc/include/x86-netbsd-none/machine/pcb.h b/lib/libc/include/x86-netbsd-none/machine/pcb.h @@ -1,4 +1,4 @@ -/* $NetBSD: pcb.h,v 1.59 2019/10/12 06:31:03 maxv Exp $ */ +/* $NetBSD: pcb.h,v 1.61 2025/04/24 09:29:09 kre Exp $ */ /* * Copyright (c) 1998, 2009 The NetBSD Foundation, Inc. @@ -99,12 +99,16 @@ struct pcb { int not_used[15]; /* floating point state */ - union savefpu pcb_savefpu __aligned(64); + union savefpu pcb_savefpu[1] __aligned(64); +#define pcb_savefpusmall pcb_savefpu /* **** DO NOT ADD ANYTHING HERE **** */ }; #ifndef __lint__ +#include <sys/stddef.h> /* for offsetof() */ + /* This doesn't really matter, but there is a lot of implied padding */ +__CTASSERT(offsetof(struct pcb, pcb_savefpu) == 128); __CTASSERT(sizeof(struct pcb) - sizeof (union savefpu) == 128); #endif diff --git a/lib/libc/include/x86-netbsd-none/machine/ptrace.h b/lib/libc/include/x86-netbsd-none/machine/ptrace.h @@ -1,4 +1,4 @@ -/* $NetBSD: ptrace.h,v 1.26 2020/05/30 08:41:23 maxv Exp $ */ +/* $NetBSD: ptrace.h,v 1.27 2023/11/20 03:05:48 simonb Exp $ */ /* * Copyright (c) 2001 Wasabi Systems, Inc. @@ -162,7 +162,7 @@ #define PT32_GETXSTATE PT_GETXSTATE #define COREDUMP_MACHDEP_LWP_NOTES(l, ns, name) \ { \ - struct xstate xstate; \ + struct xstate xstate; /* XXX FIXME big stack object */ \ memset(&xstate, 0, sizeof(xstate)); \ if (!process_read_xstate(l, &xstate)) \ { \ diff --git a/lib/libc/include/x86-netbsd-none/machine/types.h b/lib/libc/include/x86-netbsd-none/machine/types.h @@ -1,4 +1,4 @@ -/* $NetBSD: types.h,v 1.93 2021/04/01 04:35:46 simonb Exp $ */ +/* $NetBSD: types.h,v 1.95 2025/05/08 05:31:16 imil Exp $ */ /*- * Copyright (c) 1990 The Regents of the University of California. @@ -134,5 +134,6 @@ typedef __register_t register_t; #define __HAVE_COMMON___TLS_GET_ADDR #define __HAVE_UCAS_FULL #define __HAVE_RAS +#define __HAVE_BOOT_DURATION #endif /* _I386_MACHTYPES_H_ */ \ No newline at end of file diff --git a/lib/libc/include/x86_64-netbsd-none/amd64/asm.h b/lib/libc/include/x86_64-netbsd-none/amd64/asm.h @@ -1,4 +1,4 @@ -/* $NetBSD: asm.h,v 1.22 2021/04/17 20:12:55 rillig Exp $ */ +/* $NetBSD: asm.h,v 1.24 2025/01/05 14:30:37 riastradh Exp $ */ /*- * Copyright (c) 1990 The Regents of the University of California. @@ -112,9 +112,17 @@ #define ASMSTR .asciz -#define RCSID(x) .pushsection ".ident","MS",@progbits,1; \ - .asciz x; \ +#define _IDENTSTR(x) .pushsection ".ident","MS",@progbits,1; \ + x; \ .popsection +#ifdef _NETBSD_REVISIONID +#define RCSID(_s) \ + _IDENTSTR(.asciz _s); \ + _IDENTSTR(.ascii "$"; .ascii "NetBSD: "; .ascii __FILE__; .ascii " "; \ + .ascii _NETBSD_REVISIONID; .asciz " $") +#else +#define RCSID(_s) _IDENTSTR(.asciz _s) +#endif #define WEAK_ALIAS(alias,sym) \ .weak alias; \ diff --git a/lib/libc/include/x86_64-netbsd-none/amd64/byte_swap.h b/lib/libc/include/x86_64-netbsd-none/amd64/byte_swap.h @@ -1,4 +1,4 @@ -/* $NetBSD: byte_swap.h,v 1.8 2021/04/17 20:12:55 rillig Exp $ */ +/* $NetBSD: byte_swap.h,v 1.8.24.1 2025/12/18 19:57:52 martin Exp $ */ /*- * Copyright (c) 1998, 2010 The NetBSD Foundation, Inc. @@ -39,7 +39,7 @@ #ifdef __x86_64__ #ifdef __GNUC__ -#include <sys/types.h> +#include <sys/stdint.h> __BEGIN_DECLS #define __BYTE_SWAP_U64_VARIABLE __byte_swap_u64_variable diff --git a/lib/libc/include/x86_64-netbsd-none/amd64/cpu.h b/lib/libc/include/x86_64-netbsd-none/amd64/cpu.h @@ -1,4 +1,4 @@ -/* $NetBSD: cpu.h,v 1.70 2021/11/02 11:26:03 ryo Exp $ */ +/* $NetBSD: cpu.h,v 1.72 2023/09/04 20:58:52 mrg Exp $ */ /*- * Copyright (c) 1990 The Regents of the University of California. @@ -48,12 +48,20 @@ static struct cpu_info *x86_curcpu(void); static lwp_t *x86_curlwp(void); +/* + * XXXGCC12 has: + * ./machine/cpu.h:57:9: error: array subscript 0 is outside array bounds of 'struct cpu_info * const[0]' [-Werror=array-bounds] + * 56 | __asm("movq %%gs:%1, %0" : + */ +#pragma GCC push_options +#pragma GCC diagnostic ignored "-Warray-bounds" + __inline __always_inline static struct cpu_info * __unused __nomsan x86_curcpu(void) { struct cpu_info *ci; - __asm volatile("movq %%gs:%1, %0" : + __asm("movq %%gs:%1, %0" : "=r" (ci) : "m" (*(struct cpu_info * const *)offsetof(struct cpu_info, ci_self))); @@ -65,13 +73,15 @@ x86_curlwp(void) { lwp_t *l; - __asm volatile("movq %%gs:%1, %0" : + __asm("movq %%gs:%1, %0" : "=r" (l) : "m" (*(struct cpu_info * const *)offsetof(struct cpu_info, ci_curlwp))); return l; } +#pragma GCC pop_options + #endif /* __GNUC__ && !_MODULE */ #ifdef XENPV diff --git a/lib/libc/include/x86_64-netbsd-none/amd64/frame.h b/lib/libc/include/x86_64-netbsd-none/amd64/frame.h @@ -1,4 +1,4 @@ -/* $NetBSD: frame.h,v 1.22 2019/02/14 08:18:25 cherry Exp $ */ +/* $NetBSD: frame.h,v 1.23 2025/06/27 21:36:24 andvar Exp $ */ /*- * Copyright (c) 1998 The NetBSD Foundation, Inc. @@ -99,7 +99,7 @@ struct intrframe { #ifdef XEN /* - * Need arch independany way to access IP and CS from intrframe + * Need arch independent way to access IP and CS from intrframe */ #define _INTRFRAME_CS if_tf.tf_cs #define _INTRFRAME_IP if_tf.tf_rip diff --git a/lib/libc/include/x86_64-netbsd-none/amd64/lwp_private.h b/lib/libc/include/x86_64-netbsd-none/amd64/lwp_private.h @@ -0,0 +1,3 @@ +/* $NetBSD: lwp_private.h,v 1.1 2024/11/30 01:04:06 christos Exp $ */ + +#include <x86/lwp_private.h> +\ No newline at end of file diff --git a/lib/libc/include/x86_64-netbsd-none/amd64/mcontext.h b/lib/libc/include/x86_64-netbsd-none/amd64/mcontext.h @@ -1,4 +1,4 @@ -/* $NetBSD: mcontext.h,v 1.20 2019/12/27 00:32:16 kamil Exp $ */ +/* $NetBSD: mcontext.h,v 1.24 2024/11/30 01:04:06 christos Exp $ */ /*- * Copyright (c) 1999 The NetBSD Foundation, Inc. @@ -74,34 +74,16 @@ typedef struct { #define _UC_MACHINE_SET_PC(uc, pc) _UC_MACHINE_PC(uc) = (pc) -#define _UC_TLSBASE 0x00080000 +#define _UC_TLSBASE _UC_MD_BIT19 /* * mcontext extensions to handle signal delivery. */ -#define _UC_SETSTACK 0x00010000 -#define _UC_CLRSTACK 0x00020000 +#define _UC_SETSTACK _UC_MD_BIT16 +#define _UC_CLRSTACK _UC_MD_BIT17 #define __UCONTEXT_SIZE 784 -#if defined(_RTLD_SOURCE) || defined(_LIBC_SOURCE) || \ - defined(__LIBPTHREAD_SOURCE__) -#include <sys/tls.h> - -__BEGIN_DECLS -static __inline void * -__lwp_getprivate_fast(void) -{ - void *__tmp; - - __asm volatile("movq %%fs:0, %0" : "=r" (__tmp)); - - return __tmp; -} -__END_DECLS - -#endif - #ifdef _KERNEL /* @@ -155,7 +137,7 @@ typedef struct { uint32_t _mc_tlsbase; } mcontext32_t; -#define _UC_FXSAVE 0x20 /* FP state is in FXSAVE format in XMM space */ +#define _UC_FXSAVE _UC_MD_BIT5 /* FP state is in FXSAVE format in XMM space */ #define _UC_MACHINE32_PAD 4 #define __UCONTEXT32_SIZE 776 diff --git a/lib/libc/include/x86_64-netbsd-none/amd64/param.h b/lib/libc/include/x86_64-netbsd-none/amd64/param.h @@ -1,4 +1,4 @@ -/* $NetBSD: param.h,v 1.38 2020/06/29 09:56:51 jdolecek Exp $ */ +/* $NetBSD: param.h,v 1.42 2025/04/27 01:32:09 riastradh Exp $ */ #ifdef __x86_64__ @@ -31,6 +31,7 @@ * (2) rtld in glibc >= 2.23 for Linux/x86_64 requires it. */ #define STACK_ALIGNBYTES (16 - 1) +#define STACK_ALIGNBYTES32 (4 - 1) #define ALIGNBYTES32 (sizeof(int) - 1) #define ALIGN32(p) (((u_long)(p) + ALIGNBYTES32) &~ALIGNBYTES32) @@ -69,12 +70,30 @@ #define SINCR 1 /* increment of stack/NBPG */ #if defined(KASAN) || defined(KMSAN) -#define UPAGES 8 +#define UPAGES_KxSAN 3 +#else +#define UPAGES_KxSAN 0 +#endif +#if defined(SVS) +#define UPAGES_SVS 1 +#else +#define UPAGES_SVS 0 +#endif +#define UPAGES_PCB 1 /* one page for the PCB */ +#define UPAGES_RED 1 /* one page for red zone between pcb/stack */ +#define UPAGES_STACK 3 /* three pages (12 KiB) of stack space */ +#define UPAGES \ + (UPAGES_PCB + UPAGES_RED + UPAGES_STACK + UPAGES_SVS + UPAGES_KxSAN) + +#ifndef _STANDALONE +#if defined(KASAN) || defined(KMSAN) +__CTASSERT(UPAGES == 8); #elif defined(SVS) -#define UPAGES 6 /* 1 page used internally by SVS */ +__CTASSERT(UPAGES == 6); #else -#define UPAGES 5 /* pages of u-area (1 for redzone) */ +__CTASSERT(UPAGES == 5); #endif +#endif /* _STANDALONE */ #define USPACE (UPAGES * NBPG) /* total size of u-area */ #ifndef MSGBUFSIZE diff --git a/lib/libc/include/x86_64-netbsd-none/amd64/pcb.h b/lib/libc/include/x86_64-netbsd-none/amd64/pcb.h @@ -1,4 +1,4 @@ -/* $NetBSD: pcb.h,v 1.32 2020/03/17 17:18:49 maxv Exp $ */ +/* $NetBSD: pcb.h,v 1.35 2025/04/28 13:01:27 riastradh Exp $ */ /* * Copyright (c) 1998 The NetBSD Foundation, Inc. @@ -97,13 +97,24 @@ struct pcb { struct dbreg *pcb_dbregs; uint16_t pcb_fpu_dflt_cw; int pcb_iopl; - +#ifdef XENPV /* XXX XENPV PR kern/59371 */ uint32_t pcb_unused[8]; /* unused */ + union savefpu pcb_savefpu[1] __aligned(64); +#define pcb_savefpusmall pcb_savefpu +#else + union savefpu *pcb_savefpu; + + uint32_t pcb_unused[6]; /* unused */ - union savefpu pcb_savefpu __aligned(64); /* floating point state */ + /* fpu state, if it fits; otherwise allocated separately */ + union savefpu pcb_savefpusmall __aligned(64); +#endif /* **** DO NOT ADD ANYTHING HERE **** */ }; #ifndef __lint__ +#include <sys/stddef.h> /* for offsetof() */ + +__CTASSERT(offsetof(struct pcb, pcb_savefpusmall) == 128); __CTASSERT(sizeof(struct pcb) - sizeof (union savefpu) == 128); #endif diff --git a/lib/libc/include/x86_64-netbsd-none/amd64/ptrace.h b/lib/libc/include/x86_64-netbsd-none/amd64/ptrace.h @@ -1,4 +1,4 @@ -/* $NetBSD: ptrace.h,v 1.22 2020/05/30 08:41:22 maxv Exp $ */ +/* $NetBSD: ptrace.h,v 1.23 2023/11/20 03:05:48 simonb Exp $ */ /* * Copyright (c) 1993 Christopher G. Demetriou @@ -117,7 +117,7 @@ MODULE_HOOK(netbsd32_process_doxmmregs_hook, int, #define PT64_GETXSTATE PT_GETXSTATE #define COREDUMP_MACHDEP_LWP_NOTES(l, ns, name) \ { \ - struct xstate xstate; \ + struct xstate xstate; /* XXX FIXME big stack object */ \ memset(&xstate, 0, sizeof(xstate)); \ if (!process_read_xstate(l, &xstate)) \ { \ diff --git a/lib/libc/include/x86_64-netbsd-none/amd64/types.h b/lib/libc/include/x86_64-netbsd-none/amd64/types.h @@ -1,4 +1,4 @@ -/* $NetBSD: types.h,v 1.71 2021/04/01 04:35:45 simonb Exp $ */ +/* $NetBSD: types.h,v 1.73 2025/05/08 05:31:16 imil Exp $ */ /*- * Copyright (c) 1990 The Regents of the University of California. @@ -101,6 +101,7 @@ typedef unsigned char __cpu_simple_lock_nv_t; #define __HAVE_MM_MD_DIRECT_MAPPED_PHYS #define __HAVE_UCAS_FULL #define __HAVE_BUS_SPACE_8 +#define __HAVE_BOOT_DURATION #ifdef _KERNEL_OPT #define __HAVE_RAS diff --git a/lib/libc/include/x86_64-netbsd-none/machine/asm.h b/lib/libc/include/x86_64-netbsd-none/machine/asm.h @@ -1,4 +1,4 @@ -/* $NetBSD: asm.h,v 1.22 2021/04/17 20:12:55 rillig Exp $ */ +/* $NetBSD: asm.h,v 1.24 2025/01/05 14:30:37 riastradh Exp $ */ /*- * Copyright (c) 1990 The Regents of the University of California. @@ -112,9 +112,17 @@ #define ASMSTR .asciz -#define RCSID(x) .pushsection ".ident","MS",@progbits,1; \ - .asciz x; \ +#define _IDENTSTR(x) .pushsection ".ident","MS",@progbits,1; \ + x; \ .popsection +#ifdef _NETBSD_REVISIONID +#define RCSID(_s) \ + _IDENTSTR(.asciz _s); \ + _IDENTSTR(.ascii "$"; .ascii "NetBSD: "; .ascii __FILE__; .ascii " "; \ + .ascii _NETBSD_REVISIONID; .asciz " $") +#else +#define RCSID(_s) _IDENTSTR(.asciz _s) +#endif #define WEAK_ALIAS(alias,sym) \ .weak alias; \ diff --git a/lib/libc/include/x86_64-netbsd-none/machine/byte_swap.h b/lib/libc/include/x86_64-netbsd-none/machine/byte_swap.h @@ -1,4 +1,4 @@ -/* $NetBSD: byte_swap.h,v 1.8 2021/04/17 20:12:55 rillig Exp $ */ +/* $NetBSD: byte_swap.h,v 1.8.24.1 2025/12/18 19:57:52 martin Exp $ */ /*- * Copyright (c) 1998, 2010 The NetBSD Foundation, Inc. @@ -39,7 +39,7 @@ #ifdef __x86_64__ #ifdef __GNUC__ -#include <sys/types.h> +#include <sys/stdint.h> __BEGIN_DECLS #define __BYTE_SWAP_U64_VARIABLE __byte_swap_u64_variable diff --git a/lib/libc/include/x86_64-netbsd-none/machine/cpu.h b/lib/libc/include/x86_64-netbsd-none/machine/cpu.h @@ -1,4 +1,4 @@ -/* $NetBSD: cpu.h,v 1.70 2021/11/02 11:26:03 ryo Exp $ */ +/* $NetBSD: cpu.h,v 1.72 2023/09/04 20:58:52 mrg Exp $ */ /*- * Copyright (c) 1990 The Regents of the University of California. @@ -48,12 +48,20 @@ static struct cpu_info *x86_curcpu(void); static lwp_t *x86_curlwp(void); +/* + * XXXGCC12 has: + * ./machine/cpu.h:57:9: error: array subscript 0 is outside array bounds of 'struct cpu_info * const[0]' [-Werror=array-bounds] + * 56 | __asm("movq %%gs:%1, %0" : + */ +#pragma GCC push_options +#pragma GCC diagnostic ignored "-Warray-bounds" + __inline __always_inline static struct cpu_info * __unused __nomsan x86_curcpu(void) { struct cpu_info *ci; - __asm volatile("movq %%gs:%1, %0" : + __asm("movq %%gs:%1, %0" : "=r" (ci) : "m" (*(struct cpu_info * const *)offsetof(struct cpu_info, ci_self))); @@ -65,13 +73,15 @@ x86_curlwp(void) { lwp_t *l; - __asm volatile("movq %%gs:%1, %0" : + __asm("movq %%gs:%1, %0" : "=r" (l) : "m" (*(struct cpu_info * const *)offsetof(struct cpu_info, ci_curlwp))); return l; } +#pragma GCC pop_options + #endif /* __GNUC__ && !_MODULE */ #ifdef XENPV diff --git a/lib/libc/include/x86_64-netbsd-none/machine/frame.h b/lib/libc/include/x86_64-netbsd-none/machine/frame.h @@ -1,4 +1,4 @@ -/* $NetBSD: frame.h,v 1.22 2019/02/14 08:18:25 cherry Exp $ */ +/* $NetBSD: frame.h,v 1.23 2025/06/27 21:36:24 andvar Exp $ */ /*- * Copyright (c) 1998 The NetBSD Foundation, Inc. @@ -99,7 +99,7 @@ struct intrframe { #ifdef XEN /* - * Need arch independany way to access IP and CS from intrframe + * Need arch independent way to access IP and CS from intrframe */ #define _INTRFRAME_CS if_tf.tf_cs #define _INTRFRAME_IP if_tf.tf_rip diff --git a/lib/libc/include/x86_64-netbsd-none/machine/lwp_private.h b/lib/libc/include/x86_64-netbsd-none/machine/lwp_private.h @@ -0,0 +1,3 @@ +/* $NetBSD: lwp_private.h,v 1.1 2024/11/30 01:04:06 christos Exp $ */ + +#include <x86/lwp_private.h> +\ No newline at end of file diff --git a/lib/libc/include/x86_64-netbsd-none/machine/mcontext.h b/lib/libc/include/x86_64-netbsd-none/machine/mcontext.h @@ -1,4 +1,4 @@ -/* $NetBSD: mcontext.h,v 1.20 2019/12/27 00:32:16 kamil Exp $ */ +/* $NetBSD: mcontext.h,v 1.24 2024/11/30 01:04:06 christos Exp $ */ /*- * Copyright (c) 1999 The NetBSD Foundation, Inc. @@ -74,34 +74,16 @@ typedef struct { #define _UC_MACHINE_SET_PC(uc, pc) _UC_MACHINE_PC(uc) = (pc) -#define _UC_TLSBASE 0x00080000 +#define _UC_TLSBASE _UC_MD_BIT19 /* * mcontext extensions to handle signal delivery. */ -#define _UC_SETSTACK 0x00010000 -#define _UC_CLRSTACK 0x00020000 +#define _UC_SETSTACK _UC_MD_BIT16 +#define _UC_CLRSTACK _UC_MD_BIT17 #define __UCONTEXT_SIZE 784 -#if defined(_RTLD_SOURCE) || defined(_LIBC_SOURCE) || \ - defined(__LIBPTHREAD_SOURCE__) -#include <sys/tls.h> - -__BEGIN_DECLS -static __inline void * -__lwp_getprivate_fast(void) -{ - void *__tmp; - - __asm volatile("movq %%fs:0, %0" : "=r" (__tmp)); - - return __tmp; -} -__END_DECLS - -#endif - #ifdef _KERNEL /* @@ -155,7 +137,7 @@ typedef struct { uint32_t _mc_tlsbase; } mcontext32_t; -#define _UC_FXSAVE 0x20 /* FP state is in FXSAVE format in XMM space */ +#define _UC_FXSAVE _UC_MD_BIT5 /* FP state is in FXSAVE format in XMM space */ #define _UC_MACHINE32_PAD 4 #define __UCONTEXT32_SIZE 776 diff --git a/lib/libc/include/x86_64-netbsd-none/machine/param.h b/lib/libc/include/x86_64-netbsd-none/machine/param.h @@ -1,4 +1,4 @@ -/* $NetBSD: param.h,v 1.38 2020/06/29 09:56:51 jdolecek Exp $ */ +/* $NetBSD: param.h,v 1.42 2025/04/27 01:32:09 riastradh Exp $ */ #ifdef __x86_64__ @@ -31,6 +31,7 @@ * (2) rtld in glibc >= 2.23 for Linux/x86_64 requires it. */ #define STACK_ALIGNBYTES (16 - 1) +#define STACK_ALIGNBYTES32 (4 - 1) #define ALIGNBYTES32 (sizeof(int) - 1) #define ALIGN32(p) (((u_long)(p) + ALIGNBYTES32) &~ALIGNBYTES32) @@ -69,12 +70,30 @@ #define SINCR 1 /* increment of stack/NBPG */ #if defined(KASAN) || defined(KMSAN) -#define UPAGES 8 +#define UPAGES_KxSAN 3 +#else +#define UPAGES_KxSAN 0 +#endif +#if defined(SVS) +#define UPAGES_SVS 1 +#else +#define UPAGES_SVS 0 +#endif +#define UPAGES_PCB 1 /* one page for the PCB */ +#define UPAGES_RED 1 /* one page for red zone between pcb/stack */ +#define UPAGES_STACK 3 /* three pages (12 KiB) of stack space */ +#define UPAGES \ + (UPAGES_PCB + UPAGES_RED + UPAGES_STACK + UPAGES_SVS + UPAGES_KxSAN) + +#ifndef _STANDALONE +#if defined(KASAN) || defined(KMSAN) +__CTASSERT(UPAGES == 8); #elif defined(SVS) -#define UPAGES 6 /* 1 page used internally by SVS */ +__CTASSERT(UPAGES == 6); #else -#define UPAGES 5 /* pages of u-area (1 for redzone) */ +__CTASSERT(UPAGES == 5); #endif +#endif /* _STANDALONE */ #define USPACE (UPAGES * NBPG) /* total size of u-area */ #ifndef MSGBUFSIZE diff --git a/lib/libc/include/x86_64-netbsd-none/machine/pcb.h b/lib/libc/include/x86_64-netbsd-none/machine/pcb.h @@ -1,4 +1,4 @@ -/* $NetBSD: pcb.h,v 1.32 2020/03/17 17:18:49 maxv Exp $ */ +/* $NetBSD: pcb.h,v 1.35 2025/04/28 13:01:27 riastradh Exp $ */ /* * Copyright (c) 1998 The NetBSD Foundation, Inc. @@ -97,13 +97,24 @@ struct pcb { struct dbreg *pcb_dbregs; uint16_t pcb_fpu_dflt_cw; int pcb_iopl; - +#ifdef XENPV /* XXX XENPV PR kern/59371 */ uint32_t pcb_unused[8]; /* unused */ + union savefpu pcb_savefpu[1] __aligned(64); +#define pcb_savefpusmall pcb_savefpu +#else + union savefpu *pcb_savefpu; + + uint32_t pcb_unused[6]; /* unused */ - union savefpu pcb_savefpu __aligned(64); /* floating point state */ + /* fpu state, if it fits; otherwise allocated separately */ + union savefpu pcb_savefpusmall __aligned(64); +#endif /* **** DO NOT ADD ANYTHING HERE **** */ }; #ifndef __lint__ +#include <sys/stddef.h> /* for offsetof() */ + +__CTASSERT(offsetof(struct pcb, pcb_savefpusmall) == 128); __CTASSERT(sizeof(struct pcb) - sizeof (union savefpu) == 128); #endif diff --git a/lib/libc/include/x86_64-netbsd-none/machine/ptrace.h b/lib/libc/include/x86_64-netbsd-none/machine/ptrace.h @@ -1,4 +1,4 @@ -/* $NetBSD: ptrace.h,v 1.22 2020/05/30 08:41:22 maxv Exp $ */ +/* $NetBSD: ptrace.h,v 1.23 2023/11/20 03:05:48 simonb Exp $ */ /* * Copyright (c) 1993 Christopher G. Demetriou @@ -117,7 +117,7 @@ MODULE_HOOK(netbsd32_process_doxmmregs_hook, int, #define PT64_GETXSTATE PT_GETXSTATE #define COREDUMP_MACHDEP_LWP_NOTES(l, ns, name) \ { \ - struct xstate xstate; \ + struct xstate xstate; /* XXX FIXME big stack object */ \ memset(&xstate, 0, sizeof(xstate)); \ if (!process_read_xstate(l, &xstate)) \ { \ diff --git a/lib/libc/include/x86_64-netbsd-none/machine/types.h b/lib/libc/include/x86_64-netbsd-none/machine/types.h @@ -1,4 +1,4 @@ -/* $NetBSD: types.h,v 1.71 2021/04/01 04:35:45 simonb Exp $ */ +/* $NetBSD: types.h,v 1.73 2025/05/08 05:31:16 imil Exp $ */ /*- * Copyright (c) 1990 The Regents of the University of California. @@ -101,6 +101,7 @@ typedef unsigned char __cpu_simple_lock_nv_t; #define __HAVE_MM_MD_DIRECT_MAPPED_PHYS #define __HAVE_UCAS_FULL #define __HAVE_BUS_SPACE_8 +#define __HAVE_BOOT_DURATION #ifdef _KERNEL_OPT #define __HAVE_RAS diff --git a/tools/process_headers.zig b/tools/process_headers.zig @@ -94,6 +94,8 @@ const netbsd_targets = [_]LibCTarget{ .{ .arch = .mips, .abi = .eabi, .dest = "mips-netbsd-eabi" }, .{ .arch = .mips, .abi = .eabihf, .dest = "mips-netbsd-eabi" }, .{ .arch = .powerpc, .abi = .eabihf, .dest = "powerpc-netbsd-eabi" }, + .{ .arch = .riscv32, .abi = .none }, + .{ .arch = .riscv64, .abi = .none }, .{ .arch = .sparc, .abi = .none }, .{ .arch = .sparc64, .abi = .none }, .{ .arch = .x86, .abi = .none }, @@ -222,6 +224,8 @@ pub fn main(init: std.process.Init) !void { .x86 => "i386", .x86_64 => "amd64", + .riscv32, + .riscv64, .sparc, .sparc64, => |a| @tagName(a),