Merge branch 'master' into autodoc-searchkey

This commit is contained in:
Loris Cro
2023-06-18 09:06:40 +02:00
committed by GitHub
2167 changed files with 86776 additions and 82235 deletions

View File

@@ -84,12 +84,6 @@ set(ZIG_NO_LIB off CACHE BOOL
set(ZIG_NO_LANGREF off CACHE BOOL
"Disable copying of langref to the install prefix during the build phase")
set(ZIG_SKIP_INSTALL_LIB_FILES off CACHE BOOL "Deprecated. Use ZIG_NO_LIB")
if(ZIG_SKIP_INSTALL_LIB_FILES)
message(WARNING "ZIG_SKIP_INSTALL_LIB_FILES is deprecated. Use ZIG_NO_LIB instead.")
set(ZIG_NO_LIB ON)
endif()
set(ZIG_STATIC off CACHE BOOL "Attempt to build a static zig executable (not compatible with glibc)")
set(ZIG_SHARED_LLVM off CACHE BOOL "Prefer linking against shared LLVM libraries")
set(ZIG_STATIC_LLVM ${ZIG_STATIC} CACHE BOOL "Prefer linking against static LLVM libraries")
@@ -110,10 +104,6 @@ if (ZIG_SHARED_LLVM AND ZIG_STATIC_LLVM)
message(SEND_ERROR "-DZIG_SHARED_LLVM and -DZIG_STATIC_LLVM cannot both be enabled simultaneously")
endif()
string(REGEX REPLACE "\\\\" "\\\\\\\\" ZIG_LIBC_LIB_DIR_ESCAPED "${ZIG_LIBC_LIB_DIR}")
string(REGEX REPLACE "\\\\" "\\\\\\\\" ZIG_LIBC_STATIC_LIB_DIR_ESCAPED "${ZIG_LIBC_STATIC_LIB_DIR}")
string(REGEX REPLACE "\\\\" "\\\\\\\\" ZIG_LIBC_INCLUDE_DIR_ESCAPED "${ZIG_LIBC_INCLUDE_DIR}")
set(ZIG_TARGET_TRIPLE "native" CACHE STRING "arch-os-abi to output binaries for")
set(ZIG_TARGET_MCPU "native" CACHE STRING "-mcpu parameter to output binaries for")
set(ZIG_SINGLE_THREADED off CACHE BOOL "limit the zig compiler to use only 1 thread")
@@ -130,6 +120,8 @@ if(ZIG_AR_WORKAROUND)
string(REPLACE "<CMAKE_AR>" "<CMAKE_AR> ar" CMAKE_CXX_ARCHIVE_CREATE ${CMAKE_CXX_ARCHIVE_CREATE})
endif()
set(ZIG_PIE off CACHE BOOL "produce a position independent zig executable")
find_package(llvm 16)
find_package(clang 16)
find_package(lld 16)
@@ -185,11 +177,6 @@ include_directories(${CLANG_INCLUDE_DIRS})
find_package(Threads)
set(ZIG_LIB_DIR "lib/zig")
set(C_HEADERS_DEST "${ZIG_LIB_DIR}/include")
set(LIBC_FILES_DEST "${ZIG_LIB_DIR}/libc")
set(LIBUNWIND_FILES_DEST "${ZIG_LIB_DIR}/libunwind")
set(LIBCXX_FILES_DEST "${ZIG_LIB_DIR}/libcxx")
set(ZIG_STD_DEST "${ZIG_LIB_DIR}/std")
set(ZIG_CONFIG_H_OUT "${CMAKE_BINARY_DIR}/config.h")
set(ZIG_CONFIG_ZIG_OUT "${CMAKE_BINARY_DIR}/config.zig")
@@ -686,7 +673,12 @@ if(ZIG_STATIC)
endif()
add_library(zigcpp STATIC ${ZIG_CPP_SOURCES})
set_target_properties(zigcpp PROPERTIES COMPILE_FLAGS ${EXE_CXX_FLAGS})
if(ZIG_PIE)
set(ZIGCPP_CXX_FLAGS "${EXE_CXX_FLAGS} -fPIC")
else()
set(ZIGCPP_CXX_FLAGS "${EXE_CXX_FLAGS}")
endif()
set_target_properties(zigcpp PROPERTIES COMPILE_FLAGS ${ZIGCPP_CXX_FLAGS})
target_link_libraries(zigcpp LINK_PUBLIC
${CLANG_LIBRARIES}
@@ -838,10 +830,10 @@ else()
set(ZIG_STATIC_ARG "")
endif()
if(CMAKE_POSITION_INDEPENDENT_CODE)
set(ZIG_PIE_ARG="-Dpie")
if(CMAKE_POSITION_INDEPENDENT_CODE OR ZIG_PIE)
set(ZIG_PIE_ARG "-Dpie")
else()
set(ZIG_PIE_ARG="")
set(ZIG_PIE_ARG "")
endif()
set(ZIG_BUILD_ARGS
@@ -860,8 +852,12 @@ set(ZIG_BUILD_ARGS
)
add_custom_target(stage3 ALL
COMMAND zig2 build compile ${ZIG_BUILD_ARGS}
DEPENDS zig2
DEPENDS "${CMAKE_BINARY_DIR}/stage3/bin/zig"
)
add_custom_command(
OUTPUT "${CMAKE_BINARY_DIR}/stage3/bin/zig"
COMMAND zig2 build --prefix "${CMAKE_BINARY_DIR}/stage3" ${ZIG_BUILD_ARGS}
COMMENT STATUS "Building stage3"
WORKING_DIRECTORY "${CMAKE_SOURCE_DIR}"
)

View File

@@ -9,7 +9,7 @@ const fs = std.fs;
const InstallDirectoryOptions = std.Build.InstallDirectoryOptions;
const assert = std.debug.assert;
const zig_version = std.builtin.Version{ .major = 0, .minor = 11, .patch = 0 };
const zig_version = std.SemanticVersion{ .major = 0, .minor = 11, .patch = 0 };
const stack_size = 32 * 1024 * 1024;
pub fn build(b: *std.Build) !void {
@@ -28,12 +28,9 @@ pub fn build(b: *std.Build) !void {
const use_zig_libcxx = b.option(bool, "use-zig-libcxx", "If libc++ is needed, use zig's bundled version, don't try to integrate with the system") orelse false;
const test_step = b.step("test", "Run all the tests");
const deprecated_skip_install_lib_files = b.option(bool, "skip-install-lib-files", "deprecated. see no-lib") orelse false;
if (deprecated_skip_install_lib_files) {
std.log.warn("-Dskip-install-lib-files is deprecated in favor of -Dno-lib", .{});
}
const skip_install_lib_files = b.option(bool, "no-lib", "skip copying of lib/ files and langref to installation prefix. Useful for development") orelse deprecated_skip_install_lib_files;
const skip_install_lib_files = b.option(bool, "no-lib", "skip copying of lib/ files and langref to installation prefix. Useful for development") orelse false;
const skip_install_langref = b.option(bool, "no-langref", "skip copying of langref to the installation prefix") orelse skip_install_lib_files;
const no_bin = b.option(bool, "no-bin", "skip emitting compiler binary") orelse false;
const docgen_exe = b.addExecutable(.{
.name = "docgen",
@@ -58,12 +55,6 @@ pub fn build(b: *std.Build) !void {
const docs_step = b.step("docs", "Build documentation");
docs_step.dependOn(&docgen_cmd.step);
// This is for legacy reasons, to be removed after our CI scripts are upgraded to use
// the file from the install prefix instead.
const legacy_write_to_cache = b.addWriteFiles();
legacy_write_to_cache.addCopyFileToSource(langref_file, "zig-cache/langref.html");
docs_step.dependOn(&legacy_write_to_cache.step);
const check_case_exe = b.addExecutable(.{
.name = "check-case",
.root_source_file = .{ .path = "test/src/Cases.zig" },
@@ -175,12 +166,16 @@ pub fn build(b: *std.Build) !void {
exe.strip = strip;
exe.pie = pie;
exe.sanitize_thread = sanitize_thread;
exe.build_id = b.option(bool, "build-id", "Include a build id note") orelse false;
exe.entitlements = entitlements;
b.installArtifact(exe);
if (no_bin) exe.emit_bin = .no_emit;
const compile_step = b.step("compile", "Build the self-hosted compiler");
compile_step.dependOn(&exe.step);
exe.build_id = b.option(
std.Build.Step.Compile.BuildId,
"build-id",
"Request creation of '.note.gnu.build-id' section",
);
b.installArtifact(exe);
test_step.dependOn(&exe.step);
@@ -204,7 +199,7 @@ pub fn build(b: *std.Build) !void {
exe_options.addOption(bool, "llvm_has_xtensa", llvm_has_xtensa);
exe_options.addOption(bool, "force_gpa", force_gpa);
exe_options.addOption(bool, "only_c", only_c);
exe_options.addOption(bool, "omit_pkg_fetching_code", only_c);
exe_options.addOption(bool, "only_core_functionality", only_c);
if (link_libc) {
exe.linkLibC();
@@ -242,12 +237,12 @@ pub fn build(b: *std.Build) !void {
},
2 => {
// Untagged development build (e.g. 0.10.0-dev.2025+ecf0050a9).
var it = mem.split(u8, git_describe, "-");
var it = mem.splitScalar(u8, git_describe, '-');
const tagged_ancestor = it.first();
const commit_height = it.next().?;
const commit_id = it.next().?;
const ancestor_ver = try std.builtin.Version.parse(tagged_ancestor);
const ancestor_ver = try std.SemanticVersion.parse(tagged_ancestor);
if (zig_version.order(ancestor_ver) != .gt) {
std.debug.print("Zig version '{}' must be greater than tagged ancestor '{}'\n", .{ zig_version, ancestor_ver });
std.process.exit(1);
@@ -287,7 +282,7 @@ pub fn build(b: *std.Build) !void {
// That means we also have to rely on stage1 compiled c++ files. We parse config.h to find
// the information passed on to us from cmake.
if (cfg.cmake_prefix_path.len > 0) {
var it = mem.tokenize(u8, cfg.cmake_prefix_path, ";");
var it = mem.tokenizeScalar(u8, cfg.cmake_prefix_path, ';');
while (it.next()) |path| {
b.addSearchPrefix(path);
}
@@ -360,7 +355,7 @@ pub fn build(b: *std.Build) !void {
test_cases_options.addOption(bool, "llvm_has_xtensa", llvm_has_xtensa);
test_cases_options.addOption(bool, "force_gpa", force_gpa);
test_cases_options.addOption(bool, "only_c", only_c);
test_cases_options.addOption(bool, "omit_pkg_fetching_code", true);
test_cases_options.addOption(bool, "only_core_functionality", true);
test_cases_options.addOption(bool, "enable_qemu", b.enable_qemu);
test_cases_options.addOption(bool, "enable_wine", b.enable_wine);
test_cases_options.addOption(bool, "enable_wasmtime", b.enable_wasmtime);
@@ -475,9 +470,8 @@ pub fn build(b: *std.Build) !void {
.skip_non_native = skip_non_native,
.skip_cross_glibc = skip_cross_glibc,
.skip_libc = skip_libc,
// I observed a value of 3398275072 on my M1, and multiplied by 1.1 to
// get this amount:
.max_rss = 3738102579,
// I observed a value of 3932766208 on the M1 CI.
.max_rss = 4080218931,
}));
try addWasiUpdateStep(b, version);
@@ -512,7 +506,7 @@ fn addWasiUpdateStep(b: *std.Build, version: [:0]const u8) !void {
exe_options.addOption(bool, "enable_tracy_callstack", false);
exe_options.addOption(bool, "enable_tracy_allocation", false);
exe_options.addOption(bool, "value_tracing", false);
exe_options.addOption(bool, "omit_pkg_fetching_code", true);
exe_options.addOption(bool, "only_core_functionality", true);
const run_opt = b.addSystemCommand(&.{
"wasm-opt",
@@ -536,7 +530,7 @@ fn addCompilerStep(
b: *std.Build,
optimize: std.builtin.OptimizeMode,
target: std.zig.CrossTarget,
) *std.Build.CompileStep {
) *std.Build.Step.Compile {
const exe = b.addExecutable(.{
.name = "zig",
.root_source_file = .{ .path = "src/main.zig" },
@@ -564,7 +558,7 @@ const exe_cflags = [_][]const u8{
fn addCmakeCfgOptionsToExe(
b: *std.Build,
cfg: CMakeConfig,
exe: *std.Build.CompileStep,
exe: *std.Build.Step.Compile,
use_zig_libcxx: bool,
) !void {
if (exe.target.isDarwin()) {
@@ -643,7 +637,7 @@ fn addCmakeCfgOptionsToExe(
}
}
fn addStaticLlvmOptionsToExe(exe: *std.Build.CompileStep) !void {
fn addStaticLlvmOptionsToExe(exe: *std.Build.Step.Compile) !void {
// Adds the Zig C++ sources which both stage1 and stage2 need.
//
// We need this because otherwise zig_clang_cc1_main.cpp ends up pulling
@@ -682,7 +676,7 @@ fn addStaticLlvmOptionsToExe(exe: *std.Build.CompileStep) !void {
fn addCxxKnownPath(
b: *std.Build,
ctx: CMakeConfig,
exe: *std.Build.CompileStep,
exe: *std.Build.Step.Compile,
objname: []const u8,
errtxt: ?[]const u8,
need_cpp_includes: bool,
@@ -690,7 +684,7 @@ fn addCxxKnownPath(
if (!std.process.can_spawn)
return error.RequiredLibraryNotFound;
const path_padded = b.exec(&.{ ctx.cxx_compiler, b.fmt("-print-file-name={s}", .{objname}) });
var tokenizer = mem.tokenize(u8, path_padded, "\r\n");
var tokenizer = mem.tokenizeAny(u8, path_padded, "\r\n");
const path_unpadded = tokenizer.next().?;
if (mem.eql(u8, path_unpadded, objname)) {
if (errtxt) |msg| {
@@ -712,8 +706,8 @@ fn addCxxKnownPath(
}
}
fn addCMakeLibraryList(exe: *std.Build.CompileStep, list: []const u8) void {
var it = mem.tokenize(u8, list, ";");
fn addCMakeLibraryList(exe: *std.Build.Step.Compile, list: []const u8) void {
var it = mem.tokenizeScalar(u8, list, ';');
while (it.next()) |lib| {
if (mem.startsWith(u8, lib, "-l")) {
exe.linkSystemLibrary(lib["-l".len..]);
@@ -726,7 +720,7 @@ fn addCMakeLibraryList(exe: *std.Build.CompileStep, list: []const u8) void {
}
const CMakeConfig = struct {
llvm_linkage: std.Build.CompileStep.Linkage,
llvm_linkage: std.Build.Step.Compile.Linkage,
cmake_binary_dir: []const u8,
cmake_prefix_path: []const u8,
cmake_static_library_prefix: []const u8,
@@ -858,18 +852,18 @@ fn parseConfigH(b: *std.Build, config_h_text: []const u8) ?CMakeConfig {
// .prefix = ZIG_LLVM_LINK_MODE parsed manually below
};
var lines_it = mem.tokenize(u8, config_h_text, "\r\n");
var lines_it = mem.tokenizeAny(u8, config_h_text, "\r\n");
while (lines_it.next()) |line| {
inline for (mappings) |mapping| {
if (mem.startsWith(u8, line, mapping.prefix)) {
var it = mem.split(u8, line, "\"");
var it = mem.splitScalar(u8, line, '"');
_ = it.first(); // skip the stuff before the quote
const quoted = it.next().?; // the stuff inside the quote
@field(ctx, mapping.field) = toNativePathSep(b, quoted);
}
}
if (mem.startsWith(u8, line, "#define ZIG_LLVM_LINK_MODE ")) {
var it = mem.split(u8, line, "\"");
var it = mem.splitScalar(u8, line, '"');
_ = it.next().?; // skip the stuff before the quote
const quoted = it.next().?; // the stuff inside the quote
ctx.llvm_linkage = if (mem.eql(u8, quoted, "shared")) .dynamic else .static;

File diff suppressed because it is too large Load Diff

View File

@@ -71,19 +71,19 @@
text-align: left;
font-weight: normal;
}
.t0_1, .t37, .t37_1 {
.sgr-1m {
font-weight: bold;
}
.t2_0 {
.sgr-2m {
color: #575757;
}
.t31_1 {
.sgr-31_1m {
color: #b40000;
}
.t32_1 {
.sgr-32_1m {
color: green;
}
.t36_1 {
.sgr-36_1m {
color: #005C7A;
}
.file {
@@ -114,7 +114,7 @@
line-height: normal;
}
kbd {
font-weight: bold;
font-weight: normal;
}
.table-wrapper {
width: 100%;
@@ -232,16 +232,16 @@
table, th, td {
border-color: grey;
}
.t2_0 {
.sgr-2m {
color: grey;
}
.t31_1 {
.sgr-31_1m {
color: red;
}
.t32_1 {
.sgr-32_1m {
color: #00B800;
}
.t36_1 {
.sgr-36_1m {
color: #0086b3;
}
code {
@@ -413,7 +413,7 @@ pub fn main() !void {
<p>
The code sample shows the contents of a file named <code class="file">hello.zig</code>. Files storing Zig
source code are {#link|UTF-8 encoded|Source Encoding#} text files. The files storing
Zig source code are usually named with the <code class="file"><em>.zig</em></code> extension.
Zig source code must be named with the <code class="file"><em>.zig</em></code> extension.
</p>
<p>
Following the <code class="file">hello.zig</code> Zig code sample, the {#link|Zig Build System#} is used
@@ -487,7 +487,7 @@ pub fn main() !void {
purposely written to show how to perform {#link|string|String Literals and Unicode Code Point Literals#}
substitution in the {#syntax#}print{#endsyntax#} function. The curly-braces inside of the first argument
are substituted with the compile-time known value inside of the second argument
(known as an {#link|tuple|Tuples#}). The <code>\n</code>
(known as a {#link|tuple|Tuples#}). The <code>\n</code>
inside of the double-quotes of the first argument is the {#link|escape sequence|Escape Sequences#} for the
newline character. The {#link|try#} expression evaluates the result of {#syntax#}stdout.print{#endsyntax#}.
If the result is an error, then the {#syntax#}try{#endsyntax#} expression will return from
@@ -518,6 +518,14 @@ pub fn main() void {
{#see_also|Values|@import|Errors|Root Source File|Source Encoding#}
{#header_close#}
{#header_open|Comments#}
<p>
Zig supports 3 types of comments. Normal comments are ignored, but doc comments
and top-level doc comments are used by the compiler to generate the package documentation.
</p>
<p>
The generated documentation is still experimental, and can be produced with:
</p>
{#shell_samp#}zig test -femit-docs main.zig{#end_shell_samp#}
{#code_begin|exe|comments#}
const print = @import("std").debug.print;
@@ -535,7 +543,7 @@ pub fn main() void {
comments in C). This helps allow Zig to have the property that each line
of code can be tokenized out of context.
</p>
{#header_open|Doc comments#}
{#header_open|Doc Comments#}
<p>
A doc comment is one that begins with exactly three slashes (i.e.
{#syntax#}///{#endsyntax#} but not {#syntax#}////{#endsyntax#});
@@ -562,21 +570,44 @@ const Timestamp = struct {
};
{#code_end#}
<p>
Doc comments are only allowed in certain places; eventually, it will
become a compile error to have a doc comment in an unexpected place, such as
in the middle of an expression, or just before a non-doc comment.
Doc comments are only allowed in certain places; it is a compile error to
have a doc comment in an unexpected place, such as in the middle of an expression,
or just before a non-doc comment.
</p>
{#code_begin|obj_err|invalid_doc-comment|expected type expression, found 'a document comment'#}
/// doc-comment
//! top-level doc-comment
const std = @import("std");
{#code_end#}
{#code_begin|obj_err|unattached_doc-comment|unattached documentation comment#}
pub fn main() void {}
/// End of file
{#code_end#}
<p>
Doc comments can be interleaved with normal comments. Currently, when producing
the package documentation, normal comments are merged with doc comments.
</p>
{#header_close#}
{#header_open|Top-Level Doc Comments#}
<p>User documentation that doesn't belong to whatever
immediately follows it, like {#link|container|Containers#}-level documentation, goes
in top-level doc comments. A top-level doc comment is one that
begins with two slashes and an exclamation point:
{#syntax#}//!{#endsyntax#}.</p>
<p>
A top-level doc comment is one that begins with two slashes and an exclamation
point: {#syntax#}//!{#endsyntax#}; it documents the current module.
</p>
<p>
It is a compile error if a top-level doc comment is not placed at the start
of a {#link|container|Containers#}, before any expressions.
</p>
{#code_begin|syntax|tldoc_comments#}
//! This module provides functions for retrieving the current date and
//! time with varying degrees of precision and accuracy. It does not
//! depend on libc, but will use functions from it if available.
const S = struct {
//! Top level comments are allowed inside a container other than a module,
//! but it is not very useful. Currently, when producing the package
//! documentation, these comments are ignored.
};
{#code_end#}
{#header_close#}
{#header_close#}
@@ -1060,13 +1091,18 @@ test "expect addOne adds one to 41" {
try std.testing.expect(addOne(41) == 42);
}
test addOne {
// A test name can also be written using an identifier.
try std.testing.expect(addOne(41) == 42);
}
/// The function `addOne` adds one to the number given as its argument.
fn addOne(number: i32) i32 {
return number + 1;
}
{#code_end#}
<p>
The <code class="file">introducing_zig_test.zig</code> code sample tests the {#link|function|Functions#}
The <code class="file">testing_introduction.zig</code> code sample tests the {#link|function|Functions#}
{#syntax#}addOne{#endsyntax#} to ensure that it returns {#syntax#}42{#endsyntax#} given the input
{#syntax#}41{#endsyntax#}. From this test's perspective, the {#syntax#}addOne{#endsyntax#} function is
said to be <em>code under test</em>.
@@ -1087,20 +1123,25 @@ fn addOne(number: i32) i32 {
printed to standard error by the default test runner:
</p>
<dl>
<dt><samp>Test [1/1] test "expect addOne adds one to 41"...</samp></dt>
<dt><samp>Test [1/2] test.expect addOne adds one to 41...</samp></dt>
<dd>Lines like this indicate which test, out of the total number of tests, is being run.
In this case, <samp>[1/1]</samp> indicates that the first test, out of a total of
one test, is being run. Note that, when the test runner program's standard error is output
In this case, <samp>[1/2]</samp> indicates that the first test, out of a total of
two test, is being run. Note that, when the test runner program's standard error is output
to the terminal, these lines are cleared when a test succeeds.
</dd>
<dt><samp>All 1 tests passed.</samp></dt>
<dt><samp>Test [2/2] decltest.addOne...</samp></dt>
<dd>When the test name is an identifier, the default test runner uses the text
decltest instead of test.
</dd>
<dt><samp>All 2 tests passed.</samp></dt>
<dd>This line indicates the total number of tests that have passed.</dd>
</dl>
{#header_open|Test Declarations#}
<p>
Test declarations contain the {#link|keyword|Keyword Reference#} {#syntax#}test{#endsyntax#}, followed by an
optional name written as a {#link|string literal|String Literals and Unicode Code Point Literals#}, followed
by a {#link|block|Blocks#} containing any valid Zig code that is allowed in a {#link|function|Functions#}.
optional name written as a {#link|string literal|String Literals and Unicode Code Point Literals#} or an
{#link|identifier|Identifiers#}, followed by a {#link|block|Blocks#} containing any valid Zig code that
is allowed in a {#link|function|Functions#}.
</p>
<aside>
By convention, non-named tests should only be used to {#link|make other tests run|Nested Container Tests#}.
@@ -1138,7 +1179,7 @@ const std = @import("std");
const expect = std.testing.expect;
// Imported source file tests will run when referenced from a top-level test declaration.
// The next line alone does not cause "introducing_zig_test.zig" tests to run.
// The next line alone does not cause "testing_introduction.zig" tests to run.
const imported_file = @import("testing_introduction.zig");
test {
@@ -2953,6 +2994,14 @@ test "basic slices" {
const array_ptr = array[0..array.len];
try expect(@TypeOf(array_ptr) == *[array.len]i32);
// You can perform a slice-by-length by slicing twice. This allows the compiler
// to perform some optimisations like recognising a comptime-known length when
// the start position is only known at runtime.
var runtime_start: usize = 1;
const length = 2;
const array_ptr_len = array[runtime_start..][0..length];
try expect(@TypeOf(array_ptr_len) == *[length]i32);
// Using the address-of operator on a slice gives a single-item pointer,
// while using the `ptr` field gives a many-item pointer.
try expect(@TypeOf(slice.ptr) == [*]i32);
@@ -2983,7 +3032,7 @@ test "using slices for strings" {
const world: []const u8 = "世界";
var all_together: [100]u8 = undefined;
// You can use slice syntax with at least one runtime-know index on an
// You can use slice syntax with at least one runtime-known index on an
// array to convert an array into a slice.
var start : usize = 0;
const all_together_slice = all_together[start..];
@@ -3298,7 +3347,7 @@ const Divided = packed struct {
test "@bitCast between packed structs" {
try doTheTest();
comptime try doTheTest();
try comptime doTheTest();
}
fn doTheTest() !void {
@@ -5184,7 +5233,8 @@ export fn sub(a: i8, b: i8) i8 { return a - b; }
// The extern specifier is used to declare a function that will be resolved
// at link time, when linking statically, or at runtime, when linking
// dynamically.
// dynamically. The quoted identifier after the extern keyword specifies
// the library that has the function. (e.g. "c" -> libc.so)
// The callconv specifier changes the calling convention of the function.
const WINAPI: std.builtin.CallingConvention = if (native_arch == .x86) .Stdcall else .C;
extern "kernel32" fn ExitProcess(exit_code: u32) callconv(WINAPI) noreturn;
@@ -5311,7 +5361,7 @@ test "fn reflection" {
</p>
<p>
The number of unique error values across the entire compilation should determine the size of the error set type.
However right now it is hard coded to be a {#syntax#}u16{#endsyntax#}. See <a href="https://github.com/ziglang/zig/issues/786">#768</a>.
However right now it is hard coded to be a {#syntax#}u16{#endsyntax#}. See <a href="https://github.com/ziglang/zig/issues/786">#786</a>.
</p>
<p>
You can {#link|coerce|Type Coercion#} an error from a subset to a superset:
@@ -5806,10 +5856,10 @@ test "error union" {
foo = error.SomeError;
// Use compile-time reflection to access the payload type of an error union:
comptime try expect(@typeInfo(@TypeOf(foo)).ErrorUnion.payload == i32);
try comptime expect(@typeInfo(@TypeOf(foo)).ErrorUnion.payload == i32);
// Use compile-time reflection to access the error set type of an error union:
comptime try expect(@typeInfo(@TypeOf(foo)).ErrorUnion.error_set == anyerror);
try comptime expect(@typeInfo(@TypeOf(foo)).ErrorUnion.error_set == anyerror);
}
{#code_end#}
{#header_open|Merging Error Sets#}
@@ -6190,7 +6240,7 @@ test "optional type" {
foo = 1234;
// Use compile-time reflection to access the child type of the optional:
comptime try expect(@typeInfo(@TypeOf(foo)).Optional.child == i32);
try comptime expect(@typeInfo(@TypeOf(foo)).Optional.child == i32);
}
{#code_end#}
{#header_close#}
@@ -6623,8 +6673,8 @@ test "peer resolve int widening" {
test "peer resolve arrays of different size to const slice" {
try expect(mem.eql(u8, boolToStr(true), "true"));
try expect(mem.eql(u8, boolToStr(false), "false"));
comptime try expect(mem.eql(u8, boolToStr(true), "true"));
comptime try expect(mem.eql(u8, boolToStr(false), "false"));
try comptime expect(mem.eql(u8, boolToStr(true), "true"));
try comptime expect(mem.eql(u8, boolToStr(false), "false"));
}
fn boolToStr(b: bool) []const u8 {
return if (b) "true" else "false";
@@ -6632,7 +6682,7 @@ fn boolToStr(b: bool) []const u8 {
test "peer resolve array and const slice" {
try testPeerResolveArrayConstSlice(true);
comptime try testPeerResolveArrayConstSlice(true);
try comptime testPeerResolveArrayConstSlice(true);
}
fn testPeerResolveArrayConstSlice(b: bool) !void {
const value1 = if (b) "aoeu" else @as([]const u8, "zz");
@@ -7841,10 +7891,6 @@ comptime {
Converts {#syntax#}true{#endsyntax#} to {#syntax#}@as(u1, 1){#endsyntax#} and {#syntax#}false{#endsyntax#} to
{#syntax#}@as(u1, 0){#endsyntax#}.
</p>
<p>
If the value is known at compile-time, the return type is {#syntax#}comptime_int{#endsyntax#}
instead of {#syntax#}u1{#endsyntax#}.
</p>
{#header_close#}
{#header_open|@bitSizeOf#}
@@ -8686,10 +8732,9 @@ test "integer cast panic" {
<p>{#syntax#}dest{#endsyntax#} must be a mutable slice, a mutable pointer to an array, or
a mutable many-item {#link|pointer|Pointers#}. It may have any
alignment, and it may have any element type.</p>
<p>Likewise, {#syntax#}source{#endsyntax#} must be a mutable slice, a
mutable pointer to an array, or a mutable many-item
{#link|pointer|Pointers#}. It may have any alignment, and it may have any
element type.</p>
<p>{#syntax#}source{#endsyntax#} must be a slice, a pointer to
an array, or a many-item {#link|pointer|Pointers#}. It may
have any alignment, and it may have any element type.</p>
<p>The {#syntax#}source{#endsyntax#} element type must support {#link|Type Coercion#}
into the {#syntax#}dest{#endsyntax#} element type. The element types may have
different ABI size, however, that may incur a performance penalty.</p>
@@ -9180,7 +9225,7 @@ const expect = std.testing.expect;
test "vector @splat" {
const scalar: u32 = 5;
const result = @splat(4, scalar);
comptime try expect(@TypeOf(result) == @Vector(4, u32));
try comptime expect(@TypeOf(result) == @Vector(4, u32));
try expect(std.mem.eql(u32, &@as([4]u32, result), &[_]u32{ 5, 5, 5, 5 }));
}
{#code_end#}
@@ -9224,9 +9269,9 @@ test "vector @reduce" {
const value = @Vector(4, i32){ 1, -1, 1, -1 };
const result = value > @splat(4, @as(i32, 0));
// result is { true, false, true, false };
comptime try expect(@TypeOf(result) == @Vector(4, bool));
try comptime expect(@TypeOf(result) == @Vector(4, bool));
const is_all_true = @reduce(.And, result);
comptime try expect(@TypeOf(is_all_true) == bool);
try comptime expect(@TypeOf(is_all_true) == bool);
try expect(is_all_true == false);
}
{#code_end#}
@@ -9269,7 +9314,7 @@ fn doTheTest() !void {
{#header_open|@sin#}
<pre>{#syntax#}@sin(value: anytype) @TypeOf(value){#endsyntax#}</pre>
<p>
Sine trigonometric function on a floating point number. Uses a dedicated hardware instruction
Sine trigonometric function on a floating point number in radians. Uses a dedicated hardware instruction
when available.
</p>
<p>
@@ -9280,7 +9325,7 @@ fn doTheTest() !void {
{#header_open|@cos#}
<pre>{#syntax#}@cos(value: anytype) @TypeOf(value){#endsyntax#}</pre>
<p>
Cosine trigonometric function on a floating point number. Uses a dedicated hardware instruction
Cosine trigonometric function on a floating point number in radians. Uses a dedicated hardware instruction
when available.
</p>
<p>
@@ -9291,7 +9336,7 @@ fn doTheTest() !void {
{#header_open|@tan#}
<pre>{#syntax#}@tan(value: anytype) @TypeOf(value){#endsyntax#}</pre>
<p>
Tangent trigonometric function on a floating point number.
Tangent trigonometric function on a floating point number in radians.
Uses a dedicated hardware instruction when available.
</p>
<p>
@@ -9567,7 +9612,7 @@ const expect = std.testing.expect;
test "no runtime side effects" {
var data: i32 = 0;
const T = @TypeOf(foo(i32, &data));
comptime try expect(T == i32);
try comptime expect(T == i32);
try expect(data == 0);
}
@@ -10172,7 +10217,7 @@ pub fn main() void {
{#header_open|Invalid Error Set Cast#}
<p>At compile-time:</p>
{#code_begin|test_err|test_comptime_invalid_error_set_cast|'error.B' not a member of error set 'error{A,C}'#}
{#code_begin|test_err|test_comptime_invalid_error_set_cast|'error.B' not a member of error set 'error{C,A}'#}
const Set1 = error{
A,
B,
@@ -11213,8 +11258,8 @@ pub fn main() !void {
}
}
{#code_end#}
{#shell_samp#}$ wasmtime args.wasm 123 hello
0: args.wasm
{#shell_samp#}$ wasmtime wasi_args.wasm 123 hello
0: wasi_args.wasm
1: 123
2: hello{#end_shell_samp#}
<p>A more interesting example would be extracting the list of preopens from the runtime.
@@ -11239,7 +11284,7 @@ pub fn main() !void {
}
}
{#code_end#}
{#shell_samp#}$ wasmtime --dir=. preopens.wasm
{#shell_samp#}$ wasmtime --dir=. wasi_preopens.wasm
0: stdin
1: stdout
2: stderr

View File

@@ -90,7 +90,7 @@ pub fn main() !void {
var install_prefix: ?[]const u8 = null;
var dir_list = std.Build.DirList{};
var enable_summary: ?bool = null;
var summary: ?Summary = null;
var max_rss: usize = 0;
var color: Color = .auto;
@@ -151,8 +151,7 @@ pub fn main() !void {
std.debug.print("Expected argument after {s}\n\n", .{arg});
usageAndErr(builder, false, stderr_stream);
};
// TODO: support shorthand such as "2GiB", "2GB", or "2G"
max_rss = std.fmt.parseInt(usize, max_rss_text, 10) catch |err| {
max_rss = std.fmt.parseIntSizeSuffix(max_rss_text, 10) catch |err| {
std.debug.print("invalid byte size: '{s}': {s}\n", .{
max_rss_text, @errorName(err),
});
@@ -179,6 +178,15 @@ pub fn main() !void {
std.debug.print("Expected [auto|on|off] after {s}, found '{s}'\n\n", .{ arg, next_arg });
usageAndErr(builder, false, stderr_stream);
};
} else if (mem.eql(u8, arg, "--summary")) {
const next_arg = nextArg(args, &arg_idx) orelse {
std.debug.print("Expected [all|failures|none] after {s}\n\n", .{arg});
usageAndErr(builder, false, stderr_stream);
};
summary = std.meta.stringToEnum(Summary, next_arg) orelse {
std.debug.print("Expected [all|failures|none] after {s}, found '{s}'\n\n", .{ arg, next_arg });
usageAndErr(builder, false, stderr_stream);
};
} else if (mem.eql(u8, arg, "--zig-lib-dir")) {
builder.zig_lib_dir = nextArg(args, &arg_idx) orelse {
std.debug.print("Expected argument after {s}\n\n", .{arg});
@@ -235,10 +243,6 @@ pub fn main() !void {
builder.enable_darling = true;
} else if (mem.eql(u8, arg, "-fno-darling")) {
builder.enable_darling = false;
} else if (mem.eql(u8, arg, "-fsummary")) {
enable_summary = true;
} else if (mem.eql(u8, arg, "-fno-summary")) {
enable_summary = false;
} else if (mem.eql(u8, arg, "-freference-trace")) {
builder.reference_trace = 256;
} else if (mem.startsWith(u8, arg, "-freference-trace=")) {
@@ -303,7 +307,7 @@ pub fn main() !void {
.memory_blocked_steps = std.ArrayList(*Step).init(arena),
.claimed_rss = 0,
.enable_summary = enable_summary,
.summary = summary,
.ttyconf = ttyconf,
.stderr = stderr,
};
@@ -333,8 +337,8 @@ const Run = struct {
memory_blocked_steps: std.ArrayList(*Step),
claimed_rss: usize,
enable_summary: ?bool,
ttyconf: std.debug.TTY.Config,
summary: ?Summary,
ttyconf: std.io.tty.Config,
stderr: std.fs.File,
};
@@ -470,16 +474,16 @@ fn runStepNames(
// A proper command line application defaults to silently succeeding.
// The user may request verbose mode if they have a different preference.
if (failure_count == 0 and run.enable_summary != true) return cleanExit();
if (failure_count == 0 and run.summary != Summary.all) return cleanExit();
const ttyconf = run.ttyconf;
const stderr = run.stderr;
if (run.enable_summary != false) {
if (run.summary != Summary.none) {
const total_count = success_count + failure_count + pending_count + skipped_count;
ttyconf.setColor(stderr, .Cyan) catch {};
ttyconf.setColor(stderr, .cyan) catch {};
stderr.writeAll("Build Summary:") catch {};
ttyconf.setColor(stderr, .Reset) catch {};
ttyconf.setColor(stderr, .reset) catch {};
stderr.writer().print(" {d}/{d} steps succeeded", .{ success_count, total_count }) catch {};
if (skipped_count > 0) stderr.writer().print("; {d} skipped", .{skipped_count}) catch {};
if (failure_count > 0) stderr.writer().print("; {d} failed", .{failure_count}) catch {};
@@ -489,23 +493,32 @@ fn runStepNames(
if (test_fail_count > 0) stderr.writer().print("; {d} failed", .{test_fail_count}) catch {};
if (test_leak_count > 0) stderr.writer().print("; {d} leaked", .{test_leak_count}) catch {};
if (run.enable_summary == null) {
ttyconf.setColor(stderr, .Dim) catch {};
stderr.writeAll(" (disable with -fno-summary)") catch {};
ttyconf.setColor(stderr, .Reset) catch {};
if (run.summary == null) {
ttyconf.setColor(stderr, .dim) catch {};
stderr.writeAll(" (disable with --summary none)") catch {};
ttyconf.setColor(stderr, .reset) catch {};
}
stderr.writeAll("\n") catch {};
const failures_only = run.summary != Summary.all;
// Print a fancy tree with build results.
var print_node: PrintNode = .{ .parent = null };
if (step_names.len == 0) {
print_node.last = true;
printTreeStep(b, b.default_step, stderr, ttyconf, &print_node, &step_stack) catch {};
printTreeStep(b, b.default_step, stderr, ttyconf, &print_node, &step_stack, failures_only) catch {};
} else {
const last_index = if (!failures_only) b.top_level_steps.count() else blk: {
var i: usize = step_names.len;
while (i > 0) {
i -= 1;
if (b.top_level_steps.get(step_names[i]).?.step.state != .success) break :blk i;
}
break :blk b.top_level_steps.count();
};
for (step_names, 0..) |step_name, i| {
const tls = b.top_level_steps.get(step_name).?;
print_node.last = i + 1 == b.top_level_steps.count();
printTreeStep(b, &tls.step, stderr, ttyconf, &print_node, &step_stack) catch {};
print_node.last = i + 1 == last_index;
printTreeStep(b, &tls.step, stderr, ttyconf, &print_node, &step_stack, failures_only) catch {};
}
}
}
@@ -536,7 +549,7 @@ const PrintNode = struct {
last: bool = false,
};
fn printPrefix(node: *PrintNode, stderr: std.fs.File, ttyconf: std.debug.TTY.Config) !void {
fn printPrefix(node: *PrintNode, stderr: std.fs.File, ttyconf: std.io.tty.Config) !void {
const parent = node.parent orelse return;
if (parent.parent == null) return;
try printPrefix(parent, stderr, ttyconf);
@@ -554,14 +567,16 @@ fn printTreeStep(
b: *std.Build,
s: *Step,
stderr: std.fs.File,
ttyconf: std.debug.TTY.Config,
ttyconf: std.io.tty.Config,
parent_node: *PrintNode,
step_stack: *std.AutoArrayHashMapUnmanaged(*Step, void),
failures_only: bool,
) !void {
const first = step_stack.swapRemove(s);
if (failures_only and s.state == .success) return;
try printPrefix(parent_node, stderr, ttyconf);
if (!first) try ttyconf.setColor(stderr, .Dim);
if (!first) try ttyconf.setColor(stderr, .dim);
if (parent_node.parent != null) {
if (parent_node.last) {
try stderr.writeAll(switch (ttyconf) {
@@ -587,28 +602,28 @@ fn printTreeStep(
.running => unreachable,
.dependency_failure => {
try ttyconf.setColor(stderr, .Dim);
try ttyconf.setColor(stderr, .dim);
try stderr.writeAll(" transitive failure\n");
try ttyconf.setColor(stderr, .Reset);
try ttyconf.setColor(stderr, .reset);
},
.success => {
try ttyconf.setColor(stderr, .Green);
try ttyconf.setColor(stderr, .green);
if (s.result_cached) {
try stderr.writeAll(" cached");
} else if (s.test_results.test_count > 0) {
const pass_count = s.test_results.passCount();
try stderr.writer().print(" {d} passed", .{pass_count});
if (s.test_results.skip_count > 0) {
try ttyconf.setColor(stderr, .Yellow);
try ttyconf.setColor(stderr, .yellow);
try stderr.writer().print(" {d} skipped", .{s.test_results.skip_count});
}
} else {
try stderr.writeAll(" success");
}
try ttyconf.setColor(stderr, .Reset);
try ttyconf.setColor(stderr, .reset);
if (s.result_duration_ns) |ns| {
try ttyconf.setColor(stderr, .Dim);
try ttyconf.setColor(stderr, .dim);
if (ns >= std.time.ns_per_min) {
try stderr.writer().print(" {d}m", .{ns / std.time.ns_per_min});
} else if (ns >= std.time.ns_per_s) {
@@ -620,11 +635,11 @@ fn printTreeStep(
} else {
try stderr.writer().print(" {d}ns", .{ns});
}
try ttyconf.setColor(stderr, .Reset);
try ttyconf.setColor(stderr, .reset);
}
if (s.result_peak_rss != 0) {
const rss = s.result_peak_rss;
try ttyconf.setColor(stderr, .Dim);
try ttyconf.setColor(stderr, .dim);
if (rss >= 1000_000_000) {
try stderr.writer().print(" MaxRSS:{d}G", .{rss / 1000_000_000});
} else if (rss >= 1000_000) {
@@ -634,67 +649,75 @@ fn printTreeStep(
} else {
try stderr.writer().print(" MaxRSS:{d}B", .{rss});
}
try ttyconf.setColor(stderr, .Reset);
try ttyconf.setColor(stderr, .reset);
}
try stderr.writeAll("\n");
},
.skipped => {
try ttyconf.setColor(stderr, .Yellow);
try ttyconf.setColor(stderr, .yellow);
try stderr.writeAll(" skipped\n");
try ttyconf.setColor(stderr, .Reset);
try ttyconf.setColor(stderr, .reset);
},
.failure => {
if (s.result_error_bundle.errorMessageCount() > 0) {
try ttyconf.setColor(stderr, .Red);
try ttyconf.setColor(stderr, .red);
try stderr.writer().print(" {d} errors\n", .{
s.result_error_bundle.errorMessageCount(),
});
try ttyconf.setColor(stderr, .Reset);
try ttyconf.setColor(stderr, .reset);
} else if (!s.test_results.isSuccess()) {
try stderr.writer().print(" {d}/{d} passed", .{
s.test_results.passCount(), s.test_results.test_count,
});
if (s.test_results.fail_count > 0) {
try stderr.writeAll(", ");
try ttyconf.setColor(stderr, .Red);
try ttyconf.setColor(stderr, .red);
try stderr.writer().print("{d} failed", .{
s.test_results.fail_count,
});
try ttyconf.setColor(stderr, .Reset);
try ttyconf.setColor(stderr, .reset);
}
if (s.test_results.skip_count > 0) {
try stderr.writeAll(", ");
try ttyconf.setColor(stderr, .Yellow);
try ttyconf.setColor(stderr, .yellow);
try stderr.writer().print("{d} skipped", .{
s.test_results.skip_count,
});
try ttyconf.setColor(stderr, .Reset);
try ttyconf.setColor(stderr, .reset);
}
if (s.test_results.leak_count > 0) {
try stderr.writeAll(", ");
try ttyconf.setColor(stderr, .Red);
try ttyconf.setColor(stderr, .red);
try stderr.writer().print("{d} leaked", .{
s.test_results.leak_count,
});
try ttyconf.setColor(stderr, .Reset);
try ttyconf.setColor(stderr, .reset);
}
try stderr.writeAll("\n");
} else {
try ttyconf.setColor(stderr, .Red);
try ttyconf.setColor(stderr, .red);
try stderr.writeAll(" failure\n");
try ttyconf.setColor(stderr, .Reset);
try ttyconf.setColor(stderr, .reset);
}
},
}
const last_index = if (!failures_only) s.dependencies.items.len -| 1 else blk: {
var i: usize = s.dependencies.items.len;
while (i > 0) {
i -= 1;
if (s.dependencies.items[i].state != .success) break :blk i;
}
break :blk s.dependencies.items.len -| 1;
};
for (s.dependencies.items, 0..) |dep, i| {
var print_node: PrintNode = .{
.parent = parent_node,
.last = i == s.dependencies.items.len - 1,
.last = i == last_index,
};
try printTreeStep(b, dep, stderr, ttyconf, &print_node, step_stack);
try printTreeStep(b, dep, stderr, ttyconf, &print_node, step_stack, failures_only);
}
} else {
if (s.dependencies.items.len == 0) {
@@ -704,7 +727,7 @@ fn printTreeStep(
s.dependencies.items.len,
});
}
try ttyconf.setColor(stderr, .Reset);
try ttyconf.setColor(stderr, .reset);
}
}
@@ -820,13 +843,13 @@ fn workerMakeOneStep(
for (s.result_error_msgs.items) |msg| {
// Sometimes it feels like you just can't catch a break. Finally,
// with Zig, you can.
ttyconf.setColor(stderr, .Bold) catch break;
ttyconf.setColor(stderr, .bold) catch break;
stderr.writeAll(s.owner.dep_prefix) catch break;
stderr.writeAll(s.name) catch break;
stderr.writeAll(": ") catch break;
ttyconf.setColor(stderr, .Red) catch break;
ttyconf.setColor(stderr, .red) catch break;
stderr.writeAll("error: ") catch break;
ttyconf.setColor(stderr, .Reset) catch break;
ttyconf.setColor(stderr, .reset) catch break;
stderr.writeAll(msg) catch break;
stderr.writeAll("\n") catch break;
}
@@ -949,8 +972,10 @@ fn usage(builder: *std.Build, already_ran_build: bool, out_stream: anytype) !voi
\\ -l, --list-steps Print available steps
\\ --verbose Print commands before executing them
\\ --color [auto|off|on] Enable or disable colored error messages
\\ -fsummary Print the build summary, even on success
\\ -fno-summary Omit the build summary, even on failure
\\ --summary [mode] Control the printing of the build summary
\\ all Print the build summary in its entirety
\\ failures (Default) Only print failed steps
\\ none Do not print the build summary
\\ -j<N> Limit concurrent jobs (default is to use all CPU cores)
\\ --maxrss <bytes> Limit memory usage (default is to use available memory)
\\
@@ -1026,16 +1051,17 @@ fn cleanExit() void {
}
const Color = enum { auto, off, on };
const Summary = enum { all, failures, none };
fn get_tty_conf(color: Color, stderr: std.fs.File) std.debug.TTY.Config {
fn get_tty_conf(color: Color, stderr: std.fs.File) std.io.tty.Config {
return switch (color) {
.auto => std.debug.detectTTYConfig(stderr),
.auto => std.io.tty.detectConfig(stderr),
.on => .escape_codes,
.off => .no_color,
};
}
fn renderOptions(ttyconf: std.debug.TTY.Config) std.zig.ErrorBundle.RenderOptions {
fn renderOptions(ttyconf: std.io.tty.Config) std.zig.ErrorBundle.RenderOptions {
return .{
.ttyconf = ttyconf,
.include_source_line = ttyconf != .no_color,

View File

@@ -1,804 +0,0 @@
If hardware lacks basic or specialized functionality, compiler-rt adds such functionality
for basic arithmetic(s).
One such example is 64-bit integer multiplication on 32-bit x86.
Goals:
1. zig as linker for object files produced by other compilers
=> `function compatibility` to compiler-rt and libgcc for same-named functions
* compatibility conflict between compiler-rt and libgcc: prefer compiler-rt
2. `symbol-level compatibility` low-priority compared to emitted calls by llvm
* symbol-level compatibility: libgcc even lower priority
3. add zig-specific language runtime features, see #7265
* example: arbitrary bit width integer arithmetic
* lower to call those functions for e.g. multiplying two i12345 numbers together
* proper naming + documention for standardizing (allow languages to follow our exmaple)
Current status (tracking libgcc documentation):
- Integer library routines => almost implemented
- Soft float library routines => finished
- Decimal float library routines => unimplemented (~120 functions)
- Fixed-point fractional library routines => unimplemented (~300 functions)
- Exception handling routines => unclear, if supported (~32+x undocumented functions)
- Miscellaneous routines => unclear, if supported (cache control and stack function)
- No zig-specific language runtime features in compiler-rt yet
This library is automatically built as-needed for the compilation target and
then statically linked and therefore is a transparent dependency for the
programmer.
For details see `../compiler_rt.zig`.
Bugs should be solved by trying to duplicate the bug upstream, if possible.
* If the bug exists upstream, get it fixed upstream and port the fix downstream to Zig.
* If the bug only exists in Zig, use the corresponding C code and debug
both implementations side by side to figure out what is wrong.
Routines with status are given below. Sources were besides
"The Art of Computer Programming" by Donald E. Knuth, "HackersDelight" by Henry S. Warren,
"Bit Twiddling Hacks" collected by Sean Eron Anderson, "Berkeley SoftFloat" by John R. Hauser,
LLVM "compiler-rt" as it was MIT-licensed, "musl libc" and thoughts + work of contributors.
The compiler-rt routines have not yet been audited.
See https://github.com/ziglang/zig/issues/1504.
From left to right the columns mean 1. if the routine is implemented (✗ or ✓),
2. the name, 3. input (`a`), 4. input (`b`), 5. return value,
6. an explanation of the functionality, .. to repeat the comment from the
column a row above and/or additional return values.
Some routines have more extensive comments supplemented with a reference text.
Integer and Float Operations
| Done | Name | a | b | Out | Comment |
| ------ | ------------- | ---- | ---- | ---- | ------------------------------ |
| | | | | | **Integer Bit Operations** |
| ✓ | __clzsi2 | u32 | ∅ | i32 | count leading zeros |
| ✓ | __clzdi2 | u64 | ∅ | i32 | count leading zeros |
| ✓ | __clzti2 | u128 | ∅ | i32 | count leading zeros |
| ✓ | __ctzsi2 | u32 | ∅ | i32 | count trailing zeros |
| ✓ | __ctzdi2 | u64 | ∅ | i32 | count trailing zeros |
| ✓ | __ctzti2 | u128 | ∅ | i32 | count trailing zeros |
| ✓ | __ffssi2 | u32 | ∅ | i32 | find least significant 1 bit |
| ✓ | __ffsdi2 | u64 | ∅ | i32 | find least significant 1 bit |
| ✓ | __ffsti2 | u128 | ∅ | i32 | find least significant 1 bit |
| ✓ | __paritysi2 | u32 | ∅ | i32 | bit parity |
| ✓ | __paritydi2 | u64 | ∅ | i32 | bit parity |
| ✓ | __parityti2 | u128 | ∅ | i32 | bit parity |
| ✓ | __popcountsi2 | u32 | ∅ | i32 | bit population |
| ✓ | __popcountdi2 | u64 | ∅ | i32 | bit population |
| ✓ | __popcountti2 | u128 | ∅ | i32 | bit population |
| ✓ | __bswapsi2 | u32 | ∅ | i32 | byte swap |
| ✓ | __bswapdi2 | u64 | ∅ | i32 | byte swap |
| ✓ | __bswapti2 | u128 | ∅ | i32 | byte swap |
| | | | | | **Integer Comparison** |
| ✓ | __cmpsi2 | i32 | i32 | i32 | `(a<b) -> 0, (a==b) -> 1, (a>b) -> 2` |
| ✓ | __cmpdi2 | i64 | i64 | i32 | .. |
| ✗ | __aeabi_lcmp | i64 | i64 | i32 | .. ARM |
| ✓ | __cmpti2 | i128 | i128 | i32 | .. |
| ✓ | __ucmpsi2 | u32 | u32 | i32 | `(a<b) -> 0, (a==b) -> 1, (a>b) -> 2` |
| ✓ | __ucmpdi2 | u64 | u64 | i32 | .. |
| ✗ | __aeabi_ulcmp | u64 | u64 | i32 | .. ARM |
| ✓ | __ucmpti2 | u128 | u128 | i32 | .. |
| | | | | | **Integer Arithmetic** |
| ✓ | __ashlsi3 | i32 | i32 | i32 | `a << b` [^unused_rl78] |
| ✓ | __ashldi3 | i64 | i32 | i64 | .. |
| ✓ | __ashlti3 | i128 | i32 | i128 | .. |
| ✓ | __aeabi_llsl | i32 | i32 | i32 | .. ARM |
| ✓ | __ashrsi3 | i32 | i32 | i32 | `a >> b` arithmetic (sign fill) [^unused_rl78] |
| ✓ | __ashrdi3 | i64 | i32 | i64 | .. |
| ✓ | __ashrti3 | i128 | i32 | i128 | .. |
| ✓ | __aeabi_lasr | i64 | i32 | i64 | .. ARM |
| ✓ | __lshrsi3 | i32 | i32 | i32 | `a >> b` logical (zero fill) [^unused_rl78] |
| ✓ | __lshrdi3 | i64 | i32 | i64 | .. |
| ✓ | __lshrti3 | i128 | i32 | i128 | .. |
| ✓ | __aeabi_llsr | i64 | i32 | i64 | .. ARM |
| ✓ | __negsi2 | i32 | i32 | i32 | `-a` [^libgcc_compat] |
| ✓ | __negdi2 | i64 | i64 | i64 | .. |
| ✓ | __negti2 | i128 | i128 | i128 | .. |
| ✓ | __mulsi3 | i32 | i32 | i32 | `a * b` |
| ✓ | __muldi3 | i64 | i64 | i64 | .. |
| ✓ | __aeabi_lmul | i64 | i64 | i64 | .. ARM |
| ✓ | __multi3 | i128 | i128 | i128 | .. |
| ✓ | __divsi3 | i32 | i32 | i32 | `a / b` |
| ✓ | __divdi3 | i64 | i64 | i64 | .. |
| ✓ | __divti3 | i128 | i128 | i128 | .. |
| ✓ | __aeabi_idiv | i32 | i32 | i32 | .. ARM |
| ✓ | __udivsi3 | u32 | u32 | u32 | `a / b` |
| ✓ | __udivdi3 | u64 | u64 | u64 | .. |
| ✓ | __udivti3 | u128 | u128 | u128 | .. |
| ✓ | __aeabi_uidiv | i32 | i32 | i32 | .. ARM |
| ✓ | __modsi3 | i32 | i32 | i32 | `a % b` |
| ✓ | __moddi3 | i64 | i64 | i64 | .. |
| ✓ | __modti3 | i128 | i128 | i128 | .. |
| ✓ | __umodsi3 | u32 | u32 | u32 | `a % b` |
| ✓ | __umoddi3 | u64 | u64 | u64 | .. |
| ✓ | __umodti3 | u128 | u128 | u128 | .. |
| ✓ | __udivmodsi4 | u32 | u32 | u32 | `a / b, rem.* = a % b` |
| ✓ | __aeabi_uidivmod | u32 | u32 | u32 | .. ARM |
| ✓ | __udivmoddi4 | u64 | u64 | u64 | .. |
| ✓ | __aeabi_uldivmod | u64 | u64 | u64 | .. ARM |
| ✓ | __udivmodti4 | u128 | u128 | u128 | .. |
| ✓ | __divmodsi4 | i32 | i32 | i32 | `a / b, rem.* = a % b` |
| ✓ | __aeabi_idivmod | i32 | i32 | i32 | .. ARM |
| ✓ | __divmoddi4 | i64 | i64 | i64 | .. |
| ✓ | __aeabi_ldivmod | i64 | i64 | i64 | .. ARM |
| ✓ | __divmodti4 | i128 | i128 | i128 | .. [^libgcc_compat] |
| | | | | | **Integer Arithmetic with Trapping Overflow**|
| ✓ | __absvsi2 | i32 | i32 | i32 | abs(a) |
| ✓ | __absvdi2 | i64 | i64 | i64 | .. |
| ✓ | __absvti2 | i128 | i128 | i128 | .. |
| ✓ | __negvsi2 | i32 | i32 | i32 | `-a` [^libgcc_compat] |
| ✓ | __negvdi2 | i64 | i64 | i64 | .. |
| ✓ | __negvti2 | i128 | i128 | i128 | .. |
| ✗ | __addvsi3 | i32 | i32 | i32 | `a + b` |
| ✗ | __addvdi3 | i64 | i64 | i64 | .. |
| ✗ | __addvti3 | i128 | i128 | i128 | .. |
| ✗ | __subvsi3 | i32 | i32 | i32 | `a - b` |
| ✗ | __subvdi3 | i64 | i64 | i64 | .. |
| ✗ | __subvti3 | i128 | i128 | i128 | .. |
| ✗ | __mulvsi3 | i32 | i32 | i32 | `a * b` |
| ✗ | __mulvdi3 | i64 | i64 | i64 | .. |
| ✗ | __mulvti3 | i128 | i128 | i128 | .. |
| | | | | | **Integer Arithmetic which Return on Overflow** [^noptr_faster] |
| ✓ | __addosi4 | i32 | i32 | i32 | `a + b`, overflow->ov.*=1 else 0 [^perf_addition] |
| ✓ | __addodi4 | i64 | i64 | i64 | .. |
| ✓ | __addoti4 | i128 | i128 | i128 | .. |
| ✓ | __subosi4 | i32 | i32 | i32 | `a - b`, overflow->ov.*=1 else 0 [^perf_addition] |
| ✓ | __subodi4 | i64 | i64 | i64 | .. |
| ✓ | __suboti4 | i128 | i128 | i128 | .. |
| ✓ | __mulosi4 | i32 | i32 | i32 | `a * b`, overflow->ov.*=1 else 0 |
| ✓ | __mulodi4 | i64 | i64 | i64 | .. |
| ✓ | __muloti4 | i128 | i128 | i128 | .. |
| | | | | | **Float Conversion** |
| ✓ | __extendhfdf2 | f16 | ∅ | f32 | .. |
| ✓ | __extendsfdf2 | f32 | ∅ | f64 | .. |
| ✓ | __aeabi_f2d | f32 | ∅ | f64 | .. |
| ✓ | __extendsftf2 | f32 | ∅ | f128 | .. |
| ✓ | __extendsfxf2 | f32 | ∅ | f80 | .. |
| ✓ | __extenddftf2 | f64 | ∅ | f128 | .. |
| ✓ | __extenddfxf2 | f64 | ∅ | f80 | .. |
| ✗ | __aeabi_h2f | f16 | ∅ | f32 | .. ARM |
| ✗ | __aeabi_h2f_alt | f16 | ∅ | f32 | .. ARM alternate [^VFPv3alt] |
| ✓ | __gnu_h2f_ieee | f16 | ∅ | f32 | .. GNU naming convention |
| ✓ | __truncsfhf2 | f32 | ∅ | f16 | rounding towards zero |
| ✓ | __truncdfhf2 | f64 | ∅ | f16 | .. |
| ✓ | __truncdfsf2 | f64 | ∅ | f32 | .. |
| ✓ | __trunctfhf2 | f128 | ∅ | f16 | .. |
| ✓ | __trunctfsf2 | f128 | ∅ | f32 | .. |
| ✓ | __trunctfdf2 | f128 | ∅ | f64 | .. |
| ✓ | __trunctfxf2 | f128 | ∅ | f80 | .. |
| ✓ | __truncxfhf2 | f80 | ∅ | f16 | .. |
| ✓ | __truncxfsf2 | f80 | ∅ | f32 | .. |
| ✓ | __truncxfdf2 | f80 | ∅ | f64 | .. |
| ✗ | __aeabi_f2h | f32 | ∅ | f16 | .. ARM |
| ✗ | __aeabi_f2h_alt | f32 | ∅ | f16 | .. ARM alternate [^VFPv3alt] |
| ✓ | __gnu_f2h_ieee | f32 | ∅ | f16 | .. GNU naming convention |
| ✓ | __aeabi_d2h | f64 | ∅ | f16 | .. ARM |
| ✗ | __aeabi_d2h_alt | f64 | ∅ | f16 | .. ARM alternate [^VFPv3alt] |
| ✓ | __aeabi_d2f | f64 | ∅ | f32 | .. ARM |
| ✓ | __trunckfsf2 | f128 | ∅ | f32 | .. PPC |
| ✓ | _Qp_qtos |*f128 | ∅ | f32 | .. SPARC |
| ✓ | __trunckfdf2 | f128 | ∅ | f64 | .. PPC |
| ✓ | _Qp_qtod |*f128 | ∅ | f64 | .. SPARC |
| ✓ | __fixhfsi | f16 | ∅ | i32 | float to int, rounding towards zero |
| ✓ | __fixsfsi | f32 | ∅ | i32 | .. |
| ✓ | __aeabi_f2iz | f32 | ∅ | i32 | .. ARM |
| ✓ | __fixdfsi | f64 | ∅ | i32 | .. |
| ✓ | __aeabi_d2iz | f64 | ∅ | i32 | .. ARM |
| ✓ | __fixtfsi | f128 | ∅ | i32 | .. |
| ✓ | __fixxfsi | f80 | ∅ | i32 | .. |
| ✓ | __fixhfdi | f16 | ∅ | i64 | .. |
| ✓ | __fixsfdi | f32 | ∅ | i64 | .. |
| ✓ | __aeabi_f2lz | f32 | ∅ | i64 | .. ARM |
| ✓ | __fixdfdi | f64 | ∅ | i64 | .. |
| ✓ | __aeabi_d2lz | f64 | ∅ | i64 | .. ARM |
| ✓ | __fixtfdi | f128 | ∅ | i64 | .. |
| ✓ | __fixxfdi | f80 | ∅ | i64 | .. |
| ✓ | __fixhfti | f16 | ∅ | i128 | .. |
| ✓ | __fixsfti | f32 | ∅ | i128 | .. |
| ✓ | __fixdfti | f64 | ∅ | i128 | .. |
| ✓ | __fixtfti | f128 | ∅ | i128 | .. |
| ✓ | __fixxfti | f80 | ∅ | i128 | .. |
| ✓ | __fixunshfsi | f16 | ∅ | u32 | float to uint, rounding towards zero. negative values become 0. |
| ✓ | __fixunssfsi | f32 | ∅ | u32 | .. |
| ✓ | __aeabi_f2uiz | f32 | ∅ | u32 | .. ARM |
| ✓ | __fixunsdfsi | f64 | ∅ | u32 | .. |
| ✓ | __aeabi_d2uiz | f64 | ∅ | u32 | .. ARM |
| ✓ | __fixunstfsi | f128 | ∅ | u32 | .. |
| ✓ | __fixunsxfsi | f80 | ∅ | u32 | .. |
| ✓ | __fixunshfdi | f16 | ∅ | u64 | .. |
| ✓ | __fixunssfdi | f32 | ∅ | u64 | .. |
| ✓ | __aeabi_f2ulz | f32 | ∅ | u64 | .. ARM |
| ✓ | __fixunsdfdi | f64 | ∅ | u64 | .. |
| ✓ | __aeabi_d2ulz | f64 | ∅ | u64 | .. ARM |
| ✓ | __fixunstfdi | f128 | ∅ | u64 | .. |
| ✓ | __fixunsxfdi | f80 | ∅ | u64 | .. |
| ✓ | __fixunshfti | f16 | ∅ | u128 | .. |
| ✓ | __fixunssfti | f32 | ∅ | u128 | .. |
| ✓ | __fixunsdfti | f64 | ∅ | u128 | .. |
| ✓ | __fixunstfti | f128 | ∅ | u128 | .. |
| ✓ | __fixunsxfti | f80 | ∅ | u128 | .. |
| ✓ | __floatsihf | i32 | ∅ | f16 | int to float |
| ✓ | __floatsisf | i32 | ∅ | f32 | .. |
| ✓ | __aeabi_i2f | i32 | ∅ | f32 | .. ARM |
| ✓ | __floatsidf | i32 | ∅ | f64 | .. |
| ✓ | __aeabi_i2d | i32 | ∅ | f64 | .. ARM |
| ✓ | __floatsitf | i32 | ∅ | f128 | .. |
| ✓ | __floatsixf | i32 | ∅ | f80 | .. |
| ✓ | __floatdisf | i64 | ∅ | f32 | .. |
| ✓ | __aeabi_l2f | i64 | ∅ | f32 | .. ARM |
| ✓ | __floatdidf | i64 | ∅ | f64 | .. |
| ✓ | __aeabi_l2d | i64 | ∅ | f64 | .. ARM |
| ✓ | __floatditf | i64 | ∅ | f128 | .. |
| ✓ | __floatdixf | i64 | ∅ | f80 | .. |
| ✓ | __floattihf | i128 | ∅ | f16 | .. |
| ✓ | __floattisf | i128 | ∅ | f32 | .. |
| ✓ | __floattidf | i128 | ∅ | f64 | .. |
| ✓ | __floattitf | i128 | ∅ | f128 | .. |
| ✓ | __floattixf | i128 | ∅ | f80 | .. |
| ✓ | __floatunsihf | u32 | ∅ | f16 | uint to float |
| ✓ | __floatunsisf | u32 | ∅ | f32 | .. |
| ✓ | __aeabi_ui2f | u32 | ∅ | f32 | .. ARM |
| ✓ | __floatunsidf | u32 | ∅ | f64 | .. |
| ✓ | __aeabi_ui2d | u32 | ∅ | f64 | .. ARM |
| ✓ | __floatunsitf | u32 | ∅ | f128 | .. |
| ✓ | __floatunsixf | u32 | ∅ | f80 | .. |
| ✓ | __floatundihf | u64 | ∅ | f16 | .. |
| ✓ | __floatundisf | u64 | ∅ | f32 | .. |
| ✓ | __aeabi_ul2f | u64 | ∅ | f32 | .. ARM |
| ✓ | __floatundidf | u64 | ∅ | f64 | .. |
| ✓ | __aeabi_ul2d | u64 | ∅ | f64 | .. ARM |
| ✓ | __floatunditf | u64 | ∅ | f128 | .. |
| ✓ | __floatundixf | u64 | ∅ | f80 | .. |
| ✓ | __floatuntihf | u128 | ∅ | f16 | .. |
| ✓ | __floatuntisf | u128 | ∅ | f32 | .. |
| ✓ | __floatuntidf | u128 | ∅ | f64 | .. |
| ✓ | __floatuntitf | u128 | ∅ | f128 | .. |
| ✓ | __floatuntixf | u128 | ∅ | f80 | .. |
| | | | | | **Float Comparison** |
| ✓ | __cmphf2 | f16 | f16 | i32 | `(a<b)->-1, (a==b)->0, (a>b)->1, Nan->1` |
| ✓ | __cmpsf2 | f32 | f32 | i32 | exported from __lesf2, __ledf2, __letf2 (below) |
| ✓ | __cmpdf2 | f64 | f64 | i32 | But: if NaN is a possibility, use another routine. |
| ✓ | __cmptf2 | f128 | f128 | i32 | .. |
| ✓ | __cmpxf2 | f80 | f80 | i32 | .. |
| ✓ | _Qp_cmp |*f128 |*f128 | i32 | .. SPARC |
| ✓ | __unordhf2 | f16 | f16 | i32 | `(a==+-NaN or b==+-NaN) -> !=0, else -> 0` |
| ✓ | __unordsf2 | f32 | f32 | i32 | .. |
| ✓ | __unorddf2 | f64 | f64 | i32 | Note: only reliable for (input!=NaN) |
| ✓ | __unordtf2 | f128 | f128 | i32 | .. |
| ✓ | __unordxf2 | f80 | f80 | i32 | .. |
| ✓ | __aeabi_fcmpun | f32 | f32 | i32 | .. ARM |
| ✓ | __aeabi_dcmpun | f32 | f32 | i32 | .. ARM |
| ✓ | __unordkf2 | f128 | f128 | i32 | .. PPC |
| ✓ | __eqhf2 | f16 | f16 | i32 | `(a!=NaN) and (b!=Nan) and (a==b) -> output=0` |
| ✓ | __eqsf2 | f32 | f32 | i32 | .. |
| ✓ | __eqdf2 | f64 | f64 | i32 | .. |
| ✓ | __eqtf2 | f128 | f128 | i32 | .. |
| ✓ | __eqxf2 | f80 | f80 | i32 | .. |
| ✓ | __aeabi_fcmpeq | f32 | f32 | i32 | .. ARM |
| ✓ | __aeabi_dcmpeq | f32 | f32 | i32 | .. ARM |
| ✓ | __eqkf2 | f128 | f128 | i32 | .. PPC |
| ✓ | _Qp_feq |*f128 |*f128 | bool | .. SPARC |
| ✓ | __nehf2 | f16 | f16 | i32 | `(a==NaN) or (b==Nan) or (a!=b) -> output!=0` |
| ✓ | __nesf2 | f32 | f32 | i32 | Note: __eqXf2 and __neXf2 have same return value |
| ✓ | __nedf2 | f64 | f64 | i32 | .. |
| ✓ | __netf2 | f128 | f128 | i32 | .. |
| ✓ | __nexf2 | f80 | f80 | i32 | .. |
| ✓ | __nekf2 | f128 | f128 | i32 | .. PPC |
| ✓ | _Qp_fne |*f128 |*f128 | bool | .. SPARC |
| ✓ | __gehf2 | f16 | f16 | i32 | `(a!=Nan) and (b!=Nan) and (a>=b) -> output>=0` |
| ✓ | __gesf2 | f32 | f32 | i32 | .. |
| ✓ | __gedf2 | f64 | f64 | i32 | .. |
| ✓ | __getf2 | f128 | f128 | i32 | .. |
| ✓ | __gexf2 | f80 | f80 | i32 | .. |
| ✓ | __aeabi_fcmpge | f32 | f32 | i32 | .. ARM |
| ✓ | __aeabi_dcmpge | f64 | f64 | i32 | .. ARM |
| ✓ | __gekf2 | f128 | f128 | i32 | .. PPC |
| ✓ | _Qp_fge |*f128 |*f128 | bool | .. SPARC |
| ✓ | __lthf2 | f16 | f16 | i32 | `(a!=Nan) and (b!=Nan) and (a<b) -> output<0` |
| ✓ | __ltsf2 | f32 | f32 | i32 | .. |
| ✓ | __ltdf2 | f64 | f64 | i32 | .. |
| ✓ | __lttf2 | f128 | f128 | i32 | .. |
| ✓ | __ltxf2 | f80 | f80 | i32 | .. |
| ✓ | __ltkf2 | f128 | f128 | i32 | .. PPC |
| ✓ | __aeabi_fcmplt | f32 | f32 | i32 | .. ARM |
| ✓ | __aeabi_dcmplt | f32 | f32 | i32 | .. ARM |
| ✓ | _Qp_flt |*f128 |*f128 | bool | .. SPARC |
| ✓ | __lehf2 | f16 | f16 | i32 | `(a!=Nan) and (b!=Nan) and (a<=b) -> output<=0` |
| ✓ | __lesf2 | f32 | f32 | i32 | .. |
| ✓ | __ledf2 | f64 | f64 | i32 | .. |
| ✓ | __letf2 | f128 | f128 | i32 | .. |
| ✓ | __lexf2 | f80 | f80 | i32 | .. |
| ✓ | __aeabi_fcmple | f32 | f32 | i32 | .. ARM |
| ✓ | __aeabi_dcmple | f32 | f32 | i32 | .. ARM |
| ✓ | __lekf2 | f128 | f128 | i32 | .. PPC |
| ✓ | _Qp_fle |*f128 |*f128 | bool | .. SPARC |
| ✓ | __gthf2 | f16 | f16 | i32 | `(a!=Nan) and (b!=Nan) and (a>b) -> output>0` |
| ✓ | __gtsf2 | f32 | f32 | i32 | .. |
| ✓ | __gtdf2 | f64 | f64 | i32 | .. |
| ✓ | __gttf2 | f128 | f128 | i32 | .. |
| ✓ | __gtxf2 | f80 | f80 | i32 | .. |
| ✓ | __aeabi_fcmpgt | f32 | f32 | i32 | .. ARM |
| ✓ | __aeabi_dcmpgt | f64 | f64 | i32 | .. ARM |
| ✓ | __gtkf2 | f128 | f128 | i32 | .. PPC |
| ✓ | _Qp_fgt |*f128 |*f128 | bool | .. SPARC |
| | | | | | **Float Arithmetic** |
| ✓ | __addhf3 | f32 | f32 | f32 | `a + b` |
| ✓ | __addsf3 | f32 | f32 | f32 | .. |
| ✓ | __adddf3 | f64 | f64 | f64 | .. |
| ✓ | __addtf3 | f128 | f128 | f128 | .. |
| ✓ | __addxf3 | f80 | f80 | f80 | .. |
| ✓ | __aeabi_fadd | f32 | f32 | f32 | .. ARM |
| ✓ | __aeabi_dadd | f64 | f64 | f64 | .. ARM |
| ✓ | __addkf3 | f128 | f128 | f128 | .. PPC |
| ✓ | _Qp_add |*f128 |*f128 | void | .. SPARC args *c,*a,*b c=a+b |
| ✓ | __subhf3 | f32 | f32 | f32 | `a - b` |
| ✓ | __subsf3 | f32 | f32 | f32 | .. |
| ✓ | __subdf3 | f64 | f64 | f64 | .. |
| ✓ | __subtf3 | f128 | f128 | f128 | .. |
| ✓ | __subxf3 | f80 | f80 | f80 | .. |
| ✓ | __aeabi_fsub | f32 | f32 | f32 | .. ARM |
| ✓ | __aeabi_dsub | f64 | f64 | f64 | .. ARM |
| ✓ | __subkf3 | f128 | f128 | f128 | .. PPC |
| ✓ | _Qp_sub |*f128 |*f128 | void | .. SPARC args *c,*a,*b c=a-b |
| ✓ | __mulhf3 | f32 | f32 | f32 | `a * b` |
| ✓ | __mulsf3 | f32 | f32 | f32 | .. |
| ✓ | __muldf3 | f64 | f64 | f64 | .. |
| ✓ | __multf3 | f128 | f128 | f128 | .. |
| ✓ | __mulxf3 | f80 | f80 | f80 | .. |
| ✓ | __aeabi_fmul | f32 | f32 | f32 | .. ARM |
| ✓ | __aeabi_dmul | f64 | f64 | f64 | .. ARM |
| ✓ | __mulkf3 | f128 | f128 | f128 | .. PPC |
| ✓ | _Qp_mul |*f128 |*f128 | void | .. SPARC args *c,*a,*b c=a*b |
| ✓ | __divsf3 | f32 | f32 | f32 | `a / b` |
| ✓ | __divdf3 | f64 | f64 | f64 | .. |
| ✓ | __divtf3 | f128 | f128 | f128 | .. |
| ✓ | __divxf3 | f80 | f80 | f80 | .. |
| ✓ | __aeabi_fdiv | f32 | f32 | f32 | .. ARM |
| ✓ | __aeabi_ddiv | f64 | f64 | f64 | .. ARM |
| ✓ | __divkf3 | f128 | f128 | f128 | .. PPC |
| ✓ | _Qp_div |*f128 |*f128 | void | .. SPARC args *c,*a,*b c=a*b |
| ✓ | __negsf2 | f32 | ∅ | f32[^unused_rl78] | -a (can be lowered directly to a xor) |
| ✓ | __negdf2 | f64 | ∅ | f64 | .. |
| ✓ | __negtf2 | f128 | ∅ | f128 | .. |
| ✓ | __negxf2 | f80 | ∅ | f80 | .. |
| | | | | | **Other** |
| ✓ | __powihf2 | f16 | i32 | f16 | `a ^ b` |
| ✓ | __powisf2 | f32 | i32 | f32 | .. |
| ✓ | __powidf2 | f64 | i32 | f64 | .. |
| ✓ | __powitf2 | f128 | i32 | f128 | .. |
| ✓ | __powixf2 | f80 | i32 | f80 | .. |
| ✓ | __mulhc3 | all4 | f16 | f16 | `(a+ib) * (c+id)` |
| ✓ | __mulsc3 | all4 | f32 | f32 | .. |
| ✓ | __muldc3 | all4 | f64 | f64 | .. |
| ✓ | __multc3 | all4 | f128 | f128 | .. |
| ✓ | __mulxc3 | all4 | f80 | f80 | .. |
| ✓ | __divhc3 | all4 | f16 | f16 | `(a+ib) / (c+id)` |
| ✓ | __divsc3 | all4 | f32 | f32 | .. |
| ✓ | __divdc3 | all4 | f64 | f64 | .. |
| ✓ | __divtc3 | all4 | f128 | f128 | .. |
| ✓ | __divxc3 | all4 | f80 | f80 | .. |
[^unused_rl78]: Unused in LLVM, but used for example by rl78.
[^libgcc_compat]: Unused in backends and for symbol-level compatibility with libgcc.
[^noptr_faster]: Operations without pointer and without C struct semantics lead to better optimizations.
[^perf_addition]: Has better performance than standard method due to 2s complement semantics.
Not provided by LLVM and libgcc.
[^VFPv3alt]: Converts IEEE-format to VFPv3 alternative-format.
Decimal float library routines
BID means Binary Integer Decimal encoding, DPD means Densely Packed Decimal encoding.
BID should be only chosen for binary data, DPD for decimal data (ASCII, Unicode etc).
For example the number 0.2 is not accurately representable in binary data.
| Done | Name | a | b | Out | Comment |
| ------ | ------------- | --------- | --------- | --------- | ---------------------------- |
| | | | | | **Decimal Float Conversion** |
| ✗ | __dpd_extendsddd2 | dec32 | ∅ | dec64 | conversion |
| ✗ | __bid_extendsddd2 | dec32 | ∅ | dec64 | .. |
| ✗ | __dpd_extendsdtd2 | dec32 | ∅ | dec128| .. |
| ✗ | __bid_extendsdtd2 | dec32 | ∅ | dec128| .. |
| ✗ | __dpd_extendddtd2 | dec64 | ∅ | dec128| .. |
| ✗ | __bid_extendddtd2 | dec64 | ∅ | dec128| .. |
| ✗ | __dpd_truncddsd2 | dec64 | ∅ | dec32 | .. |
| ✗ | __bid_truncddsd2 | dec64 | ∅ | dec32 | .. |
| ✗ | __dpd_trunctdsd2 | dec128 | ∅ | dec32 | .. |
| ✗ | __bid_trunctdsd2 | dec128 | ∅ | dec32 | .. |
| ✗ | __dpd_trunctddd2 | dec128 | ∅ | dec64 | .. |
| ✗ | __bid_trunctddd2 | dec128 | ∅ | dec64 | .. |
| ✗ | __dpd_extendsfdd | float | ∅ | dec64 | .. |
| ✗ | __bid_extendsfdd | float | ∅ | dec64 | .. |
| ✗ | __dpd_extendsftd | float | ∅ | dec128| .. |
| ✗ | __bid_extendsftd | float | ∅ | dec128| .. |
| ✗ | __dpd_extenddftd | double | ∅ | dec128| .. |
| ✗ | __bid_extenddftd | double | ∅ | dec128| .. |
| ✗ | __dpd_extendxftd |long double | ∅ | dec128| .. |
| ✗ | __bid_extendxftd |long double | ∅ | dec128| .. |
| ✗ | __dpd_truncdfsd | double | ∅ | dec32 | .. |
| ✗ | __bid_truncdfsd | double | ∅ | dec32 | .. |
| ✗ | __dpd_truncxfsd |long double | ∅ | dec32 | .. |
| ✗ | __bid_truncxfsd |long double | ∅ | dec32 | .. |
| ✗ | __dpd_trunctfsd |long double | ∅ | dec32 | .. |
| ✗ | __bid_trunctfsd |long double | ∅ | dec32 | .. |
| ✗ | __dpd_truncxfdd |long double | ∅ | dec64 | .. |
| ✗ | __bid_truncxfdd |long double | ∅ | dec64 | .. |
| ✗ | __dpd_trunctfdd |long double | ∅ | dec64 | .. |
| ✗ | __bid_trunctfdd |long double | ∅ | dec64 | .. |
| ✗ | __dpd_truncddsf | dec64 | ∅ | float | .. |
| ✗ | __bid_truncddsf | dec64 | ∅ | float | .. |
| ✗ | __dpd_trunctdsf | dec128 | ∅ | float | .. |
| ✗ | __bid_trunctdsf | dec128 | ∅ | float | .. |
| ✗ | __dpd_extendsddf | dec32 | ∅ | double| .. |
| ✗ | __bid_extendsddf | dec32 | ∅ | double| .. |
| ✗ | __dpd_trunctddf | dec128 | ∅ | double| .. |
| ✗ | __bid_trunctddf | dec128 | ∅ | double| .. |
| ✗ | __dpd_extendsdxf | dec32 | ∅ |long double| .. |
| ✗ | __bid_extendsdxf | dec32 | ∅ |long double| .. |
| ✗ | __dpd_extendddxf | dec64 | ∅ |long double| .. |
| ✗ | __bid_extendddxf | dec64 | ∅ |long double| .. |
| ✗ | __dpd_trunctdxf | dec128 | ∅ |long double| .. |
| ✗ | __bid_trunctdxf | dec128 | ∅ |long double| .. |
| ✗ | __dpd_extendsdtf | dec32 | ∅ |long double| .. |
| ✗ | __bid_extendsdtf | dec32 | ∅ |long double| .. |
| ✗ | __dpd_extendddtf | dec64 | ∅ |long double| .. |
| ✗ | __bid_extendddtf | dec64 | ∅ |long double| .. |
| ✗ | __dpd_extendsfsd | float | ∅ | dec32 | same size conversions |
| ✗ | __bid_extendsfsd | float | ∅ | dec32 | .. |
| ✗ | __dpd_extenddfdd | double | ∅ | dec64 | .. |
| ✗ | __bid_extenddfdd | double | ∅ | dec64 | .. |
| ✗ | __dpd_extendtftd |long double | ∅ | dec128| .. |
| ✗ | __bid_extendtftd |long double | ∅ | dec128| .. |
| ✗ | __dpd_truncsdsf | dec32 | ∅ | float | .. |
| ✗ | __bid_truncsdsf | dec32 | ∅ | float | .. |
| ✗ | __dpd_truncdddf | dec64 | ∅ | float | conversion |
| ✗ | __bid_truncdddf | dec64 | ∅ | float | .. |
| ✗ | __dpd_trunctdtf | dec128 | ∅ |long double| .. |
| ✗ | __bid_trunctdtf | dec128 | ∅ |long double| .. |
| ✗ | __dpd_fixsdsi | dec32 | ∅ | int | .. |
| ✗ | __bid_fixsdsi | dec32 | ∅ | int | .. |
| ✗ | __dpd_fixddsi | dec64 | ∅ | int | .. |
| ✗ | __bid_fixddsi | dec64 | ∅ | int | .. |
| ✗ | __dpd_fixtdsi | dec128 | ∅ | int | .. |
| ✗ | __bid_fixtdsi | dec128 | ∅ | int | .. |
| ✗ | __dpd_fixsddi | dec32 | ∅ | long | .. |
| ✗ | __bid_fixsddi | dec32 | ∅ | long | .. |
| ✗ | __dpd_fixdddi | dec64 | ∅ | long | .. |
| ✗ | __bid_fixdddi | dec64 | ∅ | long | .. |
| ✗ | __dpd_fixtddi | dec128 | ∅ | long | .. |
| ✗ | __bid_fixtddi | dec128 | ∅ | long | .. |
| ✗ | __dpd_fixunssdsi | dec32 | ∅ |unsigned int | .. All negative values become zero. |
| ✗ | __bid_fixunssdsi | dec32 | ∅ |unsigned int | .. |
| ✗ | __dpd_fixunsddsi | dec64 | ∅ |unsigned int | .. |
| ✗ | __bid_fixunsddsi | dec64 | ∅ |unsigned int | .. |
| ✗ | __dpd_fixunstdsi | dec128 | ∅ |unsigned int | .. |
| ✗ | __bid_fixunstdsi | dec128 | ∅ |unsigned int | .. |
| ✗ | __dpd_fixunssddi | dec32 | ∅ |unsigned long| .. |
| ✗ | __bid_fixunssddi | dec32 | ∅ |unsigned long| .. |
| ✗ | __dpd_fixunsdddi | dec64 | ∅ |unsigned long| .. |
| ✗ | __bid_fixunsdddi | dec64 | ∅ |unsigned long| .. |
| ✗ | __dpd_fixunstddi | dec128 | ∅ |unsigned long| .. |
| ✗ | __bid_fixunstddi | dec128 | ∅ |unsigned long| .. |
| ✗ | __dpd_floatsisd | int | ∅ | dec32 | .. |
| ✗ | __bid_floatsisd | int | ∅ | dec32 | .. |
| ✗ | __dpd_floatsidd | int | ∅ | dec64 | .. |
| ✗ | __bid_floatsidd | int | ∅ | dec64 | .. |
| ✗ | __dpd_floatsitd | int | ∅ | dec128 | .. |
| ✗ | __bid_floatsitd | int | ∅ | dec128 | .. |
| ✗ | __dpd_floatdisd | long | ∅ | dec32 | .. |
| ✗ | __bid_floatdisd | long | ∅ | dec32 | .. |
| ✗ | __dpd_floatdidd | long | ∅ | dec64 | .. |
| ✗ | __bid_floatdidd | long | ∅ | dec64 | .. |
| ✗ | __dpd_floatditd | long | ∅ | dec128 | .. |
| ✗ | __bid_floatditd | long | ∅ | dec128 | .. |
| ✗ | __dpd_floatunssisd | unsigned int| ∅ | dec32 | .. |
| ✗ | __bid_floatunssisd | unsigned int| ∅ | dec32 | .. |
| ✗ | __dpd_floatunssidd | unsigned int| ∅ | dec64 | .. |
| ✗ | __bid_floatunssidd | unsigned int| ∅ | dec64 | .. |
| ✗ | __dpd_floatunssitd | unsigned int| ∅ | dec128 | .. |
| ✗ | __bid_floatunssitd | unsigned int| ∅ | dec128 | .. |
| ✗ | __dpd_floatunsdisd |unsigned long| ∅ | dec32 | .. |
| ✗ | __bid_floatunsdisd |unsigned long| ∅ | dec32 | .. |
| ✗ | __dpd_floatunsdidd |unsigned long| ∅ | dec64 | .. |
| ✗ | __bid_floatunsdidd |unsigned long| ∅ | dec64 | .. |
| ✗ | __dpd_floatunsditd |unsigned long| ∅ | dec128 | .. |
| ✗ | __bid_floatunsditd |unsigned long| ∅ | dec128 | .. |
| | | | | | **Decimal Float Comparison** |
| ✗ | __dpd_unordsd2 | dec32 | dec32 | c_int | `a +-NaN or a +-NaN -> 1(nonzero), else -> 0` |
| ✗ | __bid_unordsd2 | dec32 | dec32 | c_int | .. |
| ✗ | __dpd_unorddd2 | dec64 | dec64 | c_int | .. |
| ✗ | __bid_unorddd2 | dec64 | dec64 | c_int | .. |
| ✗ | __dpd_unordtd2 | dec128 | dec128 | c_int | .. |
| ✗ | __bid_unordtd2 | dec128 | dec128 | c_int | .. |
| ✗ | __dpd_eqsd2 | dec32 | dec32 | c_int |`a!=+-NaN and b!=+-Nan and a==b -> 0, else -> 1(nonzero)`|
| ✗ | __bid_eqsd2 | dec32 | dec32 | c_int | .. |
| ✗ | __dpd_eqdd2 | dec64 | dec64 | c_int | .. |
| ✗ | __bid_eqdd2 | dec64 | dec64 | c_int | .. |
| ✗ | __dpd_eqtd2 | dec128 | dec128 | c_int | .. |
| ✗ | __bid_eqtd2 | dec128 | dec128 | c_int | .. |
| ✗ | __dpd_nesd2 | dec32 | dec32 | c_int | `a==+-NaN or b==+-NaN or a!=b -> 1(nonzero), else -> 0` |
| ✗ | __bid_nesd2 | dec32 | dec32 | c_int | .. |
| ✗ | __dpd_nedd2 | dec64 | dec64 | c_int | .. |
| ✗ | __bid_nedd2 | dec64 | dec64 | c_int | .. |
| ✗ | __dpd_netd2 | dec128 | dec128 | c_int | .. |
| ✗ | __bid_netd2 | dec128 | dec128 | c_int | .. |
| ✗ | __dpd_gesd2 | dec32 | dec32 | c_int | `a!=+-NaN and b!=+-NaN and a>=b -> >=0, else -> <0` |
| ✗ | __bid_gesd2 | dec32 | dec32 | c_int | .. |
| ✗ | __dpd_gedd2 | dec64 | dec64 | c_int | .. |
| ✗ | __bid_gedd2 | dec64 | dec64 | c_int | .. |
| ✗ | __dpd_getd2 | dec128 | dec128 | c_int | .. |
| ✗ | __bid_getd2 | dec128 | dec128 | c_int | .. |
| ✗ | __dpd_ltsd2 | dec32 | dec32 | c_int | `a!=+-NaN and b!=+-NaN and a<b -> <0, else -> >=0` |
| ✗ | __bid_ltsd2 | dec32 | dec32 | c_int | .. |
| ✗ | __dpd_ltdd2 | dec64 | dec64 | c_int | .. |
| ✗ | __bid_ltdd2 | dec64 | dec64 | c_int | .. |
| ✗ | __dpd_lttd2 | dec128 | dec128 | c_int | .. |
| ✗ | __bid_lttd2 | dec128 | dec128 | c_int | .. |
| ✗ | __dpd_lesd2 | dec32 | dec32 | c_int | `a!=+-NaN and b!=+-NaN and a<=b -> <=0, else -> >=0` |
| ✗ | __bid_lesd2 | dec32 | dec32 | c_int | .. |
| ✗ | __dpd_ledd2 | dec64 | dec64 | c_int | .. |
| ✗ | __bid_ledd2 | dec64 | dec64 | c_int | .. |
| ✗ | __dpd_letd2 | dec128 | dec128 | c_int | .. |
| ✗ | __bid_letd2 | dec128 | dec128 | c_int | .. |
| ✗ | __dpd_gtsd2 | dec32 | dec32 | c_int | `a!=+-NaN and b!=+-NaN and a>b -> >0, else -> <=0` |
| ✗ | __bid_gtsd2 | dec32 | dec32 | c_int | .. |
| ✗ | __dpd_gtdd2 | dec64 | dec64 | c_int | .. |
| ✗ | __bid_gtdd2 | dec64 | dec64 | c_int | .. |
| ✗ | __dpd_gttd2 | dec128 | dec128 | c_int | .. |
| ✗ | __bid_gttd2 | dec128 | dec128 | c_int | .. |
| | | | | | **Decimal Float Arithmetic**[^options] |
| ✗ | __dpd_addsd3 | dec32 | dec32 | dec32 |`a + b`|
| ✗ | __bid_addsd3 | dec32 | dec32 | dec32 | .. |
| ✗ | __dpd_adddd3 | dec64 | dec64 | dec64 | .. |
| ✗ | __bid_adddd3 | dec64 | dec64 | dec64 | .. |
| ✗ | __dpd_addtd3 | dec128 | dec128 | dec128 | .. |
| ✗ | __bid_addtd3 | dec128 | dec128 | dec128 | .. |
| ✗ | __dpd_subsd3 | dec32 | dec32 | dec32 |`a - b`|
| ✗ | __bid_subsd3 | dec32 | dec32 | dec32 | .. |
| ✗ | __dpd_subdd3 | dec64 | dec64 | dec64 | .. |
| ✗ | __bid_subdd3 | dec64 | dec64 | dec64 | .. |
| ✗ | __dpd_subtd3 | dec128 | dec128 | dec128 | .. |
| ✗ | __bid_subtd3 | dec128 | dec128 | dec128 | .. |
| ✗ | __dpd_mulsd3 | dec32 | dec32 | dec32 |`a * b`|
| ✗ | __bid_mulsd3 | dec32 | dec32 | dec32 | .. |
| ✗ | __dpd_muldd3 | dec64 | dec64 | dec64 | .. |
| ✗ | __bid_muldd3 | dec64 | dec64 | dec64 | .. |
| ✗ | __dpd_multd3 | dec128 | dec128 | dec128 | .. |
| ✗ | __bid_multd3 | dec128 | dec128 | dec128 | .. |
| ✗ | __dpd_divsd3 | dec32 | dec32 | dec32 |`a / b`|
| ✗ | __bid_divsd3 | dec32 | dec32 | dec32 | .. |
| ✗ | __dpd_divdd3 | dec64 | dec64 | dec64 | .. |
| ✗ | __bid_divdd3 | dec64 | dec64 | dec64 | .. |
| ✗ | __dpd_divtd3 | dec128 | dec128 | dec128 | .. |
| ✗ | __bid_divtd3 | dec128 | dec128 | dec128 | .. |
| ✗ | __dpd_negsd2 | dec32 | dec32 | dec32 | `-a` |
| ✗ | __bid_negsd2 | dec32 | dec32 | dec32 | .. |
| ✗ | __dpd_negdd2 | dec64 | dec64 | dec64 | .. |
| ✗ | __bid_negdd2 | dec64 | dec64 | dec64 | .. |
| ✗ | __dpd_negtd2 | dec128 | dec128 | dec128 | .. |
| ✗ | __bid_negtd2 | dec128 | dec128 | dec128 | .. |
[^options]: These numbers include options with routines for +-0 and +-Nan.
Fixed-point fractional library routines
TODO brief explanation + implementation
| Done | Name | a | b | Out | Comment |
| ------ | ------------- | --------- | --------- | --------- | -------------------------- |
| | | | | | **Fixed-Point Fractional** |
Math functions according to C99 with gnu extension sincos. f16, f80 and f128 functions
are additionally supported by Zig, but not part of C standard. Alphabetically sorted.
| Done | Name | a | b | Out | Comment |
| ---- | ------- | --------- | --------- | --------- | -------------------------- |
| ✓ | __ceilh | f16 | ∅ | f16 |smallest integer value not less than a|
| ✓ | ceilf | f32 | ∅ | f32 |If a is integer, +-0, +-NaN, or +-infinite, a itself is returned.|
| ✓ | ceil | f64 | ∅ | f64 | .. |
| ✓ | __ceilx | f80 | ∅ | f80 | |
| ✓ | ceilf128 | f128 | ∅ | f128 | .. PPC |
| ✓ | ceilq | f128 | ∅ | f128 | .. |
| ✓ | ceill |long double| ∅ |long double| .. |
| ✓ | __cosh | f16 | ∅ | f16 | `cos(a)=(e^(ia)+e^(-ia))/2`|
| ✓ | cosf | f32 | ∅ | f32 | .. |
| ✓ | cos | f64 | ∅ | f64 | .. |
| ✓ | __cosx | f80 | ∅ | f80 | .. |
| ✓ | cosf128 | f128 | ∅ | f128 | .. |
| ✓ | cosq | f128 | ∅ | f128 | .. PPC |
| ✓ | cosl |long double| ∅ |long double| .. |
| ✓ | __exph | f16 | ∅ | f16 | `e^a` with e base of natural logarithms|
| ✓ | expf | f32 | ∅ | f32 | .. |
| ✓ | exp | f64 | ∅ | f64 | .. |
| ✓ | __expx | f80 | ∅ | f80 | .. |
| ✓ | expf128 | f128 | ∅ | f128 | .. |
| ✓ | expq | f128 | ∅ | f128 | .. PPC |
| ✓ | expl |long double| ∅ |long double| .. |
| ✓ | __exp2h | f16 | ∅ | f16 | `2^a` |
| ✓ | exp2f | f32 | ∅ | f32 | .. |
| ✓ | exp2 | f64 | ∅ | f64 | .. |
| ✓ | __exp2x | f80 | ∅ | f80 | .. |
| ✓ | exp2f128 | f128 | ∅ | f128 | .. |
| ✓ | exp2q | f128 | ∅ | f128 | .. PPC |
| ✓ | exp2l |long double| ∅ |long double| .. |
| ✓ | __fabsh | f16 | ∅ | f16 | absolute value of a |
| ✓ | fabsf | f32 | ∅ | f32 | .. |
| ✓ | fabs | f64 | ∅ | f64 | .. |
| ✓ | __fabsx | f80 | ∅ | f80 | .. |
| ✓ | fabsf128 | f128 | ∅ | f128 | .. |
| ✓ | fabsq | f128 | ∅ | f128 | .. PPC |
| ✓ | fabsl |long double| ∅ |long double| .. |
| ✓ | __floorh | f16 | ∅ | f16 |largest integer value not greater than a|
| ✓ | floorf | f32 | ∅ | f32 |If a is integer, +-0, +-NaN, or +-infinite, a itself is returned.|
| ✓ | floor | f64 | ∅ | f64 | .. |
| ✓ | __floorx | f80 | ∅ | f80 | .. |
| ✓ | floorf128 | f128 | ∅ | f128 | .. |
| ✓ | floorq | f128 | ∅ | f128 | .. PPC |
| ✓ | floorl |long double| ∅ |long double| .. |
| ✓ | __fmah | f16 | 2xf16 | f16 | args a,b,c result `(a*b)+c`|
| ✓ | fmaf | f32 | 2xf32 | f32 |Fused multiply-add for hardware acceleration|
| ✓ | fma | f64 | 2xf64 | f64 | .. |
| ✓ | __fmax | f80 | 2xf80 | f80 | .. |
| ✓ | fmaf128 | f128 | 2xf128 | f128 | .. |
| ✓ | fmaq | f128 | 2xf128 | f128 | .. PPC |
| ✓ | fmal |long double|2xlong double|long double| .. |
| ✓ | __fmaxh | f16 | f16 | f16 | larger value of a,b |
| ✓ | fmaxf | f32 | f32 | f32 | .. |
| ✓ | fmax | f64 | f64 | f64 | .. |
| ✓ | __fmaxx | f80 | f80 | f80 | .. |
| ✓ | fmaxf128 | f128 | f128 | f128 | .. |
| ✓ | fmaxq | f128 | f128 | f128 | .. PPC |
| ✓ | fmaxl |long double|long double|long double| .. |
| ✓ | __fminh | f16 | f16 | f16 | smaller value of a,b |
| ✓ | fminf | f32 | f32 | f32 | .. |
| ✓ | fmin | f64 | f64 | f64 | .. |
| ✓ | __fminx | f80 | f80 | f80 | .. |
| ✓ | fminf128 | f128 | f128 | f128 | .. |
| ✓ | fminq | f128 | f128 | f128 | .. PPC |
| ✓ | fminl |long double|long double|long double| .. |
| ✓ | __fmodh | f16 | f16 | f16 |floating-point remainder of division a/b|
| ✓ | fmodf | f32 | f32 | f32 | .. |
| ✓ | fmod | f64 | f64 | f64 | .. |
| ✓ | __fmodx | f80 | f80 | f80 | .. |
| ✓ | fmodf128 | f128 | f128 | f128 | .. |
| ✓ | fmodq | f128 | f128 | f128 | .. PPC |
| ✓ | fmodl |long double|long double|long double| .. |
| ✓ | __logh | f16 | ∅ | f16 |natural (base-e) logarithm of a|
| ✓ | logf | f32 | ∅ | f32 | .. |
| ✓ | log | f64 | ∅ | f64 | .. |
| ✓ | __logx | f80 | ∅ | f80 | .. |
| ✓ | logf128 | f128 | ∅ | f128 | .. |
| ✓ | logq | f128 | ∅ | f128 | .. PPC |
| ✓ | logl |long double| ∅ |long double| .. |
| ✓ | __log10h | f16 | ∅ | f16 |common (base-10) logarithm of a|
| ✓ | log10f | f32 | ∅ | f32 | .. |
| ✓ | log10 | f64 | ∅ | f64 | .. |
| ✓ | __log10x | f80 | ∅ | f80 | .. |
| ✓ | log10f128 | f128 | ∅ | f128 | .. |
| ✓ | log10q | f128 | ∅ | f128 | .. PPC |
| ✓ | log10l |long double| ∅ |long double| .. |
| ✓ | __log2h | f16 | ∅ | f16 | base-2 logarithm of a |
| ✓ | log2f | f32 | ∅ | f32 | .. |
| ✓ | log2 | f64 | ∅ | f64 | .. |
| ✓ | __log2x | f80 | ∅ | f80 | .. |
| ✓ | log2f128 | f128 | ∅ | f128 | .. |
| ✓ | log2q | f128 | ∅ | f128 | .. PPC |
| ✓ | log2l |long double| ∅ |long double| .. |
| ✓ | __roundh | f16 | ∅ | f16 | a rounded to next int away from zero|
| ✓ | roundf | f32 | ∅ | f32 | .. |
| ✓ | round | f64 | ∅ | f64 | .. |
| ✓ | __roundx | f80 | ∅ | f80 | .. |
| ✓ | roundf128 | f128 | ∅ | f128 | .. |
| ✓ | roundq | f128 | ∅ | f128 | .. PPC |
| ✓ | roundl |long double| ∅ |long double| .. |
| ✓ | __sinh | f16 | ∅ | f16 | `sin(a)=(e^(ia)-e^(-ia))/2`|
| ✓ | sinf | f32 | ∅ | f32 | .. |
| ✓ | sin | f64 | ∅ | f64 | .. |
| ✓ | __sinx | f80 | ∅ | f80 | .. |
| ✓ | sinf128 | f128 | ∅ | f128 | .. |
| ✓ | sinq | f128 | ∅ | f128 | .. PPC |
| ✓ | sinl |long double| ∅ |long double| .. |
| ✓ | __sincosh | f16 | 2x *f16 | ∅ |sin and cos of the same angle a|
| ✓ | sincosf | f32 | 2x *f32 | ∅ |args a,*b,*c, `b.*=sin(x),c.*=cos(x)`|
| ✓ | sincos | f64 | 2x *f64 | ∅ | .. |
| ✓ | __sincosx | f80 | 2x *f80 | ∅ | .. |
| ✓ | sincosf128 | f128 | 2x *f128 | ∅ | .. |
| ✓ | sincosq | f128 | 2x *f128 | ∅ | .. PPC |
| ✓ | sincosl |long double| 2x *long double|∅ | .. |
| ✓ | __sqrth | f16 | ∅ | f16 | square root of a (find `r st. a=r^2`)|
| ✓ | sqrtf | f32 | ∅ | f32 | .. |
| ✓ | sqrt | f64 | ∅ | f64 | .. |
| ✓ | __sqrtx | f80 | ∅ | f80 | .. |
| ✓ | sqrtf128 | f128 | ∅ | f128 | .. |
| ✓ | sqrtq | f128 | ∅ | f128 | .. PPC |
| ✓ | sqrtl |long double| ∅ |long double| .. |
| ✓ | __tanh | f16 | ∅ | f16 | `tan(x)=sin(x)/cos(x) |
| ✓ | tanf | f32 | ∅ | f32 | .. |
| ✓ | tan | f64 | ∅ | f64 | .. |
| ✓ | __tanx | f80 | ∅ | f80 | .. |
| ✓ | tanf128 | f128 | ∅ | f128 | .. |
| ✓ | tanq | f128 | ∅ | f128 | .. PPC |
| ✓ | tanl |long double| ∅ |long double| .. |
| ✓ | __trunch | f16 | ∅ | f16 | a rounded to next int towards zero|
| ✓ | truncf | f32 | ∅ | f32 | .. |
| ✓ | trunc | f64 | ∅ | f64 | .. |
| ✓ | __truncx | f80 | ∅ | f80 | .. |
| ✓ | truncf128 | f128 | ∅ | f128 | .. |
| ✓ | truncq | f128 | ∅ | f128 | .. PPC |
| ✓ | truncl |long double| ∅ |long double| .. |
Arbitrary Precision Big Integer (BigInt) library routines
TODO brief description
| Done | Name | result| a | b | size| ret | Comment |
| ---- | ------- | ----- | ----- | ----- | --- | ----- |---------------------- |
| | | | | | | |**BigInt Bit Operation**|
| | | | | | | |**BigInt Comparison** |
| | | | | | | |**BigInt Arithmetic** |
|✓|__udivei4 |[*c]u32|[*c]u32|[*c]u32|usize|void | `a / b` |
|✓|__umodei4 |[*c]u32|[*c]u32|[*c]u32|usize|void | `a % b` |
|✗|__divei4 |[*c]u32|[*c]u32|[*c]u32|usize|void | `a / b` |
|✗|__modei4 |[*c]u32|[*c]u32|[*c]u32|usize|void | `a % b` |
| | | | | | | |**BigInt Arithmetic with Trapping Overflow**|
| | | | | | | |**BigInt Arithmetic which Return on Overflow**[^noptr_faster]|
Further content (conditionally) exported with C abi:
ARM-only routines
| Done | Name | a | b | Out | Comment |
| ---- | -------- | --- | --- | -----| ----------------------|
| | | | | | **Float Comparison** |
|✗|__aeabi_cfcmpeq | f32 | f32 | void | `a == b` result in PSR ZC flags[^PSRZC] |
|✗|__aeabi_cfcmple | f32 | f32 | void | `a <= b` result .. |
|✗|__aeabi_cfrcmple| f32 | f32 | void | `b <= a` .. |
|✗|__aeabi_cdcmpeq | f64 | f64 | void | `a == b` .. |
|✗|__aeabi_cdcmple | f64 | f64 | void | `a <= b` .. |
|✗|__aeabi_cdrcmple| f64 | f64 | void | `b <= a` .. |
| | | | | | **Float Arithmetic** |
|✗|__aeabi_frsub | f64 | f64 | f64 | `b - a` |
|✗|__aeabi_drsub | f64 | f64 | f64 | .. |
| | | | | | **Special** |
|✓|__aeabi_read_tp | ∅ | ∅ | *u8 | ret tls pointer |
|✗|__aeabi_idiv0 | i32 | ∅ | i32 | div by 0 modifier |
|✗|__aeabi_ldiv0 | i64 | ∅ | i64 | div by 0 modifier |
| | | | | | **Unaligned memory access** |
|✗|__aeabi_uread4 |[*]u8| ∅ | i32 | ret value read |
|✗|__aeabi_uwrite4 | i32 |[*]u8| i32 | ret value written |
|✗|__aeabi_uread8 |[*]u8| ∅ | i64 | .. |
|✗|__aeabi_uwrite8 | i64 |[*]u8| i64 | .. |
| Done | Name | a | b | c | Comment |
| ---- | -------- | --- | --- | -----| ----------------------|
| | | | | | **Memory copy, move and set** |
|✓|__aeabi_memcpy8 |[*]u8|[*]u8| usize| *dest, *src, size |
|✓|__aeabi_memcpy4 |[*]u8|[*]u8| usize| .. |
|✓|__aeabi_memcpy |[*]u8|[*]u8| usize| .. |
|✓|__aeabi_memmove8|[*]u8|[*]u8| usize| *dest, *src, size |
|✓|__aeabi_memmove4|[*]u8|[*]u8| usize| .. |
|✓|__aeabi_memmove |[*]u8|[*]u8| usize| .. |
|✓|__aeabi_memset8 |[*]u8|usize| i32 | *dest, size, char |
|✓|__aeabi_memset4 |[*]u8|usize| i32 | .. |
|✓|__aeabi_memset |[*]u8|usize| i32 | .. |
|✓|__aeabi_memclr8 |[*]u8| u32 | usize| *dest, size |
|✓|__aeabi_memclr4 |[*]u8| u32 | usize| .. |
|✓|__aeabi_memclr |[*]u8| u32 | usize| .. |
|✓|__aeabi_uwrite8 | i64 |[*]u8| i64 | .. |
- __aeabi_read_tp
[^PSRZC]: return result in the CPSR Z and C flag. C is clear only if the
operands are ordered and the first operand is less than the second.
Z is set only when the operands are ordered and equal.
Preserves all core registers except ip, lr, and the CPSR.
- aarch64 outline atomics
- atomics
- bcmp
- clear cache
- memory routines (memcmp, memcpy, memset, memmove)
- msvc things like _alldiv, _aulldiv, _allrem
- objective-c __isPlatformVersionAtLeast check
- stack probe routines
- tls emulation

View File

@@ -51,7 +51,7 @@ const __udivmodsi4 = @import("int.zig").__udivmodsi4;
const __divmoddi4 = @import("int.zig").__divmoddi4;
const __udivmoddi4 = @import("int.zig").__udivmoddi4;
extern fn memset(dest: ?[*]u8, c: u8, n: usize) ?[*]u8;
extern fn memset(dest: ?[*]u8, c: i32, n: usize) ?[*]u8;
extern fn memcpy(noalias dest: ?[*]u8, noalias src: ?[*]const u8, n: usize) ?[*]u8;
extern fn memmove(dest: ?[*]u8, src: ?[*]const u8, n: usize) ?[*]u8;
@@ -81,17 +81,17 @@ pub fn __aeabi_memmove8(dest: [*]u8, src: [*]u8, n: usize) callconv(.AAPCS) void
_ = memmove(dest, src, n);
}
pub fn __aeabi_memset(dest: [*]u8, n: usize, c: u8) callconv(.AAPCS) void {
pub fn __aeabi_memset(dest: [*]u8, n: usize, c: i32) callconv(.AAPCS) void {
@setRuntimeSafety(false);
// This is dentical to the standard `memset` definition but with the last
// two arguments swapped
_ = memset(dest, c, n);
}
pub fn __aeabi_memset4(dest: [*]u8, n: usize, c: u8) callconv(.AAPCS) void {
pub fn __aeabi_memset4(dest: [*]u8, n: usize, c: i32) callconv(.AAPCS) void {
@setRuntimeSafety(false);
_ = memset(dest, c, n);
}
pub fn __aeabi_memset8(dest: [*]u8, n: usize, c: u8) callconv(.AAPCS) void {
pub fn __aeabi_memset8(dest: [*]u8, n: usize, c: i32) callconv(.AAPCS) void {
@setRuntimeSafety(false);
_ = memset(dest, c, n);
}

View File

@@ -12,7 +12,7 @@ pub const panic = @import("common.zig").panic;
// specified range.
comptime {
_ = clear_cache;
_ = &clear_cache;
}
fn clear_cache(start: usize, end: usize) callconv(.C) void {

View File

@@ -3,7 +3,6 @@ const isNan = std.math.isNan;
const isInf = std.math.isInf;
const scalbn = std.math.scalbn;
const ilogb = std.math.ilogb;
const max = std.math.max;
const fabs = std.math.fabs;
const maxInt = std.math.maxInt;
const minInt = std.math.minInt;
@@ -17,7 +16,7 @@ pub inline fn divc3(comptime T: type, a: T, b: T, c_in: T, d_in: T) Complex(T) {
var d = d_in;
// logbw used to prevent under/over-flow
const logbw = ilogb(max(fabs(c), fabs(d)));
const logbw = ilogb(@max(fabs(c), fabs(d)));
const logbw_finite = logbw != maxInt(i32) and logbw != minInt(i32);
const ilogbw = if (logbw_finite) b: {
c = scalbn(c, -logbw);

View File

@@ -4,7 +4,11 @@ const Complex = @import("./mulc3.zig").Complex;
comptime {
if (@import("builtin").zig_backend != .stage2_c) {
@export(__divtc3, .{ .name = "__divtc3", .linkage = common.linkage, .visibility = common.visibility });
if (common.want_ppc_abi) {
@export(__divtc3, .{ .name = "__divkc3", .linkage = common.linkage, .visibility = common.visibility });
} else {
@export(__divtc3, .{ .name = "__divtc3", .linkage = common.linkage, .visibility = common.visibility });
}
}
}

View File

@@ -49,7 +49,7 @@ const simple_allocator = struct {
/// Allocate a memory chunk.
pub fn advancedAlloc(alignment: u29, size: usize) [*]u8 {
const minimal_alignment = std.math.max(@alignOf(usize), alignment);
const minimal_alignment = @max(@alignOf(usize), alignment);
var aligned_ptr: ?*anyopaque = undefined;
if (std.c.posix_memalign(&aligned_ptr, minimal_alignment, size) != 0) {
@@ -170,7 +170,7 @@ const current_thread_storage = struct {
// make it to contains at least 16 objects (to avoid too much
// reallocation at startup).
const size = std.math.max(16, index);
const size = @max(16, index);
// create a new array and store it.
var array: *ObjectArray = ObjectArray.init(size);

View File

@@ -7,6 +7,8 @@ pub const panic = common.panic;
comptime {
if (common.want_windows_v2u64_abi) {
@export(__fixtfti_windows_x86_64, .{ .name = "__fixtfti", .linkage = common.linkage, .visibility = common.visibility });
} else if (common.want_ppc_abi) {
@export(__fixtfti, .{ .name = "__fixkfti", .linkage = common.linkage, .visibility = common.visibility });
} else {
@export(__fixtfti, .{ .name = "__fixtfti", .linkage = common.linkage, .visibility = common.visibility });
}

View File

@@ -7,6 +7,8 @@ pub const panic = common.panic;
comptime {
if (common.want_windows_v2u64_abi) {
@export(__fixunstfti_windows_x86_64, .{ .name = "__fixunstfti", .linkage = common.linkage, .visibility = common.visibility });
} else if (common.want_ppc_abi) {
@export(__fixunstfti, .{ .name = "__fixunskfti", .linkage = common.linkage, .visibility = common.visibility });
} else {
@export(__fixunstfti, .{ .name = "__fixunstfti", .linkage = common.linkage, .visibility = common.visibility });
}

View File

@@ -7,6 +7,8 @@ pub const panic = common.panic;
comptime {
if (common.want_windows_v2u64_abi) {
@export(__floattitf_windows_x86_64, .{ .name = "__floattitf", .linkage = common.linkage, .visibility = common.visibility });
} else if (common.want_ppc_abi) {
@export(__floattitf, .{ .name = "__floattikf", .linkage = common.linkage, .visibility = common.visibility });
} else {
@export(__floattitf, .{ .name = "__floattitf", .linkage = common.linkage, .visibility = common.visibility });
}

View File

@@ -5,7 +5,11 @@ pub const panic = common.panic;
comptime {
if (@import("builtin").zig_backend != .stage2_c) {
@export(__multc3, .{ .name = "__multc3", .linkage = common.linkage, .visibility = common.visibility });
if (common.want_ppc_abi) {
@export(__multc3, .{ .name = "__mulkc3", .linkage = common.linkage, .visibility = common.visibility });
} else {
@export(__multc3, .{ .name = "__multc3", .linkage = common.linkage, .visibility = common.visibility });
}
}
}

View File

@@ -3,7 +3,11 @@ const common = @import("./common.zig");
pub const panic = common.panic;
comptime {
@export(__negtf2, .{ .name = "__negtf2", .linkage = common.linkage, .visibility = common.visibility });
if (common.want_ppc_abi) {
@export(__negtf2, .{ .name = "__negkf2", .linkage = common.linkage, .visibility = common.visibility });
} else {
@export(__negtf2, .{ .name = "__negtf2", .linkage = common.linkage, .visibility = common.visibility });
}
}
fn __negtf2(a: f128) callconv(.C) f128 {

View File

@@ -13,7 +13,11 @@ comptime {
@export(__powihf2, .{ .name = "__powihf2", .linkage = common.linkage, .visibility = common.visibility });
@export(__powisf2, .{ .name = "__powisf2", .linkage = common.linkage, .visibility = common.visibility });
@export(__powidf2, .{ .name = "__powidf2", .linkage = common.linkage, .visibility = common.visibility });
@export(__powitf2, .{ .name = "__powitf2", .linkage = common.linkage, .visibility = common.visibility });
if (common.want_ppc_abi) {
@export(__powitf2, .{ .name = "__powikf2", .linkage = common.linkage, .visibility = common.visibility });
} else {
@export(__powitf2, .{ .name = "__powitf2", .linkage = common.linkage, .visibility = common.visibility });
}
@export(__powixf2, .{ .name = "__powixf2", .linkage = common.linkage, .visibility = common.visibility });
}

View File

@@ -32,17 +32,18 @@ fn test__powixf2(a: f80, b: i32, expected: f80) !void {
}
test "powihf2" {
const inf_f16 = math.inf(f16);
try test__powisf2(0, 0, 1);
try test__powihf2(1, 0, 1);
try test__powihf2(1.5, 0, 1);
try test__powihf2(2, 0, 1);
try test__powihf2(math.inf_f16, 0, 1);
try test__powihf2(inf_f16, 0, 1);
try test__powihf2(-0.0, 0, 1);
try test__powihf2(-1, 0, 1);
try test__powihf2(-1.5, 0, 1);
try test__powihf2(-2, 0, 1);
try test__powihf2(-math.inf_f16, 0, 1);
try test__powihf2(-inf_f16, 0, 1);
try test__powihf2(0, 1, 0);
try test__powihf2(0, 2, 0);
@@ -65,35 +66,35 @@ test "powihf2" {
try test__powihf2(1, @bitCast(i32, @as(u32, 0x7FFFFFFE)), 1);
try test__powihf2(1, @bitCast(i32, @as(u32, 0x7FFFFFFF)), 1);
try test__powihf2(math.inf_f16, 1, math.inf_f16);
try test__powihf2(math.inf_f16, 2, math.inf_f16);
try test__powihf2(math.inf_f16, 3, math.inf_f16);
try test__powihf2(math.inf_f16, 4, math.inf_f16);
try test__powihf2(math.inf_f16, @bitCast(i32, @as(u32, 0x7FFFFFFE)), math.inf_f16);
try test__powihf2(math.inf_f16, @bitCast(i32, @as(u32, 0x7FFFFFFF)), math.inf_f16);
try test__powihf2(inf_f16, 1, inf_f16);
try test__powihf2(inf_f16, 2, inf_f16);
try test__powihf2(inf_f16, 3, inf_f16);
try test__powihf2(inf_f16, 4, inf_f16);
try test__powihf2(inf_f16, @bitCast(i32, @as(u32, 0x7FFFFFFE)), inf_f16);
try test__powihf2(inf_f16, @bitCast(i32, @as(u32, 0x7FFFFFFF)), inf_f16);
try test__powihf2(-math.inf_f16, 1, -math.inf_f16);
try test__powihf2(-math.inf_f16, 2, math.inf_f16);
try test__powihf2(-math.inf_f16, 3, -math.inf_f16);
try test__powihf2(-math.inf_f16, 4, math.inf_f16);
try test__powihf2(-math.inf_f16, @bitCast(i32, @as(u32, 0x7FFFFFFE)), math.inf_f16);
try test__powihf2(-math.inf_f16, @bitCast(i32, @as(u32, 0x7FFFFFFF)), -math.inf_f16);
try test__powihf2(-inf_f16, 1, -inf_f16);
try test__powihf2(-inf_f16, 2, inf_f16);
try test__powihf2(-inf_f16, 3, -inf_f16);
try test__powihf2(-inf_f16, 4, inf_f16);
try test__powihf2(-inf_f16, @bitCast(i32, @as(u32, 0x7FFFFFFE)), inf_f16);
try test__powihf2(-inf_f16, @bitCast(i32, @as(u32, 0x7FFFFFFF)), -inf_f16);
//
try test__powihf2(0, -1, math.inf_f16);
try test__powihf2(0, -2, math.inf_f16);
try test__powihf2(0, -3, math.inf_f16);
try test__powihf2(0, -4, math.inf_f16);
try test__powihf2(0, @bitCast(i32, @as(u32, 0x80000002)), math.inf_f16); // 0 ^ anything = +inf
try test__powihf2(0, @bitCast(i32, @as(u32, 0x80000001)), math.inf_f16);
try test__powihf2(0, @bitCast(i32, @as(u32, 0x80000000)), math.inf_f16);
try test__powihf2(0, -1, inf_f16);
try test__powihf2(0, -2, inf_f16);
try test__powihf2(0, -3, inf_f16);
try test__powihf2(0, -4, inf_f16);
try test__powihf2(0, @bitCast(i32, @as(u32, 0x80000002)), inf_f16); // 0 ^ anything = +inf
try test__powihf2(0, @bitCast(i32, @as(u32, 0x80000001)), inf_f16);
try test__powihf2(0, @bitCast(i32, @as(u32, 0x80000000)), inf_f16);
try test__powihf2(-0.0, -1, -math.inf_f16);
try test__powihf2(-0.0, -2, math.inf_f16);
try test__powihf2(-0.0, -3, -math.inf_f16);
try test__powihf2(-0.0, -4, math.inf_f16);
try test__powihf2(-0.0, @bitCast(i32, @as(u32, 0x80000002)), math.inf_f16); // -0 ^ anything even = +inf
try test__powihf2(-0.0, @bitCast(i32, @as(u32, 0x80000001)), -math.inf_f16); // -0 ^ anything odd = -inf
try test__powihf2(-0.0, @bitCast(i32, @as(u32, 0x80000000)), math.inf_f16);
try test__powihf2(-0.0, -1, -inf_f16);
try test__powihf2(-0.0, -2, inf_f16);
try test__powihf2(-0.0, -3, -inf_f16);
try test__powihf2(-0.0, -4, inf_f16);
try test__powihf2(-0.0, @bitCast(i32, @as(u32, 0x80000002)), inf_f16); // -0 ^ anything even = +inf
try test__powihf2(-0.0, @bitCast(i32, @as(u32, 0x80000001)), -inf_f16); // -0 ^ anything odd = -inf
try test__powihf2(-0.0, @bitCast(i32, @as(u32, 0x80000000)), inf_f16);
try test__powihf2(1, -1, 1);
try test__powihf2(1, -2, 1);
@@ -103,21 +104,21 @@ test "powihf2" {
try test__powihf2(1, @bitCast(i32, @as(u32, 0x80000001)), 1);
try test__powihf2(1, @bitCast(i32, @as(u32, 0x80000000)), 1);
try test__powihf2(math.inf_f16, -1, 0);
try test__powihf2(math.inf_f16, -2, 0);
try test__powihf2(math.inf_f16, -3, 0);
try test__powihf2(math.inf_f16, -4, 0);
try test__powihf2(math.inf_f16, @bitCast(i32, @as(u32, 0x80000002)), 0);
try test__powihf2(math.inf_f16, @bitCast(i32, @as(u32, 0x80000001)), 0);
try test__powihf2(math.inf_f16, @bitCast(i32, @as(u32, 0x80000000)), 0);
try test__powihf2(inf_f16, -1, 0);
try test__powihf2(inf_f16, -2, 0);
try test__powihf2(inf_f16, -3, 0);
try test__powihf2(inf_f16, -4, 0);
try test__powihf2(inf_f16, @bitCast(i32, @as(u32, 0x80000002)), 0);
try test__powihf2(inf_f16, @bitCast(i32, @as(u32, 0x80000001)), 0);
try test__powihf2(inf_f16, @bitCast(i32, @as(u32, 0x80000000)), 0);
//
try test__powihf2(-math.inf_f16, -1, -0.0);
try test__powihf2(-math.inf_f16, -2, 0);
try test__powihf2(-math.inf_f16, -3, -0.0);
try test__powihf2(-math.inf_f16, -4, 0);
try test__powihf2(-math.inf_f16, @bitCast(i32, @as(u32, 0x80000002)), 0);
try test__powihf2(-math.inf_f16, @bitCast(i32, @as(u32, 0x80000001)), -0.0);
try test__powihf2(-math.inf_f16, @bitCast(i32, @as(u32, 0x80000000)), 0);
try test__powihf2(-inf_f16, -1, -0.0);
try test__powihf2(-inf_f16, -2, 0);
try test__powihf2(-inf_f16, -3, -0.0);
try test__powihf2(-inf_f16, -4, 0);
try test__powihf2(-inf_f16, @bitCast(i32, @as(u32, 0x80000002)), 0);
try test__powihf2(-inf_f16, @bitCast(i32, @as(u32, 0x80000001)), -0.0);
try test__powihf2(-inf_f16, @bitCast(i32, @as(u32, 0x80000000)), 0);
try test__powihf2(2, 10, 1024.0);
try test__powihf2(-2, 10, 1024.0);
@@ -128,8 +129,8 @@ test "powihf2" {
try test__powihf2(-2, 14, 16384.0);
try test__powihf2(2, 15, 32768.0);
try test__powihf2(-2, 15, -32768.0);
try test__powihf2(2, 16, math.inf_f16);
try test__powihf2(-2, 16, math.inf_f16);
try test__powihf2(2, 16, inf_f16);
try test__powihf2(-2, 16, inf_f16);
try test__powihf2(2, -13, 1.0 / 8192.0);
try test__powihf2(-2, -13, -1.0 / 8192.0);
@@ -140,17 +141,18 @@ test "powihf2" {
}
test "powisf2" {
const inf_f32 = math.inf(f32);
try test__powisf2(0, 0, 1);
try test__powisf2(1, 0, 1);
try test__powisf2(1.5, 0, 1);
try test__powisf2(2, 0, 1);
try test__powisf2(math.inf_f32, 0, 1);
try test__powisf2(inf_f32, 0, 1);
try test__powisf2(-0.0, 0, 1);
try test__powisf2(-1, 0, 1);
try test__powisf2(-1.5, 0, 1);
try test__powisf2(-2, 0, 1);
try test__powisf2(-math.inf_f32, 0, 1);
try test__powisf2(-inf_f32, 0, 1);
try test__powisf2(0, 1, 0);
try test__powisf2(0, 2, 0);
@@ -173,35 +175,35 @@ test "powisf2" {
try test__powisf2(1, @bitCast(i32, @as(u32, 0x7FFFFFFE)), 1);
try test__powisf2(1, @bitCast(i32, @as(u32, 0x7FFFFFFF)), 1);
try test__powisf2(math.inf_f32, 1, math.inf_f32);
try test__powisf2(math.inf_f32, 2, math.inf_f32);
try test__powisf2(math.inf_f32, 3, math.inf_f32);
try test__powisf2(math.inf_f32, 4, math.inf_f32);
try test__powisf2(math.inf_f32, @bitCast(i32, @as(u32, 0x7FFFFFFE)), math.inf_f32);
try test__powisf2(math.inf_f32, @bitCast(i32, @as(u32, 0x7FFFFFFF)), math.inf_f32);
try test__powisf2(inf_f32, 1, inf_f32);
try test__powisf2(inf_f32, 2, inf_f32);
try test__powisf2(inf_f32, 3, inf_f32);
try test__powisf2(inf_f32, 4, inf_f32);
try test__powisf2(inf_f32, @bitCast(i32, @as(u32, 0x7FFFFFFE)), inf_f32);
try test__powisf2(inf_f32, @bitCast(i32, @as(u32, 0x7FFFFFFF)), inf_f32);
try test__powisf2(-math.inf_f32, 1, -math.inf_f32);
try test__powisf2(-math.inf_f32, 2, math.inf_f32);
try test__powisf2(-math.inf_f32, 3, -math.inf_f32);
try test__powisf2(-math.inf_f32, 4, math.inf_f32);
try test__powisf2(-math.inf_f32, @bitCast(i32, @as(u32, 0x7FFFFFFE)), math.inf_f32);
try test__powisf2(-math.inf_f32, @bitCast(i32, @as(u32, 0x7FFFFFFF)), -math.inf_f32);
try test__powisf2(-inf_f32, 1, -inf_f32);
try test__powisf2(-inf_f32, 2, inf_f32);
try test__powisf2(-inf_f32, 3, -inf_f32);
try test__powisf2(-inf_f32, 4, inf_f32);
try test__powisf2(-inf_f32, @bitCast(i32, @as(u32, 0x7FFFFFFE)), inf_f32);
try test__powisf2(-inf_f32, @bitCast(i32, @as(u32, 0x7FFFFFFF)), -inf_f32);
try test__powisf2(0, -1, math.inf_f32);
try test__powisf2(0, -2, math.inf_f32);
try test__powisf2(0, -3, math.inf_f32);
try test__powisf2(0, -4, math.inf_f32);
try test__powisf2(0, @bitCast(i32, @as(u32, 0x80000002)), math.inf_f32);
try test__powisf2(0, @bitCast(i32, @as(u32, 0x80000001)), math.inf_f32);
try test__powisf2(0, @bitCast(i32, @as(u32, 0x80000000)), math.inf_f32);
try test__powisf2(0, -1, inf_f32);
try test__powisf2(0, -2, inf_f32);
try test__powisf2(0, -3, inf_f32);
try test__powisf2(0, -4, inf_f32);
try test__powisf2(0, @bitCast(i32, @as(u32, 0x80000002)), inf_f32);
try test__powisf2(0, @bitCast(i32, @as(u32, 0x80000001)), inf_f32);
try test__powisf2(0, @bitCast(i32, @as(u32, 0x80000000)), inf_f32);
try test__powisf2(-0.0, -1, -math.inf_f32);
try test__powisf2(-0.0, -2, math.inf_f32);
try test__powisf2(-0.0, -3, -math.inf_f32);
try test__powisf2(-0.0, -4, math.inf_f32);
try test__powisf2(-0.0, @bitCast(i32, @as(u32, 0x80000002)), math.inf_f32);
try test__powisf2(-0.0, @bitCast(i32, @as(u32, 0x80000001)), -math.inf_f32);
try test__powisf2(-0.0, @bitCast(i32, @as(u32, 0x80000000)), math.inf_f32);
try test__powisf2(-0.0, -1, -inf_f32);
try test__powisf2(-0.0, -2, inf_f32);
try test__powisf2(-0.0, -3, -inf_f32);
try test__powisf2(-0.0, -4, inf_f32);
try test__powisf2(-0.0, @bitCast(i32, @as(u32, 0x80000002)), inf_f32);
try test__powisf2(-0.0, @bitCast(i32, @as(u32, 0x80000001)), -inf_f32);
try test__powisf2(-0.0, @bitCast(i32, @as(u32, 0x80000000)), inf_f32);
try test__powisf2(1, -1, 1);
try test__powisf2(1, -2, 1);
@@ -211,21 +213,21 @@ test "powisf2" {
try test__powisf2(1, @bitCast(i32, @as(u32, 0x80000001)), 1);
try test__powisf2(1, @bitCast(i32, @as(u32, 0x80000000)), 1);
try test__powisf2(math.inf_f32, -1, 0);
try test__powisf2(math.inf_f32, -2, 0);
try test__powisf2(math.inf_f32, -3, 0);
try test__powisf2(math.inf_f32, -4, 0);
try test__powisf2(math.inf_f32, @bitCast(i32, @as(u32, 0x80000002)), 0);
try test__powisf2(math.inf_f32, @bitCast(i32, @as(u32, 0x80000001)), 0);
try test__powisf2(math.inf_f32, @bitCast(i32, @as(u32, 0x80000000)), 0);
try test__powisf2(inf_f32, -1, 0);
try test__powisf2(inf_f32, -2, 0);
try test__powisf2(inf_f32, -3, 0);
try test__powisf2(inf_f32, -4, 0);
try test__powisf2(inf_f32, @bitCast(i32, @as(u32, 0x80000002)), 0);
try test__powisf2(inf_f32, @bitCast(i32, @as(u32, 0x80000001)), 0);
try test__powisf2(inf_f32, @bitCast(i32, @as(u32, 0x80000000)), 0);
try test__powisf2(-math.inf_f32, -1, -0.0);
try test__powisf2(-math.inf_f32, -2, 0);
try test__powisf2(-math.inf_f32, -3, -0.0);
try test__powisf2(-math.inf_f32, -4, 0);
try test__powisf2(-math.inf_f32, @bitCast(i32, @as(u32, 0x80000002)), 0);
try test__powisf2(-math.inf_f32, @bitCast(i32, @as(u32, 0x80000001)), -0.0);
try test__powisf2(-math.inf_f32, @bitCast(i32, @as(u32, 0x80000000)), 0);
try test__powisf2(-inf_f32, -1, -0.0);
try test__powisf2(-inf_f32, -2, 0);
try test__powisf2(-inf_f32, -3, -0.0);
try test__powisf2(-inf_f32, -4, 0);
try test__powisf2(-inf_f32, @bitCast(i32, @as(u32, 0x80000002)), 0);
try test__powisf2(-inf_f32, @bitCast(i32, @as(u32, 0x80000001)), -0.0);
try test__powisf2(-inf_f32, @bitCast(i32, @as(u32, 0x80000000)), 0);
try test__powisf2(2.0, 10, 1024.0);
try test__powisf2(-2, 10, 1024.0);
@@ -244,17 +246,18 @@ test "powisf2" {
}
test "powidf2" {
const inf_f64 = math.inf(f64);
try test__powidf2(0, 0, 1);
try test__powidf2(1, 0, 1);
try test__powidf2(1.5, 0, 1);
try test__powidf2(2, 0, 1);
try test__powidf2(math.inf_f64, 0, 1);
try test__powidf2(inf_f64, 0, 1);
try test__powidf2(-0.0, 0, 1);
try test__powidf2(-1, 0, 1);
try test__powidf2(-1.5, 0, 1);
try test__powidf2(-2, 0, 1);
try test__powidf2(-math.inf_f64, 0, 1);
try test__powidf2(-inf_f64, 0, 1);
try test__powidf2(0, 1, 0);
try test__powidf2(0, 2, 0);
@@ -277,35 +280,35 @@ test "powidf2" {
try test__powidf2(1, @bitCast(i32, @as(u32, 0x7FFFFFFE)), 1);
try test__powidf2(1, @bitCast(i32, @as(u32, 0x7FFFFFFF)), 1);
try test__powidf2(math.inf_f64, 1, math.inf_f64);
try test__powidf2(math.inf_f64, 2, math.inf_f64);
try test__powidf2(math.inf_f64, 3, math.inf_f64);
try test__powidf2(math.inf_f64, 4, math.inf_f64);
try test__powidf2(math.inf_f64, @bitCast(i32, @as(u32, 0x7FFFFFFE)), math.inf_f64);
try test__powidf2(math.inf_f64, @bitCast(i32, @as(u32, 0x7FFFFFFF)), math.inf_f64);
try test__powidf2(inf_f64, 1, inf_f64);
try test__powidf2(inf_f64, 2, inf_f64);
try test__powidf2(inf_f64, 3, inf_f64);
try test__powidf2(inf_f64, 4, inf_f64);
try test__powidf2(inf_f64, @bitCast(i32, @as(u32, 0x7FFFFFFE)), inf_f64);
try test__powidf2(inf_f64, @bitCast(i32, @as(u32, 0x7FFFFFFF)), inf_f64);
try test__powidf2(-math.inf_f64, 1, -math.inf_f64);
try test__powidf2(-math.inf_f64, 2, math.inf_f64);
try test__powidf2(-math.inf_f64, 3, -math.inf_f64);
try test__powidf2(-math.inf_f64, 4, math.inf_f64);
try test__powidf2(-math.inf_f64, @bitCast(i32, @as(u32, 0x7FFFFFFE)), math.inf_f64);
try test__powidf2(-math.inf_f64, @bitCast(i32, @as(u32, 0x7FFFFFFF)), -math.inf_f64);
try test__powidf2(-inf_f64, 1, -inf_f64);
try test__powidf2(-inf_f64, 2, inf_f64);
try test__powidf2(-inf_f64, 3, -inf_f64);
try test__powidf2(-inf_f64, 4, inf_f64);
try test__powidf2(-inf_f64, @bitCast(i32, @as(u32, 0x7FFFFFFE)), inf_f64);
try test__powidf2(-inf_f64, @bitCast(i32, @as(u32, 0x7FFFFFFF)), -inf_f64);
try test__powidf2(0, -1, math.inf_f64);
try test__powidf2(0, -2, math.inf_f64);
try test__powidf2(0, -3, math.inf_f64);
try test__powidf2(0, -4, math.inf_f64);
try test__powidf2(0, @bitCast(i32, @as(u32, 0x80000002)), math.inf_f64);
try test__powidf2(0, @bitCast(i32, @as(u32, 0x80000001)), math.inf_f64);
try test__powidf2(0, @bitCast(i32, @as(u32, 0x80000000)), math.inf_f64);
try test__powidf2(0, -1, inf_f64);
try test__powidf2(0, -2, inf_f64);
try test__powidf2(0, -3, inf_f64);
try test__powidf2(0, -4, inf_f64);
try test__powidf2(0, @bitCast(i32, @as(u32, 0x80000002)), inf_f64);
try test__powidf2(0, @bitCast(i32, @as(u32, 0x80000001)), inf_f64);
try test__powidf2(0, @bitCast(i32, @as(u32, 0x80000000)), inf_f64);
try test__powidf2(-0.0, -1, -math.inf_f64);
try test__powidf2(-0.0, -2, math.inf_f64);
try test__powidf2(-0.0, -3, -math.inf_f64);
try test__powidf2(-0.0, -4, math.inf_f64);
try test__powidf2(-0.0, @bitCast(i32, @as(u32, 0x80000002)), math.inf_f64);
try test__powidf2(-0.0, @bitCast(i32, @as(u32, 0x80000001)), -math.inf_f64);
try test__powidf2(-0.0, @bitCast(i32, @as(u32, 0x80000000)), math.inf_f64);
try test__powidf2(-0.0, -1, -inf_f64);
try test__powidf2(-0.0, -2, inf_f64);
try test__powidf2(-0.0, -3, -inf_f64);
try test__powidf2(-0.0, -4, inf_f64);
try test__powidf2(-0.0, @bitCast(i32, @as(u32, 0x80000002)), inf_f64);
try test__powidf2(-0.0, @bitCast(i32, @as(u32, 0x80000001)), -inf_f64);
try test__powidf2(-0.0, @bitCast(i32, @as(u32, 0x80000000)), inf_f64);
try test__powidf2(1, -1, 1);
try test__powidf2(1, -2, 1);
@@ -315,21 +318,21 @@ test "powidf2" {
try test__powidf2(1, @bitCast(i32, @as(u32, 0x80000001)), 1);
try test__powidf2(1, @bitCast(i32, @as(u32, 0x80000000)), 1);
try test__powidf2(math.inf_f64, -1, 0);
try test__powidf2(math.inf_f64, -2, 0);
try test__powidf2(math.inf_f64, -3, 0);
try test__powidf2(math.inf_f64, -4, 0);
try test__powidf2(math.inf_f64, @bitCast(i32, @as(u32, 0x80000002)), 0);
try test__powidf2(math.inf_f64, @bitCast(i32, @as(u32, 0x80000001)), 0);
try test__powidf2(math.inf_f64, @bitCast(i32, @as(u32, 0x80000000)), 0);
try test__powidf2(inf_f64, -1, 0);
try test__powidf2(inf_f64, -2, 0);
try test__powidf2(inf_f64, -3, 0);
try test__powidf2(inf_f64, -4, 0);
try test__powidf2(inf_f64, @bitCast(i32, @as(u32, 0x80000002)), 0);
try test__powidf2(inf_f64, @bitCast(i32, @as(u32, 0x80000001)), 0);
try test__powidf2(inf_f64, @bitCast(i32, @as(u32, 0x80000000)), 0);
try test__powidf2(-math.inf_f64, -1, -0.0);
try test__powidf2(-math.inf_f64, -2, 0);
try test__powidf2(-math.inf_f64, -3, -0.0);
try test__powidf2(-math.inf_f64, -4, 0);
try test__powidf2(-math.inf_f64, @bitCast(i32, @as(u32, 0x80000002)), 0);
try test__powidf2(-math.inf_f64, @bitCast(i32, @as(u32, 0x80000001)), -0.0);
try test__powidf2(-math.inf_f64, @bitCast(i32, @as(u32, 0x80000000)), 0);
try test__powidf2(-inf_f64, -1, -0.0);
try test__powidf2(-inf_f64, -2, 0);
try test__powidf2(-inf_f64, -3, -0.0);
try test__powidf2(-inf_f64, -4, 0);
try test__powidf2(-inf_f64, @bitCast(i32, @as(u32, 0x80000002)), 0);
try test__powidf2(-inf_f64, @bitCast(i32, @as(u32, 0x80000001)), -0.0);
try test__powidf2(-inf_f64, @bitCast(i32, @as(u32, 0x80000000)), 0);
try test__powidf2(2, 10, 1024.0);
try test__powidf2(-2, 10, 1024.0);
@@ -348,17 +351,18 @@ test "powidf2" {
}
test "powitf2" {
const inf_f128 = math.inf(f128);
try test__powitf2(0, 0, 1);
try test__powitf2(1, 0, 1);
try test__powitf2(1.5, 0, 1);
try test__powitf2(2, 0, 1);
try test__powitf2(math.inf_f128, 0, 1);
try test__powitf2(inf_f128, 0, 1);
try test__powitf2(-0.0, 0, 1);
try test__powitf2(-1, 0, 1);
try test__powitf2(-1.5, 0, 1);
try test__powitf2(-2, 0, 1);
try test__powitf2(-math.inf_f128, 0, 1);
try test__powitf2(-inf_f128, 0, 1);
try test__powitf2(0, 1, 0);
try test__powitf2(0, 2, 0);
@@ -381,35 +385,35 @@ test "powitf2" {
try test__powitf2(1, @bitCast(i32, @as(u32, 0x7FFFFFFE)), 1);
try test__powitf2(1, @bitCast(i32, @as(u32, 0x7FFFFFFF)), 1);
try test__powitf2(math.inf_f128, 1, math.inf_f128);
try test__powitf2(math.inf_f128, 2, math.inf_f128);
try test__powitf2(math.inf_f128, 3, math.inf_f128);
try test__powitf2(math.inf_f128, 4, math.inf_f128);
try test__powitf2(math.inf_f128, @bitCast(i32, @as(u32, 0x7FFFFFFE)), math.inf_f128);
try test__powitf2(math.inf_f128, @bitCast(i32, @as(u32, 0x7FFFFFFF)), math.inf_f128);
try test__powitf2(inf_f128, 1, inf_f128);
try test__powitf2(inf_f128, 2, inf_f128);
try test__powitf2(inf_f128, 3, inf_f128);
try test__powitf2(inf_f128, 4, inf_f128);
try test__powitf2(inf_f128, @bitCast(i32, @as(u32, 0x7FFFFFFE)), inf_f128);
try test__powitf2(inf_f128, @bitCast(i32, @as(u32, 0x7FFFFFFF)), inf_f128);
try test__powitf2(-math.inf_f128, 1, -math.inf_f128);
try test__powitf2(-math.inf_f128, 2, math.inf_f128);
try test__powitf2(-math.inf_f128, 3, -math.inf_f128);
try test__powitf2(-math.inf_f128, 4, math.inf_f128);
try test__powitf2(-math.inf_f128, @bitCast(i32, @as(u32, 0x7FFFFFFE)), math.inf_f128);
try test__powitf2(-math.inf_f128, @bitCast(i32, @as(u32, 0x7FFFFFFF)), -math.inf_f128);
try test__powitf2(-inf_f128, 1, -inf_f128);
try test__powitf2(-inf_f128, 2, inf_f128);
try test__powitf2(-inf_f128, 3, -inf_f128);
try test__powitf2(-inf_f128, 4, inf_f128);
try test__powitf2(-inf_f128, @bitCast(i32, @as(u32, 0x7FFFFFFE)), inf_f128);
try test__powitf2(-inf_f128, @bitCast(i32, @as(u32, 0x7FFFFFFF)), -inf_f128);
try test__powitf2(0, -1, math.inf_f128);
try test__powitf2(0, -2, math.inf_f128);
try test__powitf2(0, -3, math.inf_f128);
try test__powitf2(0, -4, math.inf_f128);
try test__powitf2(0, @bitCast(i32, @as(u32, 0x80000002)), math.inf_f128);
try test__powitf2(0, @bitCast(i32, @as(u32, 0x80000001)), math.inf_f128);
try test__powitf2(0, @bitCast(i32, @as(u32, 0x80000000)), math.inf_f128);
try test__powitf2(0, -1, inf_f128);
try test__powitf2(0, -2, inf_f128);
try test__powitf2(0, -3, inf_f128);
try test__powitf2(0, -4, inf_f128);
try test__powitf2(0, @bitCast(i32, @as(u32, 0x80000002)), inf_f128);
try test__powitf2(0, @bitCast(i32, @as(u32, 0x80000001)), inf_f128);
try test__powitf2(0, @bitCast(i32, @as(u32, 0x80000000)), inf_f128);
try test__powitf2(-0.0, -1, -math.inf_f128);
try test__powitf2(-0.0, -2, math.inf_f128);
try test__powitf2(-0.0, -3, -math.inf_f128);
try test__powitf2(-0.0, -4, math.inf_f128);
try test__powitf2(-0.0, @bitCast(i32, @as(u32, 0x80000002)), math.inf_f128);
try test__powitf2(-0.0, @bitCast(i32, @as(u32, 0x80000001)), -math.inf_f128);
try test__powitf2(-0.0, @bitCast(i32, @as(u32, 0x80000000)), math.inf_f128);
try test__powitf2(-0.0, -1, -inf_f128);
try test__powitf2(-0.0, -2, inf_f128);
try test__powitf2(-0.0, -3, -inf_f128);
try test__powitf2(-0.0, -4, inf_f128);
try test__powitf2(-0.0, @bitCast(i32, @as(u32, 0x80000002)), inf_f128);
try test__powitf2(-0.0, @bitCast(i32, @as(u32, 0x80000001)), -inf_f128);
try test__powitf2(-0.0, @bitCast(i32, @as(u32, 0x80000000)), inf_f128);
try test__powitf2(1, -1, 1);
try test__powitf2(1, -2, 1);
@@ -419,21 +423,21 @@ test "powitf2" {
try test__powitf2(1, @bitCast(i32, @as(u32, 0x80000001)), 1);
try test__powitf2(1, @bitCast(i32, @as(u32, 0x80000000)), 1);
try test__powitf2(math.inf_f128, -1, 0);
try test__powitf2(math.inf_f128, -2, 0);
try test__powitf2(math.inf_f128, -3, 0);
try test__powitf2(math.inf_f128, -4, 0);
try test__powitf2(math.inf_f128, @bitCast(i32, @as(u32, 0x80000002)), 0);
try test__powitf2(math.inf_f128, @bitCast(i32, @as(u32, 0x80000001)), 0);
try test__powitf2(math.inf_f128, @bitCast(i32, @as(u32, 0x80000000)), 0);
try test__powitf2(inf_f128, -1, 0);
try test__powitf2(inf_f128, -2, 0);
try test__powitf2(inf_f128, -3, 0);
try test__powitf2(inf_f128, -4, 0);
try test__powitf2(inf_f128, @bitCast(i32, @as(u32, 0x80000002)), 0);
try test__powitf2(inf_f128, @bitCast(i32, @as(u32, 0x80000001)), 0);
try test__powitf2(inf_f128, @bitCast(i32, @as(u32, 0x80000000)), 0);
try test__powitf2(-math.inf_f128, -1, -0.0);
try test__powitf2(-math.inf_f128, -2, 0);
try test__powitf2(-math.inf_f128, -3, -0.0);
try test__powitf2(-math.inf_f128, -4, 0);
try test__powitf2(-math.inf_f128, @bitCast(i32, @as(u32, 0x80000002)), 0);
try test__powitf2(-math.inf_f128, @bitCast(i32, @as(u32, 0x80000001)), -0.0);
try test__powitf2(-math.inf_f128, @bitCast(i32, @as(u32, 0x80000000)), 0);
try test__powitf2(-inf_f128, -1, -0.0);
try test__powitf2(-inf_f128, -2, 0);
try test__powitf2(-inf_f128, -3, -0.0);
try test__powitf2(-inf_f128, -4, 0);
try test__powitf2(-inf_f128, @bitCast(i32, @as(u32, 0x80000002)), 0);
try test__powitf2(-inf_f128, @bitCast(i32, @as(u32, 0x80000001)), -0.0);
try test__powitf2(-inf_f128, @bitCast(i32, @as(u32, 0x80000000)), 0);
try test__powitf2(2, 10, 1024.0);
try test__powitf2(-2, 10, 1024.0);
@@ -452,17 +456,18 @@ test "powitf2" {
}
test "powixf2" {
const inf_f80 = math.inf(f80);
try test__powixf2(0, 0, 1);
try test__powixf2(1, 0, 1);
try test__powixf2(1.5, 0, 1);
try test__powixf2(2, 0, 1);
try test__powixf2(math.inf_f80, 0, 1);
try test__powixf2(inf_f80, 0, 1);
try test__powixf2(-0.0, 0, 1);
try test__powixf2(-1, 0, 1);
try test__powixf2(-1.5, 0, 1);
try test__powixf2(-2, 0, 1);
try test__powixf2(-math.inf_f80, 0, 1);
try test__powixf2(-inf_f80, 0, 1);
try test__powixf2(0, 1, 0);
try test__powixf2(0, 2, 0);
@@ -485,35 +490,35 @@ test "powixf2" {
try test__powixf2(1, @bitCast(i32, @as(u32, 0x7FFFFFFE)), 1);
try test__powixf2(1, @bitCast(i32, @as(u32, 0x7FFFFFFF)), 1);
try test__powixf2(math.inf_f80, 1, math.inf_f80);
try test__powixf2(math.inf_f80, 2, math.inf_f80);
try test__powixf2(math.inf_f80, 3, math.inf_f80);
try test__powixf2(math.inf_f80, 4, math.inf_f80);
try test__powixf2(math.inf_f80, @bitCast(i32, @as(u32, 0x7FFFFFFE)), math.inf_f80);
try test__powixf2(math.inf_f80, @bitCast(i32, @as(u32, 0x7FFFFFFF)), math.inf_f80);
try test__powixf2(inf_f80, 1, inf_f80);
try test__powixf2(inf_f80, 2, inf_f80);
try test__powixf2(inf_f80, 3, inf_f80);
try test__powixf2(inf_f80, 4, inf_f80);
try test__powixf2(inf_f80, @bitCast(i32, @as(u32, 0x7FFFFFFE)), inf_f80);
try test__powixf2(inf_f80, @bitCast(i32, @as(u32, 0x7FFFFFFF)), inf_f80);
try test__powixf2(-math.inf_f80, 1, -math.inf_f80);
try test__powixf2(-math.inf_f80, 2, math.inf_f80);
try test__powixf2(-math.inf_f80, 3, -math.inf_f80);
try test__powixf2(-math.inf_f80, 4, math.inf_f80);
try test__powixf2(-math.inf_f80, @bitCast(i32, @as(u32, 0x7FFFFFFE)), math.inf_f80);
try test__powixf2(-math.inf_f80, @bitCast(i32, @as(u32, 0x7FFFFFFF)), -math.inf_f80);
try test__powixf2(-inf_f80, 1, -inf_f80);
try test__powixf2(-inf_f80, 2, inf_f80);
try test__powixf2(-inf_f80, 3, -inf_f80);
try test__powixf2(-inf_f80, 4, inf_f80);
try test__powixf2(-inf_f80, @bitCast(i32, @as(u32, 0x7FFFFFFE)), inf_f80);
try test__powixf2(-inf_f80, @bitCast(i32, @as(u32, 0x7FFFFFFF)), -inf_f80);
try test__powixf2(0, -1, math.inf_f80);
try test__powixf2(0, -2, math.inf_f80);
try test__powixf2(0, -3, math.inf_f80);
try test__powixf2(0, -4, math.inf_f80);
try test__powixf2(0, @bitCast(i32, @as(u32, 0x80000002)), math.inf_f80);
try test__powixf2(0, @bitCast(i32, @as(u32, 0x80000001)), math.inf_f80);
try test__powixf2(0, @bitCast(i32, @as(u32, 0x80000000)), math.inf_f80);
try test__powixf2(0, -1, inf_f80);
try test__powixf2(0, -2, inf_f80);
try test__powixf2(0, -3, inf_f80);
try test__powixf2(0, -4, inf_f80);
try test__powixf2(0, @bitCast(i32, @as(u32, 0x80000002)), inf_f80);
try test__powixf2(0, @bitCast(i32, @as(u32, 0x80000001)), inf_f80);
try test__powixf2(0, @bitCast(i32, @as(u32, 0x80000000)), inf_f80);
try test__powixf2(-0.0, -1, -math.inf_f80);
try test__powixf2(-0.0, -2, math.inf_f80);
try test__powixf2(-0.0, -3, -math.inf_f80);
try test__powixf2(-0.0, -4, math.inf_f80);
try test__powixf2(-0.0, @bitCast(i32, @as(u32, 0x80000002)), math.inf_f80);
try test__powixf2(-0.0, @bitCast(i32, @as(u32, 0x80000001)), -math.inf_f80);
try test__powixf2(-0.0, @bitCast(i32, @as(u32, 0x80000000)), math.inf_f80);
try test__powixf2(-0.0, -1, -inf_f80);
try test__powixf2(-0.0, -2, inf_f80);
try test__powixf2(-0.0, -3, -inf_f80);
try test__powixf2(-0.0, -4, inf_f80);
try test__powixf2(-0.0, @bitCast(i32, @as(u32, 0x80000002)), inf_f80);
try test__powixf2(-0.0, @bitCast(i32, @as(u32, 0x80000001)), -inf_f80);
try test__powixf2(-0.0, @bitCast(i32, @as(u32, 0x80000000)), inf_f80);
try test__powixf2(1, -1, 1);
try test__powixf2(1, -2, 1);
@@ -523,21 +528,21 @@ test "powixf2" {
try test__powixf2(1, @bitCast(i32, @as(u32, 0x80000001)), 1);
try test__powixf2(1, @bitCast(i32, @as(u32, 0x80000000)), 1);
try test__powixf2(math.inf_f80, -1, 0);
try test__powixf2(math.inf_f80, -2, 0);
try test__powixf2(math.inf_f80, -3, 0);
try test__powixf2(math.inf_f80, -4, 0);
try test__powixf2(math.inf_f80, @bitCast(i32, @as(u32, 0x80000002)), 0);
try test__powixf2(math.inf_f80, @bitCast(i32, @as(u32, 0x80000001)), 0);
try test__powixf2(math.inf_f80, @bitCast(i32, @as(u32, 0x80000000)), 0);
try test__powixf2(inf_f80, -1, 0);
try test__powixf2(inf_f80, -2, 0);
try test__powixf2(inf_f80, -3, 0);
try test__powixf2(inf_f80, -4, 0);
try test__powixf2(inf_f80, @bitCast(i32, @as(u32, 0x80000002)), 0);
try test__powixf2(inf_f80, @bitCast(i32, @as(u32, 0x80000001)), 0);
try test__powixf2(inf_f80, @bitCast(i32, @as(u32, 0x80000000)), 0);
try test__powixf2(-math.inf_f80, -1, -0.0);
try test__powixf2(-math.inf_f80, -2, 0);
try test__powixf2(-math.inf_f80, -3, -0.0);
try test__powixf2(-math.inf_f80, -4, 0);
try test__powixf2(-math.inf_f80, @bitCast(i32, @as(u32, 0x80000002)), 0);
try test__powixf2(-math.inf_f80, @bitCast(i32, @as(u32, 0x80000001)), -0.0);
try test__powixf2(-math.inf_f80, @bitCast(i32, @as(u32, 0x80000000)), 0);
try test__powixf2(-inf_f80, -1, -0.0);
try test__powixf2(-inf_f80, -2, 0);
try test__powixf2(-inf_f80, -3, -0.0);
try test__powixf2(-inf_f80, -4, 0);
try test__powixf2(-inf_f80, @bitCast(i32, @as(u32, 0x80000002)), 0);
try test__powixf2(-inf_f80, @bitCast(i32, @as(u32, 0x80000001)), -0.0);
try test__powixf2(-inf_f80, @bitCast(i32, @as(u32, 0x80000000)), 0);
try test__powixf2(2, 10, 1024.0);
try test__powixf2(-2, 10, 1024.0);

View File

@@ -1,201 +1,149 @@
const std = @import("std");
const builtin = @import("builtin");
const is_test = builtin.is_test;
const native_endian = builtin.cpu.arch.endian();
const std = @import("std");
const Log2Int = std.math.Log2Int;
const HalveInt = @import("common.zig").HalveInt;
const low = switch (native_endian) {
const lo = switch (builtin.cpu.arch.endian()) {
.Big => 1,
.Little => 0,
};
const high = 1 - low;
const hi = 1 - lo;
pub fn udivmod(comptime DoubleInt: type, a: DoubleInt, b: DoubleInt, maybe_rem: ?*DoubleInt) DoubleInt {
// Let _u1 and _u0 be the high and low limbs of U respectively.
// Returns U / v_ and sets r = U % v_.
fn divwide_generic(comptime T: type, _u1: T, _u0: T, v_: T, r: *T) T {
const HalfT = HalveInt(T, false).HalfT;
@setRuntimeSafety(is_test);
var v = v_;
const double_int_bits = @typeInfo(DoubleInt).Int.bits;
const single_int_bits = @divExact(double_int_bits, 2);
const SingleInt = std.meta.Int(.unsigned, single_int_bits);
const SignedDoubleInt = std.meta.Int(.signed, double_int_bits);
const Log2SingleInt = std.math.Log2Int(SingleInt);
const b = @as(T, 1) << (@bitSizeOf(T) / 2);
var un64: T = undefined;
var un10: T = undefined;
const n = @bitCast([2]SingleInt, a);
const d = @bitCast([2]SingleInt, b);
var q: [2]SingleInt = undefined;
var r: [2]SingleInt = undefined;
var sr: c_uint = undefined;
// special cases, X is unknown, K != 0
if (n[high] == 0) {
if (d[high] == 0) {
// 0 X
// ---
// 0 X
if (maybe_rem) |rem| {
rem.* = n[low] % d[low];
}
return n[low] / d[low];
}
// 0 X
// ---
// K X
const s = @intCast(Log2Int(T), @clz(v));
if (s > 0) {
// Normalize divisor
v <<= s;
un64 = (_u1 << s) | (_u0 >> @intCast(Log2Int(T), (@bitSizeOf(T) - @intCast(T, s))));
un10 = _u0 << s;
} else {
// Avoid undefined behavior of (u0 >> @bitSizeOf(T))
un64 = _u1;
un10 = _u0;
}
// Break divisor up into two 32-bit digits
const vn1 = v >> (@bitSizeOf(T) / 2);
const vn0 = v & std.math.maxInt(HalfT);
// Break right half of dividend into two digits
const un1 = un10 >> (@bitSizeOf(T) / 2);
const un0 = un10 & std.math.maxInt(HalfT);
// Compute the first quotient digit, q1
var q1 = un64 / vn1;
var rhat = un64 -% q1 *% vn1;
// q1 has at most error 2. No more than 2 iterations
while (q1 >= b or q1 * vn0 > b * rhat + un1) {
q1 -= 1;
rhat += vn1;
if (rhat >= b) break;
}
var un21 = un64 *% b +% un1 -% q1 *% v;
// Compute the second quotient digit
var q0 = un21 / vn1;
rhat = un21 -% q0 *% vn1;
// q0 has at most error 2. No more than 2 iterations.
while (q0 >= b or q0 * vn0 > b * rhat + un0) {
q0 -= 1;
rhat += vn1;
if (rhat >= b) break;
}
r.* = (un21 *% b +% un0 -% q0 *% v) >> s;
return q1 *% b +% q0;
}
fn divwide(comptime T: type, _u1: T, _u0: T, v: T, r: *T) T {
@setRuntimeSafety(is_test);
if (T == u64 and builtin.target.cpu.arch == .x86_64 and builtin.target.os.tag != .windows) {
var rem: T = undefined;
const quo = asm (
\\divq %[v]
: [_] "={rax}" (-> T),
[_] "={rdx}" (rem),
: [v] "r" (v),
[_] "{rax}" (_u0),
[_] "{rdx}" (_u1),
);
r.* = rem;
return quo;
} else {
return divwide_generic(T, _u1, _u0, v, r);
}
}
// Returns a_ / b_ and sets maybe_rem = a_ % b.
pub fn udivmod(comptime T: type, a_: T, b_: T, maybe_rem: ?*T) T {
@setRuntimeSafety(is_test);
const HalfT = HalveInt(T, false).HalfT;
const SignedT = std.meta.Int(.signed, @bitSizeOf(T));
if (b_ > a_) {
if (maybe_rem) |rem| {
rem.* = n[low];
rem.* = a_;
}
return 0;
}
// n[high] != 0
if (d[low] == 0) {
if (d[high] == 0) {
// K X
// ---
// 0 0
if (maybe_rem) |rem| {
rem.* = n[high] % d[low];
}
return n[high] / d[low];
}
// d[high] != 0
if (n[low] == 0) {
// K 0
// ---
// K 0
if (maybe_rem) |rem| {
r[high] = n[high] % d[high];
r[low] = 0;
rem.* = @bitCast(DoubleInt, r);
}
return n[high] / d[high];
}
// K K
// ---
// K 0
if ((d[high] & (d[high] - 1)) == 0) {
// d is a power of 2
if (maybe_rem) |rem| {
r[low] = n[low];
r[high] = n[high] & (d[high] - 1);
rem.* = @bitCast(DoubleInt, r);
}
return n[high] >> @intCast(Log2SingleInt, @ctz(d[high]));
}
// K K
// ---
// K 0
sr = @bitCast(c_uint, @as(c_int, @clz(d[high])) - @as(c_int, @clz(n[high])));
// 0 <= sr <= single_int_bits - 2 or sr large
if (sr > single_int_bits - 2) {
if (maybe_rem) |rem| {
rem.* = a;
}
return 0;
}
sr += 1;
// 1 <= sr <= single_int_bits - 1
// q.all = a << (double_int_bits - sr);
q[low] = 0;
q[high] = n[low] << @intCast(Log2SingleInt, single_int_bits - sr);
// r.all = a >> sr;
r[high] = n[high] >> @intCast(Log2SingleInt, sr);
r[low] = (n[high] << @intCast(Log2SingleInt, single_int_bits - sr)) | (n[low] >> @intCast(Log2SingleInt, sr));
} else {
// d[low] != 0
if (d[high] == 0) {
// K X
// ---
// 0 K
if ((d[low] & (d[low] - 1)) == 0) {
// d is a power of 2
if (maybe_rem) |rem| {
rem.* = n[low] & (d[low] - 1);
}
if (d[low] == 1) {
return a;
}
sr = @ctz(d[low]);
q[high] = n[high] >> @intCast(Log2SingleInt, sr);
q[low] = (n[high] << @intCast(Log2SingleInt, single_int_bits - sr)) | (n[low] >> @intCast(Log2SingleInt, sr));
return @bitCast(DoubleInt, q);
}
// K X
// ---
// 0 K
sr = 1 + single_int_bits + @as(c_uint, @clz(d[low])) - @as(c_uint, @clz(n[high]));
// 2 <= sr <= double_int_bits - 1
// q.all = a << (double_int_bits - sr);
// r.all = a >> sr;
if (sr == single_int_bits) {
q[low] = 0;
q[high] = n[low];
r[high] = 0;
r[low] = n[high];
} else if (sr < single_int_bits) {
// 2 <= sr <= single_int_bits - 1
q[low] = 0;
q[high] = n[low] << @intCast(Log2SingleInt, single_int_bits - sr);
r[high] = n[high] >> @intCast(Log2SingleInt, sr);
r[low] = (n[high] << @intCast(Log2SingleInt, single_int_bits - sr)) | (n[low] >> @intCast(Log2SingleInt, sr));
} else {
// single_int_bits + 1 <= sr <= double_int_bits - 1
q[low] = n[low] << @intCast(Log2SingleInt, double_int_bits - sr);
q[high] = (n[high] << @intCast(Log2SingleInt, double_int_bits - sr)) | (n[low] >> @intCast(Log2SingleInt, sr - single_int_bits));
r[high] = 0;
r[low] = n[high] >> @intCast(Log2SingleInt, sr - single_int_bits);
}
var a = @bitCast([2]HalfT, a_);
var b = @bitCast([2]HalfT, b_);
var q: [2]HalfT = undefined;
var r: [2]HalfT = undefined;
// When the divisor fits in 64 bits, we can use an optimized path
if (b[hi] == 0) {
r[hi] = 0;
if (a[hi] < b[lo]) {
// The result fits in 64 bits
q[hi] = 0;
q[lo] = divwide(HalfT, a[hi], a[lo], b[lo], &r[lo]);
} else {
// K X
// ---
// K K
sr = @bitCast(c_uint, @as(c_int, @clz(d[high])) - @as(c_int, @clz(n[high])));
// 0 <= sr <= single_int_bits - 1 or sr large
if (sr > single_int_bits - 1) {
if (maybe_rem) |rem| {
rem.* = a;
}
return 0;
}
sr += 1;
// 1 <= sr <= single_int_bits
// q.all = a << (double_int_bits - sr);
// r.all = a >> sr;
q[low] = 0;
if (sr == single_int_bits) {
q[high] = n[low];
r[high] = 0;
r[low] = n[high];
} else {
r[high] = n[high] >> @intCast(Log2SingleInt, sr);
r[low] = (n[high] << @intCast(Log2SingleInt, single_int_bits - sr)) | (n[low] >> @intCast(Log2SingleInt, sr));
q[high] = n[low] << @intCast(Log2SingleInt, single_int_bits - sr);
}
// First, divide with the high part to get the remainder. After that a_hi < b_lo.
q[hi] = a[hi] / b[lo];
q[lo] = divwide(HalfT, a[hi] % b[lo], a[lo], b[lo], &r[lo]);
}
if (maybe_rem) |rem| {
rem.* = @bitCast(T, r);
}
return @bitCast(T, q);
}
// Not a special case
// q and r are initialized with:
// q.all = a << (double_int_bits - sr);
// r.all = a >> sr;
// 1 <= sr <= double_int_bits - 1
var carry: u32 = 0;
var r_all: DoubleInt = undefined;
while (sr > 0) : (sr -= 1) {
// r:q = ((r:q) << 1) | carry
r[high] = (r[high] << 1) | (r[low] >> (single_int_bits - 1));
r[low] = (r[low] << 1) | (q[high] >> (single_int_bits - 1));
q[high] = (q[high] << 1) | (q[low] >> (single_int_bits - 1));
q[low] = (q[low] << 1) | carry;
// carry = 0;
// if (r.all >= b)
// {
// r.all -= b;
// carry = 1;
// 0 <= shift <= 63
var shift: Log2Int(T) = @clz(b[hi]) - @clz(a[hi]);
var af = @bitCast(T, a);
var bf = @bitCast(T, b) << shift;
q = @bitCast([2]HalfT, @as(T, 0));
for (0..shift + 1) |_| {
q[lo] <<= 1;
// Branchless version of:
// if (af >= bf) {
// af -= bf;
// q[lo] |= 1;
// }
r_all = @bitCast(DoubleInt, r);
const s: SignedDoubleInt = @bitCast(SignedDoubleInt, b -% r_all -% 1) >> (double_int_bits - 1);
carry = @intCast(u32, s & 1);
r_all -= b & @bitCast(DoubleInt, s);
r = @bitCast([2]SingleInt, r_all);
const s = @bitCast(SignedT, bf -% af -% 1) >> (@bitSizeOf(T) - 1);
q[lo] |= @intCast(HalfT, s & 1);
af -= bf & @bitCast(T, s);
bf >>= 1;
}
const q_all = (@bitCast(DoubleInt, q) << 1) | carry;
if (maybe_rem) |rem| {
rem.* = r_all;
rem.* = @bitCast(T, af);
}
return q_all;
return @bitCast(T, q);
}

View File

@@ -875,7 +875,7 @@
<div class="help-modal">
<div class="modal">
<h1>Keyboard Shortcuts</h1>
<dl><dt><kbd>?</kbd></dt><dd>Show this help modal</dd></dl>
<dl><dt><kbd>?</kbd></dt><dd>Toggle this help modal</dd></dl>
<dl><dt><kbd>s</kbd> or <kbd>/</kbd></dt><dd>Focus the search field</dd></dl>
<div style="margin-left: 1em">
<dl><dt><kbd></kbd></dt><dd>Move up in search results</dd></dl>

View File

@@ -127,16 +127,21 @@ const NAV_MODES = {
window.guideSearch = guidesSearchIndex;
parseGuides();
// identifiers can contain '?' so we want to allow typing
// the question mark when the search is focused instead of toggling the help modal
let canToggleHelpModal = true;
domSearch.disabled = false;
domSearch.addEventListener("keydown", onSearchKeyDown, false);
domSearch.addEventListener("input", onSearchInput, false);
domSearch.addEventListener("focus", ev => {
domSearchPlaceholder.classList.add("hidden");
canToggleHelpModal = false;
});
domSearch.addEventListener("blur", ev => {
if (domSearch.value.length == 0)
domSearchPlaceholder.classList.remove("hidden");
canToggleHelpModal = true;
});
domSectSearchAllResultsLink.addEventListener('click', onClickSearchShowAllResults, false);
function onClickSearchShowAllResults(ev) {
@@ -552,7 +557,7 @@ const NAV_MODES = {
let rootMod = zigAnalysis.modules[zigAnalysis.rootMod];
let mod = rootMod;
curNav.modObjs = [mod];
for (let i = 1; i < curNav.modNames.length; i += 1) {
for (let i = 0; i < curNav.modNames.length; i += 1) {
let childMod = zigAnalysis.modules[mod.table[curNav.modNames[i]]];
if (childMod == null) {
return render404();
@@ -567,7 +572,7 @@ const NAV_MODES = {
for (let i = 0; i < curNav.declNames.length; i += 1) {
let childDecl = findSubDecl(currentType, curNav.declNames[i]);
window.last_decl = childDecl;
if (childDecl == null) {
if (childDecl == null || childDecl.is_private === true) {
return render404();
}
lastDecl = childDecl;
@@ -649,16 +654,16 @@ const NAV_MODES = {
let lines = code.split("\n");
let result = "";
let indent_level = 0;
for(let i = 0; i < lines.length; i += 1) {
for (let i = 0; i < lines.length; i += 1) {
let line = lines[i].trim();
if(line[0] == "}") indent_level -= 1;
for(let j = 0; j < indent_level; j += 1) {
if (line[0] == "}") indent_level -= 1;
for (let j = 0; j < indent_level; j += 1) {
result += " ";
}
if (line.startsWith("\\\\")) result += " "
result += line;
result += "\n";
if(line[line.length - 1] == "{") indent_level += 1;
if (i != lines.length - 1) result += "\n";
if (line[line.length - 1] == "{") indent_level += 1;
}
return result;
}
@@ -990,9 +995,15 @@ const NAV_MODES = {
return navLink(curNav.modNames, declPath);
}
if (findSubDecl(curDecl, declName) != null) {
const declPath = curNav.declNames.slice(0, i).concat([declName]);
return navLink(curNav.modNames, declPath);
const subDecl = findSubDecl(curDecl, declName);
if (subDecl != null) {
if (subDecl.is_private === true) {
return sourceFileLink(subDecl);
} else {
const declPath = curNav.declNames.slice(0, i).concat([declName]);
return navLink(curNav.modNames, declPath);
}
}
}
@@ -1093,6 +1104,23 @@ const NAV_MODES = {
payloadHtml += decl + "[" + start + ".." + end + sentinel + "]";
return payloadHtml;
}
case "sliceLength": {
let payloadHtml = "";
const lhsExpr = zigAnalysis.exprs[expr.sliceLength.lhs];
const startExpr = zigAnalysis.exprs[expr.sliceLength.start];
const lenExpr = zigAnalysis.exprs[expr.sliceLength.len];
let decl = exprName(lhsExpr, opts);
let start = exprName(startExpr, opts);
let len = exprName(lenExpr, opts);
let sentinel = "";
if (expr.sliceLength["sentinel"]) {
const sentinelExpr = zigAnalysis.exprs[expr.sliceLength.sentinel];
let sentinel_ = exprName(sentinelExpr, options);
sentinel += " :" + sentinel_;
}
payloadHtml += decl + "[" + start + "..][0.." + len + sentinel + "]";
return payloadHtml;
}
case "sliceIndex": {
const sliceIndex = zigAnalysis.exprs[expr.sliceIndex];
return exprName(sliceIndex, opts, opts);
@@ -1730,7 +1758,7 @@ const NAV_MODES = {
return payloadHtml + "}";
}
case "comptimeExpr": {
return zigAnalysis.comptimeExprs[expr.comptimeExpr].code;
return renderZigSource(zigAnalysis.comptimeExprs[expr.comptimeExpr].code);
}
case "call": {
let call = zigAnalysis.calls[expr.call];
@@ -1844,19 +1872,28 @@ const NAV_MODES = {
case typeKinds.Struct: {
let structObj = typeObj;
let name = "";
if (opts.wantHtml) {
if (structObj.is_tuple) {
name = "<span class='tok-kw'>tuple</span> { ";
} else {
name = "<span class='tok-kw'>struct</span> { ";
}
} else {
if (structObj.is_tuple) {
name = "tuple { ";
} else {
name = "struct { ";
let layout = "";
if (structObj.layout !== null) {
switch (structObj.layout.enumLiteral) {
case "Packed": {
layout = "packed ";
break;
}
case "Extern": {
layout = "extern ";
break;
}
}
}
if (opts.wantHtml) {
name = "<span class='tok-kw'>" + layout + "struct</span>";
} else {
name = layout + "struct";
}
if (structObj.backing_int !== null) {
name += "(" + exprName(structObj.backing_int, opts) + ")";
}
name += " { ";
if (structObj.field_types.length > 1 && opts.wantHtml) { name += "</br>"; }
let indent = "";
if (structObj.field_types.length > 1 && opts.wantHtml) {
@@ -1911,7 +1948,7 @@ const NAV_MODES = {
name = "enum";
}
if (enumObj.tag) {
name += " (" + exprName(enumObj.tag, opts) + ")";
name += "(" + exprName(enumObj.tag, opts) + ")";
}
name += " { ";
let enumNode = getAstNode(enumObj.src);
@@ -1962,16 +1999,29 @@ const NAV_MODES = {
case typeKinds.Union: {
let unionObj = typeObj;
let name = "";
let layout = "";
if (unionObj.layout !== null) {
switch (unionObj.layout.enumLiteral) {
case "Packed": {
layout = "packed ";
break;
}
case "Extern": {
layout = "extern ";
break;
}
}
}
if (opts.wantHtml) {
name = "<span class='tok-kw'>union</span>";
name = "<span class='tok-kw'>" + layout + "union</span>";
} else {
name = "union";
name = layout + "union";
}
if (unionObj.auto_tag) {
if (opts.wantHtml) {
name += " (<span class='tok-kw'>enum</span>";
name += "(<span class='tok-kw'>enum</span>";
} else {
name += " (enum";
name += "(enum";
}
if (unionObj.tag) {
name += "(" + exprName(unionObj.tag, opts) + "))";
@@ -1979,14 +2029,14 @@ const NAV_MODES = {
name += ")";
}
} else if (unionObj.tag) {
name += " (" + exprName(unionObj.tag, opts) + ")";
name += "(" + exprName(unionObj.tag, opts) + ")";
}
name += " { ";
if (unionObj.fields.length > 1 && opts.wantHtml) {
if (unionObj.field_types.length > 1 && opts.wantHtml) {
name += "</br>";
}
let indent = "";
if (unionObj.fields.length > 1 && opts.wantHtml) {
if (unionObj.field_types.length > 1 && opts.wantHtml) {
indent = "&nbsp;&nbsp;&nbsp;&nbsp;"
}
if (opts.indent) {
@@ -1994,17 +2044,17 @@ const NAV_MODES = {
}
let unionNode = getAstNode(unionObj.src);
let field_end = ",";
if (unionObj.fields.length > 1 && opts.wantHtml) {
if (unionObj.field_types.length > 1 && opts.wantHtml) {
field_end += "</br>";
} else {
field_end += " ";
}
for (let i = 0; i < unionObj.fields.length; i += 1) {
for (let i = 0; i < unionObj.field_types.length; i += 1) {
let fieldNode = getAstNode(unionNode.fields[i]);
let fieldName = fieldNode.name;
let html = indent + escapeHtml(fieldName);
let fieldTypeExpr = unionObj.fields[i];
let fieldTypeExpr = unionObj.field_types[i];
html += ": ";
html += exprName(fieldTypeExpr, { ...opts, indent: indent });
@@ -2571,13 +2621,17 @@ const NAV_MODES = {
} else if (
resolvedValue.expr.string !== undefined ||
resolvedValue.expr.call !== undefined ||
resolvedValue.expr.comptimeExpr
resolvedValue.expr.comptimeExpr !== undefined
) {
let typeRef = null;
if (resolvedValue.typeRef !== undefined) {
typeRef = resolvedValue.typeRef;
}
domFnProtoCode.innerHTML =
'<span class="tok-kw">const</span> ' +
escapeHtml(decl.name) +
": " +
exprName(resolvedValue.expr, { wantHtml: true, wantLink: true }) +
exprName(typeRef !== null ? typeRef : resolvedValue.expr, { wantHtml: true, wantLink: true }) +
" = " +
exprName(decl.value.expr, { wantHtml: true, wantLink: true }) +
";";
@@ -2628,13 +2682,13 @@ const NAV_MODES = {
} else if (
resolvedVar.expr.string !== undefined ||
resolvedVar.expr.call !== undefined ||
resolvedVar.expr.comptimeExpr
resolvedVar.expr.comptimeExpr !== undefined
) {
domFnProtoCode.innerHTML =
'<span class="tok-kw">var</span> ' +
escapeHtml(decl.name) +
": " +
exprName(resolvedVar.expr, { wantHtml: true, wantLink: true }) +
exprName(resolvedVar.typeRef !== null ? resolvedVar.typeRef : resolvedVar.expr, { wantHtml: true, wantLink: true }) +
" = " +
exprName(decl.value.expr, { wantHtml: true, wantLink: true }) +
";";
@@ -3274,6 +3328,25 @@ const NAV_MODES = {
}
}
if (parentType.privDecls) {
for (let i = 0; i < parentType.privDecls.length; i += 1) {
let declIndex = parentType.privDecls[i];
let childDecl = getDecl(declIndex);
if (childDecl.name === childName) {
childDecl.find_subdecl_idx = declIndex;
childDecl.is_private = true;
return childDecl;
} else if (childDecl.is_uns) {
let declValue = resolveValue(childDecl.value);
if (!("type" in declValue.expr)) continue;
let uns_container = getType(declValue.expr.type);
let uns_res = findSubDecl(uns_container, childName);
uns_res.is_private = true;
if (uns_res !== null) return uns_res;
}
}
}
return null;
}
@@ -3966,15 +4039,17 @@ function addDeclToSearchResults(decl, declIndex, modNames, item, list, stack) {
ev.stopPropagation();
return;
default:
if (ev.shiftKey || ev.ctrlKey || ev.altKey) return;
curSearchIndex = -1;
// Search is triggered via an `input` event handler, not on arbitrary `keydown` events.
ev.stopPropagation();
startAsyncSearch();
return;
}
}
function onSearchInput(ev) {
curSearchIndex = -1;
startAsyncSearch();
}
function moveSearchCursor(dir) {
if (
curSearchIndex < 0 ||
@@ -4045,9 +4120,16 @@ function addDeclToSearchResults(decl, declIndex, modNames, item, list, stack) {
}
break;
case "?":
ev.preventDefault();
ev.stopPropagation();
showHelpModal();
if (!canToggleHelpModal) break;
// toggle the help modal
if (!domHelpModal.classList.contains("hidden")) {
onEscape(ev);
} else {
ev.preventDefault();
ev.stopPropagation();
showHelpModal();
}
break;
}
}
@@ -4495,9 +4577,11 @@ function addDeclToSearchResults(decl, declIndex, modNames, item, list, stack) {
pubDecls: ty[4],
field_types: ty[5],
field_defaults: ty[6],
is_tuple: ty[7],
line_number: ty[8],
parent_container: ty[9],
backing_int: ty[7],
is_tuple: ty[8],
line_number: ty[9],
parent_container: ty[10],
layout: ty[11],
};
case 10: // ComptimeExpr
case 11: // ComptimeFloat
@@ -4551,6 +4635,7 @@ function addDeclToSearchResults(decl, declIndex, modNames, item, list, stack) {
tag: ty[6],
auto_tag: ty[7],
parent_container: ty[8],
layout: ty[9],
};
case 21: // Fn
return {
@@ -4851,4 +4936,4 @@ function RadixTree() {
// BUT!
// We want to be able to search "Hash", for example!
// We want to be able to search "Hash", for example!

View File

@@ -29,7 +29,7 @@ pub fn build(b: *std.Build) void {
// step when running `zig build`).
b.installArtifact(exe);
// This *creates* a RunStep in the build graph, to be executed when another
// This *creates* a Run step in the build graph, to be executed when another
// step is evaluated that depends on it. The next line below will establish
// such a dependency.
const run_cmd = b.addRunArtifact(exe);

View File

@@ -6,3 +6,4 @@ need to be cherry-picked in the future glibc header upgrades:
- 39083c31a550ed80f369f60d35791e98904b8096
- a89813ef282c092a9caf699731c7faaf485acabe
- 3eaca9bbc6fee4b6be0f22b844f7d3214222f434

View File

@@ -19,6 +19,9 @@
/*
* HWCAP flags - for AT_HWCAP
*
* Bits 62 and 63 are reserved for use by libc.
* Bits 32-61 are unallocated for potential use by libc.
*/
#define HWCAP_FP (1 << 0)
#define HWCAP_ASIMD (1 << 1)
@@ -76,5 +79,28 @@
#define HWCAP2_BTI (1 << 17)
#define HWCAP2_MTE (1 << 18)
#define HWCAP2_ECV (1 << 19)
#define HWCAP2_AFP (1 << 20)
#define HWCAP2_RPRES (1 << 21)
#define HWCAP2_MTE3 (1 << 22)
#define HWCAP2_SME (1 << 23)
#define HWCAP2_SME_I16I64 (1 << 24)
#define HWCAP2_SME_F64F64 (1 << 25)
#define HWCAP2_SME_I8I32 (1 << 26)
#define HWCAP2_SME_F16F32 (1 << 27)
#define HWCAP2_SME_B16F32 (1 << 28)
#define HWCAP2_SME_F32F32 (1 << 29)
#define HWCAP2_SME_FA64 (1 << 30)
#define HWCAP2_WFXT (1UL << 31)
#define HWCAP2_EBF16 (1UL << 32)
#define HWCAP2_SVE_EBF16 (1UL << 33)
#define HWCAP2_CSSC (1UL << 34)
#define HWCAP2_RPRFM (1UL << 35)
#define HWCAP2_SVE2P1 (1UL << 36)
#define HWCAP2_SME2 (1UL << 37)
#define HWCAP2_SME2P1 (1UL << 38)
#define HWCAP2_SME_I16I32 (1UL << 39)
#define HWCAP2_SME_BI32I32 (1UL << 40)
#define HWCAP2_SME_B16B16 (1UL << 41)
#define HWCAP2_SME_F16F16 (1UL << 42)
#endif /* __ASM_HWCAP_H */

View File

@@ -43,6 +43,7 @@
#define __KVM_HAVE_VCPU_EVENTS
#define KVM_COALESCED_MMIO_PAGE_OFFSET 1
#define KVM_DIRTY_LOG_PAGE_OFFSET 64
#define KVM_REG_SIZE(id) \
(1U << (((id) & KVM_REG_SIZE_MASK) >> KVM_REG_SIZE_SHIFT))
@@ -75,9 +76,11 @@ struct kvm_regs {
/* KVM_ARM_SET_DEVICE_ADDR ioctl id encoding */
#define KVM_ARM_DEVICE_TYPE_SHIFT 0
#define KVM_ARM_DEVICE_TYPE_MASK (0xffff << KVM_ARM_DEVICE_TYPE_SHIFT)
#define KVM_ARM_DEVICE_TYPE_MASK GENMASK(KVM_ARM_DEVICE_TYPE_SHIFT + 15, \
KVM_ARM_DEVICE_TYPE_SHIFT)
#define KVM_ARM_DEVICE_ID_SHIFT 16
#define KVM_ARM_DEVICE_ID_MASK (0xffff << KVM_ARM_DEVICE_ID_SHIFT)
#define KVM_ARM_DEVICE_ID_MASK GENMASK(KVM_ARM_DEVICE_ID_SHIFT + 15, \
KVM_ARM_DEVICE_ID_SHIFT)
/* Supported device IDs */
#define KVM_ARM_DEVICE_VGIC_V2 0
@@ -106,6 +109,7 @@ struct kvm_regs {
#define KVM_ARM_VCPU_SVE 4 /* enable SVE for this CPU */
#define KVM_ARM_VCPU_PTRAUTH_ADDRESS 5 /* VCPU uses address authentication */
#define KVM_ARM_VCPU_PTRAUTH_GENERIC 6 /* VCPU uses generic authentication */
#define KVM_ARM_VCPU_HAS_EL2 7 /* Support nested virtualization */
struct kvm_vcpu_init {
__u32 target;
@@ -139,8 +143,10 @@ struct kvm_guest_debug_arch {
__u64 dbg_wvr[KVM_ARM_MAX_DBG_REGS];
};
#define KVM_DEBUG_ARCH_HSR_HIGH_VALID (1 << 0)
struct kvm_debug_exit_arch {
__u32 hsr;
__u32 hsr_high; /* ESR_EL2[61:32] */
__u64 far; /* used for watchpoints */
};
@@ -281,6 +287,11 @@ struct kvm_arm_copy_mte_tags {
#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_REQUIRED 3
#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_ENABLED (1U << 4)
#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3 KVM_REG_ARM_FW_REG(3)
#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3_NOT_AVAIL 0
#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3_AVAIL 1
#define KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3_NOT_REQUIRED 2
/* SVE registers */
#define KVM_REG_ARM64_SVE (0x15 << KVM_REG_ARM_COPROC_SHIFT)
@@ -327,6 +338,31 @@ struct kvm_arm_copy_mte_tags {
#define KVM_ARM64_SVE_VLS_WORDS \
((KVM_ARM64_SVE_VQ_MAX - KVM_ARM64_SVE_VQ_MIN) / 64 + 1)
/* Bitmap feature firmware registers */
#define KVM_REG_ARM_FW_FEAT_BMAP (0x0016 << KVM_REG_ARM_COPROC_SHIFT)
#define KVM_REG_ARM_FW_FEAT_BMAP_REG(r) (KVM_REG_ARM64 | KVM_REG_SIZE_U64 | \
KVM_REG_ARM_FW_FEAT_BMAP | \
((r) & 0xffff))
#define KVM_REG_ARM_STD_BMAP KVM_REG_ARM_FW_FEAT_BMAP_REG(0)
enum {
KVM_REG_ARM_STD_BIT_TRNG_V1_0 = 0,
};
#define KVM_REG_ARM_STD_HYP_BMAP KVM_REG_ARM_FW_FEAT_BMAP_REG(1)
enum {
KVM_REG_ARM_STD_HYP_BIT_PV_TIME = 0,
};
#define KVM_REG_ARM_VENDOR_HYP_BMAP KVM_REG_ARM_FW_FEAT_BMAP_REG(2)
enum {
KVM_REG_ARM_VENDOR_HYP_BIT_FUNC_FEAT = 0,
KVM_REG_ARM_VENDOR_HYP_BIT_PTP = 1,
};
/* Device Control API: ARM VGIC */
#define KVM_DEV_ARM_VGIC_GRP_ADDR 0
#define KVM_DEV_ARM_VGIC_GRP_DIST_REGS 1
@@ -362,6 +398,7 @@ struct kvm_arm_copy_mte_tags {
#define KVM_ARM_VCPU_PMU_V3_IRQ 0
#define KVM_ARM_VCPU_PMU_V3_INIT 1
#define KVM_ARM_VCPU_PMU_V3_FILTER 2
#define KVM_ARM_VCPU_PMU_V3_SET_PMU 3
#define KVM_ARM_VCPU_TIMER_CTRL 1
#define KVM_ARM_VCPU_TIMER_IRQ_VTIMER 0
#define KVM_ARM_VCPU_TIMER_IRQ_PTIMER 1
@@ -411,6 +448,16 @@ struct kvm_arm_copy_mte_tags {
#define KVM_PSCI_RET_INVAL PSCI_RET_INVALID_PARAMS
#define KVM_PSCI_RET_DENIED PSCI_RET_DENIED
/* arm64-specific kvm_run::system_event flags */
/*
* Reset caused by a PSCI v1.1 SYSTEM_RESET2 call.
* Valid only when the system event has a type of KVM_SYSTEM_EVENT_RESET.
*/
#define KVM_SYSTEM_EVENT_RESET_FLAG_PSCI_RESET2 (1ULL << 0)
/* run->fail_entry.hardware_entry_failure_reason codes. */
#define KVM_EXIT_FAIL_ENTRY_CPU_UNSUPPORTED (1ULL << 0)
#endif
#endif /* __ARM_KVM_H__ */

View File

@@ -37,5 +37,12 @@ enum perf_event_arm_regs {
PERF_REG_ARM64_SP,
PERF_REG_ARM64_PC,
PERF_REG_ARM64_MAX,
/* Extended/pseudo registers */
PERF_REG_ARM64_VG = 46, /* SVE Vector Granule */
PERF_REG_ARM64_EXTENDED_MAX
};
#define PERF_REG_EXTENDED_MASK (1ULL << PERF_REG_ARM64_VG)
#endif /* _ASM_ARM64_PERF_REGS_H */

View File

@@ -109,7 +109,7 @@ struct user_hwdebug_state {
} dbg_regs[16];
};
/* SVE/FP/SIMD state (NT_ARM_SVE) */
/* SVE/FP/SIMD state (NT_ARM_SVE & NT_ARM_SSVE) */
struct user_sve_header {
__u32 size; /* total meaningful regset content in bytes */
@@ -220,6 +220,7 @@ struct user_sve_header {
(SVE_PT_SVE_PREG_OFFSET(vq, __SVE_NUM_PREGS) - \
SVE_PT_SVE_PREGS_OFFSET(vq))
/* For streaming mode SVE (SSVE) FFR must be read and written as zero */
#define SVE_PT_SVE_FFR_OFFSET(vq) \
(SVE_PT_REGS_OFFSET + __SVE_FFR_OFFSET(vq))
@@ -240,10 +241,12 @@ struct user_sve_header {
- SVE_PT_SVE_OFFSET + (__SVE_VQ_BYTES - 1)) \
/ __SVE_VQ_BYTES * __SVE_VQ_BYTES)
#define SVE_PT_SIZE(vq, flags) \
(((flags) & SVE_PT_REGS_MASK) == SVE_PT_REGS_SVE ? \
SVE_PT_SVE_OFFSET + SVE_PT_SVE_SIZE(vq, flags) \
: SVE_PT_FPSIMD_OFFSET + SVE_PT_FPSIMD_SIZE(vq, flags))
#define SVE_PT_SIZE(vq, flags) \
(((flags) & SVE_PT_REGS_MASK) == SVE_PT_REGS_SVE ? \
SVE_PT_SVE_OFFSET + SVE_PT_SVE_SIZE(vq, flags) \
: ((((flags) & SVE_PT_REGS_MASK) == SVE_PT_REGS_FPSIMD ? \
SVE_PT_FPSIMD_OFFSET + SVE_PT_FPSIMD_SIZE(vq, flags) \
: SVE_PT_REGS_OFFSET)))
/* pointer authentication masks (NT_ARM_PAC_MASK) */
@@ -265,6 +268,62 @@ struct user_pac_generic_keys {
__uint128_t apgakey;
};
/* ZA state (NT_ARM_ZA) */
struct user_za_header {
__u32 size; /* total meaningful regset content in bytes */
__u32 max_size; /* maxmium possible size for this thread */
__u16 vl; /* current vector length */
__u16 max_vl; /* maximum possible vector length */
__u16 flags;
__u16 __reserved;
};
/*
* Common ZA_PT_* flags:
* These must be kept in sync with prctl interface in <linux/prctl.h>
*/
#define ZA_PT_VL_INHERIT ((1 << 17) /* PR_SME_VL_INHERIT */ >> 16)
#define ZA_PT_VL_ONEXEC ((1 << 18) /* PR_SME_SET_VL_ONEXEC */ >> 16)
/*
* The remainder of the ZA state follows struct user_za_header. The
* total size of the ZA state (including header) depends on the
* metadata in the header: ZA_PT_SIZE(vq, flags) gives the total size
* of the state in bytes, including the header.
*
* Refer to <asm/sigcontext.h> for details of how to pass the correct
* "vq" argument to these macros.
*/
/* Offset from the start of struct user_za_header to the register data */
#define ZA_PT_ZA_OFFSET \
((sizeof(struct user_za_header) + (__SVE_VQ_BYTES - 1)) \
/ __SVE_VQ_BYTES * __SVE_VQ_BYTES)
/*
* The payload starts at offset ZA_PT_ZA_OFFSET, and is of size
* ZA_PT_ZA_SIZE(vq, flags).
*
* The ZA array is stored as a sequence of horizontal vectors ZAV of SVL/8
* bytes each, starting from vector 0.
*
* Additional data might be appended in the future.
*
* The ZA matrix is represented in memory in an endianness-invariant layout
* which differs from the layout used for the FPSIMD V-registers on big-endian
* systems: see sigcontext.h for more explanation.
*/
#define ZA_PT_ZAV_OFFSET(vq, n) \
(ZA_PT_ZA_OFFSET + ((vq * __SVE_VQ_BYTES) * n))
#define ZA_PT_ZA_SIZE(vq) ((vq * __SVE_VQ_BYTES) * (vq * __SVE_VQ_BYTES))
#define ZA_PT_SIZE(vq) \
(ZA_PT_ZA_OFFSET + ZA_PT_ZA_SIZE(vq))
#endif /* __ASSEMBLY__ */
#endif /* __ASM_PTRACE_H */

View File

@@ -62,6 +62,10 @@ struct sigcontext {
* context. Such structures must be placed after the rt_sigframe on the stack
* and be 16-byte aligned. The last structure must be a dummy one with the
* magic and size set to 0.
*
* Note that the values allocated for use as magic should be chosen to
* be meaningful in ASCII to aid manual parsing, ZA doesn't follow this
* convention due to oversight but it should be observed for future additions.
*/
struct _aarch64_ctx {
__u32 magic;
@@ -134,6 +138,33 @@ struct extra_context {
struct sve_context {
struct _aarch64_ctx head;
__u16 vl;
__u16 flags;
__u16 __reserved[2];
};
#define SVE_SIG_FLAG_SM 0x1 /* Context describes streaming mode */
/* TPIDR2_EL0 context */
#define TPIDR2_MAGIC 0x54504902
struct tpidr2_context {
struct _aarch64_ctx head;
__u64 tpidr2;
};
#define ZA_MAGIC 0x54366345
struct za_context {
struct _aarch64_ctx head;
__u16 vl;
__u16 __reserved[3];
};
#define ZT_MAGIC 0x5a544e01
struct zt_context {
struct _aarch64_ctx head;
__u16 nregs;
__u16 __reserved[3];
};
@@ -186,9 +217,16 @@ struct sve_context {
* sve_context.vl must equal the thread's current vector length when
* doing a sigreturn.
*
* On systems with support for SME the SVE register state may reflect either
* streaming or non-streaming mode. In streaming mode the streaming mode
* vector length will be used and the flag SVE_SIG_FLAG_SM will be set in
* the flags field. It is permitted to enter or leave streaming mode in
* a signal return, applications should take care to ensure that any difference
* in vector length between the two modes is handled, including any resizing
* and movement of context blocks.
*
* Note: for all these macros, the "vq" argument denotes the SVE
* vector length in quadwords (i.e., units of 128 bits).
* Note: for all these macros, the "vq" argument denotes the vector length
* in quadwords (i.e., units of 128 bits).
*
* The correct way to obtain vq is to use sve_vq_from_vl(vl). The
* result is valid if and only if sve_vl_valid(vl) is true. This is
@@ -249,4 +287,48 @@ struct sve_context {
#define SVE_SIG_CONTEXT_SIZE(vq) \
(SVE_SIG_REGS_OFFSET + SVE_SIG_REGS_SIZE(vq))
/*
* If the ZA register is enabled for the thread at signal delivery then,
* za_context.head.size >= ZA_SIG_CONTEXT_SIZE(sve_vq_from_vl(za_context.vl))
* and the register data may be accessed using the ZA_SIG_*() macros.
*
* If za_context.head.size < ZA_SIG_CONTEXT_SIZE(sve_vq_from_vl(za_context.vl))
* then ZA was not enabled and no register data was included in which case
* ZA register was not enabled for the thread and no register data
* the ZA_SIG_*() macros should not be used except for this check.
*
* The same convention applies when returning from a signal: a caller
* will need to remove or resize the za_context block if it wants to
* enable the ZA register when it was previously non-live or vice-versa.
* This may require the caller to allocate fresh memory and/or move other
* context blocks in the signal frame.
*
* Changing the vector length during signal return is not permitted:
* za_context.vl must equal the thread's current SME vector length when
* doing a sigreturn.
*/
#define ZA_SIG_REGS_OFFSET \
((sizeof(struct za_context) + (__SVE_VQ_BYTES - 1)) \
/ __SVE_VQ_BYTES * __SVE_VQ_BYTES)
#define ZA_SIG_REGS_SIZE(vq) ((vq * __SVE_VQ_BYTES) * (vq * __SVE_VQ_BYTES))
#define ZA_SIG_ZAV_OFFSET(vq, n) (ZA_SIG_REGS_OFFSET + \
(SVE_SIG_ZREG_SIZE(vq) * n))
#define ZA_SIG_CONTEXT_SIZE(vq) \
(ZA_SIG_REGS_OFFSET + ZA_SIG_REGS_SIZE(vq))
#define ZT_SIG_REG_SIZE 512
#define ZT_SIG_REG_BYTES (ZT_SIG_REG_SIZE / 8)
#define ZT_SIG_REGS_OFFSET sizeof(struct zt_context)
#define ZT_SIG_REGS_SIZE(n) (ZT_SIG_REG_BYTES * n)
#define ZT_SIG_CONTEXT_SIZE(n) \
(sizeof(struct zt_context) + ZT_SIG_REGS_SIZE(n))
#endif /* __ASM_SIGCONTEXT_H */

View File

@@ -91,7 +91,6 @@
/* a horrid kludge trying to make sure that this will fail on old kernels */
#define O_TMPFILE (__O_TMPFILE | O_DIRECTORY)
#define O_TMPFILE_MASK (__O_TMPFILE | O_DIRECTORY | O_CREAT)
#ifndef O_NDELAY
#define O_NDELAY O_NONBLOCK
@@ -116,13 +115,13 @@
#define F_GETSIG 11 /* for sockets. */
#endif
#ifndef CONFIG_64BIT
#if __BITS_PER_LONG == 32 || defined(__KERNEL__)
#ifndef F_GETLK64
#define F_GETLK64 12 /* using 'struct flock64' */
#define F_SETLK64 13
#define F_SETLKW64 14
#endif
#endif
#endif /* __BITS_PER_LONG == 32 || defined(__KERNEL__) */
#ifndef F_SETOWN_EX
#define F_SETOWN_EX 15
@@ -193,24 +192,19 @@ struct f_owner_ex {
#define F_LINUX_SPECIFIC_BASE 1024
#ifndef HAVE_ARCH_STRUCT_FLOCK
#ifndef __ARCH_FLOCK_PAD
#define __ARCH_FLOCK_PAD
#endif
struct flock {
short l_type;
short l_whence;
__kernel_off_t l_start;
__kernel_off_t l_len;
__kernel_pid_t l_pid;
#ifdef __ARCH_FLOCK_EXTRA_SYSID
__ARCH_FLOCK_EXTRA_SYSID
#endif
#ifdef __ARCH_FLOCK_PAD
__ARCH_FLOCK_PAD
#endif
};
#endif
#ifndef HAVE_ARCH_STRUCT_FLOCK64
#ifndef __ARCH_FLOCK64_PAD
#define __ARCH_FLOCK64_PAD
#endif
struct flock64 {
short l_type;
@@ -218,8 +212,10 @@ struct flock64 {
__kernel_loff_t l_start;
__kernel_loff_t l_len;
__kernel_pid_t l_pid;
#ifdef __ARCH_FLOCK64_PAD
__ARCH_FLOCK64_PAD
};
#endif
};
#endif /* HAVE_ARCH_STRUCT_FLOCK */
#endif /* _ASM_GENERIC_FCNTL_H */

View File

@@ -20,18 +20,18 @@
#define HUGETLB_FLAG_ENCODE_SHIFT 26
#define HUGETLB_FLAG_ENCODE_MASK 0x3f
#define HUGETLB_FLAG_ENCODE_16KB (14 << HUGETLB_FLAG_ENCODE_SHIFT)
#define HUGETLB_FLAG_ENCODE_64KB (16 << HUGETLB_FLAG_ENCODE_SHIFT)
#define HUGETLB_FLAG_ENCODE_512KB (19 << HUGETLB_FLAG_ENCODE_SHIFT)
#define HUGETLB_FLAG_ENCODE_1MB (20 << HUGETLB_FLAG_ENCODE_SHIFT)
#define HUGETLB_FLAG_ENCODE_2MB (21 << HUGETLB_FLAG_ENCODE_SHIFT)
#define HUGETLB_FLAG_ENCODE_8MB (23 << HUGETLB_FLAG_ENCODE_SHIFT)
#define HUGETLB_FLAG_ENCODE_16MB (24 << HUGETLB_FLAG_ENCODE_SHIFT)
#define HUGETLB_FLAG_ENCODE_32MB (25 << HUGETLB_FLAG_ENCODE_SHIFT)
#define HUGETLB_FLAG_ENCODE_256MB (28 << HUGETLB_FLAG_ENCODE_SHIFT)
#define HUGETLB_FLAG_ENCODE_512MB (29 << HUGETLB_FLAG_ENCODE_SHIFT)
#define HUGETLB_FLAG_ENCODE_1GB (30 << HUGETLB_FLAG_ENCODE_SHIFT)
#define HUGETLB_FLAG_ENCODE_2GB (31 << HUGETLB_FLAG_ENCODE_SHIFT)
#define HUGETLB_FLAG_ENCODE_16GB (34 << HUGETLB_FLAG_ENCODE_SHIFT)
#define HUGETLB_FLAG_ENCODE_16KB (14U << HUGETLB_FLAG_ENCODE_SHIFT)
#define HUGETLB_FLAG_ENCODE_64KB (16U << HUGETLB_FLAG_ENCODE_SHIFT)
#define HUGETLB_FLAG_ENCODE_512KB (19U << HUGETLB_FLAG_ENCODE_SHIFT)
#define HUGETLB_FLAG_ENCODE_1MB (20U << HUGETLB_FLAG_ENCODE_SHIFT)
#define HUGETLB_FLAG_ENCODE_2MB (21U << HUGETLB_FLAG_ENCODE_SHIFT)
#define HUGETLB_FLAG_ENCODE_8MB (23U << HUGETLB_FLAG_ENCODE_SHIFT)
#define HUGETLB_FLAG_ENCODE_16MB (24U << HUGETLB_FLAG_ENCODE_SHIFT)
#define HUGETLB_FLAG_ENCODE_32MB (25U << HUGETLB_FLAG_ENCODE_SHIFT)
#define HUGETLB_FLAG_ENCODE_256MB (28U << HUGETLB_FLAG_ENCODE_SHIFT)
#define HUGETLB_FLAG_ENCODE_512MB (29U << HUGETLB_FLAG_ENCODE_SHIFT)
#define HUGETLB_FLAG_ENCODE_1GB (30U << HUGETLB_FLAG_ENCODE_SHIFT)
#define HUGETLB_FLAG_ENCODE_2GB (31U << HUGETLB_FLAG_ENCODE_SHIFT)
#define HUGETLB_FLAG_ENCODE_16GB (34U << HUGETLB_FLAG_ENCODE_SHIFT)
#endif /* _ASM_GENERIC_HUGETLB_ENCODE_H_ */

View File

@@ -75,6 +75,10 @@
#define MADV_POPULATE_READ 22 /* populate (prefault) page tables readable */
#define MADV_POPULATE_WRITE 23 /* populate (prefault) page tables writable */
#define MADV_DONTNEED_LOCKED 24 /* like DONTNEED, but drop locked pages too */
#define MADV_COLLAPSE 25 /* Synchronous hugepage collapse */
/* compatibility flags */
#define MAP_FILE 0

View File

@@ -3,6 +3,8 @@
#define __ASM_GENERIC_SHMBUF_H
#include <asm/bitsperlong.h>
#include <asm/ipcbuf.h>
#include <asm/posix_types.h>
/*
* The shmid64_ds structure for x86 architecture.
@@ -24,7 +26,7 @@
struct shmid64_ds {
struct ipc64_perm shm_perm; /* operation perms */
size_t shm_segsz; /* size of segment (bytes) */
__kernel_size_t shm_segsz; /* size of segment (bytes) */
#if __BITS_PER_LONG == 64
long shm_atime; /* last attach time */
long shm_dtime; /* last detach time */

View File

@@ -99,6 +99,7 @@ union __sifields {
struct {
unsigned long _data;
__u32 _type;
__u32 _flags;
} _perf;
};
} _sigfault;
@@ -164,6 +165,7 @@ typedef struct siginfo {
#define si_pkey _sifields._sigfault._addr_pkey._pkey
#define si_perf_data _sifields._sigfault._perf._data
#define si_perf_type _sifields._sigfault._perf._type
#define si_perf_flags _sifields._sigfault._perf._flags
#define si_band _sifields._sigpoll._band
#define si_fd _sifields._sigpoll._fd
#define si_call_addr _sifields._sigsys._call_addr
@@ -270,6 +272,11 @@ typedef struct siginfo {
* that are of the form: ((PTRACE_EVENT_XXX << 8) | SIGTRAP)
*/
/*
* Flags for si_perf_flags if SIGTRAP si_code is TRAP_PERF.
*/
#define TRAP_PERF_FLAG_ASYNC (1u << 0)
/*
* SIGCHLD si_codes
*/

View File

@@ -83,7 +83,7 @@ struct sigaction {
typedef struct sigaltstack {
void *ss_sp;
int ss_flags;
size_t ss_size;
__kernel_size_t ss_size;
} stack_t;
#endif /* __ASSEMBLY__ */

View File

@@ -128,6 +128,10 @@
#define SO_RESERVE_MEM 73
#define SO_TXREHASH 74
#define SO_RCVMARK 75
#if __BITS_PER_LONG == 64 || (defined(__x86_64__) && defined(__ILP32__))
/* on 64-bit and x32, avoid the ?: operator */

View File

@@ -0,0 +1,66 @@
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
#ifndef __ASM_GENERIC_TERMBITS_COMMON_H
#define __ASM_GENERIC_TERMBITS_COMMON_H
typedef unsigned char cc_t;
typedef unsigned int speed_t;
/* c_iflag bits */
#define IGNBRK 0x001 /* Ignore break condition */
#define BRKINT 0x002 /* Signal interrupt on break */
#define IGNPAR 0x004 /* Ignore characters with parity errors */
#define PARMRK 0x008 /* Mark parity and framing errors */
#define INPCK 0x010 /* Enable input parity check */
#define ISTRIP 0x020 /* Strip 8th bit off characters */
#define INLCR 0x040 /* Map NL to CR on input */
#define IGNCR 0x080 /* Ignore CR */
#define ICRNL 0x100 /* Map CR to NL on input */
#define IXANY 0x800 /* Any character will restart after stop */
/* c_oflag bits */
#define OPOST 0x01 /* Perform output processing */
#define OCRNL 0x08
#define ONOCR 0x10
#define ONLRET 0x20
#define OFILL 0x40
#define OFDEL 0x80
/* c_cflag bit meaning */
/* Common CBAUD rates */
#define B0 0x00000000 /* hang up */
#define B50 0x00000001
#define B75 0x00000002
#define B110 0x00000003
#define B134 0x00000004
#define B150 0x00000005
#define B200 0x00000006
#define B300 0x00000007
#define B600 0x00000008
#define B1200 0x00000009
#define B1800 0x0000000a
#define B2400 0x0000000b
#define B4800 0x0000000c
#define B9600 0x0000000d
#define B19200 0x0000000e
#define B38400 0x0000000f
#define EXTA B19200
#define EXTB B38400
#define ADDRB 0x20000000 /* address bit */
#define CMSPAR 0x40000000 /* mark or space (stick) parity */
#define CRTSCTS 0x80000000 /* flow control */
#define IBSHIFT 16 /* Shift from CBAUD to CIBAUD */
/* tcflow() ACTION argument and TCXONC use these */
#define TCOOFF 0 /* Suspend output */
#define TCOON 1 /* Restart suspended output */
#define TCIOFF 2 /* Send a STOP character */
#define TCION 3 /* Send a START character */
/* tcflush() QUEUE_SELECTOR argument and TCFLSH use these */
#define TCIFLUSH 0 /* Discard data received but not yet read */
#define TCOFLUSH 1 /* Discard data written but not yet sent */
#define TCIOFLUSH 2 /* Discard all pending data */
#endif /* __ASM_GENERIC_TERMBITS_COMMON_H */

View File

@@ -2,10 +2,8 @@
#ifndef __ASM_GENERIC_TERMBITS_H
#define __ASM_GENERIC_TERMBITS_H
#include <linux/posix_types.h>
#include <asm-generic/termbits-common.h>
typedef unsigned char cc_t;
typedef unsigned int speed_t;
typedef unsigned int tcflag_t;
#define NCCS 19
@@ -41,156 +39,107 @@ struct ktermios {
};
/* c_cc characters */
#define VINTR 0
#define VQUIT 1
#define VERASE 2
#define VKILL 3
#define VEOF 4
#define VTIME 5
#define VMIN 6
#define VSWTC 7
#define VSTART 8
#define VSTOP 9
#define VSUSP 10
#define VEOL 11
#define VREPRINT 12
#define VDISCARD 13
#define VWERASE 14
#define VLNEXT 15
#define VEOL2 16
#define VINTR 0
#define VQUIT 1
#define VERASE 2
#define VKILL 3
#define VEOF 4
#define VTIME 5
#define VMIN 6
#define VSWTC 7
#define VSTART 8
#define VSTOP 9
#define VSUSP 10
#define VEOL 11
#define VREPRINT 12
#define VDISCARD 13
#define VWERASE 14
#define VLNEXT 15
#define VEOL2 16
/* c_iflag bits */
#define IGNBRK 0000001
#define BRKINT 0000002
#define IGNPAR 0000004
#define PARMRK 0000010
#define INPCK 0000020
#define ISTRIP 0000040
#define INLCR 0000100
#define IGNCR 0000200
#define ICRNL 0000400
#define IUCLC 0001000
#define IXON 0002000
#define IXANY 0004000
#define IXOFF 0010000
#define IMAXBEL 0020000
#define IUTF8 0040000
#define IUCLC 0x0200
#define IXON 0x0400
#define IXOFF 0x1000
#define IMAXBEL 0x2000
#define IUTF8 0x4000
/* c_oflag bits */
#define OPOST 0000001
#define OLCUC 0000002
#define ONLCR 0000004
#define OCRNL 0000010
#define ONOCR 0000020
#define ONLRET 0000040
#define OFILL 0000100
#define OFDEL 0000200
#define NLDLY 0000400
#define NL0 0000000
#define NL1 0000400
#define CRDLY 0003000
#define CR0 0000000
#define CR1 0001000
#define CR2 0002000
#define CR3 0003000
#define TABDLY 0014000
#define TAB0 0000000
#define TAB1 0004000
#define TAB2 0010000
#define TAB3 0014000
#define XTABS 0014000
#define BSDLY 0020000
#define BS0 0000000
#define BS1 0020000
#define VTDLY 0040000
#define VT0 0000000
#define VT1 0040000
#define FFDLY 0100000
#define FF0 0000000
#define FF1 0100000
#define OLCUC 0x00002
#define ONLCR 0x00004
#define NLDLY 0x00100
#define NL0 0x00000
#define NL1 0x00100
#define CRDLY 0x00600
#define CR0 0x00000
#define CR1 0x00200
#define CR2 0x00400
#define CR3 0x00600
#define TABDLY 0x01800
#define TAB0 0x00000
#define TAB1 0x00800
#define TAB2 0x01000
#define TAB3 0x01800
#define XTABS 0x01800
#define BSDLY 0x02000
#define BS0 0x00000
#define BS1 0x02000
#define VTDLY 0x04000
#define VT0 0x00000
#define VT1 0x04000
#define FFDLY 0x08000
#define FF0 0x00000
#define FF1 0x08000
/* c_cflag bit meaning */
#define CBAUD 0010017
#define B0 0000000 /* hang up */
#define B50 0000001
#define B75 0000002
#define B110 0000003
#define B134 0000004
#define B150 0000005
#define B200 0000006
#define B300 0000007
#define B600 0000010
#define B1200 0000011
#define B1800 0000012
#define B2400 0000013
#define B4800 0000014
#define B9600 0000015
#define B19200 0000016
#define B38400 0000017
#define EXTA B19200
#define EXTB B38400
#define CSIZE 0000060
#define CS5 0000000
#define CS6 0000020
#define CS7 0000040
#define CS8 0000060
#define CSTOPB 0000100
#define CREAD 0000200
#define PARENB 0000400
#define PARODD 0001000
#define HUPCL 0002000
#define CLOCAL 0004000
#define CBAUDEX 0010000
#define BOTHER 0010000
#define B57600 0010001
#define B115200 0010002
#define B230400 0010003
#define B460800 0010004
#define B500000 0010005
#define B576000 0010006
#define B921600 0010007
#define B1000000 0010010
#define B1152000 0010011
#define B1500000 0010012
#define B2000000 0010013
#define B2500000 0010014
#define B3000000 0010015
#define B3500000 0010016
#define B4000000 0010017
#define CIBAUD 002003600000 /* input baud rate */
#define CMSPAR 010000000000 /* mark or space (stick) parity */
#define CRTSCTS 020000000000 /* flow control */
#define IBSHIFT 16 /* Shift from CBAUD to CIBAUD */
#define CBAUD 0x0000100f
#define CSIZE 0x00000030
#define CS5 0x00000000
#define CS6 0x00000010
#define CS7 0x00000020
#define CS8 0x00000030
#define CSTOPB 0x00000040
#define CREAD 0x00000080
#define PARENB 0x00000100
#define PARODD 0x00000200
#define HUPCL 0x00000400
#define CLOCAL 0x00000800
#define CBAUDEX 0x00001000
#define BOTHER 0x00001000
#define B57600 0x00001001
#define B115200 0x00001002
#define B230400 0x00001003
#define B460800 0x00001004
#define B500000 0x00001005
#define B576000 0x00001006
#define B921600 0x00001007
#define B1000000 0x00001008
#define B1152000 0x00001009
#define B1500000 0x0000100a
#define B2000000 0x0000100b
#define B2500000 0x0000100c
#define B3000000 0x0000100d
#define B3500000 0x0000100e
#define B4000000 0x0000100f
#define CIBAUD 0x100f0000 /* input baud rate */
/* c_lflag bits */
#define ISIG 0000001
#define ICANON 0000002
#define XCASE 0000004
#define ECHO 0000010
#define ECHOE 0000020
#define ECHOK 0000040
#define ECHONL 0000100
#define NOFLSH 0000200
#define TOSTOP 0000400
#define ECHOCTL 0001000
#define ECHOPRT 0002000
#define ECHOKE 0004000
#define FLUSHO 0010000
#define PENDIN 0040000
#define IEXTEN 0100000
#define EXTPROC 0200000
/* tcflow() and TCXONC use these */
#define TCOOFF 0
#define TCOON 1
#define TCIOFF 2
#define TCION 3
/* tcflush() and TCFLSH use these */
#define TCIFLUSH 0
#define TCOFLUSH 1
#define TCIOFLUSH 2
#define ISIG 0x00001
#define ICANON 0x00002
#define XCASE 0x00004
#define ECHO 0x00008
#define ECHOE 0x00010
#define ECHOK 0x00020
#define ECHONL 0x00040
#define NOFLSH 0x00080
#define TOSTOP 0x00100
#define ECHOCTL 0x00200
#define ECHOPRT 0x00400
#define ECHOKE 0x00800
#define FLUSHO 0x01000
#define PENDIN 0x04000
#define IEXTEN 0x08000
#define EXTPROC 0x10000
/* tcsetattr uses these */
#define TCSANOW 0

View File

@@ -383,7 +383,7 @@ __SYSCALL(__NR_syslog, sys_syslog)
/* kernel/ptrace.c */
#define __NR_ptrace 117
__SYSCALL(__NR_ptrace, sys_ptrace)
__SC_COMP(__NR_ptrace, sys_ptrace, compat_sys_ptrace)
/* kernel/sched/core.c */
#define __NR_sched_setparam 118
@@ -779,7 +779,7 @@ __SYSCALL(__NR_rseq, sys_rseq)
#define __NR_kexec_file_load 294
__SYSCALL(__NR_kexec_file_load, sys_kexec_file_load)
/* 295 through 402 are unassigned to sync up with generic numbers, don't use */
#if __BITS_PER_LONG == 32
#if defined(__SYSCALL_COMPAT) || __BITS_PER_LONG == 32
#define __NR_clock_gettime64 403
__SYSCALL(__NR_clock_gettime64, sys_clock_gettime)
#define __NR_clock_settime64 404
@@ -883,8 +883,11 @@ __SYSCALL(__NR_process_mrelease, sys_process_mrelease)
#define __NR_futex_waitv 449
__SYSCALL(__NR_futex_waitv, sys_futex_waitv)
#define __NR_set_mempolicy_home_node 450
__SYSCALL(__NR_set_mempolicy_home_node, sys_set_mempolicy_home_node)
#undef __NR_syscalls
#define __NR_syscalls 450
#define __NR_syscalls 451
/*
* 32 bit systems traditionally used different

View File

@@ -80,7 +80,7 @@ extern "C" {
*
* %AMDGPU_GEM_DOMAIN_GTT GPU accessible system memory, mapped into the
* GPU's virtual address space via gart. Gart memory linearizes non-contiguous
* pages of system memory, allows GPU access system memory in a linezrized
* pages of system memory, allows GPU access system memory in a linearized
* fashion.
*
* %AMDGPU_GEM_DOMAIN_VRAM Local video memory. For APUs, it is memory
@@ -140,6 +140,24 @@ extern "C" {
* not require GTT memory accounting
*/
#define AMDGPU_GEM_CREATE_PREEMPTIBLE (1 << 11)
/* Flag that BO can be discarded under memory pressure without keeping the
* content.
*/
#define AMDGPU_GEM_CREATE_DISCARDABLE (1 << 12)
/* Flag that BO is shared coherently between multiple devices or CPU threads.
* May depend on GPU instructions to flush caches explicitly
*
* This influences the choice of MTYPE in the PTEs on GFXv9 and later GPUs and
* may override the MTYPE selected in AMDGPU_VA_OP_MAP.
*/
#define AMDGPU_GEM_CREATE_COHERENT (1 << 13)
/* Flag that BO should not be cached by GPU. Coherent without having to flush
* GPU caches explicitly
*
* This influences the choice of MTYPE in the PTEs on GFXv9 and later GPUs and
* may override the MTYPE selected in AMDGPU_VA_OP_MAP.
*/
#define AMDGPU_GEM_CREATE_UNCACHED (1 << 14)
struct drm_amdgpu_gem_create_in {
/** the requested memory size */
@@ -206,6 +224,8 @@ union drm_amdgpu_bo_list {
#define AMDGPU_CTX_OP_FREE_CTX 2
#define AMDGPU_CTX_OP_QUERY_STATE 3
#define AMDGPU_CTX_OP_QUERY_STATE2 4
#define AMDGPU_CTX_OP_GET_STABLE_PSTATE 5
#define AMDGPU_CTX_OP_SET_STABLE_PSTATE 6
/* GPU reset status */
#define AMDGPU_CTX_NO_RESET 0
@@ -238,10 +258,18 @@ union drm_amdgpu_bo_list {
#define AMDGPU_CTX_PRIORITY_HIGH 512
#define AMDGPU_CTX_PRIORITY_VERY_HIGH 1023
/* select a stable profiling pstate for perfmon tools */
#define AMDGPU_CTX_STABLE_PSTATE_FLAGS_MASK 0xf
#define AMDGPU_CTX_STABLE_PSTATE_NONE 0
#define AMDGPU_CTX_STABLE_PSTATE_STANDARD 1
#define AMDGPU_CTX_STABLE_PSTATE_MIN_SCLK 2
#define AMDGPU_CTX_STABLE_PSTATE_MIN_MCLK 3
#define AMDGPU_CTX_STABLE_PSTATE_PEAK 4
struct drm_amdgpu_ctx_in {
/** AMDGPU_CTX_OP_* */
__u32 op;
/** For future use, no flags defined so far */
/** Flags */
__u32 flags;
__u32 ctx_id;
/** AMDGPU_CTX_PRIORITY_* */
@@ -262,6 +290,11 @@ union drm_amdgpu_ctx_out {
/** Reset status since the last call of the ioctl. */
__u32 reset_status;
} state;
struct {
__u32 flags;
__u32 _pad;
} pstate;
};
union drm_amdgpu_ctx {
@@ -514,6 +547,8 @@ struct drm_amdgpu_gem_op {
#define AMDGPU_VM_MTYPE_UC (4 << 5)
/* Use Read Write MTYPE instead of default MTYPE */
#define AMDGPU_VM_MTYPE_RW (5 << 5)
/* don't allocate MALL */
#define AMDGPU_VM_PAGE_NOALLOC (1 << 9)
struct drm_amdgpu_gem_va {
/** GEM object handle */
@@ -538,6 +573,10 @@ struct drm_amdgpu_gem_va {
#define AMDGPU_HW_IP_VCE 4
#define AMDGPU_HW_IP_UVD_ENC 5
#define AMDGPU_HW_IP_VCN_DEC 6
/*
* From VCN4, AMDGPU_HW_IP_VCN_ENC is re-used to support
* both encoding and decoding jobs.
*/
#define AMDGPU_HW_IP_VCN_ENC 7
#define AMDGPU_HW_IP_VCN_JPEG 8
#define AMDGPU_HW_IP_NUM 9
@@ -676,6 +715,7 @@ struct drm_amdgpu_cs_chunk_data {
#define AMDGPU_IDS_FLAGS_FUSION 0x1
#define AMDGPU_IDS_FLAGS_PREEMPTION 0x2
#define AMDGPU_IDS_FLAGS_TMZ 0x4
#define AMDGPU_IDS_FLAGS_CONFORMANT_TRUNC_COORD 0x8
/* indicate if acceleration can be working */
#define AMDGPU_INFO_ACCEL_WORKING 0x00
@@ -728,6 +768,18 @@ struct drm_amdgpu_cs_chunk_data {
#define AMDGPU_INFO_FW_DMCUB 0x14
/* Subquery id: Query TOC firmware version */
#define AMDGPU_INFO_FW_TOC 0x15
/* Subquery id: Query CAP firmware version */
#define AMDGPU_INFO_FW_CAP 0x16
/* Subquery id: Query GFX RLCP firmware version */
#define AMDGPU_INFO_FW_GFX_RLCP 0x17
/* Subquery id: Query GFX RLCV firmware version */
#define AMDGPU_INFO_FW_GFX_RLCV 0x18
/* Subquery id: Query MES_KIQ firmware version */
#define AMDGPU_INFO_FW_MES_KIQ 0x19
/* Subquery id: Query MES firmware version */
#define AMDGPU_INFO_FW_MES 0x1a
/* Subquery id: Query IMU firmware version */
#define AMDGPU_INFO_FW_IMU 0x1b
/* number of bytes moved for TTM migration */
#define AMDGPU_INFO_NUM_BYTES_MOVED 0x0f
@@ -781,6 +833,10 @@ struct drm_amdgpu_cs_chunk_data {
#define AMDGPU_INFO_SENSOR_STABLE_PSTATE_GFX_SCLK 0x8
/* Subquery id: Query GPU stable pstate memory clock */
#define AMDGPU_INFO_SENSOR_STABLE_PSTATE_GFX_MCLK 0x9
/* Subquery id: Query GPU peak pstate shader clock */
#define AMDGPU_INFO_SENSOR_PEAK_PSTATE_GFX_SCLK 0xa
/* Subquery id: Query GPU peak pstate memory clock */
#define AMDGPU_INFO_SENSOR_PEAK_PSTATE_GFX_MCLK 0xb
/* Number of VRAM page faults on CPU access. */
#define AMDGPU_INFO_NUM_VRAM_CPU_PAGE_FAULTS 0x1E
#define AMDGPU_INFO_VRAM_LOST_COUNTER 0x1F
@@ -971,6 +1027,8 @@ struct drm_amdgpu_info_vbios {
#define AMDGPU_VRAM_TYPE_DDR4 8
#define AMDGPU_VRAM_TYPE_GDDR6 9
#define AMDGPU_VRAM_TYPE_DDR5 10
#define AMDGPU_VRAM_TYPE_LPDDR4 11
#define AMDGPU_VRAM_TYPE_LPDDR5 12
struct drm_amdgpu_info_device {
/** PCI Device ID */
@@ -996,7 +1054,8 @@ struct drm_amdgpu_info_device {
__u32 enabled_rb_pipes_mask;
__u32 num_rb_pipes;
__u32 num_hw_gfx_contexts;
__u32 _pad;
/* PCIe version (the smaller of the GPU and the CPU/motherboard) */
__u32 pcie_gen;
__u64 ids_flags;
/** Starting virtual address for UMDs. */
__u64 virtual_address_offset;
@@ -1043,7 +1102,8 @@ struct drm_amdgpu_info_device {
__u32 gs_prim_buffer_depth;
/* max gs wavefront per vgt*/
__u32 max_gs_waves_per_vgt;
__u32 _pad1;
/* PCIe number of lanes (the smaller of the GPU and the CPU/motherboard) */
__u32 pcie_num_lanes;
/* always on cu bitmap */
__u32 cu_ao_bitmap[4][4];
/** Starting high virtual address for UMDs. */
@@ -1054,6 +1114,18 @@ struct drm_amdgpu_info_device {
__u32 pa_sc_tile_steering_override;
/* disabled TCCs */
__u64 tcc_disabled_mask;
__u64 min_engine_clock;
__u64 min_memory_clock;
/* The following fields are only set on gfx11+, older chips set 0. */
__u32 tcp_cache_size; /* AKA GL0, VMEM cache */
__u32 num_sqc_per_wgp;
__u32 sqc_data_cache_size; /* AKA SMEM cache */
__u32 sqc_inst_cache_size;
__u32 gl1c_cache_size;
__u32 gl2c_cache_size;
__u64 mall_size; /* AKA infinity cache */
/* high 32 bits of the rb pipes mask */
__u32 enabled_rb_pipes_mask_hi;
};
struct drm_amdgpu_info_hw_ip {
@@ -1068,7 +1140,8 @@ struct drm_amdgpu_info_hw_ip {
__u32 ib_size_alignment;
/** Bitmask of available rings. Bit 0 means ring 0, etc. */
__u32 available_rings;
__u32 _pad;
/** version info: bits 23:16 major, 15:8 minor, 7:0 revision */
__u32 ip_discovery_version;
};
struct drm_amdgpu_info_num_handles {
@@ -1133,7 +1206,11 @@ struct drm_amdgpu_info_video_caps {
#define AMDGPU_FAMILY_RV 142 /* Raven */
#define AMDGPU_FAMILY_NV 143 /* Navi10 */
#define AMDGPU_FAMILY_VGH 144 /* Van Gogh */
#define AMDGPU_FAMILY_GC_11_0_0 145 /* GC 11.0.0 */
#define AMDGPU_FAMILY_YC 146 /* Yellow Carp */
#define AMDGPU_FAMILY_GC_11_0_1 148 /* GC 11.0.1 */
#define AMDGPU_FAMILY_GC_10_3_6 149 /* GC 10.3.6 */
#define AMDGPU_FAMILY_GC_10_3_7 151 /* GC 10.3.7 */
#if defined(__cplusplus)
}

View File

@@ -1090,6 +1090,24 @@ extern "C" {
#define DRM_IOCTL_SYNCOBJ_TRANSFER DRM_IOWR(0xCC, struct drm_syncobj_transfer)
#define DRM_IOCTL_SYNCOBJ_TIMELINE_SIGNAL DRM_IOWR(0xCD, struct drm_syncobj_timeline_array)
/**
* DRM_IOCTL_MODE_GETFB2 - Get framebuffer metadata.
*
* This queries metadata about a framebuffer. User-space fills
* &drm_mode_fb_cmd2.fb_id as the input, and the kernels fills the rest of the
* struct as the output.
*
* If the client is DRM master or has &CAP_SYS_ADMIN, &drm_mode_fb_cmd2.handles
* will be filled with GEM buffer handles. Planes are valid until one has a
* zero handle -- this can be used to compute the number of planes.
*
* Otherwise, &drm_mode_fb_cmd2.handles will be zeroed and planes are valid
* until one has a zero &drm_mode_fb_cmd2.pitches.
*
* If the framebuffer has a format modifier, &DRM_MODE_FB_MODIFIERS will be set
* in &drm_mode_fb_cmd2.flags and &drm_mode_fb_cmd2.modifier will contain the
* modifier. Otherwise, user-space must ignore &drm_mode_fb_cmd2.modifier.
*/
#define DRM_IOCTL_MODE_GETFB2 DRM_IOWR(0xCE, struct drm_mode_fb_cmd2)
/*

View File

@@ -88,6 +88,18 @@ extern "C" {
*
* The authoritative list of format modifier codes is found in
* `include/uapi/drm/drm_fourcc.h`
*
* Open Source User Waiver
* -----------------------
*
* Because this is the authoritative source for pixel formats and modifiers
* referenced by GL, Vulkan extensions and other standards and hence used both
* by open source and closed source driver stacks, the usual requirement for an
* upstream in-kernel or open source userspace user does not apply.
*
* To ensure, as much as feasible, compatibility across stacks and avoid
* confusion with incompatible enumerations stakeholders for all relevant driver
* stacks should approve additions.
*/
#define fourcc_code(a, b, c, d) ((__u32)(a) | ((__u32)(b) << 8) | \
@@ -99,18 +111,42 @@ extern "C" {
#define DRM_FORMAT_INVALID 0
/* color index */
#define DRM_FORMAT_C1 fourcc_code('C', '1', ' ', ' ') /* [7:0] C0:C1:C2:C3:C4:C5:C6:C7 1:1:1:1:1:1:1:1 eight pixels/byte */
#define DRM_FORMAT_C2 fourcc_code('C', '2', ' ', ' ') /* [7:0] C0:C1:C2:C3 2:2:2:2 four pixels/byte */
#define DRM_FORMAT_C4 fourcc_code('C', '4', ' ', ' ') /* [7:0] C0:C1 4:4 two pixels/byte */
#define DRM_FORMAT_C8 fourcc_code('C', '8', ' ', ' ') /* [7:0] C */
/* 8 bpp Red */
/* 1 bpp Darkness (inverse relationship between channel value and brightness) */
#define DRM_FORMAT_D1 fourcc_code('D', '1', ' ', ' ') /* [7:0] D0:D1:D2:D3:D4:D5:D6:D7 1:1:1:1:1:1:1:1 eight pixels/byte */
/* 2 bpp Darkness (inverse relationship between channel value and brightness) */
#define DRM_FORMAT_D2 fourcc_code('D', '2', ' ', ' ') /* [7:0] D0:D1:D2:D3 2:2:2:2 four pixels/byte */
/* 4 bpp Darkness (inverse relationship between channel value and brightness) */
#define DRM_FORMAT_D4 fourcc_code('D', '4', ' ', ' ') /* [7:0] D0:D1 4:4 two pixels/byte */
/* 8 bpp Darkness (inverse relationship between channel value and brightness) */
#define DRM_FORMAT_D8 fourcc_code('D', '8', ' ', ' ') /* [7:0] D */
/* 1 bpp Red (direct relationship between channel value and brightness) */
#define DRM_FORMAT_R1 fourcc_code('R', '1', ' ', ' ') /* [7:0] R0:R1:R2:R3:R4:R5:R6:R7 1:1:1:1:1:1:1:1 eight pixels/byte */
/* 2 bpp Red (direct relationship between channel value and brightness) */
#define DRM_FORMAT_R2 fourcc_code('R', '2', ' ', ' ') /* [7:0] R0:R1:R2:R3 2:2:2:2 four pixels/byte */
/* 4 bpp Red (direct relationship between channel value and brightness) */
#define DRM_FORMAT_R4 fourcc_code('R', '4', ' ', ' ') /* [7:0] R0:R1 4:4 two pixels/byte */
/* 8 bpp Red (direct relationship between channel value and brightness) */
#define DRM_FORMAT_R8 fourcc_code('R', '8', ' ', ' ') /* [7:0] R */
/* 10 bpp Red */
/* 10 bpp Red (direct relationship between channel value and brightness) */
#define DRM_FORMAT_R10 fourcc_code('R', '1', '0', ' ') /* [15:0] x:R 6:10 little endian */
/* 12 bpp Red */
/* 12 bpp Red (direct relationship between channel value and brightness) */
#define DRM_FORMAT_R12 fourcc_code('R', '1', '2', ' ') /* [15:0] x:R 4:12 little endian */
/* 16 bpp Red */
/* 16 bpp Red (direct relationship between channel value and brightness) */
#define DRM_FORMAT_R16 fourcc_code('R', '1', '6', ' ') /* [15:0] R little endian */
/* 16 bpp RG */
@@ -205,7 +241,9 @@ extern "C" {
#define DRM_FORMAT_VYUY fourcc_code('V', 'Y', 'U', 'Y') /* [31:0] Y1:Cb0:Y0:Cr0 8:8:8:8 little endian */
#define DRM_FORMAT_AYUV fourcc_code('A', 'Y', 'U', 'V') /* [31:0] A:Y:Cb:Cr 8:8:8:8 little endian */
#define DRM_FORMAT_AVUY8888 fourcc_code('A', 'V', 'U', 'Y') /* [31:0] A:Cr:Cb:Y 8:8:8:8 little endian */
#define DRM_FORMAT_XYUV8888 fourcc_code('X', 'Y', 'U', 'V') /* [31:0] X:Y:Cb:Cr 8:8:8:8 little endian */
#define DRM_FORMAT_XVUY8888 fourcc_code('X', 'V', 'U', 'Y') /* [31:0] X:Cr:Cb:Y 8:8:8:8 little endian */
#define DRM_FORMAT_VUY888 fourcc_code('V', 'U', '2', '4') /* [23:0] Cr:Cb:Y 8:8:8 little endian */
#define DRM_FORMAT_VUY101010 fourcc_code('V', 'U', '3', '0') /* Y followed by U then V, 10:10:10. Non-linear modifier only */
@@ -314,6 +352,13 @@ extern "C" {
*/
#define DRM_FORMAT_P016 fourcc_code('P', '0', '1', '6') /* 2x2 subsampled Cr:Cb plane 16 bits per channel */
/* 2 plane YCbCr420.
* 3 10 bit components and 2 padding bits packed into 4 bytes.
* index 0 = Y plane, [31:0] x:Y2:Y1:Y0 2:10:10:10 little endian
* index 1 = Cr:Cb plane, [63:0] x:Cr2:Cb2:Cr1:x:Cb1:Cr0:Cb0 [2:10:10:10:2:10:10:10] little endian
*/
#define DRM_FORMAT_P030 fourcc_code('P', '0', '3', '0') /* 2x2 subsampled Cr:Cb plane 10 bits per channel packed */
/* 3 plane non-subsampled (444) YCbCr
* 16 bits per component, but only 10 bits are used and 6 bits are padded
* index 0: Y plane, [15:0] Y:x [10:6] little endian
@@ -552,7 +597,7 @@ extern "C" {
*
* The main surface is Y-tiled and is at plane index 0 whereas CCS is linear
* and at index 1. The clear color is stored at index 2, and the pitch should
* be ignored. The clear color structure is 256 bits. The first 128 bits
* be 64 bytes aligned. The clear color structure is 256 bits. The first 128 bits
* represents Raw Clear Color Red, Green, Blue and Alpha color each represented
* by 32 bits. The raw clear color is consumed by the 3d engine and generates
* the converted clear color of size 64 bits. The first 32 bits store the Lower
@@ -565,6 +610,53 @@ extern "C" {
*/
#define I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC fourcc_mod_code(INTEL, 8)
/*
* Intel Tile 4 layout
*
* This is a tiled layout using 4KB tiles in a row-major layout. It has the same
* shape as Tile Y at two granularities: 4KB (128B x 32) and 64B (16B x 4). It
* only differs from Tile Y at the 256B granularity in between. At this
* granularity, Tile Y has a shape of 16B x 32 rows, but this tiling has a shape
* of 64B x 8 rows.
*/
#define I915_FORMAT_MOD_4_TILED fourcc_mod_code(INTEL, 9)
/*
* Intel color control surfaces (CCS) for DG2 render compression.
*
* The main surface is Tile 4 and at plane index 0. The CCS data is stored
* outside of the GEM object in a reserved memory area dedicated for the
* storage of the CCS data for all RC/RC_CC/MC compressible GEM objects. The
* main surface pitch is required to be a multiple of four Tile 4 widths.
*/
#define I915_FORMAT_MOD_4_TILED_DG2_RC_CCS fourcc_mod_code(INTEL, 10)
/*
* Intel color control surfaces (CCS) for DG2 media compression.
*
* The main surface is Tile 4 and at plane index 0. For semi-planar formats
* like NV12, the Y and UV planes are Tile 4 and are located at plane indices
* 0 and 1, respectively. The CCS for all planes are stored outside of the
* GEM object in a reserved memory area dedicated for the storage of the
* CCS data for all RC/RC_CC/MC compressible GEM objects. The main surface
* pitch is required to be a multiple of four Tile 4 widths.
*/
#define I915_FORMAT_MOD_4_TILED_DG2_MC_CCS fourcc_mod_code(INTEL, 11)
/*
* Intel Color Control Surface with Clear Color (CCS) for DG2 render compression.
*
* The main surface is Tile 4 and at plane index 0. The CCS data is stored
* outside of the GEM object in a reserved memory area dedicated for the
* storage of the CCS data for all RC/RC_CC/MC compressible GEM objects. The
* main surface pitch is required to be a multiple of four Tile 4 widths. The
* clear color is stored at plane index 1 and the pitch should be 64 bytes
* aligned. The format of the 256 bits of clear color data matches the one used
* for the I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC modifier, see its description
* for details.
*/
#define I915_FORMAT_MOD_4_TILED_DG2_RC_CCS_CC fourcc_mod_code(INTEL, 12)
/*
* Tiled, NV12MT, grouped in 64 (pixels) x 32 (lines) -sized macroblocks
*
@@ -602,6 +694,28 @@ extern "C" {
*/
#define DRM_FORMAT_MOD_QCOM_COMPRESSED fourcc_mod_code(QCOM, 1)
/*
* Qualcomm Tiled Format
*
* Similar to DRM_FORMAT_MOD_QCOM_COMPRESSED but not compressed.
* Implementation may be platform and base-format specific.
*
* Each macrotile consists of m x n (mostly 4 x 4) tiles.
* Pixel data pitch/stride is aligned with macrotile width.
* Pixel data height is aligned with macrotile height.
* Entire pixel data buffer is aligned with 4k(bytes).
*/
#define DRM_FORMAT_MOD_QCOM_TILED3 fourcc_mod_code(QCOM, 3)
/*
* Qualcomm Alternate Tiled Format
*
* Alternate tiled format typically only used within GMEM.
* Implementation may be platform and base-format specific.
*/
#define DRM_FORMAT_MOD_QCOM_TILED2 fourcc_mod_code(QCOM, 2)
/* Vivante framebuffer modifiers */
/*
@@ -642,6 +756,35 @@ extern "C" {
*/
#define DRM_FORMAT_MOD_VIVANTE_SPLIT_SUPER_TILED fourcc_mod_code(VIVANTE, 4)
/*
* Vivante TS (tile-status) buffer modifiers. They can be combined with all of
* the color buffer tiling modifiers defined above. When TS is present it's a
* separate buffer containing the clear/compression status of each tile. The
* modifiers are defined as VIVANTE_MOD_TS_c_s, where c is the color buffer
* tile size in bytes covered by one entry in the status buffer and s is the
* number of status bits per entry.
* We reserve the top 8 bits of the Vivante modifier space for tile status
* clear/compression modifiers, as future cores might add some more TS layout
* variations.
*/
#define VIVANTE_MOD_TS_64_4 (1ULL << 48)
#define VIVANTE_MOD_TS_64_2 (2ULL << 48)
#define VIVANTE_MOD_TS_128_4 (3ULL << 48)
#define VIVANTE_MOD_TS_256_4 (4ULL << 48)
#define VIVANTE_MOD_TS_MASK (0xfULL << 48)
/*
* Vivante compression modifiers. Those depend on a TS modifier being present
* as the TS bits get reinterpreted as compression tags instead of simple
* clear markers when compression is enabled.
*/
#define VIVANTE_MOD_COMP_DEC400 (1ULL << 52)
#define VIVANTE_MOD_COMP_MASK (0xfULL << 52)
/* Masking out the extension bits will yield the base modifier. */
#define VIVANTE_MOD_EXT_MASK (VIVANTE_MOD_TS_MASK | \
VIVANTE_MOD_COMP_MASK)
/* NVIDIA frame buffer modifiers */
/*
@@ -854,6 +997,10 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier)
* and UV. Some SAND-using hardware stores UV in a separate tiled
* image from Y to reduce the column height, which is not supported
* with these modifiers.
*
* The DRM_FORMAT_MOD_BROADCOM_SAND128_COL_HEIGHT modifier is also
* supported for DRM_FORMAT_P030 where the columns remain as 128 bytes
* wide, but as this is a 10 bpp format that translates to 96 pixels.
*/
#define DRM_FORMAT_MOD_BROADCOM_SAND32_COL_HEIGHT(v) \
@@ -1283,6 +1430,7 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier)
#define AMD_FMT_MOD_TILE_VER_GFX9 1
#define AMD_FMT_MOD_TILE_VER_GFX10 2
#define AMD_FMT_MOD_TILE_VER_GFX10_RBPLUS 3
#define AMD_FMT_MOD_TILE_VER_GFX11 4
/*
* 64K_S is the same for GFX9/GFX10/GFX10_RBPLUS and hence has GFX9 as canonical
@@ -1298,6 +1446,7 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier)
#define AMD_FMT_MOD_TILE_GFX9_64K_S_X 25
#define AMD_FMT_MOD_TILE_GFX9_64K_D_X 26
#define AMD_FMT_MOD_TILE_GFX9_64K_R_X 27
#define AMD_FMT_MOD_TILE_GFX11_256K_R_X 31
#define AMD_FMT_MOD_DCC_BLOCK_64B 0
#define AMD_FMT_MOD_DCC_BLOCK_128B 1
@@ -1364,11 +1513,11 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier)
#define AMD_FMT_MOD_PIPE_MASK 0x7
#define AMD_FMT_MOD_SET(field, value) \
((uint64_t)(value) << AMD_FMT_MOD_##field##_SHIFT)
((__u64)(value) << AMD_FMT_MOD_##field##_SHIFT)
#define AMD_FMT_MOD_GET(field, value) \
(((value) >> AMD_FMT_MOD_##field##_SHIFT) & AMD_FMT_MOD_##field##_MASK)
#define AMD_FMT_MOD_CLEAR(field) \
(~((uint64_t)AMD_FMT_MOD_##field##_MASK << AMD_FMT_MOD_##field##_SHIFT))
(~((__u64)AMD_FMT_MOD_##field##_MASK << AMD_FMT_MOD_##field##_SHIFT))
#if defined(__cplusplus)
}

View File

@@ -663,41 +663,73 @@ struct drm_mode_fb_cmd {
#define DRM_MODE_FB_INTERLACED (1<<0) /* for interlaced framebuffers */
#define DRM_MODE_FB_MODIFIERS (1<<1) /* enables ->modifer[] */
/**
* struct drm_mode_fb_cmd2 - Frame-buffer metadata.
*
* This struct holds frame-buffer metadata. There are two ways to use it:
*
* - User-space can fill this struct and perform a &DRM_IOCTL_MODE_ADDFB2
* ioctl to register a new frame-buffer. The new frame-buffer object ID will
* be set by the kernel in @fb_id.
* - User-space can set @fb_id and perform a &DRM_IOCTL_MODE_GETFB2 ioctl to
* fetch metadata about an existing frame-buffer.
*
* In case of planar formats, this struct allows up to 4 buffer objects with
* offsets and pitches per plane. The pitch and offset order are dictated by
* the format FourCC as defined by ``drm_fourcc.h``, e.g. NV12 is described as:
*
* YUV 4:2:0 image with a plane of 8-bit Y samples followed by an
* interleaved U/V plane containing 8-bit 2x2 subsampled colour difference
* samples.
*
* So it would consist of a Y plane at ``offsets[0]`` and a UV plane at
* ``offsets[1]``.
*
* To accommodate tiled, compressed, etc formats, a modifier can be specified.
* For more information see the "Format Modifiers" section. Note that even
* though it looks like we have a modifier per-plane, we in fact do not. The
* modifier for each plane must be identical. Thus all combinations of
* different data layouts for multi-plane formats must be enumerated as
* separate modifiers.
*
* All of the entries in @handles, @pitches, @offsets and @modifier must be
* zero when unused. Warning, for @offsets and @modifier zero can't be used to
* figure out whether the entry is used or not since it's a valid value (a zero
* offset is common, and a zero modifier is &DRM_FORMAT_MOD_LINEAR).
*/
struct drm_mode_fb_cmd2 {
/** @fb_id: Object ID of the frame-buffer. */
__u32 fb_id;
/** @width: Width of the frame-buffer. */
__u32 width;
/** @height: Height of the frame-buffer. */
__u32 height;
__u32 pixel_format; /* fourcc code from drm_fourcc.h */
__u32 flags; /* see above flags */
/**
* @pixel_format: FourCC format code, see ``DRM_FORMAT_*`` constants in
* ``drm_fourcc.h``.
*/
__u32 pixel_format;
/**
* @flags: Frame-buffer flags (see &DRM_MODE_FB_INTERLACED and
* &DRM_MODE_FB_MODIFIERS).
*/
__u32 flags;
/*
* In case of planar formats, this ioctl allows up to 4
* buffer objects with offsets and pitches per plane.
* The pitch and offset order is dictated by the fourcc,
* e.g. NV12 (https://fourcc.org/yuv.php#NV12) is described as:
*
* YUV 4:2:0 image with a plane of 8 bit Y samples
* followed by an interleaved U/V plane containing
* 8 bit 2x2 subsampled colour difference samples.
*
* So it would consist of Y as offsets[0] and UV as
* offsets[1]. Note that offsets[0] will generally
* be 0 (but this is not required).
*
* To accommodate tiled, compressed, etc formats, a
* modifier can be specified. The default value of zero
* indicates "native" format as specified by the fourcc.
* Vendor specific modifier token. Note that even though
* it looks like we have a modifier per-plane, we in fact
* do not. The modifier for each plane must be identical.
* Thus all combinations of different data layouts for
* multi plane formats must be enumerated as separate
* modifiers.
/**
* @handles: GEM buffer handle, one per plane. Set to 0 if the plane is
* unused. The same handle can be used for multiple planes.
*/
__u32 handles[4];
__u32 pitches[4]; /* pitch for each plane */
__u32 offsets[4]; /* offset of each plane */
__u64 modifier[4]; /* ie, tiling, compress */
/** @pitches: Pitch (aka. stride) in bytes, one per plane. */
__u32 pitches[4];
/** @offsets: Offset into the buffer in bytes, one per plane. */
__u32 offsets[4];
/**
* @modifier: Format modifier, one per plane. See ``DRM_FORMAT_MOD_*``
* constants in ``drm_fourcc.h``. All planes must use the same
* modifier. Ignored unless &DRM_MODE_FB_MODIFIERS is set in @flags.
*/
__u64 modifier[4];
};
#define DRM_MODE_FB_DIRTY_ANNOTATE_COPY 0x01
@@ -903,12 +935,31 @@ struct hdr_output_metadata {
};
};
/**
* DRM_MODE_PAGE_FLIP_EVENT
*
* Request that the kernel sends back a vblank event (see
* struct drm_event_vblank) with the &DRM_EVENT_FLIP_COMPLETE type when the
* page-flip is done.
*/
#define DRM_MODE_PAGE_FLIP_EVENT 0x01
/**
* DRM_MODE_PAGE_FLIP_ASYNC
*
* Request that the page-flip is performed as soon as possible, ie. with no
* delay due to waiting for vblank. This may cause tearing to be visible on
* the screen.
*/
#define DRM_MODE_PAGE_FLIP_ASYNC 0x02
#define DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE 0x4
#define DRM_MODE_PAGE_FLIP_TARGET_RELATIVE 0x8
#define DRM_MODE_PAGE_FLIP_TARGET (DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE | \
DRM_MODE_PAGE_FLIP_TARGET_RELATIVE)
/**
* DRM_MODE_PAGE_FLIP_FLAGS
*
* Bitmask of flags suitable for &drm_mode_crtc_page_flip_target.flags.
*/
#define DRM_MODE_PAGE_FLIP_FLAGS (DRM_MODE_PAGE_FLIP_EVENT | \
DRM_MODE_PAGE_FLIP_ASYNC | \
DRM_MODE_PAGE_FLIP_TARGET)
@@ -1002,11 +1053,53 @@ struct drm_mode_destroy_dumb {
__u32 handle;
};
/* page-flip flags are valid, plus: */
/**
* DRM_MODE_ATOMIC_TEST_ONLY
*
* Do not apply the atomic commit, instead check whether the hardware supports
* this configuration.
*
* See &drm_mode_config_funcs.atomic_check for more details on test-only
* commits.
*/
#define DRM_MODE_ATOMIC_TEST_ONLY 0x0100
/**
* DRM_MODE_ATOMIC_NONBLOCK
*
* Do not block while applying the atomic commit. The &DRM_IOCTL_MODE_ATOMIC
* IOCTL returns immediately instead of waiting for the changes to be applied
* in hardware. Note, the driver will still check that the update can be
* applied before retuning.
*/
#define DRM_MODE_ATOMIC_NONBLOCK 0x0200
/**
* DRM_MODE_ATOMIC_ALLOW_MODESET
*
* Allow the update to result in temporary or transient visible artifacts while
* the update is being applied. Applying the update may also take significantly
* more time than a page flip. All visual artifacts will disappear by the time
* the update is completed, as signalled through the vblank event's timestamp
* (see struct drm_event_vblank).
*
* This flag must be set when the KMS update might cause visible artifacts.
* Without this flag such KMS update will return a EINVAL error. What kind of
* update may cause visible artifacts depends on the driver and the hardware.
* User-space that needs to know beforehand if an update might cause visible
* artifacts can use &DRM_MODE_ATOMIC_TEST_ONLY without
* &DRM_MODE_ATOMIC_ALLOW_MODESET to see if it fails.
*
* To the best of the driver's knowledge, visual artifacts are guaranteed to
* not appear when this flag is not set. Some sinks might display visual
* artifacts outside of the driver's control.
*/
#define DRM_MODE_ATOMIC_ALLOW_MODESET 0x0400
/**
* DRM_MODE_ATOMIC_FLAGS
*
* Bitfield of flags accepted by the &DRM_IOCTL_MODE_ATOMIC IOCTL in
* &drm_mode_atomic.flags.
*/
#define DRM_MODE_ATOMIC_FLAGS (\
DRM_MODE_PAGE_FLIP_EVENT |\
DRM_MODE_PAGE_FLIP_ASYNC |\

View File

@@ -1,292 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
#ifndef _I810_DRM_H_
#define _I810_DRM_H_
#include "drm.h"
#if defined(__cplusplus)
extern "C" {
#endif
/* WARNING: These defines must be the same as what the Xserver uses.
* if you change them, you must change the defines in the Xserver.
*/
#ifndef _I810_DEFINES_
#define _I810_DEFINES_
#define I810_DMA_BUF_ORDER 12
#define I810_DMA_BUF_SZ (1<<I810_DMA_BUF_ORDER)
#define I810_DMA_BUF_NR 256
#define I810_NR_SAREA_CLIPRECTS 8
/* Each region is a minimum of 64k, and there are at most 64 of them.
*/
#define I810_NR_TEX_REGIONS 64
#define I810_LOG_MIN_TEX_REGION_SIZE 16
#endif
#define I810_UPLOAD_TEX0IMAGE 0x1 /* handled clientside */
#define I810_UPLOAD_TEX1IMAGE 0x2 /* handled clientside */
#define I810_UPLOAD_CTX 0x4
#define I810_UPLOAD_BUFFERS 0x8
#define I810_UPLOAD_TEX0 0x10
#define I810_UPLOAD_TEX1 0x20
#define I810_UPLOAD_CLIPRECTS 0x40
/* Indices into buf.Setup where various bits of state are mirrored per
* context and per buffer. These can be fired at the card as a unit,
* or in a piecewise fashion as required.
*/
/* Destbuffer state
* - backbuffer linear offset and pitch -- invarient in the current dri
* - zbuffer linear offset and pitch -- also invarient
* - drawing origin in back and depth buffers.
*
* Keep the depth/back buffer state here to accommodate private buffers
* in the future.
*/
#define I810_DESTREG_DI0 0 /* CMD_OP_DESTBUFFER_INFO (2 dwords) */
#define I810_DESTREG_DI1 1
#define I810_DESTREG_DV0 2 /* GFX_OP_DESTBUFFER_VARS (2 dwords) */
#define I810_DESTREG_DV1 3
#define I810_DESTREG_DR0 4 /* GFX_OP_DRAWRECT_INFO (4 dwords) */
#define I810_DESTREG_DR1 5
#define I810_DESTREG_DR2 6
#define I810_DESTREG_DR3 7
#define I810_DESTREG_DR4 8
#define I810_DEST_SETUP_SIZE 10
/* Context state
*/
#define I810_CTXREG_CF0 0 /* GFX_OP_COLOR_FACTOR */
#define I810_CTXREG_CF1 1
#define I810_CTXREG_ST0 2 /* GFX_OP_STIPPLE */
#define I810_CTXREG_ST1 3
#define I810_CTXREG_VF 4 /* GFX_OP_VERTEX_FMT */
#define I810_CTXREG_MT 5 /* GFX_OP_MAP_TEXELS */
#define I810_CTXREG_MC0 6 /* GFX_OP_MAP_COLOR_STAGES - stage 0 */
#define I810_CTXREG_MC1 7 /* GFX_OP_MAP_COLOR_STAGES - stage 1 */
#define I810_CTXREG_MC2 8 /* GFX_OP_MAP_COLOR_STAGES - stage 2 */
#define I810_CTXREG_MA0 9 /* GFX_OP_MAP_ALPHA_STAGES - stage 0 */
#define I810_CTXREG_MA1 10 /* GFX_OP_MAP_ALPHA_STAGES - stage 1 */
#define I810_CTXREG_MA2 11 /* GFX_OP_MAP_ALPHA_STAGES - stage 2 */
#define I810_CTXREG_SDM 12 /* GFX_OP_SRC_DEST_MONO */
#define I810_CTXREG_FOG 13 /* GFX_OP_FOG_COLOR */
#define I810_CTXREG_B1 14 /* GFX_OP_BOOL_1 */
#define I810_CTXREG_B2 15 /* GFX_OP_BOOL_2 */
#define I810_CTXREG_LCS 16 /* GFX_OP_LINEWIDTH_CULL_SHADE_MODE */
#define I810_CTXREG_PV 17 /* GFX_OP_PV_RULE -- Invarient! */
#define I810_CTXREG_ZA 18 /* GFX_OP_ZBIAS_ALPHAFUNC */
#define I810_CTXREG_AA 19 /* GFX_OP_ANTIALIAS */
#define I810_CTX_SETUP_SIZE 20
/* Texture state (per tex unit)
*/
#define I810_TEXREG_MI0 0 /* GFX_OP_MAP_INFO (4 dwords) */
#define I810_TEXREG_MI1 1
#define I810_TEXREG_MI2 2
#define I810_TEXREG_MI3 3
#define I810_TEXREG_MF 4 /* GFX_OP_MAP_FILTER */
#define I810_TEXREG_MLC 5 /* GFX_OP_MAP_LOD_CTL */
#define I810_TEXREG_MLL 6 /* GFX_OP_MAP_LOD_LIMITS */
#define I810_TEXREG_MCS 7 /* GFX_OP_MAP_COORD_SETS ??? */
#define I810_TEX_SETUP_SIZE 8
/* Flags for clear ioctl
*/
#define I810_FRONT 0x1
#define I810_BACK 0x2
#define I810_DEPTH 0x4
typedef enum _drm_i810_init_func {
I810_INIT_DMA = 0x01,
I810_CLEANUP_DMA = 0x02,
I810_INIT_DMA_1_4 = 0x03
} drm_i810_init_func_t;
/* This is the init structure after v1.2 */
typedef struct _drm_i810_init {
drm_i810_init_func_t func;
unsigned int mmio_offset;
unsigned int buffers_offset;
int sarea_priv_offset;
unsigned int ring_start;
unsigned int ring_end;
unsigned int ring_size;
unsigned int front_offset;
unsigned int back_offset;
unsigned int depth_offset;
unsigned int overlay_offset;
unsigned int overlay_physical;
unsigned int w;
unsigned int h;
unsigned int pitch;
unsigned int pitch_bits;
} drm_i810_init_t;
/* This is the init structure prior to v1.2 */
typedef struct _drm_i810_pre12_init {
drm_i810_init_func_t func;
unsigned int mmio_offset;
unsigned int buffers_offset;
int sarea_priv_offset;
unsigned int ring_start;
unsigned int ring_end;
unsigned int ring_size;
unsigned int front_offset;
unsigned int back_offset;
unsigned int depth_offset;
unsigned int w;
unsigned int h;
unsigned int pitch;
unsigned int pitch_bits;
} drm_i810_pre12_init_t;
/* Warning: If you change the SAREA structure you must change the Xserver
* structure as well */
typedef struct _drm_i810_tex_region {
unsigned char next, prev; /* indices to form a circular LRU */
unsigned char in_use; /* owned by a client, or free? */
int age; /* tracked by clients to update local LRU's */
} drm_i810_tex_region_t;
typedef struct _drm_i810_sarea {
unsigned int ContextState[I810_CTX_SETUP_SIZE];
unsigned int BufferState[I810_DEST_SETUP_SIZE];
unsigned int TexState[2][I810_TEX_SETUP_SIZE];
unsigned int dirty;
unsigned int nbox;
struct drm_clip_rect boxes[I810_NR_SAREA_CLIPRECTS];
/* Maintain an LRU of contiguous regions of texture space. If
* you think you own a region of texture memory, and it has an
* age different to the one you set, then you are mistaken and
* it has been stolen by another client. If global texAge
* hasn't changed, there is no need to walk the list.
*
* These regions can be used as a proxy for the fine-grained
* texture information of other clients - by maintaining them
* in the same lru which is used to age their own textures,
* clients have an approximate lru for the whole of global
* texture space, and can make informed decisions as to which
* areas to kick out. There is no need to choose whether to
* kick out your own texture or someone else's - simply eject
* them all in LRU order.
*/
drm_i810_tex_region_t texList[I810_NR_TEX_REGIONS + 1];
/* Last elt is sentinal */
int texAge; /* last time texture was uploaded */
int last_enqueue; /* last time a buffer was enqueued */
int last_dispatch; /* age of the most recently dispatched buffer */
int last_quiescent; /* */
int ctxOwner; /* last context to upload state */
int vertex_prim;
int pf_enabled; /* is pageflipping allowed? */
int pf_active;
int pf_current_page; /* which buffer is being displayed? */
} drm_i810_sarea_t;
/* WARNING: If you change any of these defines, make sure to change the
* defines in the Xserver file (xf86drmMga.h)
*/
/* i810 specific ioctls
* The device specific ioctl range is 0x40 to 0x79.
*/
#define DRM_I810_INIT 0x00
#define DRM_I810_VERTEX 0x01
#define DRM_I810_CLEAR 0x02
#define DRM_I810_FLUSH 0x03
#define DRM_I810_GETAGE 0x04
#define DRM_I810_GETBUF 0x05
#define DRM_I810_SWAP 0x06
#define DRM_I810_COPY 0x07
#define DRM_I810_DOCOPY 0x08
#define DRM_I810_OV0INFO 0x09
#define DRM_I810_FSTATUS 0x0a
#define DRM_I810_OV0FLIP 0x0b
#define DRM_I810_MC 0x0c
#define DRM_I810_RSTATUS 0x0d
#define DRM_I810_FLIP 0x0e
#define DRM_IOCTL_I810_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I810_INIT, drm_i810_init_t)
#define DRM_IOCTL_I810_VERTEX DRM_IOW( DRM_COMMAND_BASE + DRM_I810_VERTEX, drm_i810_vertex_t)
#define DRM_IOCTL_I810_CLEAR DRM_IOW( DRM_COMMAND_BASE + DRM_I810_CLEAR, drm_i810_clear_t)
#define DRM_IOCTL_I810_FLUSH DRM_IO( DRM_COMMAND_BASE + DRM_I810_FLUSH)
#define DRM_IOCTL_I810_GETAGE DRM_IO( DRM_COMMAND_BASE + DRM_I810_GETAGE)
#define DRM_IOCTL_I810_GETBUF DRM_IOWR(DRM_COMMAND_BASE + DRM_I810_GETBUF, drm_i810_dma_t)
#define DRM_IOCTL_I810_SWAP DRM_IO( DRM_COMMAND_BASE + DRM_I810_SWAP)
#define DRM_IOCTL_I810_COPY DRM_IOW( DRM_COMMAND_BASE + DRM_I810_COPY, drm_i810_copy_t)
#define DRM_IOCTL_I810_DOCOPY DRM_IO( DRM_COMMAND_BASE + DRM_I810_DOCOPY)
#define DRM_IOCTL_I810_OV0INFO DRM_IOR( DRM_COMMAND_BASE + DRM_I810_OV0INFO, drm_i810_overlay_t)
#define DRM_IOCTL_I810_FSTATUS DRM_IO ( DRM_COMMAND_BASE + DRM_I810_FSTATUS)
#define DRM_IOCTL_I810_OV0FLIP DRM_IO ( DRM_COMMAND_BASE + DRM_I810_OV0FLIP)
#define DRM_IOCTL_I810_MC DRM_IOW( DRM_COMMAND_BASE + DRM_I810_MC, drm_i810_mc_t)
#define DRM_IOCTL_I810_RSTATUS DRM_IO ( DRM_COMMAND_BASE + DRM_I810_RSTATUS)
#define DRM_IOCTL_I810_FLIP DRM_IO ( DRM_COMMAND_BASE + DRM_I810_FLIP)
typedef struct _drm_i810_clear {
int clear_color;
int clear_depth;
int flags;
} drm_i810_clear_t;
/* These may be placeholders if we have more cliprects than
* I810_NR_SAREA_CLIPRECTS. In that case, the client sets discard to
* false, indicating that the buffer will be dispatched again with a
* new set of cliprects.
*/
typedef struct _drm_i810_vertex {
int idx; /* buffer index */
int used; /* nr bytes in use */
int discard; /* client is finished with the buffer? */
} drm_i810_vertex_t;
typedef struct _drm_i810_copy_t {
int idx; /* buffer index */
int used; /* nr bytes in use */
void *address; /* Address to copy from */
} drm_i810_copy_t;
#define PR_TRIANGLES (0x0<<18)
#define PR_TRISTRIP_0 (0x1<<18)
#define PR_TRISTRIP_1 (0x2<<18)
#define PR_TRIFAN (0x3<<18)
#define PR_POLYGON (0x4<<18)
#define PR_LINES (0x5<<18)
#define PR_LINESTRIP (0x6<<18)
#define PR_RECTS (0x7<<18)
#define PR_MASK (0x7<<18)
typedef struct drm_i810_dma {
void *virtual;
int request_idx;
int request_size;
int granted;
} drm_i810_dma_t;
typedef struct _drm_i810_overlay_t {
unsigned int offset; /* Address of the Overlay Regs */
unsigned int physical;
} drm_i810_overlay_t;
typedef struct _drm_i810_mc {
int idx; /* buffer index */
int used; /* nr bytes in use */
int num_blocks; /* number of GFXBlocks */
int *length; /* List of lengths for GFXBlocks (FUTURE) */
unsigned int last_render; /* Last Render Request */
} drm_i810_mc_t;
#if defined(__cplusplus)
}
#endif
#endif /* _I810_DRM_H_ */

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/* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */
/*
* Copyright (C) 2020-2023 Intel Corporation
*/
#ifndef __UAPI_IVPU_DRM_H__
#define __UAPI_IVPU_DRM_H__
#include "drm.h"
#if defined(__cplusplus)
extern "C" {
#endif
#define DRM_IVPU_DRIVER_MAJOR 1
#define DRM_IVPU_DRIVER_MINOR 0
#define DRM_IVPU_GET_PARAM 0x00
#define DRM_IVPU_SET_PARAM 0x01
#define DRM_IVPU_BO_CREATE 0x02
#define DRM_IVPU_BO_INFO 0x03
#define DRM_IVPU_SUBMIT 0x05
#define DRM_IVPU_BO_WAIT 0x06
#define DRM_IOCTL_IVPU_GET_PARAM \
DRM_IOWR(DRM_COMMAND_BASE + DRM_IVPU_GET_PARAM, struct drm_ivpu_param)
#define DRM_IOCTL_IVPU_SET_PARAM \
DRM_IOW(DRM_COMMAND_BASE + DRM_IVPU_SET_PARAM, struct drm_ivpu_param)
#define DRM_IOCTL_IVPU_BO_CREATE \
DRM_IOWR(DRM_COMMAND_BASE + DRM_IVPU_BO_CREATE, struct drm_ivpu_bo_create)
#define DRM_IOCTL_IVPU_BO_INFO \
DRM_IOWR(DRM_COMMAND_BASE + DRM_IVPU_BO_INFO, struct drm_ivpu_bo_info)
#define DRM_IOCTL_IVPU_SUBMIT \
DRM_IOW(DRM_COMMAND_BASE + DRM_IVPU_SUBMIT, struct drm_ivpu_submit)
#define DRM_IOCTL_IVPU_BO_WAIT \
DRM_IOWR(DRM_COMMAND_BASE + DRM_IVPU_BO_WAIT, struct drm_ivpu_bo_wait)
/**
* DOC: contexts
*
* VPU contexts have private virtual address space, job queues and priority.
* Each context is identified by an unique ID. Context is created on open().
*/
#define DRM_IVPU_PARAM_DEVICE_ID 0
#define DRM_IVPU_PARAM_DEVICE_REVISION 1
#define DRM_IVPU_PARAM_PLATFORM_TYPE 2
#define DRM_IVPU_PARAM_CORE_CLOCK_RATE 3
#define DRM_IVPU_PARAM_NUM_CONTEXTS 4
#define DRM_IVPU_PARAM_CONTEXT_BASE_ADDRESS 5
#define DRM_IVPU_PARAM_CONTEXT_PRIORITY 6
#define DRM_IVPU_PARAM_CONTEXT_ID 7
#define DRM_IVPU_PARAM_FW_API_VERSION 8
#define DRM_IVPU_PARAM_ENGINE_HEARTBEAT 9
#define DRM_IVPU_PARAM_UNIQUE_INFERENCE_ID 10
#define DRM_IVPU_PARAM_TILE_CONFIG 11
#define DRM_IVPU_PARAM_SKU 12
#define DRM_IVPU_PLATFORM_TYPE_SILICON 0
#define DRM_IVPU_CONTEXT_PRIORITY_IDLE 0
#define DRM_IVPU_CONTEXT_PRIORITY_NORMAL 1
#define DRM_IVPU_CONTEXT_PRIORITY_FOCUS 2
#define DRM_IVPU_CONTEXT_PRIORITY_REALTIME 3
/**
* struct drm_ivpu_param - Get/Set VPU parameters
*/
struct drm_ivpu_param {
/**
* @param:
*
* Supported params:
*
* %DRM_IVPU_PARAM_DEVICE_ID:
* PCI Device ID of the VPU device (read-only)
*
* %DRM_IVPU_PARAM_DEVICE_REVISION:
* VPU device revision (read-only)
*
* %DRM_IVPU_PARAM_PLATFORM_TYPE:
* Returns %DRM_IVPU_PLATFORM_TYPE_SILICON on real hardware or device specific
* platform type when executing on a simulator or emulator (read-only)
*
* %DRM_IVPU_PARAM_CORE_CLOCK_RATE:
* Current PLL frequency (read-only)
*
* %DRM_IVPU_PARAM_NUM_CONTEXTS:
* Maximum number of simultaneously existing contexts (read-only)
*
* %DRM_IVPU_PARAM_CONTEXT_BASE_ADDRESS:
* Lowest VPU virtual address available in the current context (read-only)
*
* %DRM_IVPU_PARAM_CONTEXT_PRIORITY:
* Value of current context scheduling priority (read-write).
* See DRM_IVPU_CONTEXT_PRIORITY_* for possible values.
*
* %DRM_IVPU_PARAM_CONTEXT_ID:
* Current context ID, always greater than 0 (read-only)
*
* %DRM_IVPU_PARAM_FW_API_VERSION:
* Firmware API version array (read-only)
*
* %DRM_IVPU_PARAM_ENGINE_HEARTBEAT:
* Heartbeat value from an engine (read-only).
* Engine ID (i.e. DRM_IVPU_ENGINE_COMPUTE) is given via index.
*
* %DRM_IVPU_PARAM_UNIQUE_INFERENCE_ID:
* Device-unique inference ID (read-only)
*
* %DRM_IVPU_PARAM_TILE_CONFIG:
* VPU tile configuration (read-only)
*
* %DRM_IVPU_PARAM_SKU:
* VPU SKU ID (read-only)
*
*/
__u32 param;
/** @index: Index for params that have multiple instances */
__u32 index;
/** @value: Param value */
__u64 value;
};
#define DRM_IVPU_BO_HIGH_MEM 0x00000001
#define DRM_IVPU_BO_MAPPABLE 0x00000002
#define DRM_IVPU_BO_CACHED 0x00000000
#define DRM_IVPU_BO_UNCACHED 0x00010000
#define DRM_IVPU_BO_WC 0x00020000
#define DRM_IVPU_BO_CACHE_MASK 0x00030000
#define DRM_IVPU_BO_FLAGS \
(DRM_IVPU_BO_HIGH_MEM | \
DRM_IVPU_BO_MAPPABLE | \
DRM_IVPU_BO_CACHE_MASK)
/**
* struct drm_ivpu_bo_create - Create BO backed by SHMEM
*
* Create GEM buffer object allocated in SHMEM memory.
*/
struct drm_ivpu_bo_create {
/** @size: The size in bytes of the allocated memory */
__u64 size;
/**
* @flags:
*
* Supported flags:
*
* %DRM_IVPU_BO_HIGH_MEM:
*
* Allocate VPU address from >4GB range.
* Buffer object with vpu address >4GB can be always accessed by the
* VPU DMA engine, but some HW generation may not be able to access
* this memory from then firmware running on the VPU management processor.
* Suitable for input, output and some scratch buffers.
*
* %DRM_IVPU_BO_MAPPABLE:
*
* Buffer object can be mapped using mmap().
*
* %DRM_IVPU_BO_CACHED:
*
* Allocated BO will be cached on host side (WB) and snooped on the VPU side.
* This is the default caching mode.
*
* %DRM_IVPU_BO_UNCACHED:
*
* Allocated BO will not be cached on host side nor snooped on the VPU side.
*
* %DRM_IVPU_BO_WC:
*
* Allocated BO will use write combining buffer for writes but reads will be
* uncached.
*/
__u32 flags;
/** @handle: Returned GEM object handle */
__u32 handle;
/** @vpu_addr: Returned VPU virtual address */
__u64 vpu_addr;
};
/**
* struct drm_ivpu_bo_info - Query buffer object info
*/
struct drm_ivpu_bo_info {
/** @handle: Handle of the queried BO */
__u32 handle;
/** @flags: Returned flags used to create the BO */
__u32 flags;
/** @vpu_addr: Returned VPU virtual address */
__u64 vpu_addr;
/**
* @mmap_offset:
*
* Returned offset to be used in mmap(). 0 in case the BO is not mappable.
*/
__u64 mmap_offset;
/** @size: Returned GEM object size, aligned to PAGE_SIZE */
__u64 size;
};
/* drm_ivpu_submit engines */
#define DRM_IVPU_ENGINE_COMPUTE 0
#define DRM_IVPU_ENGINE_COPY 1
/**
* struct drm_ivpu_submit - Submit commands to the VPU
*
* Execute a single command buffer on a given VPU engine.
* Handles to all referenced buffer objects have to be provided in @buffers_ptr.
*
* User space may wait on job completion using %DRM_IVPU_BO_WAIT ioctl.
*/
struct drm_ivpu_submit {
/**
* @buffers_ptr:
*
* A pointer to an u32 array of GEM handles of the BOs required for this job.
* The number of elements in the array must be equal to the value given by @buffer_count.
*
* The first BO is the command buffer. The rest of array has to contain all
* BOs referenced from the command buffer.
*/
__u64 buffers_ptr;
/** @buffer_count: Number of elements in the @buffers_ptr */
__u32 buffer_count;
/**
* @engine: Select the engine this job should be executed on
*
* %DRM_IVPU_ENGINE_COMPUTE:
*
* Performs Deep Learning Neural Compute Inference Operations
*
* %DRM_IVPU_ENGINE_COPY:
*
* Performs memory copy operations to/from system memory allocated for VPU
*/
__u32 engine;
/** @flags: Reserved for future use - must be zero */
__u32 flags;
/**
* @commands_offset:
*
* Offset inside the first buffer in @buffers_ptr containing commands
* to be executed. The offset has to be 8-byte aligned.
*/
__u32 commands_offset;
};
/* drm_ivpu_bo_wait job status codes */
#define DRM_IVPU_JOB_STATUS_SUCCESS 0
/**
* struct drm_ivpu_bo_wait - Wait for BO to become inactive
*
* Blocks until a given buffer object becomes inactive.
* With @timeout_ms set to 0 returns immediately.
*/
struct drm_ivpu_bo_wait {
/** @handle: Handle to the buffer object to be waited on */
__u32 handle;
/** @flags: Reserved for future use - must be zero */
__u32 flags;
/** @timeout_ns: Absolute timeout in nanoseconds (may be zero) */
__s64 timeout_ns;
/**
* @job_status:
*
* Job status code which is updated after the job is completed.
* &DRM_IVPU_JOB_STATUS_SUCCESS or device specific error otherwise.
* Valid only if @handle points to a command buffer.
*/
__u32 job_status;
/** @pad: Padding - must be zero */
__u32 pad;
};
#if defined(__cplusplus)
}
#endif
#endif /* __UAPI_IVPU_DRM_H__ */

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@@ -1,429 +0,0 @@
/* mga_drm.h -- Public header for the Matrox g200/g400 driver -*- linux-c -*-
* Created: Tue Jan 25 01:50:01 1999 by jhartmann@precisioninsight.com
*
* Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
* Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
* All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors:
* Jeff Hartmann <jhartmann@valinux.com>
* Keith Whitwell <keith@tungstengraphics.com>
*
* Rewritten by:
* Gareth Hughes <gareth@valinux.com>
*/
#ifndef __MGA_DRM_H__
#define __MGA_DRM_H__
#include "drm.h"
#if defined(__cplusplus)
extern "C" {
#endif
/* WARNING: If you change any of these defines, make sure to change the
* defines in the Xserver file (mga_sarea.h)
*/
#ifndef __MGA_SAREA_DEFINES__
#define __MGA_SAREA_DEFINES__
/* WARP pipe flags
*/
#define MGA_F 0x1 /* fog */
#define MGA_A 0x2 /* alpha */
#define MGA_S 0x4 /* specular */
#define MGA_T2 0x8 /* multitexture */
#define MGA_WARP_TGZ 0
#define MGA_WARP_TGZF (MGA_F)
#define MGA_WARP_TGZA (MGA_A)
#define MGA_WARP_TGZAF (MGA_F|MGA_A)
#define MGA_WARP_TGZS (MGA_S)
#define MGA_WARP_TGZSF (MGA_S|MGA_F)
#define MGA_WARP_TGZSA (MGA_S|MGA_A)
#define MGA_WARP_TGZSAF (MGA_S|MGA_F|MGA_A)
#define MGA_WARP_T2GZ (MGA_T2)
#define MGA_WARP_T2GZF (MGA_T2|MGA_F)
#define MGA_WARP_T2GZA (MGA_T2|MGA_A)
#define MGA_WARP_T2GZAF (MGA_T2|MGA_A|MGA_F)
#define MGA_WARP_T2GZS (MGA_T2|MGA_S)
#define MGA_WARP_T2GZSF (MGA_T2|MGA_S|MGA_F)
#define MGA_WARP_T2GZSA (MGA_T2|MGA_S|MGA_A)
#define MGA_WARP_T2GZSAF (MGA_T2|MGA_S|MGA_F|MGA_A)
#define MGA_MAX_G200_PIPES 8 /* no multitex */
#define MGA_MAX_G400_PIPES 16
#define MGA_MAX_WARP_PIPES MGA_MAX_G400_PIPES
#define MGA_WARP_UCODE_SIZE 32768 /* in bytes */
#define MGA_CARD_TYPE_G200 1
#define MGA_CARD_TYPE_G400 2
#define MGA_CARD_TYPE_G450 3 /* not currently used */
#define MGA_CARD_TYPE_G550 4
#define MGA_FRONT 0x1
#define MGA_BACK 0x2
#define MGA_DEPTH 0x4
/* What needs to be changed for the current vertex dma buffer?
*/
#define MGA_UPLOAD_CONTEXT 0x1
#define MGA_UPLOAD_TEX0 0x2
#define MGA_UPLOAD_TEX1 0x4
#define MGA_UPLOAD_PIPE 0x8
#define MGA_UPLOAD_TEX0IMAGE 0x10 /* handled client-side */
#define MGA_UPLOAD_TEX1IMAGE 0x20 /* handled client-side */
#define MGA_UPLOAD_2D 0x40
#define MGA_WAIT_AGE 0x80 /* handled client-side */
#define MGA_UPLOAD_CLIPRECTS 0x100 /* handled client-side */
#if 0
#define MGA_DMA_FLUSH 0x200 /* set when someone gets the lock
quiescent */
#endif
/* 32 buffers of 64k each, total 2 meg.
*/
#define MGA_BUFFER_SIZE (1 << 16)
#define MGA_NUM_BUFFERS 128
/* Keep these small for testing.
*/
#define MGA_NR_SAREA_CLIPRECTS 8
/* 2 heaps (1 for card, 1 for agp), each divided into up to 128
* regions, subject to a minimum region size of (1<<16) == 64k.
*
* Clients may subdivide regions internally, but when sharing between
* clients, the region size is the minimum granularity.
*/
#define MGA_CARD_HEAP 0
#define MGA_AGP_HEAP 1
#define MGA_NR_TEX_HEAPS 2
#define MGA_NR_TEX_REGIONS 16
#define MGA_LOG_MIN_TEX_REGION_SIZE 16
#define DRM_MGA_IDLE_RETRY 2048
#endif /* __MGA_SAREA_DEFINES__ */
/* Setup registers for 3D context
*/
typedef struct {
unsigned int dstorg;
unsigned int maccess;
unsigned int plnwt;
unsigned int dwgctl;
unsigned int alphactrl;
unsigned int fogcolor;
unsigned int wflag;
unsigned int tdualstage0;
unsigned int tdualstage1;
unsigned int fcol;
unsigned int stencil;
unsigned int stencilctl;
} drm_mga_context_regs_t;
/* Setup registers for 2D, X server
*/
typedef struct {
unsigned int pitch;
} drm_mga_server_regs_t;
/* Setup registers for each texture unit
*/
typedef struct {
unsigned int texctl;
unsigned int texctl2;
unsigned int texfilter;
unsigned int texbordercol;
unsigned int texorg;
unsigned int texwidth;
unsigned int texheight;
unsigned int texorg1;
unsigned int texorg2;
unsigned int texorg3;
unsigned int texorg4;
} drm_mga_texture_regs_t;
/* General aging mechanism
*/
typedef struct {
unsigned int head; /* Position of head pointer */
unsigned int wrap; /* Primary DMA wrap count */
} drm_mga_age_t;
typedef struct _drm_mga_sarea {
/* The channel for communication of state information to the kernel
* on firing a vertex dma buffer.
*/
drm_mga_context_regs_t context_state;
drm_mga_server_regs_t server_state;
drm_mga_texture_regs_t tex_state[2];
unsigned int warp_pipe;
unsigned int dirty;
unsigned int vertsize;
/* The current cliprects, or a subset thereof.
*/
struct drm_clip_rect boxes[MGA_NR_SAREA_CLIPRECTS];
unsigned int nbox;
/* Information about the most recently used 3d drawable. The
* client fills in the req_* fields, the server fills in the
* exported_ fields and puts the cliprects into boxes, above.
*
* The client clears the exported_drawable field before
* clobbering the boxes data.
*/
unsigned int req_drawable; /* the X drawable id */
unsigned int req_draw_buffer; /* MGA_FRONT or MGA_BACK */
unsigned int exported_drawable;
unsigned int exported_index;
unsigned int exported_stamp;
unsigned int exported_buffers;
unsigned int exported_nfront;
unsigned int exported_nback;
int exported_back_x, exported_front_x, exported_w;
int exported_back_y, exported_front_y, exported_h;
struct drm_clip_rect exported_boxes[MGA_NR_SAREA_CLIPRECTS];
/* Counters for aging textures and for client-side throttling.
*/
unsigned int status[4];
unsigned int last_wrap;
drm_mga_age_t last_frame;
unsigned int last_enqueue; /* last time a buffer was enqueued */
unsigned int last_dispatch; /* age of the most recently dispatched buffer */
unsigned int last_quiescent; /* */
/* LRU lists for texture memory in agp space and on the card.
*/
struct drm_tex_region texList[MGA_NR_TEX_HEAPS][MGA_NR_TEX_REGIONS + 1];
unsigned int texAge[MGA_NR_TEX_HEAPS];
/* Mechanism to validate card state.
*/
int ctxOwner;
} drm_mga_sarea_t;
/* MGA specific ioctls
* The device specific ioctl range is 0x40 to 0x79.
*/
#define DRM_MGA_INIT 0x00
#define DRM_MGA_FLUSH 0x01
#define DRM_MGA_RESET 0x02
#define DRM_MGA_SWAP 0x03
#define DRM_MGA_CLEAR 0x04
#define DRM_MGA_VERTEX 0x05
#define DRM_MGA_INDICES 0x06
#define DRM_MGA_ILOAD 0x07
#define DRM_MGA_BLIT 0x08
#define DRM_MGA_GETPARAM 0x09
/* 3.2:
* ioctls for operating on fences.
*/
#define DRM_MGA_SET_FENCE 0x0a
#define DRM_MGA_WAIT_FENCE 0x0b
#define DRM_MGA_DMA_BOOTSTRAP 0x0c
#define DRM_IOCTL_MGA_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_INIT, drm_mga_init_t)
#define DRM_IOCTL_MGA_FLUSH DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_FLUSH, struct drm_lock)
#define DRM_IOCTL_MGA_RESET DRM_IO( DRM_COMMAND_BASE + DRM_MGA_RESET)
#define DRM_IOCTL_MGA_SWAP DRM_IO( DRM_COMMAND_BASE + DRM_MGA_SWAP)
#define DRM_IOCTL_MGA_CLEAR DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_CLEAR, drm_mga_clear_t)
#define DRM_IOCTL_MGA_VERTEX DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_VERTEX, drm_mga_vertex_t)
#define DRM_IOCTL_MGA_INDICES DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_INDICES, drm_mga_indices_t)
#define DRM_IOCTL_MGA_ILOAD DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_ILOAD, drm_mga_iload_t)
#define DRM_IOCTL_MGA_BLIT DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_BLIT, drm_mga_blit_t)
#define DRM_IOCTL_MGA_GETPARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_MGA_GETPARAM, drm_mga_getparam_t)
#define DRM_IOCTL_MGA_SET_FENCE DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_SET_FENCE, __u32)
#define DRM_IOCTL_MGA_WAIT_FENCE DRM_IOWR(DRM_COMMAND_BASE + DRM_MGA_WAIT_FENCE, __u32)
#define DRM_IOCTL_MGA_DMA_BOOTSTRAP DRM_IOWR(DRM_COMMAND_BASE + DRM_MGA_DMA_BOOTSTRAP, drm_mga_dma_bootstrap_t)
typedef struct _drm_mga_warp_index {
int installed;
unsigned long phys_addr;
int size;
} drm_mga_warp_index_t;
typedef struct drm_mga_init {
enum {
MGA_INIT_DMA = 0x01,
MGA_CLEANUP_DMA = 0x02
} func;
unsigned long sarea_priv_offset;
__struct_group(/* no tag */, always32bit, /* no attrs */,
int chipset;
int sgram;
unsigned int maccess;
unsigned int fb_cpp;
unsigned int front_offset, front_pitch;
unsigned int back_offset, back_pitch;
unsigned int depth_cpp;
unsigned int depth_offset, depth_pitch;
unsigned int texture_offset[MGA_NR_TEX_HEAPS];
unsigned int texture_size[MGA_NR_TEX_HEAPS];
);
unsigned long fb_offset;
unsigned long mmio_offset;
unsigned long status_offset;
unsigned long warp_offset;
unsigned long primary_offset;
unsigned long buffers_offset;
} drm_mga_init_t;
typedef struct drm_mga_dma_bootstrap {
/**
* \name AGP texture region
*
* On return from the DRM_MGA_DMA_BOOTSTRAP ioctl, these fields will
* be filled in with the actual AGP texture settings.
*
* \warning
* If these fields are non-zero, but dma_mga_dma_bootstrap::agp_mode
* is zero, it means that PCI memory (most likely through the use of
* an IOMMU) is being used for "AGP" textures.
*/
/*@{ */
unsigned long texture_handle; /**< Handle used to map AGP textures. */
__u32 texture_size; /**< Size of the AGP texture region. */
/*@} */
/**
* Requested size of the primary DMA region.
*
* On return from the DRM_MGA_DMA_BOOTSTRAP ioctl, this field will be
* filled in with the actual AGP mode. If AGP was not available
*/
__u32 primary_size;
/**
* Requested number of secondary DMA buffers.
*
* On return from the DRM_MGA_DMA_BOOTSTRAP ioctl, this field will be
* filled in with the actual number of secondary DMA buffers
* allocated. Particularly when PCI DMA is used, this may be
* (subtantially) less than the number requested.
*/
__u32 secondary_bin_count;
/**
* Requested size of each secondary DMA buffer.
*
* While the kernel \b is free to reduce
* dma_mga_dma_bootstrap::secondary_bin_count, it is \b not allowed
* to reduce dma_mga_dma_bootstrap::secondary_bin_size.
*/
__u32 secondary_bin_size;
/**
* Bit-wise mask of AGPSTAT2_* values. Currently only \c AGPSTAT2_1X,
* \c AGPSTAT2_2X, and \c AGPSTAT2_4X are supported. If this value is
* zero, it means that PCI DMA should be used, even if AGP is
* possible.
*
* On return from the DRM_MGA_DMA_BOOTSTRAP ioctl, this field will be
* filled in with the actual AGP mode. If AGP was not available
* (i.e., PCI DMA was used), this value will be zero.
*/
__u32 agp_mode;
/**
* Desired AGP GART size, measured in megabytes.
*/
__u8 agp_size;
} drm_mga_dma_bootstrap_t;
typedef struct drm_mga_clear {
unsigned int flags;
unsigned int clear_color;
unsigned int clear_depth;
unsigned int color_mask;
unsigned int depth_mask;
} drm_mga_clear_t;
typedef struct drm_mga_vertex {
int idx; /* buffer to queue */
int used; /* bytes in use */
int discard; /* client finished with buffer? */
} drm_mga_vertex_t;
typedef struct drm_mga_indices {
int idx; /* buffer to queue */
unsigned int start;
unsigned int end;
int discard; /* client finished with buffer? */
} drm_mga_indices_t;
typedef struct drm_mga_iload {
int idx;
unsigned int dstorg;
unsigned int length;
} drm_mga_iload_t;
typedef struct _drm_mga_blit {
unsigned int planemask;
unsigned int srcorg;
unsigned int dstorg;
int src_pitch, dst_pitch;
int delta_sx, delta_sy;
int delta_dx, delta_dy;
int height, ydir; /* flip image vertically */
int source_pitch, dest_pitch;
} drm_mga_blit_t;
/* 3.1: An ioctl to get parameters that aren't available to the 3d
* client any other way.
*/
#define MGA_PARAM_IRQ_NR 1
/* 3.2: Query the actual card type. The DDX only distinguishes between
* G200 chips and non-G200 chips, which it calls G400. It turns out that
* there are some very sublte differences between the G4x0 chips and the G550
* chips. Using this parameter query, a client-side driver can detect the
* difference between a G4x0 and a G550.
*/
#define MGA_PARAM_CARD_TYPE 2
typedef struct drm_mga_getparam {
int param;
void *value;
} drm_mga_getparam_t;
#if defined(__cplusplus)
}
#endif
#endif

View File

@@ -67,16 +67,25 @@ struct drm_msm_timespec {
__s64 tv_nsec; /* nanoseconds */
};
#define MSM_PARAM_GPU_ID 0x01
#define MSM_PARAM_GMEM_SIZE 0x02
#define MSM_PARAM_CHIP_ID 0x03
#define MSM_PARAM_MAX_FREQ 0x04
#define MSM_PARAM_TIMESTAMP 0x05
#define MSM_PARAM_GMEM_BASE 0x06
#define MSM_PARAM_PRIORITIES 0x07 /* The # of priority levels */
#define MSM_PARAM_PP_PGTABLE 0x08 /* => 1 for per-process pagetables, else 0 */
#define MSM_PARAM_FAULTS 0x09
#define MSM_PARAM_SUSPENDS 0x0a
/* Below "RO" indicates a read-only param, "WO" indicates write-only, and
* "RW" indicates a param that can be both read (GET_PARAM) and written
* (SET_PARAM)
*/
#define MSM_PARAM_GPU_ID 0x01 /* RO */
#define MSM_PARAM_GMEM_SIZE 0x02 /* RO */
#define MSM_PARAM_CHIP_ID 0x03 /* RO */
#define MSM_PARAM_MAX_FREQ 0x04 /* RO */
#define MSM_PARAM_TIMESTAMP 0x05 /* RO */
#define MSM_PARAM_GMEM_BASE 0x06 /* RO */
#define MSM_PARAM_PRIORITIES 0x07 /* RO: The # of priority levels */
#define MSM_PARAM_PP_PGTABLE 0x08 /* RO: Deprecated, always returns zero */
#define MSM_PARAM_FAULTS 0x09 /* RO */
#define MSM_PARAM_SUSPENDS 0x0a /* RO */
#define MSM_PARAM_SYSPROF 0x0b /* WO: 1 preserves perfcntrs, 2 also disables suspend */
#define MSM_PARAM_COMM 0x0c /* WO: override for task->comm */
#define MSM_PARAM_CMDLINE 0x0d /* WO: override for task cmdline */
#define MSM_PARAM_VA_START 0x0e /* RO: start of valid GPU iova range */
#define MSM_PARAM_VA_SIZE 0x0f /* RO: size of valid GPU iova range (bytes) */
/* For backwards compat. The original support for preemption was based on
* a single ring per priority level so # of priority levels equals the #
@@ -90,6 +99,8 @@ struct drm_msm_param {
__u32 pipe; /* in, MSM_PIPE_x */
__u32 param; /* in, MSM_PARAM_x */
__u64 value; /* out (get_param) or in (set_param) */
__u32 len; /* zero for non-pointer params */
__u32 pad; /* must be zero */
};
/*
@@ -126,6 +137,8 @@ struct drm_msm_gem_new {
#define MSM_INFO_GET_IOVA 0x01 /* get iova, returned by value */
#define MSM_INFO_SET_NAME 0x02 /* set the debug name (by pointer) */
#define MSM_INFO_GET_NAME 0x03 /* get debug name, returned by pointer */
#define MSM_INFO_SET_IOVA 0x04 /* set the iova, passed by value */
#define MSM_INFO_GET_FLAGS 0x05 /* get the MSM_BO_x flags */
struct drm_msm_gem_info {
__u32 handle; /* in */
@@ -209,10 +222,12 @@ struct drm_msm_gem_submit_cmd {
#define MSM_SUBMIT_BO_READ 0x0001
#define MSM_SUBMIT_BO_WRITE 0x0002
#define MSM_SUBMIT_BO_DUMP 0x0004
#define MSM_SUBMIT_BO_NO_IMPLICIT 0x0008
#define MSM_SUBMIT_BO_FLAGS (MSM_SUBMIT_BO_READ | \
MSM_SUBMIT_BO_WRITE | \
MSM_SUBMIT_BO_DUMP)
MSM_SUBMIT_BO_DUMP | \
MSM_SUBMIT_BO_NO_IMPLICIT)
struct drm_msm_gem_submit_bo {
__u32 flags; /* in, mask of MSM_SUBMIT_BO_x */
@@ -227,6 +242,7 @@ struct drm_msm_gem_submit_bo {
#define MSM_SUBMIT_SUDO 0x10000000 /* run submitted cmds from RB */
#define MSM_SUBMIT_SYNCOBJ_IN 0x08000000 /* enable input syncobj */
#define MSM_SUBMIT_SYNCOBJ_OUT 0x04000000 /* enable output syncobj */
#define MSM_SUBMIT_FENCE_SN_IN 0x02000000 /* userspace passes in seqno fence */
#define MSM_SUBMIT_FLAGS ( \
MSM_SUBMIT_NO_IMPLICIT | \
MSM_SUBMIT_FENCE_FD_IN | \
@@ -234,6 +250,7 @@ struct drm_msm_gem_submit_bo {
MSM_SUBMIT_SUDO | \
MSM_SUBMIT_SYNCOBJ_IN | \
MSM_SUBMIT_SYNCOBJ_OUT | \
MSM_SUBMIT_FENCE_SN_IN | \
0)
#define MSM_SUBMIT_SYNCOBJ_RESET 0x00000001 /* Reset syncobj after wait. */
@@ -253,7 +270,7 @@ struct drm_msm_gem_submit_syncobj {
*/
struct drm_msm_gem_submit {
__u32 flags; /* MSM_PIPE_x | MSM_SUBMIT_x */
__u32 fence; /* out */
__u32 fence; /* out (or in with MSM_SUBMIT_FENCE_SN_IN flag) */
__u32 nr_bos; /* in, number of submit_bo's */
__u32 nr_cmds; /* in, number of submit_cmd's */
__u64 bos; /* in, ptr to array of submit_bo's */
@@ -333,9 +350,7 @@ struct drm_msm_submitqueue_query {
};
#define DRM_MSM_GET_PARAM 0x00
/* placeholder:
#define DRM_MSM_SET_PARAM 0x01
*/
#define DRM_MSM_GEM_NEW 0x02
#define DRM_MSM_GEM_INFO 0x03
#define DRM_MSM_GEM_CPU_PREP 0x04
@@ -351,6 +366,7 @@ struct drm_msm_submitqueue_query {
#define DRM_MSM_SUBMITQUEUE_QUERY 0x0C
#define DRM_IOCTL_MSM_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GET_PARAM, struct drm_msm_param)
#define DRM_IOCTL_MSM_SET_PARAM DRM_IOW (DRM_COMMAND_BASE + DRM_MSM_SET_PARAM, struct drm_msm_param)
#define DRM_IOCTL_MSM_GEM_NEW DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GEM_NEW, struct drm_msm_gem_new)
#define DRM_IOCTL_MSM_GEM_INFO DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GEM_INFO, struct drm_msm_gem_info)
#define DRM_IOCTL_MSM_GEM_CPU_PREP DRM_IOW (DRM_COMMAND_BASE + DRM_MSM_GEM_CPU_PREP, struct drm_msm_gem_cpu_prep)

View File

@@ -84,14 +84,14 @@ struct drm_panfrost_wait_bo {
__s64 timeout_ns; /* absolute */
};
/* Valid flags to pass to drm_panfrost_create_bo */
#define PANFROST_BO_NOEXEC 1
#define PANFROST_BO_HEAP 2
/**
* struct drm_panfrost_create_bo - ioctl argument for creating Panfrost BOs.
*
* There are currently no values for the flags argument, but it may be
* used in a future extension.
* The flags argument is a bit mask of PANFROST_BO_* flags.
*/
struct drm_panfrost_create_bo {
__u32 size;
@@ -224,6 +224,57 @@ struct drm_panfrost_madvise {
__u32 retained; /* out, whether backing store still exists */
};
/* Definitions for coredump decoding in user space */
#define PANFROSTDUMP_MAJOR 1
#define PANFROSTDUMP_MINOR 0
#define PANFROSTDUMP_MAGIC 0x464E4150 /* PANF */
#define PANFROSTDUMP_BUF_REG 0
#define PANFROSTDUMP_BUF_BOMAP (PANFROSTDUMP_BUF_REG + 1)
#define PANFROSTDUMP_BUF_BO (PANFROSTDUMP_BUF_BOMAP + 1)
#define PANFROSTDUMP_BUF_TRAILER (PANFROSTDUMP_BUF_BO + 1)
/*
* This structure is the native endianness of the dumping machine, tools can
* detect the endianness by looking at the value in 'magic'.
*/
struct panfrost_dump_object_header {
__u32 magic;
__u32 type;
__u32 file_size;
__u32 file_offset;
union {
struct {
__u64 jc;
__u32 gpu_id;
__u32 major;
__u32 minor;
__u64 nbos;
} reghdr;
struct {
__u32 valid;
__u64 iova;
__u32 data[2];
} bomap;
/*
* Force same size in case we want to expand the header
* with new fields and also keep it 512-byte aligned
*/
__u32 sizer[496];
};
};
/* Registers object, an array of these */
struct panfrost_dump_registers {
__u32 reg;
__u32 value;
};
#if defined(__cplusplus)
}
#endif

View File

@@ -1,336 +0,0 @@
/* r128_drm.h -- Public header for the r128 driver -*- linux-c -*-
* Created: Wed Apr 5 19:24:19 2000 by kevin@precisioninsight.com
*/
/*
* Copyright 2000 Precision Insight, Inc., Cedar Park, Texas.
* Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
* All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*
* Authors:
* Gareth Hughes <gareth@valinux.com>
* Kevin E. Martin <martin@valinux.com>
*/
#ifndef __R128_DRM_H__
#define __R128_DRM_H__
#include "drm.h"
#if defined(__cplusplus)
extern "C" {
#endif
/* WARNING: If you change any of these defines, make sure to change the
* defines in the X server file (r128_sarea.h)
*/
#ifndef __R128_SAREA_DEFINES__
#define __R128_SAREA_DEFINES__
/* What needs to be changed for the current vertex buffer?
*/
#define R128_UPLOAD_CONTEXT 0x001
#define R128_UPLOAD_SETUP 0x002
#define R128_UPLOAD_TEX0 0x004
#define R128_UPLOAD_TEX1 0x008
#define R128_UPLOAD_TEX0IMAGES 0x010
#define R128_UPLOAD_TEX1IMAGES 0x020
#define R128_UPLOAD_CORE 0x040
#define R128_UPLOAD_MASKS 0x080
#define R128_UPLOAD_WINDOW 0x100
#define R128_UPLOAD_CLIPRECTS 0x200 /* handled client-side */
#define R128_REQUIRE_QUIESCENCE 0x400
#define R128_UPLOAD_ALL 0x7ff
#define R128_FRONT 0x1
#define R128_BACK 0x2
#define R128_DEPTH 0x4
/* Primitive types
*/
#define R128_POINTS 0x1
#define R128_LINES 0x2
#define R128_LINE_STRIP 0x3
#define R128_TRIANGLES 0x4
#define R128_TRIANGLE_FAN 0x5
#define R128_TRIANGLE_STRIP 0x6
/* Vertex/indirect buffer size
*/
#define R128_BUFFER_SIZE 16384
/* Byte offsets for indirect buffer data
*/
#define R128_INDEX_PRIM_OFFSET 20
#define R128_HOSTDATA_BLIT_OFFSET 32
/* Keep these small for testing.
*/
#define R128_NR_SAREA_CLIPRECTS 12
/* There are 2 heaps (local/AGP). Each region within a heap is a
* minimum of 64k, and there are at most 64 of them per heap.
*/
#define R128_LOCAL_TEX_HEAP 0
#define R128_AGP_TEX_HEAP 1
#define R128_NR_TEX_HEAPS 2
#define R128_NR_TEX_REGIONS 64
#define R128_LOG_TEX_GRANULARITY 16
#define R128_NR_CONTEXT_REGS 12
#define R128_MAX_TEXTURE_LEVELS 11
#define R128_MAX_TEXTURE_UNITS 2
#endif /* __R128_SAREA_DEFINES__ */
typedef struct {
/* Context state - can be written in one large chunk */
unsigned int dst_pitch_offset_c;
unsigned int dp_gui_master_cntl_c;
unsigned int sc_top_left_c;
unsigned int sc_bottom_right_c;
unsigned int z_offset_c;
unsigned int z_pitch_c;
unsigned int z_sten_cntl_c;
unsigned int tex_cntl_c;
unsigned int misc_3d_state_cntl_reg;
unsigned int texture_clr_cmp_clr_c;
unsigned int texture_clr_cmp_msk_c;
unsigned int fog_color_c;
/* Texture state */
unsigned int tex_size_pitch_c;
unsigned int constant_color_c;
/* Setup state */
unsigned int pm4_vc_fpu_setup;
unsigned int setup_cntl;
/* Mask state */
unsigned int dp_write_mask;
unsigned int sten_ref_mask_c;
unsigned int plane_3d_mask_c;
/* Window state */
unsigned int window_xy_offset;
/* Core state */
unsigned int scale_3d_cntl;
} drm_r128_context_regs_t;
/* Setup registers for each texture unit
*/
typedef struct {
unsigned int tex_cntl;
unsigned int tex_combine_cntl;
unsigned int tex_size_pitch;
unsigned int tex_offset[R128_MAX_TEXTURE_LEVELS];
unsigned int tex_border_color;
} drm_r128_texture_regs_t;
typedef struct drm_r128_sarea {
/* The channel for communication of state information to the kernel
* on firing a vertex buffer.
*/
drm_r128_context_regs_t context_state;
drm_r128_texture_regs_t tex_state[R128_MAX_TEXTURE_UNITS];
unsigned int dirty;
unsigned int vertsize;
unsigned int vc_format;
/* The current cliprects, or a subset thereof.
*/
struct drm_clip_rect boxes[R128_NR_SAREA_CLIPRECTS];
unsigned int nbox;
/* Counters for client-side throttling of rendering clients.
*/
unsigned int last_frame;
unsigned int last_dispatch;
struct drm_tex_region tex_list[R128_NR_TEX_HEAPS][R128_NR_TEX_REGIONS + 1];
unsigned int tex_age[R128_NR_TEX_HEAPS];
int ctx_owner;
int pfAllowPageFlip; /* number of 3d windows (0,1,2 or more) */
int pfCurrentPage; /* which buffer is being displayed? */
} drm_r128_sarea_t;
/* WARNING: If you change any of these defines, make sure to change the
* defines in the Xserver file (xf86drmR128.h)
*/
/* Rage 128 specific ioctls
* The device specific ioctl range is 0x40 to 0x79.
*/
#define DRM_R128_INIT 0x00
#define DRM_R128_CCE_START 0x01
#define DRM_R128_CCE_STOP 0x02
#define DRM_R128_CCE_RESET 0x03
#define DRM_R128_CCE_IDLE 0x04
/* 0x05 not used */
#define DRM_R128_RESET 0x06
#define DRM_R128_SWAP 0x07
#define DRM_R128_CLEAR 0x08
#define DRM_R128_VERTEX 0x09
#define DRM_R128_INDICES 0x0a
#define DRM_R128_BLIT 0x0b
#define DRM_R128_DEPTH 0x0c
#define DRM_R128_STIPPLE 0x0d
/* 0x0e not used */
#define DRM_R128_INDIRECT 0x0f
#define DRM_R128_FULLSCREEN 0x10
#define DRM_R128_CLEAR2 0x11
#define DRM_R128_GETPARAM 0x12
#define DRM_R128_FLIP 0x13
#define DRM_IOCTL_R128_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_R128_INIT, drm_r128_init_t)
#define DRM_IOCTL_R128_CCE_START DRM_IO( DRM_COMMAND_BASE + DRM_R128_CCE_START)
#define DRM_IOCTL_R128_CCE_STOP DRM_IOW( DRM_COMMAND_BASE + DRM_R128_CCE_STOP, drm_r128_cce_stop_t)
#define DRM_IOCTL_R128_CCE_RESET DRM_IO( DRM_COMMAND_BASE + DRM_R128_CCE_RESET)
#define DRM_IOCTL_R128_CCE_IDLE DRM_IO( DRM_COMMAND_BASE + DRM_R128_CCE_IDLE)
/* 0x05 not used */
#define DRM_IOCTL_R128_RESET DRM_IO( DRM_COMMAND_BASE + DRM_R128_RESET)
#define DRM_IOCTL_R128_SWAP DRM_IO( DRM_COMMAND_BASE + DRM_R128_SWAP)
#define DRM_IOCTL_R128_CLEAR DRM_IOW( DRM_COMMAND_BASE + DRM_R128_CLEAR, drm_r128_clear_t)
#define DRM_IOCTL_R128_VERTEX DRM_IOW( DRM_COMMAND_BASE + DRM_R128_VERTEX, drm_r128_vertex_t)
#define DRM_IOCTL_R128_INDICES DRM_IOW( DRM_COMMAND_BASE + DRM_R128_INDICES, drm_r128_indices_t)
#define DRM_IOCTL_R128_BLIT DRM_IOW( DRM_COMMAND_BASE + DRM_R128_BLIT, drm_r128_blit_t)
#define DRM_IOCTL_R128_DEPTH DRM_IOW( DRM_COMMAND_BASE + DRM_R128_DEPTH, drm_r128_depth_t)
#define DRM_IOCTL_R128_STIPPLE DRM_IOW( DRM_COMMAND_BASE + DRM_R128_STIPPLE, drm_r128_stipple_t)
/* 0x0e not used */
#define DRM_IOCTL_R128_INDIRECT DRM_IOWR(DRM_COMMAND_BASE + DRM_R128_INDIRECT, drm_r128_indirect_t)
#define DRM_IOCTL_R128_FULLSCREEN DRM_IOW( DRM_COMMAND_BASE + DRM_R128_FULLSCREEN, drm_r128_fullscreen_t)
#define DRM_IOCTL_R128_CLEAR2 DRM_IOW( DRM_COMMAND_BASE + DRM_R128_CLEAR2, drm_r128_clear2_t)
#define DRM_IOCTL_R128_GETPARAM DRM_IOWR( DRM_COMMAND_BASE + DRM_R128_GETPARAM, drm_r128_getparam_t)
#define DRM_IOCTL_R128_FLIP DRM_IO( DRM_COMMAND_BASE + DRM_R128_FLIP)
typedef struct drm_r128_init {
enum {
R128_INIT_CCE = 0x01,
R128_CLEANUP_CCE = 0x02
} func;
unsigned long sarea_priv_offset;
int is_pci;
int cce_mode;
int cce_secure;
int ring_size;
int usec_timeout;
unsigned int fb_bpp;
unsigned int front_offset, front_pitch;
unsigned int back_offset, back_pitch;
unsigned int depth_bpp;
unsigned int depth_offset, depth_pitch;
unsigned int span_offset;
unsigned long fb_offset;
unsigned long mmio_offset;
unsigned long ring_offset;
unsigned long ring_rptr_offset;
unsigned long buffers_offset;
unsigned long agp_textures_offset;
} drm_r128_init_t;
typedef struct drm_r128_cce_stop {
int flush;
int idle;
} drm_r128_cce_stop_t;
typedef struct drm_r128_clear {
unsigned int flags;
unsigned int clear_color;
unsigned int clear_depth;
unsigned int color_mask;
unsigned int depth_mask;
} drm_r128_clear_t;
typedef struct drm_r128_vertex {
int prim;
int idx; /* Index of vertex buffer */
int count; /* Number of vertices in buffer */
int discard; /* Client finished with buffer? */
} drm_r128_vertex_t;
typedef struct drm_r128_indices {
int prim;
int idx;
int start;
int end;
int discard; /* Client finished with buffer? */
} drm_r128_indices_t;
typedef struct drm_r128_blit {
int idx;
int pitch;
int offset;
int format;
unsigned short x, y;
unsigned short width, height;
} drm_r128_blit_t;
typedef struct drm_r128_depth {
enum {
R128_WRITE_SPAN = 0x01,
R128_WRITE_PIXELS = 0x02,
R128_READ_SPAN = 0x03,
R128_READ_PIXELS = 0x04
} func;
int n;
int *x;
int *y;
unsigned int *buffer;
unsigned char *mask;
} drm_r128_depth_t;
typedef struct drm_r128_stipple {
unsigned int *mask;
} drm_r128_stipple_t;
typedef struct drm_r128_indirect {
int idx;
int start;
int end;
int discard;
} drm_r128_indirect_t;
typedef struct drm_r128_fullscreen {
enum {
R128_INIT_FULLSCREEN = 0x01,
R128_CLEANUP_FULLSCREEN = 0x02
} func;
} drm_r128_fullscreen_t;
/* 2.3: An ioctl to get parameters that aren't available to the 3d
* client any other way.
*/
#define R128_PARAM_IRQ_NR 1
typedef struct drm_r128_getparam {
int param;
void *value;
} drm_r128_getparam_t;
#if defined(__cplusplus)
}
#endif
#endif

View File

@@ -1,220 +0,0 @@
/* savage_drm.h -- Public header for the savage driver
*
* Copyright 2004 Felix Kuehling
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sub license,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. IN NO EVENT SHALL FELIX KUEHLING BE LIABLE FOR
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF
* CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#ifndef __SAVAGE_DRM_H__
#define __SAVAGE_DRM_H__
#include "drm.h"
#if defined(__cplusplus)
extern "C" {
#endif
#ifndef __SAVAGE_SAREA_DEFINES__
#define __SAVAGE_SAREA_DEFINES__
/* 2 heaps (1 for card, 1 for agp), each divided into up to 128
* regions, subject to a minimum region size of (1<<16) == 64k.
*
* Clients may subdivide regions internally, but when sharing between
* clients, the region size is the minimum granularity.
*/
#define SAVAGE_CARD_HEAP 0
#define SAVAGE_AGP_HEAP 1
#define SAVAGE_NR_TEX_HEAPS 2
#define SAVAGE_NR_TEX_REGIONS 16
#define SAVAGE_LOG_MIN_TEX_REGION_SIZE 16
#endif /* __SAVAGE_SAREA_DEFINES__ */
typedef struct _drm_savage_sarea {
/* LRU lists for texture memory in agp space and on the card.
*/
struct drm_tex_region texList[SAVAGE_NR_TEX_HEAPS][SAVAGE_NR_TEX_REGIONS +
1];
unsigned int texAge[SAVAGE_NR_TEX_HEAPS];
/* Mechanism to validate card state.
*/
int ctxOwner;
} drm_savage_sarea_t, *drm_savage_sarea_ptr;
/* Savage-specific ioctls
*/
#define DRM_SAVAGE_BCI_INIT 0x00
#define DRM_SAVAGE_BCI_CMDBUF 0x01
#define DRM_SAVAGE_BCI_EVENT_EMIT 0x02
#define DRM_SAVAGE_BCI_EVENT_WAIT 0x03
#define DRM_IOCTL_SAVAGE_BCI_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_SAVAGE_BCI_INIT, drm_savage_init_t)
#define DRM_IOCTL_SAVAGE_BCI_CMDBUF DRM_IOW( DRM_COMMAND_BASE + DRM_SAVAGE_BCI_CMDBUF, drm_savage_cmdbuf_t)
#define DRM_IOCTL_SAVAGE_BCI_EVENT_EMIT DRM_IOWR(DRM_COMMAND_BASE + DRM_SAVAGE_BCI_EVENT_EMIT, drm_savage_event_emit_t)
#define DRM_IOCTL_SAVAGE_BCI_EVENT_WAIT DRM_IOW( DRM_COMMAND_BASE + DRM_SAVAGE_BCI_EVENT_WAIT, drm_savage_event_wait_t)
#define SAVAGE_DMA_PCI 1
#define SAVAGE_DMA_AGP 3
typedef struct drm_savage_init {
enum {
SAVAGE_INIT_BCI = 1,
SAVAGE_CLEANUP_BCI = 2
} func;
unsigned int sarea_priv_offset;
/* some parameters */
unsigned int cob_size;
unsigned int bci_threshold_lo, bci_threshold_hi;
unsigned int dma_type;
/* frame buffer layout */
unsigned int fb_bpp;
unsigned int front_offset, front_pitch;
unsigned int back_offset, back_pitch;
unsigned int depth_bpp;
unsigned int depth_offset, depth_pitch;
/* local textures */
unsigned int texture_offset;
unsigned int texture_size;
/* physical locations of non-permanent maps */
unsigned long status_offset;
unsigned long buffers_offset;
unsigned long agp_textures_offset;
unsigned long cmd_dma_offset;
} drm_savage_init_t;
typedef union drm_savage_cmd_header drm_savage_cmd_header_t;
typedef struct drm_savage_cmdbuf {
/* command buffer in client's address space */
drm_savage_cmd_header_t *cmd_addr;
unsigned int size; /* size of the command buffer in 64bit units */
unsigned int dma_idx; /* DMA buffer index to use */
int discard; /* discard DMA buffer when done */
/* vertex buffer in client's address space */
unsigned int *vb_addr;
unsigned int vb_size; /* size of client vertex buffer in bytes */
unsigned int vb_stride; /* stride of vertices in 32bit words */
/* boxes in client's address space */
struct drm_clip_rect *box_addr;
unsigned int nbox; /* number of clipping boxes */
} drm_savage_cmdbuf_t;
#define SAVAGE_WAIT_2D 0x1 /* wait for 2D idle before updating event tag */
#define SAVAGE_WAIT_3D 0x2 /* wait for 3D idle before updating event tag */
#define SAVAGE_WAIT_IRQ 0x4 /* emit or wait for IRQ, not implemented yet */
typedef struct drm_savage_event {
unsigned int count;
unsigned int flags;
} drm_savage_event_emit_t, drm_savage_event_wait_t;
/* Commands for the cmdbuf ioctl
*/
#define SAVAGE_CMD_STATE 0 /* a range of state registers */
#define SAVAGE_CMD_DMA_PRIM 1 /* vertices from DMA buffer */
#define SAVAGE_CMD_VB_PRIM 2 /* vertices from client vertex buffer */
#define SAVAGE_CMD_DMA_IDX 3 /* indexed vertices from DMA buffer */
#define SAVAGE_CMD_VB_IDX 4 /* indexed vertices client vertex buffer */
#define SAVAGE_CMD_CLEAR 5 /* clear buffers */
#define SAVAGE_CMD_SWAP 6 /* swap buffers */
/* Primitive types
*/
#define SAVAGE_PRIM_TRILIST 0 /* triangle list */
#define SAVAGE_PRIM_TRISTRIP 1 /* triangle strip */
#define SAVAGE_PRIM_TRIFAN 2 /* triangle fan */
#define SAVAGE_PRIM_TRILIST_201 3 /* reorder verts for correct flat
* shading on s3d */
/* Skip flags (vertex format)
*/
#define SAVAGE_SKIP_Z 0x01
#define SAVAGE_SKIP_W 0x02
#define SAVAGE_SKIP_C0 0x04
#define SAVAGE_SKIP_C1 0x08
#define SAVAGE_SKIP_S0 0x10
#define SAVAGE_SKIP_T0 0x20
#define SAVAGE_SKIP_ST0 0x30
#define SAVAGE_SKIP_S1 0x40
#define SAVAGE_SKIP_T1 0x80
#define SAVAGE_SKIP_ST1 0xc0
#define SAVAGE_SKIP_ALL_S3D 0x3f
#define SAVAGE_SKIP_ALL_S4 0xff
/* Buffer names for clear command
*/
#define SAVAGE_FRONT 0x1
#define SAVAGE_BACK 0x2
#define SAVAGE_DEPTH 0x4
/* 64-bit command header
*/
union drm_savage_cmd_header {
struct {
unsigned char cmd; /* command */
unsigned char pad0;
unsigned short pad1;
unsigned short pad2;
unsigned short pad3;
} cmd; /* generic */
struct {
unsigned char cmd;
unsigned char global; /* need idle engine? */
unsigned short count; /* number of consecutive registers */
unsigned short start; /* first register */
unsigned short pad3;
} state; /* SAVAGE_CMD_STATE */
struct {
unsigned char cmd;
unsigned char prim; /* primitive type */
unsigned short skip; /* vertex format (skip flags) */
unsigned short count; /* number of vertices */
unsigned short start; /* first vertex in DMA/vertex buffer */
} prim; /* SAVAGE_CMD_DMA_PRIM, SAVAGE_CMD_VB_PRIM */
struct {
unsigned char cmd;
unsigned char prim;
unsigned short skip;
unsigned short count; /* number of indices that follow */
unsigned short pad3;
} idx; /* SAVAGE_CMD_DMA_IDX, SAVAGE_CMD_VB_IDX */
struct {
unsigned char cmd;
unsigned char pad0;
unsigned short pad1;
unsigned int flags;
} clear0; /* SAVAGE_CMD_CLEAR */
struct {
unsigned int mask;
unsigned int value;
} clear1; /* SAVAGE_CMD_CLEAR data */
};
#if defined(__cplusplus)
}
#endif
#endif

View File

@@ -1,77 +0,0 @@
/* sis_drv.h -- Private header for sis driver -*- linux-c -*- */
/*
* Copyright 2005 Eric Anholt
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
*/
#ifndef __SIS_DRM_H__
#define __SIS_DRM_H__
#include "drm.h"
#if defined(__cplusplus)
extern "C" {
#endif
/* SiS specific ioctls */
#define NOT_USED_0_3
#define DRM_SIS_FB_ALLOC 0x04
#define DRM_SIS_FB_FREE 0x05
#define NOT_USED_6_12
#define DRM_SIS_AGP_INIT 0x13
#define DRM_SIS_AGP_ALLOC 0x14
#define DRM_SIS_AGP_FREE 0x15
#define DRM_SIS_FB_INIT 0x16
#define DRM_IOCTL_SIS_FB_ALLOC DRM_IOWR(DRM_COMMAND_BASE + DRM_SIS_FB_ALLOC, drm_sis_mem_t)
#define DRM_IOCTL_SIS_FB_FREE DRM_IOW( DRM_COMMAND_BASE + DRM_SIS_FB_FREE, drm_sis_mem_t)
#define DRM_IOCTL_SIS_AGP_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_SIS_AGP_INIT, drm_sis_agp_t)
#define DRM_IOCTL_SIS_AGP_ALLOC DRM_IOWR(DRM_COMMAND_BASE + DRM_SIS_AGP_ALLOC, drm_sis_mem_t)
#define DRM_IOCTL_SIS_AGP_FREE DRM_IOW( DRM_COMMAND_BASE + DRM_SIS_AGP_FREE, drm_sis_mem_t)
#define DRM_IOCTL_SIS_FB_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_SIS_FB_INIT, drm_sis_fb_t)
/*
#define DRM_IOCTL_SIS_FLIP DRM_IOW( 0x48, drm_sis_flip_t)
#define DRM_IOCTL_SIS_FLIP_INIT DRM_IO( 0x49)
#define DRM_IOCTL_SIS_FLIP_FINAL DRM_IO( 0x50)
*/
typedef struct {
int context;
unsigned long offset;
unsigned long size;
unsigned long free;
} drm_sis_mem_t;
typedef struct {
unsigned long offset, size;
} drm_sis_agp_t;
typedef struct {
unsigned long offset, size;
} drm_sis_fb_t;
#if defined(__cplusplus)
}
#endif
#endif /* __SIS_DRM_H__ */

View File

@@ -1,282 +0,0 @@
/*
* Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved.
* Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sub license,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
* VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
#ifndef _VIA_DRM_H_
#define _VIA_DRM_H_
#include "drm.h"
#if defined(__cplusplus)
extern "C" {
#endif
/* WARNING: These defines must be the same as what the Xserver uses.
* if you change them, you must change the defines in the Xserver.
*/
#ifndef _VIA_DEFINES_
#define _VIA_DEFINES_
#define VIA_NR_SAREA_CLIPRECTS 8
#define VIA_NR_XVMC_PORTS 10
#define VIA_NR_XVMC_LOCKS 5
#define VIA_MAX_CACHELINE_SIZE 64
#define XVMCLOCKPTR(saPriv,lockNo) \
((__volatile__ struct drm_hw_lock *)(((((unsigned long) (saPriv)->XvMCLockArea) + \
(VIA_MAX_CACHELINE_SIZE - 1)) & \
~(VIA_MAX_CACHELINE_SIZE - 1)) + \
VIA_MAX_CACHELINE_SIZE*(lockNo)))
/* Each region is a minimum of 64k, and there are at most 64 of them.
*/
#define VIA_NR_TEX_REGIONS 64
#define VIA_LOG_MIN_TEX_REGION_SIZE 16
#endif
#define VIA_UPLOAD_TEX0IMAGE 0x1 /* handled clientside */
#define VIA_UPLOAD_TEX1IMAGE 0x2 /* handled clientside */
#define VIA_UPLOAD_CTX 0x4
#define VIA_UPLOAD_BUFFERS 0x8
#define VIA_UPLOAD_TEX0 0x10
#define VIA_UPLOAD_TEX1 0x20
#define VIA_UPLOAD_CLIPRECTS 0x40
#define VIA_UPLOAD_ALL 0xff
/* VIA specific ioctls */
#define DRM_VIA_ALLOCMEM 0x00
#define DRM_VIA_FREEMEM 0x01
#define DRM_VIA_AGP_INIT 0x02
#define DRM_VIA_FB_INIT 0x03
#define DRM_VIA_MAP_INIT 0x04
#define DRM_VIA_DEC_FUTEX 0x05
#define NOT_USED
#define DRM_VIA_DMA_INIT 0x07
#define DRM_VIA_CMDBUFFER 0x08
#define DRM_VIA_FLUSH 0x09
#define DRM_VIA_PCICMD 0x0a
#define DRM_VIA_CMDBUF_SIZE 0x0b
#define NOT_USED
#define DRM_VIA_WAIT_IRQ 0x0d
#define DRM_VIA_DMA_BLIT 0x0e
#define DRM_VIA_BLIT_SYNC 0x0f
#define DRM_IOCTL_VIA_ALLOCMEM DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_ALLOCMEM, drm_via_mem_t)
#define DRM_IOCTL_VIA_FREEMEM DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_FREEMEM, drm_via_mem_t)
#define DRM_IOCTL_VIA_AGP_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_AGP_INIT, drm_via_agp_t)
#define DRM_IOCTL_VIA_FB_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_FB_INIT, drm_via_fb_t)
#define DRM_IOCTL_VIA_MAP_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_MAP_INIT, drm_via_init_t)
#define DRM_IOCTL_VIA_DEC_FUTEX DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_DEC_FUTEX, drm_via_futex_t)
#define DRM_IOCTL_VIA_DMA_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_DMA_INIT, drm_via_dma_init_t)
#define DRM_IOCTL_VIA_CMDBUFFER DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_CMDBUFFER, drm_via_cmdbuffer_t)
#define DRM_IOCTL_VIA_FLUSH DRM_IO( DRM_COMMAND_BASE + DRM_VIA_FLUSH)
#define DRM_IOCTL_VIA_PCICMD DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_PCICMD, drm_via_cmdbuffer_t)
#define DRM_IOCTL_VIA_CMDBUF_SIZE DRM_IOWR( DRM_COMMAND_BASE + DRM_VIA_CMDBUF_SIZE, \
drm_via_cmdbuf_size_t)
#define DRM_IOCTL_VIA_WAIT_IRQ DRM_IOWR( DRM_COMMAND_BASE + DRM_VIA_WAIT_IRQ, drm_via_irqwait_t)
#define DRM_IOCTL_VIA_DMA_BLIT DRM_IOW(DRM_COMMAND_BASE + DRM_VIA_DMA_BLIT, drm_via_dmablit_t)
#define DRM_IOCTL_VIA_BLIT_SYNC DRM_IOW(DRM_COMMAND_BASE + DRM_VIA_BLIT_SYNC, drm_via_blitsync_t)
/* Indices into buf.Setup where various bits of state are mirrored per
* context and per buffer. These can be fired at the card as a unit,
* or in a piecewise fashion as required.
*/
#define VIA_TEX_SETUP_SIZE 8
/* Flags for clear ioctl
*/
#define VIA_FRONT 0x1
#define VIA_BACK 0x2
#define VIA_DEPTH 0x4
#define VIA_STENCIL 0x8
#define VIA_MEM_VIDEO 0 /* matches drm constant */
#define VIA_MEM_AGP 1 /* matches drm constant */
#define VIA_MEM_SYSTEM 2
#define VIA_MEM_MIXED 3
#define VIA_MEM_UNKNOWN 4
typedef struct {
__u32 offset;
__u32 size;
} drm_via_agp_t;
typedef struct {
__u32 offset;
__u32 size;
} drm_via_fb_t;
typedef struct {
__u32 context;
__u32 type;
__u32 size;
unsigned long index;
unsigned long offset;
} drm_via_mem_t;
typedef struct _drm_via_init {
enum {
VIA_INIT_MAP = 0x01,
VIA_CLEANUP_MAP = 0x02
} func;
unsigned long sarea_priv_offset;
unsigned long fb_offset;
unsigned long mmio_offset;
unsigned long agpAddr;
} drm_via_init_t;
typedef struct _drm_via_futex {
enum {
VIA_FUTEX_WAIT = 0x00,
VIA_FUTEX_WAKE = 0X01
} func;
__u32 ms;
__u32 lock;
__u32 val;
} drm_via_futex_t;
typedef struct _drm_via_dma_init {
enum {
VIA_INIT_DMA = 0x01,
VIA_CLEANUP_DMA = 0x02,
VIA_DMA_INITIALIZED = 0x03
} func;
unsigned long offset;
unsigned long size;
unsigned long reg_pause_addr;
} drm_via_dma_init_t;
typedef struct _drm_via_cmdbuffer {
char *buf;
unsigned long size;
} drm_via_cmdbuffer_t;
/* Warning: If you change the SAREA structure you must change the Xserver
* structure as well */
typedef struct _drm_via_tex_region {
unsigned char next, prev; /* indices to form a circular LRU */
unsigned char inUse; /* owned by a client, or free? */
int age; /* tracked by clients to update local LRU's */
} drm_via_tex_region_t;
typedef struct _drm_via_sarea {
unsigned int dirty;
unsigned int nbox;
struct drm_clip_rect boxes[VIA_NR_SAREA_CLIPRECTS];
drm_via_tex_region_t texList[VIA_NR_TEX_REGIONS + 1];
int texAge; /* last time texture was uploaded */
int ctxOwner; /* last context to upload state */
int vertexPrim;
/*
* Below is for XvMC.
* We want the lock integers alone on, and aligned to, a cache line.
* Therefore this somewhat strange construct.
*/
char XvMCLockArea[VIA_MAX_CACHELINE_SIZE * (VIA_NR_XVMC_LOCKS + 1)];
unsigned int XvMCDisplaying[VIA_NR_XVMC_PORTS];
unsigned int XvMCSubPicOn[VIA_NR_XVMC_PORTS];
unsigned int XvMCCtxNoGrabbed; /* Last context to hold decoder */
/* Used by the 3d driver only at this point, for pageflipping:
*/
unsigned int pfCurrentOffset;
} drm_via_sarea_t;
typedef struct _drm_via_cmdbuf_size {
enum {
VIA_CMDBUF_SPACE = 0x01,
VIA_CMDBUF_LAG = 0x02
} func;
int wait;
__u32 size;
} drm_via_cmdbuf_size_t;
typedef enum {
VIA_IRQ_ABSOLUTE = 0x0,
VIA_IRQ_RELATIVE = 0x1,
VIA_IRQ_SIGNAL = 0x10000000,
VIA_IRQ_FORCE_SEQUENCE = 0x20000000
} via_irq_seq_type_t;
#define VIA_IRQ_FLAGS_MASK 0xF0000000
enum drm_via_irqs {
drm_via_irq_hqv0 = 0,
drm_via_irq_hqv1,
drm_via_irq_dma0_dd,
drm_via_irq_dma0_td,
drm_via_irq_dma1_dd,
drm_via_irq_dma1_td,
drm_via_irq_num
};
struct drm_via_wait_irq_request {
unsigned irq;
via_irq_seq_type_t type;
__u32 sequence;
__u32 signal;
};
typedef union drm_via_irqwait {
struct drm_via_wait_irq_request request;
struct drm_wait_vblank_reply reply;
} drm_via_irqwait_t;
typedef struct drm_via_blitsync {
__u32 sync_handle;
unsigned engine;
} drm_via_blitsync_t;
/* - * Below,"flags" is currently unused but will be used for possible future
* extensions like kernel space bounce buffers for bad alignments and
* blit engine busy-wait polling for better latency in the absence of
* interrupts.
*/
typedef struct drm_via_dmablit {
__u32 num_lines;
__u32 line_length;
__u32 fb_addr;
__u32 fb_stride;
unsigned char *mem_addr;
__u32 mem_stride;
__u32 flags;
int to_fb;
drm_via_blitsync_t sync;
} drm_via_dmablit_t;
#if defined(__cplusplus)
}
#endif
#endif /* _VIA_DRM_H_ */

View File

@@ -64,6 +64,7 @@ struct drm_virtgpu_map {
__u32 pad;
};
/* fence_fd is modified on success if VIRTGPU_EXECBUF_FENCE_FD_OUT flag is set. */
struct drm_virtgpu_execbuffer {
__u32 flags;
__u32 size;

View File

@@ -1,6 +1,6 @@
/**************************************************************************
*
* Copyright © 2009-2015 VMware, Inc., Palo Alto, CA., USA
* Copyright © 2009-2022 VMware, Inc., Palo Alto, CA., USA
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
@@ -92,6 +92,12 @@ extern "C" {
*
* DRM_VMW_PARAM_SM5
* SM5 support is enabled.
*
* DRM_VMW_PARAM_GL43
* SM5.1+GL4.3 support is enabled.
*
* DRM_VMW_PARAM_DEVICE_ID
* PCI ID of the underlying SVGA device.
*/
#define DRM_VMW_PARAM_NUM_STREAMS 0
@@ -110,6 +116,8 @@ extern "C" {
#define DRM_VMW_PARAM_HW_CAPS2 13
#define DRM_VMW_PARAM_SM4_1 14
#define DRM_VMW_PARAM_SM5 15
#define DRM_VMW_PARAM_GL43 16
#define DRM_VMW_PARAM_DEVICE_ID 17
/**
* enum drm_vmw_handle_type - handle type for ref ioctls

View File

@@ -97,12 +97,13 @@ struct acct_v3
/*
* accounting flags
*/
/* bit set when the process ... */
/* bit set when the process/task ... */
#define AFORK 0x01 /* ... executed fork, but did not exec */
#define ASU 0x02 /* ... used super-user privileges */
#define ACOMPAT 0x04 /* ... used compatibility mode (VAX only not used) */
#define ACORE 0x08 /* ... dumped core */
#define AXSIG 0x10 /* ... was killed by a signal */
#define AGROUP 0x20 /* ... was the last task of the process (task group) */
#if defined(__BYTE_ORDER) ? __BYTE_ORDER == __BIG_ENDIAN : defined(__BIG_ENDIAN)
#define ACCT_BYTEORDER 0x80 /* accounting file is big endian */

View File

@@ -12,7 +12,6 @@
#define _ACRN_H
#include <linux/types.h>
#include <linux/uuid.h>
#define ACRN_IO_REQUEST_MAX 16
@@ -186,7 +185,7 @@ struct acrn_ioreq_notify {
* @reserved0: Reserved and must be 0
* @vcpu_num: Number of vCPU in the VM. Return from hypervisor.
* @reserved1: Reserved and must be 0
* @uuid: UUID of the VM. Pass to hypervisor directly.
* @uuid: Empty space never to be used again (used to be UUID of the VM)
* @vm_flag: Flag of the VM creating. Pass to hypervisor directly.
* @ioreq_buf: Service VM GPA of I/O request buffer. Pass to
* hypervisor directly.
@@ -198,7 +197,7 @@ struct acrn_vm_creation {
__u16 reserved0;
__u16 vcpu_num;
__u16 reserved1;
guid_t uuid;
__u8 uuid[16];
__u64 vm_flag;
__u64 ioreq_buf;
__u64 cpu_affinity;

View File

@@ -51,7 +51,6 @@
#endif
#include <linux/types.h>
#include <stdlib.h>
struct agp_version {
__u16 major;
@@ -63,10 +62,10 @@ typedef struct _agp_info {
__u32 bridge_id; /* bridge vendor/device */
__u32 agp_mode; /* mode info of bridge */
unsigned long aper_base;/* base of aperture */
size_t aper_size; /* size of aperture */
size_t pg_total; /* max pages (swap + system) */
size_t pg_system; /* max pages (system) */
size_t pg_used; /* current pages used */
__kernel_size_t aper_size; /* size of aperture */
__kernel_size_t pg_total; /* max pages (swap + system) */
__kernel_size_t pg_system; /* max pages (system) */
__kernel_size_t pg_used; /* current pages used */
} agp_info;
typedef struct _agp_setup {

View File

@@ -236,6 +236,21 @@ struct binder_frozen_status_info {
__u32 async_recv;
};
/* struct binder_extened_error - extended error information
* @id: identifier for the failed operation
* @command: command as defined by binder_driver_return_protocol
* @param: parameter holding a negative errno value
*
* Used with BINDER_GET_EXTENDED_ERROR. This extends the error information
* returned by the driver upon a failed operation. Userspace can pull this
* data to properly handle specific error scenarios.
*/
struct binder_extended_error {
__u32 id;
__u32 command;
__s32 param;
};
#define BINDER_WRITE_READ _IOWR('b', 1, struct binder_write_read)
#define BINDER_SET_IDLE_TIMEOUT _IOW('b', 3, __s64)
#define BINDER_SET_MAX_THREADS _IOW('b', 5, __u32)
@@ -249,6 +264,7 @@ struct binder_frozen_status_info {
#define BINDER_FREEZE _IOW('b', 14, struct binder_freeze_info)
#define BINDER_GET_FROZEN_INFO _IOWR('b', 15, struct binder_frozen_status_info)
#define BINDER_ENABLE_ONEWAY_SPAM_DETECTION _IOW('b', 16, __u32)
#define BINDER_GET_EXTENDED_ERROR _IOWR('b', 17, struct binder_extended_error)
/*
* NOTE: Two special error codes you should check for when calling
@@ -271,6 +287,7 @@ enum transaction_flags {
TF_STATUS_CODE = 0x08, /* contents are a 32-bit status code */
TF_ACCEPT_FDS = 0x10, /* allow replies with file descriptors */
TF_CLEAR_BUF = 0x20, /* clear buffer on txn complete */
TF_UPDATE_TXN = 0x40, /* update the outdated pending async txn */
};
struct binder_transaction_data {
@@ -288,8 +305,8 @@ struct binder_transaction_data {
/* General information about the transaction. */
__u32 flags;
pid_t sender_pid;
uid_t sender_euid;
__kernel_pid_t sender_pid;
__kernel_uid32_t sender_euid;
binder_size_t data_size; /* number of bytes of data */
binder_size_t offsets_size; /* number of bytes of offsets */
@@ -433,7 +450,7 @@ enum binder_driver_return_protocol {
BR_FROZEN_REPLY = _IO('r', 18),
/*
* The target of the last transaction (either a bcTRANSACTION or
* The target of the last sync transaction (either a bcTRANSACTION or
* a bcATTEMPT_ACQUIRE) is frozen. No parameters.
*/
@@ -443,6 +460,11 @@ enum binder_driver_return_protocol {
* asynchronous transaction makes the allocated async buffer size exceed
* detection threshold. No parameters.
*/
BR_TRANSACTION_PENDING_FROZEN = _IO('r', 20),
/*
* The target of the last async transaction is frozen. No parameters.
*/
};
enum binder_driver_command_protocol {

View File

@@ -0,0 +1,14 @@
/* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
/*
* Copyright (C) 2021 ASPEED Technology Inc.
*/
#ifndef _LINUX_ASPEED_VIDEO_H
#define _LINUX_ASPEED_VIDEO_H
#include <linux/v4l2-controls.h>
#define V4L2_CID_ASPEED_HQ_MODE (V4L2_CID_USER_ASPEED_BASE + 1)
#define V4L2_CID_ASPEED_HQ_JPEG_QUALITY (V4L2_CID_USER_ASPEED_BASE + 2)
#endif /* _LINUX_ASPEED_VIDEO_H */

View File

@@ -38,7 +38,7 @@
*/
#define BR2684_ENCAPS_VC (0) /* VC-mux */
#define BR2684_ENCAPS_LLC (1)
#define BR2684_ENCAPS_AUTODETECT (2) /* Unsuported */
#define BR2684_ENCAPS_AUTODETECT (2) /* Unsupported */
/*
* Is this VC bridged or routed?

View File

@@ -187,7 +187,7 @@
#define AUDIT_MAX_KEY_LEN 256
#define AUDIT_BITMASK_SIZE 64
#define AUDIT_WORD(nr) ((__u32)((nr)/32))
#define AUDIT_BIT(nr) (1 << ((nr) - AUDIT_WORD(nr)*32))
#define AUDIT_BIT(nr) (1U << ((nr) - AUDIT_WORD(nr)*32))
#define AUDIT_SYSCALL_CLASSES 16
#define AUDIT_CLASS_DIR_WRITE 0
@@ -439,6 +439,8 @@ enum {
#define AUDIT_ARCH_UNICORE (EM_UNICORE|__AUDIT_ARCH_LE)
#define AUDIT_ARCH_X86_64 (EM_X86_64|__AUDIT_ARCH_64BIT|__AUDIT_ARCH_LE)
#define AUDIT_ARCH_XTENSA (EM_XTENSA)
#define AUDIT_ARCH_LOONGARCH32 (EM_LOONGARCH|__AUDIT_ARCH_LE)
#define AUDIT_ARCH_LOONGARCH64 (EM_LOONGARCH|__AUDIT_ARCH_64BIT|__AUDIT_ARCH_LE)
#define AUDIT_PERM_EXEC 1
#define AUDIT_PERM_WRITE 2
@@ -514,7 +516,7 @@ struct audit_rule_data {
__u32 values[AUDIT_MAX_FIELDS];
__u32 fieldflags[AUDIT_MAX_FIELDS];
__u32 buflen; /* total length of string fields */
char buf[0]; /* string fields buffer */
char buf[]; /* string fields buffer */
};
#endif /* _LINUX_AUDIT_H_ */

View File

@@ -30,6 +30,8 @@
* differ from AT_PLATFORM. */
#define AT_RANDOM 25 /* address of 16 random bytes */
#define AT_HWCAP2 26 /* extension of AT_HWCAP */
#define AT_RSEQ_FEATURE_SIZE 27 /* rseq supported feature size */
#define AT_RSEQ_ALIGN 28 /* rseq allocation alignment */
#define AT_EXECFN 31 /* filename of program */

View File

@@ -26,6 +26,7 @@
* @BATADV_CODED: network coded packets
* @BATADV_ELP: echo location packets for B.A.T.M.A.N. V
* @BATADV_OGM2: originator messages for B.A.T.M.A.N. V
* @BATADV_MCAST: multicast packet with multiple destination addresses
*
* @BATADV_UNICAST: unicast packets carrying unicast payload traffic
* @BATADV_UNICAST_FRAG: unicast packets carrying a fragment of the original
@@ -42,6 +43,7 @@ enum batadv_packettype {
BATADV_CODED = 0x02,
BATADV_ELP = 0x03,
BATADV_OGM2 = 0x04,
BATADV_MCAST = 0x05,
/* 0x40 - 0x7f: unicast */
#define BATADV_UNICAST_MIN 0x40
BATADV_UNICAST = 0x40,

View File

@@ -130,7 +130,7 @@ struct blk_zone_report {
__u64 sector;
__u32 nr_zones;
__u32 flags;
struct blk_zone zones[0];
struct blk_zone zones[];
};
/**

File diff suppressed because it is too large Load Diff

View File

@@ -33,17 +33,17 @@ struct btf_type {
/* "info" bits arrangement
* bits 0-15: vlen (e.g. # of struct's members)
* bits 16-23: unused
* bits 24-27: kind (e.g. int, ptr, array...etc)
* bits 28-30: unused
* bits 24-28: kind (e.g. int, ptr, array...etc)
* bits 29-30: unused
* bit 31: kind_flag, currently used by
* struct, union and fwd
* struct, union, enum, fwd and enum64
*/
__u32 info;
/* "size" is used by INT, ENUM, STRUCT, UNION and DATASEC.
/* "size" is used by INT, ENUM, STRUCT, UNION, DATASEC and ENUM64.
* "size" tells the size of the type it is describing.
*
* "type" is used by PTR, TYPEDEF, VOLATILE, CONST, RESTRICT,
* FUNC, FUNC_PROTO, VAR and DECL_TAG.
* FUNC, FUNC_PROTO, VAR, DECL_TAG and TYPE_TAG.
* "type" is a type_id referring to another type.
*/
union {
@@ -63,7 +63,7 @@ enum {
BTF_KIND_ARRAY = 3, /* Array */
BTF_KIND_STRUCT = 4, /* Struct */
BTF_KIND_UNION = 5, /* Union */
BTF_KIND_ENUM = 6, /* Enumeration */
BTF_KIND_ENUM = 6, /* Enumeration up to 32-bit values */
BTF_KIND_FWD = 7, /* Forward */
BTF_KIND_TYPEDEF = 8, /* Typedef */
BTF_KIND_VOLATILE = 9, /* Volatile */
@@ -75,6 +75,8 @@ enum {
BTF_KIND_DATASEC = 15, /* Section */
BTF_KIND_FLOAT = 16, /* Floating point */
BTF_KIND_DECL_TAG = 17, /* Decl Tag */
BTF_KIND_TYPE_TAG = 18, /* Type Tag */
BTF_KIND_ENUM64 = 19, /* Enumeration up to 64-bit values */
NR_BTF_KINDS,
BTF_KIND_MAX = NR_BTF_KINDS - 1,
@@ -185,4 +187,14 @@ struct btf_decl_tag {
__s32 component_idx;
};
/* BTF_KIND_ENUM64 is followed by multiple "struct btf_enum64".
* The exact number of btf_enum64 is stored in the vlen (of the
* info in "struct btf_type").
*/
struct btf_enum64 {
__u32 name_off;
__u32 val_lo32;
__u32 val_hi32;
};
#endif /* __LINUX_BTF_H__ */

View File

@@ -19,8 +19,14 @@
#ifndef _LINUX_BTRFS_H
#define _LINUX_BTRFS_H
#ifdef __cplusplus
extern "C" {
#endif
#include <linux/types.h>
#include <linux/ioctl.h>
#include <linux/fs.h>
#define BTRFS_IOCTL_MAGIC 0x94
#define BTRFS_VOL_NAME_MAX 255
@@ -91,7 +97,7 @@ struct btrfs_qgroup_inherit {
__u64 num_ref_copies;
__u64 num_excl_copies;
struct btrfs_qgroup_limit lim;
__u64 qgroups[0];
__u64 qgroups[];
};
struct btrfs_ioctl_qgroup_limit_args {
@@ -179,6 +185,7 @@ struct btrfs_scrub_progress {
};
#define BTRFS_SCRUB_READONLY 1
#define BTRFS_SCRUB_SUPPORTED_FLAGS (BTRFS_SCRUB_READONLY)
struct btrfs_ioctl_scrub_args {
__u64 devid; /* in */
__u64 start; /* in */
@@ -237,7 +244,17 @@ struct btrfs_ioctl_dev_info_args {
__u8 uuid[BTRFS_UUID_SIZE]; /* in/out */
__u64 bytes_used; /* out */
__u64 total_bytes; /* out */
__u64 unused[379]; /* pad to 4k */
/*
* Optional, out.
*
* Showing the fsid of the device, allowing user space to check if this
* device is a seeding one.
*
* Introduced in v6.3, thus user space still needs to check if kernel
* changed this value. Older kernel will not touch the values here.
*/
__u8 fsid[BTRFS_UUID_SIZE];
__u64 unused[377]; /* pad to 4k */
__u8 path[BTRFS_DEVICE_PATH_NAME_MAX]; /* out */
};
@@ -288,6 +305,12 @@ struct btrfs_ioctl_fs_info_args {
#define BTRFS_FEATURE_COMPAT_RO_FREE_SPACE_TREE_VALID (1ULL << 1)
#define BTRFS_FEATURE_COMPAT_RO_VERITY (1ULL << 2)
/*
* Put all block group items into a dedicated block group tree, greatly
* reducing mount time for large filesystem due to better locality.
*/
#define BTRFS_FEATURE_COMPAT_RO_BLOCK_GROUP_TREE (1ULL << 3)
#define BTRFS_FEATURE_INCOMPAT_MIXED_BACKREF (1ULL << 0)
#define BTRFS_FEATURE_INCOMPAT_DEFAULT_SUBVOL (1ULL << 1)
#define BTRFS_FEATURE_INCOMPAT_MIXED_GROUPS (1ULL << 2)
@@ -307,6 +330,7 @@ struct btrfs_ioctl_fs_info_args {
#define BTRFS_FEATURE_INCOMPAT_METADATA_UUID (1ULL << 10)
#define BTRFS_FEATURE_INCOMPAT_RAID1C34 (1ULL << 11)
#define BTRFS_FEATURE_INCOMPAT_ZONED (1ULL << 12)
#define BTRFS_FEATURE_INCOMPAT_EXTENT_TREE_V2 (1ULL << 13)
struct btrfs_ioctl_feature_flags {
__u64 compat_flags;
@@ -324,6 +348,12 @@ struct btrfs_ioctl_feature_flags {
*/
struct btrfs_balance_args {
__u64 profiles;
/*
* usage filter
* BTRFS_BALANCE_ARGS_USAGE with a single value means '0..N'
* BTRFS_BALANCE_ARGS_USAGE_RANGE - range syntax, min..max
*/
union {
__u64 usage;
struct {
@@ -540,7 +570,7 @@ struct btrfs_ioctl_search_header {
__u64 offset;
__u32 type;
__u32 len;
};
} __attribute__ ((__may_alias__));
#define BTRFS_SEARCH_ARGS_BUFSIZE (4096 - sizeof(struct btrfs_ioctl_search_key))
/*
@@ -553,18 +583,23 @@ struct btrfs_ioctl_search_args {
char buf[BTRFS_SEARCH_ARGS_BUFSIZE];
};
/*
* Extended version of TREE_SEARCH ioctl that can return more than 4k of bytes.
* The allocated size of the buffer is set in buf_size.
*/
struct btrfs_ioctl_search_args_v2 {
struct btrfs_ioctl_search_key key; /* in/out - search parameters */
__u64 buf_size; /* in - size of buffer
* out - on EOVERFLOW: needed size
* to store item */
__u64 buf[0]; /* out - found items */
__u64 buf[]; /* out - found items */
};
/* With a @src_length of zero, the range from @src_offset->EOF is cloned! */
struct btrfs_ioctl_clone_range_args {
__s64 src_fd;
__u64 src_offset, src_length;
__u64 dest_offset;
__s64 src_fd;
__u64 src_offset, src_length;
__u64 dest_offset;
};
/*
@@ -629,7 +664,7 @@ struct btrfs_ioctl_same_args {
__u16 dest_count; /* in - total elements in info array */
__u16 reserved1;
__u32 reserved2;
struct btrfs_ioctl_same_extent_info info[0];
struct btrfs_ioctl_same_extent_info info[];
};
struct btrfs_ioctl_space_info {
@@ -641,7 +676,7 @@ struct btrfs_ioctl_space_info {
struct btrfs_ioctl_space_args {
__u64 space_slots;
__u64 total_spaces;
struct btrfs_ioctl_space_info spaces[0];
struct btrfs_ioctl_space_info spaces[];
};
struct btrfs_data_container {
@@ -649,7 +684,7 @@ struct btrfs_data_container {
__u32 bytes_missing; /* out -- additional bytes needed for result */
__u32 elem_cnt; /* out */
__u32 elem_missed; /* out */
__u64 val[0]; /* out */
__u64 val[]; /* out */
};
struct btrfs_ioctl_ino_path_args {
@@ -668,8 +703,11 @@ struct btrfs_ioctl_logical_ino_args {
/* struct btrfs_data_container *inodes; out */
__u64 inodes;
};
/* Return every ref to the extent, not just those containing logical block.
* Requires logical == extent bytenr. */
/*
* Return every ref to the extent, not just those containing logical block.
* Requires logical == extent bytenr.
*/
#define BTRFS_LOGICAL_INO_ARGS_IGNORE_OFFSET (1ULL << 0)
enum btrfs_dev_stat_values {
@@ -774,11 +812,19 @@ struct btrfs_ioctl_received_subvol_args {
*/
#define BTRFS_SEND_FLAG_VERSION 0x8
/*
* Send compressed data using the ENCODED_WRITE command instead of decompressing
* the data and sending it with the WRITE command. This requires protocol
* version >= 2.
*/
#define BTRFS_SEND_FLAG_COMPRESSED 0x10
#define BTRFS_SEND_FLAG_MASK \
(BTRFS_SEND_FLAG_NO_FILE_DATA | \
BTRFS_SEND_FLAG_OMIT_STREAM_HEADER | \
BTRFS_SEND_FLAG_OMIT_END_CMD | \
BTRFS_SEND_FLAG_VERSION)
BTRFS_SEND_FLAG_VERSION | \
BTRFS_SEND_FLAG_COMPRESSED)
struct btrfs_ioctl_send_args {
__s64 send_fd; /* in */
@@ -866,6 +912,134 @@ struct btrfs_ioctl_get_subvol_rootref_args {
__u8 align[7];
};
/*
* Data and metadata for an encoded read or write.
*
* Encoded I/O bypasses any encoding automatically done by the filesystem (e.g.,
* compression). This can be used to read the compressed contents of a file or
* write pre-compressed data directly to a file.
*
* BTRFS_IOC_ENCODED_READ and BTRFS_IOC_ENCODED_WRITE are essentially
* preadv/pwritev with additional metadata about how the data is encoded and the
* size of the unencoded data.
*
* BTRFS_IOC_ENCODED_READ fills the given iovecs with the encoded data, fills
* the metadata fields, and returns the size of the encoded data. It reads one
* extent per call. It can also read data which is not encoded.
*
* BTRFS_IOC_ENCODED_WRITE uses the metadata fields, writes the encoded data
* from the iovecs, and returns the size of the encoded data. Note that the
* encoded data is not validated when it is written; if it is not valid (e.g.,
* it cannot be decompressed), then a subsequent read may return an error.
*
* Since the filesystem page cache contains decoded data, encoded I/O bypasses
* the page cache. Encoded I/O requires CAP_SYS_ADMIN.
*/
struct btrfs_ioctl_encoded_io_args {
/* Input parameters for both reads and writes. */
/*
* iovecs containing encoded data.
*
* For reads, if the size of the encoded data is larger than the sum of
* iov[n].iov_len for 0 <= n < iovcnt, then the ioctl fails with
* ENOBUFS.
*
* For writes, the size of the encoded data is the sum of iov[n].iov_len
* for 0 <= n < iovcnt. This must be less than 128 KiB (this limit may
* increase in the future). This must also be less than or equal to
* unencoded_len.
*/
const struct iovec *iov;
/* Number of iovecs. */
unsigned long iovcnt;
/*
* Offset in file.
*
* For writes, must be aligned to the sector size of the filesystem.
*/
__s64 offset;
/* Currently must be zero. */
__u64 flags;
/*
* For reads, the following members are output parameters that will
* contain the returned metadata for the encoded data.
* For writes, the following members must be set to the metadata for the
* encoded data.
*/
/*
* Length of the data in the file.
*
* Must be less than or equal to unencoded_len - unencoded_offset. For
* writes, must be aligned to the sector size of the filesystem unless
* the data ends at or beyond the current end of the file.
*/
__u64 len;
/*
* Length of the unencoded (i.e., decrypted and decompressed) data.
*
* For writes, must be no more than 128 KiB (this limit may increase in
* the future). If the unencoded data is actually longer than
* unencoded_len, then it is truncated; if it is shorter, then it is
* extended with zeroes.
*/
__u64 unencoded_len;
/*
* Offset from the first byte of the unencoded data to the first byte of
* logical data in the file.
*
* Must be less than unencoded_len.
*/
__u64 unencoded_offset;
/*
* BTRFS_ENCODED_IO_COMPRESSION_* type.
*
* For writes, must not be BTRFS_ENCODED_IO_COMPRESSION_NONE.
*/
__u32 compression;
/* Currently always BTRFS_ENCODED_IO_ENCRYPTION_NONE. */
__u32 encryption;
/*
* Reserved for future expansion.
*
* For reads, always returned as zero. Users should check for non-zero
* bytes. If there are any, then the kernel has a newer version of this
* structure with additional information that the user definition is
* missing.
*
* For writes, must be zeroed.
*/
__u8 reserved[64];
};
/* Data is not compressed. */
#define BTRFS_ENCODED_IO_COMPRESSION_NONE 0
/* Data is compressed as a single zlib stream. */
#define BTRFS_ENCODED_IO_COMPRESSION_ZLIB 1
/*
* Data is compressed as a single zstd frame with the windowLog compression
* parameter set to no more than 17.
*/
#define BTRFS_ENCODED_IO_COMPRESSION_ZSTD 2
/*
* Data is compressed sector by sector (using the sector size indicated by the
* name of the constant) with LZO1X and wrapped in the format documented in
* fs/btrfs/lzo.c. For writes, the compression sector size must match the
* filesystem sector size.
*/
#define BTRFS_ENCODED_IO_COMPRESSION_LZO_4K 3
#define BTRFS_ENCODED_IO_COMPRESSION_LZO_8K 4
#define BTRFS_ENCODED_IO_COMPRESSION_LZO_16K 5
#define BTRFS_ENCODED_IO_COMPRESSION_LZO_32K 6
#define BTRFS_ENCODED_IO_COMPRESSION_LZO_64K 7
#define BTRFS_ENCODED_IO_COMPRESSION_TYPES 8
/* Data is not encrypted. */
#define BTRFS_ENCODED_IO_ENCRYPTION_NONE 0
#define BTRFS_ENCODED_IO_ENCRYPTION_TYPES 1
/* Error codes as returned by the kernel */
enum btrfs_err_code {
BTRFS_ERROR_DEV_RAID1_MIN_NOT_MET = 1,
@@ -994,5 +1168,13 @@ enum btrfs_err_code {
struct btrfs_ioctl_ino_lookup_user_args)
#define BTRFS_IOC_SNAP_DESTROY_V2 _IOW(BTRFS_IOCTL_MAGIC, 63, \
struct btrfs_ioctl_vol_args_v2)
#define BTRFS_IOC_ENCODED_READ _IOR(BTRFS_IOCTL_MAGIC, 64, \
struct btrfs_ioctl_encoded_io_args)
#define BTRFS_IOC_ENCODED_WRITE _IOW(BTRFS_IOCTL_MAGIC, 64, \
struct btrfs_ioctl_encoded_io_args)
#ifdef __cplusplus
}
#endif
#endif /* _LINUX_BTRFS_H */

View File

@@ -6,6 +6,23 @@
#include <linux/types.h>
#include <stddef.h>
/* ASCII for _BHRfS_M, no terminating nul */
#define BTRFS_MAGIC 0x4D5F53665248425FULL
#define BTRFS_MAX_LEVEL 8
/*
* We can actually store much bigger names, but lets not confuse the rest of
* linux.
*/
#define BTRFS_NAME_LEN 255
/*
* Theoretical limit is larger, but we keep this down to a sane value. That
* should limit greatly the possibility of collisions on inode ref items.
*/
#define BTRFS_LINK_MAX 65535U
/*
* This header contains the structure definitions and constants used
* by file system objects that can be retrieved using
@@ -49,6 +66,9 @@
/* tracks free space in block groups. */
#define BTRFS_FREE_SPACE_TREE_OBJECTID 10ULL
/* Holds the block group items for extent tree v2. */
#define BTRFS_BLOCK_GROUP_TREE_OBJECTID 11ULL
/* device stats in the device tree */
#define BTRFS_DEV_STATS_OBJECTID 0ULL
@@ -142,7 +162,9 @@
/*
* dir items are the name -> inode pointers in a directory. There is one
* for every name in a directory.
* for every name in a directory. BTRFS_DIR_LOG_ITEM_KEY is no longer used
* but it's still defined here for documentation purposes and to help avoid
* having its numerical value reused in the future.
*/
#define BTRFS_DIR_LOG_ITEM_KEY 60
#define BTRFS_DIR_LOG_INDEX_KEY 72
@@ -350,6 +372,50 @@ enum btrfs_csum_type {
#define BTRFS_FT_SYMLINK 7
#define BTRFS_FT_XATTR 8
#define BTRFS_FT_MAX 9
/* Directory contains encrypted data */
#define BTRFS_FT_ENCRYPTED 0x80
static __inline__ __u8 btrfs_dir_flags_to_ftype(__u8 flags)
{
return flags & ~BTRFS_FT_ENCRYPTED;
}
/*
* Inode flags
*/
#define BTRFS_INODE_NODATASUM (1U << 0)
#define BTRFS_INODE_NODATACOW (1U << 1)
#define BTRFS_INODE_READONLY (1U << 2)
#define BTRFS_INODE_NOCOMPRESS (1U << 3)
#define BTRFS_INODE_PREALLOC (1U << 4)
#define BTRFS_INODE_SYNC (1U << 5)
#define BTRFS_INODE_IMMUTABLE (1U << 6)
#define BTRFS_INODE_APPEND (1U << 7)
#define BTRFS_INODE_NODUMP (1U << 8)
#define BTRFS_INODE_NOATIME (1U << 9)
#define BTRFS_INODE_DIRSYNC (1U << 10)
#define BTRFS_INODE_COMPRESS (1U << 11)
#define BTRFS_INODE_ROOT_ITEM_INIT (1U << 31)
#define BTRFS_INODE_FLAG_MASK \
(BTRFS_INODE_NODATASUM | \
BTRFS_INODE_NODATACOW | \
BTRFS_INODE_READONLY | \
BTRFS_INODE_NOCOMPRESS | \
BTRFS_INODE_PREALLOC | \
BTRFS_INODE_SYNC | \
BTRFS_INODE_IMMUTABLE | \
BTRFS_INODE_APPEND | \
BTRFS_INODE_NODUMP | \
BTRFS_INODE_NOATIME | \
BTRFS_INODE_DIRSYNC | \
BTRFS_INODE_COMPRESS | \
BTRFS_INODE_ROOT_ITEM_INIT)
#define BTRFS_INODE_RO_VERITY (1U << 0)
#define BTRFS_INODE_RO_FLAG_MASK (BTRFS_INODE_RO_VERITY)
/*
* The key defines the order in the tree, and so it also defines (optimal)
@@ -380,6 +446,109 @@ struct btrfs_key {
__u64 offset;
} __attribute__ ((__packed__));
/*
* Every tree block (leaf or node) starts with this header.
*/
struct btrfs_header {
/* These first four must match the super block */
__u8 csum[BTRFS_CSUM_SIZE];
/* FS specific uuid */
__u8 fsid[BTRFS_FSID_SIZE];
/* Which block this node is supposed to live in */
__le64 bytenr;
__le64 flags;
/* Allowed to be different from the super from here on down */
__u8 chunk_tree_uuid[BTRFS_UUID_SIZE];
__le64 generation;
__le64 owner;
__le32 nritems;
__u8 level;
} __attribute__ ((__packed__));
/*
* This is a very generous portion of the super block, giving us room to
* translate 14 chunks with 3 stripes each.
*/
#define BTRFS_SYSTEM_CHUNK_ARRAY_SIZE 2048
/*
* Just in case we somehow lose the roots and are not able to mount, we store
* an array of the roots from previous transactions in the super.
*/
#define BTRFS_NUM_BACKUP_ROOTS 4
struct btrfs_root_backup {
__le64 tree_root;
__le64 tree_root_gen;
__le64 chunk_root;
__le64 chunk_root_gen;
__le64 extent_root;
__le64 extent_root_gen;
__le64 fs_root;
__le64 fs_root_gen;
__le64 dev_root;
__le64 dev_root_gen;
__le64 csum_root;
__le64 csum_root_gen;
__le64 total_bytes;
__le64 bytes_used;
__le64 num_devices;
/* future */
__le64 unused_64[4];
__u8 tree_root_level;
__u8 chunk_root_level;
__u8 extent_root_level;
__u8 fs_root_level;
__u8 dev_root_level;
__u8 csum_root_level;
/* future and to align */
__u8 unused_8[10];
} __attribute__ ((__packed__));
/*
* A leaf is full of items. offset and size tell us where to find the item in
* the leaf (relative to the start of the data area)
*/
struct btrfs_item {
struct btrfs_disk_key key;
__le32 offset;
__le32 size;
} __attribute__ ((__packed__));
/*
* Leaves have an item area and a data area:
* [item0, item1....itemN] [free space] [dataN...data1, data0]
*
* The data is separate from the items to get the keys closer together during
* searches.
*/
struct btrfs_leaf {
struct btrfs_header header;
struct btrfs_item items[];
} __attribute__ ((__packed__));
/*
* All non-leaf blocks are nodes, they hold only keys and pointers to other
* blocks.
*/
struct btrfs_key_ptr {
struct btrfs_disk_key key;
__le64 blockptr;
__le64 generation;
} __attribute__ ((__packed__));
struct btrfs_node {
struct btrfs_header header;
struct btrfs_key_ptr ptrs[];
} __attribute__ ((__packed__));
struct btrfs_dev_item {
/* the internal btrfs device id */
__le64 devid;
@@ -463,6 +632,69 @@ struct btrfs_chunk {
/* additional stripes go here */
} __attribute__ ((__packed__));
/*
* The super block basically lists the main trees of the FS.
*/
struct btrfs_super_block {
/* The first 4 fields must match struct btrfs_header */
__u8 csum[BTRFS_CSUM_SIZE];
/* FS specific UUID, visible to user */
__u8 fsid[BTRFS_FSID_SIZE];
/* This block number */
__le64 bytenr;
__le64 flags;
/* Allowed to be different from the btrfs_header from here own down */
__le64 magic;
__le64 generation;
__le64 root;
__le64 chunk_root;
__le64 log_root;
/*
* This member has never been utilized since the very beginning, thus
* it's always 0 regardless of kernel version. We always use
* generation + 1 to read log tree root. So here we mark it deprecated.
*/
__le64 __unused_log_root_transid;
__le64 total_bytes;
__le64 bytes_used;
__le64 root_dir_objectid;
__le64 num_devices;
__le32 sectorsize;
__le32 nodesize;
__le32 __unused_leafsize;
__le32 stripesize;
__le32 sys_chunk_array_size;
__le64 chunk_root_generation;
__le64 compat_flags;
__le64 compat_ro_flags;
__le64 incompat_flags;
__le16 csum_type;
__u8 root_level;
__u8 chunk_root_level;
__u8 log_root_level;
struct btrfs_dev_item dev_item;
char label[BTRFS_LABEL_SIZE];
__le64 cache_generation;
__le64 uuid_tree_generation;
/* The UUID written into btree blocks */
__u8 metadata_uuid[BTRFS_FSID_SIZE];
__u64 nr_global_roots;
/* Future expansion */
__le64 reserved[27];
__u8 sys_chunk_array[BTRFS_SYSTEM_CHUNK_ARRAY_SIZE];
struct btrfs_root_backup super_roots[BTRFS_NUM_BACKUP_ROOTS];
/* Padded to 4096 bytes */
__u8 padding[565];
} __attribute__ ((__packed__));
#define BTRFS_FREE_SPACE_EXTENT 1
#define BTRFS_FREE_SPACE_BITMAP 2
@@ -517,6 +749,14 @@ struct btrfs_extent_item_v0 {
/* use full backrefs for extent pointers in the block */
#define BTRFS_BLOCK_FLAG_FULL_BACKREF (1ULL << 8)
#define BTRFS_BACKREF_REV_MAX 256
#define BTRFS_BACKREF_REV_SHIFT 56
#define BTRFS_BACKREF_REV_MASK (((u64)BTRFS_BACKREF_REV_MAX - 1) << \
BTRFS_BACKREF_REV_SHIFT)
#define BTRFS_OLD_BACKREF_REV 0
#define BTRFS_MIXED_BACKREF_REV 1
/*
* this flag is only used internally by scrub and may be changed at any time
* it is only declared here to avoid collisions
@@ -566,7 +806,7 @@ struct btrfs_inode_extref {
__le64 parent_objectid;
__le64 index;
__le16 name_len;
__u8 name[0];
__u8 name[];
/* name goes here */
} __attribute__ ((__packed__));
@@ -871,19 +1111,6 @@ struct btrfs_dev_replace_item {
#define BTRFS_BLOCK_GROUP_RESERVED (BTRFS_AVAIL_ALLOC_BIT_SINGLE | \
BTRFS_SPACE_INFO_GLOBAL_RSV)
enum btrfs_raid_types {
BTRFS_RAID_RAID10,
BTRFS_RAID_RAID1,
BTRFS_RAID_DUP,
BTRFS_RAID_RAID0,
BTRFS_RAID_SINGLE,
BTRFS_RAID_RAID5,
BTRFS_RAID_RAID6,
BTRFS_RAID_RAID1C3,
BTRFS_RAID_RAID1C4,
BTRFS_NR_RAID_TYPES
};
#define BTRFS_BLOCK_GROUP_TYPE_MASK (BTRFS_BLOCK_GROUP_DATA | \
BTRFS_BLOCK_GROUP_SYSTEM | \
BTRFS_BLOCK_GROUP_METADATA)
@@ -969,6 +1196,10 @@ static __inline__ __u16 btrfs_qgroup_level(__u64 qgroupid)
*/
#define BTRFS_QGROUP_STATUS_FLAG_INCONSISTENT (1ULL << 2)
#define BTRFS_QGROUP_STATUS_FLAGS_MASK (BTRFS_QGROUP_STATUS_FLAG_ON | \
BTRFS_QGROUP_STATUS_FLAG_RESCAN | \
BTRFS_QGROUP_STATUS_FLAG_INCONSISTENT)
#define BTRFS_QGROUP_STATUS_VERSION 1
struct btrfs_qgroup_status_item {

View File

@@ -0,0 +1,68 @@
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
#ifndef _LINUX_CACHEFILES_H
#define _LINUX_CACHEFILES_H
#include <linux/types.h>
#include <linux/ioctl.h>
/*
* Fscache ensures that the maximum length of cookie key is 255. The volume key
* is controlled by netfs, and generally no bigger than 255.
*/
#define CACHEFILES_MSG_MAX_SIZE 1024
enum cachefiles_opcode {
CACHEFILES_OP_OPEN,
CACHEFILES_OP_CLOSE,
CACHEFILES_OP_READ,
};
/*
* Message Header
*
* @msg_id a unique ID identifying this message
* @opcode message type, CACHEFILE_OP_*
* @len message length, including message header and following data
* @object_id a unique ID identifying a cache file
* @data message type specific payload
*/
struct cachefiles_msg {
__u32 msg_id;
__u32 opcode;
__u32 len;
__u32 object_id;
__u8 data[];
};
/*
* @data contains the volume_key followed directly by the cookie_key. volume_key
* is a NUL-terminated string; @volume_key_size indicates the size of the volume
* key in bytes. cookie_key is binary data, which is netfs specific;
* @cookie_key_size indicates the size of the cookie key in bytes.
*
* @fd identifies an anon_fd referring to the cache file.
*/
struct cachefiles_open {
__u32 volume_key_size;
__u32 cookie_key_size;
__u32 fd;
__u32 flags;
__u8 data[];
};
/*
* @off indicates the starting offset of the requested file range
* @len indicates the length of the requested file range
*/
struct cachefiles_read {
__u64 off;
__u64 len;
};
/*
* Reply for READ request
* @arg for this ioctl is the @id field of READ request.
*/
#define CACHEFILES_IOC_READ_COMPLETE _IOW(0x98, 1, int)
#endif

View File

@@ -48,6 +48,7 @@
#include <linux/types.h>
#include <linux/socket.h>
#include <linux/stddef.h> /* for offsetof */
/* controller area network (CAN) kernel definitions */
@@ -60,6 +61,7 @@
#define CAN_SFF_MASK 0x000007FFU /* standard frame format (SFF) */
#define CAN_EFF_MASK 0x1FFFFFFFU /* extended frame format (EFF) */
#define CAN_ERR_MASK 0x1FFFFFFFU /* omit EFF, RTR, ERR flags */
#define CANXL_PRIO_MASK CAN_SFF_MASK /* 11 bit priority mask */
/*
* Controller Area Network Identifier structure
@@ -73,6 +75,7 @@ typedef __u32 canid_t;
#define CAN_SFF_ID_BITS 11
#define CAN_EFF_ID_BITS 29
#define CANXL_PRIO_BITS CAN_SFF_ID_BITS
/*
* Controller Area Network Error Message Frame Mask structure
@@ -91,6 +94,16 @@ typedef __u32 can_err_mask_t;
#define CANFD_MAX_DLC 15
#define CANFD_MAX_DLEN 64
/*
* CAN XL payload length and DLC definitions according to ISO 11898-1
* CAN XL DLC ranges from 0 .. 2047 => data length from 1 .. 2048 byte
*/
#define CANXL_MIN_DLC 0
#define CANXL_MAX_DLC 2047
#define CANXL_MAX_DLC_MASK 0x07FF
#define CANXL_MIN_DLEN 1
#define CANXL_MAX_DLEN 2048
/**
* struct can_frame - Classical CAN frame structure (aka CAN 2.0B)
* @can_id: CAN ID of the frame and CAN_*_FLAG flags, see canid_t definition
@@ -141,8 +154,8 @@ struct can_frame {
* When this is done the former differentiation via CAN_MTU / CANFD_MTU gets
* lost. CANFD_FDF allows programmers to mark CAN FD frames in the case of
* using struct canfd_frame for mixed CAN / CAN FD content (dual use).
* N.B. the Kernel APIs do NOT provide mixed CAN / CAN FD content inside of
* struct canfd_frame therefore the CANFD_FDF flag is disregarded by Linux.
* Since the introduction of CAN XL the CANFD_FDF flag is set in all CAN FD
* frame structures provided by the CAN subsystem of the Linux kernel.
*/
#define CANFD_BRS 0x01 /* bit rate switch (second bitrate for payload data) */
#define CANFD_ESI 0x02 /* error state indicator of the transmitting node */
@@ -166,8 +179,46 @@ struct canfd_frame {
__u8 data[CANFD_MAX_DLEN] __attribute__((aligned(8)));
};
/*
* defined bits for canxl_frame.flags
*
* The canxl_frame.flags element contains two bits CANXL_XLF and CANXL_SEC
* and shares the relative position of the struct can[fd]_frame.len element.
* The CANXL_XLF bit ALWAYS needs to be set to indicate a valid CAN XL frame.
* As a side effect setting this bit intentionally breaks the length checks
* for Classical CAN and CAN FD frames.
*
* Undefined bits in canxl_frame.flags are reserved and shall be set to zero.
*/
#define CANXL_XLF 0x80 /* mandatory CAN XL frame flag (must always be set!) */
#define CANXL_SEC 0x01 /* Simple Extended Content (security/segmentation) */
/**
* struct canxl_frame - CAN with e'X'tended frame 'L'ength frame structure
* @prio: 11 bit arbitration priority with zero'ed CAN_*_FLAG flags
* @flags: additional flags for CAN XL
* @sdt: SDU (service data unit) type
* @len: frame payload length in byte (CANXL_MIN_DLEN .. CANXL_MAX_DLEN)
* @af: acceptance field
* @data: CAN XL frame payload (CANXL_MIN_DLEN .. CANXL_MAX_DLEN byte)
*
* @prio shares the same position as @can_id from struct can[fd]_frame.
*/
struct canxl_frame {
canid_t prio; /* 11 bit priority for arbitration (canid_t) */
__u8 flags; /* additional flags for CAN XL */
__u8 sdt; /* SDU (service data unit) type */
__u16 len; /* frame payload length in byte */
__u32 af; /* acceptance field */
__u8 data[CANXL_MAX_DLEN];
};
#define CAN_MTU (sizeof(struct can_frame))
#define CANFD_MTU (sizeof(struct canfd_frame))
#define CANXL_MTU (sizeof(struct canxl_frame))
#define CANXL_HDR_SIZE (offsetof(struct canxl_frame, data))
#define CANXL_MIN_MTU (CANXL_HDR_SIZE + 64)
#define CANXL_MAX_MTU CANXL_MTU
/* particular protocols of the protocol family PF_CAN */
#define CAN_RAW 1 /* RAW sockets */

View File

@@ -71,7 +71,7 @@ struct bcm_msg_head {
struct bcm_timeval ival1, ival2;
canid_t can_id;
__u32 nframes;
struct can_frame frames[0];
struct can_frame frames[];
};
enum {

View File

@@ -57,6 +57,8 @@
#define CAN_ERR_BUSOFF 0x00000040U /* bus off */
#define CAN_ERR_BUSERROR 0x00000080U /* bus error (may flood!) */
#define CAN_ERR_RESTARTED 0x00000100U /* controller restarted */
#define CAN_ERR_CNT 0x00000200U /* TX error counter / data[6] */
/* RX error counter / data[7] */
/* arbitration lost in bit ... / data[0] */
#define CAN_ERR_LOSTARB_UNSPEC 0x00 /* unspecified */
@@ -120,6 +122,22 @@
#define CAN_ERR_TRX_CANL_SHORT_TO_GND 0x70 /* 0111 0000 */
#define CAN_ERR_TRX_CANL_SHORT_TO_CANH 0x80 /* 1000 0000 */
/* controller specific additional information / data[5..7] */
/* data[5] is reserved (do not use) */
/* TX error counter / data[6] */
/* RX error counter / data[7] */
/* CAN state thresholds
*
* Error counter Error state
* -----------------------------------
* 0 - 95 Error-active
* 96 - 127 Error-warning
* 128 - 255 Error-passive
* 256 and greater Bus-off
*/
#define CAN_ERROR_WARNING_THRESHOLD 96
#define CAN_ERROR_PASSIVE_THRESHOLD 128
#define CAN_BUS_OFF_THRESHOLD 256
#endif /* _CAN_ERROR_H */

View File

@@ -124,33 +124,30 @@ struct can_isotp_ll_options {
/* flags for isotp behaviour */
#define CAN_ISOTP_LISTEN_MODE 0x001 /* listen only (do not send FC) */
#define CAN_ISOTP_EXTEND_ADDR 0x002 /* enable extended addressing */
#define CAN_ISOTP_TX_PADDING 0x004 /* enable CAN frame padding tx path */
#define CAN_ISOTP_RX_PADDING 0x008 /* enable CAN frame padding rx path */
#define CAN_ISOTP_CHK_PAD_LEN 0x010 /* check received CAN frame padding */
#define CAN_ISOTP_CHK_PAD_DATA 0x020 /* check received CAN frame padding */
#define CAN_ISOTP_HALF_DUPLEX 0x040 /* half duplex error state handling */
#define CAN_ISOTP_FORCE_TXSTMIN 0x080 /* ignore stmin from received FC */
#define CAN_ISOTP_FORCE_RXSTMIN 0x100 /* ignore CFs depending on rx stmin */
#define CAN_ISOTP_RX_EXT_ADDR 0x200 /* different rx extended addressing */
#define CAN_ISOTP_WAIT_TX_DONE 0x400 /* wait for tx completion */
#define CAN_ISOTP_SF_BROADCAST 0x800 /* 1-to-N functional addressing */
#define CAN_ISOTP_LISTEN_MODE 0x0001 /* listen only (do not send FC) */
#define CAN_ISOTP_EXTEND_ADDR 0x0002 /* enable extended addressing */
#define CAN_ISOTP_TX_PADDING 0x0004 /* enable CAN frame padding tx path */
#define CAN_ISOTP_RX_PADDING 0x0008 /* enable CAN frame padding rx path */
#define CAN_ISOTP_CHK_PAD_LEN 0x0010 /* check received CAN frame padding */
#define CAN_ISOTP_CHK_PAD_DATA 0x0020 /* check received CAN frame padding */
#define CAN_ISOTP_HALF_DUPLEX 0x0040 /* half duplex error state handling */
#define CAN_ISOTP_FORCE_TXSTMIN 0x0080 /* ignore stmin from received FC */
#define CAN_ISOTP_FORCE_RXSTMIN 0x0100 /* ignore CFs depending on rx stmin */
#define CAN_ISOTP_RX_EXT_ADDR 0x0200 /* different rx extended addressing */
#define CAN_ISOTP_WAIT_TX_DONE 0x0400 /* wait for tx completion */
#define CAN_ISOTP_SF_BROADCAST 0x0800 /* 1-to-N functional addressing */
#define CAN_ISOTP_CF_BROADCAST 0x1000 /* 1-to-N transmission w/o FC */
/* default values */
/* protocol machine default values */
#define CAN_ISOTP_DEFAULT_FLAGS 0
#define CAN_ISOTP_DEFAULT_EXT_ADDRESS 0x00
#define CAN_ISOTP_DEFAULT_PAD_CONTENT 0xCC /* prevent bit-stuffing */
#define CAN_ISOTP_DEFAULT_FRAME_TXTIME 0
#define CAN_ISOTP_DEFAULT_FRAME_TXTIME 50000 /* 50 micro seconds */
#define CAN_ISOTP_DEFAULT_RECV_BS 0
#define CAN_ISOTP_DEFAULT_RECV_STMIN 0x00
#define CAN_ISOTP_DEFAULT_RECV_WFTMAX 0
#define CAN_ISOTP_DEFAULT_LL_MTU CAN_MTU
#define CAN_ISOTP_DEFAULT_LL_TX_DL CAN_MAX_DLEN
#define CAN_ISOTP_DEFAULT_LL_TX_FLAGS 0
/*
* Remark on CAN_ISOTP_DEFAULT_RECV_* values:
*
@@ -162,4 +159,24 @@ struct can_isotp_ll_options {
* consistency and copied directly into the flow control (FC) frame.
*/
/* link layer default values => make use of Classical CAN frames */
#define CAN_ISOTP_DEFAULT_LL_MTU CAN_MTU
#define CAN_ISOTP_DEFAULT_LL_TX_DL CAN_MAX_DLEN
#define CAN_ISOTP_DEFAULT_LL_TX_FLAGS 0
/*
* The CAN_ISOTP_DEFAULT_FRAME_TXTIME has become a non-zero value as
* it only makes sense for isotp implementation tests to run without
* a N_As value. As user space applications usually do not set the
* frame_txtime element of struct can_isotp_options the new in-kernel
* default is very likely overwritten with zero when the sockopt()
* CAN_ISOTP_OPTS is invoked.
* To make sure that a N_As value of zero is only set intentional the
* value '0' is now interpreted as 'do not change the current value'.
* When a frame_txtime of zero is required for testing purposes this
* CAN_ISOTP_FRAME_TXTIME_ZERO u32 value has to be set in frame_txtime.
*/
#define CAN_ISOTP_FRAME_TXTIME_ZERO 0xFFFFFFFF
#endif /* !_UAPI_CAN_ISOTP_H */

View File

@@ -137,6 +137,7 @@ enum {
IFLA_CAN_DATA_BITRATE_CONST,
IFLA_CAN_BITRATE_MAX,
IFLA_CAN_TDC,
IFLA_CAN_CTRLMODE_EXT,
/* add new constants above here */
__IFLA_CAN_MAX,
@@ -166,6 +167,18 @@ enum {
IFLA_CAN_TDC_MAX = __IFLA_CAN_TDC - 1
};
/*
* IFLA_CAN_CTRLMODE_EXT nest: controller mode extended parameters
*/
enum {
IFLA_CAN_CTRLMODE_UNSPEC,
IFLA_CAN_CTRLMODE_SUPPORTED, /* u32 */
/* add new constants above here */
__IFLA_CAN_CTRLMODE,
IFLA_CAN_CTRLMODE_MAX = __IFLA_CAN_CTRLMODE - 1
};
/* u16 termination range: 1..65535 Ohms */
#define CAN_TERMINATION_DISABLED 0

View File

@@ -62,6 +62,7 @@ enum {
CAN_RAW_RECV_OWN_MSGS, /* receive my own msgs (default:off) */
CAN_RAW_FD_FRAMES, /* allow CAN FD frames (default:off) */
CAN_RAW_JOIN_FILTERS, /* all filters must match to trigger */
CAN_RAW_XL_FRAMES, /* allow CAN XL frames (default:off) */
};
#endif /* !_UAPI_CAN_RAW_H */

View File

@@ -424,7 +424,7 @@ struct vfs_ns_cap_data {
*/
#define CAP_TO_INDEX(x) ((x) >> 5) /* 1 << 5 == bits in __u32 */
#define CAP_TO_MASK(x) (1 << ((x) & 31)) /* mask for indexed __u32 */
#define CAP_TO_MASK(x) (1U << ((x) & 31)) /* mask for indexed __u32 */
#endif /* _LINUX_CAPABILITY_H */

View File

@@ -103,7 +103,7 @@
#define CDROMREADALL 0x5318 /* read all 2646 bytes */
/*
* These ioctls are (now) only in ide-cd.c for controlling
* These ioctls were only in (now removed) ide-cd.c for controlling
* drive spindown time. They should be implemented in the
* Uniform driver, via generic packet commands, GPCMD_MODE_SELECT_10,
* GPCMD_MODE_SENSE_10 and the GPMODE_POWER_PAGE...

View File

@@ -1568,6 +1568,20 @@ static __inline__ void cec_ops_request_short_audio_descriptor(const struct cec_m
}
}
static __inline__ void cec_msg_set_audio_volume_level(struct cec_msg *msg,
__u8 audio_volume_level)
{
msg->len = 3;
msg->msg[1] = CEC_MSG_SET_AUDIO_VOLUME_LEVEL;
msg->msg[2] = audio_volume_level;
}
static __inline__ void cec_ops_set_audio_volume_level(const struct cec_msg *msg,
__u8 *audio_volume_level)
{
*audio_volume_level = msg->msg[2];
}
/* Audio Rate Control Feature */
static __inline__ void cec_msg_set_audio_rate(struct cec_msg *msg,

View File

@@ -142,6 +142,26 @@ static __inline__ void cec_msg_set_reply_to(struct cec_msg *msg,
msg->reply = msg->timeout = 0;
}
/**
* cec_msg_recv_is_tx_result - return true if this message contains the
* result of an earlier non-blocking transmit
* @msg: the message structure from CEC_RECEIVE
*/
static __inline__ int cec_msg_recv_is_tx_result(const struct cec_msg *msg)
{
return msg->sequence && msg->tx_status && !msg->rx_status;
}
/**
* cec_msg_recv_is_rx_result - return true if this message contains the
* reply of an earlier non-blocking transmit
* @msg: the message structure from CEC_RECEIVE
*/
static __inline__ int cec_msg_recv_is_rx_result(const struct cec_msg *msg)
{
return msg->sequence && !msg->tx_status && msg->rx_status;
}
/* cec_msg flags field */
#define CEC_MSG_FL_REPLY_TO_FOLLOWERS (1 << 0)
#define CEC_MSG_FL_RAW (1 << 1)
@@ -748,6 +768,7 @@ struct cec_event {
#define CEC_OP_FEAT_DEV_HAS_SET_AUDIO_RATE 0x08
#define CEC_OP_FEAT_DEV_SINK_HAS_ARC_TX 0x04
#define CEC_OP_FEAT_DEV_SOURCE_HAS_ARC_RX 0x02
#define CEC_OP_FEAT_DEV_HAS_SET_AUDIO_VOLUME_LEVEL 0x01
#define CEC_MSG_GIVE_FEATURES 0xa5 /* HDMI 2.0 */
@@ -1039,6 +1060,7 @@ struct cec_event {
#define CEC_OP_AUD_FMT_ID_CEA861 0
#define CEC_OP_AUD_FMT_ID_CEA861_CXT 1
#define CEC_MSG_SET_AUDIO_VOLUME_LEVEL 0x73
/* Audio Rate Control Feature */
#define CEC_MSG_SET_AUDIO_RATE 0x9a

File diff suppressed because it is too large Load Diff

View File

@@ -75,7 +75,7 @@ struct cn_msg {
__u16 len; /* Length of the following data */
__u16 flags;
__u8 data[0];
__u8 data[];
};
#endif /* __CONNECTOR_H */

View File

@@ -28,7 +28,7 @@
#define _BITUL(x) (_UL(1) << (x))
#define _BITULL(x) (_ULL(1) << (x))
#define __ALIGN_KERNEL(x, a) __ALIGN_KERNEL_MASK(x, (typeof(x))(a) - 1)
#define __ALIGN_KERNEL(x, a) __ALIGN_KERNEL_MASK(x, (__typeof__(x))(a) - 1)
#define __ALIGN_KERNEL_MASK(x, mask) (((x) + (mask)) & ~(mask))
#define __KERNEL_DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d))

View File

@@ -61,6 +61,10 @@ enum counter_event_type {
COUNTER_EVENT_THRESHOLD,
/* Index signal detected */
COUNTER_EVENT_INDEX,
/* State of counter is changed */
COUNTER_EVENT_CHANGE_OF_STATE,
/* Count value captured */
COUNTER_EVENT_CAPTURE,
};
/**
@@ -151,4 +155,10 @@ enum counter_synapse_action {
COUNTER_SYNAPSE_ACTION_BOTH_EDGES,
};
/* Signal polarity values */
enum counter_signal_polarity {
COUNTER_SIGNAL_POLARITY_POSITIVE,
COUNTER_SIGNAL_POLARITY_NEGATIVE,
};
#endif /* _COUNTER_H_ */

View File

@@ -11,14 +11,19 @@
/**
* DOC: UAPI
*
* Not all of all commands that the driver supports are always available for use
* by userspace. Userspace must check the results from the QUERY command in
* order to determine the live set of commands.
* Not all of the commands that the driver supports are available for use by
* userspace at all times. Userspace can check the result of the QUERY command
* to determine the live set of commands. Alternatively, it can issue the
* command and check for failure.
*/
#define CXL_MEM_QUERY_COMMANDS _IOR(0xCE, 1, struct cxl_mem_query_commands)
#define CXL_MEM_SEND_COMMAND _IOWR(0xCE, 2, struct cxl_send_command)
/*
* NOTE: New defines must be added to the end of the list to preserve
* compatibility because this enum is exported to user space.
*/
#define CXL_CMDS \
___C(INVALID, "Invalid Command"), \
___C(IDENTIFY, "Identify Command"), \
@@ -68,8 +73,21 @@ static const struct {
* struct cxl_command_info - Command information returned from a query.
* @id: ID number for the command.
* @flags: Flags that specify command behavior.
* @size_in: Expected input size, or -1 if variable length.
* @size_out: Expected output size, or -1 if variable length.
*
* CXL_MEM_COMMAND_FLAG_USER_ENABLED
*
* The given command id is supported by the driver and is supported by
* a related opcode on the device.
*
* CXL_MEM_COMMAND_FLAG_EXCLUSIVE
*
* Requests with the given command id will terminate with EBUSY as the
* kernel actively owns management of the given resource. For example,
* the label-storage-area can not be written while the kernel is
* actively managing that space.
*
* @size_in: Expected input size, or ~0 if variable length.
* @size_out: Expected output size, or ~0 if variable length.
*
* Represents a single command that is supported by both the driver and the
* hardware. This is returned as part of an array from the query ioctl. The
@@ -77,8 +95,8 @@ static const struct {
* bytes of output.
*
* - @id = 10
* - @flags = 0
* - @size_in = -1
* - @flags = CXL_MEM_COMMAND_FLAG_ENABLED
* - @size_in = ~0
* - @size_out = 0
*
* See struct cxl_mem_query_commands.
@@ -87,10 +105,12 @@ struct cxl_command_info {
__u32 id;
__u32 flags;
#define CXL_MEM_COMMAND_FLAG_MASK GENMASK(0, 0)
#define CXL_MEM_COMMAND_FLAG_MASK GENMASK(1, 0)
#define CXL_MEM_COMMAND_FLAG_ENABLED BIT(0)
#define CXL_MEM_COMMAND_FLAG_EXCLUSIVE BIT(1)
__s32 size_in;
__s32 size_out;
__u32 size_in;
__u32 size_out;
};
/**
@@ -169,13 +189,13 @@ struct cxl_send_command {
__u32 retval;
struct {
__s32 size;
__u32 size;
__u32 rsvd;
__u64 payload;
} in;
struct {
__s32 size;
__u32 size;
__u32 rsvd;
__u64 payload;
} out;

View File

@@ -0,0 +1,35 @@
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
#ifndef _LINUX_CYCLADES_H
#define _LINUX_CYCLADES_H
#warning "Support for features provided by this header has been removed"
#warning "Please consider updating your code"
struct cyclades_monitor {
unsigned long int_count;
unsigned long char_count;
unsigned long char_max;
unsigned long char_last;
};
#define CYGETMON 0x435901
#define CYGETTHRESH 0x435902
#define CYSETTHRESH 0x435903
#define CYGETDEFTHRESH 0x435904
#define CYSETDEFTHRESH 0x435905
#define CYGETTIMEOUT 0x435906
#define CYSETTIMEOUT 0x435907
#define CYGETDEFTIMEOUT 0x435908
#define CYSETDEFTIMEOUT 0x435909
#define CYSETRFLOW 0x43590a
#define CYGETRFLOW 0x43590b
#define CYSETRTSDTR_INV 0x43590c
#define CYGETRTSDTR_INV 0x43590d
#define CYZSETPOLLCYCLE 0x43590e
#define CYZGETPOLLCYCLE 0x43590f
#define CYGETCD1400VER 0x435910
#define CYSETWAIT 0x435912
#define CYGETWAIT 0x435913
#endif /* _LINUX_CYCLADES_H */

View File

@@ -91,7 +91,7 @@ struct cycx_firmware {
unsigned short reserved[6];
char descr[CFM_DESCR_LEN];
struct cycx_fw_info info;
unsigned char image[0];
unsigned char image[];
};
struct cycx_fw_header {

View File

@@ -218,6 +218,9 @@ struct cee_pfc {
#define IEEE_8021QAZ_APP_SEL_ANY 4
#define IEEE_8021QAZ_APP_SEL_DSCP 5
/* Non-std selector values */
#define DCB_APP_SEL_PCP 255
/* This structure contains the IEEE 802.1Qaz APP managed object. This
* object is also used for the CEE std as well.
*
@@ -247,6 +250,8 @@ struct dcb_app {
__u16 protocol;
};
#define IEEE_8021QAZ_APP_SEL_MAX 255
/**
* struct dcb_peer_app_info - APP feature information sent by the peer
*
@@ -405,6 +410,8 @@ enum dcbnl_attrs {
* @DCB_ATTR_IEEE_PEER_ETS: peer ETS configuration - get only
* @DCB_ATTR_IEEE_PEER_PFC: peer PFC configuration - get only
* @DCB_ATTR_IEEE_PEER_APP: peer APP tlv - get only
* @DCB_ATTR_DCB_APP_TRUST_TABLE: selector trust table
* @DCB_ATTR_DCB_REWR_TABLE: rewrite configuration
*/
enum ieee_attrs {
DCB_ATTR_IEEE_UNSPEC,
@@ -418,6 +425,8 @@ enum ieee_attrs {
DCB_ATTR_IEEE_QCN,
DCB_ATTR_IEEE_QCN_STATS,
DCB_ATTR_DCB_BUFFER,
DCB_ATTR_DCB_APP_TRUST_TABLE,
DCB_ATTR_DCB_REWR_TABLE,
__DCB_ATTR_IEEE_MAX
};
#define DCB_ATTR_IEEE_MAX (__DCB_ATTR_IEEE_MAX - 1)
@@ -425,6 +434,7 @@ enum ieee_attrs {
enum ieee_attrs_app {
DCB_ATTR_IEEE_APP_UNSPEC,
DCB_ATTR_IEEE_APP,
DCB_ATTR_DCB_APP,
__DCB_ATTR_IEEE_APP_MAX
};
#define DCB_ATTR_IEEE_APP_MAX (__DCB_ATTR_IEEE_APP_MAX - 1)

View File

@@ -131,6 +131,14 @@ enum devlink_command {
DEVLINK_CMD_RATE_NEW,
DEVLINK_CMD_RATE_DEL,
DEVLINK_CMD_LINECARD_GET, /* can dump */
DEVLINK_CMD_LINECARD_SET,
DEVLINK_CMD_LINECARD_NEW,
DEVLINK_CMD_LINECARD_DEL,
DEVLINK_CMD_SELFTESTS_GET, /* can dump */
DEVLINK_CMD_SELFTESTS_RUN,
/* add new commands above here */
__DEVLINK_CMD_MAX,
DEVLINK_CMD_MAX = __DEVLINK_CMD_MAX - 1
@@ -271,6 +279,30 @@ enum {
#define DEVLINK_SUPPORTED_FLASH_OVERWRITE_SECTIONS \
(_BITUL(__DEVLINK_FLASH_OVERWRITE_MAX_BIT) - 1)
enum devlink_attr_selftest_id {
DEVLINK_ATTR_SELFTEST_ID_UNSPEC,
DEVLINK_ATTR_SELFTEST_ID_FLASH, /* flag */
__DEVLINK_ATTR_SELFTEST_ID_MAX,
DEVLINK_ATTR_SELFTEST_ID_MAX = __DEVLINK_ATTR_SELFTEST_ID_MAX - 1
};
enum devlink_selftest_status {
DEVLINK_SELFTEST_STATUS_SKIP,
DEVLINK_SELFTEST_STATUS_PASS,
DEVLINK_SELFTEST_STATUS_FAIL
};
enum devlink_attr_selftest_result {
DEVLINK_ATTR_SELFTEST_RESULT_UNSPEC,
DEVLINK_ATTR_SELFTEST_RESULT, /* nested */
DEVLINK_ATTR_SELFTEST_RESULT_ID, /* u32, enum devlink_attr_selftest_id */
DEVLINK_ATTR_SELFTEST_RESULT_STATUS, /* u8, enum devlink_selftest_status */
__DEVLINK_ATTR_SELFTEST_RESULT_MAX,
DEVLINK_ATTR_SELFTEST_RESULT_MAX = __DEVLINK_ATTR_SELFTEST_RESULT_MAX - 1
};
/**
* enum devlink_trap_action - Packet trap action.
* @DEVLINK_TRAP_ACTION_DROP: Packet is dropped by the device and a copy is not
@@ -338,6 +370,19 @@ enum devlink_reload_limit {
#define DEVLINK_RELOAD_LIMITS_VALID_MASK (_BITUL(__DEVLINK_RELOAD_LIMIT_MAX) - 1)
enum devlink_linecard_state {
DEVLINK_LINECARD_STATE_UNSPEC,
DEVLINK_LINECARD_STATE_UNPROVISIONED,
DEVLINK_LINECARD_STATE_UNPROVISIONING,
DEVLINK_LINECARD_STATE_PROVISIONING,
DEVLINK_LINECARD_STATE_PROVISIONING_FAILED,
DEVLINK_LINECARD_STATE_PROVISIONED,
DEVLINK_LINECARD_STATE_ACTIVE,
__DEVLINK_LINECARD_STATE_MAX,
DEVLINK_LINECARD_STATE_MAX = __DEVLINK_LINECARD_STATE_MAX - 1
};
enum devlink_attr {
/* don't change the order or add anything between, this is ABI! */
DEVLINK_ATTR_UNSPEC,
@@ -553,6 +598,20 @@ enum devlink_attr {
DEVLINK_ATTR_REGION_MAX_SNAPSHOTS, /* u32 */
DEVLINK_ATTR_LINECARD_INDEX, /* u32 */
DEVLINK_ATTR_LINECARD_STATE, /* u8 */
DEVLINK_ATTR_LINECARD_TYPE, /* string */
DEVLINK_ATTR_LINECARD_SUPPORTED_TYPES, /* nested */
DEVLINK_ATTR_NESTED_DEVLINK, /* nested */
DEVLINK_ATTR_SELFTESTS, /* nested */
DEVLINK_ATTR_RATE_TX_PRIORITY, /* u32 */
DEVLINK_ATTR_RATE_TX_WEIGHT, /* u32 */
DEVLINK_ATTR_REGION_DIRECT, /* flag */
/* add new attributes above here, update the policy in devlink.c */
__DEVLINK_ATTR_MAX,
@@ -599,11 +658,24 @@ enum devlink_resource_unit {
DEVLINK_RESOURCE_UNIT_ENTRY,
};
enum devlink_port_fn_attr_cap {
DEVLINK_PORT_FN_ATTR_CAP_ROCE_BIT,
DEVLINK_PORT_FN_ATTR_CAP_MIGRATABLE_BIT,
/* Add new caps above */
__DEVLINK_PORT_FN_ATTR_CAPS_MAX,
};
#define DEVLINK_PORT_FN_CAP_ROCE _BITUL(DEVLINK_PORT_FN_ATTR_CAP_ROCE_BIT)
#define DEVLINK_PORT_FN_CAP_MIGRATABLE \
_BITUL(DEVLINK_PORT_FN_ATTR_CAP_MIGRATABLE_BIT)
enum devlink_port_function_attr {
DEVLINK_PORT_FUNCTION_ATTR_UNSPEC,
DEVLINK_PORT_FUNCTION_ATTR_HW_ADDR, /* binary */
DEVLINK_PORT_FN_ATTR_STATE, /* u8 */
DEVLINK_PORT_FN_ATTR_OPSTATE, /* u8 */
DEVLINK_PORT_FN_ATTR_CAPS, /* bitfield32 */
__DEVLINK_PORT_FUNCTION_ATTR_MAX,
DEVLINK_PORT_FUNCTION_ATTR_MAX = __DEVLINK_PORT_FUNCTION_ATTR_MAX - 1

View File

@@ -69,7 +69,6 @@ struct dlm_lksb {
/* dlm_new_lockspace() flags */
#define DLM_LSFL_TIMEWARN 0x00000002
#define DLM_LSFL_FS 0x00000004
#define DLM_LSFL_NEWEXCL 0x00000008

View File

@@ -182,7 +182,7 @@ struct dm_target_spec {
struct dm_target_deps {
__u32 count; /* Array size */
__u32 padding; /* unused */
__u64 dev[0]; /* out */
__u64 dev[]; /* out */
};
/*
@@ -192,7 +192,7 @@ struct dm_name_list {
__u64 dev;
__u32 next; /* offset to the next record from
the _start_ of this */
char name[0];
char name[];
/*
* The following members can be accessed by taking a pointer that
@@ -216,7 +216,7 @@ struct dm_target_versions {
__u32 next;
__u32 version[3];
char name[0];
char name[];
};
/*
@@ -225,7 +225,7 @@ struct dm_target_versions {
struct dm_target_msg {
__u64 sector; /* Device sector */
char message[0];
char message[];
};
/*
@@ -286,9 +286,9 @@ enum {
#define DM_DEV_SET_GEOMETRY _IOWR(DM_IOCTL, DM_DEV_SET_GEOMETRY_CMD, struct dm_ioctl)
#define DM_VERSION_MAJOR 4
#define DM_VERSION_MINOR 45
#define DM_VERSION_MINOR 47
#define DM_VERSION_PATCHLEVEL 0
#define DM_VERSION_EXTRA "-ioctl (2021-03-22)"
#define DM_VERSION_EXTRA "-ioctl (2022-07-28)"
/* Status bits */
#define DM_READONLY_FLAG (1 << 0) /* In/Out */

View File

@@ -426,7 +426,7 @@ struct dm_ulog_request {
__u32 request_type; /* DM_ULOG_* defined above */
__u32 data_size; /* How much data (not including this struct) */
char data[0];
char data[];
};
#endif /* __DM_LOG_USERSPACE_H__ */

View File

@@ -85,6 +85,88 @@ struct dma_buf_sync {
#define DMA_BUF_NAME_LEN 32
/**
* struct dma_buf_export_sync_file - Get a sync_file from a dma-buf
*
* Userspace can perform a DMA_BUF_IOCTL_EXPORT_SYNC_FILE to retrieve the
* current set of fences on a dma-buf file descriptor as a sync_file. CPU
* waits via poll() or other driver-specific mechanisms typically wait on
* whatever fences are on the dma-buf at the time the wait begins. This
* is similar except that it takes a snapshot of the current fences on the
* dma-buf for waiting later instead of waiting immediately. This is
* useful for modern graphics APIs such as Vulkan which assume an explicit
* synchronization model but still need to inter-operate with dma-buf.
*
* The intended usage pattern is the following:
*
* 1. Export a sync_file with flags corresponding to the expected GPU usage
* via DMA_BUF_IOCTL_EXPORT_SYNC_FILE.
*
* 2. Submit rendering work which uses the dma-buf. The work should wait on
* the exported sync file before rendering and produce another sync_file
* when complete.
*
* 3. Import the rendering-complete sync_file into the dma-buf with flags
* corresponding to the GPU usage via DMA_BUF_IOCTL_IMPORT_SYNC_FILE.
*
* Unlike doing implicit synchronization via a GPU kernel driver's exec ioctl,
* the above is not a single atomic operation. If userspace wants to ensure
* ordering via these fences, it is the respnosibility of userspace to use
* locks or other mechanisms to ensure that no other context adds fences or
* submits work between steps 1 and 3 above.
*/
struct dma_buf_export_sync_file {
/**
* @flags: Read/write flags
*
* Must be DMA_BUF_SYNC_READ, DMA_BUF_SYNC_WRITE, or both.
*
* If DMA_BUF_SYNC_READ is set and DMA_BUF_SYNC_WRITE is not set,
* the returned sync file waits on any writers of the dma-buf to
* complete. Waiting on the returned sync file is equivalent to
* poll() with POLLIN.
*
* If DMA_BUF_SYNC_WRITE is set, the returned sync file waits on
* any users of the dma-buf (read or write) to complete. Waiting
* on the returned sync file is equivalent to poll() with POLLOUT.
* If both DMA_BUF_SYNC_WRITE and DMA_BUF_SYNC_READ are set, this
* is equivalent to just DMA_BUF_SYNC_WRITE.
*/
__u32 flags;
/** @fd: Returned sync file descriptor */
__s32 fd;
};
/**
* struct dma_buf_import_sync_file - Insert a sync_file into a dma-buf
*
* Userspace can perform a DMA_BUF_IOCTL_IMPORT_SYNC_FILE to insert a
* sync_file into a dma-buf for the purposes of implicit synchronization
* with other dma-buf consumers. This allows clients using explicitly
* synchronized APIs such as Vulkan to inter-op with dma-buf consumers
* which expect implicit synchronization such as OpenGL or most media
* drivers/video.
*/
struct dma_buf_import_sync_file {
/**
* @flags: Read/write flags
*
* Must be DMA_BUF_SYNC_READ, DMA_BUF_SYNC_WRITE, or both.
*
* If DMA_BUF_SYNC_READ is set and DMA_BUF_SYNC_WRITE is not set,
* this inserts the sync_file as a read-only fence. Any subsequent
* implicitly synchronized writes to this dma-buf will wait on this
* fence but reads will not.
*
* If DMA_BUF_SYNC_WRITE is set, this inserts the sync_file as a
* write fence. All subsequent implicitly synchronized access to
* this dma-buf will wait on this fence.
*/
__u32 flags;
/** @fd: Sync file descriptor */
__s32 fd;
};
#define DMA_BUF_BASE 'b'
#define DMA_BUF_IOCTL_SYNC _IOW(DMA_BUF_BASE, 0, struct dma_buf_sync)
@@ -92,7 +174,9 @@ struct dma_buf_sync {
* between them in actual uapi, they're just different numbers.
*/
#define DMA_BUF_SET_NAME _IOW(DMA_BUF_BASE, 1, const char *)
#define DMA_BUF_SET_NAME_A _IOW(DMA_BUF_BASE, 1, u32)
#define DMA_BUF_SET_NAME_B _IOW(DMA_BUF_BASE, 1, u64)
#define DMA_BUF_SET_NAME_A _IOW(DMA_BUF_BASE, 1, __u32)
#define DMA_BUF_SET_NAME_B _IOW(DMA_BUF_BASE, 1, __u64)
#define DMA_BUF_IOCTL_EXPORT_SYNC_FILE _IOWR(DMA_BUF_BASE, 2, struct dma_buf_export_sync_file)
#define DMA_BUF_IOCTL_IMPORT_SYNC_FILE _IOW(DMA_BUF_BASE, 3, struct dma_buf_import_sync_file)
#endif

View File

@@ -1,149 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
#ifndef _LINUX_DN_H
#define _LINUX_DN_H
#include <linux/ioctl.h>
#include <linux/types.h>
#include <linux/if_ether.h>
/*
DECnet Data Structures and Constants
*/
/*
* DNPROTO_NSP can't be the same as SOL_SOCKET,
* so increment each by one (compared to ULTRIX)
*/
#define DNPROTO_NSP 2 /* NSP protocol number */
#define DNPROTO_ROU 3 /* Routing protocol number */
#define DNPROTO_NML 4 /* Net mgt protocol number */
#define DNPROTO_EVL 5 /* Evl protocol number (usr) */
#define DNPROTO_EVR 6 /* Evl protocol number (evl) */
#define DNPROTO_NSPT 7 /* NSP trace protocol number */
#define DN_ADDL 2
#define DN_MAXADDL 2 /* ULTRIX headers have 20 here, but pathworks has 2 */
#define DN_MAXOPTL 16
#define DN_MAXOBJL 16
#define DN_MAXACCL 40
#define DN_MAXALIASL 128
#define DN_MAXNODEL 256
#define DNBUFSIZE 65023
/*
* SET/GET Socket options - must match the DSO_ numbers below
*/
#define SO_CONDATA 1
#define SO_CONACCESS 2
#define SO_PROXYUSR 3
#define SO_LINKINFO 7
#define DSO_CONDATA 1 /* Set/Get connect data */
#define DSO_DISDATA 10 /* Set/Get disconnect data */
#define DSO_CONACCESS 2 /* Set/Get connect access data */
#define DSO_ACCEPTMODE 4 /* Set/Get accept mode */
#define DSO_CONACCEPT 5 /* Accept deferred connection */
#define DSO_CONREJECT 6 /* Reject deferred connection */
#define DSO_LINKINFO 7 /* Set/Get link information */
#define DSO_STREAM 8 /* Set socket type to stream */
#define DSO_SEQPACKET 9 /* Set socket type to sequenced packet */
#define DSO_MAXWINDOW 11 /* Maximum window size allowed */
#define DSO_NODELAY 12 /* Turn off nagle */
#define DSO_CORK 13 /* Wait for more data! */
#define DSO_SERVICES 14 /* NSP Services field */
#define DSO_INFO 15 /* NSP Info field */
#define DSO_MAX 15 /* Maximum option number */
/* LINK States */
#define LL_INACTIVE 0
#define LL_CONNECTING 1
#define LL_RUNNING 2
#define LL_DISCONNECTING 3
#define ACC_IMMED 0
#define ACC_DEFER 1
#define SDF_WILD 1 /* Wild card object */
#define SDF_PROXY 2 /* Addr eligible for proxy */
#define SDF_UICPROXY 4 /* Use uic-based proxy */
/* Structures */
struct dn_naddr {
__le16 a_len;
__u8 a_addr[DN_MAXADDL]; /* Two bytes little endian */
};
struct sockaddr_dn {
__u16 sdn_family;
__u8 sdn_flags;
__u8 sdn_objnum;
__le16 sdn_objnamel;
__u8 sdn_objname[DN_MAXOBJL];
struct dn_naddr sdn_add;
};
#define sdn_nodeaddrl sdn_add.a_len /* Node address length */
#define sdn_nodeaddr sdn_add.a_addr /* Node address */
/*
* DECnet set/get DSO_CONDATA, DSO_DISDATA (optional data) structure
*/
struct optdata_dn {
__le16 opt_status; /* Extended status return */
#define opt_sts opt_status
__le16 opt_optl; /* Length of user data */
__u8 opt_data[16]; /* User data */
};
struct accessdata_dn {
__u8 acc_accl;
__u8 acc_acc[DN_MAXACCL];
__u8 acc_passl;
__u8 acc_pass[DN_MAXACCL];
__u8 acc_userl;
__u8 acc_user[DN_MAXACCL];
};
/*
* DECnet logical link information structure
*/
struct linkinfo_dn {
__u16 idn_segsize; /* Segment size for link */
__u8 idn_linkstate; /* Logical link state */
};
/*
* Ethernet address format (for DECnet)
*/
union etheraddress {
__u8 dne_addr[ETH_ALEN]; /* Full ethernet address */
struct {
__u8 dne_hiord[4]; /* DECnet HIORD prefix */
__u8 dne_nodeaddr[2]; /* DECnet node address */
} dne_remote;
};
/*
* DECnet physical socket address format
*/
struct dn_addr {
__le16 dna_family; /* AF_DECnet */
union etheraddress dna_netaddr; /* DECnet ethernet address */
};
#define DECNET_IOCTL_BASE 0x89 /* PROTOPRIVATE range */
#define SIOCSNETADDR _IOW(DECNET_IOCTL_BASE, 0xe0, struct dn_naddr)
#define SIOCGNETADDR _IOR(DECNET_IOCTL_BASE, 0xe1, struct dn_naddr)
#define OSIOCSNETADDR _IOW(DECNET_IOCTL_BASE, 0xe0, int)
#define OSIOCGNETADDR _IOR(DECNET_IOCTL_BASE, 0xe1, int)
#endif /* _LINUX_DN_H */

View File

@@ -7,21 +7,6 @@
* Copyright (C) 2000 Ralph Metzler <ralph@convergence.de>
* & Marcus Metzler <marcus@convergence.de>
* for convergence integrated media GmbH
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Lesser Public License
* as published by the Free Software Foundation; either version 2.1
* of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
*
*/
#ifndef _DVBAUDIO_H_

View File

@@ -5,21 +5,6 @@
* Copyright (C) 2000 Ralph Metzler <ralph@convergence.de>
* & Marcus Metzler <marcus@convergence.de>
* for convergence integrated media GmbH
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Lesser Public License
* as published by the Free Software Foundation; either version 2.1
* of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
*
*/
#ifndef _DVBCA_H_

View File

@@ -5,21 +5,6 @@
* Copyright (C) 2000 Marcus Metzler <marcus@convergence.de>
* & Ralph Metzler <ralph@convergence.de>
* for convergence integrated media GmbH
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public License
* as published by the Free Software Foundation; either version 2.1
* of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
*
*/
#ifndef _DVBDMX_H_

View File

@@ -7,21 +7,6 @@
* Holger Waechtler <holger@convergence.de>
* Andre Draszik <ad@convergence.de>
* for convergence integrated media GmbH
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public License
* as published by the Free Software Foundation; either version 2.1
* of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
*
*/
#ifndef _DVBFRONTEND_H_
@@ -282,7 +267,6 @@ enum fe_spectral_inversion {
/**
* enum fe_code_rate - Type of Forward Error Correction (FEC)
*
*
* @FEC_NONE: No Forward Error Correction Code
* @FEC_1_2: Forward Error Correction Code 1/2
* @FEC_2_3: Forward Error Correction Code 2/3
@@ -296,6 +280,22 @@ enum fe_spectral_inversion {
* @FEC_3_5: Forward Error Correction Code 3/5
* @FEC_9_10: Forward Error Correction Code 9/10
* @FEC_2_5: Forward Error Correction Code 2/5
* @FEC_1_3: Forward Error Correction Code 1/3
* @FEC_1_4: Forward Error Correction Code 1/4
* @FEC_5_9: Forward Error Correction Code 5/9
* @FEC_7_9: Forward Error Correction Code 7/9
* @FEC_8_15: Forward Error Correction Code 8/15
* @FEC_11_15: Forward Error Correction Code 11/15
* @FEC_13_18: Forward Error Correction Code 13/18
* @FEC_9_20: Forward Error Correction Code 9/20
* @FEC_11_20: Forward Error Correction Code 11/20
* @FEC_23_36: Forward Error Correction Code 23/36
* @FEC_25_36: Forward Error Correction Code 25/36
* @FEC_13_45: Forward Error Correction Code 13/45
* @FEC_26_45: Forward Error Correction Code 26/45
* @FEC_28_45: Forward Error Correction Code 28/45
* @FEC_32_45: Forward Error Correction Code 32/45
* @FEC_77_90: Forward Error Correction Code 77/90
*
* Please note that not all FEC types are supported by a given standard.
*/
@@ -313,6 +313,22 @@ enum fe_code_rate {
FEC_3_5,
FEC_9_10,
FEC_2_5,
FEC_1_3,
FEC_1_4,
FEC_5_9,
FEC_7_9,
FEC_8_15,
FEC_11_15,
FEC_13_18,
FEC_9_20,
FEC_11_20,
FEC_23_36,
FEC_25_36,
FEC_13_45,
FEC_26_45,
FEC_28_45,
FEC_32_45,
FEC_77_90,
};
/**
@@ -331,6 +347,13 @@ enum fe_code_rate {
* @APSK_32: 32-APSK modulation
* @DQPSK: DQPSK modulation
* @QAM_4_NR: 4-QAM-NR modulation
* @QAM_1024: 1024-QAM modulation
* @QAM_4096: 4096-QAM modulation
* @APSK_8_L: 8APSK-L modulation
* @APSK_16_L: 16APSK-L modulation
* @APSK_32_L: 32APSK-L modulation
* @APSK_64: 64APSK modulation
* @APSK_64_L: 64APSK-L modulation
*
* Please note that not all modulations are supported by a given standard.
*
@@ -350,6 +373,13 @@ enum fe_modulation {
APSK_32,
DQPSK,
QAM_4_NR,
QAM_1024,
QAM_4096,
APSK_8_L,
APSK_16_L,
APSK_32_L,
APSK_64,
APSK_64_L,
};
/**
@@ -404,6 +434,7 @@ enum fe_transmit_mode {
* @GUARD_INTERVAL_PN420: PN length 420 (1/4)
* @GUARD_INTERVAL_PN595: PN length 595 (1/6)
* @GUARD_INTERVAL_PN945: PN length 945 (1/9)
* @GUARD_INTERVAL_1_64: Guard interval 1/64
*
* Please note that not all guard intervals are supported by a given standard.
*/
@@ -419,6 +450,7 @@ enum fe_guard_interval {
GUARD_INTERVAL_PN420,
GUARD_INTERVAL_PN595,
GUARD_INTERVAL_PN945,
GUARD_INTERVAL_1_64,
};
/**
@@ -571,6 +603,9 @@ enum fe_pilot {
* @ROLLOFF_20: Roloff factor: α=20%
* @ROLLOFF_25: Roloff factor: α=25%
* @ROLLOFF_AUTO: Auto-detect the roloff factor.
* @ROLLOFF_15: Rolloff factor: α=15%
* @ROLLOFF_10: Rolloff factor: α=10%
* @ROLLOFF_5: Rolloff factor: α=5%
*
* .. note:
*
@@ -581,6 +616,9 @@ enum fe_rolloff {
ROLLOFF_20,
ROLLOFF_25,
ROLLOFF_AUTO,
ROLLOFF_15,
ROLLOFF_10,
ROLLOFF_5,
};
/**
@@ -594,6 +632,8 @@ enum fe_rolloff {
* Cable TV: DVB-C following ITU-T J.83 Annex B spec (ClearQAM)
* @SYS_DVBC_ANNEX_C:
* Cable TV: DVB-C following ITU-T J.83 Annex C spec
* @SYS_DVBC2:
* Cable TV: DVB-C2
* @SYS_ISDBC:
* Cable TV: ISDB-C (no drivers yet)
* @SYS_DVBT:
@@ -611,7 +651,7 @@ enum fe_rolloff {
* @SYS_DVBS:
* Satellite TV: DVB-S
* @SYS_DVBS2:
* Satellite TV: DVB-S2
* Satellite TV: DVB-S2 and DVB-S2X
* @SYS_TURBO:
* Satellite TV: DVB-S Turbo
* @SYS_ISDBS:
@@ -645,6 +685,7 @@ enum fe_delivery_system {
SYS_DVBT2,
SYS_TURBO,
SYS_DVBC_ANNEX_C,
SYS_DVBC2,
};
/* backward compatibility definitions for delivery systems */
@@ -720,7 +761,7 @@ enum atscmh_rs_frame_mode {
};
/**
* enum atscmh_rs_code_mode
* enum atscmh_rs_code_mode - ATSC-M/H Reed Solomon modes
* @ATSCMH_RSCODE_211_187: Reed Solomon code (211,187).
* @ATSCMH_RSCODE_223_187: Reed Solomon code (223,187).
* @ATSCMH_RSCODE_235_187: Reed Solomon code (235,187).

View File

@@ -5,21 +5,6 @@
* Copyright (C) 2000 Marcus Metzler <marcus@convergence.de>
* & Ralph Metzler <ralph@convergence.de>
* for convergence integrated media GmbH
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public License
* as published by the Free Software Foundation; either version 2.1
* of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
*
*/
#ifndef _DVBNET_H_

View File

@@ -7,21 +7,6 @@
* Copyright (C) 2001 Ralph Metzler <ralph@convergence.de>
* & Marcus Metzler <marcus@convergence.de>
* for convergence integrated media GmbH
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Lesser Public License
* as published by the Free Software Foundation; either version 2.1
* of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
*
*/
#ifndef _DVBOSD_H_

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