zig

commit 3620dc3957e3fbaad5da386e114f74fc7d68fd80 (tree)
parent 7ef45efd53b7f25a1ebecc0259b00cd01f885a18
Author: Motiejus Jakštys <motiejus@jakstys.lt>
Date:   Mon, 16 Feb 2026 11:28:56 +0000

astgen.c: port @breakpoint and @prefetch builtins to enable builtin_functions_returning_void_or_noreturn corpus test

Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>

Diffstat:
M
stage0/astgen.c
 | 
27
+++++++++++++++++++++++++++
M
stage0/astgen_test.zig
 | 
2
+-

2 files changed, 28 insertions(+), 1 deletion(-)
diff --git a/stage0/astgen.c b/stage0/astgen.c
@@ -2932,6 +2932,7 @@ static uint32_t tryResolvePrimitiveIdent(GenZir* gz, uint32_t node);
 #define COMPTIME_REASON_TUPLE_FIELD_DEFAULT_VALUE 57
 #define COMPTIME_REASON_UNION_FIELD_NAME 45
 #define COMPTIME_REASON_EXPORT_OPTIONS 15
+#define COMPTIME_REASON_PREFETCH_OPTIONS 17
 #define COMPTIME_REASON_CALL_MODIFIER 18
 #define COMPTIME_REASON_SHUFFLE_MASK 11
 #define COMPTIME_REASON_DECL_NAME 41
@@ -4370,6 +4371,10 @@ static uint32_t builtinCall(
     if (name_len == 4 && memcmp(source + name_start, "This", 4) == 0)
         return rvalue(
             gz, rl, addNodeExtended(gz, (uint16_t)ZIR_EXT_THIS, node), node);
+    // @breakpoint (AstGen.zig:9376).
+    if (name_len == 10 && memcmp(source + name_start, "breakpoint", 10) == 0)
+        return rvalue(gz, rl,
+            addNodeExtended(gz, (uint16_t)ZIR_EXT_BREAKPOINT, node), node);
     // @memmove (AstGen.zig:9648-9654).
     if (name_len == 7 && memcmp(source + name_start, "memmove", 7) == 0) {
         AstData nd = tree->nodes.datas[node];
@@ -5161,6 +5166,28 @@ static uint32_t builtinCall(
             gz, ZIR_INST_HAS_FIELD, node, container_type, name_inst);
         return rvalue(gz, rl, result, node);
     }
+    // @prefetch — AstGen.zig:9681-9691.
+    if (name_len == 8
+        && memcmp(source + name_start, "prefetch", 8) == 0) {
+        AstData nd = tree->nodes.datas[node];
+        uint32_t prefetch_options_ty
+            = addBuiltinValue(gz, node, ZIR_BUILTIN_VALUE_PREFETCH_OPTIONS);
+        uint32_t ptr = expr(gz, scope, nd.lhs);
+        ResultLoc options_rl = { .tag = RL_COERCED_TY,
+            .data = prefetch_options_ty, .src_node = 0, .ctx = RI_CTX_NONE };
+        uint32_t options
+            = comptimeExpr(gz, scope, options_rl, nd.rhs, nd.rhs,
+                COMPTIME_REASON_PREFETCH_OPTIONS);
+        ensureExtraCapacity(ag, 3);
+        uint32_t payload_index = ag->extra_len;
+        ag->extra[ag->extra_len++]
+            = (uint32_t)((int32_t)node - (int32_t)gz->decl_node_index);
+        ag->extra[ag->extra_len++] = ptr;
+        ag->extra[ag->extra_len++] = options;
+        addExtendedPayload(
+            gz, (uint16_t)ZIR_EXT_PREFETCH, payload_index);
+        return rvalue(gz, rl, ZIR_REF_VOID_VALUE, node);
+    }
     // clang-format on
 
     // TODO: handle other 1-arg builtins.
diff --git a/stage0/astgen_test.zig b/stage0/astgen_test.zig
@@ -1222,7 +1222,7 @@ const corpus_files = .{
     "../test/behavior/bitreverse.zig",
     "../test/behavior/bit_shifting.zig",
     "../test/behavior/bool.zig",
-    //"../test/behavior/builtin_functions_returning_void_or_noreturn.zig",
+    "../test/behavior/builtin_functions_returning_void_or_noreturn.zig",
     "../test/behavior/byteswap.zig",
     "../test/behavior/byval_arg_var.zig",
     "../test/behavior/cast_int.zig",