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stage2,x64: deref memory if referenced via GOT for local vars

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This commit is contained in:
Jakub Konka
2022-04-13 16:24:56 +02:00
parent 0bf7283330
commit 3f912430bd
1 changed files with 13 additions and 3 deletions
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16
src/arch/x86_64/CodeGen.zig
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@@ -3911,8 +3911,8 @@ fn airDbgVar(self: *Self, inst: Air.Inst.Index) !void {
const tag = self.air.instructions.items(.tag)[inst];
switch (tag) {
.dbg_var_ptr => try self.genVarDbgInfo(ty.childType(), mcv, name),
.dbg_var_val => try self.genVarDbgInfo(ty, mcv, name),
.dbg_var_ptr => try self.genVarDbgInfo(tag, ty.childType(), mcv, name),
.dbg_var_val => try self.genVarDbgInfo(tag, ty, mcv, name),
else => unreachable,
}
@@ -3921,6 +3921,7 @@ fn airDbgVar(self: *Self, inst: Air.Inst.Index) !void {
fn genVarDbgInfo(
self: *Self,
tag: Air.Inst.Tag,
ty: Type,
mcv: MCValue,
name: [:0]const u8,
@@ -3952,9 +3953,14 @@ fn genVarDbgInfo(
.memory => |addr| {
const endian = self.target.cpu.arch.endian();
const ptr_width = @intCast(u8, @divExact(self.target.cpu.arch.ptrBitWidth(), 8));
const is_ptr = switch (tag) {
.dbg_var_ptr => true,
.dbg_var_val => false,
else => unreachable,
};
try dbg_info.ensureUnusedCapacity(2 + ptr_width);
dbg_info.appendSliceAssumeCapacity(&[2]u8{ // DW.AT.location, DW.FORM.exprloc
1 + ptr_width,
1 + ptr_width + @boolToInt(is_ptr),
DW.OP.addr, // literal address
});
switch (ptr_width) {
@@ -3966,6 +3972,10 @@ fn genVarDbgInfo(
},
else => unreachable,
}
if (is_ptr) {
// We need deref the address as we point to the value via GOT entry.
try dbg_info.append(DW.OP.deref);
}
},
else => {
log.debug("TODO generate debug info for {}", .{mcv});