zig

commit 464eef390bf7abeb1a61cbd672c5ec82e65b59a6 (tree)
parent 978555eea47a4d401e21735a01c806bbcf8a5199
Author: Alex Rønne Petersen <alex@alexrp.com>
Date:   Sat,  2 Aug 2025 21:32:51 +0200

std.Target: make ultrasparc3 the baseline for sparc64-solaris

https://github.com/llvm/llvm-project/pull/149990

Diffstat:
M
lib/std/Target.zig
 | 
4
++++

1 file changed, 4 insertions(+), 0 deletions(-)
diff --git a/lib/std/Target.zig b/lib/std/Target.zig
@@ -1908,6 +1908,10 @@ pub const Cpu = struct {
                 .riscv64, .riscv64be => &riscv.cpu.baseline_rv64,
                 .s390x => &s390x.cpu.arch8, // gcc/clang do not have a generic s390x model.
                 .sparc => &sparc.cpu.v9, // glibc does not work with 'plain' v8.
+                .sparc64 => switch (os.tag) {
+                    .solaris => &sparc.cpu.ultrasparc3,
+                    else => generic(arch),
+                },
                 .x86 => &x86.cpu.pentium4,
                 .x86_64 => switch (os.tag) {
                     .driverkit => &x86.cpu.nehalem,