zig

commit 4d6849ceb89fc90c1bc5e198a30624d07dedf9e5 (tree)
parent 77f230ebd89e411f8fb2c735be970e87ac07aa24
Author: Jacob G-W <jacoblevgw@gmail.com>
Date:   Thu,  6 Jan 2022 22:46:55 -0500

plan9 debuginfo: fix case where pc change is > 64 * inst quanta

Diffstat:
M
src/arch/x86_64/Isel.zig
 | 
11
++++++++++-

1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/src/arch/x86_64/Isel.zig b/src/arch/x86_64/Isel.zig
@@ -753,7 +753,16 @@ fn dbgAdvancePCAndLine(isel: *Isel, line: u32, column: u32) InnerError!void {
             const d_pc_p9 = @intCast(i64, delta_pc) - quant;
             if (d_pc_p9 > 0) {
                 // minus one because if its the last one, we want to leave space to change the line which is one quanta
-                try dbg_out.dbg_line.append(@intCast(u8, @divExact(d_pc_p9, quant) + 128) - quant);
+                var diff = @divExact(d_pc_p9, quant) - quant;
+                while (diff > 0) {
+                    if (diff < 64) {
+                        try dbg_out.dbg_line.append(@intCast(u8, diff + 128));
+                        diff = 0;
+                    } else {
+                        try dbg_out.dbg_line.append(@intCast(u8, 64 + 128));
+                        diff -= 64;
+                    }
+                }
                 if (dbg_out.pcop_change_index.*) |pci|
                     dbg_out.dbg_line.items[pci] += 1;
                 dbg_out.pcop_change_index.* = @intCast(u32, dbg_out.dbg_line.items.len - 1);