commit 4fe575f47bbc10ee56f47bd9e7e1b8dacd35fc41 (tree)
parent a6ddc12b33d4df48670e7752228b4257933d79c7
Author: joachimschmidt557 <joachim.schmidt557@outlook.com>
Date: Fri, 9 Apr 2021 18:08:57 +0200
stage2 ARM: Add fibonacci test
Diffstat:
2 files changed, 40 insertions(+), 1 deletion(-)
diff --git a/src/codegen.zig b/src/codegen.zig
@@ -1745,7 +1745,7 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type {
const result = self.args[arg_index];
const mcv = switch (arch) {
- // TODO support stack-only registers on all target architectures
+ // TODO support stack-only arguments on all target architectures
.arm, .armeb, .aarch64, .aarch64_32, .aarch64_be => switch (result) {
// Copy registers to the stack
.register => |reg| blk: {
diff --git a/test/stage2/arm.zig b/test/stage2/arm.zig
@@ -419,4 +419,43 @@ pub fn addCases(ctx: *TestContext) !void {
"",
);
}
+
+ {
+ var case = ctx.exe("recursive fibonacci", linux_arm);
+ case.addCompareOutput(
+ \\export fn _start() noreturn {
+ \\ assert(fib(0) == 0);
+ \\ assert(fib(1) == 1);
+ \\ assert(fib(2) == 1);
+ \\ assert(fib(3) == 2);
+ \\ assert(fib(10) == 55);
+ \\ assert(fib(20) == 6765);
+ \\ exit();
+ \\}
+ \\
+ \\fn fib(n: u32) u32 {
+ \\ if (n < 2) {
+ \\ return n;
+ \\ } else {
+ \\ return fib(n - 2) + fib(n - 1);
+ \\ }
+ \\}
+ \\
+ \\fn assert(ok: bool) void {
+ \\ if (!ok) unreachable;
+ \\}
+ \\
+ \\fn exit() noreturn {
+ \\ asm volatile ("svc #0"
+ \\ :
+ \\ : [number] "{r7}" (1),
+ \\ [arg1] "{r0}" (0)
+ \\ : "memory"
+ \\ );
+ \\ unreachable;
+ \\}
+ ,
+ "",
+ );
+ }
}