zig

commit 5b283fba77d50b48d9b9895fac36ee3e1844bd1c (tree)
parent 6aa89115f974b639d6006d8106a7df7d94f636ac
Author: Koakuma <koachan@protonmail.com>
Date:   Fri, 15 Apr 2022 19:40:36 +0700

compiler_rt: atomics: Add Leon CAS instruction check for SPARC atomics

Diffstat:
M
lib/std/special/compiler_rt/atomics.zig
 | 
7
+++----

1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/lib/std/special/compiler_rt/atomics.zig b/lib/std/special/compiler_rt/atomics.zig
@@ -1,6 +1,7 @@
 const std = @import("std");
 const builtin = @import("builtin");
-const arch = builtin.cpu.arch;
+const cpu = builtin.cpu;
+const arch = cpu.arch;
 
 const linkage: std.builtin.GlobalLinkage = if (builtin.is_test) .Internal else .Weak;
 
@@ -27,9 +28,7 @@ const largest_atomic_size = switch (arch) {
     // On SPARC systems that lacks CAS and/or swap instructions, the only
     // available atomic operation is a test-and-set (`ldstub`), so we force
     // every atomic memory access to go through the lock.
-    // XXX: Check the presence of CAS/swap instructions and set this parameter
-    // accordingly.
-    .sparc, .sparcel, .sparcv9 => 0,
+    .sparc, .sparcel => if (cpu.features.featureSetHas(.hasleoncasa)) @sizeOf(usize) else 0,
 
     // XXX: On x86/x86_64 we could check the presence of cmpxchg8b/cmpxchg16b
     // and set this parameter accordingly.