zig

commit 604e87a95868094bdddbcc6a4579f8535ae5e2a9 (tree)
parent 9c22a6b3ade561b4009020547980fcf2d76a9f57
Author: Alex Rønne Petersen <alex@alexrp.com>
Date:   Fri, 26 Jul 2024 03:14:32 +0200

std.Target: Use hexagonv60 as the baseline CPU model for hexagon.
Diffstat:
M
lib/std/Target.zig
 | 
1
+

1 file changed, 1 insertion(+), 0 deletions(-)
diff --git a/lib/std/Target.zig b/lib/std/Target.zig
@@ -1512,6 +1512,7 @@ pub const Cpu = struct {
         pub fn baseline(arch: Arch) *const Model {
             return switch (arch) {
                 .arm, .armeb, .thumb, .thumbeb => &arm.cpu.baseline,
+                .hexagon => &hexagon.cpu.hexagonv60,
                 .riscv32 => &riscv.cpu.baseline_rv32,
                 .riscv64 => &riscv.cpu.baseline_rv64,
                 .x86 => &x86.cpu.pentium4,